15fd54aceSGreg Kroah-Hartman // SPDX-License-Identifier: GPL-2.0 272246da4SFelipe Balbi /** 372246da4SFelipe Balbi * core.c - DesignWare USB3 DRD Controller Core file 472246da4SFelipe Balbi * 572246da4SFelipe Balbi * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com 672246da4SFelipe Balbi * 772246da4SFelipe Balbi * Authors: Felipe Balbi <balbi@ti.com>, 872246da4SFelipe Balbi * Sebastian Andrzej Siewior <bigeasy@linutronix.de> 972246da4SFelipe Balbi */ 1072246da4SFelipe Balbi 11*fe8abf33SMasahiro Yamada #include <linux/clk.h> 12fa0ea13eSFelipe Balbi #include <linux/version.h> 13a72e658bSFelipe Balbi #include <linux/module.h> 1472246da4SFelipe Balbi #include <linux/kernel.h> 1572246da4SFelipe Balbi #include <linux/slab.h> 1672246da4SFelipe Balbi #include <linux/spinlock.h> 1772246da4SFelipe Balbi #include <linux/platform_device.h> 1872246da4SFelipe Balbi #include <linux/pm_runtime.h> 1972246da4SFelipe Balbi #include <linux/interrupt.h> 2072246da4SFelipe Balbi #include <linux/ioport.h> 2172246da4SFelipe Balbi #include <linux/io.h> 2272246da4SFelipe Balbi #include <linux/list.h> 2372246da4SFelipe Balbi #include <linux/delay.h> 2472246da4SFelipe Balbi #include <linux/dma-mapping.h> 25457e84b6SFelipe Balbi #include <linux/of.h> 26404905a6SHeikki Krogerus #include <linux/acpi.h> 276344475fSSekhar Nori #include <linux/pinctrl/consumer.h> 28*fe8abf33SMasahiro Yamada #include <linux/reset.h> 2972246da4SFelipe Balbi 3072246da4SFelipe Balbi #include <linux/usb/ch9.h> 3172246da4SFelipe Balbi #include <linux/usb/gadget.h> 32f7e846f0SFelipe Balbi #include <linux/usb/of.h> 33a45c82b8SRuchika Kharwar #include <linux/usb/otg.h> 3472246da4SFelipe Balbi 3572246da4SFelipe Balbi #include "core.h" 3672246da4SFelipe Balbi #include "gadget.h" 3772246da4SFelipe Balbi #include "io.h" 3872246da4SFelipe Balbi 3972246da4SFelipe Balbi #include "debug.h" 4072246da4SFelipe Balbi 41fc8bb91bSFelipe Balbi #define DWC3_DEFAULT_AUTOSUSPEND_DELAY 5000 /* ms */ 428300dd23SFelipe Balbi 439d6173e1SThinh Nguyen /** 449d6173e1SThinh Nguyen * dwc3_get_dr_mode - Validates and sets dr_mode 459d6173e1SThinh Nguyen * @dwc: pointer to our context structure 469d6173e1SThinh Nguyen */ 479d6173e1SThinh Nguyen static int dwc3_get_dr_mode(struct dwc3 *dwc) 489d6173e1SThinh Nguyen { 499d6173e1SThinh Nguyen enum usb_dr_mode mode; 509d6173e1SThinh Nguyen struct device *dev = dwc->dev; 519d6173e1SThinh Nguyen unsigned int hw_mode; 529d6173e1SThinh Nguyen 539d6173e1SThinh Nguyen if (dwc->dr_mode == USB_DR_MODE_UNKNOWN) 549d6173e1SThinh Nguyen dwc->dr_mode = USB_DR_MODE_OTG; 559d6173e1SThinh Nguyen 569d6173e1SThinh Nguyen mode = dwc->dr_mode; 579d6173e1SThinh Nguyen hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0); 589d6173e1SThinh Nguyen 599d6173e1SThinh Nguyen switch (hw_mode) { 609d6173e1SThinh Nguyen case DWC3_GHWPARAMS0_MODE_GADGET: 619d6173e1SThinh Nguyen if (IS_ENABLED(CONFIG_USB_DWC3_HOST)) { 629d6173e1SThinh Nguyen dev_err(dev, 639d6173e1SThinh Nguyen "Controller does not support host mode.\n"); 649d6173e1SThinh Nguyen return -EINVAL; 659d6173e1SThinh Nguyen } 669d6173e1SThinh Nguyen mode = USB_DR_MODE_PERIPHERAL; 679d6173e1SThinh Nguyen break; 689d6173e1SThinh Nguyen case DWC3_GHWPARAMS0_MODE_HOST: 699d6173e1SThinh Nguyen if (IS_ENABLED(CONFIG_USB_DWC3_GADGET)) { 709d6173e1SThinh Nguyen dev_err(dev, 719d6173e1SThinh Nguyen "Controller does not support device mode.\n"); 729d6173e1SThinh Nguyen return -EINVAL; 739d6173e1SThinh Nguyen } 749d6173e1SThinh Nguyen mode = USB_DR_MODE_HOST; 759d6173e1SThinh Nguyen break; 769d6173e1SThinh Nguyen default: 779d6173e1SThinh Nguyen if (IS_ENABLED(CONFIG_USB_DWC3_HOST)) 789d6173e1SThinh Nguyen mode = USB_DR_MODE_HOST; 799d6173e1SThinh Nguyen else if (IS_ENABLED(CONFIG_USB_DWC3_GADGET)) 809d6173e1SThinh Nguyen mode = USB_DR_MODE_PERIPHERAL; 819d6173e1SThinh Nguyen } 829d6173e1SThinh Nguyen 839d6173e1SThinh Nguyen if (mode != dwc->dr_mode) { 849d6173e1SThinh Nguyen dev_warn(dev, 859d6173e1SThinh Nguyen "Configuration mismatch. dr_mode forced to %s\n", 869d6173e1SThinh Nguyen mode == USB_DR_MODE_HOST ? "host" : "gadget"); 879d6173e1SThinh Nguyen 889d6173e1SThinh Nguyen dwc->dr_mode = mode; 899d6173e1SThinh Nguyen } 909d6173e1SThinh Nguyen 919d6173e1SThinh Nguyen return 0; 929d6173e1SThinh Nguyen } 939d6173e1SThinh Nguyen 94f09cc79bSRoger Quadros void dwc3_set_prtcap(struct dwc3 *dwc, u32 mode) 953140e8cbSSebastian Andrzej Siewior { 963140e8cbSSebastian Andrzej Siewior u32 reg; 973140e8cbSSebastian Andrzej Siewior 983140e8cbSSebastian Andrzej Siewior reg = dwc3_readl(dwc->regs, DWC3_GCTL); 993140e8cbSSebastian Andrzej Siewior reg &= ~(DWC3_GCTL_PRTCAPDIR(DWC3_GCTL_PRTCAP_OTG)); 1003140e8cbSSebastian Andrzej Siewior reg |= DWC3_GCTL_PRTCAPDIR(mode); 1013140e8cbSSebastian Andrzej Siewior dwc3_writel(dwc->regs, DWC3_GCTL, reg); 102c4a5153eSManu Gautam 103c4a5153eSManu Gautam dwc->current_dr_role = mode; 10441ce1456SRoger Quadros } 1056b3261a2SRoger Quadros 10641ce1456SRoger Quadros static void __dwc3_set_mode(struct work_struct *work) 10741ce1456SRoger Quadros { 10841ce1456SRoger Quadros struct dwc3 *dwc = work_to_dwc(work); 10941ce1456SRoger Quadros unsigned long flags; 11041ce1456SRoger Quadros int ret; 11141ce1456SRoger Quadros 112f09cc79bSRoger Quadros if (dwc->dr_mode != USB_DR_MODE_OTG) 113f09cc79bSRoger Quadros return; 114f09cc79bSRoger Quadros 115f09cc79bSRoger Quadros if (dwc->current_dr_role == DWC3_GCTL_PRTCAP_OTG) 116f09cc79bSRoger Quadros dwc3_otg_update(dwc, 0); 117f09cc79bSRoger Quadros 11841ce1456SRoger Quadros if (!dwc->desired_dr_role) 11941ce1456SRoger Quadros return; 12041ce1456SRoger Quadros 12141ce1456SRoger Quadros if (dwc->desired_dr_role == dwc->current_dr_role) 12241ce1456SRoger Quadros return; 12341ce1456SRoger Quadros 124f09cc79bSRoger Quadros if (dwc->desired_dr_role == DWC3_GCTL_PRTCAP_OTG && dwc->edev) 12541ce1456SRoger Quadros return; 12641ce1456SRoger Quadros 12741ce1456SRoger Quadros switch (dwc->current_dr_role) { 12841ce1456SRoger Quadros case DWC3_GCTL_PRTCAP_HOST: 12941ce1456SRoger Quadros dwc3_host_exit(dwc); 13041ce1456SRoger Quadros break; 13141ce1456SRoger Quadros case DWC3_GCTL_PRTCAP_DEVICE: 13241ce1456SRoger Quadros dwc3_gadget_exit(dwc); 13341ce1456SRoger Quadros dwc3_event_buffers_cleanup(dwc); 13441ce1456SRoger Quadros break; 135f09cc79bSRoger Quadros case DWC3_GCTL_PRTCAP_OTG: 136f09cc79bSRoger Quadros dwc3_otg_exit(dwc); 137f09cc79bSRoger Quadros spin_lock_irqsave(&dwc->lock, flags); 138f09cc79bSRoger Quadros dwc->desired_otg_role = DWC3_OTG_ROLE_IDLE; 139f09cc79bSRoger Quadros spin_unlock_irqrestore(&dwc->lock, flags); 140f09cc79bSRoger Quadros dwc3_otg_update(dwc, 1); 141f09cc79bSRoger Quadros break; 14241ce1456SRoger Quadros default: 14341ce1456SRoger Quadros break; 14441ce1456SRoger Quadros } 14541ce1456SRoger Quadros 14641ce1456SRoger Quadros spin_lock_irqsave(&dwc->lock, flags); 14741ce1456SRoger Quadros 14841ce1456SRoger Quadros dwc3_set_prtcap(dwc, dwc->desired_dr_role); 14941ce1456SRoger Quadros 15041ce1456SRoger Quadros spin_unlock_irqrestore(&dwc->lock, flags); 15141ce1456SRoger Quadros 15241ce1456SRoger Quadros switch (dwc->desired_dr_role) { 15341ce1456SRoger Quadros case DWC3_GCTL_PRTCAP_HOST: 15441ce1456SRoger Quadros ret = dwc3_host_init(dwc); 155958d1a4cSFelipe Balbi if (ret) { 15641ce1456SRoger Quadros dev_err(dwc->dev, "failed to initialize host\n"); 157958d1a4cSFelipe Balbi } else { 158958d1a4cSFelipe Balbi if (dwc->usb2_phy) 159958d1a4cSFelipe Balbi otg_set_vbus(dwc->usb2_phy->otg, true); 160958d1a4cSFelipe Balbi phy_set_mode(dwc->usb2_generic_phy, PHY_MODE_USB_HOST); 161644cbbc3SManu Gautam phy_set_mode(dwc->usb3_generic_phy, PHY_MODE_USB_HOST); 162d8c80bb3SVivek Gautam phy_calibrate(dwc->usb2_generic_phy); 163958d1a4cSFelipe Balbi } 16441ce1456SRoger Quadros break; 16541ce1456SRoger Quadros case DWC3_GCTL_PRTCAP_DEVICE: 16641ce1456SRoger Quadros dwc3_event_buffers_setup(dwc); 167958d1a4cSFelipe Balbi 168958d1a4cSFelipe Balbi if (dwc->usb2_phy) 169958d1a4cSFelipe Balbi otg_set_vbus(dwc->usb2_phy->otg, false); 170958d1a4cSFelipe Balbi phy_set_mode(dwc->usb2_generic_phy, PHY_MODE_USB_DEVICE); 171644cbbc3SManu Gautam phy_set_mode(dwc->usb3_generic_phy, PHY_MODE_USB_DEVICE); 172958d1a4cSFelipe Balbi 17341ce1456SRoger Quadros ret = dwc3_gadget_init(dwc); 17441ce1456SRoger Quadros if (ret) 17541ce1456SRoger Quadros dev_err(dwc->dev, "failed to initialize peripheral\n"); 17641ce1456SRoger Quadros break; 177f09cc79bSRoger Quadros case DWC3_GCTL_PRTCAP_OTG: 178f09cc79bSRoger Quadros dwc3_otg_init(dwc); 179f09cc79bSRoger Quadros dwc3_otg_update(dwc, 0); 180f09cc79bSRoger Quadros break; 18141ce1456SRoger Quadros default: 18241ce1456SRoger Quadros break; 18341ce1456SRoger Quadros } 184f09cc79bSRoger Quadros 18541ce1456SRoger Quadros } 18641ce1456SRoger Quadros 18741ce1456SRoger Quadros void dwc3_set_mode(struct dwc3 *dwc, u32 mode) 18841ce1456SRoger Quadros { 18941ce1456SRoger Quadros unsigned long flags; 19041ce1456SRoger Quadros 19141ce1456SRoger Quadros spin_lock_irqsave(&dwc->lock, flags); 19241ce1456SRoger Quadros dwc->desired_dr_role = mode; 19341ce1456SRoger Quadros spin_unlock_irqrestore(&dwc->lock, flags); 19441ce1456SRoger Quadros 195084a804eSRoger Quadros queue_work(system_freezable_wq, &dwc->drd_work); 1963140e8cbSSebastian Andrzej Siewior } 1978300dd23SFelipe Balbi 198cf6d867dSFelipe Balbi u32 dwc3_core_fifo_space(struct dwc3_ep *dep, u8 type) 199cf6d867dSFelipe Balbi { 200cf6d867dSFelipe Balbi struct dwc3 *dwc = dep->dwc; 201cf6d867dSFelipe Balbi u32 reg; 202cf6d867dSFelipe Balbi 203cf6d867dSFelipe Balbi dwc3_writel(dwc->regs, DWC3_GDBGFIFOSPACE, 204cf6d867dSFelipe Balbi DWC3_GDBGFIFOSPACE_NUM(dep->number) | 205cf6d867dSFelipe Balbi DWC3_GDBGFIFOSPACE_TYPE(type)); 206cf6d867dSFelipe Balbi 207cf6d867dSFelipe Balbi reg = dwc3_readl(dwc->regs, DWC3_GDBGFIFOSPACE); 208cf6d867dSFelipe Balbi 209cf6d867dSFelipe Balbi return DWC3_GDBGFIFOSPACE_SPACE_AVAILABLE(reg); 210cf6d867dSFelipe Balbi } 211cf6d867dSFelipe Balbi 21272246da4SFelipe Balbi /** 21372246da4SFelipe Balbi * dwc3_core_soft_reset - Issues core soft reset and PHY reset 21472246da4SFelipe Balbi * @dwc: pointer to our context structure 21572246da4SFelipe Balbi */ 21657303488SKishon Vijay Abraham I static int dwc3_core_soft_reset(struct dwc3 *dwc) 21772246da4SFelipe Balbi { 21872246da4SFelipe Balbi u32 reg; 219f59dcab1SFelipe Balbi int retries = 1000; 22057303488SKishon Vijay Abraham I int ret; 22172246da4SFelipe Balbi 22251e1e7bcSFelipe Balbi usb_phy_init(dwc->usb2_phy); 22351e1e7bcSFelipe Balbi usb_phy_init(dwc->usb3_phy); 22457303488SKishon Vijay Abraham I ret = phy_init(dwc->usb2_generic_phy); 22557303488SKishon Vijay Abraham I if (ret < 0) 22657303488SKishon Vijay Abraham I return ret; 22757303488SKishon Vijay Abraham I 22857303488SKishon Vijay Abraham I ret = phy_init(dwc->usb3_generic_phy); 22957303488SKishon Vijay Abraham I if (ret < 0) { 23057303488SKishon Vijay Abraham I phy_exit(dwc->usb2_generic_phy); 23157303488SKishon Vijay Abraham I return ret; 23257303488SKishon Vijay Abraham I } 23372246da4SFelipe Balbi 234f59dcab1SFelipe Balbi /* 235f59dcab1SFelipe Balbi * We're resetting only the device side because, if we're in host mode, 236f59dcab1SFelipe Balbi * XHCI driver will reset the host block. If dwc3 was configured for 237f59dcab1SFelipe Balbi * host-only mode, then we can return early. 238f59dcab1SFelipe Balbi */ 239c4a5153eSManu Gautam if (dwc->current_dr_role == DWC3_GCTL_PRTCAP_HOST) 24057303488SKishon Vijay Abraham I return 0; 241f59dcab1SFelipe Balbi 242f59dcab1SFelipe Balbi reg = dwc3_readl(dwc->regs, DWC3_DCTL); 243f59dcab1SFelipe Balbi reg |= DWC3_DCTL_CSFTRST; 244f59dcab1SFelipe Balbi dwc3_writel(dwc->regs, DWC3_DCTL, reg); 245f59dcab1SFelipe Balbi 246f59dcab1SFelipe Balbi do { 247f59dcab1SFelipe Balbi reg = dwc3_readl(dwc->regs, DWC3_DCTL); 248f59dcab1SFelipe Balbi if (!(reg & DWC3_DCTL_CSFTRST)) 249fab38333SThinh Nguyen goto done; 250f59dcab1SFelipe Balbi 251f59dcab1SFelipe Balbi udelay(1); 252f59dcab1SFelipe Balbi } while (--retries); 253f59dcab1SFelipe Balbi 25400b42170SBrian Norris phy_exit(dwc->usb3_generic_phy); 25500b42170SBrian Norris phy_exit(dwc->usb2_generic_phy); 25600b42170SBrian Norris 257f59dcab1SFelipe Balbi return -ETIMEDOUT; 258fab38333SThinh Nguyen 259fab38333SThinh Nguyen done: 260fab38333SThinh Nguyen /* 261fab38333SThinh Nguyen * For DWC_usb31 controller, once DWC3_DCTL_CSFTRST bit is cleared, 262fab38333SThinh Nguyen * we must wait at least 50ms before accessing the PHY domain 263fab38333SThinh Nguyen * (synchronization delay). DWC_usb31 programming guide section 1.3.2. 264fab38333SThinh Nguyen */ 265fab38333SThinh Nguyen if (dwc3_is_usb31(dwc)) 266fab38333SThinh Nguyen msleep(50); 267fab38333SThinh Nguyen 268fab38333SThinh Nguyen return 0; 26972246da4SFelipe Balbi } 27072246da4SFelipe Balbi 271*fe8abf33SMasahiro Yamada static const struct clk_bulk_data dwc3_core_clks[] = { 272*fe8abf33SMasahiro Yamada { .id = "ref" }, 273*fe8abf33SMasahiro Yamada { .id = "bus_early" }, 274*fe8abf33SMasahiro Yamada { .id = "suspend" }, 275*fe8abf33SMasahiro Yamada }; 276*fe8abf33SMasahiro Yamada 277db2be4e9SNikhil Badola /* 278db2be4e9SNikhil Badola * dwc3_frame_length_adjustment - Adjusts frame length if required 279db2be4e9SNikhil Badola * @dwc3: Pointer to our controller context structure 280db2be4e9SNikhil Badola */ 281bcdb3272SFelipe Balbi static void dwc3_frame_length_adjustment(struct dwc3 *dwc) 282db2be4e9SNikhil Badola { 283db2be4e9SNikhil Badola u32 reg; 284db2be4e9SNikhil Badola u32 dft; 285db2be4e9SNikhil Badola 286db2be4e9SNikhil Badola if (dwc->revision < DWC3_REVISION_250A) 287db2be4e9SNikhil Badola return; 288db2be4e9SNikhil Badola 289bcdb3272SFelipe Balbi if (dwc->fladj == 0) 290db2be4e9SNikhil Badola return; 291db2be4e9SNikhil Badola 292db2be4e9SNikhil Badola reg = dwc3_readl(dwc->regs, DWC3_GFLADJ); 293db2be4e9SNikhil Badola dft = reg & DWC3_GFLADJ_30MHZ_MASK; 294bcdb3272SFelipe Balbi if (!dev_WARN_ONCE(dwc->dev, dft == dwc->fladj, 295db2be4e9SNikhil Badola "request value same as default, ignoring\n")) { 296db2be4e9SNikhil Badola reg &= ~DWC3_GFLADJ_30MHZ_MASK; 297bcdb3272SFelipe Balbi reg |= DWC3_GFLADJ_30MHZ_SDBND_SEL | dwc->fladj; 298db2be4e9SNikhil Badola dwc3_writel(dwc->regs, DWC3_GFLADJ, reg); 299db2be4e9SNikhil Badola } 300db2be4e9SNikhil Badola } 301db2be4e9SNikhil Badola 302c5cc74e8SHeikki Krogerus /** 30372246da4SFelipe Balbi * dwc3_free_one_event_buffer - Frees one event buffer 30472246da4SFelipe Balbi * @dwc: Pointer to our controller context structure 30572246da4SFelipe Balbi * @evt: Pointer to event buffer to be freed 30672246da4SFelipe Balbi */ 30772246da4SFelipe Balbi static void dwc3_free_one_event_buffer(struct dwc3 *dwc, 30872246da4SFelipe Balbi struct dwc3_event_buffer *evt) 30972246da4SFelipe Balbi { 310d64ff406SArnd Bergmann dma_free_coherent(dwc->sysdev, evt->length, evt->buf, evt->dma); 31172246da4SFelipe Balbi } 31272246da4SFelipe Balbi 31372246da4SFelipe Balbi /** 3141d046793SPaul Zimmerman * dwc3_alloc_one_event_buffer - Allocates one event buffer structure 31572246da4SFelipe Balbi * @dwc: Pointer to our controller context structure 31672246da4SFelipe Balbi * @length: size of the event buffer 31772246da4SFelipe Balbi * 3181d046793SPaul Zimmerman * Returns a pointer to the allocated event buffer structure on success 31972246da4SFelipe Balbi * otherwise ERR_PTR(errno). 32072246da4SFelipe Balbi */ 32167d0b500SFelipe Balbi static struct dwc3_event_buffer *dwc3_alloc_one_event_buffer(struct dwc3 *dwc, 32267d0b500SFelipe Balbi unsigned length) 32372246da4SFelipe Balbi { 32472246da4SFelipe Balbi struct dwc3_event_buffer *evt; 32572246da4SFelipe Balbi 326380f0d28SFelipe Balbi evt = devm_kzalloc(dwc->dev, sizeof(*evt), GFP_KERNEL); 32772246da4SFelipe Balbi if (!evt) 32872246da4SFelipe Balbi return ERR_PTR(-ENOMEM); 32972246da4SFelipe Balbi 33072246da4SFelipe Balbi evt->dwc = dwc; 33172246da4SFelipe Balbi evt->length = length; 332d9fa4c63SJohn Youn evt->cache = devm_kzalloc(dwc->dev, length, GFP_KERNEL); 333d9fa4c63SJohn Youn if (!evt->cache) 334d9fa4c63SJohn Youn return ERR_PTR(-ENOMEM); 335d9fa4c63SJohn Youn 336d64ff406SArnd Bergmann evt->buf = dma_alloc_coherent(dwc->sysdev, length, 33772246da4SFelipe Balbi &evt->dma, GFP_KERNEL); 338e32672f0SFelipe Balbi if (!evt->buf) 33972246da4SFelipe Balbi return ERR_PTR(-ENOMEM); 34072246da4SFelipe Balbi 34172246da4SFelipe Balbi return evt; 34272246da4SFelipe Balbi } 34372246da4SFelipe Balbi 34472246da4SFelipe Balbi /** 34572246da4SFelipe Balbi * dwc3_free_event_buffers - frees all allocated event buffers 34672246da4SFelipe Balbi * @dwc: Pointer to our controller context structure 34772246da4SFelipe Balbi */ 34872246da4SFelipe Balbi static void dwc3_free_event_buffers(struct dwc3 *dwc) 34972246da4SFelipe Balbi { 35072246da4SFelipe Balbi struct dwc3_event_buffer *evt; 35172246da4SFelipe Balbi 352696c8b12SFelipe Balbi evt = dwc->ev_buf; 35364b6c8a7SAnton Tikhomirov if (evt) 35472246da4SFelipe Balbi dwc3_free_one_event_buffer(dwc, evt); 35572246da4SFelipe Balbi } 35672246da4SFelipe Balbi 35772246da4SFelipe Balbi /** 35872246da4SFelipe Balbi * dwc3_alloc_event_buffers - Allocates @num event buffers of size @length 3591d046793SPaul Zimmerman * @dwc: pointer to our controller context structure 36072246da4SFelipe Balbi * @length: size of event buffer 36172246da4SFelipe Balbi * 3621d046793SPaul Zimmerman * Returns 0 on success otherwise negative errno. In the error case, dwc 36372246da4SFelipe Balbi * may contain some buffers allocated but not all which were requested. 36472246da4SFelipe Balbi */ 36541ac7b3aSBill Pemberton static int dwc3_alloc_event_buffers(struct dwc3 *dwc, unsigned length) 36672246da4SFelipe Balbi { 36772246da4SFelipe Balbi struct dwc3_event_buffer *evt; 36872246da4SFelipe Balbi 36972246da4SFelipe Balbi evt = dwc3_alloc_one_event_buffer(dwc, length); 37072246da4SFelipe Balbi if (IS_ERR(evt)) { 37172246da4SFelipe Balbi dev_err(dwc->dev, "can't allocate event buffer\n"); 37272246da4SFelipe Balbi return PTR_ERR(evt); 37372246da4SFelipe Balbi } 374696c8b12SFelipe Balbi dwc->ev_buf = evt; 37572246da4SFelipe Balbi 37672246da4SFelipe Balbi return 0; 37772246da4SFelipe Balbi } 37872246da4SFelipe Balbi 37972246da4SFelipe Balbi /** 38072246da4SFelipe Balbi * dwc3_event_buffers_setup - setup our allocated event buffers 3811d046793SPaul Zimmerman * @dwc: pointer to our controller context structure 38272246da4SFelipe Balbi * 38372246da4SFelipe Balbi * Returns 0 on success otherwise negative errno. 38472246da4SFelipe Balbi */ 385f09cc79bSRoger Quadros int dwc3_event_buffers_setup(struct dwc3 *dwc) 38672246da4SFelipe Balbi { 38772246da4SFelipe Balbi struct dwc3_event_buffer *evt; 38872246da4SFelipe Balbi 389696c8b12SFelipe Balbi evt = dwc->ev_buf; 3907acd85e0SPaul Zimmerman evt->lpos = 0; 391660e9bdeSFelipe Balbi dwc3_writel(dwc->regs, DWC3_GEVNTADRLO(0), 39272246da4SFelipe Balbi lower_32_bits(evt->dma)); 393660e9bdeSFelipe Balbi dwc3_writel(dwc->regs, DWC3_GEVNTADRHI(0), 39472246da4SFelipe Balbi upper_32_bits(evt->dma)); 395660e9bdeSFelipe Balbi dwc3_writel(dwc->regs, DWC3_GEVNTSIZ(0), 39668d6a01bSFelipe Balbi DWC3_GEVNTSIZ_SIZE(evt->length)); 397660e9bdeSFelipe Balbi dwc3_writel(dwc->regs, DWC3_GEVNTCOUNT(0), 0); 39872246da4SFelipe Balbi 39972246da4SFelipe Balbi return 0; 40072246da4SFelipe Balbi } 40172246da4SFelipe Balbi 402f09cc79bSRoger Quadros void dwc3_event_buffers_cleanup(struct dwc3 *dwc) 40372246da4SFelipe Balbi { 40472246da4SFelipe Balbi struct dwc3_event_buffer *evt; 40572246da4SFelipe Balbi 406696c8b12SFelipe Balbi evt = dwc->ev_buf; 4077acd85e0SPaul Zimmerman 4087acd85e0SPaul Zimmerman evt->lpos = 0; 4097acd85e0SPaul Zimmerman 410660e9bdeSFelipe Balbi dwc3_writel(dwc->regs, DWC3_GEVNTADRLO(0), 0); 411660e9bdeSFelipe Balbi dwc3_writel(dwc->regs, DWC3_GEVNTADRHI(0), 0); 412660e9bdeSFelipe Balbi dwc3_writel(dwc->regs, DWC3_GEVNTSIZ(0), DWC3_GEVNTSIZ_INTMASK 41368d6a01bSFelipe Balbi | DWC3_GEVNTSIZ_SIZE(0)); 414660e9bdeSFelipe Balbi dwc3_writel(dwc->regs, DWC3_GEVNTCOUNT(0), 0); 41572246da4SFelipe Balbi } 41672246da4SFelipe Balbi 4170ffcaf37SFelipe Balbi static int dwc3_alloc_scratch_buffers(struct dwc3 *dwc) 4180ffcaf37SFelipe Balbi { 4190ffcaf37SFelipe Balbi if (!dwc->has_hibernation) 4200ffcaf37SFelipe Balbi return 0; 4210ffcaf37SFelipe Balbi 4220ffcaf37SFelipe Balbi if (!dwc->nr_scratch) 4230ffcaf37SFelipe Balbi return 0; 4240ffcaf37SFelipe Balbi 4250ffcaf37SFelipe Balbi dwc->scratchbuf = kmalloc_array(dwc->nr_scratch, 4260ffcaf37SFelipe Balbi DWC3_SCRATCHBUF_SIZE, GFP_KERNEL); 4270ffcaf37SFelipe Balbi if (!dwc->scratchbuf) 4280ffcaf37SFelipe Balbi return -ENOMEM; 4290ffcaf37SFelipe Balbi 4300ffcaf37SFelipe Balbi return 0; 4310ffcaf37SFelipe Balbi } 4320ffcaf37SFelipe Balbi 4330ffcaf37SFelipe Balbi static int dwc3_setup_scratch_buffers(struct dwc3 *dwc) 4340ffcaf37SFelipe Balbi { 4350ffcaf37SFelipe Balbi dma_addr_t scratch_addr; 4360ffcaf37SFelipe Balbi u32 param; 4370ffcaf37SFelipe Balbi int ret; 4380ffcaf37SFelipe Balbi 4390ffcaf37SFelipe Balbi if (!dwc->has_hibernation) 4400ffcaf37SFelipe Balbi return 0; 4410ffcaf37SFelipe Balbi 4420ffcaf37SFelipe Balbi if (!dwc->nr_scratch) 4430ffcaf37SFelipe Balbi return 0; 4440ffcaf37SFelipe Balbi 4450ffcaf37SFelipe Balbi /* should never fall here */ 4460ffcaf37SFelipe Balbi if (!WARN_ON(dwc->scratchbuf)) 4470ffcaf37SFelipe Balbi return 0; 4480ffcaf37SFelipe Balbi 449d64ff406SArnd Bergmann scratch_addr = dma_map_single(dwc->sysdev, dwc->scratchbuf, 4500ffcaf37SFelipe Balbi dwc->nr_scratch * DWC3_SCRATCHBUF_SIZE, 4510ffcaf37SFelipe Balbi DMA_BIDIRECTIONAL); 452d64ff406SArnd Bergmann if (dma_mapping_error(dwc->sysdev, scratch_addr)) { 453d64ff406SArnd Bergmann dev_err(dwc->sysdev, "failed to map scratch buffer\n"); 4540ffcaf37SFelipe Balbi ret = -EFAULT; 4550ffcaf37SFelipe Balbi goto err0; 4560ffcaf37SFelipe Balbi } 4570ffcaf37SFelipe Balbi 4580ffcaf37SFelipe Balbi dwc->scratch_addr = scratch_addr; 4590ffcaf37SFelipe Balbi 4600ffcaf37SFelipe Balbi param = lower_32_bits(scratch_addr); 4610ffcaf37SFelipe Balbi 4620ffcaf37SFelipe Balbi ret = dwc3_send_gadget_generic_command(dwc, 4630ffcaf37SFelipe Balbi DWC3_DGCMD_SET_SCRATCHPAD_ADDR_LO, param); 4640ffcaf37SFelipe Balbi if (ret < 0) 4650ffcaf37SFelipe Balbi goto err1; 4660ffcaf37SFelipe Balbi 4670ffcaf37SFelipe Balbi param = upper_32_bits(scratch_addr); 4680ffcaf37SFelipe Balbi 4690ffcaf37SFelipe Balbi ret = dwc3_send_gadget_generic_command(dwc, 4700ffcaf37SFelipe Balbi DWC3_DGCMD_SET_SCRATCHPAD_ADDR_HI, param); 4710ffcaf37SFelipe Balbi if (ret < 0) 4720ffcaf37SFelipe Balbi goto err1; 4730ffcaf37SFelipe Balbi 4740ffcaf37SFelipe Balbi return 0; 4750ffcaf37SFelipe Balbi 4760ffcaf37SFelipe Balbi err1: 477d64ff406SArnd Bergmann dma_unmap_single(dwc->sysdev, dwc->scratch_addr, dwc->nr_scratch * 4780ffcaf37SFelipe Balbi DWC3_SCRATCHBUF_SIZE, DMA_BIDIRECTIONAL); 4790ffcaf37SFelipe Balbi 4800ffcaf37SFelipe Balbi err0: 4810ffcaf37SFelipe Balbi return ret; 4820ffcaf37SFelipe Balbi } 4830ffcaf37SFelipe Balbi 4840ffcaf37SFelipe Balbi static void dwc3_free_scratch_buffers(struct dwc3 *dwc) 4850ffcaf37SFelipe Balbi { 4860ffcaf37SFelipe Balbi if (!dwc->has_hibernation) 4870ffcaf37SFelipe Balbi return; 4880ffcaf37SFelipe Balbi 4890ffcaf37SFelipe Balbi if (!dwc->nr_scratch) 4900ffcaf37SFelipe Balbi return; 4910ffcaf37SFelipe Balbi 4920ffcaf37SFelipe Balbi /* should never fall here */ 4930ffcaf37SFelipe Balbi if (!WARN_ON(dwc->scratchbuf)) 4940ffcaf37SFelipe Balbi return; 4950ffcaf37SFelipe Balbi 496d64ff406SArnd Bergmann dma_unmap_single(dwc->sysdev, dwc->scratch_addr, dwc->nr_scratch * 4970ffcaf37SFelipe Balbi DWC3_SCRATCHBUF_SIZE, DMA_BIDIRECTIONAL); 4980ffcaf37SFelipe Balbi kfree(dwc->scratchbuf); 4990ffcaf37SFelipe Balbi } 5000ffcaf37SFelipe Balbi 501789451f6SFelipe Balbi static void dwc3_core_num_eps(struct dwc3 *dwc) 502789451f6SFelipe Balbi { 503789451f6SFelipe Balbi struct dwc3_hwparams *parms = &dwc->hwparams; 504789451f6SFelipe Balbi 50547d3946eSBryan O'Donoghue dwc->num_eps = DWC3_NUM_EPS(parms); 506789451f6SFelipe Balbi } 507789451f6SFelipe Balbi 50841ac7b3aSBill Pemberton static void dwc3_cache_hwparams(struct dwc3 *dwc) 50926ceca97SFelipe Balbi { 51026ceca97SFelipe Balbi struct dwc3_hwparams *parms = &dwc->hwparams; 51126ceca97SFelipe Balbi 51226ceca97SFelipe Balbi parms->hwparams0 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS0); 51326ceca97SFelipe Balbi parms->hwparams1 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS1); 51426ceca97SFelipe Balbi parms->hwparams2 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS2); 51526ceca97SFelipe Balbi parms->hwparams3 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS3); 51626ceca97SFelipe Balbi parms->hwparams4 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS4); 51726ceca97SFelipe Balbi parms->hwparams5 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS5); 51826ceca97SFelipe Balbi parms->hwparams6 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS6); 51926ceca97SFelipe Balbi parms->hwparams7 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS7); 52026ceca97SFelipe Balbi parms->hwparams8 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS8); 52126ceca97SFelipe Balbi } 52226ceca97SFelipe Balbi 52398112041SRoger Quadros static int dwc3_core_ulpi_init(struct dwc3 *dwc) 52498112041SRoger Quadros { 52598112041SRoger Quadros int intf; 52698112041SRoger Quadros int ret = 0; 52798112041SRoger Quadros 52898112041SRoger Quadros intf = DWC3_GHWPARAMS3_HSPHY_IFC(dwc->hwparams.hwparams3); 52998112041SRoger Quadros 53098112041SRoger Quadros if (intf == DWC3_GHWPARAMS3_HSPHY_IFC_ULPI || 53198112041SRoger Quadros (intf == DWC3_GHWPARAMS3_HSPHY_IFC_UTMI_ULPI && 53298112041SRoger Quadros dwc->hsphy_interface && 53398112041SRoger Quadros !strncmp(dwc->hsphy_interface, "ulpi", 4))) 53498112041SRoger Quadros ret = dwc3_ulpi_init(dwc); 53598112041SRoger Quadros 53698112041SRoger Quadros return ret; 53798112041SRoger Quadros } 53898112041SRoger Quadros 53972246da4SFelipe Balbi /** 540b5a65c40SHuang Rui * dwc3_phy_setup - Configure USB PHY Interface of DWC3 Core 541b5a65c40SHuang Rui * @dwc: Pointer to our controller context structure 54288bc9d19SHeikki Krogerus * 54388bc9d19SHeikki Krogerus * Returns 0 on success. The USB PHY interfaces are configured but not 54488bc9d19SHeikki Krogerus * initialized. The PHY interfaces and the PHYs get initialized together with 54588bc9d19SHeikki Krogerus * the core in dwc3_core_init. 546b5a65c40SHuang Rui */ 54788bc9d19SHeikki Krogerus static int dwc3_phy_setup(struct dwc3 *dwc) 548b5a65c40SHuang Rui { 549b5a65c40SHuang Rui u32 reg; 550b5a65c40SHuang Rui 551b5a65c40SHuang Rui reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0)); 552b5a65c40SHuang Rui 5532164a476SHuang Rui /* 5541966b865SFelipe Balbi * Make sure UX_EXIT_PX is cleared as that causes issues with some 5551966b865SFelipe Balbi * PHYs. Also, this bit is not supposed to be used in normal operation. 5561966b865SFelipe Balbi */ 5571966b865SFelipe Balbi reg &= ~DWC3_GUSB3PIPECTL_UX_EXIT_PX; 5581966b865SFelipe Balbi 5591966b865SFelipe Balbi /* 5602164a476SHuang Rui * Above 1.94a, it is recommended to set DWC3_GUSB3PIPECTL_SUSPHY 5612164a476SHuang Rui * to '0' during coreConsultant configuration. So default value 5622164a476SHuang Rui * will be '0' when the core is reset. Application needs to set it 5632164a476SHuang Rui * to '1' after the core initialization is completed. 5642164a476SHuang Rui */ 5652164a476SHuang Rui if (dwc->revision > DWC3_REVISION_194A) 5662164a476SHuang Rui reg |= DWC3_GUSB3PIPECTL_SUSPHY; 5672164a476SHuang Rui 568b5a65c40SHuang Rui if (dwc->u2ss_inp3_quirk) 569b5a65c40SHuang Rui reg |= DWC3_GUSB3PIPECTL_U2SSINP3OK; 570b5a65c40SHuang Rui 571e58dd357SRajesh Bhagat if (dwc->dis_rxdet_inp3_quirk) 572e58dd357SRajesh Bhagat reg |= DWC3_GUSB3PIPECTL_DISRXDETINP3; 573e58dd357SRajesh Bhagat 574df31f5b3SHuang Rui if (dwc->req_p1p2p3_quirk) 575df31f5b3SHuang Rui reg |= DWC3_GUSB3PIPECTL_REQP1P2P3; 576df31f5b3SHuang Rui 577a2a1d0f5SHuang Rui if (dwc->del_p1p2p3_quirk) 578a2a1d0f5SHuang Rui reg |= DWC3_GUSB3PIPECTL_DEP1P2P3_EN; 579a2a1d0f5SHuang Rui 58041c06ffdSHuang Rui if (dwc->del_phy_power_chg_quirk) 58141c06ffdSHuang Rui reg |= DWC3_GUSB3PIPECTL_DEPOCHANGE; 58241c06ffdSHuang Rui 583fb67afcaSHuang Rui if (dwc->lfps_filter_quirk) 584fb67afcaSHuang Rui reg |= DWC3_GUSB3PIPECTL_LFPSFILT; 585fb67afcaSHuang Rui 58614f4ac53SHuang Rui if (dwc->rx_detect_poll_quirk) 58714f4ac53SHuang Rui reg |= DWC3_GUSB3PIPECTL_RX_DETOPOLL; 58814f4ac53SHuang Rui 5896b6a0c9aSHuang Rui if (dwc->tx_de_emphasis_quirk) 5906b6a0c9aSHuang Rui reg |= DWC3_GUSB3PIPECTL_TX_DEEPH(dwc->tx_de_emphasis); 5916b6a0c9aSHuang Rui 592cd72f890SFelipe Balbi if (dwc->dis_u3_susphy_quirk) 59359acfa20SHuang Rui reg &= ~DWC3_GUSB3PIPECTL_SUSPHY; 59459acfa20SHuang Rui 59500fe081dSWilliam Wu if (dwc->dis_del_phy_power_chg_quirk) 59600fe081dSWilliam Wu reg &= ~DWC3_GUSB3PIPECTL_DEPOCHANGE; 59700fe081dSWilliam Wu 598b5a65c40SHuang Rui dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg); 599b5a65c40SHuang Rui 6002164a476SHuang Rui reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0)); 6012164a476SHuang Rui 6023e10a2ceSHeikki Krogerus /* Select the HS PHY interface */ 6033e10a2ceSHeikki Krogerus switch (DWC3_GHWPARAMS3_HSPHY_IFC(dwc->hwparams.hwparams3)) { 6043e10a2ceSHeikki Krogerus case DWC3_GHWPARAMS3_HSPHY_IFC_UTMI_ULPI: 60543cacb03SFelipe Balbi if (dwc->hsphy_interface && 60643cacb03SFelipe Balbi !strncmp(dwc->hsphy_interface, "utmi", 4)) { 6073e10a2ceSHeikki Krogerus reg &= ~DWC3_GUSB2PHYCFG_ULPI_UTMI; 60888bc9d19SHeikki Krogerus break; 60943cacb03SFelipe Balbi } else if (dwc->hsphy_interface && 61043cacb03SFelipe Balbi !strncmp(dwc->hsphy_interface, "ulpi", 4)) { 6113e10a2ceSHeikki Krogerus reg |= DWC3_GUSB2PHYCFG_ULPI_UTMI; 61288bc9d19SHeikki Krogerus dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); 6133e10a2ceSHeikki Krogerus } else { 61488bc9d19SHeikki Krogerus /* Relying on default value. */ 61588bc9d19SHeikki Krogerus if (!(reg & DWC3_GUSB2PHYCFG_ULPI_UTMI)) 6163e10a2ceSHeikki Krogerus break; 6173e10a2ceSHeikki Krogerus } 6183e10a2ceSHeikki Krogerus /* FALLTHROUGH */ 61988bc9d19SHeikki Krogerus case DWC3_GHWPARAMS3_HSPHY_IFC_ULPI: 62088bc9d19SHeikki Krogerus /* FALLTHROUGH */ 6213e10a2ceSHeikki Krogerus default: 6223e10a2ceSHeikki Krogerus break; 6233e10a2ceSHeikki Krogerus } 6243e10a2ceSHeikki Krogerus 62532f2ed86SWilliam Wu switch (dwc->hsphy_mode) { 62632f2ed86SWilliam Wu case USBPHY_INTERFACE_MODE_UTMI: 62732f2ed86SWilliam Wu reg &= ~(DWC3_GUSB2PHYCFG_PHYIF_MASK | 62832f2ed86SWilliam Wu DWC3_GUSB2PHYCFG_USBTRDTIM_MASK); 62932f2ed86SWilliam Wu reg |= DWC3_GUSB2PHYCFG_PHYIF(UTMI_PHYIF_8_BIT) | 63032f2ed86SWilliam Wu DWC3_GUSB2PHYCFG_USBTRDTIM(USBTRDTIM_UTMI_8_BIT); 63132f2ed86SWilliam Wu break; 63232f2ed86SWilliam Wu case USBPHY_INTERFACE_MODE_UTMIW: 63332f2ed86SWilliam Wu reg &= ~(DWC3_GUSB2PHYCFG_PHYIF_MASK | 63432f2ed86SWilliam Wu DWC3_GUSB2PHYCFG_USBTRDTIM_MASK); 63532f2ed86SWilliam Wu reg |= DWC3_GUSB2PHYCFG_PHYIF(UTMI_PHYIF_16_BIT) | 63632f2ed86SWilliam Wu DWC3_GUSB2PHYCFG_USBTRDTIM(USBTRDTIM_UTMI_16_BIT); 63732f2ed86SWilliam Wu break; 63832f2ed86SWilliam Wu default: 63932f2ed86SWilliam Wu break; 64032f2ed86SWilliam Wu } 64132f2ed86SWilliam Wu 6422164a476SHuang Rui /* 6432164a476SHuang Rui * Above 1.94a, it is recommended to set DWC3_GUSB2PHYCFG_SUSPHY to 6442164a476SHuang Rui * '0' during coreConsultant configuration. So default value will 6452164a476SHuang Rui * be '0' when the core is reset. Application needs to set it to 6462164a476SHuang Rui * '1' after the core initialization is completed. 6472164a476SHuang Rui */ 6482164a476SHuang Rui if (dwc->revision > DWC3_REVISION_194A) 6492164a476SHuang Rui reg |= DWC3_GUSB2PHYCFG_SUSPHY; 6502164a476SHuang Rui 651cd72f890SFelipe Balbi if (dwc->dis_u2_susphy_quirk) 6520effe0a3SHuang Rui reg &= ~DWC3_GUSB2PHYCFG_SUSPHY; 6530effe0a3SHuang Rui 654ec791d14SJohn Youn if (dwc->dis_enblslpm_quirk) 655ec791d14SJohn Youn reg &= ~DWC3_GUSB2PHYCFG_ENBLSLPM; 656ec791d14SJohn Youn 65716199f33SWilliam Wu if (dwc->dis_u2_freeclk_exists_quirk) 65816199f33SWilliam Wu reg &= ~DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS; 65916199f33SWilliam Wu 6602164a476SHuang Rui dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); 66188bc9d19SHeikki Krogerus 66288bc9d19SHeikki Krogerus return 0; 663b5a65c40SHuang Rui } 664b5a65c40SHuang Rui 665c499ff71SFelipe Balbi static void dwc3_core_exit(struct dwc3 *dwc) 666c499ff71SFelipe Balbi { 667c499ff71SFelipe Balbi dwc3_event_buffers_cleanup(dwc); 668c499ff71SFelipe Balbi 669c499ff71SFelipe Balbi usb_phy_shutdown(dwc->usb2_phy); 670c499ff71SFelipe Balbi usb_phy_shutdown(dwc->usb3_phy); 671c499ff71SFelipe Balbi phy_exit(dwc->usb2_generic_phy); 672c499ff71SFelipe Balbi phy_exit(dwc->usb3_generic_phy); 673c499ff71SFelipe Balbi 674c499ff71SFelipe Balbi usb_phy_set_suspend(dwc->usb2_phy, 1); 675c499ff71SFelipe Balbi usb_phy_set_suspend(dwc->usb3_phy, 1); 676c499ff71SFelipe Balbi phy_power_off(dwc->usb2_generic_phy); 677c499ff71SFelipe Balbi phy_power_off(dwc->usb3_generic_phy); 678*fe8abf33SMasahiro Yamada clk_bulk_disable(dwc->num_clks, dwc->clks); 679*fe8abf33SMasahiro Yamada clk_bulk_unprepare(dwc->num_clks, dwc->clks); 680*fe8abf33SMasahiro Yamada reset_control_assert(dwc->reset); 681c499ff71SFelipe Balbi } 682c499ff71SFelipe Balbi 6830759956fSFelipe Balbi static bool dwc3_core_is_valid(struct dwc3 *dwc) 68472246da4SFelipe Balbi { 68572246da4SFelipe Balbi u32 reg; 68672246da4SFelipe Balbi 6877650bd74SSebastian Andrzej Siewior reg = dwc3_readl(dwc->regs, DWC3_GSNPSID); 6880759956fSFelipe Balbi 6897650bd74SSebastian Andrzej Siewior /* This should read as U3 followed by revision number */ 690690fb371SJohn Youn if ((reg & DWC3_GSNPSID_MASK) == 0x55330000) { 691690fb371SJohn Youn /* Detected DWC_usb3 IP */ 692690fb371SJohn Youn dwc->revision = reg; 693690fb371SJohn Youn } else if ((reg & DWC3_GSNPSID_MASK) == 0x33310000) { 694690fb371SJohn Youn /* Detected DWC_usb31 IP */ 695690fb371SJohn Youn dwc->revision = dwc3_readl(dwc->regs, DWC3_VER_NUMBER); 696690fb371SJohn Youn dwc->revision |= DWC3_REVISION_IS_DWC31; 697690fb371SJohn Youn } else { 6980759956fSFelipe Balbi return false; 6997650bd74SSebastian Andrzej Siewior } 7007650bd74SSebastian Andrzej Siewior 7010759956fSFelipe Balbi return true; 7020e1e5c47SPaul Zimmerman } 7030e1e5c47SPaul Zimmerman 704941f918eSFelipe Balbi static void dwc3_core_setup_global_control(struct dwc3 *dwc) 70572246da4SFelipe Balbi { 70672246da4SFelipe Balbi u32 hwparams4 = dwc->hwparams.hwparams4; 70772246da4SFelipe Balbi u32 reg; 708c499ff71SFelipe Balbi 7094878a028SSebastian Andrzej Siewior reg = dwc3_readl(dwc->regs, DWC3_GCTL); 7103e87c42aSPaul Zimmerman reg &= ~DWC3_GCTL_SCALEDOWN_MASK; 7114878a028SSebastian Andrzej Siewior 712164d7731SSebastian Andrzej Siewior switch (DWC3_GHWPARAMS1_EN_PWROPT(dwc->hwparams.hwparams1)) { 7134878a028SSebastian Andrzej Siewior case DWC3_GHWPARAMS1_EN_PWROPT_CLK: 71432a4a135SFelipe Balbi /** 71532a4a135SFelipe Balbi * WORKAROUND: DWC3 revisions between 2.10a and 2.50a have an 71632a4a135SFelipe Balbi * issue which would cause xHCI compliance tests to fail. 71732a4a135SFelipe Balbi * 71832a4a135SFelipe Balbi * Because of that we cannot enable clock gating on such 71932a4a135SFelipe Balbi * configurations. 72032a4a135SFelipe Balbi * 72132a4a135SFelipe Balbi * Refers to: 72232a4a135SFelipe Balbi * 72332a4a135SFelipe Balbi * STAR#9000588375: Clock Gating, SOF Issues when ref_clk-Based 72432a4a135SFelipe Balbi * SOF/ITP Mode Used 72532a4a135SFelipe Balbi */ 72632a4a135SFelipe Balbi if ((dwc->dr_mode == USB_DR_MODE_HOST || 72732a4a135SFelipe Balbi dwc->dr_mode == USB_DR_MODE_OTG) && 72832a4a135SFelipe Balbi (dwc->revision >= DWC3_REVISION_210A && 72932a4a135SFelipe Balbi dwc->revision <= DWC3_REVISION_250A)) 73032a4a135SFelipe Balbi reg |= DWC3_GCTL_DSBLCLKGTNG | DWC3_GCTL_SOFITPSYNC; 73132a4a135SFelipe Balbi else 7324878a028SSebastian Andrzej Siewior reg &= ~DWC3_GCTL_DSBLCLKGTNG; 7334878a028SSebastian Andrzej Siewior break; 7340ffcaf37SFelipe Balbi case DWC3_GHWPARAMS1_EN_PWROPT_HIB: 7350ffcaf37SFelipe Balbi /* enable hibernation here */ 7360ffcaf37SFelipe Balbi dwc->nr_scratch = DWC3_GHWPARAMS4_HIBER_SCRATCHBUFS(hwparams4); 7372eac3992SHuang Rui 7382eac3992SHuang Rui /* 7392eac3992SHuang Rui * REVISIT Enabling this bit so that host-mode hibernation 7402eac3992SHuang Rui * will work. Device-mode hibernation is not yet implemented. 7412eac3992SHuang Rui */ 7422eac3992SHuang Rui reg |= DWC3_GCTL_GBLHIBERNATIONEN; 7430ffcaf37SFelipe Balbi break; 7444878a028SSebastian Andrzej Siewior default: 7455eb30cedSFelipe Balbi /* nothing */ 7465eb30cedSFelipe Balbi break; 7474878a028SSebastian Andrzej Siewior } 7484878a028SSebastian Andrzej Siewior 749946bd579SHuang Rui /* check if current dwc3 is on simulation board */ 750946bd579SHuang Rui if (dwc->hwparams.hwparams6 & DWC3_GHWPARAMS6_EN_FPGA) { 7515eb30cedSFelipe Balbi dev_info(dwc->dev, "Running with FPGA optmizations\n"); 752946bd579SHuang Rui dwc->is_fpga = true; 753946bd579SHuang Rui } 754946bd579SHuang Rui 7553b81221aSHuang Rui WARN_ONCE(dwc->disable_scramble_quirk && !dwc->is_fpga, 7563b81221aSHuang Rui "disable_scramble cannot be used on non-FPGA builds\n"); 7573b81221aSHuang Rui 7583b81221aSHuang Rui if (dwc->disable_scramble_quirk && dwc->is_fpga) 7593b81221aSHuang Rui reg |= DWC3_GCTL_DISSCRAMBLE; 7603b81221aSHuang Rui else 7613b81221aSHuang Rui reg &= ~DWC3_GCTL_DISSCRAMBLE; 7623b81221aSHuang Rui 7639a5b2f31SHuang Rui if (dwc->u2exit_lfps_quirk) 7649a5b2f31SHuang Rui reg |= DWC3_GCTL_U2EXIT_LFPS; 7659a5b2f31SHuang Rui 7664878a028SSebastian Andrzej Siewior /* 7674878a028SSebastian Andrzej Siewior * WORKAROUND: DWC3 revisions <1.90a have a bug 7681d046793SPaul Zimmerman * where the device can fail to connect at SuperSpeed 7694878a028SSebastian Andrzej Siewior * and falls back to high-speed mode which causes 7701d046793SPaul Zimmerman * the device to enter a Connect/Disconnect loop 7714878a028SSebastian Andrzej Siewior */ 7724878a028SSebastian Andrzej Siewior if (dwc->revision < DWC3_REVISION_190A) 7734878a028SSebastian Andrzej Siewior reg |= DWC3_GCTL_U2RSTECN; 7744878a028SSebastian Andrzej Siewior 7754878a028SSebastian Andrzej Siewior dwc3_writel(dwc->regs, DWC3_GCTL, reg); 776941f918eSFelipe Balbi } 7774878a028SSebastian Andrzej Siewior 778f54edb53SFelipe Balbi static int dwc3_core_get_phy(struct dwc3 *dwc); 77998112041SRoger Quadros static int dwc3_core_ulpi_init(struct dwc3 *dwc); 780f54edb53SFelipe Balbi 781941f918eSFelipe Balbi /** 782941f918eSFelipe Balbi * dwc3_core_init - Low-level initialization of DWC3 Core 783941f918eSFelipe Balbi * @dwc: Pointer to our controller context structure 784941f918eSFelipe Balbi * 785941f918eSFelipe Balbi * Returns 0 on success otherwise negative errno. 786941f918eSFelipe Balbi */ 787941f918eSFelipe Balbi static int dwc3_core_init(struct dwc3 *dwc) 788941f918eSFelipe Balbi { 789941f918eSFelipe Balbi u32 reg; 790941f918eSFelipe Balbi int ret; 791941f918eSFelipe Balbi 792941f918eSFelipe Balbi if (!dwc3_core_is_valid(dwc)) { 793941f918eSFelipe Balbi dev_err(dwc->dev, "this is not a DesignWare USB3 DRD Core\n"); 794941f918eSFelipe Balbi ret = -ENODEV; 795941f918eSFelipe Balbi goto err0; 796941f918eSFelipe Balbi } 797941f918eSFelipe Balbi 798941f918eSFelipe Balbi /* 799941f918eSFelipe Balbi * Write Linux Version Code to our GUID register so it's easy to figure 800941f918eSFelipe Balbi * out which kernel version a bug was found. 801941f918eSFelipe Balbi */ 802941f918eSFelipe Balbi dwc3_writel(dwc->regs, DWC3_GUID, LINUX_VERSION_CODE); 803941f918eSFelipe Balbi 804941f918eSFelipe Balbi /* Handle USB2.0-only core configuration */ 805941f918eSFelipe Balbi if (DWC3_GHWPARAMS3_SSPHY_IFC(dwc->hwparams.hwparams3) == 806941f918eSFelipe Balbi DWC3_GHWPARAMS3_SSPHY_IFC_DIS) { 807941f918eSFelipe Balbi if (dwc->maximum_speed == USB_SPEED_SUPER) 808941f918eSFelipe Balbi dwc->maximum_speed = USB_SPEED_HIGH; 809941f918eSFelipe Balbi } 810941f918eSFelipe Balbi 811941f918eSFelipe Balbi ret = dwc3_phy_setup(dwc); 812941f918eSFelipe Balbi if (ret) 813941f918eSFelipe Balbi goto err0; 814941f918eSFelipe Balbi 81598112041SRoger Quadros if (!dwc->ulpi_ready) { 81698112041SRoger Quadros ret = dwc3_core_ulpi_init(dwc); 81798112041SRoger Quadros if (ret) 81898112041SRoger Quadros goto err0; 81998112041SRoger Quadros dwc->ulpi_ready = true; 82098112041SRoger Quadros } 82198112041SRoger Quadros 82298112041SRoger Quadros if (!dwc->phys_ready) { 82398112041SRoger Quadros ret = dwc3_core_get_phy(dwc); 82498112041SRoger Quadros if (ret) 82598112041SRoger Quadros goto err0a; 82698112041SRoger Quadros dwc->phys_ready = true; 82798112041SRoger Quadros } 82898112041SRoger Quadros 82998112041SRoger Quadros ret = dwc3_core_soft_reset(dwc); 83098112041SRoger Quadros if (ret) 83198112041SRoger Quadros goto err0a; 83298112041SRoger Quadros 833941f918eSFelipe Balbi dwc3_core_setup_global_control(dwc); 834c499ff71SFelipe Balbi dwc3_core_num_eps(dwc); 8350ffcaf37SFelipe Balbi 8360ffcaf37SFelipe Balbi ret = dwc3_setup_scratch_buffers(dwc); 8370ffcaf37SFelipe Balbi if (ret) 838c499ff71SFelipe Balbi goto err1; 839c499ff71SFelipe Balbi 840c499ff71SFelipe Balbi /* Adjust Frame Length */ 841c499ff71SFelipe Balbi dwc3_frame_length_adjustment(dwc); 842c499ff71SFelipe Balbi 843c499ff71SFelipe Balbi usb_phy_set_suspend(dwc->usb2_phy, 0); 844c499ff71SFelipe Balbi usb_phy_set_suspend(dwc->usb3_phy, 0); 845c499ff71SFelipe Balbi ret = phy_power_on(dwc->usb2_generic_phy); 846c499ff71SFelipe Balbi if (ret < 0) 8470ffcaf37SFelipe Balbi goto err2; 8480ffcaf37SFelipe Balbi 849c499ff71SFelipe Balbi ret = phy_power_on(dwc->usb3_generic_phy); 850c499ff71SFelipe Balbi if (ret < 0) 851c499ff71SFelipe Balbi goto err3; 852c499ff71SFelipe Balbi 853c499ff71SFelipe Balbi ret = dwc3_event_buffers_setup(dwc); 854c499ff71SFelipe Balbi if (ret) { 855c499ff71SFelipe Balbi dev_err(dwc->dev, "failed to setup event buffers\n"); 856c499ff71SFelipe Balbi goto err4; 857c499ff71SFelipe Balbi } 858c499ff71SFelipe Balbi 85906281d46SJohn Youn /* 86006281d46SJohn Youn * ENDXFER polling is available on version 3.10a and later of 86106281d46SJohn Youn * the DWC_usb3 controller. It is NOT available in the 86206281d46SJohn Youn * DWC_usb31 controller. 86306281d46SJohn Youn */ 86406281d46SJohn Youn if (!dwc3_is_usb31(dwc) && dwc->revision >= DWC3_REVISION_310A) { 86506281d46SJohn Youn reg = dwc3_readl(dwc->regs, DWC3_GUCTL2); 86606281d46SJohn Youn reg |= DWC3_GUCTL2_RST_ACTBITLATER; 86706281d46SJohn Youn dwc3_writel(dwc->regs, DWC3_GUCTL2, reg); 86806281d46SJohn Youn } 86906281d46SJohn Youn 87065db7a0cSWilliam Wu if (dwc->revision >= DWC3_REVISION_250A) { 8710bb39ca1SJohn Youn reg = dwc3_readl(dwc->regs, DWC3_GUCTL1); 87265db7a0cSWilliam Wu 87365db7a0cSWilliam Wu /* 87465db7a0cSWilliam Wu * Enable hardware control of sending remote wakeup 87565db7a0cSWilliam Wu * in HS when the device is in the L1 state. 87665db7a0cSWilliam Wu */ 87765db7a0cSWilliam Wu if (dwc->revision >= DWC3_REVISION_290A) 8780bb39ca1SJohn Youn reg |= DWC3_GUCTL1_DEV_L1_EXIT_BY_HW; 87965db7a0cSWilliam Wu 88065db7a0cSWilliam Wu if (dwc->dis_tx_ipgap_linecheck_quirk) 88165db7a0cSWilliam Wu reg |= DWC3_GUCTL1_TX_IPGAP_LINECHECK_DIS; 88265db7a0cSWilliam Wu 8830bb39ca1SJohn Youn dwc3_writel(dwc->regs, DWC3_GUCTL1, reg); 8840bb39ca1SJohn Youn } 8850bb39ca1SJohn Youn 886938a5ad1SThinh Nguyen /* 887938a5ad1SThinh Nguyen * Must config both number of packets and max burst settings to enable 888938a5ad1SThinh Nguyen * RX and/or TX threshold. 889938a5ad1SThinh Nguyen */ 890938a5ad1SThinh Nguyen if (dwc3_is_usb31(dwc) && dwc->dr_mode == USB_DR_MODE_HOST) { 891938a5ad1SThinh Nguyen u8 rx_thr_num = dwc->rx_thr_num_pkt_prd; 892938a5ad1SThinh Nguyen u8 rx_maxburst = dwc->rx_max_burst_prd; 893938a5ad1SThinh Nguyen u8 tx_thr_num = dwc->tx_thr_num_pkt_prd; 894938a5ad1SThinh Nguyen u8 tx_maxburst = dwc->tx_max_burst_prd; 895938a5ad1SThinh Nguyen 896938a5ad1SThinh Nguyen if (rx_thr_num && rx_maxburst) { 897938a5ad1SThinh Nguyen reg = dwc3_readl(dwc->regs, DWC3_GRXTHRCFG); 898938a5ad1SThinh Nguyen reg |= DWC31_RXTHRNUMPKTSEL_PRD; 899938a5ad1SThinh Nguyen 900938a5ad1SThinh Nguyen reg &= ~DWC31_RXTHRNUMPKT_PRD(~0); 901938a5ad1SThinh Nguyen reg |= DWC31_RXTHRNUMPKT_PRD(rx_thr_num); 902938a5ad1SThinh Nguyen 903938a5ad1SThinh Nguyen reg &= ~DWC31_MAXRXBURSTSIZE_PRD(~0); 904938a5ad1SThinh Nguyen reg |= DWC31_MAXRXBURSTSIZE_PRD(rx_maxburst); 905938a5ad1SThinh Nguyen 906938a5ad1SThinh Nguyen dwc3_writel(dwc->regs, DWC3_GRXTHRCFG, reg); 907938a5ad1SThinh Nguyen } 908938a5ad1SThinh Nguyen 909938a5ad1SThinh Nguyen if (tx_thr_num && tx_maxburst) { 910938a5ad1SThinh Nguyen reg = dwc3_readl(dwc->regs, DWC3_GTXTHRCFG); 911938a5ad1SThinh Nguyen reg |= DWC31_TXTHRNUMPKTSEL_PRD; 912938a5ad1SThinh Nguyen 913938a5ad1SThinh Nguyen reg &= ~DWC31_TXTHRNUMPKT_PRD(~0); 914938a5ad1SThinh Nguyen reg |= DWC31_TXTHRNUMPKT_PRD(tx_thr_num); 915938a5ad1SThinh Nguyen 916938a5ad1SThinh Nguyen reg &= ~DWC31_MAXTXBURSTSIZE_PRD(~0); 917938a5ad1SThinh Nguyen reg |= DWC31_MAXTXBURSTSIZE_PRD(tx_maxburst); 918938a5ad1SThinh Nguyen 919938a5ad1SThinh Nguyen dwc3_writel(dwc->regs, DWC3_GTXTHRCFG, reg); 920938a5ad1SThinh Nguyen } 921938a5ad1SThinh Nguyen } 922938a5ad1SThinh Nguyen 92372246da4SFelipe Balbi return 0; 92472246da4SFelipe Balbi 925c499ff71SFelipe Balbi err4: 9269b9d7cddSVivek Gautam phy_power_off(dwc->usb3_generic_phy); 927c499ff71SFelipe Balbi 928c499ff71SFelipe Balbi err3: 9299b9d7cddSVivek Gautam phy_power_off(dwc->usb2_generic_phy); 930c499ff71SFelipe Balbi 9310ffcaf37SFelipe Balbi err2: 932c499ff71SFelipe Balbi usb_phy_set_suspend(dwc->usb2_phy, 1); 933c499ff71SFelipe Balbi usb_phy_set_suspend(dwc->usb3_phy, 1); 9340ffcaf37SFelipe Balbi 9350ffcaf37SFelipe Balbi err1: 9360ffcaf37SFelipe Balbi usb_phy_shutdown(dwc->usb2_phy); 9370ffcaf37SFelipe Balbi usb_phy_shutdown(dwc->usb3_phy); 93857303488SKishon Vijay Abraham I phy_exit(dwc->usb2_generic_phy); 93957303488SKishon Vijay Abraham I phy_exit(dwc->usb3_generic_phy); 9400ffcaf37SFelipe Balbi 94198112041SRoger Quadros err0a: 94298112041SRoger Quadros dwc3_ulpi_exit(dwc); 94398112041SRoger Quadros 94472246da4SFelipe Balbi err0: 94572246da4SFelipe Balbi return ret; 94672246da4SFelipe Balbi } 94772246da4SFelipe Balbi 9483c9f94acSFelipe Balbi static int dwc3_core_get_phy(struct dwc3 *dwc) 94972246da4SFelipe Balbi { 9503c9f94acSFelipe Balbi struct device *dev = dwc->dev; 951941ea361SFelipe Balbi struct device_node *node = dev->of_node; 9523c9f94acSFelipe Balbi int ret; 95372246da4SFelipe Balbi 9545088b6f5SKishon Vijay Abraham I if (node) { 9555088b6f5SKishon Vijay Abraham I dwc->usb2_phy = devm_usb_get_phy_by_phandle(dev, "usb-phy", 0); 9565088b6f5SKishon Vijay Abraham I dwc->usb3_phy = devm_usb_get_phy_by_phandle(dev, "usb-phy", 1); 957bb674907SFelipe Balbi } else { 958bb674907SFelipe Balbi dwc->usb2_phy = devm_usb_get_phy(dev, USB_PHY_TYPE_USB2); 959bb674907SFelipe Balbi dwc->usb3_phy = devm_usb_get_phy(dev, USB_PHY_TYPE_USB3); 9605088b6f5SKishon Vijay Abraham I } 9615088b6f5SKishon Vijay Abraham I 962d105e7f8SFelipe Balbi if (IS_ERR(dwc->usb2_phy)) { 963d105e7f8SFelipe Balbi ret = PTR_ERR(dwc->usb2_phy); 964122f06e6SKishon Vijay Abraham I if (ret == -ENXIO || ret == -ENODEV) { 965122f06e6SKishon Vijay Abraham I dwc->usb2_phy = NULL; 966122f06e6SKishon Vijay Abraham I } else if (ret == -EPROBE_DEFER) { 967d105e7f8SFelipe Balbi return ret; 968122f06e6SKishon Vijay Abraham I } else { 96951e1e7bcSFelipe Balbi dev_err(dev, "no usb2 phy configured\n"); 970122f06e6SKishon Vijay Abraham I return ret; 971122f06e6SKishon Vijay Abraham I } 97251e1e7bcSFelipe Balbi } 97351e1e7bcSFelipe Balbi 974d105e7f8SFelipe Balbi if (IS_ERR(dwc->usb3_phy)) { 975315955d7SRuchika Kharwar ret = PTR_ERR(dwc->usb3_phy); 976122f06e6SKishon Vijay Abraham I if (ret == -ENXIO || ret == -ENODEV) { 977122f06e6SKishon Vijay Abraham I dwc->usb3_phy = NULL; 978122f06e6SKishon Vijay Abraham I } else if (ret == -EPROBE_DEFER) { 979d105e7f8SFelipe Balbi return ret; 980122f06e6SKishon Vijay Abraham I } else { 98151e1e7bcSFelipe Balbi dev_err(dev, "no usb3 phy configured\n"); 982122f06e6SKishon Vijay Abraham I return ret; 983122f06e6SKishon Vijay Abraham I } 98451e1e7bcSFelipe Balbi } 98551e1e7bcSFelipe Balbi 98657303488SKishon Vijay Abraham I dwc->usb2_generic_phy = devm_phy_get(dev, "usb2-phy"); 98757303488SKishon Vijay Abraham I if (IS_ERR(dwc->usb2_generic_phy)) { 98857303488SKishon Vijay Abraham I ret = PTR_ERR(dwc->usb2_generic_phy); 98957303488SKishon Vijay Abraham I if (ret == -ENOSYS || ret == -ENODEV) { 99057303488SKishon Vijay Abraham I dwc->usb2_generic_phy = NULL; 99157303488SKishon Vijay Abraham I } else if (ret == -EPROBE_DEFER) { 99257303488SKishon Vijay Abraham I return ret; 99357303488SKishon Vijay Abraham I } else { 99457303488SKishon Vijay Abraham I dev_err(dev, "no usb2 phy configured\n"); 99557303488SKishon Vijay Abraham I return ret; 99657303488SKishon Vijay Abraham I } 99757303488SKishon Vijay Abraham I } 99857303488SKishon Vijay Abraham I 99957303488SKishon Vijay Abraham I dwc->usb3_generic_phy = devm_phy_get(dev, "usb3-phy"); 100057303488SKishon Vijay Abraham I if (IS_ERR(dwc->usb3_generic_phy)) { 100157303488SKishon Vijay Abraham I ret = PTR_ERR(dwc->usb3_generic_phy); 100257303488SKishon Vijay Abraham I if (ret == -ENOSYS || ret == -ENODEV) { 100357303488SKishon Vijay Abraham I dwc->usb3_generic_phy = NULL; 100457303488SKishon Vijay Abraham I } else if (ret == -EPROBE_DEFER) { 100557303488SKishon Vijay Abraham I return ret; 100657303488SKishon Vijay Abraham I } else { 100757303488SKishon Vijay Abraham I dev_err(dev, "no usb3 phy configured\n"); 100857303488SKishon Vijay Abraham I return ret; 100957303488SKishon Vijay Abraham I } 101057303488SKishon Vijay Abraham I } 101157303488SKishon Vijay Abraham I 10123c9f94acSFelipe Balbi return 0; 10133c9f94acSFelipe Balbi } 10143c9f94acSFelipe Balbi 10155f94adfeSFelipe Balbi static int dwc3_core_init_mode(struct dwc3 *dwc) 10165f94adfeSFelipe Balbi { 10175f94adfeSFelipe Balbi struct device *dev = dwc->dev; 10185f94adfeSFelipe Balbi int ret; 10195f94adfeSFelipe Balbi 10205f94adfeSFelipe Balbi switch (dwc->dr_mode) { 10215f94adfeSFelipe Balbi case USB_DR_MODE_PERIPHERAL: 102241ce1456SRoger Quadros dwc3_set_prtcap(dwc, DWC3_GCTL_PRTCAP_DEVICE); 1023958d1a4cSFelipe Balbi 1024958d1a4cSFelipe Balbi if (dwc->usb2_phy) 1025958d1a4cSFelipe Balbi otg_set_vbus(dwc->usb2_phy->otg, false); 1026958d1a4cSFelipe Balbi phy_set_mode(dwc->usb2_generic_phy, PHY_MODE_USB_DEVICE); 1027644cbbc3SManu Gautam phy_set_mode(dwc->usb3_generic_phy, PHY_MODE_USB_DEVICE); 1028958d1a4cSFelipe Balbi 10295f94adfeSFelipe Balbi ret = dwc3_gadget_init(dwc); 10305f94adfeSFelipe Balbi if (ret) { 10319522def4SRoger Quadros if (ret != -EPROBE_DEFER) 10325f94adfeSFelipe Balbi dev_err(dev, "failed to initialize gadget\n"); 10335f94adfeSFelipe Balbi return ret; 10345f94adfeSFelipe Balbi } 10355f94adfeSFelipe Balbi break; 10365f94adfeSFelipe Balbi case USB_DR_MODE_HOST: 103741ce1456SRoger Quadros dwc3_set_prtcap(dwc, DWC3_GCTL_PRTCAP_HOST); 1038958d1a4cSFelipe Balbi 1039958d1a4cSFelipe Balbi if (dwc->usb2_phy) 1040958d1a4cSFelipe Balbi otg_set_vbus(dwc->usb2_phy->otg, true); 1041958d1a4cSFelipe Balbi phy_set_mode(dwc->usb2_generic_phy, PHY_MODE_USB_HOST); 1042644cbbc3SManu Gautam phy_set_mode(dwc->usb3_generic_phy, PHY_MODE_USB_HOST); 1043958d1a4cSFelipe Balbi 10445f94adfeSFelipe Balbi ret = dwc3_host_init(dwc); 10455f94adfeSFelipe Balbi if (ret) { 10469522def4SRoger Quadros if (ret != -EPROBE_DEFER) 10475f94adfeSFelipe Balbi dev_err(dev, "failed to initialize host\n"); 10485f94adfeSFelipe Balbi return ret; 10495f94adfeSFelipe Balbi } 1050d8c80bb3SVivek Gautam phy_calibrate(dwc->usb2_generic_phy); 10515f94adfeSFelipe Balbi break; 10525f94adfeSFelipe Balbi case USB_DR_MODE_OTG: 105341ce1456SRoger Quadros INIT_WORK(&dwc->drd_work, __dwc3_set_mode); 10549840354fSRoger Quadros ret = dwc3_drd_init(dwc); 10559840354fSRoger Quadros if (ret) { 10569840354fSRoger Quadros if (ret != -EPROBE_DEFER) 10579840354fSRoger Quadros dev_err(dev, "failed to initialize dual-role\n"); 10589840354fSRoger Quadros return ret; 10599840354fSRoger Quadros } 10605f94adfeSFelipe Balbi break; 10615f94adfeSFelipe Balbi default: 10625f94adfeSFelipe Balbi dev_err(dev, "Unsupported mode of operation %d\n", dwc->dr_mode); 10635f94adfeSFelipe Balbi return -EINVAL; 10645f94adfeSFelipe Balbi } 10655f94adfeSFelipe Balbi 10665f94adfeSFelipe Balbi return 0; 10675f94adfeSFelipe Balbi } 10685f94adfeSFelipe Balbi 10695f94adfeSFelipe Balbi static void dwc3_core_exit_mode(struct dwc3 *dwc) 10705f94adfeSFelipe Balbi { 10715f94adfeSFelipe Balbi switch (dwc->dr_mode) { 10725f94adfeSFelipe Balbi case USB_DR_MODE_PERIPHERAL: 10735f94adfeSFelipe Balbi dwc3_gadget_exit(dwc); 10745f94adfeSFelipe Balbi break; 10755f94adfeSFelipe Balbi case USB_DR_MODE_HOST: 10765f94adfeSFelipe Balbi dwc3_host_exit(dwc); 10775f94adfeSFelipe Balbi break; 10785f94adfeSFelipe Balbi case USB_DR_MODE_OTG: 10799840354fSRoger Quadros dwc3_drd_exit(dwc); 10805f94adfeSFelipe Balbi break; 10815f94adfeSFelipe Balbi default: 10825f94adfeSFelipe Balbi /* do nothing */ 10835f94adfeSFelipe Balbi break; 10845f94adfeSFelipe Balbi } 10855f94adfeSFelipe Balbi } 10865f94adfeSFelipe Balbi 1087c5ac6116SFelipe Balbi static void dwc3_get_properties(struct dwc3 *dwc) 10883c9f94acSFelipe Balbi { 1089c5ac6116SFelipe Balbi struct device *dev = dwc->dev; 109080caf7d2SHuang Rui u8 lpm_nyet_threshold; 10916b6a0c9aSHuang Rui u8 tx_de_emphasis; 1092460d098cSHuang Rui u8 hird_threshold; 1093938a5ad1SThinh Nguyen u8 rx_thr_num_pkt_prd; 1094938a5ad1SThinh Nguyen u8 rx_max_burst_prd; 1095938a5ad1SThinh Nguyen u8 tx_thr_num_pkt_prd; 1096938a5ad1SThinh Nguyen u8 tx_max_burst_prd; 10973c9f94acSFelipe Balbi 109880caf7d2SHuang Rui /* default to highest possible threshold */ 109980caf7d2SHuang Rui lpm_nyet_threshold = 0xff; 110080caf7d2SHuang Rui 11016b6a0c9aSHuang Rui /* default to -3.5dB de-emphasis */ 11026b6a0c9aSHuang Rui tx_de_emphasis = 1; 11036b6a0c9aSHuang Rui 1104460d098cSHuang Rui /* 1105460d098cSHuang Rui * default to assert utmi_sleep_n and use maximum allowed HIRD 1106460d098cSHuang Rui * threshold value of 0b1100 1107460d098cSHuang Rui */ 1108460d098cSHuang Rui hird_threshold = 12; 1109460d098cSHuang Rui 111063863b98SHeikki Krogerus dwc->maximum_speed = usb_get_maximum_speed(dev); 111106e7114fSHeikki Krogerus dwc->dr_mode = usb_get_dr_mode(dev); 111232f2ed86SWilliam Wu dwc->hsphy_mode = of_usb_get_phy_mode(dev->of_node); 111363863b98SHeikki Krogerus 1114d64ff406SArnd Bergmann dwc->sysdev_is_parent = device_property_read_bool(dev, 1115d64ff406SArnd Bergmann "linux,sysdev_is_parent"); 1116d64ff406SArnd Bergmann if (dwc->sysdev_is_parent) 1117d64ff406SArnd Bergmann dwc->sysdev = dwc->dev->parent; 1118d64ff406SArnd Bergmann else 1119d64ff406SArnd Bergmann dwc->sysdev = dwc->dev; 1120d64ff406SArnd Bergmann 11213d128919SHeikki Krogerus dwc->has_lpm_erratum = device_property_read_bool(dev, 112280caf7d2SHuang Rui "snps,has-lpm-erratum"); 11233d128919SHeikki Krogerus device_property_read_u8(dev, "snps,lpm-nyet-threshold", 112480caf7d2SHuang Rui &lpm_nyet_threshold); 11253d128919SHeikki Krogerus dwc->is_utmi_l1_suspend = device_property_read_bool(dev, 1126460d098cSHuang Rui "snps,is-utmi-l1-suspend"); 11273d128919SHeikki Krogerus device_property_read_u8(dev, "snps,hird-threshold", 1128460d098cSHuang Rui &hird_threshold); 11293d128919SHeikki Krogerus dwc->usb3_lpm_capable = device_property_read_bool(dev, 1130eac68e8fSRobert Baldyga "snps,usb3_lpm_capable"); 1131938a5ad1SThinh Nguyen device_property_read_u8(dev, "snps,rx-thr-num-pkt-prd", 1132938a5ad1SThinh Nguyen &rx_thr_num_pkt_prd); 1133938a5ad1SThinh Nguyen device_property_read_u8(dev, "snps,rx-max-burst-prd", 1134938a5ad1SThinh Nguyen &rx_max_burst_prd); 1135938a5ad1SThinh Nguyen device_property_read_u8(dev, "snps,tx-thr-num-pkt-prd", 1136938a5ad1SThinh Nguyen &tx_thr_num_pkt_prd); 1137938a5ad1SThinh Nguyen device_property_read_u8(dev, "snps,tx-max-burst-prd", 1138938a5ad1SThinh Nguyen &tx_max_burst_prd); 11393c9f94acSFelipe Balbi 11403d128919SHeikki Krogerus dwc->disable_scramble_quirk = device_property_read_bool(dev, 11413b81221aSHuang Rui "snps,disable_scramble_quirk"); 11423d128919SHeikki Krogerus dwc->u2exit_lfps_quirk = device_property_read_bool(dev, 11439a5b2f31SHuang Rui "snps,u2exit_lfps_quirk"); 11443d128919SHeikki Krogerus dwc->u2ss_inp3_quirk = device_property_read_bool(dev, 1145b5a65c40SHuang Rui "snps,u2ss_inp3_quirk"); 11463d128919SHeikki Krogerus dwc->req_p1p2p3_quirk = device_property_read_bool(dev, 1147df31f5b3SHuang Rui "snps,req_p1p2p3_quirk"); 11483d128919SHeikki Krogerus dwc->del_p1p2p3_quirk = device_property_read_bool(dev, 1149a2a1d0f5SHuang Rui "snps,del_p1p2p3_quirk"); 11503d128919SHeikki Krogerus dwc->del_phy_power_chg_quirk = device_property_read_bool(dev, 115141c06ffdSHuang Rui "snps,del_phy_power_chg_quirk"); 11523d128919SHeikki Krogerus dwc->lfps_filter_quirk = device_property_read_bool(dev, 1153fb67afcaSHuang Rui "snps,lfps_filter_quirk"); 11543d128919SHeikki Krogerus dwc->rx_detect_poll_quirk = device_property_read_bool(dev, 115514f4ac53SHuang Rui "snps,rx_detect_poll_quirk"); 11563d128919SHeikki Krogerus dwc->dis_u3_susphy_quirk = device_property_read_bool(dev, 115759acfa20SHuang Rui "snps,dis_u3_susphy_quirk"); 11583d128919SHeikki Krogerus dwc->dis_u2_susphy_quirk = device_property_read_bool(dev, 11590effe0a3SHuang Rui "snps,dis_u2_susphy_quirk"); 1160ec791d14SJohn Youn dwc->dis_enblslpm_quirk = device_property_read_bool(dev, 1161ec791d14SJohn Youn "snps,dis_enblslpm_quirk"); 1162e58dd357SRajesh Bhagat dwc->dis_rxdet_inp3_quirk = device_property_read_bool(dev, 1163e58dd357SRajesh Bhagat "snps,dis_rxdet_inp3_quirk"); 116416199f33SWilliam Wu dwc->dis_u2_freeclk_exists_quirk = device_property_read_bool(dev, 116516199f33SWilliam Wu "snps,dis-u2-freeclk-exists-quirk"); 116600fe081dSWilliam Wu dwc->dis_del_phy_power_chg_quirk = device_property_read_bool(dev, 116700fe081dSWilliam Wu "snps,dis-del-phy-power-chg-quirk"); 116865db7a0cSWilliam Wu dwc->dis_tx_ipgap_linecheck_quirk = device_property_read_bool(dev, 116965db7a0cSWilliam Wu "snps,dis-tx-ipgap-linecheck-quirk"); 11706b6a0c9aSHuang Rui 11713d128919SHeikki Krogerus dwc->tx_de_emphasis_quirk = device_property_read_bool(dev, 11726b6a0c9aSHuang Rui "snps,tx_de_emphasis_quirk"); 11733d128919SHeikki Krogerus device_property_read_u8(dev, "snps,tx_de_emphasis", 11746b6a0c9aSHuang Rui &tx_de_emphasis); 11753d128919SHeikki Krogerus device_property_read_string(dev, "snps,hsphy_interface", 11763e10a2ceSHeikki Krogerus &dwc->hsphy_interface); 11773d128919SHeikki Krogerus device_property_read_u32(dev, "snps,quirk-frame-length-adjustment", 1178bcdb3272SFelipe Balbi &dwc->fladj); 11793d128919SHeikki Krogerus 118042bf02ecSRoger Quadros dwc->dis_metastability_quirk = device_property_read_bool(dev, 118142bf02ecSRoger Quadros "snps,dis_metastability_quirk"); 118242bf02ecSRoger Quadros 118380caf7d2SHuang Rui dwc->lpm_nyet_threshold = lpm_nyet_threshold; 11846b6a0c9aSHuang Rui dwc->tx_de_emphasis = tx_de_emphasis; 118580caf7d2SHuang Rui 1186460d098cSHuang Rui dwc->hird_threshold = hird_threshold 1187460d098cSHuang Rui | (dwc->is_utmi_l1_suspend << 4); 1188460d098cSHuang Rui 1189938a5ad1SThinh Nguyen dwc->rx_thr_num_pkt_prd = rx_thr_num_pkt_prd; 1190938a5ad1SThinh Nguyen dwc->rx_max_burst_prd = rx_max_burst_prd; 1191938a5ad1SThinh Nguyen 1192938a5ad1SThinh Nguyen dwc->tx_thr_num_pkt_prd = tx_thr_num_pkt_prd; 1193938a5ad1SThinh Nguyen dwc->tx_max_burst_prd = tx_max_burst_prd; 1194938a5ad1SThinh Nguyen 1195cf40b86bSJohn Youn dwc->imod_interval = 0; 1196cf40b86bSJohn Youn } 1197cf40b86bSJohn Youn 1198cf40b86bSJohn Youn /* check whether the core supports IMOD */ 1199cf40b86bSJohn Youn bool dwc3_has_imod(struct dwc3 *dwc) 1200cf40b86bSJohn Youn { 1201cf40b86bSJohn Youn return ((dwc3_is_usb3(dwc) && 1202cf40b86bSJohn Youn dwc->revision >= DWC3_REVISION_300A) || 1203cf40b86bSJohn Youn (dwc3_is_usb31(dwc) && 1204cf40b86bSJohn Youn dwc->revision >= DWC3_USB31_REVISION_120A)); 1205c5ac6116SFelipe Balbi } 1206c5ac6116SFelipe Balbi 12077ac51a12SJohn Youn static void dwc3_check_params(struct dwc3 *dwc) 12087ac51a12SJohn Youn { 12097ac51a12SJohn Youn struct device *dev = dwc->dev; 12107ac51a12SJohn Youn 1211cf40b86bSJohn Youn /* Check for proper value of imod_interval */ 1212cf40b86bSJohn Youn if (dwc->imod_interval && !dwc3_has_imod(dwc)) { 1213cf40b86bSJohn Youn dev_warn(dwc->dev, "Interrupt moderation not supported\n"); 1214cf40b86bSJohn Youn dwc->imod_interval = 0; 1215cf40b86bSJohn Youn } 1216cf40b86bSJohn Youn 121728632b44SJohn Youn /* 121828632b44SJohn Youn * Workaround for STAR 9000961433 which affects only version 121928632b44SJohn Youn * 3.00a of the DWC_usb3 core. This prevents the controller 122028632b44SJohn Youn * interrupt from being masked while handling events. IMOD 122128632b44SJohn Youn * allows us to work around this issue. Enable it for the 122228632b44SJohn Youn * affected version. 122328632b44SJohn Youn */ 122428632b44SJohn Youn if (!dwc->imod_interval && 122528632b44SJohn Youn (dwc->revision == DWC3_REVISION_300A)) 122628632b44SJohn Youn dwc->imod_interval = 1; 122728632b44SJohn Youn 12287ac51a12SJohn Youn /* Check the maximum_speed parameter */ 12297ac51a12SJohn Youn switch (dwc->maximum_speed) { 12307ac51a12SJohn Youn case USB_SPEED_LOW: 12317ac51a12SJohn Youn case USB_SPEED_FULL: 12327ac51a12SJohn Youn case USB_SPEED_HIGH: 12337ac51a12SJohn Youn case USB_SPEED_SUPER: 12347ac51a12SJohn Youn case USB_SPEED_SUPER_PLUS: 12357ac51a12SJohn Youn break; 12367ac51a12SJohn Youn default: 12377ac51a12SJohn Youn dev_err(dev, "invalid maximum_speed parameter %d\n", 12387ac51a12SJohn Youn dwc->maximum_speed); 12397ac51a12SJohn Youn /* fall through */ 12407ac51a12SJohn Youn case USB_SPEED_UNKNOWN: 12417ac51a12SJohn Youn /* default to superspeed */ 12427ac51a12SJohn Youn dwc->maximum_speed = USB_SPEED_SUPER; 12437ac51a12SJohn Youn 12447ac51a12SJohn Youn /* 12457ac51a12SJohn Youn * default to superspeed plus if we are capable. 12467ac51a12SJohn Youn */ 12477ac51a12SJohn Youn if (dwc3_is_usb31(dwc) && 12487ac51a12SJohn Youn (DWC3_GHWPARAMS3_SSPHY_IFC(dwc->hwparams.hwparams3) == 12497ac51a12SJohn Youn DWC3_GHWPARAMS3_SSPHY_IFC_GEN2)) 12507ac51a12SJohn Youn dwc->maximum_speed = USB_SPEED_SUPER_PLUS; 12517ac51a12SJohn Youn 12527ac51a12SJohn Youn break; 12537ac51a12SJohn Youn } 12547ac51a12SJohn Youn } 12557ac51a12SJohn Youn 1256c5ac6116SFelipe Balbi static int dwc3_probe(struct platform_device *pdev) 1257c5ac6116SFelipe Balbi { 1258c5ac6116SFelipe Balbi struct device *dev = &pdev->dev; 125944feb8e6SMasahiro Yamada struct resource *res, dwc_res; 1260c5ac6116SFelipe Balbi struct dwc3 *dwc; 1261c5ac6116SFelipe Balbi 1262c5ac6116SFelipe Balbi int ret; 1263c5ac6116SFelipe Balbi 1264c5ac6116SFelipe Balbi void __iomem *regs; 1265c5ac6116SFelipe Balbi 1266c5ac6116SFelipe Balbi dwc = devm_kzalloc(dev, sizeof(*dwc), GFP_KERNEL); 1267c5ac6116SFelipe Balbi if (!dwc) 1268c5ac6116SFelipe Balbi return -ENOMEM; 1269c5ac6116SFelipe Balbi 1270*fe8abf33SMasahiro Yamada dwc->clks = devm_kmemdup(dev, dwc3_core_clks, sizeof(dwc3_core_clks), 1271*fe8abf33SMasahiro Yamada GFP_KERNEL); 1272*fe8abf33SMasahiro Yamada if (!dwc->clks) 1273*fe8abf33SMasahiro Yamada return -ENOMEM; 1274*fe8abf33SMasahiro Yamada 1275*fe8abf33SMasahiro Yamada dwc->num_clks = ARRAY_SIZE(dwc3_core_clks); 1276c5ac6116SFelipe Balbi dwc->dev = dev; 1277c5ac6116SFelipe Balbi 1278c5ac6116SFelipe Balbi res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1279c5ac6116SFelipe Balbi if (!res) { 1280c5ac6116SFelipe Balbi dev_err(dev, "missing memory resource\n"); 1281c5ac6116SFelipe Balbi return -ENODEV; 1282c5ac6116SFelipe Balbi } 1283c5ac6116SFelipe Balbi 1284c5ac6116SFelipe Balbi dwc->xhci_resources[0].start = res->start; 1285c5ac6116SFelipe Balbi dwc->xhci_resources[0].end = dwc->xhci_resources[0].start + 1286c5ac6116SFelipe Balbi DWC3_XHCI_REGS_END; 1287c5ac6116SFelipe Balbi dwc->xhci_resources[0].flags = res->flags; 1288c5ac6116SFelipe Balbi dwc->xhci_resources[0].name = res->name; 1289c5ac6116SFelipe Balbi 1290c5ac6116SFelipe Balbi /* 1291c5ac6116SFelipe Balbi * Request memory region but exclude xHCI regs, 1292c5ac6116SFelipe Balbi * since it will be requested by the xhci-plat driver. 1293c5ac6116SFelipe Balbi */ 129444feb8e6SMasahiro Yamada dwc_res = *res; 129544feb8e6SMasahiro Yamada dwc_res.start += DWC3_GLOBALS_REGS_START; 129644feb8e6SMasahiro Yamada 129744feb8e6SMasahiro Yamada regs = devm_ioremap_resource(dev, &dwc_res); 129844feb8e6SMasahiro Yamada if (IS_ERR(regs)) 129944feb8e6SMasahiro Yamada return PTR_ERR(regs); 1300c5ac6116SFelipe Balbi 1301c5ac6116SFelipe Balbi dwc->regs = regs; 130244feb8e6SMasahiro Yamada dwc->regs_size = resource_size(&dwc_res); 1303c5ac6116SFelipe Balbi 1304c5ac6116SFelipe Balbi dwc3_get_properties(dwc); 1305c5ac6116SFelipe Balbi 1306*fe8abf33SMasahiro Yamada dwc->reset = devm_reset_control_get_optional_shared(dev, NULL); 1307*fe8abf33SMasahiro Yamada if (IS_ERR(dwc->reset)) 1308*fe8abf33SMasahiro Yamada return PTR_ERR(dwc->reset); 1309*fe8abf33SMasahiro Yamada 1310*fe8abf33SMasahiro Yamada ret = clk_bulk_get(dev, dwc->num_clks, dwc->clks); 1311*fe8abf33SMasahiro Yamada if (ret == -EPROBE_DEFER) 1312*fe8abf33SMasahiro Yamada return ret; 1313*fe8abf33SMasahiro Yamada /* 1314*fe8abf33SMasahiro Yamada * Clocks are optional, but new DT platforms should support all clocks 1315*fe8abf33SMasahiro Yamada * as required by the DT-binding. 1316*fe8abf33SMasahiro Yamada */ 1317*fe8abf33SMasahiro Yamada if (ret) 1318*fe8abf33SMasahiro Yamada dwc->num_clks = 0; 1319*fe8abf33SMasahiro Yamada 1320*fe8abf33SMasahiro Yamada ret = reset_control_deassert(dwc->reset); 1321*fe8abf33SMasahiro Yamada if (ret) 1322*fe8abf33SMasahiro Yamada goto put_clks; 1323*fe8abf33SMasahiro Yamada 1324*fe8abf33SMasahiro Yamada ret = clk_bulk_prepare(dwc->num_clks, dwc->clks); 1325*fe8abf33SMasahiro Yamada if (ret) 1326*fe8abf33SMasahiro Yamada goto assert_reset; 1327*fe8abf33SMasahiro Yamada 1328*fe8abf33SMasahiro Yamada ret = clk_bulk_enable(dwc->num_clks, dwc->clks); 1329*fe8abf33SMasahiro Yamada if (ret) 1330*fe8abf33SMasahiro Yamada goto unprepare_clks; 1331*fe8abf33SMasahiro Yamada 13326c89cce0SHeikki Krogerus platform_set_drvdata(pdev, dwc); 13332917e718SHeikki Krogerus dwc3_cache_hwparams(dwc); 13346c89cce0SHeikki Krogerus 133572246da4SFelipe Balbi spin_lock_init(&dwc->lock); 133672246da4SFelipe Balbi 1337fc8bb91bSFelipe Balbi pm_runtime_set_active(dev); 1338fc8bb91bSFelipe Balbi pm_runtime_use_autosuspend(dev); 1339fc8bb91bSFelipe Balbi pm_runtime_set_autosuspend_delay(dev, DWC3_DEFAULT_AUTOSUSPEND_DELAY); 1340802ca850SChanho Park pm_runtime_enable(dev); 134132808237SRoger Quadros ret = pm_runtime_get_sync(dev); 134232808237SRoger Quadros if (ret < 0) 134332808237SRoger Quadros goto err1; 134432808237SRoger Quadros 1345802ca850SChanho Park pm_runtime_forbid(dev); 134672246da4SFelipe Balbi 13473921426bSFelipe Balbi ret = dwc3_alloc_event_buffers(dwc, DWC3_EVENT_BUFFERS_SIZE); 13483921426bSFelipe Balbi if (ret) { 13493921426bSFelipe Balbi dev_err(dwc->dev, "failed to allocate event buffers\n"); 13503921426bSFelipe Balbi ret = -ENOMEM; 135132808237SRoger Quadros goto err2; 13523921426bSFelipe Balbi } 13533921426bSFelipe Balbi 13549d6173e1SThinh Nguyen ret = dwc3_get_dr_mode(dwc); 13559d6173e1SThinh Nguyen if (ret) 13569d6173e1SThinh Nguyen goto err3; 135732a4a135SFelipe Balbi 1358c499ff71SFelipe Balbi ret = dwc3_alloc_scratch_buffers(dwc); 1359c499ff71SFelipe Balbi if (ret) 136032808237SRoger Quadros goto err3; 1361c499ff71SFelipe Balbi 136272246da4SFelipe Balbi ret = dwc3_core_init(dwc); 136372246da4SFelipe Balbi if (ret) { 1364802ca850SChanho Park dev_err(dev, "failed to initialize core\n"); 136532808237SRoger Quadros goto err4; 136672246da4SFelipe Balbi } 136772246da4SFelipe Balbi 13687ac51a12SJohn Youn dwc3_check_params(dwc); 13692c7f1bd9SJohn Youn 13705f94adfeSFelipe Balbi ret = dwc3_core_init_mode(dwc); 13715f94adfeSFelipe Balbi if (ret) 137232808237SRoger Quadros goto err5; 137372246da4SFelipe Balbi 13744e9f3118SDu, Changbin dwc3_debugfs_init(dwc); 1375fc8bb91bSFelipe Balbi pm_runtime_put(dev); 137672246da4SFelipe Balbi 137772246da4SFelipe Balbi return 0; 137872246da4SFelipe Balbi 137932808237SRoger Quadros err5: 1380f122d33eSFelipe Balbi dwc3_event_buffers_cleanup(dwc); 1381f122d33eSFelipe Balbi 138232808237SRoger Quadros err4: 1383c499ff71SFelipe Balbi dwc3_free_scratch_buffers(dwc); 138472246da4SFelipe Balbi 138532808237SRoger Quadros err3: 13863921426bSFelipe Balbi dwc3_free_event_buffers(dwc); 13873921426bSFelipe Balbi 138832808237SRoger Quadros err2: 138932808237SRoger Quadros pm_runtime_allow(&pdev->dev); 139032808237SRoger Quadros 139132808237SRoger Quadros err1: 139232808237SRoger Quadros pm_runtime_put_sync(&pdev->dev); 139332808237SRoger Quadros pm_runtime_disable(&pdev->dev); 139432808237SRoger Quadros 1395*fe8abf33SMasahiro Yamada clk_bulk_disable(dwc->num_clks, dwc->clks); 1396*fe8abf33SMasahiro Yamada unprepare_clks: 1397*fe8abf33SMasahiro Yamada clk_bulk_unprepare(dwc->num_clks, dwc->clks); 1398*fe8abf33SMasahiro Yamada assert_reset: 1399*fe8abf33SMasahiro Yamada reset_control_assert(dwc->reset); 1400*fe8abf33SMasahiro Yamada put_clks: 1401*fe8abf33SMasahiro Yamada clk_bulk_put(dwc->num_clks, dwc->clks); 1402*fe8abf33SMasahiro Yamada 140372246da4SFelipe Balbi return ret; 140472246da4SFelipe Balbi } 140572246da4SFelipe Balbi 1406fb4e98abSBill Pemberton static int dwc3_remove(struct platform_device *pdev) 140772246da4SFelipe Balbi { 140872246da4SFelipe Balbi struct dwc3 *dwc = platform_get_drvdata(pdev); 14093da1f6eeSFelipe Balbi 1410fc8bb91bSFelipe Balbi pm_runtime_get_sync(&pdev->dev); 141172246da4SFelipe Balbi 1412dc99f16fSFelipe Balbi dwc3_debugfs_exit(dwc); 1413dc99f16fSFelipe Balbi dwc3_core_exit_mode(dwc); 14148ba007a9SKishon Vijay Abraham I 141572246da4SFelipe Balbi dwc3_core_exit(dwc); 141688bc9d19SHeikki Krogerus dwc3_ulpi_exit(dwc); 141772246da4SFelipe Balbi 1418fc8bb91bSFelipe Balbi pm_runtime_put_sync(&pdev->dev); 1419fc8bb91bSFelipe Balbi pm_runtime_allow(&pdev->dev); 1420fc8bb91bSFelipe Balbi pm_runtime_disable(&pdev->dev); 1421fc8bb91bSFelipe Balbi 1422c499ff71SFelipe Balbi dwc3_free_event_buffers(dwc); 1423c499ff71SFelipe Balbi dwc3_free_scratch_buffers(dwc); 1424*fe8abf33SMasahiro Yamada clk_bulk_put(dwc->num_clks, dwc->clks); 1425c499ff71SFelipe Balbi 142672246da4SFelipe Balbi return 0; 142772246da4SFelipe Balbi } 142872246da4SFelipe Balbi 1429fc8bb91bSFelipe Balbi #ifdef CONFIG_PM 1430*fe8abf33SMasahiro Yamada static int dwc3_core_init_for_resume(struct dwc3 *dwc) 1431*fe8abf33SMasahiro Yamada { 1432*fe8abf33SMasahiro Yamada int ret; 1433*fe8abf33SMasahiro Yamada 1434*fe8abf33SMasahiro Yamada ret = reset_control_deassert(dwc->reset); 1435*fe8abf33SMasahiro Yamada if (ret) 1436*fe8abf33SMasahiro Yamada return ret; 1437*fe8abf33SMasahiro Yamada 1438*fe8abf33SMasahiro Yamada ret = clk_bulk_prepare(dwc->num_clks, dwc->clks); 1439*fe8abf33SMasahiro Yamada if (ret) 1440*fe8abf33SMasahiro Yamada goto assert_reset; 1441*fe8abf33SMasahiro Yamada 1442*fe8abf33SMasahiro Yamada ret = clk_bulk_enable(dwc->num_clks, dwc->clks); 1443*fe8abf33SMasahiro Yamada if (ret) 1444*fe8abf33SMasahiro Yamada goto unprepare_clks; 1445*fe8abf33SMasahiro Yamada 1446*fe8abf33SMasahiro Yamada ret = dwc3_core_init(dwc); 1447*fe8abf33SMasahiro Yamada if (ret) 1448*fe8abf33SMasahiro Yamada goto disable_clks; 1449*fe8abf33SMasahiro Yamada 1450*fe8abf33SMasahiro Yamada return 0; 1451*fe8abf33SMasahiro Yamada 1452*fe8abf33SMasahiro Yamada disable_clks: 1453*fe8abf33SMasahiro Yamada clk_bulk_disable(dwc->num_clks, dwc->clks); 1454*fe8abf33SMasahiro Yamada unprepare_clks: 1455*fe8abf33SMasahiro Yamada clk_bulk_unprepare(dwc->num_clks, dwc->clks); 1456*fe8abf33SMasahiro Yamada assert_reset: 1457*fe8abf33SMasahiro Yamada reset_control_assert(dwc->reset); 1458*fe8abf33SMasahiro Yamada 1459*fe8abf33SMasahiro Yamada return ret; 1460*fe8abf33SMasahiro Yamada } 1461*fe8abf33SMasahiro Yamada 1462c4a5153eSManu Gautam static int dwc3_suspend_common(struct dwc3 *dwc, pm_message_t msg) 14637415f17cSFelipe Balbi { 1464fc8bb91bSFelipe Balbi unsigned long flags; 1465bcb12877SManu Gautam u32 reg; 14667415f17cSFelipe Balbi 1467689bf72cSManu Gautam switch (dwc->current_dr_role) { 1468689bf72cSManu Gautam case DWC3_GCTL_PRTCAP_DEVICE: 1469fc8bb91bSFelipe Balbi spin_lock_irqsave(&dwc->lock, flags); 14707415f17cSFelipe Balbi dwc3_gadget_suspend(dwc); 1471fc8bb91bSFelipe Balbi spin_unlock_irqrestore(&dwc->lock, flags); 1472689bf72cSManu Gautam dwc3_core_exit(dwc); 147351f5d49aSFelipe Balbi break; 1474689bf72cSManu Gautam case DWC3_GCTL_PRTCAP_HOST: 1475bcb12877SManu Gautam if (!PMSG_IS_AUTO(msg)) { 1476c4a5153eSManu Gautam dwc3_core_exit(dwc); 1477c4a5153eSManu Gautam break; 1478bcb12877SManu Gautam } 1479bcb12877SManu Gautam 1480bcb12877SManu Gautam /* Let controller to suspend HSPHY before PHY driver suspends */ 1481bcb12877SManu Gautam if (dwc->dis_u2_susphy_quirk || 1482bcb12877SManu Gautam dwc->dis_enblslpm_quirk) { 1483bcb12877SManu Gautam reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0)); 1484bcb12877SManu Gautam reg |= DWC3_GUSB2PHYCFG_ENBLSLPM | 1485bcb12877SManu Gautam DWC3_GUSB2PHYCFG_SUSPHY; 1486bcb12877SManu Gautam dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); 1487bcb12877SManu Gautam 1488bcb12877SManu Gautam /* Give some time for USB2 PHY to suspend */ 1489bcb12877SManu Gautam usleep_range(5000, 6000); 1490bcb12877SManu Gautam } 1491bcb12877SManu Gautam 1492bcb12877SManu Gautam phy_pm_runtime_put_sync(dwc->usb2_generic_phy); 1493bcb12877SManu Gautam phy_pm_runtime_put_sync(dwc->usb3_generic_phy); 1494bcb12877SManu Gautam break; 1495f09cc79bSRoger Quadros case DWC3_GCTL_PRTCAP_OTG: 1496f09cc79bSRoger Quadros /* do nothing during runtime_suspend */ 1497f09cc79bSRoger Quadros if (PMSG_IS_AUTO(msg)) 1498f09cc79bSRoger Quadros break; 1499f09cc79bSRoger Quadros 1500f09cc79bSRoger Quadros if (dwc->current_otg_role == DWC3_OTG_ROLE_DEVICE) { 1501f09cc79bSRoger Quadros spin_lock_irqsave(&dwc->lock, flags); 1502f09cc79bSRoger Quadros dwc3_gadget_suspend(dwc); 1503f09cc79bSRoger Quadros spin_unlock_irqrestore(&dwc->lock, flags); 1504f09cc79bSRoger Quadros } 1505f09cc79bSRoger Quadros 1506f09cc79bSRoger Quadros dwc3_otg_exit(dwc); 1507f09cc79bSRoger Quadros dwc3_core_exit(dwc); 1508f09cc79bSRoger Quadros break; 15097415f17cSFelipe Balbi default: 151051f5d49aSFelipe Balbi /* do nothing */ 15117415f17cSFelipe Balbi break; 15127415f17cSFelipe Balbi } 15137415f17cSFelipe Balbi 1514fc8bb91bSFelipe Balbi return 0; 1515fc8bb91bSFelipe Balbi } 1516fc8bb91bSFelipe Balbi 1517c4a5153eSManu Gautam static int dwc3_resume_common(struct dwc3 *dwc, pm_message_t msg) 1518fc8bb91bSFelipe Balbi { 1519fc8bb91bSFelipe Balbi unsigned long flags; 1520fc8bb91bSFelipe Balbi int ret; 1521bcb12877SManu Gautam u32 reg; 1522fc8bb91bSFelipe Balbi 1523689bf72cSManu Gautam switch (dwc->current_dr_role) { 1524689bf72cSManu Gautam case DWC3_GCTL_PRTCAP_DEVICE: 1525*fe8abf33SMasahiro Yamada ret = dwc3_core_init_for_resume(dwc); 1526fc8bb91bSFelipe Balbi if (ret) 1527fc8bb91bSFelipe Balbi return ret; 1528fc8bb91bSFelipe Balbi 15297d11c3acSRoger Quadros dwc3_set_prtcap(dwc, DWC3_GCTL_PRTCAP_DEVICE); 1530fc8bb91bSFelipe Balbi spin_lock_irqsave(&dwc->lock, flags); 1531fc8bb91bSFelipe Balbi dwc3_gadget_resume(dwc); 1532fc8bb91bSFelipe Balbi spin_unlock_irqrestore(&dwc->lock, flags); 1533689bf72cSManu Gautam break; 1534689bf72cSManu Gautam case DWC3_GCTL_PRTCAP_HOST: 1535c4a5153eSManu Gautam if (!PMSG_IS_AUTO(msg)) { 1536*fe8abf33SMasahiro Yamada ret = dwc3_core_init_for_resume(dwc); 1537c4a5153eSManu Gautam if (ret) 1538c4a5153eSManu Gautam return ret; 15397d11c3acSRoger Quadros dwc3_set_prtcap(dwc, DWC3_GCTL_PRTCAP_HOST); 1540bcb12877SManu Gautam break; 1541c4a5153eSManu Gautam } 1542bcb12877SManu Gautam /* Restore GUSB2PHYCFG bits that were modified in suspend */ 1543bcb12877SManu Gautam reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0)); 1544bcb12877SManu Gautam if (dwc->dis_u2_susphy_quirk) 1545bcb12877SManu Gautam reg &= ~DWC3_GUSB2PHYCFG_SUSPHY; 1546bcb12877SManu Gautam 1547bcb12877SManu Gautam if (dwc->dis_enblslpm_quirk) 1548bcb12877SManu Gautam reg &= ~DWC3_GUSB2PHYCFG_ENBLSLPM; 1549bcb12877SManu Gautam 1550bcb12877SManu Gautam dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); 1551bcb12877SManu Gautam 1552bcb12877SManu Gautam phy_pm_runtime_get_sync(dwc->usb2_generic_phy); 1553bcb12877SManu Gautam phy_pm_runtime_get_sync(dwc->usb3_generic_phy); 1554c4a5153eSManu Gautam break; 1555f09cc79bSRoger Quadros case DWC3_GCTL_PRTCAP_OTG: 1556f09cc79bSRoger Quadros /* nothing to do on runtime_resume */ 1557f09cc79bSRoger Quadros if (PMSG_IS_AUTO(msg)) 1558f09cc79bSRoger Quadros break; 1559f09cc79bSRoger Quadros 1560f09cc79bSRoger Quadros ret = dwc3_core_init(dwc); 1561f09cc79bSRoger Quadros if (ret) 1562f09cc79bSRoger Quadros return ret; 1563f09cc79bSRoger Quadros 1564f09cc79bSRoger Quadros dwc3_set_prtcap(dwc, dwc->current_dr_role); 1565f09cc79bSRoger Quadros 1566f09cc79bSRoger Quadros dwc3_otg_init(dwc); 1567f09cc79bSRoger Quadros if (dwc->current_otg_role == DWC3_OTG_ROLE_HOST) { 1568f09cc79bSRoger Quadros dwc3_otg_host_init(dwc); 1569f09cc79bSRoger Quadros } else if (dwc->current_otg_role == DWC3_OTG_ROLE_DEVICE) { 1570f09cc79bSRoger Quadros spin_lock_irqsave(&dwc->lock, flags); 1571f09cc79bSRoger Quadros dwc3_gadget_resume(dwc); 1572f09cc79bSRoger Quadros spin_unlock_irqrestore(&dwc->lock, flags); 1573f09cc79bSRoger Quadros } 1574f09cc79bSRoger Quadros 1575f09cc79bSRoger Quadros break; 1576fc8bb91bSFelipe Balbi default: 1577fc8bb91bSFelipe Balbi /* do nothing */ 1578fc8bb91bSFelipe Balbi break; 1579fc8bb91bSFelipe Balbi } 1580fc8bb91bSFelipe Balbi 1581fc8bb91bSFelipe Balbi return 0; 1582fc8bb91bSFelipe Balbi } 1583fc8bb91bSFelipe Balbi 1584fc8bb91bSFelipe Balbi static int dwc3_runtime_checks(struct dwc3 *dwc) 1585fc8bb91bSFelipe Balbi { 1586689bf72cSManu Gautam switch (dwc->current_dr_role) { 1587c4a5153eSManu Gautam case DWC3_GCTL_PRTCAP_DEVICE: 1588fc8bb91bSFelipe Balbi if (dwc->connected) 1589fc8bb91bSFelipe Balbi return -EBUSY; 1590fc8bb91bSFelipe Balbi break; 1591c4a5153eSManu Gautam case DWC3_GCTL_PRTCAP_HOST: 1592fc8bb91bSFelipe Balbi default: 1593fc8bb91bSFelipe Balbi /* do nothing */ 1594fc8bb91bSFelipe Balbi break; 1595fc8bb91bSFelipe Balbi } 1596fc8bb91bSFelipe Balbi 1597fc8bb91bSFelipe Balbi return 0; 1598fc8bb91bSFelipe Balbi } 1599fc8bb91bSFelipe Balbi 1600fc8bb91bSFelipe Balbi static int dwc3_runtime_suspend(struct device *dev) 1601fc8bb91bSFelipe Balbi { 1602fc8bb91bSFelipe Balbi struct dwc3 *dwc = dev_get_drvdata(dev); 1603fc8bb91bSFelipe Balbi int ret; 1604fc8bb91bSFelipe Balbi 1605fc8bb91bSFelipe Balbi if (dwc3_runtime_checks(dwc)) 1606fc8bb91bSFelipe Balbi return -EBUSY; 1607fc8bb91bSFelipe Balbi 1608c4a5153eSManu Gautam ret = dwc3_suspend_common(dwc, PMSG_AUTO_SUSPEND); 1609fc8bb91bSFelipe Balbi if (ret) 1610fc8bb91bSFelipe Balbi return ret; 1611fc8bb91bSFelipe Balbi 1612fc8bb91bSFelipe Balbi device_init_wakeup(dev, true); 1613fc8bb91bSFelipe Balbi 1614fc8bb91bSFelipe Balbi return 0; 1615fc8bb91bSFelipe Balbi } 1616fc8bb91bSFelipe Balbi 1617fc8bb91bSFelipe Balbi static int dwc3_runtime_resume(struct device *dev) 1618fc8bb91bSFelipe Balbi { 1619fc8bb91bSFelipe Balbi struct dwc3 *dwc = dev_get_drvdata(dev); 1620fc8bb91bSFelipe Balbi int ret; 1621fc8bb91bSFelipe Balbi 1622fc8bb91bSFelipe Balbi device_init_wakeup(dev, false); 1623fc8bb91bSFelipe Balbi 1624c4a5153eSManu Gautam ret = dwc3_resume_common(dwc, PMSG_AUTO_RESUME); 1625fc8bb91bSFelipe Balbi if (ret) 1626fc8bb91bSFelipe Balbi return ret; 1627fc8bb91bSFelipe Balbi 1628689bf72cSManu Gautam switch (dwc->current_dr_role) { 1629689bf72cSManu Gautam case DWC3_GCTL_PRTCAP_DEVICE: 1630fc8bb91bSFelipe Balbi dwc3_gadget_process_pending_events(dwc); 1631fc8bb91bSFelipe Balbi break; 1632689bf72cSManu Gautam case DWC3_GCTL_PRTCAP_HOST: 1633fc8bb91bSFelipe Balbi default: 1634fc8bb91bSFelipe Balbi /* do nothing */ 1635fc8bb91bSFelipe Balbi break; 1636fc8bb91bSFelipe Balbi } 1637fc8bb91bSFelipe Balbi 1638fc8bb91bSFelipe Balbi pm_runtime_mark_last_busy(dev); 1639fc8bb91bSFelipe Balbi 1640fc8bb91bSFelipe Balbi return 0; 1641fc8bb91bSFelipe Balbi } 1642fc8bb91bSFelipe Balbi 1643fc8bb91bSFelipe Balbi static int dwc3_runtime_idle(struct device *dev) 1644fc8bb91bSFelipe Balbi { 1645fc8bb91bSFelipe Balbi struct dwc3 *dwc = dev_get_drvdata(dev); 1646fc8bb91bSFelipe Balbi 1647689bf72cSManu Gautam switch (dwc->current_dr_role) { 1648689bf72cSManu Gautam case DWC3_GCTL_PRTCAP_DEVICE: 1649fc8bb91bSFelipe Balbi if (dwc3_runtime_checks(dwc)) 1650fc8bb91bSFelipe Balbi return -EBUSY; 1651fc8bb91bSFelipe Balbi break; 1652689bf72cSManu Gautam case DWC3_GCTL_PRTCAP_HOST: 1653fc8bb91bSFelipe Balbi default: 1654fc8bb91bSFelipe Balbi /* do nothing */ 1655fc8bb91bSFelipe Balbi break; 1656fc8bb91bSFelipe Balbi } 1657fc8bb91bSFelipe Balbi 1658fc8bb91bSFelipe Balbi pm_runtime_mark_last_busy(dev); 1659fc8bb91bSFelipe Balbi pm_runtime_autosuspend(dev); 1660fc8bb91bSFelipe Balbi 1661fc8bb91bSFelipe Balbi return 0; 1662fc8bb91bSFelipe Balbi } 1663fc8bb91bSFelipe Balbi #endif /* CONFIG_PM */ 1664fc8bb91bSFelipe Balbi 1665fc8bb91bSFelipe Balbi #ifdef CONFIG_PM_SLEEP 1666fc8bb91bSFelipe Balbi static int dwc3_suspend(struct device *dev) 1667fc8bb91bSFelipe Balbi { 1668fc8bb91bSFelipe Balbi struct dwc3 *dwc = dev_get_drvdata(dev); 1669fc8bb91bSFelipe Balbi int ret; 1670fc8bb91bSFelipe Balbi 1671c4a5153eSManu Gautam ret = dwc3_suspend_common(dwc, PMSG_SUSPEND); 1672fc8bb91bSFelipe Balbi if (ret) 1673fc8bb91bSFelipe Balbi return ret; 1674fc8bb91bSFelipe Balbi 16756344475fSSekhar Nori pinctrl_pm_select_sleep_state(dev); 16766344475fSSekhar Nori 16777415f17cSFelipe Balbi return 0; 16787415f17cSFelipe Balbi } 16797415f17cSFelipe Balbi 16807415f17cSFelipe Balbi static int dwc3_resume(struct device *dev) 16817415f17cSFelipe Balbi { 16827415f17cSFelipe Balbi struct dwc3 *dwc = dev_get_drvdata(dev); 168357303488SKishon Vijay Abraham I int ret; 16847415f17cSFelipe Balbi 16856344475fSSekhar Nori pinctrl_pm_select_default_state(dev); 16866344475fSSekhar Nori 1687c4a5153eSManu Gautam ret = dwc3_resume_common(dwc, PMSG_RESUME); 168851f5d49aSFelipe Balbi if (ret) 16895c4ad318SFelipe Balbi return ret; 16905c4ad318SFelipe Balbi 16917415f17cSFelipe Balbi pm_runtime_disable(dev); 16927415f17cSFelipe Balbi pm_runtime_set_active(dev); 16937415f17cSFelipe Balbi pm_runtime_enable(dev); 16947415f17cSFelipe Balbi 16957415f17cSFelipe Balbi return 0; 16967415f17cSFelipe Balbi } 16977f370ed0SFelipe Balbi #endif /* CONFIG_PM_SLEEP */ 16987415f17cSFelipe Balbi 16997415f17cSFelipe Balbi static const struct dev_pm_ops dwc3_dev_pm_ops = { 17007415f17cSFelipe Balbi SET_SYSTEM_SLEEP_PM_OPS(dwc3_suspend, dwc3_resume) 1701fc8bb91bSFelipe Balbi SET_RUNTIME_PM_OPS(dwc3_runtime_suspend, dwc3_runtime_resume, 1702fc8bb91bSFelipe Balbi dwc3_runtime_idle) 17037415f17cSFelipe Balbi }; 17047415f17cSFelipe Balbi 17055088b6f5SKishon Vijay Abraham I #ifdef CONFIG_OF 17065088b6f5SKishon Vijay Abraham I static const struct of_device_id of_dwc3_match[] = { 17075088b6f5SKishon Vijay Abraham I { 170822a5aa17SFelipe Balbi .compatible = "snps,dwc3" 170922a5aa17SFelipe Balbi }, 171022a5aa17SFelipe Balbi { 17115088b6f5SKishon Vijay Abraham I .compatible = "synopsys,dwc3" 17125088b6f5SKishon Vijay Abraham I }, 17135088b6f5SKishon Vijay Abraham I { }, 17145088b6f5SKishon Vijay Abraham I }; 17155088b6f5SKishon Vijay Abraham I MODULE_DEVICE_TABLE(of, of_dwc3_match); 17165088b6f5SKishon Vijay Abraham I #endif 17175088b6f5SKishon Vijay Abraham I 1718404905a6SHeikki Krogerus #ifdef CONFIG_ACPI 1719404905a6SHeikki Krogerus 1720404905a6SHeikki Krogerus #define ACPI_ID_INTEL_BSW "808622B7" 1721404905a6SHeikki Krogerus 1722404905a6SHeikki Krogerus static const struct acpi_device_id dwc3_acpi_match[] = { 1723404905a6SHeikki Krogerus { ACPI_ID_INTEL_BSW, 0 }, 1724404905a6SHeikki Krogerus { }, 1725404905a6SHeikki Krogerus }; 1726404905a6SHeikki Krogerus MODULE_DEVICE_TABLE(acpi, dwc3_acpi_match); 1727404905a6SHeikki Krogerus #endif 1728404905a6SHeikki Krogerus 172972246da4SFelipe Balbi static struct platform_driver dwc3_driver = { 173072246da4SFelipe Balbi .probe = dwc3_probe, 17317690417dSBill Pemberton .remove = dwc3_remove, 173272246da4SFelipe Balbi .driver = { 173372246da4SFelipe Balbi .name = "dwc3", 17345088b6f5SKishon Vijay Abraham I .of_match_table = of_match_ptr(of_dwc3_match), 1735404905a6SHeikki Krogerus .acpi_match_table = ACPI_PTR(dwc3_acpi_match), 17367f370ed0SFelipe Balbi .pm = &dwc3_dev_pm_ops, 173772246da4SFelipe Balbi }, 173872246da4SFelipe Balbi }; 173972246da4SFelipe Balbi 1740b1116dccSTobias Klauser module_platform_driver(dwc3_driver); 1741b1116dccSTobias Klauser 17427ae4fc4dSSebastian Andrzej Siewior MODULE_ALIAS("platform:dwc3"); 174372246da4SFelipe Balbi MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>"); 17445945f789SFelipe Balbi MODULE_LICENSE("GPL v2"); 174572246da4SFelipe Balbi MODULE_DESCRIPTION("DesignWare USB3 DRD Controller Driver"); 1746