15fd54aceSGreg Kroah-Hartman // SPDX-License-Identifier: GPL-2.0 272246da4SFelipe Balbi /** 372246da4SFelipe Balbi * core.c - DesignWare USB3 DRD Controller Core file 472246da4SFelipe Balbi * 572246da4SFelipe Balbi * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com 672246da4SFelipe Balbi * 772246da4SFelipe Balbi * Authors: Felipe Balbi <balbi@ti.com>, 872246da4SFelipe Balbi * Sebastian Andrzej Siewior <bigeasy@linutronix.de> 972246da4SFelipe Balbi */ 1072246da4SFelipe Balbi 11fe8abf33SMasahiro Yamada #include <linux/clk.h> 12fa0ea13eSFelipe Balbi #include <linux/version.h> 13a72e658bSFelipe Balbi #include <linux/module.h> 1472246da4SFelipe Balbi #include <linux/kernel.h> 1572246da4SFelipe Balbi #include <linux/slab.h> 1672246da4SFelipe Balbi #include <linux/spinlock.h> 1772246da4SFelipe Balbi #include <linux/platform_device.h> 1872246da4SFelipe Balbi #include <linux/pm_runtime.h> 1972246da4SFelipe Balbi #include <linux/interrupt.h> 2072246da4SFelipe Balbi #include <linux/ioport.h> 2172246da4SFelipe Balbi #include <linux/io.h> 2272246da4SFelipe Balbi #include <linux/list.h> 2372246da4SFelipe Balbi #include <linux/delay.h> 2472246da4SFelipe Balbi #include <linux/dma-mapping.h> 25457e84b6SFelipe Balbi #include <linux/of.h> 26404905a6SHeikki Krogerus #include <linux/acpi.h> 276344475fSSekhar Nori #include <linux/pinctrl/consumer.h> 28fe8abf33SMasahiro Yamada #include <linux/reset.h> 2972246da4SFelipe Balbi 3072246da4SFelipe Balbi #include <linux/usb/ch9.h> 3172246da4SFelipe Balbi #include <linux/usb/gadget.h> 32f7e846f0SFelipe Balbi #include <linux/usb/of.h> 33a45c82b8SRuchika Kharwar #include <linux/usb/otg.h> 3472246da4SFelipe Balbi 3572246da4SFelipe Balbi #include "core.h" 3672246da4SFelipe Balbi #include "gadget.h" 3772246da4SFelipe Balbi #include "io.h" 3872246da4SFelipe Balbi 3972246da4SFelipe Balbi #include "debug.h" 4072246da4SFelipe Balbi 41fc8bb91bSFelipe Balbi #define DWC3_DEFAULT_AUTOSUSPEND_DELAY 5000 /* ms */ 428300dd23SFelipe Balbi 439d6173e1SThinh Nguyen /** 449d6173e1SThinh Nguyen * dwc3_get_dr_mode - Validates and sets dr_mode 459d6173e1SThinh Nguyen * @dwc: pointer to our context structure 469d6173e1SThinh Nguyen */ 479d6173e1SThinh Nguyen static int dwc3_get_dr_mode(struct dwc3 *dwc) 489d6173e1SThinh Nguyen { 499d6173e1SThinh Nguyen enum usb_dr_mode mode; 509d6173e1SThinh Nguyen struct device *dev = dwc->dev; 519d6173e1SThinh Nguyen unsigned int hw_mode; 529d6173e1SThinh Nguyen 539d6173e1SThinh Nguyen if (dwc->dr_mode == USB_DR_MODE_UNKNOWN) 549d6173e1SThinh Nguyen dwc->dr_mode = USB_DR_MODE_OTG; 559d6173e1SThinh Nguyen 569d6173e1SThinh Nguyen mode = dwc->dr_mode; 579d6173e1SThinh Nguyen hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0); 589d6173e1SThinh Nguyen 599d6173e1SThinh Nguyen switch (hw_mode) { 609d6173e1SThinh Nguyen case DWC3_GHWPARAMS0_MODE_GADGET: 619d6173e1SThinh Nguyen if (IS_ENABLED(CONFIG_USB_DWC3_HOST)) { 629d6173e1SThinh Nguyen dev_err(dev, 639d6173e1SThinh Nguyen "Controller does not support host mode.\n"); 649d6173e1SThinh Nguyen return -EINVAL; 659d6173e1SThinh Nguyen } 669d6173e1SThinh Nguyen mode = USB_DR_MODE_PERIPHERAL; 679d6173e1SThinh Nguyen break; 689d6173e1SThinh Nguyen case DWC3_GHWPARAMS0_MODE_HOST: 699d6173e1SThinh Nguyen if (IS_ENABLED(CONFIG_USB_DWC3_GADGET)) { 709d6173e1SThinh Nguyen dev_err(dev, 719d6173e1SThinh Nguyen "Controller does not support device mode.\n"); 729d6173e1SThinh Nguyen return -EINVAL; 739d6173e1SThinh Nguyen } 749d6173e1SThinh Nguyen mode = USB_DR_MODE_HOST; 759d6173e1SThinh Nguyen break; 769d6173e1SThinh Nguyen default: 779d6173e1SThinh Nguyen if (IS_ENABLED(CONFIG_USB_DWC3_HOST)) 789d6173e1SThinh Nguyen mode = USB_DR_MODE_HOST; 799d6173e1SThinh Nguyen else if (IS_ENABLED(CONFIG_USB_DWC3_GADGET)) 809d6173e1SThinh Nguyen mode = USB_DR_MODE_PERIPHERAL; 81a7700468SThinh Nguyen 82a7700468SThinh Nguyen /* 8389a9cc47SThinh Nguyen * DWC_usb31 and DWC_usb3 v3.30a and higher do not support OTG 8489a9cc47SThinh Nguyen * mode. If the controller supports DRD but the dr_mode is not 8589a9cc47SThinh Nguyen * specified or set to OTG, then set the mode to peripheral. 86a7700468SThinh Nguyen */ 8789a9cc47SThinh Nguyen if (mode == USB_DR_MODE_OTG && 8889a9cc47SThinh Nguyen dwc->revision >= DWC3_REVISION_330A) 89a7700468SThinh Nguyen mode = USB_DR_MODE_PERIPHERAL; 909d6173e1SThinh Nguyen } 919d6173e1SThinh Nguyen 929d6173e1SThinh Nguyen if (mode != dwc->dr_mode) { 939d6173e1SThinh Nguyen dev_warn(dev, 949d6173e1SThinh Nguyen "Configuration mismatch. dr_mode forced to %s\n", 959d6173e1SThinh Nguyen mode == USB_DR_MODE_HOST ? "host" : "gadget"); 969d6173e1SThinh Nguyen 979d6173e1SThinh Nguyen dwc->dr_mode = mode; 989d6173e1SThinh Nguyen } 999d6173e1SThinh Nguyen 1009d6173e1SThinh Nguyen return 0; 1019d6173e1SThinh Nguyen } 1029d6173e1SThinh Nguyen 103f09cc79bSRoger Quadros void dwc3_set_prtcap(struct dwc3 *dwc, u32 mode) 1043140e8cbSSebastian Andrzej Siewior { 1053140e8cbSSebastian Andrzej Siewior u32 reg; 1063140e8cbSSebastian Andrzej Siewior 1073140e8cbSSebastian Andrzej Siewior reg = dwc3_readl(dwc->regs, DWC3_GCTL); 1083140e8cbSSebastian Andrzej Siewior reg &= ~(DWC3_GCTL_PRTCAPDIR(DWC3_GCTL_PRTCAP_OTG)); 1093140e8cbSSebastian Andrzej Siewior reg |= DWC3_GCTL_PRTCAPDIR(mode); 1103140e8cbSSebastian Andrzej Siewior dwc3_writel(dwc->regs, DWC3_GCTL, reg); 111c4a5153eSManu Gautam 112c4a5153eSManu Gautam dwc->current_dr_role = mode; 11341ce1456SRoger Quadros } 1146b3261a2SRoger Quadros 11541ce1456SRoger Quadros static void __dwc3_set_mode(struct work_struct *work) 11641ce1456SRoger Quadros { 11741ce1456SRoger Quadros struct dwc3 *dwc = work_to_dwc(work); 11841ce1456SRoger Quadros unsigned long flags; 11941ce1456SRoger Quadros int ret; 12041ce1456SRoger Quadros 121f09cc79bSRoger Quadros if (dwc->dr_mode != USB_DR_MODE_OTG) 122f09cc79bSRoger Quadros return; 123f09cc79bSRoger Quadros 124f09cc79bSRoger Quadros if (dwc->current_dr_role == DWC3_GCTL_PRTCAP_OTG) 125f09cc79bSRoger Quadros dwc3_otg_update(dwc, 0); 126f09cc79bSRoger Quadros 12741ce1456SRoger Quadros if (!dwc->desired_dr_role) 12841ce1456SRoger Quadros return; 12941ce1456SRoger Quadros 13041ce1456SRoger Quadros if (dwc->desired_dr_role == dwc->current_dr_role) 13141ce1456SRoger Quadros return; 13241ce1456SRoger Quadros 133f09cc79bSRoger Quadros if (dwc->desired_dr_role == DWC3_GCTL_PRTCAP_OTG && dwc->edev) 13441ce1456SRoger Quadros return; 13541ce1456SRoger Quadros 13641ce1456SRoger Quadros switch (dwc->current_dr_role) { 13741ce1456SRoger Quadros case DWC3_GCTL_PRTCAP_HOST: 13841ce1456SRoger Quadros dwc3_host_exit(dwc); 13941ce1456SRoger Quadros break; 14041ce1456SRoger Quadros case DWC3_GCTL_PRTCAP_DEVICE: 14141ce1456SRoger Quadros dwc3_gadget_exit(dwc); 14241ce1456SRoger Quadros dwc3_event_buffers_cleanup(dwc); 14341ce1456SRoger Quadros break; 144f09cc79bSRoger Quadros case DWC3_GCTL_PRTCAP_OTG: 145f09cc79bSRoger Quadros dwc3_otg_exit(dwc); 146f09cc79bSRoger Quadros spin_lock_irqsave(&dwc->lock, flags); 147f09cc79bSRoger Quadros dwc->desired_otg_role = DWC3_OTG_ROLE_IDLE; 148f09cc79bSRoger Quadros spin_unlock_irqrestore(&dwc->lock, flags); 149f09cc79bSRoger Quadros dwc3_otg_update(dwc, 1); 150f09cc79bSRoger Quadros break; 15141ce1456SRoger Quadros default: 15241ce1456SRoger Quadros break; 15341ce1456SRoger Quadros } 15441ce1456SRoger Quadros 15541ce1456SRoger Quadros spin_lock_irqsave(&dwc->lock, flags); 15641ce1456SRoger Quadros 15741ce1456SRoger Quadros dwc3_set_prtcap(dwc, dwc->desired_dr_role); 15841ce1456SRoger Quadros 15941ce1456SRoger Quadros spin_unlock_irqrestore(&dwc->lock, flags); 16041ce1456SRoger Quadros 16141ce1456SRoger Quadros switch (dwc->desired_dr_role) { 16241ce1456SRoger Quadros case DWC3_GCTL_PRTCAP_HOST: 16341ce1456SRoger Quadros ret = dwc3_host_init(dwc); 164958d1a4cSFelipe Balbi if (ret) { 16541ce1456SRoger Quadros dev_err(dwc->dev, "failed to initialize host\n"); 166958d1a4cSFelipe Balbi } else { 167958d1a4cSFelipe Balbi if (dwc->usb2_phy) 168958d1a4cSFelipe Balbi otg_set_vbus(dwc->usb2_phy->otg, true); 169958d1a4cSFelipe Balbi phy_set_mode(dwc->usb2_generic_phy, PHY_MODE_USB_HOST); 170644cbbc3SManu Gautam phy_set_mode(dwc->usb3_generic_phy, PHY_MODE_USB_HOST); 171d8c80bb3SVivek Gautam phy_calibrate(dwc->usb2_generic_phy); 172958d1a4cSFelipe Balbi } 17341ce1456SRoger Quadros break; 17441ce1456SRoger Quadros case DWC3_GCTL_PRTCAP_DEVICE: 17541ce1456SRoger Quadros dwc3_event_buffers_setup(dwc); 176958d1a4cSFelipe Balbi 177958d1a4cSFelipe Balbi if (dwc->usb2_phy) 178958d1a4cSFelipe Balbi otg_set_vbus(dwc->usb2_phy->otg, false); 179958d1a4cSFelipe Balbi phy_set_mode(dwc->usb2_generic_phy, PHY_MODE_USB_DEVICE); 180644cbbc3SManu Gautam phy_set_mode(dwc->usb3_generic_phy, PHY_MODE_USB_DEVICE); 181958d1a4cSFelipe Balbi 18241ce1456SRoger Quadros ret = dwc3_gadget_init(dwc); 18341ce1456SRoger Quadros if (ret) 18441ce1456SRoger Quadros dev_err(dwc->dev, "failed to initialize peripheral\n"); 18541ce1456SRoger Quadros break; 186f09cc79bSRoger Quadros case DWC3_GCTL_PRTCAP_OTG: 187f09cc79bSRoger Quadros dwc3_otg_init(dwc); 188f09cc79bSRoger Quadros dwc3_otg_update(dwc, 0); 189f09cc79bSRoger Quadros break; 19041ce1456SRoger Quadros default: 19141ce1456SRoger Quadros break; 19241ce1456SRoger Quadros } 193f09cc79bSRoger Quadros 19441ce1456SRoger Quadros } 19541ce1456SRoger Quadros 19641ce1456SRoger Quadros void dwc3_set_mode(struct dwc3 *dwc, u32 mode) 19741ce1456SRoger Quadros { 19841ce1456SRoger Quadros unsigned long flags; 19941ce1456SRoger Quadros 20041ce1456SRoger Quadros spin_lock_irqsave(&dwc->lock, flags); 20141ce1456SRoger Quadros dwc->desired_dr_role = mode; 20241ce1456SRoger Quadros spin_unlock_irqrestore(&dwc->lock, flags); 20341ce1456SRoger Quadros 204084a804eSRoger Quadros queue_work(system_freezable_wq, &dwc->drd_work); 2053140e8cbSSebastian Andrzej Siewior } 2068300dd23SFelipe Balbi 207cf6d867dSFelipe Balbi u32 dwc3_core_fifo_space(struct dwc3_ep *dep, u8 type) 208cf6d867dSFelipe Balbi { 209cf6d867dSFelipe Balbi struct dwc3 *dwc = dep->dwc; 210cf6d867dSFelipe Balbi u32 reg; 211cf6d867dSFelipe Balbi 212cf6d867dSFelipe Balbi dwc3_writel(dwc->regs, DWC3_GDBGFIFOSPACE, 213cf6d867dSFelipe Balbi DWC3_GDBGFIFOSPACE_NUM(dep->number) | 214cf6d867dSFelipe Balbi DWC3_GDBGFIFOSPACE_TYPE(type)); 215cf6d867dSFelipe Balbi 216cf6d867dSFelipe Balbi reg = dwc3_readl(dwc->regs, DWC3_GDBGFIFOSPACE); 217cf6d867dSFelipe Balbi 218cf6d867dSFelipe Balbi return DWC3_GDBGFIFOSPACE_SPACE_AVAILABLE(reg); 219cf6d867dSFelipe Balbi } 220cf6d867dSFelipe Balbi 22172246da4SFelipe Balbi /** 22272246da4SFelipe Balbi * dwc3_core_soft_reset - Issues core soft reset and PHY reset 22372246da4SFelipe Balbi * @dwc: pointer to our context structure 22472246da4SFelipe Balbi */ 22557303488SKishon Vijay Abraham I static int dwc3_core_soft_reset(struct dwc3 *dwc) 22672246da4SFelipe Balbi { 22772246da4SFelipe Balbi u32 reg; 228f59dcab1SFelipe Balbi int retries = 1000; 22957303488SKishon Vijay Abraham I int ret; 23072246da4SFelipe Balbi 23151e1e7bcSFelipe Balbi usb_phy_init(dwc->usb2_phy); 23251e1e7bcSFelipe Balbi usb_phy_init(dwc->usb3_phy); 23357303488SKishon Vijay Abraham I ret = phy_init(dwc->usb2_generic_phy); 23457303488SKishon Vijay Abraham I if (ret < 0) 23557303488SKishon Vijay Abraham I return ret; 23657303488SKishon Vijay Abraham I 23757303488SKishon Vijay Abraham I ret = phy_init(dwc->usb3_generic_phy); 23857303488SKishon Vijay Abraham I if (ret < 0) { 23957303488SKishon Vijay Abraham I phy_exit(dwc->usb2_generic_phy); 24057303488SKishon Vijay Abraham I return ret; 24157303488SKishon Vijay Abraham I } 24272246da4SFelipe Balbi 243f59dcab1SFelipe Balbi /* 244f59dcab1SFelipe Balbi * We're resetting only the device side because, if we're in host mode, 245f59dcab1SFelipe Balbi * XHCI driver will reset the host block. If dwc3 was configured for 246f59dcab1SFelipe Balbi * host-only mode, then we can return early. 247f59dcab1SFelipe Balbi */ 248c4a5153eSManu Gautam if (dwc->current_dr_role == DWC3_GCTL_PRTCAP_HOST) 24957303488SKishon Vijay Abraham I return 0; 250f59dcab1SFelipe Balbi 251f59dcab1SFelipe Balbi reg = dwc3_readl(dwc->regs, DWC3_DCTL); 252f59dcab1SFelipe Balbi reg |= DWC3_DCTL_CSFTRST; 253f59dcab1SFelipe Balbi dwc3_writel(dwc->regs, DWC3_DCTL, reg); 254f59dcab1SFelipe Balbi 255f59dcab1SFelipe Balbi do { 256f59dcab1SFelipe Balbi reg = dwc3_readl(dwc->regs, DWC3_DCTL); 257f59dcab1SFelipe Balbi if (!(reg & DWC3_DCTL_CSFTRST)) 258fab38333SThinh Nguyen goto done; 259f59dcab1SFelipe Balbi 260f59dcab1SFelipe Balbi udelay(1); 261f59dcab1SFelipe Balbi } while (--retries); 262f59dcab1SFelipe Balbi 26300b42170SBrian Norris phy_exit(dwc->usb3_generic_phy); 26400b42170SBrian Norris phy_exit(dwc->usb2_generic_phy); 26500b42170SBrian Norris 266f59dcab1SFelipe Balbi return -ETIMEDOUT; 267fab38333SThinh Nguyen 268fab38333SThinh Nguyen done: 269fab38333SThinh Nguyen /* 270fab38333SThinh Nguyen * For DWC_usb31 controller, once DWC3_DCTL_CSFTRST bit is cleared, 271fab38333SThinh Nguyen * we must wait at least 50ms before accessing the PHY domain 272fab38333SThinh Nguyen * (synchronization delay). DWC_usb31 programming guide section 1.3.2. 273fab38333SThinh Nguyen */ 274fab38333SThinh Nguyen if (dwc3_is_usb31(dwc)) 275fab38333SThinh Nguyen msleep(50); 276fab38333SThinh Nguyen 277fab38333SThinh Nguyen return 0; 27872246da4SFelipe Balbi } 27972246da4SFelipe Balbi 280fe8abf33SMasahiro Yamada static const struct clk_bulk_data dwc3_core_clks[] = { 281fe8abf33SMasahiro Yamada { .id = "ref" }, 282fe8abf33SMasahiro Yamada { .id = "bus_early" }, 283fe8abf33SMasahiro Yamada { .id = "suspend" }, 284fe8abf33SMasahiro Yamada }; 285fe8abf33SMasahiro Yamada 286db2be4e9SNikhil Badola /* 287db2be4e9SNikhil Badola * dwc3_frame_length_adjustment - Adjusts frame length if required 288db2be4e9SNikhil Badola * @dwc3: Pointer to our controller context structure 289db2be4e9SNikhil Badola */ 290bcdb3272SFelipe Balbi static void dwc3_frame_length_adjustment(struct dwc3 *dwc) 291db2be4e9SNikhil Badola { 292db2be4e9SNikhil Badola u32 reg; 293db2be4e9SNikhil Badola u32 dft; 294db2be4e9SNikhil Badola 295db2be4e9SNikhil Badola if (dwc->revision < DWC3_REVISION_250A) 296db2be4e9SNikhil Badola return; 297db2be4e9SNikhil Badola 298bcdb3272SFelipe Balbi if (dwc->fladj == 0) 299db2be4e9SNikhil Badola return; 300db2be4e9SNikhil Badola 301db2be4e9SNikhil Badola reg = dwc3_readl(dwc->regs, DWC3_GFLADJ); 302db2be4e9SNikhil Badola dft = reg & DWC3_GFLADJ_30MHZ_MASK; 303bcdb3272SFelipe Balbi if (!dev_WARN_ONCE(dwc->dev, dft == dwc->fladj, 304db2be4e9SNikhil Badola "request value same as default, ignoring\n")) { 305db2be4e9SNikhil Badola reg &= ~DWC3_GFLADJ_30MHZ_MASK; 306bcdb3272SFelipe Balbi reg |= DWC3_GFLADJ_30MHZ_SDBND_SEL | dwc->fladj; 307db2be4e9SNikhil Badola dwc3_writel(dwc->regs, DWC3_GFLADJ, reg); 308db2be4e9SNikhil Badola } 309db2be4e9SNikhil Badola } 310db2be4e9SNikhil Badola 311c5cc74e8SHeikki Krogerus /** 31272246da4SFelipe Balbi * dwc3_free_one_event_buffer - Frees one event buffer 31372246da4SFelipe Balbi * @dwc: Pointer to our controller context structure 31472246da4SFelipe Balbi * @evt: Pointer to event buffer to be freed 31572246da4SFelipe Balbi */ 31672246da4SFelipe Balbi static void dwc3_free_one_event_buffer(struct dwc3 *dwc, 31772246da4SFelipe Balbi struct dwc3_event_buffer *evt) 31872246da4SFelipe Balbi { 319d64ff406SArnd Bergmann dma_free_coherent(dwc->sysdev, evt->length, evt->buf, evt->dma); 32072246da4SFelipe Balbi } 32172246da4SFelipe Balbi 32272246da4SFelipe Balbi /** 3231d046793SPaul Zimmerman * dwc3_alloc_one_event_buffer - Allocates one event buffer structure 32472246da4SFelipe Balbi * @dwc: Pointer to our controller context structure 32572246da4SFelipe Balbi * @length: size of the event buffer 32672246da4SFelipe Balbi * 3271d046793SPaul Zimmerman * Returns a pointer to the allocated event buffer structure on success 32872246da4SFelipe Balbi * otherwise ERR_PTR(errno). 32972246da4SFelipe Balbi */ 33067d0b500SFelipe Balbi static struct dwc3_event_buffer *dwc3_alloc_one_event_buffer(struct dwc3 *dwc, 33167d0b500SFelipe Balbi unsigned length) 33272246da4SFelipe Balbi { 33372246da4SFelipe Balbi struct dwc3_event_buffer *evt; 33472246da4SFelipe Balbi 335380f0d28SFelipe Balbi evt = devm_kzalloc(dwc->dev, sizeof(*evt), GFP_KERNEL); 33672246da4SFelipe Balbi if (!evt) 33772246da4SFelipe Balbi return ERR_PTR(-ENOMEM); 33872246da4SFelipe Balbi 33972246da4SFelipe Balbi evt->dwc = dwc; 34072246da4SFelipe Balbi evt->length = length; 341d9fa4c63SJohn Youn evt->cache = devm_kzalloc(dwc->dev, length, GFP_KERNEL); 342d9fa4c63SJohn Youn if (!evt->cache) 343d9fa4c63SJohn Youn return ERR_PTR(-ENOMEM); 344d9fa4c63SJohn Youn 345d64ff406SArnd Bergmann evt->buf = dma_alloc_coherent(dwc->sysdev, length, 34672246da4SFelipe Balbi &evt->dma, GFP_KERNEL); 347e32672f0SFelipe Balbi if (!evt->buf) 34872246da4SFelipe Balbi return ERR_PTR(-ENOMEM); 34972246da4SFelipe Balbi 35072246da4SFelipe Balbi return evt; 35172246da4SFelipe Balbi } 35272246da4SFelipe Balbi 35372246da4SFelipe Balbi /** 35472246da4SFelipe Balbi * dwc3_free_event_buffers - frees all allocated event buffers 35572246da4SFelipe Balbi * @dwc: Pointer to our controller context structure 35672246da4SFelipe Balbi */ 35772246da4SFelipe Balbi static void dwc3_free_event_buffers(struct dwc3 *dwc) 35872246da4SFelipe Balbi { 35972246da4SFelipe Balbi struct dwc3_event_buffer *evt; 36072246da4SFelipe Balbi 361696c8b12SFelipe Balbi evt = dwc->ev_buf; 36264b6c8a7SAnton Tikhomirov if (evt) 36372246da4SFelipe Balbi dwc3_free_one_event_buffer(dwc, evt); 36472246da4SFelipe Balbi } 36572246da4SFelipe Balbi 36672246da4SFelipe Balbi /** 36772246da4SFelipe Balbi * dwc3_alloc_event_buffers - Allocates @num event buffers of size @length 3681d046793SPaul Zimmerman * @dwc: pointer to our controller context structure 36972246da4SFelipe Balbi * @length: size of event buffer 37072246da4SFelipe Balbi * 3711d046793SPaul Zimmerman * Returns 0 on success otherwise negative errno. In the error case, dwc 37272246da4SFelipe Balbi * may contain some buffers allocated but not all which were requested. 37372246da4SFelipe Balbi */ 37441ac7b3aSBill Pemberton static int dwc3_alloc_event_buffers(struct dwc3 *dwc, unsigned length) 37572246da4SFelipe Balbi { 37672246da4SFelipe Balbi struct dwc3_event_buffer *evt; 37772246da4SFelipe Balbi 37872246da4SFelipe Balbi evt = dwc3_alloc_one_event_buffer(dwc, length); 37972246da4SFelipe Balbi if (IS_ERR(evt)) { 38072246da4SFelipe Balbi dev_err(dwc->dev, "can't allocate event buffer\n"); 38172246da4SFelipe Balbi return PTR_ERR(evt); 38272246da4SFelipe Balbi } 383696c8b12SFelipe Balbi dwc->ev_buf = evt; 38472246da4SFelipe Balbi 38572246da4SFelipe Balbi return 0; 38672246da4SFelipe Balbi } 38772246da4SFelipe Balbi 38872246da4SFelipe Balbi /** 38972246da4SFelipe Balbi * dwc3_event_buffers_setup - setup our allocated event buffers 3901d046793SPaul Zimmerman * @dwc: pointer to our controller context structure 39172246da4SFelipe Balbi * 39272246da4SFelipe Balbi * Returns 0 on success otherwise negative errno. 39372246da4SFelipe Balbi */ 394f09cc79bSRoger Quadros int dwc3_event_buffers_setup(struct dwc3 *dwc) 39572246da4SFelipe Balbi { 39672246da4SFelipe Balbi struct dwc3_event_buffer *evt; 39772246da4SFelipe Balbi 398696c8b12SFelipe Balbi evt = dwc->ev_buf; 3997acd85e0SPaul Zimmerman evt->lpos = 0; 400660e9bdeSFelipe Balbi dwc3_writel(dwc->regs, DWC3_GEVNTADRLO(0), 40172246da4SFelipe Balbi lower_32_bits(evt->dma)); 402660e9bdeSFelipe Balbi dwc3_writel(dwc->regs, DWC3_GEVNTADRHI(0), 40372246da4SFelipe Balbi upper_32_bits(evt->dma)); 404660e9bdeSFelipe Balbi dwc3_writel(dwc->regs, DWC3_GEVNTSIZ(0), 40568d6a01bSFelipe Balbi DWC3_GEVNTSIZ_SIZE(evt->length)); 406660e9bdeSFelipe Balbi dwc3_writel(dwc->regs, DWC3_GEVNTCOUNT(0), 0); 40772246da4SFelipe Balbi 40872246da4SFelipe Balbi return 0; 40972246da4SFelipe Balbi } 41072246da4SFelipe Balbi 411f09cc79bSRoger Quadros void dwc3_event_buffers_cleanup(struct dwc3 *dwc) 41272246da4SFelipe Balbi { 41372246da4SFelipe Balbi struct dwc3_event_buffer *evt; 41472246da4SFelipe Balbi 415696c8b12SFelipe Balbi evt = dwc->ev_buf; 4167acd85e0SPaul Zimmerman 4177acd85e0SPaul Zimmerman evt->lpos = 0; 4187acd85e0SPaul Zimmerman 419660e9bdeSFelipe Balbi dwc3_writel(dwc->regs, DWC3_GEVNTADRLO(0), 0); 420660e9bdeSFelipe Balbi dwc3_writel(dwc->regs, DWC3_GEVNTADRHI(0), 0); 421660e9bdeSFelipe Balbi dwc3_writel(dwc->regs, DWC3_GEVNTSIZ(0), DWC3_GEVNTSIZ_INTMASK 42268d6a01bSFelipe Balbi | DWC3_GEVNTSIZ_SIZE(0)); 423660e9bdeSFelipe Balbi dwc3_writel(dwc->regs, DWC3_GEVNTCOUNT(0), 0); 42472246da4SFelipe Balbi } 42572246da4SFelipe Balbi 4260ffcaf37SFelipe Balbi static int dwc3_alloc_scratch_buffers(struct dwc3 *dwc) 4270ffcaf37SFelipe Balbi { 4280ffcaf37SFelipe Balbi if (!dwc->has_hibernation) 4290ffcaf37SFelipe Balbi return 0; 4300ffcaf37SFelipe Balbi 4310ffcaf37SFelipe Balbi if (!dwc->nr_scratch) 4320ffcaf37SFelipe Balbi return 0; 4330ffcaf37SFelipe Balbi 4340ffcaf37SFelipe Balbi dwc->scratchbuf = kmalloc_array(dwc->nr_scratch, 4350ffcaf37SFelipe Balbi DWC3_SCRATCHBUF_SIZE, GFP_KERNEL); 4360ffcaf37SFelipe Balbi if (!dwc->scratchbuf) 4370ffcaf37SFelipe Balbi return -ENOMEM; 4380ffcaf37SFelipe Balbi 4390ffcaf37SFelipe Balbi return 0; 4400ffcaf37SFelipe Balbi } 4410ffcaf37SFelipe Balbi 4420ffcaf37SFelipe Balbi static int dwc3_setup_scratch_buffers(struct dwc3 *dwc) 4430ffcaf37SFelipe Balbi { 4440ffcaf37SFelipe Balbi dma_addr_t scratch_addr; 4450ffcaf37SFelipe Balbi u32 param; 4460ffcaf37SFelipe Balbi int ret; 4470ffcaf37SFelipe Balbi 4480ffcaf37SFelipe Balbi if (!dwc->has_hibernation) 4490ffcaf37SFelipe Balbi return 0; 4500ffcaf37SFelipe Balbi 4510ffcaf37SFelipe Balbi if (!dwc->nr_scratch) 4520ffcaf37SFelipe Balbi return 0; 4530ffcaf37SFelipe Balbi 4540ffcaf37SFelipe Balbi /* should never fall here */ 4550ffcaf37SFelipe Balbi if (!WARN_ON(dwc->scratchbuf)) 4560ffcaf37SFelipe Balbi return 0; 4570ffcaf37SFelipe Balbi 458d64ff406SArnd Bergmann scratch_addr = dma_map_single(dwc->sysdev, dwc->scratchbuf, 4590ffcaf37SFelipe Balbi dwc->nr_scratch * DWC3_SCRATCHBUF_SIZE, 4600ffcaf37SFelipe Balbi DMA_BIDIRECTIONAL); 461d64ff406SArnd Bergmann if (dma_mapping_error(dwc->sysdev, scratch_addr)) { 462d64ff406SArnd Bergmann dev_err(dwc->sysdev, "failed to map scratch buffer\n"); 4630ffcaf37SFelipe Balbi ret = -EFAULT; 4640ffcaf37SFelipe Balbi goto err0; 4650ffcaf37SFelipe Balbi } 4660ffcaf37SFelipe Balbi 4670ffcaf37SFelipe Balbi dwc->scratch_addr = scratch_addr; 4680ffcaf37SFelipe Balbi 4690ffcaf37SFelipe Balbi param = lower_32_bits(scratch_addr); 4700ffcaf37SFelipe Balbi 4710ffcaf37SFelipe Balbi ret = dwc3_send_gadget_generic_command(dwc, 4720ffcaf37SFelipe Balbi DWC3_DGCMD_SET_SCRATCHPAD_ADDR_LO, param); 4730ffcaf37SFelipe Balbi if (ret < 0) 4740ffcaf37SFelipe Balbi goto err1; 4750ffcaf37SFelipe Balbi 4760ffcaf37SFelipe Balbi param = upper_32_bits(scratch_addr); 4770ffcaf37SFelipe Balbi 4780ffcaf37SFelipe Balbi ret = dwc3_send_gadget_generic_command(dwc, 4790ffcaf37SFelipe Balbi DWC3_DGCMD_SET_SCRATCHPAD_ADDR_HI, param); 4800ffcaf37SFelipe Balbi if (ret < 0) 4810ffcaf37SFelipe Balbi goto err1; 4820ffcaf37SFelipe Balbi 4830ffcaf37SFelipe Balbi return 0; 4840ffcaf37SFelipe Balbi 4850ffcaf37SFelipe Balbi err1: 486d64ff406SArnd Bergmann dma_unmap_single(dwc->sysdev, dwc->scratch_addr, dwc->nr_scratch * 4870ffcaf37SFelipe Balbi DWC3_SCRATCHBUF_SIZE, DMA_BIDIRECTIONAL); 4880ffcaf37SFelipe Balbi 4890ffcaf37SFelipe Balbi err0: 4900ffcaf37SFelipe Balbi return ret; 4910ffcaf37SFelipe Balbi } 4920ffcaf37SFelipe Balbi 4930ffcaf37SFelipe Balbi static void dwc3_free_scratch_buffers(struct dwc3 *dwc) 4940ffcaf37SFelipe Balbi { 4950ffcaf37SFelipe Balbi if (!dwc->has_hibernation) 4960ffcaf37SFelipe Balbi return; 4970ffcaf37SFelipe Balbi 4980ffcaf37SFelipe Balbi if (!dwc->nr_scratch) 4990ffcaf37SFelipe Balbi return; 5000ffcaf37SFelipe Balbi 5010ffcaf37SFelipe Balbi /* should never fall here */ 5020ffcaf37SFelipe Balbi if (!WARN_ON(dwc->scratchbuf)) 5030ffcaf37SFelipe Balbi return; 5040ffcaf37SFelipe Balbi 505d64ff406SArnd Bergmann dma_unmap_single(dwc->sysdev, dwc->scratch_addr, dwc->nr_scratch * 5060ffcaf37SFelipe Balbi DWC3_SCRATCHBUF_SIZE, DMA_BIDIRECTIONAL); 5070ffcaf37SFelipe Balbi kfree(dwc->scratchbuf); 5080ffcaf37SFelipe Balbi } 5090ffcaf37SFelipe Balbi 510789451f6SFelipe Balbi static void dwc3_core_num_eps(struct dwc3 *dwc) 511789451f6SFelipe Balbi { 512789451f6SFelipe Balbi struct dwc3_hwparams *parms = &dwc->hwparams; 513789451f6SFelipe Balbi 51447d3946eSBryan O'Donoghue dwc->num_eps = DWC3_NUM_EPS(parms); 515789451f6SFelipe Balbi } 516789451f6SFelipe Balbi 51741ac7b3aSBill Pemberton static void dwc3_cache_hwparams(struct dwc3 *dwc) 51826ceca97SFelipe Balbi { 51926ceca97SFelipe Balbi struct dwc3_hwparams *parms = &dwc->hwparams; 52026ceca97SFelipe Balbi 52126ceca97SFelipe Balbi parms->hwparams0 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS0); 52226ceca97SFelipe Balbi parms->hwparams1 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS1); 52326ceca97SFelipe Balbi parms->hwparams2 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS2); 52426ceca97SFelipe Balbi parms->hwparams3 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS3); 52526ceca97SFelipe Balbi parms->hwparams4 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS4); 52626ceca97SFelipe Balbi parms->hwparams5 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS5); 52726ceca97SFelipe Balbi parms->hwparams6 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS6); 52826ceca97SFelipe Balbi parms->hwparams7 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS7); 52926ceca97SFelipe Balbi parms->hwparams8 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS8); 53026ceca97SFelipe Balbi } 53126ceca97SFelipe Balbi 53298112041SRoger Quadros static int dwc3_core_ulpi_init(struct dwc3 *dwc) 53398112041SRoger Quadros { 53498112041SRoger Quadros int intf; 53598112041SRoger Quadros int ret = 0; 53698112041SRoger Quadros 53798112041SRoger Quadros intf = DWC3_GHWPARAMS3_HSPHY_IFC(dwc->hwparams.hwparams3); 53898112041SRoger Quadros 53998112041SRoger Quadros if (intf == DWC3_GHWPARAMS3_HSPHY_IFC_ULPI || 54098112041SRoger Quadros (intf == DWC3_GHWPARAMS3_HSPHY_IFC_UTMI_ULPI && 54198112041SRoger Quadros dwc->hsphy_interface && 54298112041SRoger Quadros !strncmp(dwc->hsphy_interface, "ulpi", 4))) 54398112041SRoger Quadros ret = dwc3_ulpi_init(dwc); 54498112041SRoger Quadros 54598112041SRoger Quadros return ret; 54698112041SRoger Quadros } 54798112041SRoger Quadros 54872246da4SFelipe Balbi /** 549b5a65c40SHuang Rui * dwc3_phy_setup - Configure USB PHY Interface of DWC3 Core 550b5a65c40SHuang Rui * @dwc: Pointer to our controller context structure 55188bc9d19SHeikki Krogerus * 55288bc9d19SHeikki Krogerus * Returns 0 on success. The USB PHY interfaces are configured but not 55388bc9d19SHeikki Krogerus * initialized. The PHY interfaces and the PHYs get initialized together with 55488bc9d19SHeikki Krogerus * the core in dwc3_core_init. 555b5a65c40SHuang Rui */ 55688bc9d19SHeikki Krogerus static int dwc3_phy_setup(struct dwc3 *dwc) 557b5a65c40SHuang Rui { 558b5a65c40SHuang Rui u32 reg; 559b5a65c40SHuang Rui 560b5a65c40SHuang Rui reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0)); 561b5a65c40SHuang Rui 5622164a476SHuang Rui /* 5631966b865SFelipe Balbi * Make sure UX_EXIT_PX is cleared as that causes issues with some 5641966b865SFelipe Balbi * PHYs. Also, this bit is not supposed to be used in normal operation. 5651966b865SFelipe Balbi */ 5661966b865SFelipe Balbi reg &= ~DWC3_GUSB3PIPECTL_UX_EXIT_PX; 5671966b865SFelipe Balbi 5681966b865SFelipe Balbi /* 5692164a476SHuang Rui * Above 1.94a, it is recommended to set DWC3_GUSB3PIPECTL_SUSPHY 5702164a476SHuang Rui * to '0' during coreConsultant configuration. So default value 5712164a476SHuang Rui * will be '0' when the core is reset. Application needs to set it 5722164a476SHuang Rui * to '1' after the core initialization is completed. 5732164a476SHuang Rui */ 5742164a476SHuang Rui if (dwc->revision > DWC3_REVISION_194A) 5752164a476SHuang Rui reg |= DWC3_GUSB3PIPECTL_SUSPHY; 5762164a476SHuang Rui 577b5a65c40SHuang Rui if (dwc->u2ss_inp3_quirk) 578b5a65c40SHuang Rui reg |= DWC3_GUSB3PIPECTL_U2SSINP3OK; 579b5a65c40SHuang Rui 580e58dd357SRajesh Bhagat if (dwc->dis_rxdet_inp3_quirk) 581e58dd357SRajesh Bhagat reg |= DWC3_GUSB3PIPECTL_DISRXDETINP3; 582e58dd357SRajesh Bhagat 583df31f5b3SHuang Rui if (dwc->req_p1p2p3_quirk) 584df31f5b3SHuang Rui reg |= DWC3_GUSB3PIPECTL_REQP1P2P3; 585df31f5b3SHuang Rui 586a2a1d0f5SHuang Rui if (dwc->del_p1p2p3_quirk) 587a2a1d0f5SHuang Rui reg |= DWC3_GUSB3PIPECTL_DEP1P2P3_EN; 588a2a1d0f5SHuang Rui 58941c06ffdSHuang Rui if (dwc->del_phy_power_chg_quirk) 59041c06ffdSHuang Rui reg |= DWC3_GUSB3PIPECTL_DEPOCHANGE; 59141c06ffdSHuang Rui 592fb67afcaSHuang Rui if (dwc->lfps_filter_quirk) 593fb67afcaSHuang Rui reg |= DWC3_GUSB3PIPECTL_LFPSFILT; 594fb67afcaSHuang Rui 59514f4ac53SHuang Rui if (dwc->rx_detect_poll_quirk) 59614f4ac53SHuang Rui reg |= DWC3_GUSB3PIPECTL_RX_DETOPOLL; 59714f4ac53SHuang Rui 5986b6a0c9aSHuang Rui if (dwc->tx_de_emphasis_quirk) 5996b6a0c9aSHuang Rui reg |= DWC3_GUSB3PIPECTL_TX_DEEPH(dwc->tx_de_emphasis); 6006b6a0c9aSHuang Rui 601cd72f890SFelipe Balbi if (dwc->dis_u3_susphy_quirk) 60259acfa20SHuang Rui reg &= ~DWC3_GUSB3PIPECTL_SUSPHY; 60359acfa20SHuang Rui 60400fe081dSWilliam Wu if (dwc->dis_del_phy_power_chg_quirk) 60500fe081dSWilliam Wu reg &= ~DWC3_GUSB3PIPECTL_DEPOCHANGE; 60600fe081dSWilliam Wu 607b5a65c40SHuang Rui dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg); 608b5a65c40SHuang Rui 6092164a476SHuang Rui reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0)); 6102164a476SHuang Rui 6113e10a2ceSHeikki Krogerus /* Select the HS PHY interface */ 6123e10a2ceSHeikki Krogerus switch (DWC3_GHWPARAMS3_HSPHY_IFC(dwc->hwparams.hwparams3)) { 6133e10a2ceSHeikki Krogerus case DWC3_GHWPARAMS3_HSPHY_IFC_UTMI_ULPI: 61443cacb03SFelipe Balbi if (dwc->hsphy_interface && 61543cacb03SFelipe Balbi !strncmp(dwc->hsphy_interface, "utmi", 4)) { 6163e10a2ceSHeikki Krogerus reg &= ~DWC3_GUSB2PHYCFG_ULPI_UTMI; 61788bc9d19SHeikki Krogerus break; 61843cacb03SFelipe Balbi } else if (dwc->hsphy_interface && 61943cacb03SFelipe Balbi !strncmp(dwc->hsphy_interface, "ulpi", 4)) { 6203e10a2ceSHeikki Krogerus reg |= DWC3_GUSB2PHYCFG_ULPI_UTMI; 62188bc9d19SHeikki Krogerus dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); 6223e10a2ceSHeikki Krogerus } else { 62388bc9d19SHeikki Krogerus /* Relying on default value. */ 62488bc9d19SHeikki Krogerus if (!(reg & DWC3_GUSB2PHYCFG_ULPI_UTMI)) 6253e10a2ceSHeikki Krogerus break; 6263e10a2ceSHeikki Krogerus } 6273e10a2ceSHeikki Krogerus /* FALLTHROUGH */ 62888bc9d19SHeikki Krogerus case DWC3_GHWPARAMS3_HSPHY_IFC_ULPI: 62988bc9d19SHeikki Krogerus /* FALLTHROUGH */ 6303e10a2ceSHeikki Krogerus default: 6313e10a2ceSHeikki Krogerus break; 6323e10a2ceSHeikki Krogerus } 6333e10a2ceSHeikki Krogerus 63432f2ed86SWilliam Wu switch (dwc->hsphy_mode) { 63532f2ed86SWilliam Wu case USBPHY_INTERFACE_MODE_UTMI: 63632f2ed86SWilliam Wu reg &= ~(DWC3_GUSB2PHYCFG_PHYIF_MASK | 63732f2ed86SWilliam Wu DWC3_GUSB2PHYCFG_USBTRDTIM_MASK); 63832f2ed86SWilliam Wu reg |= DWC3_GUSB2PHYCFG_PHYIF(UTMI_PHYIF_8_BIT) | 63932f2ed86SWilliam Wu DWC3_GUSB2PHYCFG_USBTRDTIM(USBTRDTIM_UTMI_8_BIT); 64032f2ed86SWilliam Wu break; 64132f2ed86SWilliam Wu case USBPHY_INTERFACE_MODE_UTMIW: 64232f2ed86SWilliam Wu reg &= ~(DWC3_GUSB2PHYCFG_PHYIF_MASK | 64332f2ed86SWilliam Wu DWC3_GUSB2PHYCFG_USBTRDTIM_MASK); 64432f2ed86SWilliam Wu reg |= DWC3_GUSB2PHYCFG_PHYIF(UTMI_PHYIF_16_BIT) | 64532f2ed86SWilliam Wu DWC3_GUSB2PHYCFG_USBTRDTIM(USBTRDTIM_UTMI_16_BIT); 64632f2ed86SWilliam Wu break; 64732f2ed86SWilliam Wu default: 64832f2ed86SWilliam Wu break; 64932f2ed86SWilliam Wu } 65032f2ed86SWilliam Wu 6512164a476SHuang Rui /* 6522164a476SHuang Rui * Above 1.94a, it is recommended to set DWC3_GUSB2PHYCFG_SUSPHY to 6532164a476SHuang Rui * '0' during coreConsultant configuration. So default value will 6542164a476SHuang Rui * be '0' when the core is reset. Application needs to set it to 6552164a476SHuang Rui * '1' after the core initialization is completed. 6562164a476SHuang Rui */ 6572164a476SHuang Rui if (dwc->revision > DWC3_REVISION_194A) 6582164a476SHuang Rui reg |= DWC3_GUSB2PHYCFG_SUSPHY; 6592164a476SHuang Rui 660cd72f890SFelipe Balbi if (dwc->dis_u2_susphy_quirk) 6610effe0a3SHuang Rui reg &= ~DWC3_GUSB2PHYCFG_SUSPHY; 6620effe0a3SHuang Rui 663ec791d14SJohn Youn if (dwc->dis_enblslpm_quirk) 664ec791d14SJohn Youn reg &= ~DWC3_GUSB2PHYCFG_ENBLSLPM; 665eafeacf1SThinh Nguyen else 666eafeacf1SThinh Nguyen reg |= DWC3_GUSB2PHYCFG_ENBLSLPM; 667ec791d14SJohn Youn 66816199f33SWilliam Wu if (dwc->dis_u2_freeclk_exists_quirk) 66916199f33SWilliam Wu reg &= ~DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS; 67016199f33SWilliam Wu 6712164a476SHuang Rui dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); 67288bc9d19SHeikki Krogerus 67388bc9d19SHeikki Krogerus return 0; 674b5a65c40SHuang Rui } 675b5a65c40SHuang Rui 676c499ff71SFelipe Balbi static void dwc3_core_exit(struct dwc3 *dwc) 677c499ff71SFelipe Balbi { 678c499ff71SFelipe Balbi dwc3_event_buffers_cleanup(dwc); 679c499ff71SFelipe Balbi 680c499ff71SFelipe Balbi usb_phy_shutdown(dwc->usb2_phy); 681c499ff71SFelipe Balbi usb_phy_shutdown(dwc->usb3_phy); 682c499ff71SFelipe Balbi phy_exit(dwc->usb2_generic_phy); 683c499ff71SFelipe Balbi phy_exit(dwc->usb3_generic_phy); 684c499ff71SFelipe Balbi 685c499ff71SFelipe Balbi usb_phy_set_suspend(dwc->usb2_phy, 1); 686c499ff71SFelipe Balbi usb_phy_set_suspend(dwc->usb3_phy, 1); 687c499ff71SFelipe Balbi phy_power_off(dwc->usb2_generic_phy); 688c499ff71SFelipe Balbi phy_power_off(dwc->usb3_generic_phy); 689fe8abf33SMasahiro Yamada clk_bulk_disable(dwc->num_clks, dwc->clks); 690fe8abf33SMasahiro Yamada clk_bulk_unprepare(dwc->num_clks, dwc->clks); 691fe8abf33SMasahiro Yamada reset_control_assert(dwc->reset); 692c499ff71SFelipe Balbi } 693c499ff71SFelipe Balbi 6940759956fSFelipe Balbi static bool dwc3_core_is_valid(struct dwc3 *dwc) 69572246da4SFelipe Balbi { 69672246da4SFelipe Balbi u32 reg; 69772246da4SFelipe Balbi 6987650bd74SSebastian Andrzej Siewior reg = dwc3_readl(dwc->regs, DWC3_GSNPSID); 6990759956fSFelipe Balbi 7007650bd74SSebastian Andrzej Siewior /* This should read as U3 followed by revision number */ 701690fb371SJohn Youn if ((reg & DWC3_GSNPSID_MASK) == 0x55330000) { 702690fb371SJohn Youn /* Detected DWC_usb3 IP */ 703690fb371SJohn Youn dwc->revision = reg; 704690fb371SJohn Youn } else if ((reg & DWC3_GSNPSID_MASK) == 0x33310000) { 705690fb371SJohn Youn /* Detected DWC_usb31 IP */ 706690fb371SJohn Youn dwc->revision = dwc3_readl(dwc->regs, DWC3_VER_NUMBER); 707690fb371SJohn Youn dwc->revision |= DWC3_REVISION_IS_DWC31; 708475d8e01SThinh Nguyen dwc->version_type = dwc3_readl(dwc->regs, DWC3_VER_TYPE); 709690fb371SJohn Youn } else { 7100759956fSFelipe Balbi return false; 7117650bd74SSebastian Andrzej Siewior } 7127650bd74SSebastian Andrzej Siewior 7130759956fSFelipe Balbi return true; 7140e1e5c47SPaul Zimmerman } 7150e1e5c47SPaul Zimmerman 716941f918eSFelipe Balbi static void dwc3_core_setup_global_control(struct dwc3 *dwc) 71772246da4SFelipe Balbi { 71872246da4SFelipe Balbi u32 hwparams4 = dwc->hwparams.hwparams4; 71972246da4SFelipe Balbi u32 reg; 720c499ff71SFelipe Balbi 7214878a028SSebastian Andrzej Siewior reg = dwc3_readl(dwc->regs, DWC3_GCTL); 7223e87c42aSPaul Zimmerman reg &= ~DWC3_GCTL_SCALEDOWN_MASK; 7234878a028SSebastian Andrzej Siewior 724164d7731SSebastian Andrzej Siewior switch (DWC3_GHWPARAMS1_EN_PWROPT(dwc->hwparams.hwparams1)) { 7254878a028SSebastian Andrzej Siewior case DWC3_GHWPARAMS1_EN_PWROPT_CLK: 72632a4a135SFelipe Balbi /** 72732a4a135SFelipe Balbi * WORKAROUND: DWC3 revisions between 2.10a and 2.50a have an 72832a4a135SFelipe Balbi * issue which would cause xHCI compliance tests to fail. 72932a4a135SFelipe Balbi * 73032a4a135SFelipe Balbi * Because of that we cannot enable clock gating on such 73132a4a135SFelipe Balbi * configurations. 73232a4a135SFelipe Balbi * 73332a4a135SFelipe Balbi * Refers to: 73432a4a135SFelipe Balbi * 73532a4a135SFelipe Balbi * STAR#9000588375: Clock Gating, SOF Issues when ref_clk-Based 73632a4a135SFelipe Balbi * SOF/ITP Mode Used 73732a4a135SFelipe Balbi */ 73832a4a135SFelipe Balbi if ((dwc->dr_mode == USB_DR_MODE_HOST || 73932a4a135SFelipe Balbi dwc->dr_mode == USB_DR_MODE_OTG) && 74032a4a135SFelipe Balbi (dwc->revision >= DWC3_REVISION_210A && 74132a4a135SFelipe Balbi dwc->revision <= DWC3_REVISION_250A)) 74232a4a135SFelipe Balbi reg |= DWC3_GCTL_DSBLCLKGTNG | DWC3_GCTL_SOFITPSYNC; 74332a4a135SFelipe Balbi else 7444878a028SSebastian Andrzej Siewior reg &= ~DWC3_GCTL_DSBLCLKGTNG; 7454878a028SSebastian Andrzej Siewior break; 7460ffcaf37SFelipe Balbi case DWC3_GHWPARAMS1_EN_PWROPT_HIB: 7470ffcaf37SFelipe Balbi /* enable hibernation here */ 7480ffcaf37SFelipe Balbi dwc->nr_scratch = DWC3_GHWPARAMS4_HIBER_SCRATCHBUFS(hwparams4); 7492eac3992SHuang Rui 7502eac3992SHuang Rui /* 7512eac3992SHuang Rui * REVISIT Enabling this bit so that host-mode hibernation 7522eac3992SHuang Rui * will work. Device-mode hibernation is not yet implemented. 7532eac3992SHuang Rui */ 7542eac3992SHuang Rui reg |= DWC3_GCTL_GBLHIBERNATIONEN; 7550ffcaf37SFelipe Balbi break; 7564878a028SSebastian Andrzej Siewior default: 7575eb30cedSFelipe Balbi /* nothing */ 7585eb30cedSFelipe Balbi break; 7594878a028SSebastian Andrzej Siewior } 7604878a028SSebastian Andrzej Siewior 761946bd579SHuang Rui /* check if current dwc3 is on simulation board */ 762946bd579SHuang Rui if (dwc->hwparams.hwparams6 & DWC3_GHWPARAMS6_EN_FPGA) { 7636af19fd1SFaisal Mehmood dev_info(dwc->dev, "Running with FPGA optimizations\n"); 764946bd579SHuang Rui dwc->is_fpga = true; 765946bd579SHuang Rui } 766946bd579SHuang Rui 7673b81221aSHuang Rui WARN_ONCE(dwc->disable_scramble_quirk && !dwc->is_fpga, 7683b81221aSHuang Rui "disable_scramble cannot be used on non-FPGA builds\n"); 7693b81221aSHuang Rui 7703b81221aSHuang Rui if (dwc->disable_scramble_quirk && dwc->is_fpga) 7713b81221aSHuang Rui reg |= DWC3_GCTL_DISSCRAMBLE; 7723b81221aSHuang Rui else 7733b81221aSHuang Rui reg &= ~DWC3_GCTL_DISSCRAMBLE; 7743b81221aSHuang Rui 7759a5b2f31SHuang Rui if (dwc->u2exit_lfps_quirk) 7769a5b2f31SHuang Rui reg |= DWC3_GCTL_U2EXIT_LFPS; 7779a5b2f31SHuang Rui 7784878a028SSebastian Andrzej Siewior /* 7794878a028SSebastian Andrzej Siewior * WORKAROUND: DWC3 revisions <1.90a have a bug 7801d046793SPaul Zimmerman * where the device can fail to connect at SuperSpeed 7814878a028SSebastian Andrzej Siewior * and falls back to high-speed mode which causes 7821d046793SPaul Zimmerman * the device to enter a Connect/Disconnect loop 7834878a028SSebastian Andrzej Siewior */ 7844878a028SSebastian Andrzej Siewior if (dwc->revision < DWC3_REVISION_190A) 7854878a028SSebastian Andrzej Siewior reg |= DWC3_GCTL_U2RSTECN; 7864878a028SSebastian Andrzej Siewior 7874878a028SSebastian Andrzej Siewior dwc3_writel(dwc->regs, DWC3_GCTL, reg); 788941f918eSFelipe Balbi } 7894878a028SSebastian Andrzej Siewior 790f54edb53SFelipe Balbi static int dwc3_core_get_phy(struct dwc3 *dwc); 79198112041SRoger Quadros static int dwc3_core_ulpi_init(struct dwc3 *dwc); 792f54edb53SFelipe Balbi 793d9612c2fSPengbo Mu /* set global incr burst type configuration registers */ 794d9612c2fSPengbo Mu static void dwc3_set_incr_burst_type(struct dwc3 *dwc) 795d9612c2fSPengbo Mu { 796d9612c2fSPengbo Mu struct device *dev = dwc->dev; 797d9612c2fSPengbo Mu /* incrx_mode : for INCR burst type. */ 798d9612c2fSPengbo Mu bool incrx_mode; 799d9612c2fSPengbo Mu /* incrx_size : for size of INCRX burst. */ 800d9612c2fSPengbo Mu u32 incrx_size; 801d9612c2fSPengbo Mu u32 *vals; 802d9612c2fSPengbo Mu u32 cfg; 803d9612c2fSPengbo Mu int ntype; 804d9612c2fSPengbo Mu int ret; 805d9612c2fSPengbo Mu int i; 806d9612c2fSPengbo Mu 807d9612c2fSPengbo Mu cfg = dwc3_readl(dwc->regs, DWC3_GSBUSCFG0); 808d9612c2fSPengbo Mu 809d9612c2fSPengbo Mu /* 810d9612c2fSPengbo Mu * Handle property "snps,incr-burst-type-adjustment". 811d9612c2fSPengbo Mu * Get the number of value from this property: 812d9612c2fSPengbo Mu * result <= 0, means this property is not supported. 813d9612c2fSPengbo Mu * result = 1, means INCRx burst mode supported. 814d9612c2fSPengbo Mu * result > 1, means undefined length burst mode supported. 815d9612c2fSPengbo Mu */ 816d9612c2fSPengbo Mu ntype = device_property_read_u32_array(dev, 817d9612c2fSPengbo Mu "snps,incr-burst-type-adjustment", NULL, 0); 818d9612c2fSPengbo Mu if (ntype <= 0) 819d9612c2fSPengbo Mu return; 820d9612c2fSPengbo Mu 821d9612c2fSPengbo Mu vals = kcalloc(ntype, sizeof(u32), GFP_KERNEL); 822d9612c2fSPengbo Mu if (!vals) { 823d9612c2fSPengbo Mu dev_err(dev, "Error to get memory\n"); 824d9612c2fSPengbo Mu return; 825d9612c2fSPengbo Mu } 826d9612c2fSPengbo Mu 827d9612c2fSPengbo Mu /* Get INCR burst type, and parse it */ 828d9612c2fSPengbo Mu ret = device_property_read_u32_array(dev, 829d9612c2fSPengbo Mu "snps,incr-burst-type-adjustment", vals, ntype); 830d9612c2fSPengbo Mu if (ret) { 83175ecb9ddSAndy Shevchenko kfree(vals); 832d9612c2fSPengbo Mu dev_err(dev, "Error to get property\n"); 833d9612c2fSPengbo Mu return; 834d9612c2fSPengbo Mu } 835d9612c2fSPengbo Mu 836d9612c2fSPengbo Mu incrx_size = *vals; 837d9612c2fSPengbo Mu 838d9612c2fSPengbo Mu if (ntype > 1) { 839d9612c2fSPengbo Mu /* INCRX (undefined length) burst mode */ 840d9612c2fSPengbo Mu incrx_mode = INCRX_UNDEF_LENGTH_BURST_MODE; 841d9612c2fSPengbo Mu for (i = 1; i < ntype; i++) { 842d9612c2fSPengbo Mu if (vals[i] > incrx_size) 843d9612c2fSPengbo Mu incrx_size = vals[i]; 844d9612c2fSPengbo Mu } 845d9612c2fSPengbo Mu } else { 846d9612c2fSPengbo Mu /* INCRX burst mode */ 847d9612c2fSPengbo Mu incrx_mode = INCRX_BURST_MODE; 848d9612c2fSPengbo Mu } 849d9612c2fSPengbo Mu 85075ecb9ddSAndy Shevchenko kfree(vals); 85175ecb9ddSAndy Shevchenko 852d9612c2fSPengbo Mu /* Enable Undefined Length INCR Burst and Enable INCRx Burst */ 853d9612c2fSPengbo Mu cfg &= ~DWC3_GSBUSCFG0_INCRBRST_MASK; 854d9612c2fSPengbo Mu if (incrx_mode) 855d9612c2fSPengbo Mu cfg |= DWC3_GSBUSCFG0_INCRBRSTENA; 856d9612c2fSPengbo Mu switch (incrx_size) { 857d9612c2fSPengbo Mu case 256: 858d9612c2fSPengbo Mu cfg |= DWC3_GSBUSCFG0_INCR256BRSTENA; 859d9612c2fSPengbo Mu break; 860d9612c2fSPengbo Mu case 128: 861d9612c2fSPengbo Mu cfg |= DWC3_GSBUSCFG0_INCR128BRSTENA; 862d9612c2fSPengbo Mu break; 863d9612c2fSPengbo Mu case 64: 864d9612c2fSPengbo Mu cfg |= DWC3_GSBUSCFG0_INCR64BRSTENA; 865d9612c2fSPengbo Mu break; 866d9612c2fSPengbo Mu case 32: 867d9612c2fSPengbo Mu cfg |= DWC3_GSBUSCFG0_INCR32BRSTENA; 868d9612c2fSPengbo Mu break; 869d9612c2fSPengbo Mu case 16: 870d9612c2fSPengbo Mu cfg |= DWC3_GSBUSCFG0_INCR16BRSTENA; 871d9612c2fSPengbo Mu break; 872d9612c2fSPengbo Mu case 8: 873d9612c2fSPengbo Mu cfg |= DWC3_GSBUSCFG0_INCR8BRSTENA; 874d9612c2fSPengbo Mu break; 875d9612c2fSPengbo Mu case 4: 876d9612c2fSPengbo Mu cfg |= DWC3_GSBUSCFG0_INCR4BRSTENA; 877d9612c2fSPengbo Mu break; 878d9612c2fSPengbo Mu case 1: 879d9612c2fSPengbo Mu break; 880d9612c2fSPengbo Mu default: 881d9612c2fSPengbo Mu dev_err(dev, "Invalid property\n"); 882d9612c2fSPengbo Mu break; 883d9612c2fSPengbo Mu } 884d9612c2fSPengbo Mu 885d9612c2fSPengbo Mu dwc3_writel(dwc->regs, DWC3_GSBUSCFG0, cfg); 886d9612c2fSPengbo Mu } 887d9612c2fSPengbo Mu 888941f918eSFelipe Balbi /** 889941f918eSFelipe Balbi * dwc3_core_init - Low-level initialization of DWC3 Core 890941f918eSFelipe Balbi * @dwc: Pointer to our controller context structure 891941f918eSFelipe Balbi * 892941f918eSFelipe Balbi * Returns 0 on success otherwise negative errno. 893941f918eSFelipe Balbi */ 894941f918eSFelipe Balbi static int dwc3_core_init(struct dwc3 *dwc) 895941f918eSFelipe Balbi { 896941f918eSFelipe Balbi u32 reg; 897941f918eSFelipe Balbi int ret; 898941f918eSFelipe Balbi 899941f918eSFelipe Balbi /* 900941f918eSFelipe Balbi * Write Linux Version Code to our GUID register so it's easy to figure 901941f918eSFelipe Balbi * out which kernel version a bug was found. 902941f918eSFelipe Balbi */ 903941f918eSFelipe Balbi dwc3_writel(dwc->regs, DWC3_GUID, LINUX_VERSION_CODE); 904941f918eSFelipe Balbi 905941f918eSFelipe Balbi /* Handle USB2.0-only core configuration */ 906941f918eSFelipe Balbi if (DWC3_GHWPARAMS3_SSPHY_IFC(dwc->hwparams.hwparams3) == 907941f918eSFelipe Balbi DWC3_GHWPARAMS3_SSPHY_IFC_DIS) { 908941f918eSFelipe Balbi if (dwc->maximum_speed == USB_SPEED_SUPER) 909941f918eSFelipe Balbi dwc->maximum_speed = USB_SPEED_HIGH; 910941f918eSFelipe Balbi } 911941f918eSFelipe Balbi 912941f918eSFelipe Balbi ret = dwc3_phy_setup(dwc); 913941f918eSFelipe Balbi if (ret) 914941f918eSFelipe Balbi goto err0; 915941f918eSFelipe Balbi 91698112041SRoger Quadros if (!dwc->ulpi_ready) { 91798112041SRoger Quadros ret = dwc3_core_ulpi_init(dwc); 91898112041SRoger Quadros if (ret) 91998112041SRoger Quadros goto err0; 92098112041SRoger Quadros dwc->ulpi_ready = true; 92198112041SRoger Quadros } 92298112041SRoger Quadros 92398112041SRoger Quadros if (!dwc->phys_ready) { 92498112041SRoger Quadros ret = dwc3_core_get_phy(dwc); 92598112041SRoger Quadros if (ret) 92698112041SRoger Quadros goto err0a; 92798112041SRoger Quadros dwc->phys_ready = true; 92898112041SRoger Quadros } 92998112041SRoger Quadros 93098112041SRoger Quadros ret = dwc3_core_soft_reset(dwc); 93198112041SRoger Quadros if (ret) 93298112041SRoger Quadros goto err0a; 93398112041SRoger Quadros 934941f918eSFelipe Balbi dwc3_core_setup_global_control(dwc); 935c499ff71SFelipe Balbi dwc3_core_num_eps(dwc); 9360ffcaf37SFelipe Balbi 9370ffcaf37SFelipe Balbi ret = dwc3_setup_scratch_buffers(dwc); 9380ffcaf37SFelipe Balbi if (ret) 939c499ff71SFelipe Balbi goto err1; 940c499ff71SFelipe Balbi 941c499ff71SFelipe Balbi /* Adjust Frame Length */ 942c499ff71SFelipe Balbi dwc3_frame_length_adjustment(dwc); 943c499ff71SFelipe Balbi 944d9612c2fSPengbo Mu dwc3_set_incr_burst_type(dwc); 945d9612c2fSPengbo Mu 946c499ff71SFelipe Balbi usb_phy_set_suspend(dwc->usb2_phy, 0); 947c499ff71SFelipe Balbi usb_phy_set_suspend(dwc->usb3_phy, 0); 948c499ff71SFelipe Balbi ret = phy_power_on(dwc->usb2_generic_phy); 949c499ff71SFelipe Balbi if (ret < 0) 9500ffcaf37SFelipe Balbi goto err2; 9510ffcaf37SFelipe Balbi 952c499ff71SFelipe Balbi ret = phy_power_on(dwc->usb3_generic_phy); 953c499ff71SFelipe Balbi if (ret < 0) 954c499ff71SFelipe Balbi goto err3; 955c499ff71SFelipe Balbi 956c499ff71SFelipe Balbi ret = dwc3_event_buffers_setup(dwc); 957c499ff71SFelipe Balbi if (ret) { 958c499ff71SFelipe Balbi dev_err(dwc->dev, "failed to setup event buffers\n"); 959c499ff71SFelipe Balbi goto err4; 960c499ff71SFelipe Balbi } 961c499ff71SFelipe Balbi 96206281d46SJohn Youn /* 96306281d46SJohn Youn * ENDXFER polling is available on version 3.10a and later of 96406281d46SJohn Youn * the DWC_usb3 controller. It is NOT available in the 96506281d46SJohn Youn * DWC_usb31 controller. 96606281d46SJohn Youn */ 96706281d46SJohn Youn if (!dwc3_is_usb31(dwc) && dwc->revision >= DWC3_REVISION_310A) { 96806281d46SJohn Youn reg = dwc3_readl(dwc->regs, DWC3_GUCTL2); 96906281d46SJohn Youn reg |= DWC3_GUCTL2_RST_ACTBITLATER; 97006281d46SJohn Youn dwc3_writel(dwc->regs, DWC3_GUCTL2, reg); 97106281d46SJohn Youn } 97206281d46SJohn Youn 97365db7a0cSWilliam Wu if (dwc->revision >= DWC3_REVISION_250A) { 9740bb39ca1SJohn Youn reg = dwc3_readl(dwc->regs, DWC3_GUCTL1); 97565db7a0cSWilliam Wu 97665db7a0cSWilliam Wu /* 97765db7a0cSWilliam Wu * Enable hardware control of sending remote wakeup 97865db7a0cSWilliam Wu * in HS when the device is in the L1 state. 97965db7a0cSWilliam Wu */ 98065db7a0cSWilliam Wu if (dwc->revision >= DWC3_REVISION_290A) 9810bb39ca1SJohn Youn reg |= DWC3_GUCTL1_DEV_L1_EXIT_BY_HW; 98265db7a0cSWilliam Wu 98365db7a0cSWilliam Wu if (dwc->dis_tx_ipgap_linecheck_quirk) 98465db7a0cSWilliam Wu reg |= DWC3_GUCTL1_TX_IPGAP_LINECHECK_DIS; 98565db7a0cSWilliam Wu 9860bb39ca1SJohn Youn dwc3_writel(dwc->regs, DWC3_GUCTL1, reg); 9870bb39ca1SJohn Youn } 9880bb39ca1SJohn Youn 989b138e23dSAnurag Kumar Vulisha if (dwc->dr_mode == USB_DR_MODE_HOST || 990b138e23dSAnurag Kumar Vulisha dwc->dr_mode == USB_DR_MODE_OTG) { 991b138e23dSAnurag Kumar Vulisha reg = dwc3_readl(dwc->regs, DWC3_GUCTL); 992b138e23dSAnurag Kumar Vulisha 993b138e23dSAnurag Kumar Vulisha /* 994b138e23dSAnurag Kumar Vulisha * Enable Auto retry Feature to make the controller operating in 995b138e23dSAnurag Kumar Vulisha * Host mode on seeing transaction errors(CRC errors or internal 996b138e23dSAnurag Kumar Vulisha * overrun scenerios) on IN transfers to reply to the device 997b138e23dSAnurag Kumar Vulisha * with a non-terminating retry ACK (i.e, an ACK transcation 998b138e23dSAnurag Kumar Vulisha * packet with Retry=1 & Nump != 0) 999b138e23dSAnurag Kumar Vulisha */ 1000b138e23dSAnurag Kumar Vulisha reg |= DWC3_GUCTL_HSTINAUTORETRY; 1001b138e23dSAnurag Kumar Vulisha 1002b138e23dSAnurag Kumar Vulisha dwc3_writel(dwc->regs, DWC3_GUCTL, reg); 1003b138e23dSAnurag Kumar Vulisha } 1004b138e23dSAnurag Kumar Vulisha 1005938a5ad1SThinh Nguyen /* 1006938a5ad1SThinh Nguyen * Must config both number of packets and max burst settings to enable 1007938a5ad1SThinh Nguyen * RX and/or TX threshold. 1008938a5ad1SThinh Nguyen */ 1009938a5ad1SThinh Nguyen if (dwc3_is_usb31(dwc) && dwc->dr_mode == USB_DR_MODE_HOST) { 1010938a5ad1SThinh Nguyen u8 rx_thr_num = dwc->rx_thr_num_pkt_prd; 1011938a5ad1SThinh Nguyen u8 rx_maxburst = dwc->rx_max_burst_prd; 1012938a5ad1SThinh Nguyen u8 tx_thr_num = dwc->tx_thr_num_pkt_prd; 1013938a5ad1SThinh Nguyen u8 tx_maxburst = dwc->tx_max_burst_prd; 1014938a5ad1SThinh Nguyen 1015938a5ad1SThinh Nguyen if (rx_thr_num && rx_maxburst) { 1016938a5ad1SThinh Nguyen reg = dwc3_readl(dwc->regs, DWC3_GRXTHRCFG); 1017938a5ad1SThinh Nguyen reg |= DWC31_RXTHRNUMPKTSEL_PRD; 1018938a5ad1SThinh Nguyen 1019938a5ad1SThinh Nguyen reg &= ~DWC31_RXTHRNUMPKT_PRD(~0); 1020938a5ad1SThinh Nguyen reg |= DWC31_RXTHRNUMPKT_PRD(rx_thr_num); 1021938a5ad1SThinh Nguyen 1022938a5ad1SThinh Nguyen reg &= ~DWC31_MAXRXBURSTSIZE_PRD(~0); 1023938a5ad1SThinh Nguyen reg |= DWC31_MAXRXBURSTSIZE_PRD(rx_maxburst); 1024938a5ad1SThinh Nguyen 1025938a5ad1SThinh Nguyen dwc3_writel(dwc->regs, DWC3_GRXTHRCFG, reg); 1026938a5ad1SThinh Nguyen } 1027938a5ad1SThinh Nguyen 1028938a5ad1SThinh Nguyen if (tx_thr_num && tx_maxburst) { 1029938a5ad1SThinh Nguyen reg = dwc3_readl(dwc->regs, DWC3_GTXTHRCFG); 1030938a5ad1SThinh Nguyen reg |= DWC31_TXTHRNUMPKTSEL_PRD; 1031938a5ad1SThinh Nguyen 1032938a5ad1SThinh Nguyen reg &= ~DWC31_TXTHRNUMPKT_PRD(~0); 1033938a5ad1SThinh Nguyen reg |= DWC31_TXTHRNUMPKT_PRD(tx_thr_num); 1034938a5ad1SThinh Nguyen 1035938a5ad1SThinh Nguyen reg &= ~DWC31_MAXTXBURSTSIZE_PRD(~0); 1036938a5ad1SThinh Nguyen reg |= DWC31_MAXTXBURSTSIZE_PRD(tx_maxburst); 1037938a5ad1SThinh Nguyen 1038938a5ad1SThinh Nguyen dwc3_writel(dwc->regs, DWC3_GTXTHRCFG, reg); 1039938a5ad1SThinh Nguyen } 1040938a5ad1SThinh Nguyen } 1041938a5ad1SThinh Nguyen 104272246da4SFelipe Balbi return 0; 104372246da4SFelipe Balbi 1044c499ff71SFelipe Balbi err4: 10459b9d7cddSVivek Gautam phy_power_off(dwc->usb3_generic_phy); 1046c499ff71SFelipe Balbi 1047c499ff71SFelipe Balbi err3: 10489b9d7cddSVivek Gautam phy_power_off(dwc->usb2_generic_phy); 1049c499ff71SFelipe Balbi 10500ffcaf37SFelipe Balbi err2: 1051c499ff71SFelipe Balbi usb_phy_set_suspend(dwc->usb2_phy, 1); 1052c499ff71SFelipe Balbi usb_phy_set_suspend(dwc->usb3_phy, 1); 10530ffcaf37SFelipe Balbi 10540ffcaf37SFelipe Balbi err1: 10550ffcaf37SFelipe Balbi usb_phy_shutdown(dwc->usb2_phy); 10560ffcaf37SFelipe Balbi usb_phy_shutdown(dwc->usb3_phy); 105757303488SKishon Vijay Abraham I phy_exit(dwc->usb2_generic_phy); 105857303488SKishon Vijay Abraham I phy_exit(dwc->usb3_generic_phy); 10590ffcaf37SFelipe Balbi 106098112041SRoger Quadros err0a: 106198112041SRoger Quadros dwc3_ulpi_exit(dwc); 106298112041SRoger Quadros 106372246da4SFelipe Balbi err0: 106472246da4SFelipe Balbi return ret; 106572246da4SFelipe Balbi } 106672246da4SFelipe Balbi 10673c9f94acSFelipe Balbi static int dwc3_core_get_phy(struct dwc3 *dwc) 106872246da4SFelipe Balbi { 10693c9f94acSFelipe Balbi struct device *dev = dwc->dev; 1070941ea361SFelipe Balbi struct device_node *node = dev->of_node; 10713c9f94acSFelipe Balbi int ret; 107272246da4SFelipe Balbi 10735088b6f5SKishon Vijay Abraham I if (node) { 10745088b6f5SKishon Vijay Abraham I dwc->usb2_phy = devm_usb_get_phy_by_phandle(dev, "usb-phy", 0); 10755088b6f5SKishon Vijay Abraham I dwc->usb3_phy = devm_usb_get_phy_by_phandle(dev, "usb-phy", 1); 1076bb674907SFelipe Balbi } else { 1077bb674907SFelipe Balbi dwc->usb2_phy = devm_usb_get_phy(dev, USB_PHY_TYPE_USB2); 1078bb674907SFelipe Balbi dwc->usb3_phy = devm_usb_get_phy(dev, USB_PHY_TYPE_USB3); 10795088b6f5SKishon Vijay Abraham I } 10805088b6f5SKishon Vijay Abraham I 1081d105e7f8SFelipe Balbi if (IS_ERR(dwc->usb2_phy)) { 1082d105e7f8SFelipe Balbi ret = PTR_ERR(dwc->usb2_phy); 1083122f06e6SKishon Vijay Abraham I if (ret == -ENXIO || ret == -ENODEV) { 1084122f06e6SKishon Vijay Abraham I dwc->usb2_phy = NULL; 1085122f06e6SKishon Vijay Abraham I } else if (ret == -EPROBE_DEFER) { 1086d105e7f8SFelipe Balbi return ret; 1087122f06e6SKishon Vijay Abraham I } else { 108851e1e7bcSFelipe Balbi dev_err(dev, "no usb2 phy configured\n"); 1089122f06e6SKishon Vijay Abraham I return ret; 1090122f06e6SKishon Vijay Abraham I } 109151e1e7bcSFelipe Balbi } 109251e1e7bcSFelipe Balbi 1093d105e7f8SFelipe Balbi if (IS_ERR(dwc->usb3_phy)) { 1094315955d7SRuchika Kharwar ret = PTR_ERR(dwc->usb3_phy); 1095122f06e6SKishon Vijay Abraham I if (ret == -ENXIO || ret == -ENODEV) { 1096122f06e6SKishon Vijay Abraham I dwc->usb3_phy = NULL; 1097122f06e6SKishon Vijay Abraham I } else if (ret == -EPROBE_DEFER) { 1098d105e7f8SFelipe Balbi return ret; 1099122f06e6SKishon Vijay Abraham I } else { 110051e1e7bcSFelipe Balbi dev_err(dev, "no usb3 phy configured\n"); 1101122f06e6SKishon Vijay Abraham I return ret; 1102122f06e6SKishon Vijay Abraham I } 110351e1e7bcSFelipe Balbi } 110451e1e7bcSFelipe Balbi 110557303488SKishon Vijay Abraham I dwc->usb2_generic_phy = devm_phy_get(dev, "usb2-phy"); 110657303488SKishon Vijay Abraham I if (IS_ERR(dwc->usb2_generic_phy)) { 110757303488SKishon Vijay Abraham I ret = PTR_ERR(dwc->usb2_generic_phy); 110857303488SKishon Vijay Abraham I if (ret == -ENOSYS || ret == -ENODEV) { 110957303488SKishon Vijay Abraham I dwc->usb2_generic_phy = NULL; 111057303488SKishon Vijay Abraham I } else if (ret == -EPROBE_DEFER) { 111157303488SKishon Vijay Abraham I return ret; 111257303488SKishon Vijay Abraham I } else { 111357303488SKishon Vijay Abraham I dev_err(dev, "no usb2 phy configured\n"); 111457303488SKishon Vijay Abraham I return ret; 111557303488SKishon Vijay Abraham I } 111657303488SKishon Vijay Abraham I } 111757303488SKishon Vijay Abraham I 111857303488SKishon Vijay Abraham I dwc->usb3_generic_phy = devm_phy_get(dev, "usb3-phy"); 111957303488SKishon Vijay Abraham I if (IS_ERR(dwc->usb3_generic_phy)) { 112057303488SKishon Vijay Abraham I ret = PTR_ERR(dwc->usb3_generic_phy); 112157303488SKishon Vijay Abraham I if (ret == -ENOSYS || ret == -ENODEV) { 112257303488SKishon Vijay Abraham I dwc->usb3_generic_phy = NULL; 112357303488SKishon Vijay Abraham I } else if (ret == -EPROBE_DEFER) { 112457303488SKishon Vijay Abraham I return ret; 112557303488SKishon Vijay Abraham I } else { 112657303488SKishon Vijay Abraham I dev_err(dev, "no usb3 phy configured\n"); 112757303488SKishon Vijay Abraham I return ret; 112857303488SKishon Vijay Abraham I } 112957303488SKishon Vijay Abraham I } 113057303488SKishon Vijay Abraham I 11313c9f94acSFelipe Balbi return 0; 11323c9f94acSFelipe Balbi } 11333c9f94acSFelipe Balbi 11345f94adfeSFelipe Balbi static int dwc3_core_init_mode(struct dwc3 *dwc) 11355f94adfeSFelipe Balbi { 11365f94adfeSFelipe Balbi struct device *dev = dwc->dev; 11375f94adfeSFelipe Balbi int ret; 11385f94adfeSFelipe Balbi 11395f94adfeSFelipe Balbi switch (dwc->dr_mode) { 11405f94adfeSFelipe Balbi case USB_DR_MODE_PERIPHERAL: 114141ce1456SRoger Quadros dwc3_set_prtcap(dwc, DWC3_GCTL_PRTCAP_DEVICE); 1142958d1a4cSFelipe Balbi 1143958d1a4cSFelipe Balbi if (dwc->usb2_phy) 1144958d1a4cSFelipe Balbi otg_set_vbus(dwc->usb2_phy->otg, false); 1145958d1a4cSFelipe Balbi phy_set_mode(dwc->usb2_generic_phy, PHY_MODE_USB_DEVICE); 1146644cbbc3SManu Gautam phy_set_mode(dwc->usb3_generic_phy, PHY_MODE_USB_DEVICE); 1147958d1a4cSFelipe Balbi 11485f94adfeSFelipe Balbi ret = dwc3_gadget_init(dwc); 11495f94adfeSFelipe Balbi if (ret) { 11509522def4SRoger Quadros if (ret != -EPROBE_DEFER) 11515f94adfeSFelipe Balbi dev_err(dev, "failed to initialize gadget\n"); 11525f94adfeSFelipe Balbi return ret; 11535f94adfeSFelipe Balbi } 11545f94adfeSFelipe Balbi break; 11555f94adfeSFelipe Balbi case USB_DR_MODE_HOST: 115641ce1456SRoger Quadros dwc3_set_prtcap(dwc, DWC3_GCTL_PRTCAP_HOST); 1157958d1a4cSFelipe Balbi 1158958d1a4cSFelipe Balbi if (dwc->usb2_phy) 1159958d1a4cSFelipe Balbi otg_set_vbus(dwc->usb2_phy->otg, true); 1160958d1a4cSFelipe Balbi phy_set_mode(dwc->usb2_generic_phy, PHY_MODE_USB_HOST); 1161644cbbc3SManu Gautam phy_set_mode(dwc->usb3_generic_phy, PHY_MODE_USB_HOST); 1162958d1a4cSFelipe Balbi 11635f94adfeSFelipe Balbi ret = dwc3_host_init(dwc); 11645f94adfeSFelipe Balbi if (ret) { 11659522def4SRoger Quadros if (ret != -EPROBE_DEFER) 11665f94adfeSFelipe Balbi dev_err(dev, "failed to initialize host\n"); 11675f94adfeSFelipe Balbi return ret; 11685f94adfeSFelipe Balbi } 1169d8c80bb3SVivek Gautam phy_calibrate(dwc->usb2_generic_phy); 11705f94adfeSFelipe Balbi break; 11715f94adfeSFelipe Balbi case USB_DR_MODE_OTG: 117241ce1456SRoger Quadros INIT_WORK(&dwc->drd_work, __dwc3_set_mode); 11739840354fSRoger Quadros ret = dwc3_drd_init(dwc); 11749840354fSRoger Quadros if (ret) { 11759840354fSRoger Quadros if (ret != -EPROBE_DEFER) 11769840354fSRoger Quadros dev_err(dev, "failed to initialize dual-role\n"); 11779840354fSRoger Quadros return ret; 11789840354fSRoger Quadros } 11795f94adfeSFelipe Balbi break; 11805f94adfeSFelipe Balbi default: 11815f94adfeSFelipe Balbi dev_err(dev, "Unsupported mode of operation %d\n", dwc->dr_mode); 11825f94adfeSFelipe Balbi return -EINVAL; 11835f94adfeSFelipe Balbi } 11845f94adfeSFelipe Balbi 11855f94adfeSFelipe Balbi return 0; 11865f94adfeSFelipe Balbi } 11875f94adfeSFelipe Balbi 11885f94adfeSFelipe Balbi static void dwc3_core_exit_mode(struct dwc3 *dwc) 11895f94adfeSFelipe Balbi { 11905f94adfeSFelipe Balbi switch (dwc->dr_mode) { 11915f94adfeSFelipe Balbi case USB_DR_MODE_PERIPHERAL: 11925f94adfeSFelipe Balbi dwc3_gadget_exit(dwc); 11935f94adfeSFelipe Balbi break; 11945f94adfeSFelipe Balbi case USB_DR_MODE_HOST: 11955f94adfeSFelipe Balbi dwc3_host_exit(dwc); 11965f94adfeSFelipe Balbi break; 11975f94adfeSFelipe Balbi case USB_DR_MODE_OTG: 11989840354fSRoger Quadros dwc3_drd_exit(dwc); 11995f94adfeSFelipe Balbi break; 12005f94adfeSFelipe Balbi default: 12015f94adfeSFelipe Balbi /* do nothing */ 12025f94adfeSFelipe Balbi break; 12035f94adfeSFelipe Balbi } 12045f94adfeSFelipe Balbi } 12055f94adfeSFelipe Balbi 1206c5ac6116SFelipe Balbi static void dwc3_get_properties(struct dwc3 *dwc) 12073c9f94acSFelipe Balbi { 1208c5ac6116SFelipe Balbi struct device *dev = dwc->dev; 120980caf7d2SHuang Rui u8 lpm_nyet_threshold; 12106b6a0c9aSHuang Rui u8 tx_de_emphasis; 1211460d098cSHuang Rui u8 hird_threshold; 1212938a5ad1SThinh Nguyen u8 rx_thr_num_pkt_prd; 1213938a5ad1SThinh Nguyen u8 rx_max_burst_prd; 1214938a5ad1SThinh Nguyen u8 tx_thr_num_pkt_prd; 1215938a5ad1SThinh Nguyen u8 tx_max_burst_prd; 12163c9f94acSFelipe Balbi 121780caf7d2SHuang Rui /* default to highest possible threshold */ 12188d791929SThinh Nguyen lpm_nyet_threshold = 0xf; 121980caf7d2SHuang Rui 12206b6a0c9aSHuang Rui /* default to -3.5dB de-emphasis */ 12216b6a0c9aSHuang Rui tx_de_emphasis = 1; 12226b6a0c9aSHuang Rui 1223460d098cSHuang Rui /* 1224460d098cSHuang Rui * default to assert utmi_sleep_n and use maximum allowed HIRD 1225460d098cSHuang Rui * threshold value of 0b1100 1226460d098cSHuang Rui */ 1227460d098cSHuang Rui hird_threshold = 12; 1228460d098cSHuang Rui 122963863b98SHeikki Krogerus dwc->maximum_speed = usb_get_maximum_speed(dev); 123006e7114fSHeikki Krogerus dwc->dr_mode = usb_get_dr_mode(dev); 123132f2ed86SWilliam Wu dwc->hsphy_mode = of_usb_get_phy_mode(dev->of_node); 123263863b98SHeikki Krogerus 1233d64ff406SArnd Bergmann dwc->sysdev_is_parent = device_property_read_bool(dev, 1234d64ff406SArnd Bergmann "linux,sysdev_is_parent"); 1235d64ff406SArnd Bergmann if (dwc->sysdev_is_parent) 1236d64ff406SArnd Bergmann dwc->sysdev = dwc->dev->parent; 1237d64ff406SArnd Bergmann else 1238d64ff406SArnd Bergmann dwc->sysdev = dwc->dev; 1239d64ff406SArnd Bergmann 12403d128919SHeikki Krogerus dwc->has_lpm_erratum = device_property_read_bool(dev, 124180caf7d2SHuang Rui "snps,has-lpm-erratum"); 12423d128919SHeikki Krogerus device_property_read_u8(dev, "snps,lpm-nyet-threshold", 124380caf7d2SHuang Rui &lpm_nyet_threshold); 12443d128919SHeikki Krogerus dwc->is_utmi_l1_suspend = device_property_read_bool(dev, 1245460d098cSHuang Rui "snps,is-utmi-l1-suspend"); 12463d128919SHeikki Krogerus device_property_read_u8(dev, "snps,hird-threshold", 1247460d098cSHuang Rui &hird_threshold); 1248d92021f6SThinh Nguyen dwc->dis_start_transfer_quirk = device_property_read_bool(dev, 1249d92021f6SThinh Nguyen "snps,dis-start-transfer-quirk"); 12503d128919SHeikki Krogerus dwc->usb3_lpm_capable = device_property_read_bool(dev, 1251eac68e8fSRobert Baldyga "snps,usb3_lpm_capable"); 1252022a0208SThinh Nguyen dwc->usb2_lpm_disable = device_property_read_bool(dev, 1253022a0208SThinh Nguyen "snps,usb2-lpm-disable"); 1254938a5ad1SThinh Nguyen device_property_read_u8(dev, "snps,rx-thr-num-pkt-prd", 1255938a5ad1SThinh Nguyen &rx_thr_num_pkt_prd); 1256938a5ad1SThinh Nguyen device_property_read_u8(dev, "snps,rx-max-burst-prd", 1257938a5ad1SThinh Nguyen &rx_max_burst_prd); 1258938a5ad1SThinh Nguyen device_property_read_u8(dev, "snps,tx-thr-num-pkt-prd", 1259938a5ad1SThinh Nguyen &tx_thr_num_pkt_prd); 1260938a5ad1SThinh Nguyen device_property_read_u8(dev, "snps,tx-max-burst-prd", 1261938a5ad1SThinh Nguyen &tx_max_burst_prd); 12623c9f94acSFelipe Balbi 12633d128919SHeikki Krogerus dwc->disable_scramble_quirk = device_property_read_bool(dev, 12643b81221aSHuang Rui "snps,disable_scramble_quirk"); 12653d128919SHeikki Krogerus dwc->u2exit_lfps_quirk = device_property_read_bool(dev, 12669a5b2f31SHuang Rui "snps,u2exit_lfps_quirk"); 12673d128919SHeikki Krogerus dwc->u2ss_inp3_quirk = device_property_read_bool(dev, 1268b5a65c40SHuang Rui "snps,u2ss_inp3_quirk"); 12693d128919SHeikki Krogerus dwc->req_p1p2p3_quirk = device_property_read_bool(dev, 1270df31f5b3SHuang Rui "snps,req_p1p2p3_quirk"); 12713d128919SHeikki Krogerus dwc->del_p1p2p3_quirk = device_property_read_bool(dev, 1272a2a1d0f5SHuang Rui "snps,del_p1p2p3_quirk"); 12733d128919SHeikki Krogerus dwc->del_phy_power_chg_quirk = device_property_read_bool(dev, 127441c06ffdSHuang Rui "snps,del_phy_power_chg_quirk"); 12753d128919SHeikki Krogerus dwc->lfps_filter_quirk = device_property_read_bool(dev, 1276fb67afcaSHuang Rui "snps,lfps_filter_quirk"); 12773d128919SHeikki Krogerus dwc->rx_detect_poll_quirk = device_property_read_bool(dev, 127814f4ac53SHuang Rui "snps,rx_detect_poll_quirk"); 12793d128919SHeikki Krogerus dwc->dis_u3_susphy_quirk = device_property_read_bool(dev, 128059acfa20SHuang Rui "snps,dis_u3_susphy_quirk"); 12813d128919SHeikki Krogerus dwc->dis_u2_susphy_quirk = device_property_read_bool(dev, 12820effe0a3SHuang Rui "snps,dis_u2_susphy_quirk"); 1283ec791d14SJohn Youn dwc->dis_enblslpm_quirk = device_property_read_bool(dev, 1284ec791d14SJohn Youn "snps,dis_enblslpm_quirk"); 1285729dcffdSAnurag Kumar Vulisha dwc->dis_u1_entry_quirk = device_property_read_bool(dev, 1286729dcffdSAnurag Kumar Vulisha "snps,dis-u1-entry-quirk"); 1287729dcffdSAnurag Kumar Vulisha dwc->dis_u2_entry_quirk = device_property_read_bool(dev, 1288729dcffdSAnurag Kumar Vulisha "snps,dis-u2-entry-quirk"); 1289e58dd357SRajesh Bhagat dwc->dis_rxdet_inp3_quirk = device_property_read_bool(dev, 1290e58dd357SRajesh Bhagat "snps,dis_rxdet_inp3_quirk"); 129116199f33SWilliam Wu dwc->dis_u2_freeclk_exists_quirk = device_property_read_bool(dev, 129216199f33SWilliam Wu "snps,dis-u2-freeclk-exists-quirk"); 129300fe081dSWilliam Wu dwc->dis_del_phy_power_chg_quirk = device_property_read_bool(dev, 129400fe081dSWilliam Wu "snps,dis-del-phy-power-chg-quirk"); 129565db7a0cSWilliam Wu dwc->dis_tx_ipgap_linecheck_quirk = device_property_read_bool(dev, 129665db7a0cSWilliam Wu "snps,dis-tx-ipgap-linecheck-quirk"); 12976b6a0c9aSHuang Rui 12983d128919SHeikki Krogerus dwc->tx_de_emphasis_quirk = device_property_read_bool(dev, 12996b6a0c9aSHuang Rui "snps,tx_de_emphasis_quirk"); 13003d128919SHeikki Krogerus device_property_read_u8(dev, "snps,tx_de_emphasis", 13016b6a0c9aSHuang Rui &tx_de_emphasis); 13023d128919SHeikki Krogerus device_property_read_string(dev, "snps,hsphy_interface", 13033e10a2ceSHeikki Krogerus &dwc->hsphy_interface); 13043d128919SHeikki Krogerus device_property_read_u32(dev, "snps,quirk-frame-length-adjustment", 1305bcdb3272SFelipe Balbi &dwc->fladj); 13063d128919SHeikki Krogerus 130742bf02ecSRoger Quadros dwc->dis_metastability_quirk = device_property_read_bool(dev, 130842bf02ecSRoger Quadros "snps,dis_metastability_quirk"); 130942bf02ecSRoger Quadros 131080caf7d2SHuang Rui dwc->lpm_nyet_threshold = lpm_nyet_threshold; 13116b6a0c9aSHuang Rui dwc->tx_de_emphasis = tx_de_emphasis; 131280caf7d2SHuang Rui 1313460d098cSHuang Rui dwc->hird_threshold = hird_threshold 1314460d098cSHuang Rui | (dwc->is_utmi_l1_suspend << 4); 1315460d098cSHuang Rui 1316938a5ad1SThinh Nguyen dwc->rx_thr_num_pkt_prd = rx_thr_num_pkt_prd; 1317938a5ad1SThinh Nguyen dwc->rx_max_burst_prd = rx_max_burst_prd; 1318938a5ad1SThinh Nguyen 1319938a5ad1SThinh Nguyen dwc->tx_thr_num_pkt_prd = tx_thr_num_pkt_prd; 1320938a5ad1SThinh Nguyen dwc->tx_max_burst_prd = tx_max_burst_prd; 1321938a5ad1SThinh Nguyen 1322cf40b86bSJohn Youn dwc->imod_interval = 0; 1323cf40b86bSJohn Youn } 1324cf40b86bSJohn Youn 1325cf40b86bSJohn Youn /* check whether the core supports IMOD */ 1326cf40b86bSJohn Youn bool dwc3_has_imod(struct dwc3 *dwc) 1327cf40b86bSJohn Youn { 1328cf40b86bSJohn Youn return ((dwc3_is_usb3(dwc) && 1329cf40b86bSJohn Youn dwc->revision >= DWC3_REVISION_300A) || 1330cf40b86bSJohn Youn (dwc3_is_usb31(dwc) && 1331cf40b86bSJohn Youn dwc->revision >= DWC3_USB31_REVISION_120A)); 1332c5ac6116SFelipe Balbi } 1333c5ac6116SFelipe Balbi 13347ac51a12SJohn Youn static void dwc3_check_params(struct dwc3 *dwc) 13357ac51a12SJohn Youn { 13367ac51a12SJohn Youn struct device *dev = dwc->dev; 13377ac51a12SJohn Youn 1338cf40b86bSJohn Youn /* Check for proper value of imod_interval */ 1339cf40b86bSJohn Youn if (dwc->imod_interval && !dwc3_has_imod(dwc)) { 1340cf40b86bSJohn Youn dev_warn(dwc->dev, "Interrupt moderation not supported\n"); 1341cf40b86bSJohn Youn dwc->imod_interval = 0; 1342cf40b86bSJohn Youn } 1343cf40b86bSJohn Youn 134428632b44SJohn Youn /* 134528632b44SJohn Youn * Workaround for STAR 9000961433 which affects only version 134628632b44SJohn Youn * 3.00a of the DWC_usb3 core. This prevents the controller 134728632b44SJohn Youn * interrupt from being masked while handling events. IMOD 134828632b44SJohn Youn * allows us to work around this issue. Enable it for the 134928632b44SJohn Youn * affected version. 135028632b44SJohn Youn */ 135128632b44SJohn Youn if (!dwc->imod_interval && 135228632b44SJohn Youn (dwc->revision == DWC3_REVISION_300A)) 135328632b44SJohn Youn dwc->imod_interval = 1; 135428632b44SJohn Youn 13557ac51a12SJohn Youn /* Check the maximum_speed parameter */ 13567ac51a12SJohn Youn switch (dwc->maximum_speed) { 13577ac51a12SJohn Youn case USB_SPEED_LOW: 13587ac51a12SJohn Youn case USB_SPEED_FULL: 13597ac51a12SJohn Youn case USB_SPEED_HIGH: 13607ac51a12SJohn Youn case USB_SPEED_SUPER: 13617ac51a12SJohn Youn case USB_SPEED_SUPER_PLUS: 13627ac51a12SJohn Youn break; 13637ac51a12SJohn Youn default: 13647ac51a12SJohn Youn dev_err(dev, "invalid maximum_speed parameter %d\n", 13657ac51a12SJohn Youn dwc->maximum_speed); 13667ac51a12SJohn Youn /* fall through */ 13677ac51a12SJohn Youn case USB_SPEED_UNKNOWN: 13687ac51a12SJohn Youn /* default to superspeed */ 13697ac51a12SJohn Youn dwc->maximum_speed = USB_SPEED_SUPER; 13707ac51a12SJohn Youn 13717ac51a12SJohn Youn /* 13727ac51a12SJohn Youn * default to superspeed plus if we are capable. 13737ac51a12SJohn Youn */ 13747ac51a12SJohn Youn if (dwc3_is_usb31(dwc) && 13757ac51a12SJohn Youn (DWC3_GHWPARAMS3_SSPHY_IFC(dwc->hwparams.hwparams3) == 13767ac51a12SJohn Youn DWC3_GHWPARAMS3_SSPHY_IFC_GEN2)) 13777ac51a12SJohn Youn dwc->maximum_speed = USB_SPEED_SUPER_PLUS; 13787ac51a12SJohn Youn 13797ac51a12SJohn Youn break; 13807ac51a12SJohn Youn } 13817ac51a12SJohn Youn } 13827ac51a12SJohn Youn 1383c5ac6116SFelipe Balbi static int dwc3_probe(struct platform_device *pdev) 1384c5ac6116SFelipe Balbi { 1385c5ac6116SFelipe Balbi struct device *dev = &pdev->dev; 138644feb8e6SMasahiro Yamada struct resource *res, dwc_res; 1387c5ac6116SFelipe Balbi struct dwc3 *dwc; 1388c5ac6116SFelipe Balbi 1389c5ac6116SFelipe Balbi int ret; 1390c5ac6116SFelipe Balbi 1391c5ac6116SFelipe Balbi void __iomem *regs; 1392c5ac6116SFelipe Balbi 1393c5ac6116SFelipe Balbi dwc = devm_kzalloc(dev, sizeof(*dwc), GFP_KERNEL); 1394c5ac6116SFelipe Balbi if (!dwc) 1395c5ac6116SFelipe Balbi return -ENOMEM; 1396c5ac6116SFelipe Balbi 1397fe8abf33SMasahiro Yamada dwc->clks = devm_kmemdup(dev, dwc3_core_clks, sizeof(dwc3_core_clks), 1398fe8abf33SMasahiro Yamada GFP_KERNEL); 1399fe8abf33SMasahiro Yamada if (!dwc->clks) 1400fe8abf33SMasahiro Yamada return -ENOMEM; 1401fe8abf33SMasahiro Yamada 1402c5ac6116SFelipe Balbi dwc->dev = dev; 1403c5ac6116SFelipe Balbi 1404c5ac6116SFelipe Balbi res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1405c5ac6116SFelipe Balbi if (!res) { 1406c5ac6116SFelipe Balbi dev_err(dev, "missing memory resource\n"); 1407c5ac6116SFelipe Balbi return -ENODEV; 1408c5ac6116SFelipe Balbi } 1409c5ac6116SFelipe Balbi 1410c5ac6116SFelipe Balbi dwc->xhci_resources[0].start = res->start; 1411c5ac6116SFelipe Balbi dwc->xhci_resources[0].end = dwc->xhci_resources[0].start + 1412c5ac6116SFelipe Balbi DWC3_XHCI_REGS_END; 1413c5ac6116SFelipe Balbi dwc->xhci_resources[0].flags = res->flags; 1414c5ac6116SFelipe Balbi dwc->xhci_resources[0].name = res->name; 1415c5ac6116SFelipe Balbi 1416c5ac6116SFelipe Balbi /* 1417c5ac6116SFelipe Balbi * Request memory region but exclude xHCI regs, 1418c5ac6116SFelipe Balbi * since it will be requested by the xhci-plat driver. 1419c5ac6116SFelipe Balbi */ 142044feb8e6SMasahiro Yamada dwc_res = *res; 142144feb8e6SMasahiro Yamada dwc_res.start += DWC3_GLOBALS_REGS_START; 142244feb8e6SMasahiro Yamada 142344feb8e6SMasahiro Yamada regs = devm_ioremap_resource(dev, &dwc_res); 142444feb8e6SMasahiro Yamada if (IS_ERR(regs)) 142544feb8e6SMasahiro Yamada return PTR_ERR(regs); 1426c5ac6116SFelipe Balbi 1427c5ac6116SFelipe Balbi dwc->regs = regs; 142844feb8e6SMasahiro Yamada dwc->regs_size = resource_size(&dwc_res); 1429c5ac6116SFelipe Balbi 1430c5ac6116SFelipe Balbi dwc3_get_properties(dwc); 1431c5ac6116SFelipe Balbi 1432fe8abf33SMasahiro Yamada dwc->reset = devm_reset_control_get_optional_shared(dev, NULL); 1433fe8abf33SMasahiro Yamada if (IS_ERR(dwc->reset)) 1434fe8abf33SMasahiro Yamada return PTR_ERR(dwc->reset); 1435fe8abf33SMasahiro Yamada 143661527777SHans de Goede if (dev->of_node) { 143761527777SHans de Goede dwc->num_clks = ARRAY_SIZE(dwc3_core_clks); 143861527777SHans de Goede 1439fe8abf33SMasahiro Yamada ret = clk_bulk_get(dev, dwc->num_clks, dwc->clks); 1440fe8abf33SMasahiro Yamada if (ret == -EPROBE_DEFER) 1441fe8abf33SMasahiro Yamada return ret; 1442fe8abf33SMasahiro Yamada /* 144361527777SHans de Goede * Clocks are optional, but new DT platforms should support all 144461527777SHans de Goede * clocks as required by the DT-binding. 1445fe8abf33SMasahiro Yamada */ 1446fe8abf33SMasahiro Yamada if (ret) 1447fe8abf33SMasahiro Yamada dwc->num_clks = 0; 144861527777SHans de Goede } 1449fe8abf33SMasahiro Yamada 1450fe8abf33SMasahiro Yamada ret = reset_control_deassert(dwc->reset); 1451fe8abf33SMasahiro Yamada if (ret) 1452fe8abf33SMasahiro Yamada goto put_clks; 1453fe8abf33SMasahiro Yamada 1454fe8abf33SMasahiro Yamada ret = clk_bulk_prepare(dwc->num_clks, dwc->clks); 1455fe8abf33SMasahiro Yamada if (ret) 1456fe8abf33SMasahiro Yamada goto assert_reset; 1457fe8abf33SMasahiro Yamada 1458fe8abf33SMasahiro Yamada ret = clk_bulk_enable(dwc->num_clks, dwc->clks); 1459fe8abf33SMasahiro Yamada if (ret) 1460fe8abf33SMasahiro Yamada goto unprepare_clks; 1461fe8abf33SMasahiro Yamada 1462dc1b5d9aSEnric Balletbo i Serra if (!dwc3_core_is_valid(dwc)) { 1463dc1b5d9aSEnric Balletbo i Serra dev_err(dwc->dev, "this is not a DesignWare USB3 DRD Core\n"); 1464dc1b5d9aSEnric Balletbo i Serra ret = -ENODEV; 1465dc1b5d9aSEnric Balletbo i Serra goto disable_clks; 1466dc1b5d9aSEnric Balletbo i Serra } 1467dc1b5d9aSEnric Balletbo i Serra 14686c89cce0SHeikki Krogerus platform_set_drvdata(pdev, dwc); 14692917e718SHeikki Krogerus dwc3_cache_hwparams(dwc); 14706c89cce0SHeikki Krogerus 147172246da4SFelipe Balbi spin_lock_init(&dwc->lock); 147272246da4SFelipe Balbi 1473fc8bb91bSFelipe Balbi pm_runtime_set_active(dev); 1474fc8bb91bSFelipe Balbi pm_runtime_use_autosuspend(dev); 1475fc8bb91bSFelipe Balbi pm_runtime_set_autosuspend_delay(dev, DWC3_DEFAULT_AUTOSUSPEND_DELAY); 1476802ca850SChanho Park pm_runtime_enable(dev); 147732808237SRoger Quadros ret = pm_runtime_get_sync(dev); 147832808237SRoger Quadros if (ret < 0) 147932808237SRoger Quadros goto err1; 148032808237SRoger Quadros 1481802ca850SChanho Park pm_runtime_forbid(dev); 148272246da4SFelipe Balbi 14833921426bSFelipe Balbi ret = dwc3_alloc_event_buffers(dwc, DWC3_EVENT_BUFFERS_SIZE); 14843921426bSFelipe Balbi if (ret) { 14853921426bSFelipe Balbi dev_err(dwc->dev, "failed to allocate event buffers\n"); 14863921426bSFelipe Balbi ret = -ENOMEM; 148732808237SRoger Quadros goto err2; 14883921426bSFelipe Balbi } 14893921426bSFelipe Balbi 14909d6173e1SThinh Nguyen ret = dwc3_get_dr_mode(dwc); 14919d6173e1SThinh Nguyen if (ret) 14929d6173e1SThinh Nguyen goto err3; 149332a4a135SFelipe Balbi 1494c499ff71SFelipe Balbi ret = dwc3_alloc_scratch_buffers(dwc); 1495c499ff71SFelipe Balbi if (ret) 149632808237SRoger Quadros goto err3; 1497c499ff71SFelipe Balbi 149872246da4SFelipe Balbi ret = dwc3_core_init(dwc); 149972246da4SFelipe Balbi if (ret) { 1500408d3ba0SBrian Norris if (ret != -EPROBE_DEFER) 1501408d3ba0SBrian Norris dev_err(dev, "failed to initialize core: %d\n", ret); 150232808237SRoger Quadros goto err4; 150372246da4SFelipe Balbi } 150472246da4SFelipe Balbi 15057ac51a12SJohn Youn dwc3_check_params(dwc); 15062c7f1bd9SJohn Youn 15075f94adfeSFelipe Balbi ret = dwc3_core_init_mode(dwc); 15085f94adfeSFelipe Balbi if (ret) 150932808237SRoger Quadros goto err5; 151072246da4SFelipe Balbi 15114e9f3118SDu, Changbin dwc3_debugfs_init(dwc); 1512fc8bb91bSFelipe Balbi pm_runtime_put(dev); 151372246da4SFelipe Balbi 151472246da4SFelipe Balbi return 0; 151572246da4SFelipe Balbi 151632808237SRoger Quadros err5: 1517f122d33eSFelipe Balbi dwc3_event_buffers_cleanup(dwc); 151808fd9a82SAndy Shevchenko dwc3_ulpi_exit(dwc); 1519f122d33eSFelipe Balbi 152032808237SRoger Quadros err4: 1521c499ff71SFelipe Balbi dwc3_free_scratch_buffers(dwc); 152272246da4SFelipe Balbi 152332808237SRoger Quadros err3: 15243921426bSFelipe Balbi dwc3_free_event_buffers(dwc); 15253921426bSFelipe Balbi 152632808237SRoger Quadros err2: 152732808237SRoger Quadros pm_runtime_allow(&pdev->dev); 152832808237SRoger Quadros 152932808237SRoger Quadros err1: 153032808237SRoger Quadros pm_runtime_put_sync(&pdev->dev); 153132808237SRoger Quadros pm_runtime_disable(&pdev->dev); 153232808237SRoger Quadros 1533dc1b5d9aSEnric Balletbo i Serra disable_clks: 1534fe8abf33SMasahiro Yamada clk_bulk_disable(dwc->num_clks, dwc->clks); 1535fe8abf33SMasahiro Yamada unprepare_clks: 1536fe8abf33SMasahiro Yamada clk_bulk_unprepare(dwc->num_clks, dwc->clks); 1537fe8abf33SMasahiro Yamada assert_reset: 1538fe8abf33SMasahiro Yamada reset_control_assert(dwc->reset); 1539fe8abf33SMasahiro Yamada put_clks: 1540fe8abf33SMasahiro Yamada clk_bulk_put(dwc->num_clks, dwc->clks); 1541fe8abf33SMasahiro Yamada 154272246da4SFelipe Balbi return ret; 154372246da4SFelipe Balbi } 154472246da4SFelipe Balbi 1545fb4e98abSBill Pemberton static int dwc3_remove(struct platform_device *pdev) 154672246da4SFelipe Balbi { 154772246da4SFelipe Balbi struct dwc3 *dwc = platform_get_drvdata(pdev); 15483da1f6eeSFelipe Balbi 1549fc8bb91bSFelipe Balbi pm_runtime_get_sync(&pdev->dev); 155072246da4SFelipe Balbi 1551dc99f16fSFelipe Balbi dwc3_debugfs_exit(dwc); 1552dc99f16fSFelipe Balbi dwc3_core_exit_mode(dwc); 15538ba007a9SKishon Vijay Abraham I 155472246da4SFelipe Balbi dwc3_core_exit(dwc); 155588bc9d19SHeikki Krogerus dwc3_ulpi_exit(dwc); 155672246da4SFelipe Balbi 1557fc8bb91bSFelipe Balbi pm_runtime_put_sync(&pdev->dev); 1558fc8bb91bSFelipe Balbi pm_runtime_allow(&pdev->dev); 1559fc8bb91bSFelipe Balbi pm_runtime_disable(&pdev->dev); 1560fc8bb91bSFelipe Balbi 1561c499ff71SFelipe Balbi dwc3_free_event_buffers(dwc); 1562c499ff71SFelipe Balbi dwc3_free_scratch_buffers(dwc); 1563fe8abf33SMasahiro Yamada clk_bulk_put(dwc->num_clks, dwc->clks); 1564c499ff71SFelipe Balbi 156572246da4SFelipe Balbi return 0; 156672246da4SFelipe Balbi } 156772246da4SFelipe Balbi 1568fc8bb91bSFelipe Balbi #ifdef CONFIG_PM 1569fe8abf33SMasahiro Yamada static int dwc3_core_init_for_resume(struct dwc3 *dwc) 1570fe8abf33SMasahiro Yamada { 1571fe8abf33SMasahiro Yamada int ret; 1572fe8abf33SMasahiro Yamada 1573fe8abf33SMasahiro Yamada ret = reset_control_deassert(dwc->reset); 1574fe8abf33SMasahiro Yamada if (ret) 1575fe8abf33SMasahiro Yamada return ret; 1576fe8abf33SMasahiro Yamada 1577fe8abf33SMasahiro Yamada ret = clk_bulk_prepare(dwc->num_clks, dwc->clks); 1578fe8abf33SMasahiro Yamada if (ret) 1579fe8abf33SMasahiro Yamada goto assert_reset; 1580fe8abf33SMasahiro Yamada 1581fe8abf33SMasahiro Yamada ret = clk_bulk_enable(dwc->num_clks, dwc->clks); 1582fe8abf33SMasahiro Yamada if (ret) 1583fe8abf33SMasahiro Yamada goto unprepare_clks; 1584fe8abf33SMasahiro Yamada 1585fe8abf33SMasahiro Yamada ret = dwc3_core_init(dwc); 1586fe8abf33SMasahiro Yamada if (ret) 1587fe8abf33SMasahiro Yamada goto disable_clks; 1588fe8abf33SMasahiro Yamada 1589fe8abf33SMasahiro Yamada return 0; 1590fe8abf33SMasahiro Yamada 1591fe8abf33SMasahiro Yamada disable_clks: 1592fe8abf33SMasahiro Yamada clk_bulk_disable(dwc->num_clks, dwc->clks); 1593fe8abf33SMasahiro Yamada unprepare_clks: 1594fe8abf33SMasahiro Yamada clk_bulk_unprepare(dwc->num_clks, dwc->clks); 1595fe8abf33SMasahiro Yamada assert_reset: 1596fe8abf33SMasahiro Yamada reset_control_assert(dwc->reset); 1597fe8abf33SMasahiro Yamada 1598fe8abf33SMasahiro Yamada return ret; 1599fe8abf33SMasahiro Yamada } 1600fe8abf33SMasahiro Yamada 1601c4a5153eSManu Gautam static int dwc3_suspend_common(struct dwc3 *dwc, pm_message_t msg) 16027415f17cSFelipe Balbi { 1603fc8bb91bSFelipe Balbi unsigned long flags; 1604bcb12877SManu Gautam u32 reg; 16057415f17cSFelipe Balbi 1606689bf72cSManu Gautam switch (dwc->current_dr_role) { 1607689bf72cSManu Gautam case DWC3_GCTL_PRTCAP_DEVICE: 1608fc8bb91bSFelipe Balbi spin_lock_irqsave(&dwc->lock, flags); 16097415f17cSFelipe Balbi dwc3_gadget_suspend(dwc); 1610fc8bb91bSFelipe Balbi spin_unlock_irqrestore(&dwc->lock, flags); 161141a91c60SMarek Szyprowski synchronize_irq(dwc->irq_gadget); 1612689bf72cSManu Gautam dwc3_core_exit(dwc); 161351f5d49aSFelipe Balbi break; 1614689bf72cSManu Gautam case DWC3_GCTL_PRTCAP_HOST: 1615bcb12877SManu Gautam if (!PMSG_IS_AUTO(msg)) { 1616c4a5153eSManu Gautam dwc3_core_exit(dwc); 1617c4a5153eSManu Gautam break; 1618bcb12877SManu Gautam } 1619bcb12877SManu Gautam 1620bcb12877SManu Gautam /* Let controller to suspend HSPHY before PHY driver suspends */ 1621bcb12877SManu Gautam if (dwc->dis_u2_susphy_quirk || 1622bcb12877SManu Gautam dwc->dis_enblslpm_quirk) { 1623bcb12877SManu Gautam reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0)); 1624bcb12877SManu Gautam reg |= DWC3_GUSB2PHYCFG_ENBLSLPM | 1625bcb12877SManu Gautam DWC3_GUSB2PHYCFG_SUSPHY; 1626bcb12877SManu Gautam dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); 1627bcb12877SManu Gautam 1628bcb12877SManu Gautam /* Give some time for USB2 PHY to suspend */ 1629bcb12877SManu Gautam usleep_range(5000, 6000); 1630bcb12877SManu Gautam } 1631bcb12877SManu Gautam 1632bcb12877SManu Gautam phy_pm_runtime_put_sync(dwc->usb2_generic_phy); 1633bcb12877SManu Gautam phy_pm_runtime_put_sync(dwc->usb3_generic_phy); 1634bcb12877SManu Gautam break; 1635f09cc79bSRoger Quadros case DWC3_GCTL_PRTCAP_OTG: 1636f09cc79bSRoger Quadros /* do nothing during runtime_suspend */ 1637f09cc79bSRoger Quadros if (PMSG_IS_AUTO(msg)) 1638f09cc79bSRoger Quadros break; 1639f09cc79bSRoger Quadros 1640f09cc79bSRoger Quadros if (dwc->current_otg_role == DWC3_OTG_ROLE_DEVICE) { 1641f09cc79bSRoger Quadros spin_lock_irqsave(&dwc->lock, flags); 1642f09cc79bSRoger Quadros dwc3_gadget_suspend(dwc); 1643f09cc79bSRoger Quadros spin_unlock_irqrestore(&dwc->lock, flags); 164441a91c60SMarek Szyprowski synchronize_irq(dwc->irq_gadget); 1645f09cc79bSRoger Quadros } 1646f09cc79bSRoger Quadros 1647f09cc79bSRoger Quadros dwc3_otg_exit(dwc); 1648f09cc79bSRoger Quadros dwc3_core_exit(dwc); 1649f09cc79bSRoger Quadros break; 16507415f17cSFelipe Balbi default: 165151f5d49aSFelipe Balbi /* do nothing */ 16527415f17cSFelipe Balbi break; 16537415f17cSFelipe Balbi } 16547415f17cSFelipe Balbi 1655fc8bb91bSFelipe Balbi return 0; 1656fc8bb91bSFelipe Balbi } 1657fc8bb91bSFelipe Balbi 1658c4a5153eSManu Gautam static int dwc3_resume_common(struct dwc3 *dwc, pm_message_t msg) 1659fc8bb91bSFelipe Balbi { 1660fc8bb91bSFelipe Balbi unsigned long flags; 1661fc8bb91bSFelipe Balbi int ret; 1662bcb12877SManu Gautam u32 reg; 1663fc8bb91bSFelipe Balbi 1664689bf72cSManu Gautam switch (dwc->current_dr_role) { 1665689bf72cSManu Gautam case DWC3_GCTL_PRTCAP_DEVICE: 1666fe8abf33SMasahiro Yamada ret = dwc3_core_init_for_resume(dwc); 1667fc8bb91bSFelipe Balbi if (ret) 1668fc8bb91bSFelipe Balbi return ret; 1669fc8bb91bSFelipe Balbi 16707d11c3acSRoger Quadros dwc3_set_prtcap(dwc, DWC3_GCTL_PRTCAP_DEVICE); 1671fc8bb91bSFelipe Balbi spin_lock_irqsave(&dwc->lock, flags); 1672fc8bb91bSFelipe Balbi dwc3_gadget_resume(dwc); 1673fc8bb91bSFelipe Balbi spin_unlock_irqrestore(&dwc->lock, flags); 1674689bf72cSManu Gautam break; 1675689bf72cSManu Gautam case DWC3_GCTL_PRTCAP_HOST: 1676c4a5153eSManu Gautam if (!PMSG_IS_AUTO(msg)) { 1677fe8abf33SMasahiro Yamada ret = dwc3_core_init_for_resume(dwc); 1678c4a5153eSManu Gautam if (ret) 1679c4a5153eSManu Gautam return ret; 16807d11c3acSRoger Quadros dwc3_set_prtcap(dwc, DWC3_GCTL_PRTCAP_HOST); 1681bcb12877SManu Gautam break; 1682c4a5153eSManu Gautam } 1683bcb12877SManu Gautam /* Restore GUSB2PHYCFG bits that were modified in suspend */ 1684bcb12877SManu Gautam reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0)); 1685bcb12877SManu Gautam if (dwc->dis_u2_susphy_quirk) 1686bcb12877SManu Gautam reg &= ~DWC3_GUSB2PHYCFG_SUSPHY; 1687bcb12877SManu Gautam 1688bcb12877SManu Gautam if (dwc->dis_enblslpm_quirk) 1689bcb12877SManu Gautam reg &= ~DWC3_GUSB2PHYCFG_ENBLSLPM; 1690bcb12877SManu Gautam 1691bcb12877SManu Gautam dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); 1692bcb12877SManu Gautam 1693bcb12877SManu Gautam phy_pm_runtime_get_sync(dwc->usb2_generic_phy); 1694bcb12877SManu Gautam phy_pm_runtime_get_sync(dwc->usb3_generic_phy); 1695c4a5153eSManu Gautam break; 1696f09cc79bSRoger Quadros case DWC3_GCTL_PRTCAP_OTG: 1697f09cc79bSRoger Quadros /* nothing to do on runtime_resume */ 1698f09cc79bSRoger Quadros if (PMSG_IS_AUTO(msg)) 1699f09cc79bSRoger Quadros break; 1700f09cc79bSRoger Quadros 1701f09cc79bSRoger Quadros ret = dwc3_core_init(dwc); 1702f09cc79bSRoger Quadros if (ret) 1703f09cc79bSRoger Quadros return ret; 1704f09cc79bSRoger Quadros 1705f09cc79bSRoger Quadros dwc3_set_prtcap(dwc, dwc->current_dr_role); 1706f09cc79bSRoger Quadros 1707f09cc79bSRoger Quadros dwc3_otg_init(dwc); 1708f09cc79bSRoger Quadros if (dwc->current_otg_role == DWC3_OTG_ROLE_HOST) { 1709f09cc79bSRoger Quadros dwc3_otg_host_init(dwc); 1710f09cc79bSRoger Quadros } else if (dwc->current_otg_role == DWC3_OTG_ROLE_DEVICE) { 1711f09cc79bSRoger Quadros spin_lock_irqsave(&dwc->lock, flags); 1712f09cc79bSRoger Quadros dwc3_gadget_resume(dwc); 1713f09cc79bSRoger Quadros spin_unlock_irqrestore(&dwc->lock, flags); 1714f09cc79bSRoger Quadros } 1715f09cc79bSRoger Quadros 1716f09cc79bSRoger Quadros break; 1717fc8bb91bSFelipe Balbi default: 1718fc8bb91bSFelipe Balbi /* do nothing */ 1719fc8bb91bSFelipe Balbi break; 1720fc8bb91bSFelipe Balbi } 1721fc8bb91bSFelipe Balbi 1722fc8bb91bSFelipe Balbi return 0; 1723fc8bb91bSFelipe Balbi } 1724fc8bb91bSFelipe Balbi 1725fc8bb91bSFelipe Balbi static int dwc3_runtime_checks(struct dwc3 *dwc) 1726fc8bb91bSFelipe Balbi { 1727689bf72cSManu Gautam switch (dwc->current_dr_role) { 1728c4a5153eSManu Gautam case DWC3_GCTL_PRTCAP_DEVICE: 1729fc8bb91bSFelipe Balbi if (dwc->connected) 1730fc8bb91bSFelipe Balbi return -EBUSY; 1731fc8bb91bSFelipe Balbi break; 1732c4a5153eSManu Gautam case DWC3_GCTL_PRTCAP_HOST: 1733fc8bb91bSFelipe Balbi default: 1734fc8bb91bSFelipe Balbi /* do nothing */ 1735fc8bb91bSFelipe Balbi break; 1736fc8bb91bSFelipe Balbi } 1737fc8bb91bSFelipe Balbi 1738fc8bb91bSFelipe Balbi return 0; 1739fc8bb91bSFelipe Balbi } 1740fc8bb91bSFelipe Balbi 1741fc8bb91bSFelipe Balbi static int dwc3_runtime_suspend(struct device *dev) 1742fc8bb91bSFelipe Balbi { 1743fc8bb91bSFelipe Balbi struct dwc3 *dwc = dev_get_drvdata(dev); 1744fc8bb91bSFelipe Balbi int ret; 1745fc8bb91bSFelipe Balbi 1746fc8bb91bSFelipe Balbi if (dwc3_runtime_checks(dwc)) 1747fc8bb91bSFelipe Balbi return -EBUSY; 1748fc8bb91bSFelipe Balbi 1749c4a5153eSManu Gautam ret = dwc3_suspend_common(dwc, PMSG_AUTO_SUSPEND); 1750fc8bb91bSFelipe Balbi if (ret) 1751fc8bb91bSFelipe Balbi return ret; 1752fc8bb91bSFelipe Balbi 1753fc8bb91bSFelipe Balbi device_init_wakeup(dev, true); 1754fc8bb91bSFelipe Balbi 1755fc8bb91bSFelipe Balbi return 0; 1756fc8bb91bSFelipe Balbi } 1757fc8bb91bSFelipe Balbi 1758fc8bb91bSFelipe Balbi static int dwc3_runtime_resume(struct device *dev) 1759fc8bb91bSFelipe Balbi { 1760fc8bb91bSFelipe Balbi struct dwc3 *dwc = dev_get_drvdata(dev); 1761fc8bb91bSFelipe Balbi int ret; 1762fc8bb91bSFelipe Balbi 1763fc8bb91bSFelipe Balbi device_init_wakeup(dev, false); 1764fc8bb91bSFelipe Balbi 1765c4a5153eSManu Gautam ret = dwc3_resume_common(dwc, PMSG_AUTO_RESUME); 1766fc8bb91bSFelipe Balbi if (ret) 1767fc8bb91bSFelipe Balbi return ret; 1768fc8bb91bSFelipe Balbi 1769689bf72cSManu Gautam switch (dwc->current_dr_role) { 1770689bf72cSManu Gautam case DWC3_GCTL_PRTCAP_DEVICE: 1771fc8bb91bSFelipe Balbi dwc3_gadget_process_pending_events(dwc); 1772fc8bb91bSFelipe Balbi break; 1773689bf72cSManu Gautam case DWC3_GCTL_PRTCAP_HOST: 1774fc8bb91bSFelipe Balbi default: 1775fc8bb91bSFelipe Balbi /* do nothing */ 1776fc8bb91bSFelipe Balbi break; 1777fc8bb91bSFelipe Balbi } 1778fc8bb91bSFelipe Balbi 1779fc8bb91bSFelipe Balbi pm_runtime_mark_last_busy(dev); 1780fc8bb91bSFelipe Balbi 1781fc8bb91bSFelipe Balbi return 0; 1782fc8bb91bSFelipe Balbi } 1783fc8bb91bSFelipe Balbi 1784fc8bb91bSFelipe Balbi static int dwc3_runtime_idle(struct device *dev) 1785fc8bb91bSFelipe Balbi { 1786fc8bb91bSFelipe Balbi struct dwc3 *dwc = dev_get_drvdata(dev); 1787fc8bb91bSFelipe Balbi 1788689bf72cSManu Gautam switch (dwc->current_dr_role) { 1789689bf72cSManu Gautam case DWC3_GCTL_PRTCAP_DEVICE: 1790fc8bb91bSFelipe Balbi if (dwc3_runtime_checks(dwc)) 1791fc8bb91bSFelipe Balbi return -EBUSY; 1792fc8bb91bSFelipe Balbi break; 1793689bf72cSManu Gautam case DWC3_GCTL_PRTCAP_HOST: 1794fc8bb91bSFelipe Balbi default: 1795fc8bb91bSFelipe Balbi /* do nothing */ 1796fc8bb91bSFelipe Balbi break; 1797fc8bb91bSFelipe Balbi } 1798fc8bb91bSFelipe Balbi 1799fc8bb91bSFelipe Balbi pm_runtime_mark_last_busy(dev); 1800fc8bb91bSFelipe Balbi pm_runtime_autosuspend(dev); 1801fc8bb91bSFelipe Balbi 1802fc8bb91bSFelipe Balbi return 0; 1803fc8bb91bSFelipe Balbi } 1804fc8bb91bSFelipe Balbi #endif /* CONFIG_PM */ 1805fc8bb91bSFelipe Balbi 1806fc8bb91bSFelipe Balbi #ifdef CONFIG_PM_SLEEP 1807fc8bb91bSFelipe Balbi static int dwc3_suspend(struct device *dev) 1808fc8bb91bSFelipe Balbi { 1809fc8bb91bSFelipe Balbi struct dwc3 *dwc = dev_get_drvdata(dev); 1810fc8bb91bSFelipe Balbi int ret; 1811fc8bb91bSFelipe Balbi 1812c4a5153eSManu Gautam ret = dwc3_suspend_common(dwc, PMSG_SUSPEND); 1813fc8bb91bSFelipe Balbi if (ret) 1814fc8bb91bSFelipe Balbi return ret; 1815fc8bb91bSFelipe Balbi 18166344475fSSekhar Nori pinctrl_pm_select_sleep_state(dev); 18176344475fSSekhar Nori 18187415f17cSFelipe Balbi return 0; 18197415f17cSFelipe Balbi } 18207415f17cSFelipe Balbi 18217415f17cSFelipe Balbi static int dwc3_resume(struct device *dev) 18227415f17cSFelipe Balbi { 18237415f17cSFelipe Balbi struct dwc3 *dwc = dev_get_drvdata(dev); 182457303488SKishon Vijay Abraham I int ret; 18257415f17cSFelipe Balbi 18266344475fSSekhar Nori pinctrl_pm_select_default_state(dev); 18276344475fSSekhar Nori 1828c4a5153eSManu Gautam ret = dwc3_resume_common(dwc, PMSG_RESUME); 182951f5d49aSFelipe Balbi if (ret) 18305c4ad318SFelipe Balbi return ret; 18315c4ad318SFelipe Balbi 18327415f17cSFelipe Balbi pm_runtime_disable(dev); 18337415f17cSFelipe Balbi pm_runtime_set_active(dev); 18347415f17cSFelipe Balbi pm_runtime_enable(dev); 18357415f17cSFelipe Balbi 18367415f17cSFelipe Balbi return 0; 18377415f17cSFelipe Balbi } 18387f370ed0SFelipe Balbi #endif /* CONFIG_PM_SLEEP */ 18397415f17cSFelipe Balbi 18407415f17cSFelipe Balbi static const struct dev_pm_ops dwc3_dev_pm_ops = { 18417415f17cSFelipe Balbi SET_SYSTEM_SLEEP_PM_OPS(dwc3_suspend, dwc3_resume) 1842fc8bb91bSFelipe Balbi SET_RUNTIME_PM_OPS(dwc3_runtime_suspend, dwc3_runtime_resume, 1843fc8bb91bSFelipe Balbi dwc3_runtime_idle) 18447415f17cSFelipe Balbi }; 18457415f17cSFelipe Balbi 18465088b6f5SKishon Vijay Abraham I #ifdef CONFIG_OF 18475088b6f5SKishon Vijay Abraham I static const struct of_device_id of_dwc3_match[] = { 18485088b6f5SKishon Vijay Abraham I { 184922a5aa17SFelipe Balbi .compatible = "snps,dwc3" 185022a5aa17SFelipe Balbi }, 185122a5aa17SFelipe Balbi { 18525088b6f5SKishon Vijay Abraham I .compatible = "synopsys,dwc3" 18535088b6f5SKishon Vijay Abraham I }, 18545088b6f5SKishon Vijay Abraham I { }, 18555088b6f5SKishon Vijay Abraham I }; 18565088b6f5SKishon Vijay Abraham I MODULE_DEVICE_TABLE(of, of_dwc3_match); 18575088b6f5SKishon Vijay Abraham I #endif 18585088b6f5SKishon Vijay Abraham I 1859404905a6SHeikki Krogerus #ifdef CONFIG_ACPI 1860404905a6SHeikki Krogerus 1861404905a6SHeikki Krogerus #define ACPI_ID_INTEL_BSW "808622B7" 1862404905a6SHeikki Krogerus 1863404905a6SHeikki Krogerus static const struct acpi_device_id dwc3_acpi_match[] = { 1864404905a6SHeikki Krogerus { ACPI_ID_INTEL_BSW, 0 }, 1865404905a6SHeikki Krogerus { }, 1866404905a6SHeikki Krogerus }; 1867404905a6SHeikki Krogerus MODULE_DEVICE_TABLE(acpi, dwc3_acpi_match); 1868404905a6SHeikki Krogerus #endif 1869404905a6SHeikki Krogerus 187072246da4SFelipe Balbi static struct platform_driver dwc3_driver = { 187172246da4SFelipe Balbi .probe = dwc3_probe, 18727690417dSBill Pemberton .remove = dwc3_remove, 187372246da4SFelipe Balbi .driver = { 187472246da4SFelipe Balbi .name = "dwc3", 18755088b6f5SKishon Vijay Abraham I .of_match_table = of_match_ptr(of_dwc3_match), 1876404905a6SHeikki Krogerus .acpi_match_table = ACPI_PTR(dwc3_acpi_match), 18777f370ed0SFelipe Balbi .pm = &dwc3_dev_pm_ops, 187872246da4SFelipe Balbi }, 187972246da4SFelipe Balbi }; 188072246da4SFelipe Balbi 1881b1116dccSTobias Klauser module_platform_driver(dwc3_driver); 1882b1116dccSTobias Klauser 18837ae4fc4dSSebastian Andrzej Siewior MODULE_ALIAS("platform:dwc3"); 188472246da4SFelipe Balbi MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>"); 18855945f789SFelipe Balbi MODULE_LICENSE("GPL v2"); 188672246da4SFelipe Balbi MODULE_DESCRIPTION("DesignWare USB3 DRD Controller Driver"); 1887