15fd54aceSGreg Kroah-Hartman // SPDX-License-Identifier: GPL-2.0 272246da4SFelipe Balbi /** 372246da4SFelipe Balbi * core.c - DesignWare USB3 DRD Controller Core file 472246da4SFelipe Balbi * 572246da4SFelipe Balbi * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com 672246da4SFelipe Balbi * 772246da4SFelipe Balbi * Authors: Felipe Balbi <balbi@ti.com>, 872246da4SFelipe Balbi * Sebastian Andrzej Siewior <bigeasy@linutronix.de> 972246da4SFelipe Balbi */ 1072246da4SFelipe Balbi 11fe8abf33SMasahiro Yamada #include <linux/clk.h> 12fa0ea13eSFelipe Balbi #include <linux/version.h> 13a72e658bSFelipe Balbi #include <linux/module.h> 1472246da4SFelipe Balbi #include <linux/kernel.h> 1572246da4SFelipe Balbi #include <linux/slab.h> 1672246da4SFelipe Balbi #include <linux/spinlock.h> 1772246da4SFelipe Balbi #include <linux/platform_device.h> 1872246da4SFelipe Balbi #include <linux/pm_runtime.h> 1972246da4SFelipe Balbi #include <linux/interrupt.h> 2072246da4SFelipe Balbi #include <linux/ioport.h> 2172246da4SFelipe Balbi #include <linux/io.h> 2272246da4SFelipe Balbi #include <linux/list.h> 2372246da4SFelipe Balbi #include <linux/delay.h> 2472246da4SFelipe Balbi #include <linux/dma-mapping.h> 25457e84b6SFelipe Balbi #include <linux/of.h> 26404905a6SHeikki Krogerus #include <linux/acpi.h> 276344475fSSekhar Nori #include <linux/pinctrl/consumer.h> 28fe8abf33SMasahiro Yamada #include <linux/reset.h> 2972246da4SFelipe Balbi 3072246da4SFelipe Balbi #include <linux/usb/ch9.h> 3172246da4SFelipe Balbi #include <linux/usb/gadget.h> 32f7e846f0SFelipe Balbi #include <linux/usb/of.h> 33a45c82b8SRuchika Kharwar #include <linux/usb/otg.h> 3472246da4SFelipe Balbi 3572246da4SFelipe Balbi #include "core.h" 3672246da4SFelipe Balbi #include "gadget.h" 3772246da4SFelipe Balbi #include "io.h" 3872246da4SFelipe Balbi 3972246da4SFelipe Balbi #include "debug.h" 4072246da4SFelipe Balbi 41fc8bb91bSFelipe Balbi #define DWC3_DEFAULT_AUTOSUSPEND_DELAY 5000 /* ms */ 428300dd23SFelipe Balbi 439d6173e1SThinh Nguyen /** 449d6173e1SThinh Nguyen * dwc3_get_dr_mode - Validates and sets dr_mode 459d6173e1SThinh Nguyen * @dwc: pointer to our context structure 469d6173e1SThinh Nguyen */ 479d6173e1SThinh Nguyen static int dwc3_get_dr_mode(struct dwc3 *dwc) 489d6173e1SThinh Nguyen { 499d6173e1SThinh Nguyen enum usb_dr_mode mode; 509d6173e1SThinh Nguyen struct device *dev = dwc->dev; 519d6173e1SThinh Nguyen unsigned int hw_mode; 529d6173e1SThinh Nguyen 539d6173e1SThinh Nguyen if (dwc->dr_mode == USB_DR_MODE_UNKNOWN) 549d6173e1SThinh Nguyen dwc->dr_mode = USB_DR_MODE_OTG; 559d6173e1SThinh Nguyen 569d6173e1SThinh Nguyen mode = dwc->dr_mode; 579d6173e1SThinh Nguyen hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0); 589d6173e1SThinh Nguyen 599d6173e1SThinh Nguyen switch (hw_mode) { 609d6173e1SThinh Nguyen case DWC3_GHWPARAMS0_MODE_GADGET: 619d6173e1SThinh Nguyen if (IS_ENABLED(CONFIG_USB_DWC3_HOST)) { 629d6173e1SThinh Nguyen dev_err(dev, 639d6173e1SThinh Nguyen "Controller does not support host mode.\n"); 649d6173e1SThinh Nguyen return -EINVAL; 659d6173e1SThinh Nguyen } 669d6173e1SThinh Nguyen mode = USB_DR_MODE_PERIPHERAL; 679d6173e1SThinh Nguyen break; 689d6173e1SThinh Nguyen case DWC3_GHWPARAMS0_MODE_HOST: 699d6173e1SThinh Nguyen if (IS_ENABLED(CONFIG_USB_DWC3_GADGET)) { 709d6173e1SThinh Nguyen dev_err(dev, 719d6173e1SThinh Nguyen "Controller does not support device mode.\n"); 729d6173e1SThinh Nguyen return -EINVAL; 739d6173e1SThinh Nguyen } 749d6173e1SThinh Nguyen mode = USB_DR_MODE_HOST; 759d6173e1SThinh Nguyen break; 769d6173e1SThinh Nguyen default: 779d6173e1SThinh Nguyen if (IS_ENABLED(CONFIG_USB_DWC3_HOST)) 789d6173e1SThinh Nguyen mode = USB_DR_MODE_HOST; 799d6173e1SThinh Nguyen else if (IS_ENABLED(CONFIG_USB_DWC3_GADGET)) 809d6173e1SThinh Nguyen mode = USB_DR_MODE_PERIPHERAL; 81a7700468SThinh Nguyen 82a7700468SThinh Nguyen /* 8389a9cc47SThinh Nguyen * DWC_usb31 and DWC_usb3 v3.30a and higher do not support OTG 8489a9cc47SThinh Nguyen * mode. If the controller supports DRD but the dr_mode is not 8589a9cc47SThinh Nguyen * specified or set to OTG, then set the mode to peripheral. 86a7700468SThinh Nguyen */ 8789a9cc47SThinh Nguyen if (mode == USB_DR_MODE_OTG && 8889a9cc47SThinh Nguyen dwc->revision >= DWC3_REVISION_330A) 89a7700468SThinh Nguyen mode = USB_DR_MODE_PERIPHERAL; 909d6173e1SThinh Nguyen } 919d6173e1SThinh Nguyen 929d6173e1SThinh Nguyen if (mode != dwc->dr_mode) { 939d6173e1SThinh Nguyen dev_warn(dev, 949d6173e1SThinh Nguyen "Configuration mismatch. dr_mode forced to %s\n", 959d6173e1SThinh Nguyen mode == USB_DR_MODE_HOST ? "host" : "gadget"); 969d6173e1SThinh Nguyen 979d6173e1SThinh Nguyen dwc->dr_mode = mode; 989d6173e1SThinh Nguyen } 999d6173e1SThinh Nguyen 1009d6173e1SThinh Nguyen return 0; 1019d6173e1SThinh Nguyen } 1029d6173e1SThinh Nguyen 103f09cc79bSRoger Quadros void dwc3_set_prtcap(struct dwc3 *dwc, u32 mode) 1043140e8cbSSebastian Andrzej Siewior { 1053140e8cbSSebastian Andrzej Siewior u32 reg; 1063140e8cbSSebastian Andrzej Siewior 1073140e8cbSSebastian Andrzej Siewior reg = dwc3_readl(dwc->regs, DWC3_GCTL); 1083140e8cbSSebastian Andrzej Siewior reg &= ~(DWC3_GCTL_PRTCAPDIR(DWC3_GCTL_PRTCAP_OTG)); 1093140e8cbSSebastian Andrzej Siewior reg |= DWC3_GCTL_PRTCAPDIR(mode); 1103140e8cbSSebastian Andrzej Siewior dwc3_writel(dwc->regs, DWC3_GCTL, reg); 111c4a5153eSManu Gautam 112c4a5153eSManu Gautam dwc->current_dr_role = mode; 11341ce1456SRoger Quadros } 1146b3261a2SRoger Quadros 11541ce1456SRoger Quadros static void __dwc3_set_mode(struct work_struct *work) 11641ce1456SRoger Quadros { 11741ce1456SRoger Quadros struct dwc3 *dwc = work_to_dwc(work); 11841ce1456SRoger Quadros unsigned long flags; 11941ce1456SRoger Quadros int ret; 12041ce1456SRoger Quadros 121f09cc79bSRoger Quadros if (dwc->dr_mode != USB_DR_MODE_OTG) 122f09cc79bSRoger Quadros return; 123f09cc79bSRoger Quadros 124f09cc79bSRoger Quadros if (dwc->current_dr_role == DWC3_GCTL_PRTCAP_OTG) 125f09cc79bSRoger Quadros dwc3_otg_update(dwc, 0); 126f09cc79bSRoger Quadros 12741ce1456SRoger Quadros if (!dwc->desired_dr_role) 12841ce1456SRoger Quadros return; 12941ce1456SRoger Quadros 13041ce1456SRoger Quadros if (dwc->desired_dr_role == dwc->current_dr_role) 13141ce1456SRoger Quadros return; 13241ce1456SRoger Quadros 133f09cc79bSRoger Quadros if (dwc->desired_dr_role == DWC3_GCTL_PRTCAP_OTG && dwc->edev) 13441ce1456SRoger Quadros return; 13541ce1456SRoger Quadros 13641ce1456SRoger Quadros switch (dwc->current_dr_role) { 13741ce1456SRoger Quadros case DWC3_GCTL_PRTCAP_HOST: 13841ce1456SRoger Quadros dwc3_host_exit(dwc); 13941ce1456SRoger Quadros break; 14041ce1456SRoger Quadros case DWC3_GCTL_PRTCAP_DEVICE: 14141ce1456SRoger Quadros dwc3_gadget_exit(dwc); 14241ce1456SRoger Quadros dwc3_event_buffers_cleanup(dwc); 14341ce1456SRoger Quadros break; 144f09cc79bSRoger Quadros case DWC3_GCTL_PRTCAP_OTG: 145f09cc79bSRoger Quadros dwc3_otg_exit(dwc); 146f09cc79bSRoger Quadros spin_lock_irqsave(&dwc->lock, flags); 147f09cc79bSRoger Quadros dwc->desired_otg_role = DWC3_OTG_ROLE_IDLE; 148f09cc79bSRoger Quadros spin_unlock_irqrestore(&dwc->lock, flags); 149f09cc79bSRoger Quadros dwc3_otg_update(dwc, 1); 150f09cc79bSRoger Quadros break; 15141ce1456SRoger Quadros default: 15241ce1456SRoger Quadros break; 15341ce1456SRoger Quadros } 15441ce1456SRoger Quadros 15541ce1456SRoger Quadros spin_lock_irqsave(&dwc->lock, flags); 15641ce1456SRoger Quadros 15741ce1456SRoger Quadros dwc3_set_prtcap(dwc, dwc->desired_dr_role); 15841ce1456SRoger Quadros 15941ce1456SRoger Quadros spin_unlock_irqrestore(&dwc->lock, flags); 16041ce1456SRoger Quadros 16141ce1456SRoger Quadros switch (dwc->desired_dr_role) { 16241ce1456SRoger Quadros case DWC3_GCTL_PRTCAP_HOST: 16341ce1456SRoger Quadros ret = dwc3_host_init(dwc); 164958d1a4cSFelipe Balbi if (ret) { 16541ce1456SRoger Quadros dev_err(dwc->dev, "failed to initialize host\n"); 166958d1a4cSFelipe Balbi } else { 167958d1a4cSFelipe Balbi if (dwc->usb2_phy) 168958d1a4cSFelipe Balbi otg_set_vbus(dwc->usb2_phy->otg, true); 169958d1a4cSFelipe Balbi phy_set_mode(dwc->usb2_generic_phy, PHY_MODE_USB_HOST); 170644cbbc3SManu Gautam phy_set_mode(dwc->usb3_generic_phy, PHY_MODE_USB_HOST); 171d8c80bb3SVivek Gautam phy_calibrate(dwc->usb2_generic_phy); 172958d1a4cSFelipe Balbi } 17341ce1456SRoger Quadros break; 17441ce1456SRoger Quadros case DWC3_GCTL_PRTCAP_DEVICE: 17541ce1456SRoger Quadros dwc3_event_buffers_setup(dwc); 176958d1a4cSFelipe Balbi 177958d1a4cSFelipe Balbi if (dwc->usb2_phy) 178958d1a4cSFelipe Balbi otg_set_vbus(dwc->usb2_phy->otg, false); 179958d1a4cSFelipe Balbi phy_set_mode(dwc->usb2_generic_phy, PHY_MODE_USB_DEVICE); 180644cbbc3SManu Gautam phy_set_mode(dwc->usb3_generic_phy, PHY_MODE_USB_DEVICE); 181958d1a4cSFelipe Balbi 18241ce1456SRoger Quadros ret = dwc3_gadget_init(dwc); 18341ce1456SRoger Quadros if (ret) 18441ce1456SRoger Quadros dev_err(dwc->dev, "failed to initialize peripheral\n"); 18541ce1456SRoger Quadros break; 186f09cc79bSRoger Quadros case DWC3_GCTL_PRTCAP_OTG: 187f09cc79bSRoger Quadros dwc3_otg_init(dwc); 188f09cc79bSRoger Quadros dwc3_otg_update(dwc, 0); 189f09cc79bSRoger Quadros break; 19041ce1456SRoger Quadros default: 19141ce1456SRoger Quadros break; 19241ce1456SRoger Quadros } 193f09cc79bSRoger Quadros 19441ce1456SRoger Quadros } 19541ce1456SRoger Quadros 19641ce1456SRoger Quadros void dwc3_set_mode(struct dwc3 *dwc, u32 mode) 19741ce1456SRoger Quadros { 19841ce1456SRoger Quadros unsigned long flags; 19941ce1456SRoger Quadros 20041ce1456SRoger Quadros spin_lock_irqsave(&dwc->lock, flags); 20141ce1456SRoger Quadros dwc->desired_dr_role = mode; 20241ce1456SRoger Quadros spin_unlock_irqrestore(&dwc->lock, flags); 20341ce1456SRoger Quadros 204084a804eSRoger Quadros queue_work(system_freezable_wq, &dwc->drd_work); 2053140e8cbSSebastian Andrzej Siewior } 2068300dd23SFelipe Balbi 207cf6d867dSFelipe Balbi u32 dwc3_core_fifo_space(struct dwc3_ep *dep, u8 type) 208cf6d867dSFelipe Balbi { 209cf6d867dSFelipe Balbi struct dwc3 *dwc = dep->dwc; 210cf6d867dSFelipe Balbi u32 reg; 211cf6d867dSFelipe Balbi 212cf6d867dSFelipe Balbi dwc3_writel(dwc->regs, DWC3_GDBGFIFOSPACE, 213cf6d867dSFelipe Balbi DWC3_GDBGFIFOSPACE_NUM(dep->number) | 214cf6d867dSFelipe Balbi DWC3_GDBGFIFOSPACE_TYPE(type)); 215cf6d867dSFelipe Balbi 216cf6d867dSFelipe Balbi reg = dwc3_readl(dwc->regs, DWC3_GDBGFIFOSPACE); 217cf6d867dSFelipe Balbi 218cf6d867dSFelipe Balbi return DWC3_GDBGFIFOSPACE_SPACE_AVAILABLE(reg); 219cf6d867dSFelipe Balbi } 220cf6d867dSFelipe Balbi 22172246da4SFelipe Balbi /** 22272246da4SFelipe Balbi * dwc3_core_soft_reset - Issues core soft reset and PHY reset 22372246da4SFelipe Balbi * @dwc: pointer to our context structure 22472246da4SFelipe Balbi */ 22557303488SKishon Vijay Abraham I static int dwc3_core_soft_reset(struct dwc3 *dwc) 22672246da4SFelipe Balbi { 22772246da4SFelipe Balbi u32 reg; 228f59dcab1SFelipe Balbi int retries = 1000; 22957303488SKishon Vijay Abraham I int ret; 23072246da4SFelipe Balbi 23151e1e7bcSFelipe Balbi usb_phy_init(dwc->usb2_phy); 23251e1e7bcSFelipe Balbi usb_phy_init(dwc->usb3_phy); 23357303488SKishon Vijay Abraham I ret = phy_init(dwc->usb2_generic_phy); 23457303488SKishon Vijay Abraham I if (ret < 0) 23557303488SKishon Vijay Abraham I return ret; 23657303488SKishon Vijay Abraham I 23757303488SKishon Vijay Abraham I ret = phy_init(dwc->usb3_generic_phy); 23857303488SKishon Vijay Abraham I if (ret < 0) { 23957303488SKishon Vijay Abraham I phy_exit(dwc->usb2_generic_phy); 24057303488SKishon Vijay Abraham I return ret; 24157303488SKishon Vijay Abraham I } 24272246da4SFelipe Balbi 243f59dcab1SFelipe Balbi /* 244f59dcab1SFelipe Balbi * We're resetting only the device side because, if we're in host mode, 245f59dcab1SFelipe Balbi * XHCI driver will reset the host block. If dwc3 was configured for 246f59dcab1SFelipe Balbi * host-only mode, then we can return early. 247f59dcab1SFelipe Balbi */ 248c4a5153eSManu Gautam if (dwc->current_dr_role == DWC3_GCTL_PRTCAP_HOST) 24957303488SKishon Vijay Abraham I return 0; 250f59dcab1SFelipe Balbi 251f59dcab1SFelipe Balbi reg = dwc3_readl(dwc->regs, DWC3_DCTL); 252f59dcab1SFelipe Balbi reg |= DWC3_DCTL_CSFTRST; 253f59dcab1SFelipe Balbi dwc3_writel(dwc->regs, DWC3_DCTL, reg); 254f59dcab1SFelipe Balbi 2554749e0e6SThinh Nguyen /* 2564749e0e6SThinh Nguyen * For DWC_usb31 controller 1.90a and later, the DCTL.CSFRST bit 2574749e0e6SThinh Nguyen * is cleared only after all the clocks are synchronized. This can 2584749e0e6SThinh Nguyen * take a little more than 50ms. Set the polling rate at 20ms 2594749e0e6SThinh Nguyen * for 10 times instead. 2604749e0e6SThinh Nguyen */ 2614749e0e6SThinh Nguyen if (dwc3_is_usb31(dwc) && dwc->revision >= DWC3_USB31_REVISION_190A) 2624749e0e6SThinh Nguyen retries = 10; 2634749e0e6SThinh Nguyen 264f59dcab1SFelipe Balbi do { 265f59dcab1SFelipe Balbi reg = dwc3_readl(dwc->regs, DWC3_DCTL); 266f59dcab1SFelipe Balbi if (!(reg & DWC3_DCTL_CSFTRST)) 267fab38333SThinh Nguyen goto done; 268f59dcab1SFelipe Balbi 2694749e0e6SThinh Nguyen if (dwc3_is_usb31(dwc) && 2704749e0e6SThinh Nguyen dwc->revision >= DWC3_USB31_REVISION_190A) 2714749e0e6SThinh Nguyen msleep(20); 2724749e0e6SThinh Nguyen else 273f59dcab1SFelipe Balbi udelay(1); 274f59dcab1SFelipe Balbi } while (--retries); 275f59dcab1SFelipe Balbi 27600b42170SBrian Norris phy_exit(dwc->usb3_generic_phy); 27700b42170SBrian Norris phy_exit(dwc->usb2_generic_phy); 27800b42170SBrian Norris 279f59dcab1SFelipe Balbi return -ETIMEDOUT; 280fab38333SThinh Nguyen 281fab38333SThinh Nguyen done: 282fab38333SThinh Nguyen /* 2834749e0e6SThinh Nguyen * For DWC_usb31 controller 1.80a and prior, once DCTL.CSFRST bit 2844749e0e6SThinh Nguyen * is cleared, we must wait at least 50ms before accessing the PHY 2854749e0e6SThinh Nguyen * domain (synchronization delay). 286fab38333SThinh Nguyen */ 2874749e0e6SThinh Nguyen if (dwc3_is_usb31(dwc) && dwc->revision <= DWC3_USB31_REVISION_180A) 288fab38333SThinh Nguyen msleep(50); 289fab38333SThinh Nguyen 290fab38333SThinh Nguyen return 0; 29172246da4SFelipe Balbi } 29272246da4SFelipe Balbi 293fe8abf33SMasahiro Yamada static const struct clk_bulk_data dwc3_core_clks[] = { 294fe8abf33SMasahiro Yamada { .id = "ref" }, 295fe8abf33SMasahiro Yamada { .id = "bus_early" }, 296fe8abf33SMasahiro Yamada { .id = "suspend" }, 297fe8abf33SMasahiro Yamada }; 298fe8abf33SMasahiro Yamada 299db2be4e9SNikhil Badola /* 300db2be4e9SNikhil Badola * dwc3_frame_length_adjustment - Adjusts frame length if required 301db2be4e9SNikhil Badola * @dwc3: Pointer to our controller context structure 302db2be4e9SNikhil Badola */ 303bcdb3272SFelipe Balbi static void dwc3_frame_length_adjustment(struct dwc3 *dwc) 304db2be4e9SNikhil Badola { 305db2be4e9SNikhil Badola u32 reg; 306db2be4e9SNikhil Badola u32 dft; 307db2be4e9SNikhil Badola 308db2be4e9SNikhil Badola if (dwc->revision < DWC3_REVISION_250A) 309db2be4e9SNikhil Badola return; 310db2be4e9SNikhil Badola 311bcdb3272SFelipe Balbi if (dwc->fladj == 0) 312db2be4e9SNikhil Badola return; 313db2be4e9SNikhil Badola 314db2be4e9SNikhil Badola reg = dwc3_readl(dwc->regs, DWC3_GFLADJ); 315db2be4e9SNikhil Badola dft = reg & DWC3_GFLADJ_30MHZ_MASK; 316bcdb3272SFelipe Balbi if (!dev_WARN_ONCE(dwc->dev, dft == dwc->fladj, 317db2be4e9SNikhil Badola "request value same as default, ignoring\n")) { 318db2be4e9SNikhil Badola reg &= ~DWC3_GFLADJ_30MHZ_MASK; 319bcdb3272SFelipe Balbi reg |= DWC3_GFLADJ_30MHZ_SDBND_SEL | dwc->fladj; 320db2be4e9SNikhil Badola dwc3_writel(dwc->regs, DWC3_GFLADJ, reg); 321db2be4e9SNikhil Badola } 322db2be4e9SNikhil Badola } 323db2be4e9SNikhil Badola 324c5cc74e8SHeikki Krogerus /** 32572246da4SFelipe Balbi * dwc3_free_one_event_buffer - Frees one event buffer 32672246da4SFelipe Balbi * @dwc: Pointer to our controller context structure 32772246da4SFelipe Balbi * @evt: Pointer to event buffer to be freed 32872246da4SFelipe Balbi */ 32972246da4SFelipe Balbi static void dwc3_free_one_event_buffer(struct dwc3 *dwc, 33072246da4SFelipe Balbi struct dwc3_event_buffer *evt) 33172246da4SFelipe Balbi { 332d64ff406SArnd Bergmann dma_free_coherent(dwc->sysdev, evt->length, evt->buf, evt->dma); 33372246da4SFelipe Balbi } 33472246da4SFelipe Balbi 33572246da4SFelipe Balbi /** 3361d046793SPaul Zimmerman * dwc3_alloc_one_event_buffer - Allocates one event buffer structure 33772246da4SFelipe Balbi * @dwc: Pointer to our controller context structure 33872246da4SFelipe Balbi * @length: size of the event buffer 33972246da4SFelipe Balbi * 3401d046793SPaul Zimmerman * Returns a pointer to the allocated event buffer structure on success 34172246da4SFelipe Balbi * otherwise ERR_PTR(errno). 34272246da4SFelipe Balbi */ 34367d0b500SFelipe Balbi static struct dwc3_event_buffer *dwc3_alloc_one_event_buffer(struct dwc3 *dwc, 34467d0b500SFelipe Balbi unsigned length) 34572246da4SFelipe Balbi { 34672246da4SFelipe Balbi struct dwc3_event_buffer *evt; 34772246da4SFelipe Balbi 348380f0d28SFelipe Balbi evt = devm_kzalloc(dwc->dev, sizeof(*evt), GFP_KERNEL); 34972246da4SFelipe Balbi if (!evt) 35072246da4SFelipe Balbi return ERR_PTR(-ENOMEM); 35172246da4SFelipe Balbi 35272246da4SFelipe Balbi evt->dwc = dwc; 35372246da4SFelipe Balbi evt->length = length; 354d9fa4c63SJohn Youn evt->cache = devm_kzalloc(dwc->dev, length, GFP_KERNEL); 355d9fa4c63SJohn Youn if (!evt->cache) 356d9fa4c63SJohn Youn return ERR_PTR(-ENOMEM); 357d9fa4c63SJohn Youn 358d64ff406SArnd Bergmann evt->buf = dma_alloc_coherent(dwc->sysdev, length, 35972246da4SFelipe Balbi &evt->dma, GFP_KERNEL); 360e32672f0SFelipe Balbi if (!evt->buf) 36172246da4SFelipe Balbi return ERR_PTR(-ENOMEM); 36272246da4SFelipe Balbi 36372246da4SFelipe Balbi return evt; 36472246da4SFelipe Balbi } 36572246da4SFelipe Balbi 36672246da4SFelipe Balbi /** 36772246da4SFelipe Balbi * dwc3_free_event_buffers - frees all allocated event buffers 36872246da4SFelipe Balbi * @dwc: Pointer to our controller context structure 36972246da4SFelipe Balbi */ 37072246da4SFelipe Balbi static void dwc3_free_event_buffers(struct dwc3 *dwc) 37172246da4SFelipe Balbi { 37272246da4SFelipe Balbi struct dwc3_event_buffer *evt; 37372246da4SFelipe Balbi 374696c8b12SFelipe Balbi evt = dwc->ev_buf; 37564b6c8a7SAnton Tikhomirov if (evt) 37672246da4SFelipe Balbi dwc3_free_one_event_buffer(dwc, evt); 37772246da4SFelipe Balbi } 37872246da4SFelipe Balbi 37972246da4SFelipe Balbi /** 38072246da4SFelipe Balbi * dwc3_alloc_event_buffers - Allocates @num event buffers of size @length 3811d046793SPaul Zimmerman * @dwc: pointer to our controller context structure 38272246da4SFelipe Balbi * @length: size of event buffer 38372246da4SFelipe Balbi * 3841d046793SPaul Zimmerman * Returns 0 on success otherwise negative errno. In the error case, dwc 38572246da4SFelipe Balbi * may contain some buffers allocated but not all which were requested. 38672246da4SFelipe Balbi */ 38741ac7b3aSBill Pemberton static int dwc3_alloc_event_buffers(struct dwc3 *dwc, unsigned length) 38872246da4SFelipe Balbi { 38972246da4SFelipe Balbi struct dwc3_event_buffer *evt; 39072246da4SFelipe Balbi 39172246da4SFelipe Balbi evt = dwc3_alloc_one_event_buffer(dwc, length); 39272246da4SFelipe Balbi if (IS_ERR(evt)) { 39372246da4SFelipe Balbi dev_err(dwc->dev, "can't allocate event buffer\n"); 39472246da4SFelipe Balbi return PTR_ERR(evt); 39572246da4SFelipe Balbi } 396696c8b12SFelipe Balbi dwc->ev_buf = evt; 39772246da4SFelipe Balbi 39872246da4SFelipe Balbi return 0; 39972246da4SFelipe Balbi } 40072246da4SFelipe Balbi 40172246da4SFelipe Balbi /** 40272246da4SFelipe Balbi * dwc3_event_buffers_setup - setup our allocated event buffers 4031d046793SPaul Zimmerman * @dwc: pointer to our controller context structure 40472246da4SFelipe Balbi * 40572246da4SFelipe Balbi * Returns 0 on success otherwise negative errno. 40672246da4SFelipe Balbi */ 407f09cc79bSRoger Quadros int dwc3_event_buffers_setup(struct dwc3 *dwc) 40872246da4SFelipe Balbi { 40972246da4SFelipe Balbi struct dwc3_event_buffer *evt; 41072246da4SFelipe Balbi 411696c8b12SFelipe Balbi evt = dwc->ev_buf; 4127acd85e0SPaul Zimmerman evt->lpos = 0; 413660e9bdeSFelipe Balbi dwc3_writel(dwc->regs, DWC3_GEVNTADRLO(0), 41472246da4SFelipe Balbi lower_32_bits(evt->dma)); 415660e9bdeSFelipe Balbi dwc3_writel(dwc->regs, DWC3_GEVNTADRHI(0), 41672246da4SFelipe Balbi upper_32_bits(evt->dma)); 417660e9bdeSFelipe Balbi dwc3_writel(dwc->regs, DWC3_GEVNTSIZ(0), 41868d6a01bSFelipe Balbi DWC3_GEVNTSIZ_SIZE(evt->length)); 419660e9bdeSFelipe Balbi dwc3_writel(dwc->regs, DWC3_GEVNTCOUNT(0), 0); 42072246da4SFelipe Balbi 42172246da4SFelipe Balbi return 0; 42272246da4SFelipe Balbi } 42372246da4SFelipe Balbi 424f09cc79bSRoger Quadros void dwc3_event_buffers_cleanup(struct dwc3 *dwc) 42572246da4SFelipe Balbi { 42672246da4SFelipe Balbi struct dwc3_event_buffer *evt; 42772246da4SFelipe Balbi 428696c8b12SFelipe Balbi evt = dwc->ev_buf; 4297acd85e0SPaul Zimmerman 4307acd85e0SPaul Zimmerman evt->lpos = 0; 4317acd85e0SPaul Zimmerman 432660e9bdeSFelipe Balbi dwc3_writel(dwc->regs, DWC3_GEVNTADRLO(0), 0); 433660e9bdeSFelipe Balbi dwc3_writel(dwc->regs, DWC3_GEVNTADRHI(0), 0); 434660e9bdeSFelipe Balbi dwc3_writel(dwc->regs, DWC3_GEVNTSIZ(0), DWC3_GEVNTSIZ_INTMASK 43568d6a01bSFelipe Balbi | DWC3_GEVNTSIZ_SIZE(0)); 436660e9bdeSFelipe Balbi dwc3_writel(dwc->regs, DWC3_GEVNTCOUNT(0), 0); 43772246da4SFelipe Balbi } 43872246da4SFelipe Balbi 4390ffcaf37SFelipe Balbi static int dwc3_alloc_scratch_buffers(struct dwc3 *dwc) 4400ffcaf37SFelipe Balbi { 4410ffcaf37SFelipe Balbi if (!dwc->has_hibernation) 4420ffcaf37SFelipe Balbi return 0; 4430ffcaf37SFelipe Balbi 4440ffcaf37SFelipe Balbi if (!dwc->nr_scratch) 4450ffcaf37SFelipe Balbi return 0; 4460ffcaf37SFelipe Balbi 4470ffcaf37SFelipe Balbi dwc->scratchbuf = kmalloc_array(dwc->nr_scratch, 4480ffcaf37SFelipe Balbi DWC3_SCRATCHBUF_SIZE, GFP_KERNEL); 4490ffcaf37SFelipe Balbi if (!dwc->scratchbuf) 4500ffcaf37SFelipe Balbi return -ENOMEM; 4510ffcaf37SFelipe Balbi 4520ffcaf37SFelipe Balbi return 0; 4530ffcaf37SFelipe Balbi } 4540ffcaf37SFelipe Balbi 4550ffcaf37SFelipe Balbi static int dwc3_setup_scratch_buffers(struct dwc3 *dwc) 4560ffcaf37SFelipe Balbi { 4570ffcaf37SFelipe Balbi dma_addr_t scratch_addr; 4580ffcaf37SFelipe Balbi u32 param; 4590ffcaf37SFelipe Balbi int ret; 4600ffcaf37SFelipe Balbi 4610ffcaf37SFelipe Balbi if (!dwc->has_hibernation) 4620ffcaf37SFelipe Balbi return 0; 4630ffcaf37SFelipe Balbi 4640ffcaf37SFelipe Balbi if (!dwc->nr_scratch) 4650ffcaf37SFelipe Balbi return 0; 4660ffcaf37SFelipe Balbi 4670ffcaf37SFelipe Balbi /* should never fall here */ 4680ffcaf37SFelipe Balbi if (!WARN_ON(dwc->scratchbuf)) 4690ffcaf37SFelipe Balbi return 0; 4700ffcaf37SFelipe Balbi 471d64ff406SArnd Bergmann scratch_addr = dma_map_single(dwc->sysdev, dwc->scratchbuf, 4720ffcaf37SFelipe Balbi dwc->nr_scratch * DWC3_SCRATCHBUF_SIZE, 4730ffcaf37SFelipe Balbi DMA_BIDIRECTIONAL); 474d64ff406SArnd Bergmann if (dma_mapping_error(dwc->sysdev, scratch_addr)) { 475d64ff406SArnd Bergmann dev_err(dwc->sysdev, "failed to map scratch buffer\n"); 4760ffcaf37SFelipe Balbi ret = -EFAULT; 4770ffcaf37SFelipe Balbi goto err0; 4780ffcaf37SFelipe Balbi } 4790ffcaf37SFelipe Balbi 4800ffcaf37SFelipe Balbi dwc->scratch_addr = scratch_addr; 4810ffcaf37SFelipe Balbi 4820ffcaf37SFelipe Balbi param = lower_32_bits(scratch_addr); 4830ffcaf37SFelipe Balbi 4840ffcaf37SFelipe Balbi ret = dwc3_send_gadget_generic_command(dwc, 4850ffcaf37SFelipe Balbi DWC3_DGCMD_SET_SCRATCHPAD_ADDR_LO, param); 4860ffcaf37SFelipe Balbi if (ret < 0) 4870ffcaf37SFelipe Balbi goto err1; 4880ffcaf37SFelipe Balbi 4890ffcaf37SFelipe Balbi param = upper_32_bits(scratch_addr); 4900ffcaf37SFelipe Balbi 4910ffcaf37SFelipe Balbi ret = dwc3_send_gadget_generic_command(dwc, 4920ffcaf37SFelipe Balbi DWC3_DGCMD_SET_SCRATCHPAD_ADDR_HI, param); 4930ffcaf37SFelipe Balbi if (ret < 0) 4940ffcaf37SFelipe Balbi goto err1; 4950ffcaf37SFelipe Balbi 4960ffcaf37SFelipe Balbi return 0; 4970ffcaf37SFelipe Balbi 4980ffcaf37SFelipe Balbi err1: 499d64ff406SArnd Bergmann dma_unmap_single(dwc->sysdev, dwc->scratch_addr, dwc->nr_scratch * 5000ffcaf37SFelipe Balbi DWC3_SCRATCHBUF_SIZE, DMA_BIDIRECTIONAL); 5010ffcaf37SFelipe Balbi 5020ffcaf37SFelipe Balbi err0: 5030ffcaf37SFelipe Balbi return ret; 5040ffcaf37SFelipe Balbi } 5050ffcaf37SFelipe Balbi 5060ffcaf37SFelipe Balbi static void dwc3_free_scratch_buffers(struct dwc3 *dwc) 5070ffcaf37SFelipe Balbi { 5080ffcaf37SFelipe Balbi if (!dwc->has_hibernation) 5090ffcaf37SFelipe Balbi return; 5100ffcaf37SFelipe Balbi 5110ffcaf37SFelipe Balbi if (!dwc->nr_scratch) 5120ffcaf37SFelipe Balbi return; 5130ffcaf37SFelipe Balbi 5140ffcaf37SFelipe Balbi /* should never fall here */ 5150ffcaf37SFelipe Balbi if (!WARN_ON(dwc->scratchbuf)) 5160ffcaf37SFelipe Balbi return; 5170ffcaf37SFelipe Balbi 518d64ff406SArnd Bergmann dma_unmap_single(dwc->sysdev, dwc->scratch_addr, dwc->nr_scratch * 5190ffcaf37SFelipe Balbi DWC3_SCRATCHBUF_SIZE, DMA_BIDIRECTIONAL); 5200ffcaf37SFelipe Balbi kfree(dwc->scratchbuf); 5210ffcaf37SFelipe Balbi } 5220ffcaf37SFelipe Balbi 523789451f6SFelipe Balbi static void dwc3_core_num_eps(struct dwc3 *dwc) 524789451f6SFelipe Balbi { 525789451f6SFelipe Balbi struct dwc3_hwparams *parms = &dwc->hwparams; 526789451f6SFelipe Balbi 52747d3946eSBryan O'Donoghue dwc->num_eps = DWC3_NUM_EPS(parms); 528789451f6SFelipe Balbi } 529789451f6SFelipe Balbi 53041ac7b3aSBill Pemberton static void dwc3_cache_hwparams(struct dwc3 *dwc) 53126ceca97SFelipe Balbi { 53226ceca97SFelipe Balbi struct dwc3_hwparams *parms = &dwc->hwparams; 53326ceca97SFelipe Balbi 53426ceca97SFelipe Balbi parms->hwparams0 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS0); 53526ceca97SFelipe Balbi parms->hwparams1 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS1); 53626ceca97SFelipe Balbi parms->hwparams2 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS2); 53726ceca97SFelipe Balbi parms->hwparams3 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS3); 53826ceca97SFelipe Balbi parms->hwparams4 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS4); 53926ceca97SFelipe Balbi parms->hwparams5 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS5); 54026ceca97SFelipe Balbi parms->hwparams6 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS6); 54126ceca97SFelipe Balbi parms->hwparams7 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS7); 54226ceca97SFelipe Balbi parms->hwparams8 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS8); 54326ceca97SFelipe Balbi } 54426ceca97SFelipe Balbi 54598112041SRoger Quadros static int dwc3_core_ulpi_init(struct dwc3 *dwc) 54698112041SRoger Quadros { 54798112041SRoger Quadros int intf; 54898112041SRoger Quadros int ret = 0; 54998112041SRoger Quadros 55098112041SRoger Quadros intf = DWC3_GHWPARAMS3_HSPHY_IFC(dwc->hwparams.hwparams3); 55198112041SRoger Quadros 55298112041SRoger Quadros if (intf == DWC3_GHWPARAMS3_HSPHY_IFC_ULPI || 55398112041SRoger Quadros (intf == DWC3_GHWPARAMS3_HSPHY_IFC_UTMI_ULPI && 55498112041SRoger Quadros dwc->hsphy_interface && 55598112041SRoger Quadros !strncmp(dwc->hsphy_interface, "ulpi", 4))) 55698112041SRoger Quadros ret = dwc3_ulpi_init(dwc); 55798112041SRoger Quadros 55898112041SRoger Quadros return ret; 55998112041SRoger Quadros } 56098112041SRoger Quadros 56172246da4SFelipe Balbi /** 562b5a65c40SHuang Rui * dwc3_phy_setup - Configure USB PHY Interface of DWC3 Core 563b5a65c40SHuang Rui * @dwc: Pointer to our controller context structure 56488bc9d19SHeikki Krogerus * 56588bc9d19SHeikki Krogerus * Returns 0 on success. The USB PHY interfaces are configured but not 56688bc9d19SHeikki Krogerus * initialized. The PHY interfaces and the PHYs get initialized together with 56788bc9d19SHeikki Krogerus * the core in dwc3_core_init. 568b5a65c40SHuang Rui */ 56988bc9d19SHeikki Krogerus static int dwc3_phy_setup(struct dwc3 *dwc) 570b5a65c40SHuang Rui { 571b5a65c40SHuang Rui u32 reg; 572b5a65c40SHuang Rui 573b5a65c40SHuang Rui reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0)); 574b5a65c40SHuang Rui 5752164a476SHuang Rui /* 5761966b865SFelipe Balbi * Make sure UX_EXIT_PX is cleared as that causes issues with some 5771966b865SFelipe Balbi * PHYs. Also, this bit is not supposed to be used in normal operation. 5781966b865SFelipe Balbi */ 5791966b865SFelipe Balbi reg &= ~DWC3_GUSB3PIPECTL_UX_EXIT_PX; 5801966b865SFelipe Balbi 5811966b865SFelipe Balbi /* 5822164a476SHuang Rui * Above 1.94a, it is recommended to set DWC3_GUSB3PIPECTL_SUSPHY 5832164a476SHuang Rui * to '0' during coreConsultant configuration. So default value 5842164a476SHuang Rui * will be '0' when the core is reset. Application needs to set it 5852164a476SHuang Rui * to '1' after the core initialization is completed. 5862164a476SHuang Rui */ 5872164a476SHuang Rui if (dwc->revision > DWC3_REVISION_194A) 5882164a476SHuang Rui reg |= DWC3_GUSB3PIPECTL_SUSPHY; 5892164a476SHuang Rui 590b5a65c40SHuang Rui if (dwc->u2ss_inp3_quirk) 591b5a65c40SHuang Rui reg |= DWC3_GUSB3PIPECTL_U2SSINP3OK; 592b5a65c40SHuang Rui 593e58dd357SRajesh Bhagat if (dwc->dis_rxdet_inp3_quirk) 594e58dd357SRajesh Bhagat reg |= DWC3_GUSB3PIPECTL_DISRXDETINP3; 595e58dd357SRajesh Bhagat 596df31f5b3SHuang Rui if (dwc->req_p1p2p3_quirk) 597df31f5b3SHuang Rui reg |= DWC3_GUSB3PIPECTL_REQP1P2P3; 598df31f5b3SHuang Rui 599a2a1d0f5SHuang Rui if (dwc->del_p1p2p3_quirk) 600a2a1d0f5SHuang Rui reg |= DWC3_GUSB3PIPECTL_DEP1P2P3_EN; 601a2a1d0f5SHuang Rui 60241c06ffdSHuang Rui if (dwc->del_phy_power_chg_quirk) 60341c06ffdSHuang Rui reg |= DWC3_GUSB3PIPECTL_DEPOCHANGE; 60441c06ffdSHuang Rui 605fb67afcaSHuang Rui if (dwc->lfps_filter_quirk) 606fb67afcaSHuang Rui reg |= DWC3_GUSB3PIPECTL_LFPSFILT; 607fb67afcaSHuang Rui 60814f4ac53SHuang Rui if (dwc->rx_detect_poll_quirk) 60914f4ac53SHuang Rui reg |= DWC3_GUSB3PIPECTL_RX_DETOPOLL; 61014f4ac53SHuang Rui 6116b6a0c9aSHuang Rui if (dwc->tx_de_emphasis_quirk) 6126b6a0c9aSHuang Rui reg |= DWC3_GUSB3PIPECTL_TX_DEEPH(dwc->tx_de_emphasis); 6136b6a0c9aSHuang Rui 614cd72f890SFelipe Balbi if (dwc->dis_u3_susphy_quirk) 61559acfa20SHuang Rui reg &= ~DWC3_GUSB3PIPECTL_SUSPHY; 61659acfa20SHuang Rui 61700fe081dSWilliam Wu if (dwc->dis_del_phy_power_chg_quirk) 61800fe081dSWilliam Wu reg &= ~DWC3_GUSB3PIPECTL_DEPOCHANGE; 61900fe081dSWilliam Wu 620b5a65c40SHuang Rui dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg); 621b5a65c40SHuang Rui 6222164a476SHuang Rui reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0)); 6232164a476SHuang Rui 6243e10a2ceSHeikki Krogerus /* Select the HS PHY interface */ 6253e10a2ceSHeikki Krogerus switch (DWC3_GHWPARAMS3_HSPHY_IFC(dwc->hwparams.hwparams3)) { 6263e10a2ceSHeikki Krogerus case DWC3_GHWPARAMS3_HSPHY_IFC_UTMI_ULPI: 62743cacb03SFelipe Balbi if (dwc->hsphy_interface && 62843cacb03SFelipe Balbi !strncmp(dwc->hsphy_interface, "utmi", 4)) { 6293e10a2ceSHeikki Krogerus reg &= ~DWC3_GUSB2PHYCFG_ULPI_UTMI; 63088bc9d19SHeikki Krogerus break; 63143cacb03SFelipe Balbi } else if (dwc->hsphy_interface && 63243cacb03SFelipe Balbi !strncmp(dwc->hsphy_interface, "ulpi", 4)) { 6333e10a2ceSHeikki Krogerus reg |= DWC3_GUSB2PHYCFG_ULPI_UTMI; 63488bc9d19SHeikki Krogerus dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); 6353e10a2ceSHeikki Krogerus } else { 63688bc9d19SHeikki Krogerus /* Relying on default value. */ 63788bc9d19SHeikki Krogerus if (!(reg & DWC3_GUSB2PHYCFG_ULPI_UTMI)) 6383e10a2ceSHeikki Krogerus break; 6393e10a2ceSHeikki Krogerus } 6403e10a2ceSHeikki Krogerus /* FALLTHROUGH */ 64188bc9d19SHeikki Krogerus case DWC3_GHWPARAMS3_HSPHY_IFC_ULPI: 64288bc9d19SHeikki Krogerus /* FALLTHROUGH */ 6433e10a2ceSHeikki Krogerus default: 6443e10a2ceSHeikki Krogerus break; 6453e10a2ceSHeikki Krogerus } 6463e10a2ceSHeikki Krogerus 64732f2ed86SWilliam Wu switch (dwc->hsphy_mode) { 64832f2ed86SWilliam Wu case USBPHY_INTERFACE_MODE_UTMI: 64932f2ed86SWilliam Wu reg &= ~(DWC3_GUSB2PHYCFG_PHYIF_MASK | 65032f2ed86SWilliam Wu DWC3_GUSB2PHYCFG_USBTRDTIM_MASK); 65132f2ed86SWilliam Wu reg |= DWC3_GUSB2PHYCFG_PHYIF(UTMI_PHYIF_8_BIT) | 65232f2ed86SWilliam Wu DWC3_GUSB2PHYCFG_USBTRDTIM(USBTRDTIM_UTMI_8_BIT); 65332f2ed86SWilliam Wu break; 65432f2ed86SWilliam Wu case USBPHY_INTERFACE_MODE_UTMIW: 65532f2ed86SWilliam Wu reg &= ~(DWC3_GUSB2PHYCFG_PHYIF_MASK | 65632f2ed86SWilliam Wu DWC3_GUSB2PHYCFG_USBTRDTIM_MASK); 65732f2ed86SWilliam Wu reg |= DWC3_GUSB2PHYCFG_PHYIF(UTMI_PHYIF_16_BIT) | 65832f2ed86SWilliam Wu DWC3_GUSB2PHYCFG_USBTRDTIM(USBTRDTIM_UTMI_16_BIT); 65932f2ed86SWilliam Wu break; 66032f2ed86SWilliam Wu default: 66132f2ed86SWilliam Wu break; 66232f2ed86SWilliam Wu } 66332f2ed86SWilliam Wu 6642164a476SHuang Rui /* 6652164a476SHuang Rui * Above 1.94a, it is recommended to set DWC3_GUSB2PHYCFG_SUSPHY to 6662164a476SHuang Rui * '0' during coreConsultant configuration. So default value will 6672164a476SHuang Rui * be '0' when the core is reset. Application needs to set it to 6682164a476SHuang Rui * '1' after the core initialization is completed. 6692164a476SHuang Rui */ 6702164a476SHuang Rui if (dwc->revision > DWC3_REVISION_194A) 6712164a476SHuang Rui reg |= DWC3_GUSB2PHYCFG_SUSPHY; 6722164a476SHuang Rui 673cd72f890SFelipe Balbi if (dwc->dis_u2_susphy_quirk) 6740effe0a3SHuang Rui reg &= ~DWC3_GUSB2PHYCFG_SUSPHY; 6750effe0a3SHuang Rui 676ec791d14SJohn Youn if (dwc->dis_enblslpm_quirk) 677ec791d14SJohn Youn reg &= ~DWC3_GUSB2PHYCFG_ENBLSLPM; 678eafeacf1SThinh Nguyen else 679eafeacf1SThinh Nguyen reg |= DWC3_GUSB2PHYCFG_ENBLSLPM; 680ec791d14SJohn Youn 68116199f33SWilliam Wu if (dwc->dis_u2_freeclk_exists_quirk) 68216199f33SWilliam Wu reg &= ~DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS; 68316199f33SWilliam Wu 6842164a476SHuang Rui dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); 68588bc9d19SHeikki Krogerus 68688bc9d19SHeikki Krogerus return 0; 687b5a65c40SHuang Rui } 688b5a65c40SHuang Rui 689c499ff71SFelipe Balbi static void dwc3_core_exit(struct dwc3 *dwc) 690c499ff71SFelipe Balbi { 691c499ff71SFelipe Balbi dwc3_event_buffers_cleanup(dwc); 692c499ff71SFelipe Balbi 693c499ff71SFelipe Balbi usb_phy_shutdown(dwc->usb2_phy); 694c499ff71SFelipe Balbi usb_phy_shutdown(dwc->usb3_phy); 695c499ff71SFelipe Balbi phy_exit(dwc->usb2_generic_phy); 696c499ff71SFelipe Balbi phy_exit(dwc->usb3_generic_phy); 697c499ff71SFelipe Balbi 698c499ff71SFelipe Balbi usb_phy_set_suspend(dwc->usb2_phy, 1); 699c499ff71SFelipe Balbi usb_phy_set_suspend(dwc->usb3_phy, 1); 700c499ff71SFelipe Balbi phy_power_off(dwc->usb2_generic_phy); 701c499ff71SFelipe Balbi phy_power_off(dwc->usb3_generic_phy); 702fe8abf33SMasahiro Yamada clk_bulk_disable(dwc->num_clks, dwc->clks); 703fe8abf33SMasahiro Yamada clk_bulk_unprepare(dwc->num_clks, dwc->clks); 704fe8abf33SMasahiro Yamada reset_control_assert(dwc->reset); 705c499ff71SFelipe Balbi } 706c499ff71SFelipe Balbi 7070759956fSFelipe Balbi static bool dwc3_core_is_valid(struct dwc3 *dwc) 70872246da4SFelipe Balbi { 70972246da4SFelipe Balbi u32 reg; 71072246da4SFelipe Balbi 7117650bd74SSebastian Andrzej Siewior reg = dwc3_readl(dwc->regs, DWC3_GSNPSID); 7120759956fSFelipe Balbi 7137650bd74SSebastian Andrzej Siewior /* This should read as U3 followed by revision number */ 714690fb371SJohn Youn if ((reg & DWC3_GSNPSID_MASK) == 0x55330000) { 715690fb371SJohn Youn /* Detected DWC_usb3 IP */ 716690fb371SJohn Youn dwc->revision = reg; 717690fb371SJohn Youn } else if ((reg & DWC3_GSNPSID_MASK) == 0x33310000) { 718690fb371SJohn Youn /* Detected DWC_usb31 IP */ 719690fb371SJohn Youn dwc->revision = dwc3_readl(dwc->regs, DWC3_VER_NUMBER); 720690fb371SJohn Youn dwc->revision |= DWC3_REVISION_IS_DWC31; 721475d8e01SThinh Nguyen dwc->version_type = dwc3_readl(dwc->regs, DWC3_VER_TYPE); 722690fb371SJohn Youn } else { 7230759956fSFelipe Balbi return false; 7247650bd74SSebastian Andrzej Siewior } 7257650bd74SSebastian Andrzej Siewior 7260759956fSFelipe Balbi return true; 7270e1e5c47SPaul Zimmerman } 7280e1e5c47SPaul Zimmerman 729941f918eSFelipe Balbi static void dwc3_core_setup_global_control(struct dwc3 *dwc) 73072246da4SFelipe Balbi { 73172246da4SFelipe Balbi u32 hwparams4 = dwc->hwparams.hwparams4; 73272246da4SFelipe Balbi u32 reg; 733c499ff71SFelipe Balbi 7344878a028SSebastian Andrzej Siewior reg = dwc3_readl(dwc->regs, DWC3_GCTL); 7353e87c42aSPaul Zimmerman reg &= ~DWC3_GCTL_SCALEDOWN_MASK; 7364878a028SSebastian Andrzej Siewior 737164d7731SSebastian Andrzej Siewior switch (DWC3_GHWPARAMS1_EN_PWROPT(dwc->hwparams.hwparams1)) { 7384878a028SSebastian Andrzej Siewior case DWC3_GHWPARAMS1_EN_PWROPT_CLK: 73932a4a135SFelipe Balbi /** 74032a4a135SFelipe Balbi * WORKAROUND: DWC3 revisions between 2.10a and 2.50a have an 74132a4a135SFelipe Balbi * issue which would cause xHCI compliance tests to fail. 74232a4a135SFelipe Balbi * 74332a4a135SFelipe Balbi * Because of that we cannot enable clock gating on such 74432a4a135SFelipe Balbi * configurations. 74532a4a135SFelipe Balbi * 74632a4a135SFelipe Balbi * Refers to: 74732a4a135SFelipe Balbi * 74832a4a135SFelipe Balbi * STAR#9000588375: Clock Gating, SOF Issues when ref_clk-Based 74932a4a135SFelipe Balbi * SOF/ITP Mode Used 75032a4a135SFelipe Balbi */ 75132a4a135SFelipe Balbi if ((dwc->dr_mode == USB_DR_MODE_HOST || 75232a4a135SFelipe Balbi dwc->dr_mode == USB_DR_MODE_OTG) && 75332a4a135SFelipe Balbi (dwc->revision >= DWC3_REVISION_210A && 75432a4a135SFelipe Balbi dwc->revision <= DWC3_REVISION_250A)) 75532a4a135SFelipe Balbi reg |= DWC3_GCTL_DSBLCLKGTNG | DWC3_GCTL_SOFITPSYNC; 75632a4a135SFelipe Balbi else 7574878a028SSebastian Andrzej Siewior reg &= ~DWC3_GCTL_DSBLCLKGTNG; 7584878a028SSebastian Andrzej Siewior break; 7590ffcaf37SFelipe Balbi case DWC3_GHWPARAMS1_EN_PWROPT_HIB: 7600ffcaf37SFelipe Balbi /* enable hibernation here */ 7610ffcaf37SFelipe Balbi dwc->nr_scratch = DWC3_GHWPARAMS4_HIBER_SCRATCHBUFS(hwparams4); 7622eac3992SHuang Rui 7632eac3992SHuang Rui /* 7642eac3992SHuang Rui * REVISIT Enabling this bit so that host-mode hibernation 7652eac3992SHuang Rui * will work. Device-mode hibernation is not yet implemented. 7662eac3992SHuang Rui */ 7672eac3992SHuang Rui reg |= DWC3_GCTL_GBLHIBERNATIONEN; 7680ffcaf37SFelipe Balbi break; 7694878a028SSebastian Andrzej Siewior default: 7705eb30cedSFelipe Balbi /* nothing */ 7715eb30cedSFelipe Balbi break; 7724878a028SSebastian Andrzej Siewior } 7734878a028SSebastian Andrzej Siewior 774946bd579SHuang Rui /* check if current dwc3 is on simulation board */ 775946bd579SHuang Rui if (dwc->hwparams.hwparams6 & DWC3_GHWPARAMS6_EN_FPGA) { 7766af19fd1SFaisal Mehmood dev_info(dwc->dev, "Running with FPGA optimizations\n"); 777946bd579SHuang Rui dwc->is_fpga = true; 778946bd579SHuang Rui } 779946bd579SHuang Rui 7803b81221aSHuang Rui WARN_ONCE(dwc->disable_scramble_quirk && !dwc->is_fpga, 7813b81221aSHuang Rui "disable_scramble cannot be used on non-FPGA builds\n"); 7823b81221aSHuang Rui 7833b81221aSHuang Rui if (dwc->disable_scramble_quirk && dwc->is_fpga) 7843b81221aSHuang Rui reg |= DWC3_GCTL_DISSCRAMBLE; 7853b81221aSHuang Rui else 7863b81221aSHuang Rui reg &= ~DWC3_GCTL_DISSCRAMBLE; 7873b81221aSHuang Rui 7889a5b2f31SHuang Rui if (dwc->u2exit_lfps_quirk) 7899a5b2f31SHuang Rui reg |= DWC3_GCTL_U2EXIT_LFPS; 7909a5b2f31SHuang Rui 7914878a028SSebastian Andrzej Siewior /* 7924878a028SSebastian Andrzej Siewior * WORKAROUND: DWC3 revisions <1.90a have a bug 7931d046793SPaul Zimmerman * where the device can fail to connect at SuperSpeed 7944878a028SSebastian Andrzej Siewior * and falls back to high-speed mode which causes 7951d046793SPaul Zimmerman * the device to enter a Connect/Disconnect loop 7964878a028SSebastian Andrzej Siewior */ 7974878a028SSebastian Andrzej Siewior if (dwc->revision < DWC3_REVISION_190A) 7984878a028SSebastian Andrzej Siewior reg |= DWC3_GCTL_U2RSTECN; 7994878a028SSebastian Andrzej Siewior 8004878a028SSebastian Andrzej Siewior dwc3_writel(dwc->regs, DWC3_GCTL, reg); 801941f918eSFelipe Balbi } 8024878a028SSebastian Andrzej Siewior 803f54edb53SFelipe Balbi static int dwc3_core_get_phy(struct dwc3 *dwc); 80498112041SRoger Quadros static int dwc3_core_ulpi_init(struct dwc3 *dwc); 805f54edb53SFelipe Balbi 806d9612c2fSPengbo Mu /* set global incr burst type configuration registers */ 807d9612c2fSPengbo Mu static void dwc3_set_incr_burst_type(struct dwc3 *dwc) 808d9612c2fSPengbo Mu { 809d9612c2fSPengbo Mu struct device *dev = dwc->dev; 810d9612c2fSPengbo Mu /* incrx_mode : for INCR burst type. */ 811d9612c2fSPengbo Mu bool incrx_mode; 812d9612c2fSPengbo Mu /* incrx_size : for size of INCRX burst. */ 813d9612c2fSPengbo Mu u32 incrx_size; 814d9612c2fSPengbo Mu u32 *vals; 815d9612c2fSPengbo Mu u32 cfg; 816d9612c2fSPengbo Mu int ntype; 817d9612c2fSPengbo Mu int ret; 818d9612c2fSPengbo Mu int i; 819d9612c2fSPengbo Mu 820d9612c2fSPengbo Mu cfg = dwc3_readl(dwc->regs, DWC3_GSBUSCFG0); 821d9612c2fSPengbo Mu 822d9612c2fSPengbo Mu /* 823d9612c2fSPengbo Mu * Handle property "snps,incr-burst-type-adjustment". 824d9612c2fSPengbo Mu * Get the number of value from this property: 825d9612c2fSPengbo Mu * result <= 0, means this property is not supported. 826d9612c2fSPengbo Mu * result = 1, means INCRx burst mode supported. 827d9612c2fSPengbo Mu * result > 1, means undefined length burst mode supported. 828d9612c2fSPengbo Mu */ 829a6e5e679SAndy Shevchenko ntype = device_property_count_u32(dev, "snps,incr-burst-type-adjustment"); 830d9612c2fSPengbo Mu if (ntype <= 0) 831d9612c2fSPengbo Mu return; 832d9612c2fSPengbo Mu 833d9612c2fSPengbo Mu vals = kcalloc(ntype, sizeof(u32), GFP_KERNEL); 834d9612c2fSPengbo Mu if (!vals) { 835d9612c2fSPengbo Mu dev_err(dev, "Error to get memory\n"); 836d9612c2fSPengbo Mu return; 837d9612c2fSPengbo Mu } 838d9612c2fSPengbo Mu 839d9612c2fSPengbo Mu /* Get INCR burst type, and parse it */ 840d9612c2fSPengbo Mu ret = device_property_read_u32_array(dev, 841d9612c2fSPengbo Mu "snps,incr-burst-type-adjustment", vals, ntype); 842d9612c2fSPengbo Mu if (ret) { 84375ecb9ddSAndy Shevchenko kfree(vals); 844d9612c2fSPengbo Mu dev_err(dev, "Error to get property\n"); 845d9612c2fSPengbo Mu return; 846d9612c2fSPengbo Mu } 847d9612c2fSPengbo Mu 848d9612c2fSPengbo Mu incrx_size = *vals; 849d9612c2fSPengbo Mu 850d9612c2fSPengbo Mu if (ntype > 1) { 851d9612c2fSPengbo Mu /* INCRX (undefined length) burst mode */ 852d9612c2fSPengbo Mu incrx_mode = INCRX_UNDEF_LENGTH_BURST_MODE; 853d9612c2fSPengbo Mu for (i = 1; i < ntype; i++) { 854d9612c2fSPengbo Mu if (vals[i] > incrx_size) 855d9612c2fSPengbo Mu incrx_size = vals[i]; 856d9612c2fSPengbo Mu } 857d9612c2fSPengbo Mu } else { 858d9612c2fSPengbo Mu /* INCRX burst mode */ 859d9612c2fSPengbo Mu incrx_mode = INCRX_BURST_MODE; 860d9612c2fSPengbo Mu } 861d9612c2fSPengbo Mu 86275ecb9ddSAndy Shevchenko kfree(vals); 86375ecb9ddSAndy Shevchenko 864d9612c2fSPengbo Mu /* Enable Undefined Length INCR Burst and Enable INCRx Burst */ 865d9612c2fSPengbo Mu cfg &= ~DWC3_GSBUSCFG0_INCRBRST_MASK; 866d9612c2fSPengbo Mu if (incrx_mode) 867d9612c2fSPengbo Mu cfg |= DWC3_GSBUSCFG0_INCRBRSTENA; 868d9612c2fSPengbo Mu switch (incrx_size) { 869d9612c2fSPengbo Mu case 256: 870d9612c2fSPengbo Mu cfg |= DWC3_GSBUSCFG0_INCR256BRSTENA; 871d9612c2fSPengbo Mu break; 872d9612c2fSPengbo Mu case 128: 873d9612c2fSPengbo Mu cfg |= DWC3_GSBUSCFG0_INCR128BRSTENA; 874d9612c2fSPengbo Mu break; 875d9612c2fSPengbo Mu case 64: 876d9612c2fSPengbo Mu cfg |= DWC3_GSBUSCFG0_INCR64BRSTENA; 877d9612c2fSPengbo Mu break; 878d9612c2fSPengbo Mu case 32: 879d9612c2fSPengbo Mu cfg |= DWC3_GSBUSCFG0_INCR32BRSTENA; 880d9612c2fSPengbo Mu break; 881d9612c2fSPengbo Mu case 16: 882d9612c2fSPengbo Mu cfg |= DWC3_GSBUSCFG0_INCR16BRSTENA; 883d9612c2fSPengbo Mu break; 884d9612c2fSPengbo Mu case 8: 885d9612c2fSPengbo Mu cfg |= DWC3_GSBUSCFG0_INCR8BRSTENA; 886d9612c2fSPengbo Mu break; 887d9612c2fSPengbo Mu case 4: 888d9612c2fSPengbo Mu cfg |= DWC3_GSBUSCFG0_INCR4BRSTENA; 889d9612c2fSPengbo Mu break; 890d9612c2fSPengbo Mu case 1: 891d9612c2fSPengbo Mu break; 892d9612c2fSPengbo Mu default: 893d9612c2fSPengbo Mu dev_err(dev, "Invalid property\n"); 894d9612c2fSPengbo Mu break; 895d9612c2fSPengbo Mu } 896d9612c2fSPengbo Mu 897d9612c2fSPengbo Mu dwc3_writel(dwc->regs, DWC3_GSBUSCFG0, cfg); 898d9612c2fSPengbo Mu } 899d9612c2fSPengbo Mu 900941f918eSFelipe Balbi /** 901941f918eSFelipe Balbi * dwc3_core_init - Low-level initialization of DWC3 Core 902941f918eSFelipe Balbi * @dwc: Pointer to our controller context structure 903941f918eSFelipe Balbi * 904941f918eSFelipe Balbi * Returns 0 on success otherwise negative errno. 905941f918eSFelipe Balbi */ 906941f918eSFelipe Balbi static int dwc3_core_init(struct dwc3 *dwc) 907941f918eSFelipe Balbi { 908941f918eSFelipe Balbi u32 reg; 909941f918eSFelipe Balbi int ret; 910941f918eSFelipe Balbi 911941f918eSFelipe Balbi /* 912941f918eSFelipe Balbi * Write Linux Version Code to our GUID register so it's easy to figure 913941f918eSFelipe Balbi * out which kernel version a bug was found. 914941f918eSFelipe Balbi */ 915941f918eSFelipe Balbi dwc3_writel(dwc->regs, DWC3_GUID, LINUX_VERSION_CODE); 916941f918eSFelipe Balbi 917941f918eSFelipe Balbi /* Handle USB2.0-only core configuration */ 918941f918eSFelipe Balbi if (DWC3_GHWPARAMS3_SSPHY_IFC(dwc->hwparams.hwparams3) == 919941f918eSFelipe Balbi DWC3_GHWPARAMS3_SSPHY_IFC_DIS) { 920941f918eSFelipe Balbi if (dwc->maximum_speed == USB_SPEED_SUPER) 921941f918eSFelipe Balbi dwc->maximum_speed = USB_SPEED_HIGH; 922941f918eSFelipe Balbi } 923941f918eSFelipe Balbi 924941f918eSFelipe Balbi ret = dwc3_phy_setup(dwc); 925941f918eSFelipe Balbi if (ret) 926941f918eSFelipe Balbi goto err0; 927941f918eSFelipe Balbi 92898112041SRoger Quadros if (!dwc->ulpi_ready) { 92998112041SRoger Quadros ret = dwc3_core_ulpi_init(dwc); 93098112041SRoger Quadros if (ret) 93198112041SRoger Quadros goto err0; 93298112041SRoger Quadros dwc->ulpi_ready = true; 93398112041SRoger Quadros } 93498112041SRoger Quadros 93598112041SRoger Quadros if (!dwc->phys_ready) { 93698112041SRoger Quadros ret = dwc3_core_get_phy(dwc); 93798112041SRoger Quadros if (ret) 93898112041SRoger Quadros goto err0a; 93998112041SRoger Quadros dwc->phys_ready = true; 94098112041SRoger Quadros } 94198112041SRoger Quadros 94298112041SRoger Quadros ret = dwc3_core_soft_reset(dwc); 94398112041SRoger Quadros if (ret) 94498112041SRoger Quadros goto err0a; 94598112041SRoger Quadros 946941f918eSFelipe Balbi dwc3_core_setup_global_control(dwc); 947c499ff71SFelipe Balbi dwc3_core_num_eps(dwc); 9480ffcaf37SFelipe Balbi 9490ffcaf37SFelipe Balbi ret = dwc3_setup_scratch_buffers(dwc); 9500ffcaf37SFelipe Balbi if (ret) 951c499ff71SFelipe Balbi goto err1; 952c499ff71SFelipe Balbi 953c499ff71SFelipe Balbi /* Adjust Frame Length */ 954c499ff71SFelipe Balbi dwc3_frame_length_adjustment(dwc); 955c499ff71SFelipe Balbi 956d9612c2fSPengbo Mu dwc3_set_incr_burst_type(dwc); 957d9612c2fSPengbo Mu 958c499ff71SFelipe Balbi usb_phy_set_suspend(dwc->usb2_phy, 0); 959c499ff71SFelipe Balbi usb_phy_set_suspend(dwc->usb3_phy, 0); 960c499ff71SFelipe Balbi ret = phy_power_on(dwc->usb2_generic_phy); 961c499ff71SFelipe Balbi if (ret < 0) 9620ffcaf37SFelipe Balbi goto err2; 9630ffcaf37SFelipe Balbi 964c499ff71SFelipe Balbi ret = phy_power_on(dwc->usb3_generic_phy); 965c499ff71SFelipe Balbi if (ret < 0) 966c499ff71SFelipe Balbi goto err3; 967c499ff71SFelipe Balbi 968c499ff71SFelipe Balbi ret = dwc3_event_buffers_setup(dwc); 969c499ff71SFelipe Balbi if (ret) { 970c499ff71SFelipe Balbi dev_err(dwc->dev, "failed to setup event buffers\n"); 971c499ff71SFelipe Balbi goto err4; 972c499ff71SFelipe Balbi } 973c499ff71SFelipe Balbi 97406281d46SJohn Youn /* 97506281d46SJohn Youn * ENDXFER polling is available on version 3.10a and later of 97606281d46SJohn Youn * the DWC_usb3 controller. It is NOT available in the 97706281d46SJohn Youn * DWC_usb31 controller. 97806281d46SJohn Youn */ 97906281d46SJohn Youn if (!dwc3_is_usb31(dwc) && dwc->revision >= DWC3_REVISION_310A) { 98006281d46SJohn Youn reg = dwc3_readl(dwc->regs, DWC3_GUCTL2); 98106281d46SJohn Youn reg |= DWC3_GUCTL2_RST_ACTBITLATER; 98206281d46SJohn Youn dwc3_writel(dwc->regs, DWC3_GUCTL2, reg); 98306281d46SJohn Youn } 98406281d46SJohn Youn 98565db7a0cSWilliam Wu if (dwc->revision >= DWC3_REVISION_250A) { 9860bb39ca1SJohn Youn reg = dwc3_readl(dwc->regs, DWC3_GUCTL1); 98765db7a0cSWilliam Wu 98865db7a0cSWilliam Wu /* 98965db7a0cSWilliam Wu * Enable hardware control of sending remote wakeup 99065db7a0cSWilliam Wu * in HS when the device is in the L1 state. 99165db7a0cSWilliam Wu */ 99265db7a0cSWilliam Wu if (dwc->revision >= DWC3_REVISION_290A) 9930bb39ca1SJohn Youn reg |= DWC3_GUCTL1_DEV_L1_EXIT_BY_HW; 99465db7a0cSWilliam Wu 99565db7a0cSWilliam Wu if (dwc->dis_tx_ipgap_linecheck_quirk) 99665db7a0cSWilliam Wu reg |= DWC3_GUCTL1_TX_IPGAP_LINECHECK_DIS; 99765db7a0cSWilliam Wu 9980bb39ca1SJohn Youn dwc3_writel(dwc->regs, DWC3_GUCTL1, reg); 9990bb39ca1SJohn Youn } 10000bb39ca1SJohn Youn 1001b138e23dSAnurag Kumar Vulisha if (dwc->dr_mode == USB_DR_MODE_HOST || 1002b138e23dSAnurag Kumar Vulisha dwc->dr_mode == USB_DR_MODE_OTG) { 1003b138e23dSAnurag Kumar Vulisha reg = dwc3_readl(dwc->regs, DWC3_GUCTL); 1004b138e23dSAnurag Kumar Vulisha 1005b138e23dSAnurag Kumar Vulisha /* 1006b138e23dSAnurag Kumar Vulisha * Enable Auto retry Feature to make the controller operating in 1007b138e23dSAnurag Kumar Vulisha * Host mode on seeing transaction errors(CRC errors or internal 1008b138e23dSAnurag Kumar Vulisha * overrun scenerios) on IN transfers to reply to the device 1009b138e23dSAnurag Kumar Vulisha * with a non-terminating retry ACK (i.e, an ACK transcation 1010b138e23dSAnurag Kumar Vulisha * packet with Retry=1 & Nump != 0) 1011b138e23dSAnurag Kumar Vulisha */ 1012b138e23dSAnurag Kumar Vulisha reg |= DWC3_GUCTL_HSTINAUTORETRY; 1013b138e23dSAnurag Kumar Vulisha 1014b138e23dSAnurag Kumar Vulisha dwc3_writel(dwc->regs, DWC3_GUCTL, reg); 1015b138e23dSAnurag Kumar Vulisha } 1016b138e23dSAnurag Kumar Vulisha 1017938a5ad1SThinh Nguyen /* 1018938a5ad1SThinh Nguyen * Must config both number of packets and max burst settings to enable 1019938a5ad1SThinh Nguyen * RX and/or TX threshold. 1020938a5ad1SThinh Nguyen */ 1021938a5ad1SThinh Nguyen if (dwc3_is_usb31(dwc) && dwc->dr_mode == USB_DR_MODE_HOST) { 1022938a5ad1SThinh Nguyen u8 rx_thr_num = dwc->rx_thr_num_pkt_prd; 1023938a5ad1SThinh Nguyen u8 rx_maxburst = dwc->rx_max_burst_prd; 1024938a5ad1SThinh Nguyen u8 tx_thr_num = dwc->tx_thr_num_pkt_prd; 1025938a5ad1SThinh Nguyen u8 tx_maxburst = dwc->tx_max_burst_prd; 1026938a5ad1SThinh Nguyen 1027938a5ad1SThinh Nguyen if (rx_thr_num && rx_maxburst) { 1028938a5ad1SThinh Nguyen reg = dwc3_readl(dwc->regs, DWC3_GRXTHRCFG); 1029938a5ad1SThinh Nguyen reg |= DWC31_RXTHRNUMPKTSEL_PRD; 1030938a5ad1SThinh Nguyen 1031938a5ad1SThinh Nguyen reg &= ~DWC31_RXTHRNUMPKT_PRD(~0); 1032938a5ad1SThinh Nguyen reg |= DWC31_RXTHRNUMPKT_PRD(rx_thr_num); 1033938a5ad1SThinh Nguyen 1034938a5ad1SThinh Nguyen reg &= ~DWC31_MAXRXBURSTSIZE_PRD(~0); 1035938a5ad1SThinh Nguyen reg |= DWC31_MAXRXBURSTSIZE_PRD(rx_maxburst); 1036938a5ad1SThinh Nguyen 1037938a5ad1SThinh Nguyen dwc3_writel(dwc->regs, DWC3_GRXTHRCFG, reg); 1038938a5ad1SThinh Nguyen } 1039938a5ad1SThinh Nguyen 1040938a5ad1SThinh Nguyen if (tx_thr_num && tx_maxburst) { 1041938a5ad1SThinh Nguyen reg = dwc3_readl(dwc->regs, DWC3_GTXTHRCFG); 1042938a5ad1SThinh Nguyen reg |= DWC31_TXTHRNUMPKTSEL_PRD; 1043938a5ad1SThinh Nguyen 1044938a5ad1SThinh Nguyen reg &= ~DWC31_TXTHRNUMPKT_PRD(~0); 1045938a5ad1SThinh Nguyen reg |= DWC31_TXTHRNUMPKT_PRD(tx_thr_num); 1046938a5ad1SThinh Nguyen 1047938a5ad1SThinh Nguyen reg &= ~DWC31_MAXTXBURSTSIZE_PRD(~0); 1048938a5ad1SThinh Nguyen reg |= DWC31_MAXTXBURSTSIZE_PRD(tx_maxburst); 1049938a5ad1SThinh Nguyen 1050938a5ad1SThinh Nguyen dwc3_writel(dwc->regs, DWC3_GTXTHRCFG, reg); 1051938a5ad1SThinh Nguyen } 1052938a5ad1SThinh Nguyen } 1053938a5ad1SThinh Nguyen 105472246da4SFelipe Balbi return 0; 105572246da4SFelipe Balbi 1056c499ff71SFelipe Balbi err4: 10579b9d7cddSVivek Gautam phy_power_off(dwc->usb3_generic_phy); 1058c499ff71SFelipe Balbi 1059c499ff71SFelipe Balbi err3: 10609b9d7cddSVivek Gautam phy_power_off(dwc->usb2_generic_phy); 1061c499ff71SFelipe Balbi 10620ffcaf37SFelipe Balbi err2: 1063c499ff71SFelipe Balbi usb_phy_set_suspend(dwc->usb2_phy, 1); 1064c499ff71SFelipe Balbi usb_phy_set_suspend(dwc->usb3_phy, 1); 10650ffcaf37SFelipe Balbi 10660ffcaf37SFelipe Balbi err1: 10670ffcaf37SFelipe Balbi usb_phy_shutdown(dwc->usb2_phy); 10680ffcaf37SFelipe Balbi usb_phy_shutdown(dwc->usb3_phy); 106957303488SKishon Vijay Abraham I phy_exit(dwc->usb2_generic_phy); 107057303488SKishon Vijay Abraham I phy_exit(dwc->usb3_generic_phy); 10710ffcaf37SFelipe Balbi 107298112041SRoger Quadros err0a: 107398112041SRoger Quadros dwc3_ulpi_exit(dwc); 107498112041SRoger Quadros 107572246da4SFelipe Balbi err0: 107672246da4SFelipe Balbi return ret; 107772246da4SFelipe Balbi } 107872246da4SFelipe Balbi 10793c9f94acSFelipe Balbi static int dwc3_core_get_phy(struct dwc3 *dwc) 108072246da4SFelipe Balbi { 10813c9f94acSFelipe Balbi struct device *dev = dwc->dev; 1082941ea361SFelipe Balbi struct device_node *node = dev->of_node; 10833c9f94acSFelipe Balbi int ret; 108472246da4SFelipe Balbi 10855088b6f5SKishon Vijay Abraham I if (node) { 10865088b6f5SKishon Vijay Abraham I dwc->usb2_phy = devm_usb_get_phy_by_phandle(dev, "usb-phy", 0); 10875088b6f5SKishon Vijay Abraham I dwc->usb3_phy = devm_usb_get_phy_by_phandle(dev, "usb-phy", 1); 1088bb674907SFelipe Balbi } else { 1089bb674907SFelipe Balbi dwc->usb2_phy = devm_usb_get_phy(dev, USB_PHY_TYPE_USB2); 1090bb674907SFelipe Balbi dwc->usb3_phy = devm_usb_get_phy(dev, USB_PHY_TYPE_USB3); 10915088b6f5SKishon Vijay Abraham I } 10925088b6f5SKishon Vijay Abraham I 1093d105e7f8SFelipe Balbi if (IS_ERR(dwc->usb2_phy)) { 1094d105e7f8SFelipe Balbi ret = PTR_ERR(dwc->usb2_phy); 1095122f06e6SKishon Vijay Abraham I if (ret == -ENXIO || ret == -ENODEV) { 1096122f06e6SKishon Vijay Abraham I dwc->usb2_phy = NULL; 1097122f06e6SKishon Vijay Abraham I } else if (ret == -EPROBE_DEFER) { 1098d105e7f8SFelipe Balbi return ret; 1099122f06e6SKishon Vijay Abraham I } else { 110051e1e7bcSFelipe Balbi dev_err(dev, "no usb2 phy configured\n"); 1101122f06e6SKishon Vijay Abraham I return ret; 1102122f06e6SKishon Vijay Abraham I } 110351e1e7bcSFelipe Balbi } 110451e1e7bcSFelipe Balbi 1105d105e7f8SFelipe Balbi if (IS_ERR(dwc->usb3_phy)) { 1106315955d7SRuchika Kharwar ret = PTR_ERR(dwc->usb3_phy); 1107122f06e6SKishon Vijay Abraham I if (ret == -ENXIO || ret == -ENODEV) { 1108122f06e6SKishon Vijay Abraham I dwc->usb3_phy = NULL; 1109122f06e6SKishon Vijay Abraham I } else if (ret == -EPROBE_DEFER) { 1110d105e7f8SFelipe Balbi return ret; 1111122f06e6SKishon Vijay Abraham I } else { 111251e1e7bcSFelipe Balbi dev_err(dev, "no usb3 phy configured\n"); 1113122f06e6SKishon Vijay Abraham I return ret; 1114122f06e6SKishon Vijay Abraham I } 111551e1e7bcSFelipe Balbi } 111651e1e7bcSFelipe Balbi 111757303488SKishon Vijay Abraham I dwc->usb2_generic_phy = devm_phy_get(dev, "usb2-phy"); 111857303488SKishon Vijay Abraham I if (IS_ERR(dwc->usb2_generic_phy)) { 111957303488SKishon Vijay Abraham I ret = PTR_ERR(dwc->usb2_generic_phy); 112057303488SKishon Vijay Abraham I if (ret == -ENOSYS || ret == -ENODEV) { 112157303488SKishon Vijay Abraham I dwc->usb2_generic_phy = NULL; 112257303488SKishon Vijay Abraham I } else if (ret == -EPROBE_DEFER) { 112357303488SKishon Vijay Abraham I return ret; 112457303488SKishon Vijay Abraham I } else { 112557303488SKishon Vijay Abraham I dev_err(dev, "no usb2 phy configured\n"); 112657303488SKishon Vijay Abraham I return ret; 112757303488SKishon Vijay Abraham I } 112857303488SKishon Vijay Abraham I } 112957303488SKishon Vijay Abraham I 113057303488SKishon Vijay Abraham I dwc->usb3_generic_phy = devm_phy_get(dev, "usb3-phy"); 113157303488SKishon Vijay Abraham I if (IS_ERR(dwc->usb3_generic_phy)) { 113257303488SKishon Vijay Abraham I ret = PTR_ERR(dwc->usb3_generic_phy); 113357303488SKishon Vijay Abraham I if (ret == -ENOSYS || ret == -ENODEV) { 113457303488SKishon Vijay Abraham I dwc->usb3_generic_phy = NULL; 113557303488SKishon Vijay Abraham I } else if (ret == -EPROBE_DEFER) { 113657303488SKishon Vijay Abraham I return ret; 113757303488SKishon Vijay Abraham I } else { 113857303488SKishon Vijay Abraham I dev_err(dev, "no usb3 phy configured\n"); 113957303488SKishon Vijay Abraham I return ret; 114057303488SKishon Vijay Abraham I } 114157303488SKishon Vijay Abraham I } 114257303488SKishon Vijay Abraham I 11433c9f94acSFelipe Balbi return 0; 11443c9f94acSFelipe Balbi } 11453c9f94acSFelipe Balbi 11465f94adfeSFelipe Balbi static int dwc3_core_init_mode(struct dwc3 *dwc) 11475f94adfeSFelipe Balbi { 11485f94adfeSFelipe Balbi struct device *dev = dwc->dev; 11495f94adfeSFelipe Balbi int ret; 11505f94adfeSFelipe Balbi 11515f94adfeSFelipe Balbi switch (dwc->dr_mode) { 11525f94adfeSFelipe Balbi case USB_DR_MODE_PERIPHERAL: 115341ce1456SRoger Quadros dwc3_set_prtcap(dwc, DWC3_GCTL_PRTCAP_DEVICE); 1154958d1a4cSFelipe Balbi 1155958d1a4cSFelipe Balbi if (dwc->usb2_phy) 1156958d1a4cSFelipe Balbi otg_set_vbus(dwc->usb2_phy->otg, false); 1157958d1a4cSFelipe Balbi phy_set_mode(dwc->usb2_generic_phy, PHY_MODE_USB_DEVICE); 1158644cbbc3SManu Gautam phy_set_mode(dwc->usb3_generic_phy, PHY_MODE_USB_DEVICE); 1159958d1a4cSFelipe Balbi 11605f94adfeSFelipe Balbi ret = dwc3_gadget_init(dwc); 11615f94adfeSFelipe Balbi if (ret) { 11629522def4SRoger Quadros if (ret != -EPROBE_DEFER) 11635f94adfeSFelipe Balbi dev_err(dev, "failed to initialize gadget\n"); 11645f94adfeSFelipe Balbi return ret; 11655f94adfeSFelipe Balbi } 11665f94adfeSFelipe Balbi break; 11675f94adfeSFelipe Balbi case USB_DR_MODE_HOST: 116841ce1456SRoger Quadros dwc3_set_prtcap(dwc, DWC3_GCTL_PRTCAP_HOST); 1169958d1a4cSFelipe Balbi 1170958d1a4cSFelipe Balbi if (dwc->usb2_phy) 1171958d1a4cSFelipe Balbi otg_set_vbus(dwc->usb2_phy->otg, true); 1172958d1a4cSFelipe Balbi phy_set_mode(dwc->usb2_generic_phy, PHY_MODE_USB_HOST); 1173644cbbc3SManu Gautam phy_set_mode(dwc->usb3_generic_phy, PHY_MODE_USB_HOST); 1174958d1a4cSFelipe Balbi 11755f94adfeSFelipe Balbi ret = dwc3_host_init(dwc); 11765f94adfeSFelipe Balbi if (ret) { 11779522def4SRoger Quadros if (ret != -EPROBE_DEFER) 11785f94adfeSFelipe Balbi dev_err(dev, "failed to initialize host\n"); 11795f94adfeSFelipe Balbi return ret; 11805f94adfeSFelipe Balbi } 1181d8c80bb3SVivek Gautam phy_calibrate(dwc->usb2_generic_phy); 11825f94adfeSFelipe Balbi break; 11835f94adfeSFelipe Balbi case USB_DR_MODE_OTG: 118441ce1456SRoger Quadros INIT_WORK(&dwc->drd_work, __dwc3_set_mode); 11859840354fSRoger Quadros ret = dwc3_drd_init(dwc); 11869840354fSRoger Quadros if (ret) { 11879840354fSRoger Quadros if (ret != -EPROBE_DEFER) 11889840354fSRoger Quadros dev_err(dev, "failed to initialize dual-role\n"); 11899840354fSRoger Quadros return ret; 11909840354fSRoger Quadros } 11915f94adfeSFelipe Balbi break; 11925f94adfeSFelipe Balbi default: 11935f94adfeSFelipe Balbi dev_err(dev, "Unsupported mode of operation %d\n", dwc->dr_mode); 11945f94adfeSFelipe Balbi return -EINVAL; 11955f94adfeSFelipe Balbi } 11965f94adfeSFelipe Balbi 11975f94adfeSFelipe Balbi return 0; 11985f94adfeSFelipe Balbi } 11995f94adfeSFelipe Balbi 12005f94adfeSFelipe Balbi static void dwc3_core_exit_mode(struct dwc3 *dwc) 12015f94adfeSFelipe Balbi { 12025f94adfeSFelipe Balbi switch (dwc->dr_mode) { 12035f94adfeSFelipe Balbi case USB_DR_MODE_PERIPHERAL: 12045f94adfeSFelipe Balbi dwc3_gadget_exit(dwc); 12055f94adfeSFelipe Balbi break; 12065f94adfeSFelipe Balbi case USB_DR_MODE_HOST: 12075f94adfeSFelipe Balbi dwc3_host_exit(dwc); 12085f94adfeSFelipe Balbi break; 12095f94adfeSFelipe Balbi case USB_DR_MODE_OTG: 12109840354fSRoger Quadros dwc3_drd_exit(dwc); 12115f94adfeSFelipe Balbi break; 12125f94adfeSFelipe Balbi default: 12135f94adfeSFelipe Balbi /* do nothing */ 12145f94adfeSFelipe Balbi break; 12155f94adfeSFelipe Balbi } 12165f94adfeSFelipe Balbi } 12175f94adfeSFelipe Balbi 1218c5ac6116SFelipe Balbi static void dwc3_get_properties(struct dwc3 *dwc) 12193c9f94acSFelipe Balbi { 1220c5ac6116SFelipe Balbi struct device *dev = dwc->dev; 122180caf7d2SHuang Rui u8 lpm_nyet_threshold; 12226b6a0c9aSHuang Rui u8 tx_de_emphasis; 1223460d098cSHuang Rui u8 hird_threshold; 1224938a5ad1SThinh Nguyen u8 rx_thr_num_pkt_prd; 1225938a5ad1SThinh Nguyen u8 rx_max_burst_prd; 1226938a5ad1SThinh Nguyen u8 tx_thr_num_pkt_prd; 1227938a5ad1SThinh Nguyen u8 tx_max_burst_prd; 12283c9f94acSFelipe Balbi 122980caf7d2SHuang Rui /* default to highest possible threshold */ 12308d791929SThinh Nguyen lpm_nyet_threshold = 0xf; 123180caf7d2SHuang Rui 12326b6a0c9aSHuang Rui /* default to -3.5dB de-emphasis */ 12336b6a0c9aSHuang Rui tx_de_emphasis = 1; 12346b6a0c9aSHuang Rui 1235460d098cSHuang Rui /* 1236460d098cSHuang Rui * default to assert utmi_sleep_n and use maximum allowed HIRD 1237460d098cSHuang Rui * threshold value of 0b1100 1238460d098cSHuang Rui */ 1239460d098cSHuang Rui hird_threshold = 12; 1240460d098cSHuang Rui 124163863b98SHeikki Krogerus dwc->maximum_speed = usb_get_maximum_speed(dev); 124206e7114fSHeikki Krogerus dwc->dr_mode = usb_get_dr_mode(dev); 124332f2ed86SWilliam Wu dwc->hsphy_mode = of_usb_get_phy_mode(dev->of_node); 124463863b98SHeikki Krogerus 1245d64ff406SArnd Bergmann dwc->sysdev_is_parent = device_property_read_bool(dev, 1246d64ff406SArnd Bergmann "linux,sysdev_is_parent"); 1247d64ff406SArnd Bergmann if (dwc->sysdev_is_parent) 1248d64ff406SArnd Bergmann dwc->sysdev = dwc->dev->parent; 1249d64ff406SArnd Bergmann else 1250d64ff406SArnd Bergmann dwc->sysdev = dwc->dev; 1251d64ff406SArnd Bergmann 12523d128919SHeikki Krogerus dwc->has_lpm_erratum = device_property_read_bool(dev, 125380caf7d2SHuang Rui "snps,has-lpm-erratum"); 12543d128919SHeikki Krogerus device_property_read_u8(dev, "snps,lpm-nyet-threshold", 125580caf7d2SHuang Rui &lpm_nyet_threshold); 12563d128919SHeikki Krogerus dwc->is_utmi_l1_suspend = device_property_read_bool(dev, 1257460d098cSHuang Rui "snps,is-utmi-l1-suspend"); 12583d128919SHeikki Krogerus device_property_read_u8(dev, "snps,hird-threshold", 1259460d098cSHuang Rui &hird_threshold); 1260d92021f6SThinh Nguyen dwc->dis_start_transfer_quirk = device_property_read_bool(dev, 1261d92021f6SThinh Nguyen "snps,dis-start-transfer-quirk"); 12623d128919SHeikki Krogerus dwc->usb3_lpm_capable = device_property_read_bool(dev, 1263eac68e8fSRobert Baldyga "snps,usb3_lpm_capable"); 1264022a0208SThinh Nguyen dwc->usb2_lpm_disable = device_property_read_bool(dev, 1265022a0208SThinh Nguyen "snps,usb2-lpm-disable"); 1266938a5ad1SThinh Nguyen device_property_read_u8(dev, "snps,rx-thr-num-pkt-prd", 1267938a5ad1SThinh Nguyen &rx_thr_num_pkt_prd); 1268938a5ad1SThinh Nguyen device_property_read_u8(dev, "snps,rx-max-burst-prd", 1269938a5ad1SThinh Nguyen &rx_max_burst_prd); 1270938a5ad1SThinh Nguyen device_property_read_u8(dev, "snps,tx-thr-num-pkt-prd", 1271938a5ad1SThinh Nguyen &tx_thr_num_pkt_prd); 1272938a5ad1SThinh Nguyen device_property_read_u8(dev, "snps,tx-max-burst-prd", 1273938a5ad1SThinh Nguyen &tx_max_burst_prd); 12743c9f94acSFelipe Balbi 12753d128919SHeikki Krogerus dwc->disable_scramble_quirk = device_property_read_bool(dev, 12763b81221aSHuang Rui "snps,disable_scramble_quirk"); 12773d128919SHeikki Krogerus dwc->u2exit_lfps_quirk = device_property_read_bool(dev, 12789a5b2f31SHuang Rui "snps,u2exit_lfps_quirk"); 12793d128919SHeikki Krogerus dwc->u2ss_inp3_quirk = device_property_read_bool(dev, 1280b5a65c40SHuang Rui "snps,u2ss_inp3_quirk"); 12813d128919SHeikki Krogerus dwc->req_p1p2p3_quirk = device_property_read_bool(dev, 1282df31f5b3SHuang Rui "snps,req_p1p2p3_quirk"); 12833d128919SHeikki Krogerus dwc->del_p1p2p3_quirk = device_property_read_bool(dev, 1284a2a1d0f5SHuang Rui "snps,del_p1p2p3_quirk"); 12853d128919SHeikki Krogerus dwc->del_phy_power_chg_quirk = device_property_read_bool(dev, 128641c06ffdSHuang Rui "snps,del_phy_power_chg_quirk"); 12873d128919SHeikki Krogerus dwc->lfps_filter_quirk = device_property_read_bool(dev, 1288fb67afcaSHuang Rui "snps,lfps_filter_quirk"); 12893d128919SHeikki Krogerus dwc->rx_detect_poll_quirk = device_property_read_bool(dev, 129014f4ac53SHuang Rui "snps,rx_detect_poll_quirk"); 12913d128919SHeikki Krogerus dwc->dis_u3_susphy_quirk = device_property_read_bool(dev, 129259acfa20SHuang Rui "snps,dis_u3_susphy_quirk"); 12933d128919SHeikki Krogerus dwc->dis_u2_susphy_quirk = device_property_read_bool(dev, 12940effe0a3SHuang Rui "snps,dis_u2_susphy_quirk"); 1295ec791d14SJohn Youn dwc->dis_enblslpm_quirk = device_property_read_bool(dev, 1296ec791d14SJohn Youn "snps,dis_enblslpm_quirk"); 1297729dcffdSAnurag Kumar Vulisha dwc->dis_u1_entry_quirk = device_property_read_bool(dev, 1298729dcffdSAnurag Kumar Vulisha "snps,dis-u1-entry-quirk"); 1299729dcffdSAnurag Kumar Vulisha dwc->dis_u2_entry_quirk = device_property_read_bool(dev, 1300729dcffdSAnurag Kumar Vulisha "snps,dis-u2-entry-quirk"); 1301e58dd357SRajesh Bhagat dwc->dis_rxdet_inp3_quirk = device_property_read_bool(dev, 1302e58dd357SRajesh Bhagat "snps,dis_rxdet_inp3_quirk"); 130316199f33SWilliam Wu dwc->dis_u2_freeclk_exists_quirk = device_property_read_bool(dev, 130416199f33SWilliam Wu "snps,dis-u2-freeclk-exists-quirk"); 130500fe081dSWilliam Wu dwc->dis_del_phy_power_chg_quirk = device_property_read_bool(dev, 130600fe081dSWilliam Wu "snps,dis-del-phy-power-chg-quirk"); 130765db7a0cSWilliam Wu dwc->dis_tx_ipgap_linecheck_quirk = device_property_read_bool(dev, 130865db7a0cSWilliam Wu "snps,dis-tx-ipgap-linecheck-quirk"); 13096b6a0c9aSHuang Rui 13103d128919SHeikki Krogerus dwc->tx_de_emphasis_quirk = device_property_read_bool(dev, 13116b6a0c9aSHuang Rui "snps,tx_de_emphasis_quirk"); 13123d128919SHeikki Krogerus device_property_read_u8(dev, "snps,tx_de_emphasis", 13136b6a0c9aSHuang Rui &tx_de_emphasis); 13143d128919SHeikki Krogerus device_property_read_string(dev, "snps,hsphy_interface", 13153e10a2ceSHeikki Krogerus &dwc->hsphy_interface); 13163d128919SHeikki Krogerus device_property_read_u32(dev, "snps,quirk-frame-length-adjustment", 1317bcdb3272SFelipe Balbi &dwc->fladj); 13183d128919SHeikki Krogerus 131942bf02ecSRoger Quadros dwc->dis_metastability_quirk = device_property_read_bool(dev, 132042bf02ecSRoger Quadros "snps,dis_metastability_quirk"); 132142bf02ecSRoger Quadros 132280caf7d2SHuang Rui dwc->lpm_nyet_threshold = lpm_nyet_threshold; 13236b6a0c9aSHuang Rui dwc->tx_de_emphasis = tx_de_emphasis; 132480caf7d2SHuang Rui 1325460d098cSHuang Rui dwc->hird_threshold = hird_threshold 1326460d098cSHuang Rui | (dwc->is_utmi_l1_suspend << 4); 1327460d098cSHuang Rui 1328938a5ad1SThinh Nguyen dwc->rx_thr_num_pkt_prd = rx_thr_num_pkt_prd; 1329938a5ad1SThinh Nguyen dwc->rx_max_burst_prd = rx_max_burst_prd; 1330938a5ad1SThinh Nguyen 1331938a5ad1SThinh Nguyen dwc->tx_thr_num_pkt_prd = tx_thr_num_pkt_prd; 1332938a5ad1SThinh Nguyen dwc->tx_max_burst_prd = tx_max_burst_prd; 1333938a5ad1SThinh Nguyen 1334cf40b86bSJohn Youn dwc->imod_interval = 0; 1335cf40b86bSJohn Youn } 1336cf40b86bSJohn Youn 1337cf40b86bSJohn Youn /* check whether the core supports IMOD */ 1338cf40b86bSJohn Youn bool dwc3_has_imod(struct dwc3 *dwc) 1339cf40b86bSJohn Youn { 1340cf40b86bSJohn Youn return ((dwc3_is_usb3(dwc) && 1341cf40b86bSJohn Youn dwc->revision >= DWC3_REVISION_300A) || 1342cf40b86bSJohn Youn (dwc3_is_usb31(dwc) && 1343cf40b86bSJohn Youn dwc->revision >= DWC3_USB31_REVISION_120A)); 1344c5ac6116SFelipe Balbi } 1345c5ac6116SFelipe Balbi 13467ac51a12SJohn Youn static void dwc3_check_params(struct dwc3 *dwc) 13477ac51a12SJohn Youn { 13487ac51a12SJohn Youn struct device *dev = dwc->dev; 13497ac51a12SJohn Youn 1350cf40b86bSJohn Youn /* Check for proper value of imod_interval */ 1351cf40b86bSJohn Youn if (dwc->imod_interval && !dwc3_has_imod(dwc)) { 1352cf40b86bSJohn Youn dev_warn(dwc->dev, "Interrupt moderation not supported\n"); 1353cf40b86bSJohn Youn dwc->imod_interval = 0; 1354cf40b86bSJohn Youn } 1355cf40b86bSJohn Youn 135628632b44SJohn Youn /* 135728632b44SJohn Youn * Workaround for STAR 9000961433 which affects only version 135828632b44SJohn Youn * 3.00a of the DWC_usb3 core. This prevents the controller 135928632b44SJohn Youn * interrupt from being masked while handling events. IMOD 136028632b44SJohn Youn * allows us to work around this issue. Enable it for the 136128632b44SJohn Youn * affected version. 136228632b44SJohn Youn */ 136328632b44SJohn Youn if (!dwc->imod_interval && 136428632b44SJohn Youn (dwc->revision == DWC3_REVISION_300A)) 136528632b44SJohn Youn dwc->imod_interval = 1; 136628632b44SJohn Youn 13677ac51a12SJohn Youn /* Check the maximum_speed parameter */ 13687ac51a12SJohn Youn switch (dwc->maximum_speed) { 13697ac51a12SJohn Youn case USB_SPEED_LOW: 13707ac51a12SJohn Youn case USB_SPEED_FULL: 13717ac51a12SJohn Youn case USB_SPEED_HIGH: 13727ac51a12SJohn Youn case USB_SPEED_SUPER: 13737ac51a12SJohn Youn case USB_SPEED_SUPER_PLUS: 13747ac51a12SJohn Youn break; 13757ac51a12SJohn Youn default: 13767ac51a12SJohn Youn dev_err(dev, "invalid maximum_speed parameter %d\n", 13777ac51a12SJohn Youn dwc->maximum_speed); 13787ac51a12SJohn Youn /* fall through */ 13797ac51a12SJohn Youn case USB_SPEED_UNKNOWN: 13807ac51a12SJohn Youn /* default to superspeed */ 13817ac51a12SJohn Youn dwc->maximum_speed = USB_SPEED_SUPER; 13827ac51a12SJohn Youn 13837ac51a12SJohn Youn /* 13847ac51a12SJohn Youn * default to superspeed plus if we are capable. 13857ac51a12SJohn Youn */ 13867ac51a12SJohn Youn if (dwc3_is_usb31(dwc) && 13877ac51a12SJohn Youn (DWC3_GHWPARAMS3_SSPHY_IFC(dwc->hwparams.hwparams3) == 13887ac51a12SJohn Youn DWC3_GHWPARAMS3_SSPHY_IFC_GEN2)) 13897ac51a12SJohn Youn dwc->maximum_speed = USB_SPEED_SUPER_PLUS; 13907ac51a12SJohn Youn 13917ac51a12SJohn Youn break; 13927ac51a12SJohn Youn } 13937ac51a12SJohn Youn } 13947ac51a12SJohn Youn 1395c5ac6116SFelipe Balbi static int dwc3_probe(struct platform_device *pdev) 1396c5ac6116SFelipe Balbi { 1397c5ac6116SFelipe Balbi struct device *dev = &pdev->dev; 139844feb8e6SMasahiro Yamada struct resource *res, dwc_res; 1399c5ac6116SFelipe Balbi struct dwc3 *dwc; 1400c5ac6116SFelipe Balbi 1401c5ac6116SFelipe Balbi int ret; 1402c5ac6116SFelipe Balbi 1403c5ac6116SFelipe Balbi void __iomem *regs; 1404c5ac6116SFelipe Balbi 1405c5ac6116SFelipe Balbi dwc = devm_kzalloc(dev, sizeof(*dwc), GFP_KERNEL); 1406c5ac6116SFelipe Balbi if (!dwc) 1407c5ac6116SFelipe Balbi return -ENOMEM; 1408c5ac6116SFelipe Balbi 1409fe8abf33SMasahiro Yamada dwc->clks = devm_kmemdup(dev, dwc3_core_clks, sizeof(dwc3_core_clks), 1410fe8abf33SMasahiro Yamada GFP_KERNEL); 1411fe8abf33SMasahiro Yamada if (!dwc->clks) 1412fe8abf33SMasahiro Yamada return -ENOMEM; 1413fe8abf33SMasahiro Yamada 1414c5ac6116SFelipe Balbi dwc->dev = dev; 1415c5ac6116SFelipe Balbi 1416c5ac6116SFelipe Balbi res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1417c5ac6116SFelipe Balbi if (!res) { 1418c5ac6116SFelipe Balbi dev_err(dev, "missing memory resource\n"); 1419c5ac6116SFelipe Balbi return -ENODEV; 1420c5ac6116SFelipe Balbi } 1421c5ac6116SFelipe Balbi 1422c5ac6116SFelipe Balbi dwc->xhci_resources[0].start = res->start; 1423c5ac6116SFelipe Balbi dwc->xhci_resources[0].end = dwc->xhci_resources[0].start + 1424c5ac6116SFelipe Balbi DWC3_XHCI_REGS_END; 1425c5ac6116SFelipe Balbi dwc->xhci_resources[0].flags = res->flags; 1426c5ac6116SFelipe Balbi dwc->xhci_resources[0].name = res->name; 1427c5ac6116SFelipe Balbi 1428c5ac6116SFelipe Balbi /* 1429c5ac6116SFelipe Balbi * Request memory region but exclude xHCI regs, 1430c5ac6116SFelipe Balbi * since it will be requested by the xhci-plat driver. 1431c5ac6116SFelipe Balbi */ 143244feb8e6SMasahiro Yamada dwc_res = *res; 143344feb8e6SMasahiro Yamada dwc_res.start += DWC3_GLOBALS_REGS_START; 143444feb8e6SMasahiro Yamada 143544feb8e6SMasahiro Yamada regs = devm_ioremap_resource(dev, &dwc_res); 143644feb8e6SMasahiro Yamada if (IS_ERR(regs)) 143744feb8e6SMasahiro Yamada return PTR_ERR(regs); 1438c5ac6116SFelipe Balbi 1439c5ac6116SFelipe Balbi dwc->regs = regs; 144044feb8e6SMasahiro Yamada dwc->regs_size = resource_size(&dwc_res); 1441c5ac6116SFelipe Balbi 1442c5ac6116SFelipe Balbi dwc3_get_properties(dwc); 1443c5ac6116SFelipe Balbi 1444fe8abf33SMasahiro Yamada dwc->reset = devm_reset_control_get_optional_shared(dev, NULL); 1445fe8abf33SMasahiro Yamada if (IS_ERR(dwc->reset)) 1446fe8abf33SMasahiro Yamada return PTR_ERR(dwc->reset); 1447fe8abf33SMasahiro Yamada 144861527777SHans de Goede if (dev->of_node) { 144961527777SHans de Goede dwc->num_clks = ARRAY_SIZE(dwc3_core_clks); 145061527777SHans de Goede 1451fe8abf33SMasahiro Yamada ret = clk_bulk_get(dev, dwc->num_clks, dwc->clks); 1452fe8abf33SMasahiro Yamada if (ret == -EPROBE_DEFER) 1453fe8abf33SMasahiro Yamada return ret; 1454fe8abf33SMasahiro Yamada /* 145561527777SHans de Goede * Clocks are optional, but new DT platforms should support all 145661527777SHans de Goede * clocks as required by the DT-binding. 1457fe8abf33SMasahiro Yamada */ 1458fe8abf33SMasahiro Yamada if (ret) 1459fe8abf33SMasahiro Yamada dwc->num_clks = 0; 146061527777SHans de Goede } 1461fe8abf33SMasahiro Yamada 1462fe8abf33SMasahiro Yamada ret = reset_control_deassert(dwc->reset); 1463fe8abf33SMasahiro Yamada if (ret) 1464fe8abf33SMasahiro Yamada goto put_clks; 1465fe8abf33SMasahiro Yamada 1466fe8abf33SMasahiro Yamada ret = clk_bulk_prepare(dwc->num_clks, dwc->clks); 1467fe8abf33SMasahiro Yamada if (ret) 1468fe8abf33SMasahiro Yamada goto assert_reset; 1469fe8abf33SMasahiro Yamada 1470fe8abf33SMasahiro Yamada ret = clk_bulk_enable(dwc->num_clks, dwc->clks); 1471fe8abf33SMasahiro Yamada if (ret) 1472fe8abf33SMasahiro Yamada goto unprepare_clks; 1473fe8abf33SMasahiro Yamada 1474dc1b5d9aSEnric Balletbo i Serra if (!dwc3_core_is_valid(dwc)) { 1475dc1b5d9aSEnric Balletbo i Serra dev_err(dwc->dev, "this is not a DesignWare USB3 DRD Core\n"); 1476dc1b5d9aSEnric Balletbo i Serra ret = -ENODEV; 1477dc1b5d9aSEnric Balletbo i Serra goto disable_clks; 1478dc1b5d9aSEnric Balletbo i Serra } 1479dc1b5d9aSEnric Balletbo i Serra 14806c89cce0SHeikki Krogerus platform_set_drvdata(pdev, dwc); 14812917e718SHeikki Krogerus dwc3_cache_hwparams(dwc); 14826c89cce0SHeikki Krogerus 148372246da4SFelipe Balbi spin_lock_init(&dwc->lock); 148472246da4SFelipe Balbi 1485fc8bb91bSFelipe Balbi pm_runtime_set_active(dev); 1486fc8bb91bSFelipe Balbi pm_runtime_use_autosuspend(dev); 1487fc8bb91bSFelipe Balbi pm_runtime_set_autosuspend_delay(dev, DWC3_DEFAULT_AUTOSUSPEND_DELAY); 1488802ca850SChanho Park pm_runtime_enable(dev); 148932808237SRoger Quadros ret = pm_runtime_get_sync(dev); 149032808237SRoger Quadros if (ret < 0) 149132808237SRoger Quadros goto err1; 149232808237SRoger Quadros 1493802ca850SChanho Park pm_runtime_forbid(dev); 149472246da4SFelipe Balbi 14953921426bSFelipe Balbi ret = dwc3_alloc_event_buffers(dwc, DWC3_EVENT_BUFFERS_SIZE); 14963921426bSFelipe Balbi if (ret) { 14973921426bSFelipe Balbi dev_err(dwc->dev, "failed to allocate event buffers\n"); 14983921426bSFelipe Balbi ret = -ENOMEM; 149932808237SRoger Quadros goto err2; 15003921426bSFelipe Balbi } 15013921426bSFelipe Balbi 15029d6173e1SThinh Nguyen ret = dwc3_get_dr_mode(dwc); 15039d6173e1SThinh Nguyen if (ret) 15049d6173e1SThinh Nguyen goto err3; 150532a4a135SFelipe Balbi 1506c499ff71SFelipe Balbi ret = dwc3_alloc_scratch_buffers(dwc); 1507c499ff71SFelipe Balbi if (ret) 150832808237SRoger Quadros goto err3; 1509c499ff71SFelipe Balbi 151072246da4SFelipe Balbi ret = dwc3_core_init(dwc); 151172246da4SFelipe Balbi if (ret) { 1512408d3ba0SBrian Norris if (ret != -EPROBE_DEFER) 1513408d3ba0SBrian Norris dev_err(dev, "failed to initialize core: %d\n", ret); 151432808237SRoger Quadros goto err4; 151572246da4SFelipe Balbi } 151672246da4SFelipe Balbi 15177ac51a12SJohn Youn dwc3_check_params(dwc); 15182c7f1bd9SJohn Youn 15195f94adfeSFelipe Balbi ret = dwc3_core_init_mode(dwc); 15205f94adfeSFelipe Balbi if (ret) 152132808237SRoger Quadros goto err5; 152272246da4SFelipe Balbi 15234e9f3118SDu, Changbin dwc3_debugfs_init(dwc); 1524fc8bb91bSFelipe Balbi pm_runtime_put(dev); 152572246da4SFelipe Balbi 152672246da4SFelipe Balbi return 0; 152772246da4SFelipe Balbi 152832808237SRoger Quadros err5: 1529f122d33eSFelipe Balbi dwc3_event_buffers_cleanup(dwc); 153008fd9a82SAndy Shevchenko dwc3_ulpi_exit(dwc); 1531f122d33eSFelipe Balbi 153232808237SRoger Quadros err4: 1533c499ff71SFelipe Balbi dwc3_free_scratch_buffers(dwc); 153472246da4SFelipe Balbi 153532808237SRoger Quadros err3: 15363921426bSFelipe Balbi dwc3_free_event_buffers(dwc); 15373921426bSFelipe Balbi 153832808237SRoger Quadros err2: 153932808237SRoger Quadros pm_runtime_allow(&pdev->dev); 154032808237SRoger Quadros 154132808237SRoger Quadros err1: 154232808237SRoger Quadros pm_runtime_put_sync(&pdev->dev); 154332808237SRoger Quadros pm_runtime_disable(&pdev->dev); 154432808237SRoger Quadros 1545dc1b5d9aSEnric Balletbo i Serra disable_clks: 1546fe8abf33SMasahiro Yamada clk_bulk_disable(dwc->num_clks, dwc->clks); 1547fe8abf33SMasahiro Yamada unprepare_clks: 1548fe8abf33SMasahiro Yamada clk_bulk_unprepare(dwc->num_clks, dwc->clks); 1549fe8abf33SMasahiro Yamada assert_reset: 1550fe8abf33SMasahiro Yamada reset_control_assert(dwc->reset); 1551fe8abf33SMasahiro Yamada put_clks: 1552fe8abf33SMasahiro Yamada clk_bulk_put(dwc->num_clks, dwc->clks); 1553fe8abf33SMasahiro Yamada 155472246da4SFelipe Balbi return ret; 155572246da4SFelipe Balbi } 155672246da4SFelipe Balbi 1557fb4e98abSBill Pemberton static int dwc3_remove(struct platform_device *pdev) 155872246da4SFelipe Balbi { 155972246da4SFelipe Balbi struct dwc3 *dwc = platform_get_drvdata(pdev); 15603da1f6eeSFelipe Balbi 1561fc8bb91bSFelipe Balbi pm_runtime_get_sync(&pdev->dev); 156272246da4SFelipe Balbi 1563dc99f16fSFelipe Balbi dwc3_debugfs_exit(dwc); 1564dc99f16fSFelipe Balbi dwc3_core_exit_mode(dwc); 15658ba007a9SKishon Vijay Abraham I 156672246da4SFelipe Balbi dwc3_core_exit(dwc); 156788bc9d19SHeikki Krogerus dwc3_ulpi_exit(dwc); 156872246da4SFelipe Balbi 1569fc8bb91bSFelipe Balbi pm_runtime_put_sync(&pdev->dev); 1570fc8bb91bSFelipe Balbi pm_runtime_allow(&pdev->dev); 1571fc8bb91bSFelipe Balbi pm_runtime_disable(&pdev->dev); 1572fc8bb91bSFelipe Balbi 1573c499ff71SFelipe Balbi dwc3_free_event_buffers(dwc); 1574c499ff71SFelipe Balbi dwc3_free_scratch_buffers(dwc); 1575fe8abf33SMasahiro Yamada clk_bulk_put(dwc->num_clks, dwc->clks); 1576c499ff71SFelipe Balbi 157772246da4SFelipe Balbi return 0; 157872246da4SFelipe Balbi } 157972246da4SFelipe Balbi 1580fc8bb91bSFelipe Balbi #ifdef CONFIG_PM 1581fe8abf33SMasahiro Yamada static int dwc3_core_init_for_resume(struct dwc3 *dwc) 1582fe8abf33SMasahiro Yamada { 1583fe8abf33SMasahiro Yamada int ret; 1584fe8abf33SMasahiro Yamada 1585fe8abf33SMasahiro Yamada ret = reset_control_deassert(dwc->reset); 1586fe8abf33SMasahiro Yamada if (ret) 1587fe8abf33SMasahiro Yamada return ret; 1588fe8abf33SMasahiro Yamada 1589fe8abf33SMasahiro Yamada ret = clk_bulk_prepare(dwc->num_clks, dwc->clks); 1590fe8abf33SMasahiro Yamada if (ret) 1591fe8abf33SMasahiro Yamada goto assert_reset; 1592fe8abf33SMasahiro Yamada 1593fe8abf33SMasahiro Yamada ret = clk_bulk_enable(dwc->num_clks, dwc->clks); 1594fe8abf33SMasahiro Yamada if (ret) 1595fe8abf33SMasahiro Yamada goto unprepare_clks; 1596fe8abf33SMasahiro Yamada 1597fe8abf33SMasahiro Yamada ret = dwc3_core_init(dwc); 1598fe8abf33SMasahiro Yamada if (ret) 1599fe8abf33SMasahiro Yamada goto disable_clks; 1600fe8abf33SMasahiro Yamada 1601fe8abf33SMasahiro Yamada return 0; 1602fe8abf33SMasahiro Yamada 1603fe8abf33SMasahiro Yamada disable_clks: 1604fe8abf33SMasahiro Yamada clk_bulk_disable(dwc->num_clks, dwc->clks); 1605fe8abf33SMasahiro Yamada unprepare_clks: 1606fe8abf33SMasahiro Yamada clk_bulk_unprepare(dwc->num_clks, dwc->clks); 1607fe8abf33SMasahiro Yamada assert_reset: 1608fe8abf33SMasahiro Yamada reset_control_assert(dwc->reset); 1609fe8abf33SMasahiro Yamada 1610fe8abf33SMasahiro Yamada return ret; 1611fe8abf33SMasahiro Yamada } 1612fe8abf33SMasahiro Yamada 1613c4a5153eSManu Gautam static int dwc3_suspend_common(struct dwc3 *dwc, pm_message_t msg) 16147415f17cSFelipe Balbi { 1615fc8bb91bSFelipe Balbi unsigned long flags; 1616bcb12877SManu Gautam u32 reg; 16177415f17cSFelipe Balbi 1618689bf72cSManu Gautam switch (dwc->current_dr_role) { 1619689bf72cSManu Gautam case DWC3_GCTL_PRTCAP_DEVICE: 1620fc8bb91bSFelipe Balbi spin_lock_irqsave(&dwc->lock, flags); 16217415f17cSFelipe Balbi dwc3_gadget_suspend(dwc); 1622fc8bb91bSFelipe Balbi spin_unlock_irqrestore(&dwc->lock, flags); 162341a91c60SMarek Szyprowski synchronize_irq(dwc->irq_gadget); 1624689bf72cSManu Gautam dwc3_core_exit(dwc); 162551f5d49aSFelipe Balbi break; 1626689bf72cSManu Gautam case DWC3_GCTL_PRTCAP_HOST: 1627bcb12877SManu Gautam if (!PMSG_IS_AUTO(msg)) { 1628c4a5153eSManu Gautam dwc3_core_exit(dwc); 1629c4a5153eSManu Gautam break; 1630bcb12877SManu Gautam } 1631bcb12877SManu Gautam 1632bcb12877SManu Gautam /* Let controller to suspend HSPHY before PHY driver suspends */ 1633bcb12877SManu Gautam if (dwc->dis_u2_susphy_quirk || 1634bcb12877SManu Gautam dwc->dis_enblslpm_quirk) { 1635bcb12877SManu Gautam reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0)); 1636bcb12877SManu Gautam reg |= DWC3_GUSB2PHYCFG_ENBLSLPM | 1637bcb12877SManu Gautam DWC3_GUSB2PHYCFG_SUSPHY; 1638bcb12877SManu Gautam dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); 1639bcb12877SManu Gautam 1640bcb12877SManu Gautam /* Give some time for USB2 PHY to suspend */ 1641bcb12877SManu Gautam usleep_range(5000, 6000); 1642bcb12877SManu Gautam } 1643bcb12877SManu Gautam 1644bcb12877SManu Gautam phy_pm_runtime_put_sync(dwc->usb2_generic_phy); 1645bcb12877SManu Gautam phy_pm_runtime_put_sync(dwc->usb3_generic_phy); 1646bcb12877SManu Gautam break; 1647f09cc79bSRoger Quadros case DWC3_GCTL_PRTCAP_OTG: 1648f09cc79bSRoger Quadros /* do nothing during runtime_suspend */ 1649f09cc79bSRoger Quadros if (PMSG_IS_AUTO(msg)) 1650f09cc79bSRoger Quadros break; 1651f09cc79bSRoger Quadros 1652f09cc79bSRoger Quadros if (dwc->current_otg_role == DWC3_OTG_ROLE_DEVICE) { 1653f09cc79bSRoger Quadros spin_lock_irqsave(&dwc->lock, flags); 1654f09cc79bSRoger Quadros dwc3_gadget_suspend(dwc); 1655f09cc79bSRoger Quadros spin_unlock_irqrestore(&dwc->lock, flags); 165641a91c60SMarek Szyprowski synchronize_irq(dwc->irq_gadget); 1657f09cc79bSRoger Quadros } 1658f09cc79bSRoger Quadros 1659f09cc79bSRoger Quadros dwc3_otg_exit(dwc); 1660f09cc79bSRoger Quadros dwc3_core_exit(dwc); 1661f09cc79bSRoger Quadros break; 16627415f17cSFelipe Balbi default: 166351f5d49aSFelipe Balbi /* do nothing */ 16647415f17cSFelipe Balbi break; 16657415f17cSFelipe Balbi } 16667415f17cSFelipe Balbi 1667fc8bb91bSFelipe Balbi return 0; 1668fc8bb91bSFelipe Balbi } 1669fc8bb91bSFelipe Balbi 1670c4a5153eSManu Gautam static int dwc3_resume_common(struct dwc3 *dwc, pm_message_t msg) 1671fc8bb91bSFelipe Balbi { 1672fc8bb91bSFelipe Balbi unsigned long flags; 1673fc8bb91bSFelipe Balbi int ret; 1674bcb12877SManu Gautam u32 reg; 1675fc8bb91bSFelipe Balbi 1676689bf72cSManu Gautam switch (dwc->current_dr_role) { 1677689bf72cSManu Gautam case DWC3_GCTL_PRTCAP_DEVICE: 1678fe8abf33SMasahiro Yamada ret = dwc3_core_init_for_resume(dwc); 1679fc8bb91bSFelipe Balbi if (ret) 1680fc8bb91bSFelipe Balbi return ret; 1681fc8bb91bSFelipe Balbi 16827d11c3acSRoger Quadros dwc3_set_prtcap(dwc, DWC3_GCTL_PRTCAP_DEVICE); 1683fc8bb91bSFelipe Balbi spin_lock_irqsave(&dwc->lock, flags); 1684fc8bb91bSFelipe Balbi dwc3_gadget_resume(dwc); 1685fc8bb91bSFelipe Balbi spin_unlock_irqrestore(&dwc->lock, flags); 1686689bf72cSManu Gautam break; 1687689bf72cSManu Gautam case DWC3_GCTL_PRTCAP_HOST: 1688c4a5153eSManu Gautam if (!PMSG_IS_AUTO(msg)) { 1689fe8abf33SMasahiro Yamada ret = dwc3_core_init_for_resume(dwc); 1690c4a5153eSManu Gautam if (ret) 1691c4a5153eSManu Gautam return ret; 16927d11c3acSRoger Quadros dwc3_set_prtcap(dwc, DWC3_GCTL_PRTCAP_HOST); 1693bcb12877SManu Gautam break; 1694c4a5153eSManu Gautam } 1695bcb12877SManu Gautam /* Restore GUSB2PHYCFG bits that were modified in suspend */ 1696bcb12877SManu Gautam reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0)); 1697bcb12877SManu Gautam if (dwc->dis_u2_susphy_quirk) 1698bcb12877SManu Gautam reg &= ~DWC3_GUSB2PHYCFG_SUSPHY; 1699bcb12877SManu Gautam 1700bcb12877SManu Gautam if (dwc->dis_enblslpm_quirk) 1701bcb12877SManu Gautam reg &= ~DWC3_GUSB2PHYCFG_ENBLSLPM; 1702bcb12877SManu Gautam 1703bcb12877SManu Gautam dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); 1704bcb12877SManu Gautam 1705bcb12877SManu Gautam phy_pm_runtime_get_sync(dwc->usb2_generic_phy); 1706bcb12877SManu Gautam phy_pm_runtime_get_sync(dwc->usb3_generic_phy); 1707c4a5153eSManu Gautam break; 1708f09cc79bSRoger Quadros case DWC3_GCTL_PRTCAP_OTG: 1709f09cc79bSRoger Quadros /* nothing to do on runtime_resume */ 1710f09cc79bSRoger Quadros if (PMSG_IS_AUTO(msg)) 1711f09cc79bSRoger Quadros break; 1712f09cc79bSRoger Quadros 1713f09cc79bSRoger Quadros ret = dwc3_core_init(dwc); 1714f09cc79bSRoger Quadros if (ret) 1715f09cc79bSRoger Quadros return ret; 1716f09cc79bSRoger Quadros 1717f09cc79bSRoger Quadros dwc3_set_prtcap(dwc, dwc->current_dr_role); 1718f09cc79bSRoger Quadros 1719f09cc79bSRoger Quadros dwc3_otg_init(dwc); 1720f09cc79bSRoger Quadros if (dwc->current_otg_role == DWC3_OTG_ROLE_HOST) { 1721f09cc79bSRoger Quadros dwc3_otg_host_init(dwc); 1722f09cc79bSRoger Quadros } else if (dwc->current_otg_role == DWC3_OTG_ROLE_DEVICE) { 1723f09cc79bSRoger Quadros spin_lock_irqsave(&dwc->lock, flags); 1724f09cc79bSRoger Quadros dwc3_gadget_resume(dwc); 1725f09cc79bSRoger Quadros spin_unlock_irqrestore(&dwc->lock, flags); 1726f09cc79bSRoger Quadros } 1727f09cc79bSRoger Quadros 1728f09cc79bSRoger Quadros break; 1729fc8bb91bSFelipe Balbi default: 1730fc8bb91bSFelipe Balbi /* do nothing */ 1731fc8bb91bSFelipe Balbi break; 1732fc8bb91bSFelipe Balbi } 1733fc8bb91bSFelipe Balbi 1734fc8bb91bSFelipe Balbi return 0; 1735fc8bb91bSFelipe Balbi } 1736fc8bb91bSFelipe Balbi 1737fc8bb91bSFelipe Balbi static int dwc3_runtime_checks(struct dwc3 *dwc) 1738fc8bb91bSFelipe Balbi { 1739689bf72cSManu Gautam switch (dwc->current_dr_role) { 1740c4a5153eSManu Gautam case DWC3_GCTL_PRTCAP_DEVICE: 1741fc8bb91bSFelipe Balbi if (dwc->connected) 1742fc8bb91bSFelipe Balbi return -EBUSY; 1743fc8bb91bSFelipe Balbi break; 1744c4a5153eSManu Gautam case DWC3_GCTL_PRTCAP_HOST: 1745fc8bb91bSFelipe Balbi default: 1746fc8bb91bSFelipe Balbi /* do nothing */ 1747fc8bb91bSFelipe Balbi break; 1748fc8bb91bSFelipe Balbi } 1749fc8bb91bSFelipe Balbi 1750fc8bb91bSFelipe Balbi return 0; 1751fc8bb91bSFelipe Balbi } 1752fc8bb91bSFelipe Balbi 1753fc8bb91bSFelipe Balbi static int dwc3_runtime_suspend(struct device *dev) 1754fc8bb91bSFelipe Balbi { 1755fc8bb91bSFelipe Balbi struct dwc3 *dwc = dev_get_drvdata(dev); 1756fc8bb91bSFelipe Balbi int ret; 1757fc8bb91bSFelipe Balbi 1758fc8bb91bSFelipe Balbi if (dwc3_runtime_checks(dwc)) 1759fc8bb91bSFelipe Balbi return -EBUSY; 1760fc8bb91bSFelipe Balbi 1761c4a5153eSManu Gautam ret = dwc3_suspend_common(dwc, PMSG_AUTO_SUSPEND); 1762fc8bb91bSFelipe Balbi if (ret) 1763fc8bb91bSFelipe Balbi return ret; 1764fc8bb91bSFelipe Balbi 1765fc8bb91bSFelipe Balbi device_init_wakeup(dev, true); 1766fc8bb91bSFelipe Balbi 1767fc8bb91bSFelipe Balbi return 0; 1768fc8bb91bSFelipe Balbi } 1769fc8bb91bSFelipe Balbi 1770fc8bb91bSFelipe Balbi static int dwc3_runtime_resume(struct device *dev) 1771fc8bb91bSFelipe Balbi { 1772fc8bb91bSFelipe Balbi struct dwc3 *dwc = dev_get_drvdata(dev); 1773fc8bb91bSFelipe Balbi int ret; 1774fc8bb91bSFelipe Balbi 1775fc8bb91bSFelipe Balbi device_init_wakeup(dev, false); 1776fc8bb91bSFelipe Balbi 1777c4a5153eSManu Gautam ret = dwc3_resume_common(dwc, PMSG_AUTO_RESUME); 1778fc8bb91bSFelipe Balbi if (ret) 1779fc8bb91bSFelipe Balbi return ret; 1780fc8bb91bSFelipe Balbi 1781689bf72cSManu Gautam switch (dwc->current_dr_role) { 1782689bf72cSManu Gautam case DWC3_GCTL_PRTCAP_DEVICE: 1783fc8bb91bSFelipe Balbi dwc3_gadget_process_pending_events(dwc); 1784fc8bb91bSFelipe Balbi break; 1785689bf72cSManu Gautam case DWC3_GCTL_PRTCAP_HOST: 1786fc8bb91bSFelipe Balbi default: 1787fc8bb91bSFelipe Balbi /* do nothing */ 1788fc8bb91bSFelipe Balbi break; 1789fc8bb91bSFelipe Balbi } 1790fc8bb91bSFelipe Balbi 1791fc8bb91bSFelipe Balbi pm_runtime_mark_last_busy(dev); 1792fc8bb91bSFelipe Balbi 1793fc8bb91bSFelipe Balbi return 0; 1794fc8bb91bSFelipe Balbi } 1795fc8bb91bSFelipe Balbi 1796fc8bb91bSFelipe Balbi static int dwc3_runtime_idle(struct device *dev) 1797fc8bb91bSFelipe Balbi { 1798fc8bb91bSFelipe Balbi struct dwc3 *dwc = dev_get_drvdata(dev); 1799fc8bb91bSFelipe Balbi 1800689bf72cSManu Gautam switch (dwc->current_dr_role) { 1801689bf72cSManu Gautam case DWC3_GCTL_PRTCAP_DEVICE: 1802fc8bb91bSFelipe Balbi if (dwc3_runtime_checks(dwc)) 1803fc8bb91bSFelipe Balbi return -EBUSY; 1804fc8bb91bSFelipe Balbi break; 1805689bf72cSManu Gautam case DWC3_GCTL_PRTCAP_HOST: 1806fc8bb91bSFelipe Balbi default: 1807fc8bb91bSFelipe Balbi /* do nothing */ 1808fc8bb91bSFelipe Balbi break; 1809fc8bb91bSFelipe Balbi } 1810fc8bb91bSFelipe Balbi 1811fc8bb91bSFelipe Balbi pm_runtime_mark_last_busy(dev); 1812fc8bb91bSFelipe Balbi pm_runtime_autosuspend(dev); 1813fc8bb91bSFelipe Balbi 1814fc8bb91bSFelipe Balbi return 0; 1815fc8bb91bSFelipe Balbi } 1816fc8bb91bSFelipe Balbi #endif /* CONFIG_PM */ 1817fc8bb91bSFelipe Balbi 1818fc8bb91bSFelipe Balbi #ifdef CONFIG_PM_SLEEP 1819fc8bb91bSFelipe Balbi static int dwc3_suspend(struct device *dev) 1820fc8bb91bSFelipe Balbi { 1821fc8bb91bSFelipe Balbi struct dwc3 *dwc = dev_get_drvdata(dev); 1822fc8bb91bSFelipe Balbi int ret; 1823fc8bb91bSFelipe Balbi 1824c4a5153eSManu Gautam ret = dwc3_suspend_common(dwc, PMSG_SUSPEND); 1825fc8bb91bSFelipe Balbi if (ret) 1826fc8bb91bSFelipe Balbi return ret; 1827fc8bb91bSFelipe Balbi 18286344475fSSekhar Nori pinctrl_pm_select_sleep_state(dev); 18296344475fSSekhar Nori 18307415f17cSFelipe Balbi return 0; 18317415f17cSFelipe Balbi } 18327415f17cSFelipe Balbi 18337415f17cSFelipe Balbi static int dwc3_resume(struct device *dev) 18347415f17cSFelipe Balbi { 18357415f17cSFelipe Balbi struct dwc3 *dwc = dev_get_drvdata(dev); 183657303488SKishon Vijay Abraham I int ret; 18377415f17cSFelipe Balbi 18386344475fSSekhar Nori pinctrl_pm_select_default_state(dev); 18396344475fSSekhar Nori 1840c4a5153eSManu Gautam ret = dwc3_resume_common(dwc, PMSG_RESUME); 184151f5d49aSFelipe Balbi if (ret) 18425c4ad318SFelipe Balbi return ret; 18435c4ad318SFelipe Balbi 18447415f17cSFelipe Balbi pm_runtime_disable(dev); 18457415f17cSFelipe Balbi pm_runtime_set_active(dev); 18467415f17cSFelipe Balbi pm_runtime_enable(dev); 18477415f17cSFelipe Balbi 18487415f17cSFelipe Balbi return 0; 18497415f17cSFelipe Balbi } 18507f370ed0SFelipe Balbi #endif /* CONFIG_PM_SLEEP */ 18517415f17cSFelipe Balbi 18527415f17cSFelipe Balbi static const struct dev_pm_ops dwc3_dev_pm_ops = { 18537415f17cSFelipe Balbi SET_SYSTEM_SLEEP_PM_OPS(dwc3_suspend, dwc3_resume) 1854fc8bb91bSFelipe Balbi SET_RUNTIME_PM_OPS(dwc3_runtime_suspend, dwc3_runtime_resume, 1855fc8bb91bSFelipe Balbi dwc3_runtime_idle) 18567415f17cSFelipe Balbi }; 18577415f17cSFelipe Balbi 18585088b6f5SKishon Vijay Abraham I #ifdef CONFIG_OF 18595088b6f5SKishon Vijay Abraham I static const struct of_device_id of_dwc3_match[] = { 18605088b6f5SKishon Vijay Abraham I { 186122a5aa17SFelipe Balbi .compatible = "snps,dwc3" 186222a5aa17SFelipe Balbi }, 186322a5aa17SFelipe Balbi { 18645088b6f5SKishon Vijay Abraham I .compatible = "synopsys,dwc3" 18655088b6f5SKishon Vijay Abraham I }, 18665088b6f5SKishon Vijay Abraham I { }, 18675088b6f5SKishon Vijay Abraham I }; 18685088b6f5SKishon Vijay Abraham I MODULE_DEVICE_TABLE(of, of_dwc3_match); 18695088b6f5SKishon Vijay Abraham I #endif 18705088b6f5SKishon Vijay Abraham I 1871404905a6SHeikki Krogerus #ifdef CONFIG_ACPI 1872404905a6SHeikki Krogerus 1873404905a6SHeikki Krogerus #define ACPI_ID_INTEL_BSW "808622B7" 1874404905a6SHeikki Krogerus 1875404905a6SHeikki Krogerus static const struct acpi_device_id dwc3_acpi_match[] = { 1876404905a6SHeikki Krogerus { ACPI_ID_INTEL_BSW, 0 }, 1877404905a6SHeikki Krogerus { }, 1878404905a6SHeikki Krogerus }; 1879404905a6SHeikki Krogerus MODULE_DEVICE_TABLE(acpi, dwc3_acpi_match); 1880404905a6SHeikki Krogerus #endif 1881404905a6SHeikki Krogerus 188272246da4SFelipe Balbi static struct platform_driver dwc3_driver = { 188372246da4SFelipe Balbi .probe = dwc3_probe, 18847690417dSBill Pemberton .remove = dwc3_remove, 188572246da4SFelipe Balbi .driver = { 188672246da4SFelipe Balbi .name = "dwc3", 18875088b6f5SKishon Vijay Abraham I .of_match_table = of_match_ptr(of_dwc3_match), 1888404905a6SHeikki Krogerus .acpi_match_table = ACPI_PTR(dwc3_acpi_match), 18897f370ed0SFelipe Balbi .pm = &dwc3_dev_pm_ops, 189072246da4SFelipe Balbi }, 189172246da4SFelipe Balbi }; 189272246da4SFelipe Balbi 1893b1116dccSTobias Klauser module_platform_driver(dwc3_driver); 1894b1116dccSTobias Klauser 18957ae4fc4dSSebastian Andrzej Siewior MODULE_ALIAS("platform:dwc3"); 189672246da4SFelipe Balbi MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>"); 18975945f789SFelipe Balbi MODULE_LICENSE("GPL v2"); 189872246da4SFelipe Balbi MODULE_DESCRIPTION("DesignWare USB3 DRD Controller Driver"); 1899