15fd54aceSGreg Kroah-Hartman // SPDX-License-Identifier: GPL-2.0 272246da4SFelipe Balbi /** 372246da4SFelipe Balbi * core.c - DesignWare USB3 DRD Controller Core file 472246da4SFelipe Balbi * 572246da4SFelipe Balbi * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com 672246da4SFelipe Balbi * 772246da4SFelipe Balbi * Authors: Felipe Balbi <balbi@ti.com>, 872246da4SFelipe Balbi * Sebastian Andrzej Siewior <bigeasy@linutronix.de> 972246da4SFelipe Balbi */ 1072246da4SFelipe Balbi 11fe8abf33SMasahiro Yamada #include <linux/clk.h> 12fa0ea13eSFelipe Balbi #include <linux/version.h> 13a72e658bSFelipe Balbi #include <linux/module.h> 1472246da4SFelipe Balbi #include <linux/kernel.h> 1572246da4SFelipe Balbi #include <linux/slab.h> 1672246da4SFelipe Balbi #include <linux/spinlock.h> 1772246da4SFelipe Balbi #include <linux/platform_device.h> 1872246da4SFelipe Balbi #include <linux/pm_runtime.h> 1972246da4SFelipe Balbi #include <linux/interrupt.h> 2072246da4SFelipe Balbi #include <linux/ioport.h> 2172246da4SFelipe Balbi #include <linux/io.h> 2272246da4SFelipe Balbi #include <linux/list.h> 2372246da4SFelipe Balbi #include <linux/delay.h> 2472246da4SFelipe Balbi #include <linux/dma-mapping.h> 25457e84b6SFelipe Balbi #include <linux/of.h> 26404905a6SHeikki Krogerus #include <linux/acpi.h> 276344475fSSekhar Nori #include <linux/pinctrl/consumer.h> 28fe8abf33SMasahiro Yamada #include <linux/reset.h> 2972246da4SFelipe Balbi 3072246da4SFelipe Balbi #include <linux/usb/ch9.h> 3172246da4SFelipe Balbi #include <linux/usb/gadget.h> 32f7e846f0SFelipe Balbi #include <linux/usb/of.h> 33a45c82b8SRuchika Kharwar #include <linux/usb/otg.h> 3472246da4SFelipe Balbi 3572246da4SFelipe Balbi #include "core.h" 3672246da4SFelipe Balbi #include "gadget.h" 3772246da4SFelipe Balbi #include "io.h" 3872246da4SFelipe Balbi 3972246da4SFelipe Balbi #include "debug.h" 4072246da4SFelipe Balbi 41fc8bb91bSFelipe Balbi #define DWC3_DEFAULT_AUTOSUSPEND_DELAY 5000 /* ms */ 428300dd23SFelipe Balbi 439d6173e1SThinh Nguyen /** 449d6173e1SThinh Nguyen * dwc3_get_dr_mode - Validates and sets dr_mode 459d6173e1SThinh Nguyen * @dwc: pointer to our context structure 469d6173e1SThinh Nguyen */ 479d6173e1SThinh Nguyen static int dwc3_get_dr_mode(struct dwc3 *dwc) 489d6173e1SThinh Nguyen { 499d6173e1SThinh Nguyen enum usb_dr_mode mode; 509d6173e1SThinh Nguyen struct device *dev = dwc->dev; 519d6173e1SThinh Nguyen unsigned int hw_mode; 529d6173e1SThinh Nguyen 539d6173e1SThinh Nguyen if (dwc->dr_mode == USB_DR_MODE_UNKNOWN) 549d6173e1SThinh Nguyen dwc->dr_mode = USB_DR_MODE_OTG; 559d6173e1SThinh Nguyen 569d6173e1SThinh Nguyen mode = dwc->dr_mode; 579d6173e1SThinh Nguyen hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0); 589d6173e1SThinh Nguyen 599d6173e1SThinh Nguyen switch (hw_mode) { 609d6173e1SThinh Nguyen case DWC3_GHWPARAMS0_MODE_GADGET: 619d6173e1SThinh Nguyen if (IS_ENABLED(CONFIG_USB_DWC3_HOST)) { 629d6173e1SThinh Nguyen dev_err(dev, 639d6173e1SThinh Nguyen "Controller does not support host mode.\n"); 649d6173e1SThinh Nguyen return -EINVAL; 659d6173e1SThinh Nguyen } 669d6173e1SThinh Nguyen mode = USB_DR_MODE_PERIPHERAL; 679d6173e1SThinh Nguyen break; 689d6173e1SThinh Nguyen case DWC3_GHWPARAMS0_MODE_HOST: 699d6173e1SThinh Nguyen if (IS_ENABLED(CONFIG_USB_DWC3_GADGET)) { 709d6173e1SThinh Nguyen dev_err(dev, 719d6173e1SThinh Nguyen "Controller does not support device mode.\n"); 729d6173e1SThinh Nguyen return -EINVAL; 739d6173e1SThinh Nguyen } 749d6173e1SThinh Nguyen mode = USB_DR_MODE_HOST; 759d6173e1SThinh Nguyen break; 769d6173e1SThinh Nguyen default: 779d6173e1SThinh Nguyen if (IS_ENABLED(CONFIG_USB_DWC3_HOST)) 789d6173e1SThinh Nguyen mode = USB_DR_MODE_HOST; 799d6173e1SThinh Nguyen else if (IS_ENABLED(CONFIG_USB_DWC3_GADGET)) 809d6173e1SThinh Nguyen mode = USB_DR_MODE_PERIPHERAL; 81a7700468SThinh Nguyen 82a7700468SThinh Nguyen /* 83a7700468SThinh Nguyen * dwc_usb31 does not support OTG mode. If the controller 84a7700468SThinh Nguyen * supports DRD but the dr_mode is not specified or set to OTG, 85a7700468SThinh Nguyen * then set the mode to peripheral. 86a7700468SThinh Nguyen */ 87a7700468SThinh Nguyen if (mode == USB_DR_MODE_OTG && dwc3_is_usb31(dwc)) 88a7700468SThinh Nguyen mode = USB_DR_MODE_PERIPHERAL; 899d6173e1SThinh Nguyen } 909d6173e1SThinh Nguyen 919d6173e1SThinh Nguyen if (mode != dwc->dr_mode) { 929d6173e1SThinh Nguyen dev_warn(dev, 939d6173e1SThinh Nguyen "Configuration mismatch. dr_mode forced to %s\n", 949d6173e1SThinh Nguyen mode == USB_DR_MODE_HOST ? "host" : "gadget"); 959d6173e1SThinh Nguyen 969d6173e1SThinh Nguyen dwc->dr_mode = mode; 979d6173e1SThinh Nguyen } 989d6173e1SThinh Nguyen 999d6173e1SThinh Nguyen return 0; 1009d6173e1SThinh Nguyen } 1019d6173e1SThinh Nguyen 102f09cc79bSRoger Quadros void dwc3_set_prtcap(struct dwc3 *dwc, u32 mode) 1033140e8cbSSebastian Andrzej Siewior { 1043140e8cbSSebastian Andrzej Siewior u32 reg; 1053140e8cbSSebastian Andrzej Siewior 1063140e8cbSSebastian Andrzej Siewior reg = dwc3_readl(dwc->regs, DWC3_GCTL); 1073140e8cbSSebastian Andrzej Siewior reg &= ~(DWC3_GCTL_PRTCAPDIR(DWC3_GCTL_PRTCAP_OTG)); 1083140e8cbSSebastian Andrzej Siewior reg |= DWC3_GCTL_PRTCAPDIR(mode); 1093140e8cbSSebastian Andrzej Siewior dwc3_writel(dwc->regs, DWC3_GCTL, reg); 110c4a5153eSManu Gautam 111c4a5153eSManu Gautam dwc->current_dr_role = mode; 11241ce1456SRoger Quadros } 1136b3261a2SRoger Quadros 11441ce1456SRoger Quadros static void __dwc3_set_mode(struct work_struct *work) 11541ce1456SRoger Quadros { 11641ce1456SRoger Quadros struct dwc3 *dwc = work_to_dwc(work); 11741ce1456SRoger Quadros unsigned long flags; 11841ce1456SRoger Quadros int ret; 11941ce1456SRoger Quadros 120f09cc79bSRoger Quadros if (dwc->dr_mode != USB_DR_MODE_OTG) 121f09cc79bSRoger Quadros return; 122f09cc79bSRoger Quadros 123f09cc79bSRoger Quadros if (dwc->current_dr_role == DWC3_GCTL_PRTCAP_OTG) 124f09cc79bSRoger Quadros dwc3_otg_update(dwc, 0); 125f09cc79bSRoger Quadros 12641ce1456SRoger Quadros if (!dwc->desired_dr_role) 12741ce1456SRoger Quadros return; 12841ce1456SRoger Quadros 12941ce1456SRoger Quadros if (dwc->desired_dr_role == dwc->current_dr_role) 13041ce1456SRoger Quadros return; 13141ce1456SRoger Quadros 132f09cc79bSRoger Quadros if (dwc->desired_dr_role == DWC3_GCTL_PRTCAP_OTG && dwc->edev) 13341ce1456SRoger Quadros return; 13441ce1456SRoger Quadros 13541ce1456SRoger Quadros switch (dwc->current_dr_role) { 13641ce1456SRoger Quadros case DWC3_GCTL_PRTCAP_HOST: 13741ce1456SRoger Quadros dwc3_host_exit(dwc); 13841ce1456SRoger Quadros break; 13941ce1456SRoger Quadros case DWC3_GCTL_PRTCAP_DEVICE: 14041ce1456SRoger Quadros dwc3_gadget_exit(dwc); 14141ce1456SRoger Quadros dwc3_event_buffers_cleanup(dwc); 14241ce1456SRoger Quadros break; 143f09cc79bSRoger Quadros case DWC3_GCTL_PRTCAP_OTG: 144f09cc79bSRoger Quadros dwc3_otg_exit(dwc); 145f09cc79bSRoger Quadros spin_lock_irqsave(&dwc->lock, flags); 146f09cc79bSRoger Quadros dwc->desired_otg_role = DWC3_OTG_ROLE_IDLE; 147f09cc79bSRoger Quadros spin_unlock_irqrestore(&dwc->lock, flags); 148f09cc79bSRoger Quadros dwc3_otg_update(dwc, 1); 149f09cc79bSRoger Quadros break; 15041ce1456SRoger Quadros default: 15141ce1456SRoger Quadros break; 15241ce1456SRoger Quadros } 15341ce1456SRoger Quadros 15441ce1456SRoger Quadros spin_lock_irqsave(&dwc->lock, flags); 15541ce1456SRoger Quadros 15641ce1456SRoger Quadros dwc3_set_prtcap(dwc, dwc->desired_dr_role); 15741ce1456SRoger Quadros 15841ce1456SRoger Quadros spin_unlock_irqrestore(&dwc->lock, flags); 15941ce1456SRoger Quadros 16041ce1456SRoger Quadros switch (dwc->desired_dr_role) { 16141ce1456SRoger Quadros case DWC3_GCTL_PRTCAP_HOST: 16241ce1456SRoger Quadros ret = dwc3_host_init(dwc); 163958d1a4cSFelipe Balbi if (ret) { 16441ce1456SRoger Quadros dev_err(dwc->dev, "failed to initialize host\n"); 165958d1a4cSFelipe Balbi } else { 166958d1a4cSFelipe Balbi if (dwc->usb2_phy) 167958d1a4cSFelipe Balbi otg_set_vbus(dwc->usb2_phy->otg, true); 168958d1a4cSFelipe Balbi phy_set_mode(dwc->usb2_generic_phy, PHY_MODE_USB_HOST); 169644cbbc3SManu Gautam phy_set_mode(dwc->usb3_generic_phy, PHY_MODE_USB_HOST); 170d8c80bb3SVivek Gautam phy_calibrate(dwc->usb2_generic_phy); 171958d1a4cSFelipe Balbi } 17241ce1456SRoger Quadros break; 17341ce1456SRoger Quadros case DWC3_GCTL_PRTCAP_DEVICE: 17441ce1456SRoger Quadros dwc3_event_buffers_setup(dwc); 175958d1a4cSFelipe Balbi 176958d1a4cSFelipe Balbi if (dwc->usb2_phy) 177958d1a4cSFelipe Balbi otg_set_vbus(dwc->usb2_phy->otg, false); 178958d1a4cSFelipe Balbi phy_set_mode(dwc->usb2_generic_phy, PHY_MODE_USB_DEVICE); 179644cbbc3SManu Gautam phy_set_mode(dwc->usb3_generic_phy, PHY_MODE_USB_DEVICE); 180958d1a4cSFelipe Balbi 18141ce1456SRoger Quadros ret = dwc3_gadget_init(dwc); 18241ce1456SRoger Quadros if (ret) 18341ce1456SRoger Quadros dev_err(dwc->dev, "failed to initialize peripheral\n"); 18441ce1456SRoger Quadros break; 185f09cc79bSRoger Quadros case DWC3_GCTL_PRTCAP_OTG: 186f09cc79bSRoger Quadros dwc3_otg_init(dwc); 187f09cc79bSRoger Quadros dwc3_otg_update(dwc, 0); 188f09cc79bSRoger Quadros break; 18941ce1456SRoger Quadros default: 19041ce1456SRoger Quadros break; 19141ce1456SRoger Quadros } 192f09cc79bSRoger Quadros 19341ce1456SRoger Quadros } 19441ce1456SRoger Quadros 19541ce1456SRoger Quadros void dwc3_set_mode(struct dwc3 *dwc, u32 mode) 19641ce1456SRoger Quadros { 19741ce1456SRoger Quadros unsigned long flags; 19841ce1456SRoger Quadros 19941ce1456SRoger Quadros spin_lock_irqsave(&dwc->lock, flags); 20041ce1456SRoger Quadros dwc->desired_dr_role = mode; 20141ce1456SRoger Quadros spin_unlock_irqrestore(&dwc->lock, flags); 20241ce1456SRoger Quadros 203084a804eSRoger Quadros queue_work(system_freezable_wq, &dwc->drd_work); 2043140e8cbSSebastian Andrzej Siewior } 2058300dd23SFelipe Balbi 206cf6d867dSFelipe Balbi u32 dwc3_core_fifo_space(struct dwc3_ep *dep, u8 type) 207cf6d867dSFelipe Balbi { 208cf6d867dSFelipe Balbi struct dwc3 *dwc = dep->dwc; 209cf6d867dSFelipe Balbi u32 reg; 210cf6d867dSFelipe Balbi 211cf6d867dSFelipe Balbi dwc3_writel(dwc->regs, DWC3_GDBGFIFOSPACE, 212cf6d867dSFelipe Balbi DWC3_GDBGFIFOSPACE_NUM(dep->number) | 213cf6d867dSFelipe Balbi DWC3_GDBGFIFOSPACE_TYPE(type)); 214cf6d867dSFelipe Balbi 215cf6d867dSFelipe Balbi reg = dwc3_readl(dwc->regs, DWC3_GDBGFIFOSPACE); 216cf6d867dSFelipe Balbi 217cf6d867dSFelipe Balbi return DWC3_GDBGFIFOSPACE_SPACE_AVAILABLE(reg); 218cf6d867dSFelipe Balbi } 219cf6d867dSFelipe Balbi 22072246da4SFelipe Balbi /** 22172246da4SFelipe Balbi * dwc3_core_soft_reset - Issues core soft reset and PHY reset 22272246da4SFelipe Balbi * @dwc: pointer to our context structure 22372246da4SFelipe Balbi */ 22457303488SKishon Vijay Abraham I static int dwc3_core_soft_reset(struct dwc3 *dwc) 22572246da4SFelipe Balbi { 22672246da4SFelipe Balbi u32 reg; 227f59dcab1SFelipe Balbi int retries = 1000; 22857303488SKishon Vijay Abraham I int ret; 22972246da4SFelipe Balbi 23051e1e7bcSFelipe Balbi usb_phy_init(dwc->usb2_phy); 23151e1e7bcSFelipe Balbi usb_phy_init(dwc->usb3_phy); 23257303488SKishon Vijay Abraham I ret = phy_init(dwc->usb2_generic_phy); 23357303488SKishon Vijay Abraham I if (ret < 0) 23457303488SKishon Vijay Abraham I return ret; 23557303488SKishon Vijay Abraham I 23657303488SKishon Vijay Abraham I ret = phy_init(dwc->usb3_generic_phy); 23757303488SKishon Vijay Abraham I if (ret < 0) { 23857303488SKishon Vijay Abraham I phy_exit(dwc->usb2_generic_phy); 23957303488SKishon Vijay Abraham I return ret; 24057303488SKishon Vijay Abraham I } 24172246da4SFelipe Balbi 242f59dcab1SFelipe Balbi /* 243f59dcab1SFelipe Balbi * We're resetting only the device side because, if we're in host mode, 244f59dcab1SFelipe Balbi * XHCI driver will reset the host block. If dwc3 was configured for 245f59dcab1SFelipe Balbi * host-only mode, then we can return early. 246f59dcab1SFelipe Balbi */ 247c4a5153eSManu Gautam if (dwc->current_dr_role == DWC3_GCTL_PRTCAP_HOST) 24857303488SKishon Vijay Abraham I return 0; 249f59dcab1SFelipe Balbi 250f59dcab1SFelipe Balbi reg = dwc3_readl(dwc->regs, DWC3_DCTL); 251f59dcab1SFelipe Balbi reg |= DWC3_DCTL_CSFTRST; 252f59dcab1SFelipe Balbi dwc3_writel(dwc->regs, DWC3_DCTL, reg); 253f59dcab1SFelipe Balbi 254f59dcab1SFelipe Balbi do { 255f59dcab1SFelipe Balbi reg = dwc3_readl(dwc->regs, DWC3_DCTL); 256f59dcab1SFelipe Balbi if (!(reg & DWC3_DCTL_CSFTRST)) 257fab38333SThinh Nguyen goto done; 258f59dcab1SFelipe Balbi 259f59dcab1SFelipe Balbi udelay(1); 260f59dcab1SFelipe Balbi } while (--retries); 261f59dcab1SFelipe Balbi 26200b42170SBrian Norris phy_exit(dwc->usb3_generic_phy); 26300b42170SBrian Norris phy_exit(dwc->usb2_generic_phy); 26400b42170SBrian Norris 265f59dcab1SFelipe Balbi return -ETIMEDOUT; 266fab38333SThinh Nguyen 267fab38333SThinh Nguyen done: 268fab38333SThinh Nguyen /* 269fab38333SThinh Nguyen * For DWC_usb31 controller, once DWC3_DCTL_CSFTRST bit is cleared, 270fab38333SThinh Nguyen * we must wait at least 50ms before accessing the PHY domain 271fab38333SThinh Nguyen * (synchronization delay). DWC_usb31 programming guide section 1.3.2. 272fab38333SThinh Nguyen */ 273fab38333SThinh Nguyen if (dwc3_is_usb31(dwc)) 274fab38333SThinh Nguyen msleep(50); 275fab38333SThinh Nguyen 276fab38333SThinh Nguyen return 0; 27772246da4SFelipe Balbi } 27872246da4SFelipe Balbi 279fe8abf33SMasahiro Yamada static const struct clk_bulk_data dwc3_core_clks[] = { 280fe8abf33SMasahiro Yamada { .id = "ref" }, 281fe8abf33SMasahiro Yamada { .id = "bus_early" }, 282fe8abf33SMasahiro Yamada { .id = "suspend" }, 283fe8abf33SMasahiro Yamada }; 284fe8abf33SMasahiro Yamada 285db2be4e9SNikhil Badola /* 286db2be4e9SNikhil Badola * dwc3_frame_length_adjustment - Adjusts frame length if required 287db2be4e9SNikhil Badola * @dwc3: Pointer to our controller context structure 288db2be4e9SNikhil Badola */ 289bcdb3272SFelipe Balbi static void dwc3_frame_length_adjustment(struct dwc3 *dwc) 290db2be4e9SNikhil Badola { 291db2be4e9SNikhil Badola u32 reg; 292db2be4e9SNikhil Badola u32 dft; 293db2be4e9SNikhil Badola 294db2be4e9SNikhil Badola if (dwc->revision < DWC3_REVISION_250A) 295db2be4e9SNikhil Badola return; 296db2be4e9SNikhil Badola 297bcdb3272SFelipe Balbi if (dwc->fladj == 0) 298db2be4e9SNikhil Badola return; 299db2be4e9SNikhil Badola 300db2be4e9SNikhil Badola reg = dwc3_readl(dwc->regs, DWC3_GFLADJ); 301db2be4e9SNikhil Badola dft = reg & DWC3_GFLADJ_30MHZ_MASK; 302bcdb3272SFelipe Balbi if (!dev_WARN_ONCE(dwc->dev, dft == dwc->fladj, 303db2be4e9SNikhil Badola "request value same as default, ignoring\n")) { 304db2be4e9SNikhil Badola reg &= ~DWC3_GFLADJ_30MHZ_MASK; 305bcdb3272SFelipe Balbi reg |= DWC3_GFLADJ_30MHZ_SDBND_SEL | dwc->fladj; 306db2be4e9SNikhil Badola dwc3_writel(dwc->regs, DWC3_GFLADJ, reg); 307db2be4e9SNikhil Badola } 308db2be4e9SNikhil Badola } 309db2be4e9SNikhil Badola 310c5cc74e8SHeikki Krogerus /** 31172246da4SFelipe Balbi * dwc3_free_one_event_buffer - Frees one event buffer 31272246da4SFelipe Balbi * @dwc: Pointer to our controller context structure 31372246da4SFelipe Balbi * @evt: Pointer to event buffer to be freed 31472246da4SFelipe Balbi */ 31572246da4SFelipe Balbi static void dwc3_free_one_event_buffer(struct dwc3 *dwc, 31672246da4SFelipe Balbi struct dwc3_event_buffer *evt) 31772246da4SFelipe Balbi { 318d64ff406SArnd Bergmann dma_free_coherent(dwc->sysdev, evt->length, evt->buf, evt->dma); 31972246da4SFelipe Balbi } 32072246da4SFelipe Balbi 32172246da4SFelipe Balbi /** 3221d046793SPaul Zimmerman * dwc3_alloc_one_event_buffer - Allocates one event buffer structure 32372246da4SFelipe Balbi * @dwc: Pointer to our controller context structure 32472246da4SFelipe Balbi * @length: size of the event buffer 32572246da4SFelipe Balbi * 3261d046793SPaul Zimmerman * Returns a pointer to the allocated event buffer structure on success 32772246da4SFelipe Balbi * otherwise ERR_PTR(errno). 32872246da4SFelipe Balbi */ 32967d0b500SFelipe Balbi static struct dwc3_event_buffer *dwc3_alloc_one_event_buffer(struct dwc3 *dwc, 33067d0b500SFelipe Balbi unsigned length) 33172246da4SFelipe Balbi { 33272246da4SFelipe Balbi struct dwc3_event_buffer *evt; 33372246da4SFelipe Balbi 334380f0d28SFelipe Balbi evt = devm_kzalloc(dwc->dev, sizeof(*evt), GFP_KERNEL); 33572246da4SFelipe Balbi if (!evt) 33672246da4SFelipe Balbi return ERR_PTR(-ENOMEM); 33772246da4SFelipe Balbi 33872246da4SFelipe Balbi evt->dwc = dwc; 33972246da4SFelipe Balbi evt->length = length; 340d9fa4c63SJohn Youn evt->cache = devm_kzalloc(dwc->dev, length, GFP_KERNEL); 341d9fa4c63SJohn Youn if (!evt->cache) 342d9fa4c63SJohn Youn return ERR_PTR(-ENOMEM); 343d9fa4c63SJohn Youn 344d64ff406SArnd Bergmann evt->buf = dma_alloc_coherent(dwc->sysdev, length, 34572246da4SFelipe Balbi &evt->dma, GFP_KERNEL); 346e32672f0SFelipe Balbi if (!evt->buf) 34772246da4SFelipe Balbi return ERR_PTR(-ENOMEM); 34872246da4SFelipe Balbi 34972246da4SFelipe Balbi return evt; 35072246da4SFelipe Balbi } 35172246da4SFelipe Balbi 35272246da4SFelipe Balbi /** 35372246da4SFelipe Balbi * dwc3_free_event_buffers - frees all allocated event buffers 35472246da4SFelipe Balbi * @dwc: Pointer to our controller context structure 35572246da4SFelipe Balbi */ 35672246da4SFelipe Balbi static void dwc3_free_event_buffers(struct dwc3 *dwc) 35772246da4SFelipe Balbi { 35872246da4SFelipe Balbi struct dwc3_event_buffer *evt; 35972246da4SFelipe Balbi 360696c8b12SFelipe Balbi evt = dwc->ev_buf; 36164b6c8a7SAnton Tikhomirov if (evt) 36272246da4SFelipe Balbi dwc3_free_one_event_buffer(dwc, evt); 36372246da4SFelipe Balbi } 36472246da4SFelipe Balbi 36572246da4SFelipe Balbi /** 36672246da4SFelipe Balbi * dwc3_alloc_event_buffers - Allocates @num event buffers of size @length 3671d046793SPaul Zimmerman * @dwc: pointer to our controller context structure 36872246da4SFelipe Balbi * @length: size of event buffer 36972246da4SFelipe Balbi * 3701d046793SPaul Zimmerman * Returns 0 on success otherwise negative errno. In the error case, dwc 37172246da4SFelipe Balbi * may contain some buffers allocated but not all which were requested. 37272246da4SFelipe Balbi */ 37341ac7b3aSBill Pemberton static int dwc3_alloc_event_buffers(struct dwc3 *dwc, unsigned length) 37472246da4SFelipe Balbi { 37572246da4SFelipe Balbi struct dwc3_event_buffer *evt; 37672246da4SFelipe Balbi 37772246da4SFelipe Balbi evt = dwc3_alloc_one_event_buffer(dwc, length); 37872246da4SFelipe Balbi if (IS_ERR(evt)) { 37972246da4SFelipe Balbi dev_err(dwc->dev, "can't allocate event buffer\n"); 38072246da4SFelipe Balbi return PTR_ERR(evt); 38172246da4SFelipe Balbi } 382696c8b12SFelipe Balbi dwc->ev_buf = evt; 38372246da4SFelipe Balbi 38472246da4SFelipe Balbi return 0; 38572246da4SFelipe Balbi } 38672246da4SFelipe Balbi 38772246da4SFelipe Balbi /** 38872246da4SFelipe Balbi * dwc3_event_buffers_setup - setup our allocated event buffers 3891d046793SPaul Zimmerman * @dwc: pointer to our controller context structure 39072246da4SFelipe Balbi * 39172246da4SFelipe Balbi * Returns 0 on success otherwise negative errno. 39272246da4SFelipe Balbi */ 393f09cc79bSRoger Quadros int dwc3_event_buffers_setup(struct dwc3 *dwc) 39472246da4SFelipe Balbi { 39572246da4SFelipe Balbi struct dwc3_event_buffer *evt; 39672246da4SFelipe Balbi 397696c8b12SFelipe Balbi evt = dwc->ev_buf; 3987acd85e0SPaul Zimmerman evt->lpos = 0; 399660e9bdeSFelipe Balbi dwc3_writel(dwc->regs, DWC3_GEVNTADRLO(0), 40072246da4SFelipe Balbi lower_32_bits(evt->dma)); 401660e9bdeSFelipe Balbi dwc3_writel(dwc->regs, DWC3_GEVNTADRHI(0), 40272246da4SFelipe Balbi upper_32_bits(evt->dma)); 403660e9bdeSFelipe Balbi dwc3_writel(dwc->regs, DWC3_GEVNTSIZ(0), 40468d6a01bSFelipe Balbi DWC3_GEVNTSIZ_SIZE(evt->length)); 405660e9bdeSFelipe Balbi dwc3_writel(dwc->regs, DWC3_GEVNTCOUNT(0), 0); 40672246da4SFelipe Balbi 40772246da4SFelipe Balbi return 0; 40872246da4SFelipe Balbi } 40972246da4SFelipe Balbi 410f09cc79bSRoger Quadros void dwc3_event_buffers_cleanup(struct dwc3 *dwc) 41172246da4SFelipe Balbi { 41272246da4SFelipe Balbi struct dwc3_event_buffer *evt; 41372246da4SFelipe Balbi 414696c8b12SFelipe Balbi evt = dwc->ev_buf; 4157acd85e0SPaul Zimmerman 4167acd85e0SPaul Zimmerman evt->lpos = 0; 4177acd85e0SPaul Zimmerman 418660e9bdeSFelipe Balbi dwc3_writel(dwc->regs, DWC3_GEVNTADRLO(0), 0); 419660e9bdeSFelipe Balbi dwc3_writel(dwc->regs, DWC3_GEVNTADRHI(0), 0); 420660e9bdeSFelipe Balbi dwc3_writel(dwc->regs, DWC3_GEVNTSIZ(0), DWC3_GEVNTSIZ_INTMASK 42168d6a01bSFelipe Balbi | DWC3_GEVNTSIZ_SIZE(0)); 422660e9bdeSFelipe Balbi dwc3_writel(dwc->regs, DWC3_GEVNTCOUNT(0), 0); 42372246da4SFelipe Balbi } 42472246da4SFelipe Balbi 4250ffcaf37SFelipe Balbi static int dwc3_alloc_scratch_buffers(struct dwc3 *dwc) 4260ffcaf37SFelipe Balbi { 4270ffcaf37SFelipe Balbi if (!dwc->has_hibernation) 4280ffcaf37SFelipe Balbi return 0; 4290ffcaf37SFelipe Balbi 4300ffcaf37SFelipe Balbi if (!dwc->nr_scratch) 4310ffcaf37SFelipe Balbi return 0; 4320ffcaf37SFelipe Balbi 4330ffcaf37SFelipe Balbi dwc->scratchbuf = kmalloc_array(dwc->nr_scratch, 4340ffcaf37SFelipe Balbi DWC3_SCRATCHBUF_SIZE, GFP_KERNEL); 4350ffcaf37SFelipe Balbi if (!dwc->scratchbuf) 4360ffcaf37SFelipe Balbi return -ENOMEM; 4370ffcaf37SFelipe Balbi 4380ffcaf37SFelipe Balbi return 0; 4390ffcaf37SFelipe Balbi } 4400ffcaf37SFelipe Balbi 4410ffcaf37SFelipe Balbi static int dwc3_setup_scratch_buffers(struct dwc3 *dwc) 4420ffcaf37SFelipe Balbi { 4430ffcaf37SFelipe Balbi dma_addr_t scratch_addr; 4440ffcaf37SFelipe Balbi u32 param; 4450ffcaf37SFelipe Balbi int ret; 4460ffcaf37SFelipe Balbi 4470ffcaf37SFelipe Balbi if (!dwc->has_hibernation) 4480ffcaf37SFelipe Balbi return 0; 4490ffcaf37SFelipe Balbi 4500ffcaf37SFelipe Balbi if (!dwc->nr_scratch) 4510ffcaf37SFelipe Balbi return 0; 4520ffcaf37SFelipe Balbi 4530ffcaf37SFelipe Balbi /* should never fall here */ 4540ffcaf37SFelipe Balbi if (!WARN_ON(dwc->scratchbuf)) 4550ffcaf37SFelipe Balbi return 0; 4560ffcaf37SFelipe Balbi 457d64ff406SArnd Bergmann scratch_addr = dma_map_single(dwc->sysdev, dwc->scratchbuf, 4580ffcaf37SFelipe Balbi dwc->nr_scratch * DWC3_SCRATCHBUF_SIZE, 4590ffcaf37SFelipe Balbi DMA_BIDIRECTIONAL); 460d64ff406SArnd Bergmann if (dma_mapping_error(dwc->sysdev, scratch_addr)) { 461d64ff406SArnd Bergmann dev_err(dwc->sysdev, "failed to map scratch buffer\n"); 4620ffcaf37SFelipe Balbi ret = -EFAULT; 4630ffcaf37SFelipe Balbi goto err0; 4640ffcaf37SFelipe Balbi } 4650ffcaf37SFelipe Balbi 4660ffcaf37SFelipe Balbi dwc->scratch_addr = scratch_addr; 4670ffcaf37SFelipe Balbi 4680ffcaf37SFelipe Balbi param = lower_32_bits(scratch_addr); 4690ffcaf37SFelipe Balbi 4700ffcaf37SFelipe Balbi ret = dwc3_send_gadget_generic_command(dwc, 4710ffcaf37SFelipe Balbi DWC3_DGCMD_SET_SCRATCHPAD_ADDR_LO, param); 4720ffcaf37SFelipe Balbi if (ret < 0) 4730ffcaf37SFelipe Balbi goto err1; 4740ffcaf37SFelipe Balbi 4750ffcaf37SFelipe Balbi param = upper_32_bits(scratch_addr); 4760ffcaf37SFelipe Balbi 4770ffcaf37SFelipe Balbi ret = dwc3_send_gadget_generic_command(dwc, 4780ffcaf37SFelipe Balbi DWC3_DGCMD_SET_SCRATCHPAD_ADDR_HI, param); 4790ffcaf37SFelipe Balbi if (ret < 0) 4800ffcaf37SFelipe Balbi goto err1; 4810ffcaf37SFelipe Balbi 4820ffcaf37SFelipe Balbi return 0; 4830ffcaf37SFelipe Balbi 4840ffcaf37SFelipe Balbi err1: 485d64ff406SArnd Bergmann dma_unmap_single(dwc->sysdev, dwc->scratch_addr, dwc->nr_scratch * 4860ffcaf37SFelipe Balbi DWC3_SCRATCHBUF_SIZE, DMA_BIDIRECTIONAL); 4870ffcaf37SFelipe Balbi 4880ffcaf37SFelipe Balbi err0: 4890ffcaf37SFelipe Balbi return ret; 4900ffcaf37SFelipe Balbi } 4910ffcaf37SFelipe Balbi 4920ffcaf37SFelipe Balbi static void dwc3_free_scratch_buffers(struct dwc3 *dwc) 4930ffcaf37SFelipe Balbi { 4940ffcaf37SFelipe Balbi if (!dwc->has_hibernation) 4950ffcaf37SFelipe Balbi return; 4960ffcaf37SFelipe Balbi 4970ffcaf37SFelipe Balbi if (!dwc->nr_scratch) 4980ffcaf37SFelipe Balbi return; 4990ffcaf37SFelipe Balbi 5000ffcaf37SFelipe Balbi /* should never fall here */ 5010ffcaf37SFelipe Balbi if (!WARN_ON(dwc->scratchbuf)) 5020ffcaf37SFelipe Balbi return; 5030ffcaf37SFelipe Balbi 504d64ff406SArnd Bergmann dma_unmap_single(dwc->sysdev, dwc->scratch_addr, dwc->nr_scratch * 5050ffcaf37SFelipe Balbi DWC3_SCRATCHBUF_SIZE, DMA_BIDIRECTIONAL); 5060ffcaf37SFelipe Balbi kfree(dwc->scratchbuf); 5070ffcaf37SFelipe Balbi } 5080ffcaf37SFelipe Balbi 509789451f6SFelipe Balbi static void dwc3_core_num_eps(struct dwc3 *dwc) 510789451f6SFelipe Balbi { 511789451f6SFelipe Balbi struct dwc3_hwparams *parms = &dwc->hwparams; 512789451f6SFelipe Balbi 51347d3946eSBryan O'Donoghue dwc->num_eps = DWC3_NUM_EPS(parms); 514789451f6SFelipe Balbi } 515789451f6SFelipe Balbi 51641ac7b3aSBill Pemberton static void dwc3_cache_hwparams(struct dwc3 *dwc) 51726ceca97SFelipe Balbi { 51826ceca97SFelipe Balbi struct dwc3_hwparams *parms = &dwc->hwparams; 51926ceca97SFelipe Balbi 52026ceca97SFelipe Balbi parms->hwparams0 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS0); 52126ceca97SFelipe Balbi parms->hwparams1 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS1); 52226ceca97SFelipe Balbi parms->hwparams2 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS2); 52326ceca97SFelipe Balbi parms->hwparams3 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS3); 52426ceca97SFelipe Balbi parms->hwparams4 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS4); 52526ceca97SFelipe Balbi parms->hwparams5 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS5); 52626ceca97SFelipe Balbi parms->hwparams6 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS6); 52726ceca97SFelipe Balbi parms->hwparams7 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS7); 52826ceca97SFelipe Balbi parms->hwparams8 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS8); 52926ceca97SFelipe Balbi } 53026ceca97SFelipe Balbi 53198112041SRoger Quadros static int dwc3_core_ulpi_init(struct dwc3 *dwc) 53298112041SRoger Quadros { 53398112041SRoger Quadros int intf; 53498112041SRoger Quadros int ret = 0; 53598112041SRoger Quadros 53698112041SRoger Quadros intf = DWC3_GHWPARAMS3_HSPHY_IFC(dwc->hwparams.hwparams3); 53798112041SRoger Quadros 53898112041SRoger Quadros if (intf == DWC3_GHWPARAMS3_HSPHY_IFC_ULPI || 53998112041SRoger Quadros (intf == DWC3_GHWPARAMS3_HSPHY_IFC_UTMI_ULPI && 54098112041SRoger Quadros dwc->hsphy_interface && 54198112041SRoger Quadros !strncmp(dwc->hsphy_interface, "ulpi", 4))) 54298112041SRoger Quadros ret = dwc3_ulpi_init(dwc); 54398112041SRoger Quadros 54498112041SRoger Quadros return ret; 54598112041SRoger Quadros } 54698112041SRoger Quadros 54772246da4SFelipe Balbi /** 548b5a65c40SHuang Rui * dwc3_phy_setup - Configure USB PHY Interface of DWC3 Core 549b5a65c40SHuang Rui * @dwc: Pointer to our controller context structure 55088bc9d19SHeikki Krogerus * 55188bc9d19SHeikki Krogerus * Returns 0 on success. The USB PHY interfaces are configured but not 55288bc9d19SHeikki Krogerus * initialized. The PHY interfaces and the PHYs get initialized together with 55388bc9d19SHeikki Krogerus * the core in dwc3_core_init. 554b5a65c40SHuang Rui */ 55588bc9d19SHeikki Krogerus static int dwc3_phy_setup(struct dwc3 *dwc) 556b5a65c40SHuang Rui { 557b5a65c40SHuang Rui u32 reg; 558b5a65c40SHuang Rui 559b5a65c40SHuang Rui reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0)); 560b5a65c40SHuang Rui 5612164a476SHuang Rui /* 5621966b865SFelipe Balbi * Make sure UX_EXIT_PX is cleared as that causes issues with some 5631966b865SFelipe Balbi * PHYs. Also, this bit is not supposed to be used in normal operation. 5641966b865SFelipe Balbi */ 5651966b865SFelipe Balbi reg &= ~DWC3_GUSB3PIPECTL_UX_EXIT_PX; 5661966b865SFelipe Balbi 5671966b865SFelipe Balbi /* 5682164a476SHuang Rui * Above 1.94a, it is recommended to set DWC3_GUSB3PIPECTL_SUSPHY 5692164a476SHuang Rui * to '0' during coreConsultant configuration. So default value 5702164a476SHuang Rui * will be '0' when the core is reset. Application needs to set it 5712164a476SHuang Rui * to '1' after the core initialization is completed. 5722164a476SHuang Rui */ 5732164a476SHuang Rui if (dwc->revision > DWC3_REVISION_194A) 5742164a476SHuang Rui reg |= DWC3_GUSB3PIPECTL_SUSPHY; 5752164a476SHuang Rui 576b5a65c40SHuang Rui if (dwc->u2ss_inp3_quirk) 577b5a65c40SHuang Rui reg |= DWC3_GUSB3PIPECTL_U2SSINP3OK; 578b5a65c40SHuang Rui 579e58dd357SRajesh Bhagat if (dwc->dis_rxdet_inp3_quirk) 580e58dd357SRajesh Bhagat reg |= DWC3_GUSB3PIPECTL_DISRXDETINP3; 581e58dd357SRajesh Bhagat 582df31f5b3SHuang Rui if (dwc->req_p1p2p3_quirk) 583df31f5b3SHuang Rui reg |= DWC3_GUSB3PIPECTL_REQP1P2P3; 584df31f5b3SHuang Rui 585a2a1d0f5SHuang Rui if (dwc->del_p1p2p3_quirk) 586a2a1d0f5SHuang Rui reg |= DWC3_GUSB3PIPECTL_DEP1P2P3_EN; 587a2a1d0f5SHuang Rui 58841c06ffdSHuang Rui if (dwc->del_phy_power_chg_quirk) 58941c06ffdSHuang Rui reg |= DWC3_GUSB3PIPECTL_DEPOCHANGE; 59041c06ffdSHuang Rui 591fb67afcaSHuang Rui if (dwc->lfps_filter_quirk) 592fb67afcaSHuang Rui reg |= DWC3_GUSB3PIPECTL_LFPSFILT; 593fb67afcaSHuang Rui 59414f4ac53SHuang Rui if (dwc->rx_detect_poll_quirk) 59514f4ac53SHuang Rui reg |= DWC3_GUSB3PIPECTL_RX_DETOPOLL; 59614f4ac53SHuang Rui 5976b6a0c9aSHuang Rui if (dwc->tx_de_emphasis_quirk) 5986b6a0c9aSHuang Rui reg |= DWC3_GUSB3PIPECTL_TX_DEEPH(dwc->tx_de_emphasis); 5996b6a0c9aSHuang Rui 600cd72f890SFelipe Balbi if (dwc->dis_u3_susphy_quirk) 60159acfa20SHuang Rui reg &= ~DWC3_GUSB3PIPECTL_SUSPHY; 60259acfa20SHuang Rui 60300fe081dSWilliam Wu if (dwc->dis_del_phy_power_chg_quirk) 60400fe081dSWilliam Wu reg &= ~DWC3_GUSB3PIPECTL_DEPOCHANGE; 60500fe081dSWilliam Wu 606b5a65c40SHuang Rui dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg); 607b5a65c40SHuang Rui 6082164a476SHuang Rui reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0)); 6092164a476SHuang Rui 6103e10a2ceSHeikki Krogerus /* Select the HS PHY interface */ 6113e10a2ceSHeikki Krogerus switch (DWC3_GHWPARAMS3_HSPHY_IFC(dwc->hwparams.hwparams3)) { 6123e10a2ceSHeikki Krogerus case DWC3_GHWPARAMS3_HSPHY_IFC_UTMI_ULPI: 61343cacb03SFelipe Balbi if (dwc->hsphy_interface && 61443cacb03SFelipe Balbi !strncmp(dwc->hsphy_interface, "utmi", 4)) { 6153e10a2ceSHeikki Krogerus reg &= ~DWC3_GUSB2PHYCFG_ULPI_UTMI; 61688bc9d19SHeikki Krogerus break; 61743cacb03SFelipe Balbi } else if (dwc->hsphy_interface && 61843cacb03SFelipe Balbi !strncmp(dwc->hsphy_interface, "ulpi", 4)) { 6193e10a2ceSHeikki Krogerus reg |= DWC3_GUSB2PHYCFG_ULPI_UTMI; 62088bc9d19SHeikki Krogerus dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); 6213e10a2ceSHeikki Krogerus } else { 62288bc9d19SHeikki Krogerus /* Relying on default value. */ 62388bc9d19SHeikki Krogerus if (!(reg & DWC3_GUSB2PHYCFG_ULPI_UTMI)) 6243e10a2ceSHeikki Krogerus break; 6253e10a2ceSHeikki Krogerus } 6263e10a2ceSHeikki Krogerus /* FALLTHROUGH */ 62788bc9d19SHeikki Krogerus case DWC3_GHWPARAMS3_HSPHY_IFC_ULPI: 62888bc9d19SHeikki Krogerus /* FALLTHROUGH */ 6293e10a2ceSHeikki Krogerus default: 6303e10a2ceSHeikki Krogerus break; 6313e10a2ceSHeikki Krogerus } 6323e10a2ceSHeikki Krogerus 63332f2ed86SWilliam Wu switch (dwc->hsphy_mode) { 63432f2ed86SWilliam Wu case USBPHY_INTERFACE_MODE_UTMI: 63532f2ed86SWilliam Wu reg &= ~(DWC3_GUSB2PHYCFG_PHYIF_MASK | 63632f2ed86SWilliam Wu DWC3_GUSB2PHYCFG_USBTRDTIM_MASK); 63732f2ed86SWilliam Wu reg |= DWC3_GUSB2PHYCFG_PHYIF(UTMI_PHYIF_8_BIT) | 63832f2ed86SWilliam Wu DWC3_GUSB2PHYCFG_USBTRDTIM(USBTRDTIM_UTMI_8_BIT); 63932f2ed86SWilliam Wu break; 64032f2ed86SWilliam Wu case USBPHY_INTERFACE_MODE_UTMIW: 64132f2ed86SWilliam Wu reg &= ~(DWC3_GUSB2PHYCFG_PHYIF_MASK | 64232f2ed86SWilliam Wu DWC3_GUSB2PHYCFG_USBTRDTIM_MASK); 64332f2ed86SWilliam Wu reg |= DWC3_GUSB2PHYCFG_PHYIF(UTMI_PHYIF_16_BIT) | 64432f2ed86SWilliam Wu DWC3_GUSB2PHYCFG_USBTRDTIM(USBTRDTIM_UTMI_16_BIT); 64532f2ed86SWilliam Wu break; 64632f2ed86SWilliam Wu default: 64732f2ed86SWilliam Wu break; 64832f2ed86SWilliam Wu } 64932f2ed86SWilliam Wu 6502164a476SHuang Rui /* 6512164a476SHuang Rui * Above 1.94a, it is recommended to set DWC3_GUSB2PHYCFG_SUSPHY to 6522164a476SHuang Rui * '0' during coreConsultant configuration. So default value will 6532164a476SHuang Rui * be '0' when the core is reset. Application needs to set it to 6542164a476SHuang Rui * '1' after the core initialization is completed. 6552164a476SHuang Rui */ 6562164a476SHuang Rui if (dwc->revision > DWC3_REVISION_194A) 6572164a476SHuang Rui reg |= DWC3_GUSB2PHYCFG_SUSPHY; 6582164a476SHuang Rui 659cd72f890SFelipe Balbi if (dwc->dis_u2_susphy_quirk) 6600effe0a3SHuang Rui reg &= ~DWC3_GUSB2PHYCFG_SUSPHY; 6610effe0a3SHuang Rui 662ec791d14SJohn Youn if (dwc->dis_enblslpm_quirk) 663ec791d14SJohn Youn reg &= ~DWC3_GUSB2PHYCFG_ENBLSLPM; 664eafeacf1SThinh Nguyen else 665eafeacf1SThinh Nguyen reg |= DWC3_GUSB2PHYCFG_ENBLSLPM; 666ec791d14SJohn Youn 66716199f33SWilliam Wu if (dwc->dis_u2_freeclk_exists_quirk) 66816199f33SWilliam Wu reg &= ~DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS; 66916199f33SWilliam Wu 6702164a476SHuang Rui dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); 67188bc9d19SHeikki Krogerus 67288bc9d19SHeikki Krogerus return 0; 673b5a65c40SHuang Rui } 674b5a65c40SHuang Rui 675c499ff71SFelipe Balbi static void dwc3_core_exit(struct dwc3 *dwc) 676c499ff71SFelipe Balbi { 677c499ff71SFelipe Balbi dwc3_event_buffers_cleanup(dwc); 678c499ff71SFelipe Balbi 679c499ff71SFelipe Balbi usb_phy_shutdown(dwc->usb2_phy); 680c499ff71SFelipe Balbi usb_phy_shutdown(dwc->usb3_phy); 681c499ff71SFelipe Balbi phy_exit(dwc->usb2_generic_phy); 682c499ff71SFelipe Balbi phy_exit(dwc->usb3_generic_phy); 683c499ff71SFelipe Balbi 684c499ff71SFelipe Balbi usb_phy_set_suspend(dwc->usb2_phy, 1); 685c499ff71SFelipe Balbi usb_phy_set_suspend(dwc->usb3_phy, 1); 686c499ff71SFelipe Balbi phy_power_off(dwc->usb2_generic_phy); 687c499ff71SFelipe Balbi phy_power_off(dwc->usb3_generic_phy); 688fe8abf33SMasahiro Yamada clk_bulk_disable(dwc->num_clks, dwc->clks); 689fe8abf33SMasahiro Yamada clk_bulk_unprepare(dwc->num_clks, dwc->clks); 690fe8abf33SMasahiro Yamada reset_control_assert(dwc->reset); 691c499ff71SFelipe Balbi } 692c499ff71SFelipe Balbi 6930759956fSFelipe Balbi static bool dwc3_core_is_valid(struct dwc3 *dwc) 69472246da4SFelipe Balbi { 69572246da4SFelipe Balbi u32 reg; 69672246da4SFelipe Balbi 6977650bd74SSebastian Andrzej Siewior reg = dwc3_readl(dwc->regs, DWC3_GSNPSID); 6980759956fSFelipe Balbi 6997650bd74SSebastian Andrzej Siewior /* This should read as U3 followed by revision number */ 700690fb371SJohn Youn if ((reg & DWC3_GSNPSID_MASK) == 0x55330000) { 701690fb371SJohn Youn /* Detected DWC_usb3 IP */ 702690fb371SJohn Youn dwc->revision = reg; 703690fb371SJohn Youn } else if ((reg & DWC3_GSNPSID_MASK) == 0x33310000) { 704690fb371SJohn Youn /* Detected DWC_usb31 IP */ 705690fb371SJohn Youn dwc->revision = dwc3_readl(dwc->regs, DWC3_VER_NUMBER); 706690fb371SJohn Youn dwc->revision |= DWC3_REVISION_IS_DWC31; 707690fb371SJohn Youn } else { 7080759956fSFelipe Balbi return false; 7097650bd74SSebastian Andrzej Siewior } 7107650bd74SSebastian Andrzej Siewior 7110759956fSFelipe Balbi return true; 7120e1e5c47SPaul Zimmerman } 7130e1e5c47SPaul Zimmerman 714941f918eSFelipe Balbi static void dwc3_core_setup_global_control(struct dwc3 *dwc) 71572246da4SFelipe Balbi { 71672246da4SFelipe Balbi u32 hwparams4 = dwc->hwparams.hwparams4; 71772246da4SFelipe Balbi u32 reg; 718c499ff71SFelipe Balbi 7194878a028SSebastian Andrzej Siewior reg = dwc3_readl(dwc->regs, DWC3_GCTL); 7203e87c42aSPaul Zimmerman reg &= ~DWC3_GCTL_SCALEDOWN_MASK; 7214878a028SSebastian Andrzej Siewior 722164d7731SSebastian Andrzej Siewior switch (DWC3_GHWPARAMS1_EN_PWROPT(dwc->hwparams.hwparams1)) { 7234878a028SSebastian Andrzej Siewior case DWC3_GHWPARAMS1_EN_PWROPT_CLK: 72432a4a135SFelipe Balbi /** 72532a4a135SFelipe Balbi * WORKAROUND: DWC3 revisions between 2.10a and 2.50a have an 72632a4a135SFelipe Balbi * issue which would cause xHCI compliance tests to fail. 72732a4a135SFelipe Balbi * 72832a4a135SFelipe Balbi * Because of that we cannot enable clock gating on such 72932a4a135SFelipe Balbi * configurations. 73032a4a135SFelipe Balbi * 73132a4a135SFelipe Balbi * Refers to: 73232a4a135SFelipe Balbi * 73332a4a135SFelipe Balbi * STAR#9000588375: Clock Gating, SOF Issues when ref_clk-Based 73432a4a135SFelipe Balbi * SOF/ITP Mode Used 73532a4a135SFelipe Balbi */ 73632a4a135SFelipe Balbi if ((dwc->dr_mode == USB_DR_MODE_HOST || 73732a4a135SFelipe Balbi dwc->dr_mode == USB_DR_MODE_OTG) && 73832a4a135SFelipe Balbi (dwc->revision >= DWC3_REVISION_210A && 73932a4a135SFelipe Balbi dwc->revision <= DWC3_REVISION_250A)) 74032a4a135SFelipe Balbi reg |= DWC3_GCTL_DSBLCLKGTNG | DWC3_GCTL_SOFITPSYNC; 74132a4a135SFelipe Balbi else 7424878a028SSebastian Andrzej Siewior reg &= ~DWC3_GCTL_DSBLCLKGTNG; 7434878a028SSebastian Andrzej Siewior break; 7440ffcaf37SFelipe Balbi case DWC3_GHWPARAMS1_EN_PWROPT_HIB: 7450ffcaf37SFelipe Balbi /* enable hibernation here */ 7460ffcaf37SFelipe Balbi dwc->nr_scratch = DWC3_GHWPARAMS4_HIBER_SCRATCHBUFS(hwparams4); 7472eac3992SHuang Rui 7482eac3992SHuang Rui /* 7492eac3992SHuang Rui * REVISIT Enabling this bit so that host-mode hibernation 7502eac3992SHuang Rui * will work. Device-mode hibernation is not yet implemented. 7512eac3992SHuang Rui */ 7522eac3992SHuang Rui reg |= DWC3_GCTL_GBLHIBERNATIONEN; 7530ffcaf37SFelipe Balbi break; 7544878a028SSebastian Andrzej Siewior default: 7555eb30cedSFelipe Balbi /* nothing */ 7565eb30cedSFelipe Balbi break; 7574878a028SSebastian Andrzej Siewior } 7584878a028SSebastian Andrzej Siewior 759946bd579SHuang Rui /* check if current dwc3 is on simulation board */ 760946bd579SHuang Rui if (dwc->hwparams.hwparams6 & DWC3_GHWPARAMS6_EN_FPGA) { 7616af19fd1SFaisal Mehmood dev_info(dwc->dev, "Running with FPGA optimizations\n"); 762946bd579SHuang Rui dwc->is_fpga = true; 763946bd579SHuang Rui } 764946bd579SHuang Rui 7653b81221aSHuang Rui WARN_ONCE(dwc->disable_scramble_quirk && !dwc->is_fpga, 7663b81221aSHuang Rui "disable_scramble cannot be used on non-FPGA builds\n"); 7673b81221aSHuang Rui 7683b81221aSHuang Rui if (dwc->disable_scramble_quirk && dwc->is_fpga) 7693b81221aSHuang Rui reg |= DWC3_GCTL_DISSCRAMBLE; 7703b81221aSHuang Rui else 7713b81221aSHuang Rui reg &= ~DWC3_GCTL_DISSCRAMBLE; 7723b81221aSHuang Rui 7739a5b2f31SHuang Rui if (dwc->u2exit_lfps_quirk) 7749a5b2f31SHuang Rui reg |= DWC3_GCTL_U2EXIT_LFPS; 7759a5b2f31SHuang Rui 7764878a028SSebastian Andrzej Siewior /* 7774878a028SSebastian Andrzej Siewior * WORKAROUND: DWC3 revisions <1.90a have a bug 7781d046793SPaul Zimmerman * where the device can fail to connect at SuperSpeed 7794878a028SSebastian Andrzej Siewior * and falls back to high-speed mode which causes 7801d046793SPaul Zimmerman * the device to enter a Connect/Disconnect loop 7814878a028SSebastian Andrzej Siewior */ 7824878a028SSebastian Andrzej Siewior if (dwc->revision < DWC3_REVISION_190A) 7834878a028SSebastian Andrzej Siewior reg |= DWC3_GCTL_U2RSTECN; 7844878a028SSebastian Andrzej Siewior 7854878a028SSebastian Andrzej Siewior dwc3_writel(dwc->regs, DWC3_GCTL, reg); 786941f918eSFelipe Balbi } 7874878a028SSebastian Andrzej Siewior 788f54edb53SFelipe Balbi static int dwc3_core_get_phy(struct dwc3 *dwc); 78998112041SRoger Quadros static int dwc3_core_ulpi_init(struct dwc3 *dwc); 790f54edb53SFelipe Balbi 791d9612c2fSPengbo Mu /* set global incr burst type configuration registers */ 792d9612c2fSPengbo Mu static void dwc3_set_incr_burst_type(struct dwc3 *dwc) 793d9612c2fSPengbo Mu { 794d9612c2fSPengbo Mu struct device *dev = dwc->dev; 795d9612c2fSPengbo Mu /* incrx_mode : for INCR burst type. */ 796d9612c2fSPengbo Mu bool incrx_mode; 797d9612c2fSPengbo Mu /* incrx_size : for size of INCRX burst. */ 798d9612c2fSPengbo Mu u32 incrx_size; 799d9612c2fSPengbo Mu u32 *vals; 800d9612c2fSPengbo Mu u32 cfg; 801d9612c2fSPengbo Mu int ntype; 802d9612c2fSPengbo Mu int ret; 803d9612c2fSPengbo Mu int i; 804d9612c2fSPengbo Mu 805d9612c2fSPengbo Mu cfg = dwc3_readl(dwc->regs, DWC3_GSBUSCFG0); 806d9612c2fSPengbo Mu 807d9612c2fSPengbo Mu /* 808d9612c2fSPengbo Mu * Handle property "snps,incr-burst-type-adjustment". 809d9612c2fSPengbo Mu * Get the number of value from this property: 810d9612c2fSPengbo Mu * result <= 0, means this property is not supported. 811d9612c2fSPengbo Mu * result = 1, means INCRx burst mode supported. 812d9612c2fSPengbo Mu * result > 1, means undefined length burst mode supported. 813d9612c2fSPengbo Mu */ 814d9612c2fSPengbo Mu ntype = device_property_read_u32_array(dev, 815d9612c2fSPengbo Mu "snps,incr-burst-type-adjustment", NULL, 0); 816d9612c2fSPengbo Mu if (ntype <= 0) 817d9612c2fSPengbo Mu return; 818d9612c2fSPengbo Mu 819d9612c2fSPengbo Mu vals = kcalloc(ntype, sizeof(u32), GFP_KERNEL); 820d9612c2fSPengbo Mu if (!vals) { 821d9612c2fSPengbo Mu dev_err(dev, "Error to get memory\n"); 822d9612c2fSPengbo Mu return; 823d9612c2fSPengbo Mu } 824d9612c2fSPengbo Mu 825d9612c2fSPengbo Mu /* Get INCR burst type, and parse it */ 826d9612c2fSPengbo Mu ret = device_property_read_u32_array(dev, 827d9612c2fSPengbo Mu "snps,incr-burst-type-adjustment", vals, ntype); 828d9612c2fSPengbo Mu if (ret) { 829d9612c2fSPengbo Mu dev_err(dev, "Error to get property\n"); 830d9612c2fSPengbo Mu return; 831d9612c2fSPengbo Mu } 832d9612c2fSPengbo Mu 833d9612c2fSPengbo Mu incrx_size = *vals; 834d9612c2fSPengbo Mu 835d9612c2fSPengbo Mu if (ntype > 1) { 836d9612c2fSPengbo Mu /* INCRX (undefined length) burst mode */ 837d9612c2fSPengbo Mu incrx_mode = INCRX_UNDEF_LENGTH_BURST_MODE; 838d9612c2fSPengbo Mu for (i = 1; i < ntype; i++) { 839d9612c2fSPengbo Mu if (vals[i] > incrx_size) 840d9612c2fSPengbo Mu incrx_size = vals[i]; 841d9612c2fSPengbo Mu } 842d9612c2fSPengbo Mu } else { 843d9612c2fSPengbo Mu /* INCRX burst mode */ 844d9612c2fSPengbo Mu incrx_mode = INCRX_BURST_MODE; 845d9612c2fSPengbo Mu } 846d9612c2fSPengbo Mu 847d9612c2fSPengbo Mu /* Enable Undefined Length INCR Burst and Enable INCRx Burst */ 848d9612c2fSPengbo Mu cfg &= ~DWC3_GSBUSCFG0_INCRBRST_MASK; 849d9612c2fSPengbo Mu if (incrx_mode) 850d9612c2fSPengbo Mu cfg |= DWC3_GSBUSCFG0_INCRBRSTENA; 851d9612c2fSPengbo Mu switch (incrx_size) { 852d9612c2fSPengbo Mu case 256: 853d9612c2fSPengbo Mu cfg |= DWC3_GSBUSCFG0_INCR256BRSTENA; 854d9612c2fSPengbo Mu break; 855d9612c2fSPengbo Mu case 128: 856d9612c2fSPengbo Mu cfg |= DWC3_GSBUSCFG0_INCR128BRSTENA; 857d9612c2fSPengbo Mu break; 858d9612c2fSPengbo Mu case 64: 859d9612c2fSPengbo Mu cfg |= DWC3_GSBUSCFG0_INCR64BRSTENA; 860d9612c2fSPengbo Mu break; 861d9612c2fSPengbo Mu case 32: 862d9612c2fSPengbo Mu cfg |= DWC3_GSBUSCFG0_INCR32BRSTENA; 863d9612c2fSPengbo Mu break; 864d9612c2fSPengbo Mu case 16: 865d9612c2fSPengbo Mu cfg |= DWC3_GSBUSCFG0_INCR16BRSTENA; 866d9612c2fSPengbo Mu break; 867d9612c2fSPengbo Mu case 8: 868d9612c2fSPengbo Mu cfg |= DWC3_GSBUSCFG0_INCR8BRSTENA; 869d9612c2fSPengbo Mu break; 870d9612c2fSPengbo Mu case 4: 871d9612c2fSPengbo Mu cfg |= DWC3_GSBUSCFG0_INCR4BRSTENA; 872d9612c2fSPengbo Mu break; 873d9612c2fSPengbo Mu case 1: 874d9612c2fSPengbo Mu break; 875d9612c2fSPengbo Mu default: 876d9612c2fSPengbo Mu dev_err(dev, "Invalid property\n"); 877d9612c2fSPengbo Mu break; 878d9612c2fSPengbo Mu } 879d9612c2fSPengbo Mu 880d9612c2fSPengbo Mu dwc3_writel(dwc->regs, DWC3_GSBUSCFG0, cfg); 881d9612c2fSPengbo Mu } 882d9612c2fSPengbo Mu 883941f918eSFelipe Balbi /** 884941f918eSFelipe Balbi * dwc3_core_init - Low-level initialization of DWC3 Core 885941f918eSFelipe Balbi * @dwc: Pointer to our controller context structure 886941f918eSFelipe Balbi * 887941f918eSFelipe Balbi * Returns 0 on success otherwise negative errno. 888941f918eSFelipe Balbi */ 889941f918eSFelipe Balbi static int dwc3_core_init(struct dwc3 *dwc) 890941f918eSFelipe Balbi { 891941f918eSFelipe Balbi u32 reg; 892941f918eSFelipe Balbi int ret; 893941f918eSFelipe Balbi 894941f918eSFelipe Balbi if (!dwc3_core_is_valid(dwc)) { 895941f918eSFelipe Balbi dev_err(dwc->dev, "this is not a DesignWare USB3 DRD Core\n"); 896941f918eSFelipe Balbi ret = -ENODEV; 897941f918eSFelipe Balbi goto err0; 898941f918eSFelipe Balbi } 899941f918eSFelipe Balbi 900941f918eSFelipe Balbi /* 901941f918eSFelipe Balbi * Write Linux Version Code to our GUID register so it's easy to figure 902941f918eSFelipe Balbi * out which kernel version a bug was found. 903941f918eSFelipe Balbi */ 904941f918eSFelipe Balbi dwc3_writel(dwc->regs, DWC3_GUID, LINUX_VERSION_CODE); 905941f918eSFelipe Balbi 906941f918eSFelipe Balbi /* Handle USB2.0-only core configuration */ 907941f918eSFelipe Balbi if (DWC3_GHWPARAMS3_SSPHY_IFC(dwc->hwparams.hwparams3) == 908941f918eSFelipe Balbi DWC3_GHWPARAMS3_SSPHY_IFC_DIS) { 909941f918eSFelipe Balbi if (dwc->maximum_speed == USB_SPEED_SUPER) 910941f918eSFelipe Balbi dwc->maximum_speed = USB_SPEED_HIGH; 911941f918eSFelipe Balbi } 912941f918eSFelipe Balbi 913941f918eSFelipe Balbi ret = dwc3_phy_setup(dwc); 914941f918eSFelipe Balbi if (ret) 915941f918eSFelipe Balbi goto err0; 916941f918eSFelipe Balbi 91798112041SRoger Quadros if (!dwc->ulpi_ready) { 91898112041SRoger Quadros ret = dwc3_core_ulpi_init(dwc); 91998112041SRoger Quadros if (ret) 92098112041SRoger Quadros goto err0; 92198112041SRoger Quadros dwc->ulpi_ready = true; 92298112041SRoger Quadros } 92398112041SRoger Quadros 92498112041SRoger Quadros if (!dwc->phys_ready) { 92598112041SRoger Quadros ret = dwc3_core_get_phy(dwc); 92698112041SRoger Quadros if (ret) 92798112041SRoger Quadros goto err0a; 92898112041SRoger Quadros dwc->phys_ready = true; 92998112041SRoger Quadros } 93098112041SRoger Quadros 93198112041SRoger Quadros ret = dwc3_core_soft_reset(dwc); 93298112041SRoger Quadros if (ret) 93398112041SRoger Quadros goto err0a; 93498112041SRoger Quadros 935941f918eSFelipe Balbi dwc3_core_setup_global_control(dwc); 936c499ff71SFelipe Balbi dwc3_core_num_eps(dwc); 9370ffcaf37SFelipe Balbi 9380ffcaf37SFelipe Balbi ret = dwc3_setup_scratch_buffers(dwc); 9390ffcaf37SFelipe Balbi if (ret) 940c499ff71SFelipe Balbi goto err1; 941c499ff71SFelipe Balbi 942c499ff71SFelipe Balbi /* Adjust Frame Length */ 943c499ff71SFelipe Balbi dwc3_frame_length_adjustment(dwc); 944c499ff71SFelipe Balbi 945d9612c2fSPengbo Mu dwc3_set_incr_burst_type(dwc); 946d9612c2fSPengbo Mu 947c499ff71SFelipe Balbi usb_phy_set_suspend(dwc->usb2_phy, 0); 948c499ff71SFelipe Balbi usb_phy_set_suspend(dwc->usb3_phy, 0); 949c499ff71SFelipe Balbi ret = phy_power_on(dwc->usb2_generic_phy); 950c499ff71SFelipe Balbi if (ret < 0) 9510ffcaf37SFelipe Balbi goto err2; 9520ffcaf37SFelipe Balbi 953c499ff71SFelipe Balbi ret = phy_power_on(dwc->usb3_generic_phy); 954c499ff71SFelipe Balbi if (ret < 0) 955c499ff71SFelipe Balbi goto err3; 956c499ff71SFelipe Balbi 957c499ff71SFelipe Balbi ret = dwc3_event_buffers_setup(dwc); 958c499ff71SFelipe Balbi if (ret) { 959c499ff71SFelipe Balbi dev_err(dwc->dev, "failed to setup event buffers\n"); 960c499ff71SFelipe Balbi goto err4; 961c499ff71SFelipe Balbi } 962c499ff71SFelipe Balbi 96306281d46SJohn Youn /* 96406281d46SJohn Youn * ENDXFER polling is available on version 3.10a and later of 96506281d46SJohn Youn * the DWC_usb3 controller. It is NOT available in the 96606281d46SJohn Youn * DWC_usb31 controller. 96706281d46SJohn Youn */ 96806281d46SJohn Youn if (!dwc3_is_usb31(dwc) && dwc->revision >= DWC3_REVISION_310A) { 96906281d46SJohn Youn reg = dwc3_readl(dwc->regs, DWC3_GUCTL2); 97006281d46SJohn Youn reg |= DWC3_GUCTL2_RST_ACTBITLATER; 97106281d46SJohn Youn dwc3_writel(dwc->regs, DWC3_GUCTL2, reg); 97206281d46SJohn Youn } 97306281d46SJohn Youn 97465db7a0cSWilliam Wu if (dwc->revision >= DWC3_REVISION_250A) { 9750bb39ca1SJohn Youn reg = dwc3_readl(dwc->regs, DWC3_GUCTL1); 97665db7a0cSWilliam Wu 97765db7a0cSWilliam Wu /* 97865db7a0cSWilliam Wu * Enable hardware control of sending remote wakeup 97965db7a0cSWilliam Wu * in HS when the device is in the L1 state. 98065db7a0cSWilliam Wu */ 98165db7a0cSWilliam Wu if (dwc->revision >= DWC3_REVISION_290A) 9820bb39ca1SJohn Youn reg |= DWC3_GUCTL1_DEV_L1_EXIT_BY_HW; 98365db7a0cSWilliam Wu 98465db7a0cSWilliam Wu if (dwc->dis_tx_ipgap_linecheck_quirk) 98565db7a0cSWilliam Wu reg |= DWC3_GUCTL1_TX_IPGAP_LINECHECK_DIS; 98665db7a0cSWilliam Wu 9870bb39ca1SJohn Youn dwc3_writel(dwc->regs, DWC3_GUCTL1, reg); 9880bb39ca1SJohn Youn } 9890bb39ca1SJohn Youn 990b138e23dSAnurag Kumar Vulisha if (dwc->dr_mode == USB_DR_MODE_HOST || 991b138e23dSAnurag Kumar Vulisha dwc->dr_mode == USB_DR_MODE_OTG) { 992b138e23dSAnurag Kumar Vulisha reg = dwc3_readl(dwc->regs, DWC3_GUCTL); 993b138e23dSAnurag Kumar Vulisha 994b138e23dSAnurag Kumar Vulisha /* 995b138e23dSAnurag Kumar Vulisha * Enable Auto retry Feature to make the controller operating in 996b138e23dSAnurag Kumar Vulisha * Host mode on seeing transaction errors(CRC errors or internal 997b138e23dSAnurag Kumar Vulisha * overrun scenerios) on IN transfers to reply to the device 998b138e23dSAnurag Kumar Vulisha * with a non-terminating retry ACK (i.e, an ACK transcation 999b138e23dSAnurag Kumar Vulisha * packet with Retry=1 & Nump != 0) 1000b138e23dSAnurag Kumar Vulisha */ 1001b138e23dSAnurag Kumar Vulisha reg |= DWC3_GUCTL_HSTINAUTORETRY; 1002b138e23dSAnurag Kumar Vulisha 1003b138e23dSAnurag Kumar Vulisha dwc3_writel(dwc->regs, DWC3_GUCTL, reg); 1004b138e23dSAnurag Kumar Vulisha } 1005b138e23dSAnurag Kumar Vulisha 1006938a5ad1SThinh Nguyen /* 1007938a5ad1SThinh Nguyen * Must config both number of packets and max burst settings to enable 1008938a5ad1SThinh Nguyen * RX and/or TX threshold. 1009938a5ad1SThinh Nguyen */ 1010938a5ad1SThinh Nguyen if (dwc3_is_usb31(dwc) && dwc->dr_mode == USB_DR_MODE_HOST) { 1011938a5ad1SThinh Nguyen u8 rx_thr_num = dwc->rx_thr_num_pkt_prd; 1012938a5ad1SThinh Nguyen u8 rx_maxburst = dwc->rx_max_burst_prd; 1013938a5ad1SThinh Nguyen u8 tx_thr_num = dwc->tx_thr_num_pkt_prd; 1014938a5ad1SThinh Nguyen u8 tx_maxburst = dwc->tx_max_burst_prd; 1015938a5ad1SThinh Nguyen 1016938a5ad1SThinh Nguyen if (rx_thr_num && rx_maxburst) { 1017938a5ad1SThinh Nguyen reg = dwc3_readl(dwc->regs, DWC3_GRXTHRCFG); 1018938a5ad1SThinh Nguyen reg |= DWC31_RXTHRNUMPKTSEL_PRD; 1019938a5ad1SThinh Nguyen 1020938a5ad1SThinh Nguyen reg &= ~DWC31_RXTHRNUMPKT_PRD(~0); 1021938a5ad1SThinh Nguyen reg |= DWC31_RXTHRNUMPKT_PRD(rx_thr_num); 1022938a5ad1SThinh Nguyen 1023938a5ad1SThinh Nguyen reg &= ~DWC31_MAXRXBURSTSIZE_PRD(~0); 1024938a5ad1SThinh Nguyen reg |= DWC31_MAXRXBURSTSIZE_PRD(rx_maxburst); 1025938a5ad1SThinh Nguyen 1026938a5ad1SThinh Nguyen dwc3_writel(dwc->regs, DWC3_GRXTHRCFG, reg); 1027938a5ad1SThinh Nguyen } 1028938a5ad1SThinh Nguyen 1029938a5ad1SThinh Nguyen if (tx_thr_num && tx_maxburst) { 1030938a5ad1SThinh Nguyen reg = dwc3_readl(dwc->regs, DWC3_GTXTHRCFG); 1031938a5ad1SThinh Nguyen reg |= DWC31_TXTHRNUMPKTSEL_PRD; 1032938a5ad1SThinh Nguyen 1033938a5ad1SThinh Nguyen reg &= ~DWC31_TXTHRNUMPKT_PRD(~0); 1034938a5ad1SThinh Nguyen reg |= DWC31_TXTHRNUMPKT_PRD(tx_thr_num); 1035938a5ad1SThinh Nguyen 1036938a5ad1SThinh Nguyen reg &= ~DWC31_MAXTXBURSTSIZE_PRD(~0); 1037938a5ad1SThinh Nguyen reg |= DWC31_MAXTXBURSTSIZE_PRD(tx_maxburst); 1038938a5ad1SThinh Nguyen 1039938a5ad1SThinh Nguyen dwc3_writel(dwc->regs, DWC3_GTXTHRCFG, reg); 1040938a5ad1SThinh Nguyen } 1041938a5ad1SThinh Nguyen } 1042938a5ad1SThinh Nguyen 104372246da4SFelipe Balbi return 0; 104472246da4SFelipe Balbi 1045c499ff71SFelipe Balbi err4: 10469b9d7cddSVivek Gautam phy_power_off(dwc->usb3_generic_phy); 1047c499ff71SFelipe Balbi 1048c499ff71SFelipe Balbi err3: 10499b9d7cddSVivek Gautam phy_power_off(dwc->usb2_generic_phy); 1050c499ff71SFelipe Balbi 10510ffcaf37SFelipe Balbi err2: 1052c499ff71SFelipe Balbi usb_phy_set_suspend(dwc->usb2_phy, 1); 1053c499ff71SFelipe Balbi usb_phy_set_suspend(dwc->usb3_phy, 1); 10540ffcaf37SFelipe Balbi 10550ffcaf37SFelipe Balbi err1: 10560ffcaf37SFelipe Balbi usb_phy_shutdown(dwc->usb2_phy); 10570ffcaf37SFelipe Balbi usb_phy_shutdown(dwc->usb3_phy); 105857303488SKishon Vijay Abraham I phy_exit(dwc->usb2_generic_phy); 105957303488SKishon Vijay Abraham I phy_exit(dwc->usb3_generic_phy); 10600ffcaf37SFelipe Balbi 106198112041SRoger Quadros err0a: 106298112041SRoger Quadros dwc3_ulpi_exit(dwc); 106398112041SRoger Quadros 106472246da4SFelipe Balbi err0: 106572246da4SFelipe Balbi return ret; 106672246da4SFelipe Balbi } 106772246da4SFelipe Balbi 10683c9f94acSFelipe Balbi static int dwc3_core_get_phy(struct dwc3 *dwc) 106972246da4SFelipe Balbi { 10703c9f94acSFelipe Balbi struct device *dev = dwc->dev; 1071941ea361SFelipe Balbi struct device_node *node = dev->of_node; 10723c9f94acSFelipe Balbi int ret; 107372246da4SFelipe Balbi 10745088b6f5SKishon Vijay Abraham I if (node) { 10755088b6f5SKishon Vijay Abraham I dwc->usb2_phy = devm_usb_get_phy_by_phandle(dev, "usb-phy", 0); 10765088b6f5SKishon Vijay Abraham I dwc->usb3_phy = devm_usb_get_phy_by_phandle(dev, "usb-phy", 1); 1077bb674907SFelipe Balbi } else { 1078bb674907SFelipe Balbi dwc->usb2_phy = devm_usb_get_phy(dev, USB_PHY_TYPE_USB2); 1079bb674907SFelipe Balbi dwc->usb3_phy = devm_usb_get_phy(dev, USB_PHY_TYPE_USB3); 10805088b6f5SKishon Vijay Abraham I } 10815088b6f5SKishon Vijay Abraham I 1082d105e7f8SFelipe Balbi if (IS_ERR(dwc->usb2_phy)) { 1083d105e7f8SFelipe Balbi ret = PTR_ERR(dwc->usb2_phy); 1084122f06e6SKishon Vijay Abraham I if (ret == -ENXIO || ret == -ENODEV) { 1085122f06e6SKishon Vijay Abraham I dwc->usb2_phy = NULL; 1086122f06e6SKishon Vijay Abraham I } else if (ret == -EPROBE_DEFER) { 1087d105e7f8SFelipe Balbi return ret; 1088122f06e6SKishon Vijay Abraham I } else { 108951e1e7bcSFelipe Balbi dev_err(dev, "no usb2 phy configured\n"); 1090122f06e6SKishon Vijay Abraham I return ret; 1091122f06e6SKishon Vijay Abraham I } 109251e1e7bcSFelipe Balbi } 109351e1e7bcSFelipe Balbi 1094d105e7f8SFelipe Balbi if (IS_ERR(dwc->usb3_phy)) { 1095315955d7SRuchika Kharwar ret = PTR_ERR(dwc->usb3_phy); 1096122f06e6SKishon Vijay Abraham I if (ret == -ENXIO || ret == -ENODEV) { 1097122f06e6SKishon Vijay Abraham I dwc->usb3_phy = NULL; 1098122f06e6SKishon Vijay Abraham I } else if (ret == -EPROBE_DEFER) { 1099d105e7f8SFelipe Balbi return ret; 1100122f06e6SKishon Vijay Abraham I } else { 110151e1e7bcSFelipe Balbi dev_err(dev, "no usb3 phy configured\n"); 1102122f06e6SKishon Vijay Abraham I return ret; 1103122f06e6SKishon Vijay Abraham I } 110451e1e7bcSFelipe Balbi } 110551e1e7bcSFelipe Balbi 110657303488SKishon Vijay Abraham I dwc->usb2_generic_phy = devm_phy_get(dev, "usb2-phy"); 110757303488SKishon Vijay Abraham I if (IS_ERR(dwc->usb2_generic_phy)) { 110857303488SKishon Vijay Abraham I ret = PTR_ERR(dwc->usb2_generic_phy); 110957303488SKishon Vijay Abraham I if (ret == -ENOSYS || ret == -ENODEV) { 111057303488SKishon Vijay Abraham I dwc->usb2_generic_phy = NULL; 111157303488SKishon Vijay Abraham I } else if (ret == -EPROBE_DEFER) { 111257303488SKishon Vijay Abraham I return ret; 111357303488SKishon Vijay Abraham I } else { 111457303488SKishon Vijay Abraham I dev_err(dev, "no usb2 phy configured\n"); 111557303488SKishon Vijay Abraham I return ret; 111657303488SKishon Vijay Abraham I } 111757303488SKishon Vijay Abraham I } 111857303488SKishon Vijay Abraham I 111957303488SKishon Vijay Abraham I dwc->usb3_generic_phy = devm_phy_get(dev, "usb3-phy"); 112057303488SKishon Vijay Abraham I if (IS_ERR(dwc->usb3_generic_phy)) { 112157303488SKishon Vijay Abraham I ret = PTR_ERR(dwc->usb3_generic_phy); 112257303488SKishon Vijay Abraham I if (ret == -ENOSYS || ret == -ENODEV) { 112357303488SKishon Vijay Abraham I dwc->usb3_generic_phy = NULL; 112457303488SKishon Vijay Abraham I } else if (ret == -EPROBE_DEFER) { 112557303488SKishon Vijay Abraham I return ret; 112657303488SKishon Vijay Abraham I } else { 112757303488SKishon Vijay Abraham I dev_err(dev, "no usb3 phy configured\n"); 112857303488SKishon Vijay Abraham I return ret; 112957303488SKishon Vijay Abraham I } 113057303488SKishon Vijay Abraham I } 113157303488SKishon Vijay Abraham I 11323c9f94acSFelipe Balbi return 0; 11333c9f94acSFelipe Balbi } 11343c9f94acSFelipe Balbi 11355f94adfeSFelipe Balbi static int dwc3_core_init_mode(struct dwc3 *dwc) 11365f94adfeSFelipe Balbi { 11375f94adfeSFelipe Balbi struct device *dev = dwc->dev; 11385f94adfeSFelipe Balbi int ret; 11395f94adfeSFelipe Balbi 11405f94adfeSFelipe Balbi switch (dwc->dr_mode) { 11415f94adfeSFelipe Balbi case USB_DR_MODE_PERIPHERAL: 114241ce1456SRoger Quadros dwc3_set_prtcap(dwc, DWC3_GCTL_PRTCAP_DEVICE); 1143958d1a4cSFelipe Balbi 1144958d1a4cSFelipe Balbi if (dwc->usb2_phy) 1145958d1a4cSFelipe Balbi otg_set_vbus(dwc->usb2_phy->otg, false); 1146958d1a4cSFelipe Balbi phy_set_mode(dwc->usb2_generic_phy, PHY_MODE_USB_DEVICE); 1147644cbbc3SManu Gautam phy_set_mode(dwc->usb3_generic_phy, PHY_MODE_USB_DEVICE); 1148958d1a4cSFelipe Balbi 11495f94adfeSFelipe Balbi ret = dwc3_gadget_init(dwc); 11505f94adfeSFelipe Balbi if (ret) { 11519522def4SRoger Quadros if (ret != -EPROBE_DEFER) 11525f94adfeSFelipe Balbi dev_err(dev, "failed to initialize gadget\n"); 11535f94adfeSFelipe Balbi return ret; 11545f94adfeSFelipe Balbi } 11555f94adfeSFelipe Balbi break; 11565f94adfeSFelipe Balbi case USB_DR_MODE_HOST: 115741ce1456SRoger Quadros dwc3_set_prtcap(dwc, DWC3_GCTL_PRTCAP_HOST); 1158958d1a4cSFelipe Balbi 1159958d1a4cSFelipe Balbi if (dwc->usb2_phy) 1160958d1a4cSFelipe Balbi otg_set_vbus(dwc->usb2_phy->otg, true); 1161958d1a4cSFelipe Balbi phy_set_mode(dwc->usb2_generic_phy, PHY_MODE_USB_HOST); 1162644cbbc3SManu Gautam phy_set_mode(dwc->usb3_generic_phy, PHY_MODE_USB_HOST); 1163958d1a4cSFelipe Balbi 11645f94adfeSFelipe Balbi ret = dwc3_host_init(dwc); 11655f94adfeSFelipe Balbi if (ret) { 11669522def4SRoger Quadros if (ret != -EPROBE_DEFER) 11675f94adfeSFelipe Balbi dev_err(dev, "failed to initialize host\n"); 11685f94adfeSFelipe Balbi return ret; 11695f94adfeSFelipe Balbi } 1170d8c80bb3SVivek Gautam phy_calibrate(dwc->usb2_generic_phy); 11715f94adfeSFelipe Balbi break; 11725f94adfeSFelipe Balbi case USB_DR_MODE_OTG: 117341ce1456SRoger Quadros INIT_WORK(&dwc->drd_work, __dwc3_set_mode); 11749840354fSRoger Quadros ret = dwc3_drd_init(dwc); 11759840354fSRoger Quadros if (ret) { 11769840354fSRoger Quadros if (ret != -EPROBE_DEFER) 11779840354fSRoger Quadros dev_err(dev, "failed to initialize dual-role\n"); 11789840354fSRoger Quadros return ret; 11799840354fSRoger Quadros } 11805f94adfeSFelipe Balbi break; 11815f94adfeSFelipe Balbi default: 11825f94adfeSFelipe Balbi dev_err(dev, "Unsupported mode of operation %d\n", dwc->dr_mode); 11835f94adfeSFelipe Balbi return -EINVAL; 11845f94adfeSFelipe Balbi } 11855f94adfeSFelipe Balbi 11865f94adfeSFelipe Balbi return 0; 11875f94adfeSFelipe Balbi } 11885f94adfeSFelipe Balbi 11895f94adfeSFelipe Balbi static void dwc3_core_exit_mode(struct dwc3 *dwc) 11905f94adfeSFelipe Balbi { 11915f94adfeSFelipe Balbi switch (dwc->dr_mode) { 11925f94adfeSFelipe Balbi case USB_DR_MODE_PERIPHERAL: 11935f94adfeSFelipe Balbi dwc3_gadget_exit(dwc); 11945f94adfeSFelipe Balbi break; 11955f94adfeSFelipe Balbi case USB_DR_MODE_HOST: 11965f94adfeSFelipe Balbi dwc3_host_exit(dwc); 11975f94adfeSFelipe Balbi break; 11985f94adfeSFelipe Balbi case USB_DR_MODE_OTG: 11999840354fSRoger Quadros dwc3_drd_exit(dwc); 12005f94adfeSFelipe Balbi break; 12015f94adfeSFelipe Balbi default: 12025f94adfeSFelipe Balbi /* do nothing */ 12035f94adfeSFelipe Balbi break; 12045f94adfeSFelipe Balbi } 12055f94adfeSFelipe Balbi } 12065f94adfeSFelipe Balbi 1207c5ac6116SFelipe Balbi static void dwc3_get_properties(struct dwc3 *dwc) 12083c9f94acSFelipe Balbi { 1209c5ac6116SFelipe Balbi struct device *dev = dwc->dev; 121080caf7d2SHuang Rui u8 lpm_nyet_threshold; 12116b6a0c9aSHuang Rui u8 tx_de_emphasis; 1212460d098cSHuang Rui u8 hird_threshold; 1213938a5ad1SThinh Nguyen u8 rx_thr_num_pkt_prd; 1214938a5ad1SThinh Nguyen u8 rx_max_burst_prd; 1215938a5ad1SThinh Nguyen u8 tx_thr_num_pkt_prd; 1216938a5ad1SThinh Nguyen u8 tx_max_burst_prd; 12173c9f94acSFelipe Balbi 121880caf7d2SHuang Rui /* default to highest possible threshold */ 121980caf7d2SHuang Rui lpm_nyet_threshold = 0xff; 122080caf7d2SHuang Rui 12216b6a0c9aSHuang Rui /* default to -3.5dB de-emphasis */ 12226b6a0c9aSHuang Rui tx_de_emphasis = 1; 12236b6a0c9aSHuang Rui 1224460d098cSHuang Rui /* 1225460d098cSHuang Rui * default to assert utmi_sleep_n and use maximum allowed HIRD 1226460d098cSHuang Rui * threshold value of 0b1100 1227460d098cSHuang Rui */ 1228460d098cSHuang Rui hird_threshold = 12; 1229460d098cSHuang Rui 123063863b98SHeikki Krogerus dwc->maximum_speed = usb_get_maximum_speed(dev); 123106e7114fSHeikki Krogerus dwc->dr_mode = usb_get_dr_mode(dev); 123232f2ed86SWilliam Wu dwc->hsphy_mode = of_usb_get_phy_mode(dev->of_node); 123363863b98SHeikki Krogerus 1234d64ff406SArnd Bergmann dwc->sysdev_is_parent = device_property_read_bool(dev, 1235d64ff406SArnd Bergmann "linux,sysdev_is_parent"); 1236d64ff406SArnd Bergmann if (dwc->sysdev_is_parent) 1237d64ff406SArnd Bergmann dwc->sysdev = dwc->dev->parent; 1238d64ff406SArnd Bergmann else 1239d64ff406SArnd Bergmann dwc->sysdev = dwc->dev; 1240d64ff406SArnd Bergmann 12413d128919SHeikki Krogerus dwc->has_lpm_erratum = device_property_read_bool(dev, 124280caf7d2SHuang Rui "snps,has-lpm-erratum"); 12433d128919SHeikki Krogerus device_property_read_u8(dev, "snps,lpm-nyet-threshold", 124480caf7d2SHuang Rui &lpm_nyet_threshold); 12453d128919SHeikki Krogerus dwc->is_utmi_l1_suspend = device_property_read_bool(dev, 1246460d098cSHuang Rui "snps,is-utmi-l1-suspend"); 12473d128919SHeikki Krogerus device_property_read_u8(dev, "snps,hird-threshold", 1248460d098cSHuang Rui &hird_threshold); 12493d128919SHeikki Krogerus dwc->usb3_lpm_capable = device_property_read_bool(dev, 1250eac68e8fSRobert Baldyga "snps,usb3_lpm_capable"); 1251022a0208SThinh Nguyen dwc->usb2_lpm_disable = device_property_read_bool(dev, 1252022a0208SThinh Nguyen "snps,usb2-lpm-disable"); 1253938a5ad1SThinh Nguyen device_property_read_u8(dev, "snps,rx-thr-num-pkt-prd", 1254938a5ad1SThinh Nguyen &rx_thr_num_pkt_prd); 1255938a5ad1SThinh Nguyen device_property_read_u8(dev, "snps,rx-max-burst-prd", 1256938a5ad1SThinh Nguyen &rx_max_burst_prd); 1257938a5ad1SThinh Nguyen device_property_read_u8(dev, "snps,tx-thr-num-pkt-prd", 1258938a5ad1SThinh Nguyen &tx_thr_num_pkt_prd); 1259938a5ad1SThinh Nguyen device_property_read_u8(dev, "snps,tx-max-burst-prd", 1260938a5ad1SThinh Nguyen &tx_max_burst_prd); 12613c9f94acSFelipe Balbi 12623d128919SHeikki Krogerus dwc->disable_scramble_quirk = device_property_read_bool(dev, 12633b81221aSHuang Rui "snps,disable_scramble_quirk"); 12643d128919SHeikki Krogerus dwc->u2exit_lfps_quirk = device_property_read_bool(dev, 12659a5b2f31SHuang Rui "snps,u2exit_lfps_quirk"); 12663d128919SHeikki Krogerus dwc->u2ss_inp3_quirk = device_property_read_bool(dev, 1267b5a65c40SHuang Rui "snps,u2ss_inp3_quirk"); 12683d128919SHeikki Krogerus dwc->req_p1p2p3_quirk = device_property_read_bool(dev, 1269df31f5b3SHuang Rui "snps,req_p1p2p3_quirk"); 12703d128919SHeikki Krogerus dwc->del_p1p2p3_quirk = device_property_read_bool(dev, 1271a2a1d0f5SHuang Rui "snps,del_p1p2p3_quirk"); 12723d128919SHeikki Krogerus dwc->del_phy_power_chg_quirk = device_property_read_bool(dev, 127341c06ffdSHuang Rui "snps,del_phy_power_chg_quirk"); 12743d128919SHeikki Krogerus dwc->lfps_filter_quirk = device_property_read_bool(dev, 1275fb67afcaSHuang Rui "snps,lfps_filter_quirk"); 12763d128919SHeikki Krogerus dwc->rx_detect_poll_quirk = device_property_read_bool(dev, 127714f4ac53SHuang Rui "snps,rx_detect_poll_quirk"); 12783d128919SHeikki Krogerus dwc->dis_u3_susphy_quirk = device_property_read_bool(dev, 127959acfa20SHuang Rui "snps,dis_u3_susphy_quirk"); 12803d128919SHeikki Krogerus dwc->dis_u2_susphy_quirk = device_property_read_bool(dev, 12810effe0a3SHuang Rui "snps,dis_u2_susphy_quirk"); 1282ec791d14SJohn Youn dwc->dis_enblslpm_quirk = device_property_read_bool(dev, 1283ec791d14SJohn Youn "snps,dis_enblslpm_quirk"); 1284e58dd357SRajesh Bhagat dwc->dis_rxdet_inp3_quirk = device_property_read_bool(dev, 1285e58dd357SRajesh Bhagat "snps,dis_rxdet_inp3_quirk"); 128616199f33SWilliam Wu dwc->dis_u2_freeclk_exists_quirk = device_property_read_bool(dev, 128716199f33SWilliam Wu "snps,dis-u2-freeclk-exists-quirk"); 128800fe081dSWilliam Wu dwc->dis_del_phy_power_chg_quirk = device_property_read_bool(dev, 128900fe081dSWilliam Wu "snps,dis-del-phy-power-chg-quirk"); 129065db7a0cSWilliam Wu dwc->dis_tx_ipgap_linecheck_quirk = device_property_read_bool(dev, 129165db7a0cSWilliam Wu "snps,dis-tx-ipgap-linecheck-quirk"); 12926b6a0c9aSHuang Rui 12933d128919SHeikki Krogerus dwc->tx_de_emphasis_quirk = device_property_read_bool(dev, 12946b6a0c9aSHuang Rui "snps,tx_de_emphasis_quirk"); 12953d128919SHeikki Krogerus device_property_read_u8(dev, "snps,tx_de_emphasis", 12966b6a0c9aSHuang Rui &tx_de_emphasis); 12973d128919SHeikki Krogerus device_property_read_string(dev, "snps,hsphy_interface", 12983e10a2ceSHeikki Krogerus &dwc->hsphy_interface); 12993d128919SHeikki Krogerus device_property_read_u32(dev, "snps,quirk-frame-length-adjustment", 1300bcdb3272SFelipe Balbi &dwc->fladj); 13013d128919SHeikki Krogerus 130242bf02ecSRoger Quadros dwc->dis_metastability_quirk = device_property_read_bool(dev, 130342bf02ecSRoger Quadros "snps,dis_metastability_quirk"); 130442bf02ecSRoger Quadros 130580caf7d2SHuang Rui dwc->lpm_nyet_threshold = lpm_nyet_threshold; 13066b6a0c9aSHuang Rui dwc->tx_de_emphasis = tx_de_emphasis; 130780caf7d2SHuang Rui 1308460d098cSHuang Rui dwc->hird_threshold = hird_threshold 1309460d098cSHuang Rui | (dwc->is_utmi_l1_suspend << 4); 1310460d098cSHuang Rui 1311938a5ad1SThinh Nguyen dwc->rx_thr_num_pkt_prd = rx_thr_num_pkt_prd; 1312938a5ad1SThinh Nguyen dwc->rx_max_burst_prd = rx_max_burst_prd; 1313938a5ad1SThinh Nguyen 1314938a5ad1SThinh Nguyen dwc->tx_thr_num_pkt_prd = tx_thr_num_pkt_prd; 1315938a5ad1SThinh Nguyen dwc->tx_max_burst_prd = tx_max_burst_prd; 1316938a5ad1SThinh Nguyen 1317cf40b86bSJohn Youn dwc->imod_interval = 0; 1318cf40b86bSJohn Youn } 1319cf40b86bSJohn Youn 1320cf40b86bSJohn Youn /* check whether the core supports IMOD */ 1321cf40b86bSJohn Youn bool dwc3_has_imod(struct dwc3 *dwc) 1322cf40b86bSJohn Youn { 1323cf40b86bSJohn Youn return ((dwc3_is_usb3(dwc) && 1324cf40b86bSJohn Youn dwc->revision >= DWC3_REVISION_300A) || 1325cf40b86bSJohn Youn (dwc3_is_usb31(dwc) && 1326cf40b86bSJohn Youn dwc->revision >= DWC3_USB31_REVISION_120A)); 1327c5ac6116SFelipe Balbi } 1328c5ac6116SFelipe Balbi 13297ac51a12SJohn Youn static void dwc3_check_params(struct dwc3 *dwc) 13307ac51a12SJohn Youn { 13317ac51a12SJohn Youn struct device *dev = dwc->dev; 13327ac51a12SJohn Youn 1333cf40b86bSJohn Youn /* Check for proper value of imod_interval */ 1334cf40b86bSJohn Youn if (dwc->imod_interval && !dwc3_has_imod(dwc)) { 1335cf40b86bSJohn Youn dev_warn(dwc->dev, "Interrupt moderation not supported\n"); 1336cf40b86bSJohn Youn dwc->imod_interval = 0; 1337cf40b86bSJohn Youn } 1338cf40b86bSJohn Youn 133928632b44SJohn Youn /* 134028632b44SJohn Youn * Workaround for STAR 9000961433 which affects only version 134128632b44SJohn Youn * 3.00a of the DWC_usb3 core. This prevents the controller 134228632b44SJohn Youn * interrupt from being masked while handling events. IMOD 134328632b44SJohn Youn * allows us to work around this issue. Enable it for the 134428632b44SJohn Youn * affected version. 134528632b44SJohn Youn */ 134628632b44SJohn Youn if (!dwc->imod_interval && 134728632b44SJohn Youn (dwc->revision == DWC3_REVISION_300A)) 134828632b44SJohn Youn dwc->imod_interval = 1; 134928632b44SJohn Youn 13507ac51a12SJohn Youn /* Check the maximum_speed parameter */ 13517ac51a12SJohn Youn switch (dwc->maximum_speed) { 13527ac51a12SJohn Youn case USB_SPEED_LOW: 13537ac51a12SJohn Youn case USB_SPEED_FULL: 13547ac51a12SJohn Youn case USB_SPEED_HIGH: 13557ac51a12SJohn Youn case USB_SPEED_SUPER: 13567ac51a12SJohn Youn case USB_SPEED_SUPER_PLUS: 13577ac51a12SJohn Youn break; 13587ac51a12SJohn Youn default: 13597ac51a12SJohn Youn dev_err(dev, "invalid maximum_speed parameter %d\n", 13607ac51a12SJohn Youn dwc->maximum_speed); 13617ac51a12SJohn Youn /* fall through */ 13627ac51a12SJohn Youn case USB_SPEED_UNKNOWN: 13637ac51a12SJohn Youn /* default to superspeed */ 13647ac51a12SJohn Youn dwc->maximum_speed = USB_SPEED_SUPER; 13657ac51a12SJohn Youn 13667ac51a12SJohn Youn /* 13677ac51a12SJohn Youn * default to superspeed plus if we are capable. 13687ac51a12SJohn Youn */ 13697ac51a12SJohn Youn if (dwc3_is_usb31(dwc) && 13707ac51a12SJohn Youn (DWC3_GHWPARAMS3_SSPHY_IFC(dwc->hwparams.hwparams3) == 13717ac51a12SJohn Youn DWC3_GHWPARAMS3_SSPHY_IFC_GEN2)) 13727ac51a12SJohn Youn dwc->maximum_speed = USB_SPEED_SUPER_PLUS; 13737ac51a12SJohn Youn 13747ac51a12SJohn Youn break; 13757ac51a12SJohn Youn } 13767ac51a12SJohn Youn } 13777ac51a12SJohn Youn 1378c5ac6116SFelipe Balbi static int dwc3_probe(struct platform_device *pdev) 1379c5ac6116SFelipe Balbi { 1380c5ac6116SFelipe Balbi struct device *dev = &pdev->dev; 138144feb8e6SMasahiro Yamada struct resource *res, dwc_res; 1382c5ac6116SFelipe Balbi struct dwc3 *dwc; 1383c5ac6116SFelipe Balbi 1384c5ac6116SFelipe Balbi int ret; 1385c5ac6116SFelipe Balbi 1386c5ac6116SFelipe Balbi void __iomem *regs; 1387c5ac6116SFelipe Balbi 1388c5ac6116SFelipe Balbi dwc = devm_kzalloc(dev, sizeof(*dwc), GFP_KERNEL); 1389c5ac6116SFelipe Balbi if (!dwc) 1390c5ac6116SFelipe Balbi return -ENOMEM; 1391c5ac6116SFelipe Balbi 1392fe8abf33SMasahiro Yamada dwc->clks = devm_kmemdup(dev, dwc3_core_clks, sizeof(dwc3_core_clks), 1393fe8abf33SMasahiro Yamada GFP_KERNEL); 1394fe8abf33SMasahiro Yamada if (!dwc->clks) 1395fe8abf33SMasahiro Yamada return -ENOMEM; 1396fe8abf33SMasahiro Yamada 1397c5ac6116SFelipe Balbi dwc->dev = dev; 1398c5ac6116SFelipe Balbi 1399c5ac6116SFelipe Balbi res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1400c5ac6116SFelipe Balbi if (!res) { 1401c5ac6116SFelipe Balbi dev_err(dev, "missing memory resource\n"); 1402c5ac6116SFelipe Balbi return -ENODEV; 1403c5ac6116SFelipe Balbi } 1404c5ac6116SFelipe Balbi 1405c5ac6116SFelipe Balbi dwc->xhci_resources[0].start = res->start; 1406c5ac6116SFelipe Balbi dwc->xhci_resources[0].end = dwc->xhci_resources[0].start + 1407c5ac6116SFelipe Balbi DWC3_XHCI_REGS_END; 1408c5ac6116SFelipe Balbi dwc->xhci_resources[0].flags = res->flags; 1409c5ac6116SFelipe Balbi dwc->xhci_resources[0].name = res->name; 1410c5ac6116SFelipe Balbi 1411c5ac6116SFelipe Balbi /* 1412c5ac6116SFelipe Balbi * Request memory region but exclude xHCI regs, 1413c5ac6116SFelipe Balbi * since it will be requested by the xhci-plat driver. 1414c5ac6116SFelipe Balbi */ 141544feb8e6SMasahiro Yamada dwc_res = *res; 141644feb8e6SMasahiro Yamada dwc_res.start += DWC3_GLOBALS_REGS_START; 141744feb8e6SMasahiro Yamada 141844feb8e6SMasahiro Yamada regs = devm_ioremap_resource(dev, &dwc_res); 141944feb8e6SMasahiro Yamada if (IS_ERR(regs)) 142044feb8e6SMasahiro Yamada return PTR_ERR(regs); 1421c5ac6116SFelipe Balbi 1422c5ac6116SFelipe Balbi dwc->regs = regs; 142344feb8e6SMasahiro Yamada dwc->regs_size = resource_size(&dwc_res); 1424c5ac6116SFelipe Balbi 1425c5ac6116SFelipe Balbi dwc3_get_properties(dwc); 1426c5ac6116SFelipe Balbi 1427fe8abf33SMasahiro Yamada dwc->reset = devm_reset_control_get_optional_shared(dev, NULL); 1428fe8abf33SMasahiro Yamada if (IS_ERR(dwc->reset)) 1429fe8abf33SMasahiro Yamada return PTR_ERR(dwc->reset); 1430fe8abf33SMasahiro Yamada 143161527777SHans de Goede if (dev->of_node) { 143261527777SHans de Goede dwc->num_clks = ARRAY_SIZE(dwc3_core_clks); 143361527777SHans de Goede 1434fe8abf33SMasahiro Yamada ret = clk_bulk_get(dev, dwc->num_clks, dwc->clks); 1435fe8abf33SMasahiro Yamada if (ret == -EPROBE_DEFER) 1436fe8abf33SMasahiro Yamada return ret; 1437fe8abf33SMasahiro Yamada /* 143861527777SHans de Goede * Clocks are optional, but new DT platforms should support all 143961527777SHans de Goede * clocks as required by the DT-binding. 1440fe8abf33SMasahiro Yamada */ 1441fe8abf33SMasahiro Yamada if (ret) 1442fe8abf33SMasahiro Yamada dwc->num_clks = 0; 144361527777SHans de Goede } 1444fe8abf33SMasahiro Yamada 1445fe8abf33SMasahiro Yamada ret = reset_control_deassert(dwc->reset); 1446fe8abf33SMasahiro Yamada if (ret) 1447fe8abf33SMasahiro Yamada goto put_clks; 1448fe8abf33SMasahiro Yamada 1449fe8abf33SMasahiro Yamada ret = clk_bulk_prepare(dwc->num_clks, dwc->clks); 1450fe8abf33SMasahiro Yamada if (ret) 1451fe8abf33SMasahiro Yamada goto assert_reset; 1452fe8abf33SMasahiro Yamada 1453fe8abf33SMasahiro Yamada ret = clk_bulk_enable(dwc->num_clks, dwc->clks); 1454fe8abf33SMasahiro Yamada if (ret) 1455fe8abf33SMasahiro Yamada goto unprepare_clks; 1456fe8abf33SMasahiro Yamada 14576c89cce0SHeikki Krogerus platform_set_drvdata(pdev, dwc); 14582917e718SHeikki Krogerus dwc3_cache_hwparams(dwc); 14596c89cce0SHeikki Krogerus 146072246da4SFelipe Balbi spin_lock_init(&dwc->lock); 146172246da4SFelipe Balbi 1462fc8bb91bSFelipe Balbi pm_runtime_set_active(dev); 1463fc8bb91bSFelipe Balbi pm_runtime_use_autosuspend(dev); 1464fc8bb91bSFelipe Balbi pm_runtime_set_autosuspend_delay(dev, DWC3_DEFAULT_AUTOSUSPEND_DELAY); 1465802ca850SChanho Park pm_runtime_enable(dev); 146632808237SRoger Quadros ret = pm_runtime_get_sync(dev); 146732808237SRoger Quadros if (ret < 0) 146832808237SRoger Quadros goto err1; 146932808237SRoger Quadros 1470802ca850SChanho Park pm_runtime_forbid(dev); 147172246da4SFelipe Balbi 14723921426bSFelipe Balbi ret = dwc3_alloc_event_buffers(dwc, DWC3_EVENT_BUFFERS_SIZE); 14733921426bSFelipe Balbi if (ret) { 14743921426bSFelipe Balbi dev_err(dwc->dev, "failed to allocate event buffers\n"); 14753921426bSFelipe Balbi ret = -ENOMEM; 147632808237SRoger Quadros goto err2; 14773921426bSFelipe Balbi } 14783921426bSFelipe Balbi 14799d6173e1SThinh Nguyen ret = dwc3_get_dr_mode(dwc); 14809d6173e1SThinh Nguyen if (ret) 14819d6173e1SThinh Nguyen goto err3; 148232a4a135SFelipe Balbi 1483c499ff71SFelipe Balbi ret = dwc3_alloc_scratch_buffers(dwc); 1484c499ff71SFelipe Balbi if (ret) 148532808237SRoger Quadros goto err3; 1486c499ff71SFelipe Balbi 148772246da4SFelipe Balbi ret = dwc3_core_init(dwc); 148872246da4SFelipe Balbi if (ret) { 1489408d3ba0SBrian Norris if (ret != -EPROBE_DEFER) 1490408d3ba0SBrian Norris dev_err(dev, "failed to initialize core: %d\n", ret); 149132808237SRoger Quadros goto err4; 149272246da4SFelipe Balbi } 149372246da4SFelipe Balbi 14947ac51a12SJohn Youn dwc3_check_params(dwc); 14952c7f1bd9SJohn Youn 14965f94adfeSFelipe Balbi ret = dwc3_core_init_mode(dwc); 14975f94adfeSFelipe Balbi if (ret) 149832808237SRoger Quadros goto err5; 149972246da4SFelipe Balbi 15004e9f3118SDu, Changbin dwc3_debugfs_init(dwc); 1501fc8bb91bSFelipe Balbi pm_runtime_put(dev); 150272246da4SFelipe Balbi 150372246da4SFelipe Balbi return 0; 150472246da4SFelipe Balbi 150532808237SRoger Quadros err5: 1506f122d33eSFelipe Balbi dwc3_event_buffers_cleanup(dwc); 150708fd9a82SAndy Shevchenko dwc3_ulpi_exit(dwc); 1508f122d33eSFelipe Balbi 150932808237SRoger Quadros err4: 1510c499ff71SFelipe Balbi dwc3_free_scratch_buffers(dwc); 151172246da4SFelipe Balbi 151232808237SRoger Quadros err3: 15133921426bSFelipe Balbi dwc3_free_event_buffers(dwc); 15143921426bSFelipe Balbi 151532808237SRoger Quadros err2: 151632808237SRoger Quadros pm_runtime_allow(&pdev->dev); 151732808237SRoger Quadros 151832808237SRoger Quadros err1: 151932808237SRoger Quadros pm_runtime_put_sync(&pdev->dev); 152032808237SRoger Quadros pm_runtime_disable(&pdev->dev); 152132808237SRoger Quadros 1522fe8abf33SMasahiro Yamada clk_bulk_disable(dwc->num_clks, dwc->clks); 1523fe8abf33SMasahiro Yamada unprepare_clks: 1524fe8abf33SMasahiro Yamada clk_bulk_unprepare(dwc->num_clks, dwc->clks); 1525fe8abf33SMasahiro Yamada assert_reset: 1526fe8abf33SMasahiro Yamada reset_control_assert(dwc->reset); 1527fe8abf33SMasahiro Yamada put_clks: 1528fe8abf33SMasahiro Yamada clk_bulk_put(dwc->num_clks, dwc->clks); 1529fe8abf33SMasahiro Yamada 153072246da4SFelipe Balbi return ret; 153172246da4SFelipe Balbi } 153272246da4SFelipe Balbi 1533fb4e98abSBill Pemberton static int dwc3_remove(struct platform_device *pdev) 153472246da4SFelipe Balbi { 153572246da4SFelipe Balbi struct dwc3 *dwc = platform_get_drvdata(pdev); 15363da1f6eeSFelipe Balbi 1537fc8bb91bSFelipe Balbi pm_runtime_get_sync(&pdev->dev); 153872246da4SFelipe Balbi 1539dc99f16fSFelipe Balbi dwc3_debugfs_exit(dwc); 1540dc99f16fSFelipe Balbi dwc3_core_exit_mode(dwc); 15418ba007a9SKishon Vijay Abraham I 154272246da4SFelipe Balbi dwc3_core_exit(dwc); 154388bc9d19SHeikki Krogerus dwc3_ulpi_exit(dwc); 154472246da4SFelipe Balbi 1545fc8bb91bSFelipe Balbi pm_runtime_put_sync(&pdev->dev); 1546fc8bb91bSFelipe Balbi pm_runtime_allow(&pdev->dev); 1547fc8bb91bSFelipe Balbi pm_runtime_disable(&pdev->dev); 1548fc8bb91bSFelipe Balbi 1549c499ff71SFelipe Balbi dwc3_free_event_buffers(dwc); 1550c499ff71SFelipe Balbi dwc3_free_scratch_buffers(dwc); 1551fe8abf33SMasahiro Yamada clk_bulk_put(dwc->num_clks, dwc->clks); 1552c499ff71SFelipe Balbi 155372246da4SFelipe Balbi return 0; 155472246da4SFelipe Balbi } 155572246da4SFelipe Balbi 1556fc8bb91bSFelipe Balbi #ifdef CONFIG_PM 1557fe8abf33SMasahiro Yamada static int dwc3_core_init_for_resume(struct dwc3 *dwc) 1558fe8abf33SMasahiro Yamada { 1559fe8abf33SMasahiro Yamada int ret; 1560fe8abf33SMasahiro Yamada 1561fe8abf33SMasahiro Yamada ret = reset_control_deassert(dwc->reset); 1562fe8abf33SMasahiro Yamada if (ret) 1563fe8abf33SMasahiro Yamada return ret; 1564fe8abf33SMasahiro Yamada 1565fe8abf33SMasahiro Yamada ret = clk_bulk_prepare(dwc->num_clks, dwc->clks); 1566fe8abf33SMasahiro Yamada if (ret) 1567fe8abf33SMasahiro Yamada goto assert_reset; 1568fe8abf33SMasahiro Yamada 1569fe8abf33SMasahiro Yamada ret = clk_bulk_enable(dwc->num_clks, dwc->clks); 1570fe8abf33SMasahiro Yamada if (ret) 1571fe8abf33SMasahiro Yamada goto unprepare_clks; 1572fe8abf33SMasahiro Yamada 1573fe8abf33SMasahiro Yamada ret = dwc3_core_init(dwc); 1574fe8abf33SMasahiro Yamada if (ret) 1575fe8abf33SMasahiro Yamada goto disable_clks; 1576fe8abf33SMasahiro Yamada 1577fe8abf33SMasahiro Yamada return 0; 1578fe8abf33SMasahiro Yamada 1579fe8abf33SMasahiro Yamada disable_clks: 1580fe8abf33SMasahiro Yamada clk_bulk_disable(dwc->num_clks, dwc->clks); 1581fe8abf33SMasahiro Yamada unprepare_clks: 1582fe8abf33SMasahiro Yamada clk_bulk_unprepare(dwc->num_clks, dwc->clks); 1583fe8abf33SMasahiro Yamada assert_reset: 1584fe8abf33SMasahiro Yamada reset_control_assert(dwc->reset); 1585fe8abf33SMasahiro Yamada 1586fe8abf33SMasahiro Yamada return ret; 1587fe8abf33SMasahiro Yamada } 1588fe8abf33SMasahiro Yamada 1589c4a5153eSManu Gautam static int dwc3_suspend_common(struct dwc3 *dwc, pm_message_t msg) 15907415f17cSFelipe Balbi { 1591fc8bb91bSFelipe Balbi unsigned long flags; 1592bcb12877SManu Gautam u32 reg; 15937415f17cSFelipe Balbi 1594689bf72cSManu Gautam switch (dwc->current_dr_role) { 1595689bf72cSManu Gautam case DWC3_GCTL_PRTCAP_DEVICE: 1596fc8bb91bSFelipe Balbi spin_lock_irqsave(&dwc->lock, flags); 15977415f17cSFelipe Balbi dwc3_gadget_suspend(dwc); 1598fc8bb91bSFelipe Balbi spin_unlock_irqrestore(&dwc->lock, flags); 1599689bf72cSManu Gautam dwc3_core_exit(dwc); 160051f5d49aSFelipe Balbi break; 1601689bf72cSManu Gautam case DWC3_GCTL_PRTCAP_HOST: 1602bcb12877SManu Gautam if (!PMSG_IS_AUTO(msg)) { 1603c4a5153eSManu Gautam dwc3_core_exit(dwc); 1604c4a5153eSManu Gautam break; 1605bcb12877SManu Gautam } 1606bcb12877SManu Gautam 1607bcb12877SManu Gautam /* Let controller to suspend HSPHY before PHY driver suspends */ 1608bcb12877SManu Gautam if (dwc->dis_u2_susphy_quirk || 1609bcb12877SManu Gautam dwc->dis_enblslpm_quirk) { 1610bcb12877SManu Gautam reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0)); 1611bcb12877SManu Gautam reg |= DWC3_GUSB2PHYCFG_ENBLSLPM | 1612bcb12877SManu Gautam DWC3_GUSB2PHYCFG_SUSPHY; 1613bcb12877SManu Gautam dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); 1614bcb12877SManu Gautam 1615bcb12877SManu Gautam /* Give some time for USB2 PHY to suspend */ 1616bcb12877SManu Gautam usleep_range(5000, 6000); 1617bcb12877SManu Gautam } 1618bcb12877SManu Gautam 1619bcb12877SManu Gautam phy_pm_runtime_put_sync(dwc->usb2_generic_phy); 1620bcb12877SManu Gautam phy_pm_runtime_put_sync(dwc->usb3_generic_phy); 1621bcb12877SManu Gautam break; 1622f09cc79bSRoger Quadros case DWC3_GCTL_PRTCAP_OTG: 1623f09cc79bSRoger Quadros /* do nothing during runtime_suspend */ 1624f09cc79bSRoger Quadros if (PMSG_IS_AUTO(msg)) 1625f09cc79bSRoger Quadros break; 1626f09cc79bSRoger Quadros 1627f09cc79bSRoger Quadros if (dwc->current_otg_role == DWC3_OTG_ROLE_DEVICE) { 1628f09cc79bSRoger Quadros spin_lock_irqsave(&dwc->lock, flags); 1629f09cc79bSRoger Quadros dwc3_gadget_suspend(dwc); 1630f09cc79bSRoger Quadros spin_unlock_irqrestore(&dwc->lock, flags); 1631f09cc79bSRoger Quadros } 1632f09cc79bSRoger Quadros 1633f09cc79bSRoger Quadros dwc3_otg_exit(dwc); 1634f09cc79bSRoger Quadros dwc3_core_exit(dwc); 1635f09cc79bSRoger Quadros break; 16367415f17cSFelipe Balbi default: 163751f5d49aSFelipe Balbi /* do nothing */ 16387415f17cSFelipe Balbi break; 16397415f17cSFelipe Balbi } 16407415f17cSFelipe Balbi 1641fc8bb91bSFelipe Balbi return 0; 1642fc8bb91bSFelipe Balbi } 1643fc8bb91bSFelipe Balbi 1644c4a5153eSManu Gautam static int dwc3_resume_common(struct dwc3 *dwc, pm_message_t msg) 1645fc8bb91bSFelipe Balbi { 1646fc8bb91bSFelipe Balbi unsigned long flags; 1647fc8bb91bSFelipe Balbi int ret; 1648bcb12877SManu Gautam u32 reg; 1649fc8bb91bSFelipe Balbi 1650689bf72cSManu Gautam switch (dwc->current_dr_role) { 1651689bf72cSManu Gautam case DWC3_GCTL_PRTCAP_DEVICE: 1652fe8abf33SMasahiro Yamada ret = dwc3_core_init_for_resume(dwc); 1653fc8bb91bSFelipe Balbi if (ret) 1654fc8bb91bSFelipe Balbi return ret; 1655fc8bb91bSFelipe Balbi 16567d11c3acSRoger Quadros dwc3_set_prtcap(dwc, DWC3_GCTL_PRTCAP_DEVICE); 1657fc8bb91bSFelipe Balbi spin_lock_irqsave(&dwc->lock, flags); 1658fc8bb91bSFelipe Balbi dwc3_gadget_resume(dwc); 1659fc8bb91bSFelipe Balbi spin_unlock_irqrestore(&dwc->lock, flags); 1660689bf72cSManu Gautam break; 1661689bf72cSManu Gautam case DWC3_GCTL_PRTCAP_HOST: 1662c4a5153eSManu Gautam if (!PMSG_IS_AUTO(msg)) { 1663fe8abf33SMasahiro Yamada ret = dwc3_core_init_for_resume(dwc); 1664c4a5153eSManu Gautam if (ret) 1665c4a5153eSManu Gautam return ret; 16667d11c3acSRoger Quadros dwc3_set_prtcap(dwc, DWC3_GCTL_PRTCAP_HOST); 1667bcb12877SManu Gautam break; 1668c4a5153eSManu Gautam } 1669bcb12877SManu Gautam /* Restore GUSB2PHYCFG bits that were modified in suspend */ 1670bcb12877SManu Gautam reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0)); 1671bcb12877SManu Gautam if (dwc->dis_u2_susphy_quirk) 1672bcb12877SManu Gautam reg &= ~DWC3_GUSB2PHYCFG_SUSPHY; 1673bcb12877SManu Gautam 1674bcb12877SManu Gautam if (dwc->dis_enblslpm_quirk) 1675bcb12877SManu Gautam reg &= ~DWC3_GUSB2PHYCFG_ENBLSLPM; 1676bcb12877SManu Gautam 1677bcb12877SManu Gautam dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); 1678bcb12877SManu Gautam 1679bcb12877SManu Gautam phy_pm_runtime_get_sync(dwc->usb2_generic_phy); 1680bcb12877SManu Gautam phy_pm_runtime_get_sync(dwc->usb3_generic_phy); 1681c4a5153eSManu Gautam break; 1682f09cc79bSRoger Quadros case DWC3_GCTL_PRTCAP_OTG: 1683f09cc79bSRoger Quadros /* nothing to do on runtime_resume */ 1684f09cc79bSRoger Quadros if (PMSG_IS_AUTO(msg)) 1685f09cc79bSRoger Quadros break; 1686f09cc79bSRoger Quadros 1687f09cc79bSRoger Quadros ret = dwc3_core_init(dwc); 1688f09cc79bSRoger Quadros if (ret) 1689f09cc79bSRoger Quadros return ret; 1690f09cc79bSRoger Quadros 1691f09cc79bSRoger Quadros dwc3_set_prtcap(dwc, dwc->current_dr_role); 1692f09cc79bSRoger Quadros 1693f09cc79bSRoger Quadros dwc3_otg_init(dwc); 1694f09cc79bSRoger Quadros if (dwc->current_otg_role == DWC3_OTG_ROLE_HOST) { 1695f09cc79bSRoger Quadros dwc3_otg_host_init(dwc); 1696f09cc79bSRoger Quadros } else if (dwc->current_otg_role == DWC3_OTG_ROLE_DEVICE) { 1697f09cc79bSRoger Quadros spin_lock_irqsave(&dwc->lock, flags); 1698f09cc79bSRoger Quadros dwc3_gadget_resume(dwc); 1699f09cc79bSRoger Quadros spin_unlock_irqrestore(&dwc->lock, flags); 1700f09cc79bSRoger Quadros } 1701f09cc79bSRoger Quadros 1702f09cc79bSRoger Quadros break; 1703fc8bb91bSFelipe Balbi default: 1704fc8bb91bSFelipe Balbi /* do nothing */ 1705fc8bb91bSFelipe Balbi break; 1706fc8bb91bSFelipe Balbi } 1707fc8bb91bSFelipe Balbi 1708fc8bb91bSFelipe Balbi return 0; 1709fc8bb91bSFelipe Balbi } 1710fc8bb91bSFelipe Balbi 1711fc8bb91bSFelipe Balbi static int dwc3_runtime_checks(struct dwc3 *dwc) 1712fc8bb91bSFelipe Balbi { 1713689bf72cSManu Gautam switch (dwc->current_dr_role) { 1714c4a5153eSManu Gautam case DWC3_GCTL_PRTCAP_DEVICE: 1715fc8bb91bSFelipe Balbi if (dwc->connected) 1716fc8bb91bSFelipe Balbi return -EBUSY; 1717fc8bb91bSFelipe Balbi break; 1718c4a5153eSManu Gautam case DWC3_GCTL_PRTCAP_HOST: 1719fc8bb91bSFelipe Balbi default: 1720fc8bb91bSFelipe Balbi /* do nothing */ 1721fc8bb91bSFelipe Balbi break; 1722fc8bb91bSFelipe Balbi } 1723fc8bb91bSFelipe Balbi 1724fc8bb91bSFelipe Balbi return 0; 1725fc8bb91bSFelipe Balbi } 1726fc8bb91bSFelipe Balbi 1727fc8bb91bSFelipe Balbi static int dwc3_runtime_suspend(struct device *dev) 1728fc8bb91bSFelipe Balbi { 1729fc8bb91bSFelipe Balbi struct dwc3 *dwc = dev_get_drvdata(dev); 1730fc8bb91bSFelipe Balbi int ret; 1731fc8bb91bSFelipe Balbi 1732fc8bb91bSFelipe Balbi if (dwc3_runtime_checks(dwc)) 1733fc8bb91bSFelipe Balbi return -EBUSY; 1734fc8bb91bSFelipe Balbi 1735c4a5153eSManu Gautam ret = dwc3_suspend_common(dwc, PMSG_AUTO_SUSPEND); 1736fc8bb91bSFelipe Balbi if (ret) 1737fc8bb91bSFelipe Balbi return ret; 1738fc8bb91bSFelipe Balbi 1739fc8bb91bSFelipe Balbi device_init_wakeup(dev, true); 1740fc8bb91bSFelipe Balbi 1741fc8bb91bSFelipe Balbi return 0; 1742fc8bb91bSFelipe Balbi } 1743fc8bb91bSFelipe Balbi 1744fc8bb91bSFelipe Balbi static int dwc3_runtime_resume(struct device *dev) 1745fc8bb91bSFelipe Balbi { 1746fc8bb91bSFelipe Balbi struct dwc3 *dwc = dev_get_drvdata(dev); 1747fc8bb91bSFelipe Balbi int ret; 1748fc8bb91bSFelipe Balbi 1749fc8bb91bSFelipe Balbi device_init_wakeup(dev, false); 1750fc8bb91bSFelipe Balbi 1751c4a5153eSManu Gautam ret = dwc3_resume_common(dwc, PMSG_AUTO_RESUME); 1752fc8bb91bSFelipe Balbi if (ret) 1753fc8bb91bSFelipe Balbi return ret; 1754fc8bb91bSFelipe Balbi 1755689bf72cSManu Gautam switch (dwc->current_dr_role) { 1756689bf72cSManu Gautam case DWC3_GCTL_PRTCAP_DEVICE: 1757fc8bb91bSFelipe Balbi dwc3_gadget_process_pending_events(dwc); 1758fc8bb91bSFelipe Balbi break; 1759689bf72cSManu Gautam case DWC3_GCTL_PRTCAP_HOST: 1760fc8bb91bSFelipe Balbi default: 1761fc8bb91bSFelipe Balbi /* do nothing */ 1762fc8bb91bSFelipe Balbi break; 1763fc8bb91bSFelipe Balbi } 1764fc8bb91bSFelipe Balbi 1765fc8bb91bSFelipe Balbi pm_runtime_mark_last_busy(dev); 1766fc8bb91bSFelipe Balbi 1767fc8bb91bSFelipe Balbi return 0; 1768fc8bb91bSFelipe Balbi } 1769fc8bb91bSFelipe Balbi 1770fc8bb91bSFelipe Balbi static int dwc3_runtime_idle(struct device *dev) 1771fc8bb91bSFelipe Balbi { 1772fc8bb91bSFelipe Balbi struct dwc3 *dwc = dev_get_drvdata(dev); 1773fc8bb91bSFelipe Balbi 1774689bf72cSManu Gautam switch (dwc->current_dr_role) { 1775689bf72cSManu Gautam case DWC3_GCTL_PRTCAP_DEVICE: 1776fc8bb91bSFelipe Balbi if (dwc3_runtime_checks(dwc)) 1777fc8bb91bSFelipe Balbi return -EBUSY; 1778fc8bb91bSFelipe Balbi break; 1779689bf72cSManu Gautam case DWC3_GCTL_PRTCAP_HOST: 1780fc8bb91bSFelipe Balbi default: 1781fc8bb91bSFelipe Balbi /* do nothing */ 1782fc8bb91bSFelipe Balbi break; 1783fc8bb91bSFelipe Balbi } 1784fc8bb91bSFelipe Balbi 1785fc8bb91bSFelipe Balbi pm_runtime_mark_last_busy(dev); 1786fc8bb91bSFelipe Balbi pm_runtime_autosuspend(dev); 1787fc8bb91bSFelipe Balbi 1788fc8bb91bSFelipe Balbi return 0; 1789fc8bb91bSFelipe Balbi } 1790fc8bb91bSFelipe Balbi #endif /* CONFIG_PM */ 1791fc8bb91bSFelipe Balbi 1792fc8bb91bSFelipe Balbi #ifdef CONFIG_PM_SLEEP 1793fc8bb91bSFelipe Balbi static int dwc3_suspend(struct device *dev) 1794fc8bb91bSFelipe Balbi { 1795fc8bb91bSFelipe Balbi struct dwc3 *dwc = dev_get_drvdata(dev); 1796fc8bb91bSFelipe Balbi int ret; 1797fc8bb91bSFelipe Balbi 1798c4a5153eSManu Gautam ret = dwc3_suspend_common(dwc, PMSG_SUSPEND); 1799fc8bb91bSFelipe Balbi if (ret) 1800fc8bb91bSFelipe Balbi return ret; 1801fc8bb91bSFelipe Balbi 18026344475fSSekhar Nori pinctrl_pm_select_sleep_state(dev); 18036344475fSSekhar Nori 18047415f17cSFelipe Balbi return 0; 18057415f17cSFelipe Balbi } 18067415f17cSFelipe Balbi 18077415f17cSFelipe Balbi static int dwc3_resume(struct device *dev) 18087415f17cSFelipe Balbi { 18097415f17cSFelipe Balbi struct dwc3 *dwc = dev_get_drvdata(dev); 181057303488SKishon Vijay Abraham I int ret; 18117415f17cSFelipe Balbi 18126344475fSSekhar Nori pinctrl_pm_select_default_state(dev); 18136344475fSSekhar Nori 1814c4a5153eSManu Gautam ret = dwc3_resume_common(dwc, PMSG_RESUME); 181551f5d49aSFelipe Balbi if (ret) 18165c4ad318SFelipe Balbi return ret; 18175c4ad318SFelipe Balbi 18187415f17cSFelipe Balbi pm_runtime_disable(dev); 18197415f17cSFelipe Balbi pm_runtime_set_active(dev); 18207415f17cSFelipe Balbi pm_runtime_enable(dev); 18217415f17cSFelipe Balbi 18227415f17cSFelipe Balbi return 0; 18237415f17cSFelipe Balbi } 18247f370ed0SFelipe Balbi #endif /* CONFIG_PM_SLEEP */ 18257415f17cSFelipe Balbi 18267415f17cSFelipe Balbi static const struct dev_pm_ops dwc3_dev_pm_ops = { 18277415f17cSFelipe Balbi SET_SYSTEM_SLEEP_PM_OPS(dwc3_suspend, dwc3_resume) 1828fc8bb91bSFelipe Balbi SET_RUNTIME_PM_OPS(dwc3_runtime_suspend, dwc3_runtime_resume, 1829fc8bb91bSFelipe Balbi dwc3_runtime_idle) 18307415f17cSFelipe Balbi }; 18317415f17cSFelipe Balbi 18325088b6f5SKishon Vijay Abraham I #ifdef CONFIG_OF 18335088b6f5SKishon Vijay Abraham I static const struct of_device_id of_dwc3_match[] = { 18345088b6f5SKishon Vijay Abraham I { 183522a5aa17SFelipe Balbi .compatible = "snps,dwc3" 183622a5aa17SFelipe Balbi }, 183722a5aa17SFelipe Balbi { 18385088b6f5SKishon Vijay Abraham I .compatible = "synopsys,dwc3" 18395088b6f5SKishon Vijay Abraham I }, 18405088b6f5SKishon Vijay Abraham I { }, 18415088b6f5SKishon Vijay Abraham I }; 18425088b6f5SKishon Vijay Abraham I MODULE_DEVICE_TABLE(of, of_dwc3_match); 18435088b6f5SKishon Vijay Abraham I #endif 18445088b6f5SKishon Vijay Abraham I 1845404905a6SHeikki Krogerus #ifdef CONFIG_ACPI 1846404905a6SHeikki Krogerus 1847404905a6SHeikki Krogerus #define ACPI_ID_INTEL_BSW "808622B7" 1848404905a6SHeikki Krogerus 1849404905a6SHeikki Krogerus static const struct acpi_device_id dwc3_acpi_match[] = { 1850404905a6SHeikki Krogerus { ACPI_ID_INTEL_BSW, 0 }, 1851404905a6SHeikki Krogerus { }, 1852404905a6SHeikki Krogerus }; 1853404905a6SHeikki Krogerus MODULE_DEVICE_TABLE(acpi, dwc3_acpi_match); 1854404905a6SHeikki Krogerus #endif 1855404905a6SHeikki Krogerus 185672246da4SFelipe Balbi static struct platform_driver dwc3_driver = { 185772246da4SFelipe Balbi .probe = dwc3_probe, 18587690417dSBill Pemberton .remove = dwc3_remove, 185972246da4SFelipe Balbi .driver = { 186072246da4SFelipe Balbi .name = "dwc3", 18615088b6f5SKishon Vijay Abraham I .of_match_table = of_match_ptr(of_dwc3_match), 1862404905a6SHeikki Krogerus .acpi_match_table = ACPI_PTR(dwc3_acpi_match), 18637f370ed0SFelipe Balbi .pm = &dwc3_dev_pm_ops, 186472246da4SFelipe Balbi }, 186572246da4SFelipe Balbi }; 186672246da4SFelipe Balbi 1867b1116dccSTobias Klauser module_platform_driver(dwc3_driver); 1868b1116dccSTobias Klauser 18697ae4fc4dSSebastian Andrzej Siewior MODULE_ALIAS("platform:dwc3"); 187072246da4SFelipe Balbi MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>"); 18715945f789SFelipe Balbi MODULE_LICENSE("GPL v2"); 187272246da4SFelipe Balbi MODULE_DESCRIPTION("DesignWare USB3 DRD Controller Driver"); 1873