xref: /openbmc/linux/drivers/usb/dwc2/platform.c (revision e00a844a)
1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2 /*
3  * platform.c - DesignWare HS OTG Controller platform driver
4  *
5  * Copyright (C) Matthijs Kooijman <matthijs@stdin.nl>
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions, and the following disclaimer,
12  *    without modification.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  * 3. The names of the above-listed copyright holders may not be used
17  *    to endorse or promote products derived from this software without
18  *    specific prior written permission.
19  *
20  * ALTERNATIVELY, this software may be distributed under the terms of the
21  * GNU General Public License ("GPL") as published by the Free Software
22  * Foundation; either version 2 of the License, or (at your option) any
23  * later version.
24  *
25  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
26  * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
27  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
29  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
30  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
31  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
32  * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
33  * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
34  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
35  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36  */
37 
38 #include <linux/kernel.h>
39 #include <linux/module.h>
40 #include <linux/slab.h>
41 #include <linux/clk.h>
42 #include <linux/device.h>
43 #include <linux/dma-mapping.h>
44 #include <linux/of_device.h>
45 #include <linux/mutex.h>
46 #include <linux/platform_device.h>
47 #include <linux/phy/phy.h>
48 #include <linux/platform_data/s3c-hsotg.h>
49 #include <linux/reset.h>
50 
51 #include <linux/usb/of.h>
52 
53 #include "core.h"
54 #include "hcd.h"
55 #include "debug.h"
56 
57 static const char dwc2_driver_name[] = "dwc2";
58 
59 /*
60  * Check the dr_mode against the module configuration and hardware
61  * capabilities.
62  *
63  * The hardware, module, and dr_mode, can each be set to host, device,
64  * or otg. Check that all these values are compatible and adjust the
65  * value of dr_mode if possible.
66  *
67  *                      actual
68  *    HW  MOD dr_mode   dr_mode
69  *  ------------------------------
70  *   HST  HST  any    :  HST
71  *   HST  DEV  any    :  ---
72  *   HST  OTG  any    :  HST
73  *
74  *   DEV  HST  any    :  ---
75  *   DEV  DEV  any    :  DEV
76  *   DEV  OTG  any    :  DEV
77  *
78  *   OTG  HST  any    :  HST
79  *   OTG  DEV  any    :  DEV
80  *   OTG  OTG  any    :  dr_mode
81  */
82 static int dwc2_get_dr_mode(struct dwc2_hsotg *hsotg)
83 {
84 	enum usb_dr_mode mode;
85 
86 	hsotg->dr_mode = usb_get_dr_mode(hsotg->dev);
87 	if (hsotg->dr_mode == USB_DR_MODE_UNKNOWN)
88 		hsotg->dr_mode = USB_DR_MODE_OTG;
89 
90 	mode = hsotg->dr_mode;
91 
92 	if (dwc2_hw_is_device(hsotg)) {
93 		if (IS_ENABLED(CONFIG_USB_DWC2_HOST)) {
94 			dev_err(hsotg->dev,
95 				"Controller does not support host mode.\n");
96 			return -EINVAL;
97 		}
98 		mode = USB_DR_MODE_PERIPHERAL;
99 	} else if (dwc2_hw_is_host(hsotg)) {
100 		if (IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL)) {
101 			dev_err(hsotg->dev,
102 				"Controller does not support device mode.\n");
103 			return -EINVAL;
104 		}
105 		mode = USB_DR_MODE_HOST;
106 	} else {
107 		if (IS_ENABLED(CONFIG_USB_DWC2_HOST))
108 			mode = USB_DR_MODE_HOST;
109 		else if (IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL))
110 			mode = USB_DR_MODE_PERIPHERAL;
111 	}
112 
113 	if (mode != hsotg->dr_mode) {
114 		dev_warn(hsotg->dev,
115 			 "Configuration mismatch. dr_mode forced to %s\n",
116 			mode == USB_DR_MODE_HOST ? "host" : "device");
117 
118 		hsotg->dr_mode = mode;
119 	}
120 
121 	return 0;
122 }
123 
124 static int __dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg)
125 {
126 	struct platform_device *pdev = to_platform_device(hsotg->dev);
127 	int ret;
128 
129 	ret = regulator_bulk_enable(ARRAY_SIZE(hsotg->supplies),
130 				    hsotg->supplies);
131 	if (ret)
132 		return ret;
133 
134 	if (hsotg->clk) {
135 		ret = clk_prepare_enable(hsotg->clk);
136 		if (ret)
137 			return ret;
138 	}
139 
140 	if (hsotg->uphy) {
141 		ret = usb_phy_init(hsotg->uphy);
142 	} else if (hsotg->plat && hsotg->plat->phy_init) {
143 		ret = hsotg->plat->phy_init(pdev, hsotg->plat->phy_type);
144 	} else {
145 		ret = phy_power_on(hsotg->phy);
146 		if (ret == 0)
147 			ret = phy_init(hsotg->phy);
148 	}
149 
150 	return ret;
151 }
152 
153 /**
154  * dwc2_lowlevel_hw_enable - enable platform lowlevel hw resources
155  * @hsotg: The driver state
156  *
157  * A wrapper for platform code responsible for controlling
158  * low-level USB platform resources (phy, clock, regulators)
159  */
160 int dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg)
161 {
162 	int ret = __dwc2_lowlevel_hw_enable(hsotg);
163 
164 	if (ret == 0)
165 		hsotg->ll_hw_enabled = true;
166 	return ret;
167 }
168 
169 static int __dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg)
170 {
171 	struct platform_device *pdev = to_platform_device(hsotg->dev);
172 	int ret = 0;
173 
174 	if (hsotg->uphy) {
175 		usb_phy_shutdown(hsotg->uphy);
176 	} else if (hsotg->plat && hsotg->plat->phy_exit) {
177 		ret = hsotg->plat->phy_exit(pdev, hsotg->plat->phy_type);
178 	} else {
179 		ret = phy_exit(hsotg->phy);
180 		if (ret == 0)
181 			ret = phy_power_off(hsotg->phy);
182 	}
183 	if (ret)
184 		return ret;
185 
186 	if (hsotg->clk)
187 		clk_disable_unprepare(hsotg->clk);
188 
189 	ret = regulator_bulk_disable(ARRAY_SIZE(hsotg->supplies),
190 				     hsotg->supplies);
191 
192 	return ret;
193 }
194 
195 /**
196  * dwc2_lowlevel_hw_disable - disable platform lowlevel hw resources
197  * @hsotg: The driver state
198  *
199  * A wrapper for platform code responsible for controlling
200  * low-level USB platform resources (phy, clock, regulators)
201  */
202 int dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg)
203 {
204 	int ret = __dwc2_lowlevel_hw_disable(hsotg);
205 
206 	if (ret == 0)
207 		hsotg->ll_hw_enabled = false;
208 	return ret;
209 }
210 
211 static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg)
212 {
213 	int i, ret;
214 
215 	hsotg->reset = devm_reset_control_get_optional(hsotg->dev, "dwc2");
216 	if (IS_ERR(hsotg->reset)) {
217 		ret = PTR_ERR(hsotg->reset);
218 		dev_err(hsotg->dev, "error getting reset control %d\n", ret);
219 		return ret;
220 	}
221 
222 	reset_control_deassert(hsotg->reset);
223 
224 	/* Set default UTMI width */
225 	hsotg->phyif = GUSBCFG_PHYIF16;
226 
227 	/*
228 	 * Attempt to find a generic PHY, then look for an old style
229 	 * USB PHY and then fall back to pdata
230 	 */
231 	hsotg->phy = devm_phy_get(hsotg->dev, "usb2-phy");
232 	if (IS_ERR(hsotg->phy)) {
233 		ret = PTR_ERR(hsotg->phy);
234 		switch (ret) {
235 		case -ENODEV:
236 		case -ENOSYS:
237 			hsotg->phy = NULL;
238 			break;
239 		case -EPROBE_DEFER:
240 			return ret;
241 		default:
242 			dev_err(hsotg->dev, "error getting phy %d\n", ret);
243 			return ret;
244 		}
245 	}
246 
247 	if (!hsotg->phy) {
248 		hsotg->uphy = devm_usb_get_phy(hsotg->dev, USB_PHY_TYPE_USB2);
249 		if (IS_ERR(hsotg->uphy)) {
250 			ret = PTR_ERR(hsotg->uphy);
251 			switch (ret) {
252 			case -ENODEV:
253 			case -ENXIO:
254 				hsotg->uphy = NULL;
255 				break;
256 			case -EPROBE_DEFER:
257 				return ret;
258 			default:
259 				dev_err(hsotg->dev, "error getting usb phy %d\n",
260 					ret);
261 				return ret;
262 			}
263 		}
264 	}
265 
266 	hsotg->plat = dev_get_platdata(hsotg->dev);
267 
268 	if (hsotg->phy) {
269 		/*
270 		 * If using the generic PHY framework, check if the PHY bus
271 		 * width is 8-bit and set the phyif appropriately.
272 		 */
273 		if (phy_get_bus_width(hsotg->phy) == 8)
274 			hsotg->phyif = GUSBCFG_PHYIF8;
275 	}
276 
277 	/* Clock */
278 	hsotg->clk = devm_clk_get(hsotg->dev, "otg");
279 	if (IS_ERR(hsotg->clk)) {
280 		hsotg->clk = NULL;
281 		dev_dbg(hsotg->dev, "cannot get otg clock\n");
282 	}
283 
284 	/* Regulators */
285 	for (i = 0; i < ARRAY_SIZE(hsotg->supplies); i++)
286 		hsotg->supplies[i].supply = dwc2_hsotg_supply_names[i];
287 
288 	ret = devm_regulator_bulk_get(hsotg->dev, ARRAY_SIZE(hsotg->supplies),
289 				      hsotg->supplies);
290 	if (ret) {
291 		dev_err(hsotg->dev, "failed to request supplies: %d\n", ret);
292 		return ret;
293 	}
294 	return 0;
295 }
296 
297 /**
298  * dwc2_driver_remove() - Called when the DWC_otg core is unregistered with the
299  * DWC_otg driver
300  *
301  * @dev: Platform device
302  *
303  * This routine is called, for example, when the rmmod command is executed. The
304  * device may or may not be electrically present. If it is present, the driver
305  * stops device processing. Any resources used on behalf of this device are
306  * freed.
307  */
308 static int dwc2_driver_remove(struct platform_device *dev)
309 {
310 	struct dwc2_hsotg *hsotg = platform_get_drvdata(dev);
311 
312 	dwc2_debugfs_exit(hsotg);
313 	if (hsotg->hcd_enabled)
314 		dwc2_hcd_remove(hsotg);
315 	if (hsotg->gadget_enabled)
316 		dwc2_hsotg_remove(hsotg);
317 
318 	if (hsotg->ll_hw_enabled)
319 		dwc2_lowlevel_hw_disable(hsotg);
320 
321 	reset_control_assert(hsotg->reset);
322 
323 	return 0;
324 }
325 
326 /**
327  * dwc2_driver_shutdown() - Called on device shutdown
328  *
329  * @dev: Platform device
330  *
331  * In specific conditions (involving usb hubs) dwc2 devices can create a
332  * lot of interrupts, even to the point of overwhelming devices running
333  * at low frequencies. Some devices need to do special clock handling
334  * at shutdown-time which may bring the system clock below the threshold
335  * of being able to handle the dwc2 interrupts. Disabling dwc2-irqs
336  * prevents reboots/poweroffs from getting stuck in such cases.
337  */
338 static void dwc2_driver_shutdown(struct platform_device *dev)
339 {
340 	struct dwc2_hsotg *hsotg = platform_get_drvdata(dev);
341 
342 	disable_irq(hsotg->irq);
343 }
344 
345 /**
346  * dwc2_driver_probe() - Called when the DWC_otg core is bound to the DWC_otg
347  * driver
348  *
349  * @dev: Platform device
350  *
351  * This routine creates the driver components required to control the device
352  * (core, HCD, and PCD) and initializes the device. The driver components are
353  * stored in a dwc2_hsotg structure. A reference to the dwc2_hsotg is saved
354  * in the device private data. This allows the driver to access the dwc2_hsotg
355  * structure on subsequent calls to driver methods for this device.
356  */
357 static int dwc2_driver_probe(struct platform_device *dev)
358 {
359 	struct dwc2_hsotg *hsotg;
360 	struct resource *res;
361 	int retval;
362 
363 	hsotg = devm_kzalloc(&dev->dev, sizeof(*hsotg), GFP_KERNEL);
364 	if (!hsotg)
365 		return -ENOMEM;
366 
367 	hsotg->dev = &dev->dev;
368 
369 	/*
370 	 * Use reasonable defaults so platforms don't have to provide these.
371 	 */
372 	if (!dev->dev.dma_mask)
373 		dev->dev.dma_mask = &dev->dev.coherent_dma_mask;
374 	retval = dma_set_coherent_mask(&dev->dev, DMA_BIT_MASK(32));
375 	if (retval)
376 		return retval;
377 
378 	res = platform_get_resource(dev, IORESOURCE_MEM, 0);
379 	hsotg->regs = devm_ioremap_resource(&dev->dev, res);
380 	if (IS_ERR(hsotg->regs))
381 		return PTR_ERR(hsotg->regs);
382 
383 	dev_dbg(&dev->dev, "mapped PA %08lx to VA %p\n",
384 		(unsigned long)res->start, hsotg->regs);
385 
386 	retval = dwc2_lowlevel_hw_init(hsotg);
387 	if (retval)
388 		return retval;
389 
390 	spin_lock_init(&hsotg->lock);
391 
392 	hsotg->irq = platform_get_irq(dev, 0);
393 	if (hsotg->irq < 0) {
394 		dev_err(&dev->dev, "missing IRQ resource\n");
395 		return hsotg->irq;
396 	}
397 
398 	dev_dbg(hsotg->dev, "registering common handler for irq%d\n",
399 		hsotg->irq);
400 	retval = devm_request_irq(hsotg->dev, hsotg->irq,
401 				  dwc2_handle_common_intr, IRQF_SHARED,
402 				  dev_name(hsotg->dev), hsotg);
403 	if (retval)
404 		return retval;
405 
406 	retval = dwc2_lowlevel_hw_enable(hsotg);
407 	if (retval)
408 		return retval;
409 
410 	retval = dwc2_get_dr_mode(hsotg);
411 	if (retval)
412 		goto error;
413 
414 	/*
415 	 * Reset before dwc2_get_hwparams() then it could get power-on real
416 	 * reset value form registers.
417 	 */
418 	dwc2_core_reset_and_force_dr_mode(hsotg);
419 
420 	/* Detect config values from hardware */
421 	retval = dwc2_get_hwparams(hsotg);
422 	if (retval)
423 		goto error;
424 
425 	dwc2_force_dr_mode(hsotg);
426 
427 	retval = dwc2_init_params(hsotg);
428 	if (retval)
429 		goto error;
430 
431 	if (hsotg->dr_mode != USB_DR_MODE_HOST) {
432 		retval = dwc2_gadget_init(hsotg, hsotg->irq);
433 		if (retval)
434 			goto error;
435 		hsotg->gadget_enabled = 1;
436 	}
437 
438 	if (hsotg->dr_mode != USB_DR_MODE_PERIPHERAL) {
439 		retval = dwc2_hcd_init(hsotg);
440 		if (retval) {
441 			if (hsotg->gadget_enabled)
442 				dwc2_hsotg_remove(hsotg);
443 			goto error;
444 		}
445 		hsotg->hcd_enabled = 1;
446 	}
447 
448 	platform_set_drvdata(dev, hsotg);
449 
450 	dwc2_debugfs_init(hsotg);
451 
452 	/* Gadget code manages lowlevel hw on its own */
453 	if (hsotg->dr_mode == USB_DR_MODE_PERIPHERAL)
454 		dwc2_lowlevel_hw_disable(hsotg);
455 
456 	return 0;
457 
458 error:
459 	dwc2_lowlevel_hw_disable(hsotg);
460 	return retval;
461 }
462 
463 static int __maybe_unused dwc2_suspend(struct device *dev)
464 {
465 	struct dwc2_hsotg *dwc2 = dev_get_drvdata(dev);
466 	int ret = 0;
467 
468 	if (dwc2_is_device_mode(dwc2))
469 		dwc2_hsotg_suspend(dwc2);
470 
471 	if (dwc2->ll_hw_enabled)
472 		ret = __dwc2_lowlevel_hw_disable(dwc2);
473 
474 	return ret;
475 }
476 
477 static int __maybe_unused dwc2_resume(struct device *dev)
478 {
479 	struct dwc2_hsotg *dwc2 = dev_get_drvdata(dev);
480 	int ret = 0;
481 
482 	if (dwc2->ll_hw_enabled) {
483 		ret = __dwc2_lowlevel_hw_enable(dwc2);
484 		if (ret)
485 			return ret;
486 	}
487 
488 	if (dwc2_is_device_mode(dwc2))
489 		ret = dwc2_hsotg_resume(dwc2);
490 
491 	return ret;
492 }
493 
494 static const struct dev_pm_ops dwc2_dev_pm_ops = {
495 	SET_SYSTEM_SLEEP_PM_OPS(dwc2_suspend, dwc2_resume)
496 };
497 
498 static struct platform_driver dwc2_platform_driver = {
499 	.driver = {
500 		.name = dwc2_driver_name,
501 		.of_match_table = dwc2_of_match_table,
502 		.pm = &dwc2_dev_pm_ops,
503 	},
504 	.probe = dwc2_driver_probe,
505 	.remove = dwc2_driver_remove,
506 	.shutdown = dwc2_driver_shutdown,
507 };
508 
509 module_platform_driver(dwc2_platform_driver);
510 
511 MODULE_DESCRIPTION("DESIGNWARE HS OTG Platform Glue");
512 MODULE_AUTHOR("Matthijs Kooijman <matthijs@stdin.nl>");
513 MODULE_LICENSE("Dual BSD/GPL");
514