1 /* 2 * platform.c - DesignWare HS OTG Controller platform driver 3 * 4 * Copyright (C) Matthijs Kooijman <matthijs@stdin.nl> 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions, and the following disclaimer, 11 * without modification. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The names of the above-listed copyright holders may not be used 16 * to endorse or promote products derived from this software without 17 * specific prior written permission. 18 * 19 * ALTERNATIVELY, this software may be distributed under the terms of the 20 * GNU General Public License ("GPL") as published by the Free Software 21 * Foundation; either version 2 of the License, or (at your option) any 22 * later version. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS 25 * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 26 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 28 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 29 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 30 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 31 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 32 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 33 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 34 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 */ 36 37 #include <linux/kernel.h> 38 #include <linux/module.h> 39 #include <linux/slab.h> 40 #include <linux/clk.h> 41 #include <linux/device.h> 42 #include <linux/dma-mapping.h> 43 #include <linux/of_device.h> 44 #include <linux/mutex.h> 45 #include <linux/platform_device.h> 46 #include <linux/phy/phy.h> 47 #include <linux/platform_data/s3c-hsotg.h> 48 49 #include <linux/usb/of.h> 50 51 #include "core.h" 52 #include "hcd.h" 53 #include "debug.h" 54 55 static const char dwc2_driver_name[] = "dwc2"; 56 57 static const struct dwc2_core_params params_bcm2835 = { 58 .otg_cap = 0, /* HNP/SRP capable */ 59 .otg_ver = 0, /* 1.3 */ 60 .dma_enable = 1, 61 .dma_desc_enable = 0, 62 .speed = 0, /* High Speed */ 63 .enable_dynamic_fifo = 1, 64 .en_multiple_tx_fifo = 1, 65 .host_rx_fifo_size = 774, /* 774 DWORDs */ 66 .host_nperio_tx_fifo_size = 256, /* 256 DWORDs */ 67 .host_perio_tx_fifo_size = 512, /* 512 DWORDs */ 68 .max_transfer_size = 65535, 69 .max_packet_count = 511, 70 .host_channels = 8, 71 .phy_type = 1, /* UTMI */ 72 .phy_utmi_width = 8, /* 8 bits */ 73 .phy_ulpi_ddr = 0, /* Single */ 74 .phy_ulpi_ext_vbus = 0, 75 .i2c_enable = 0, 76 .ulpi_fs_ls = 0, 77 .host_support_fs_ls_low_power = 0, 78 .host_ls_low_power_phy_clk = 0, /* 48 MHz */ 79 .ts_dline = 0, 80 .reload_ctl = 0, 81 .ahbcfg = 0x10, 82 .uframe_sched = 0, 83 .external_id_pin_ctl = -1, 84 .hibernation = -1, 85 }; 86 87 static const struct dwc2_core_params params_rk3066 = { 88 .otg_cap = 2, /* non-HNP/non-SRP */ 89 .otg_ver = -1, 90 .dma_enable = -1, 91 .dma_desc_enable = 0, 92 .speed = -1, 93 .enable_dynamic_fifo = 1, 94 .en_multiple_tx_fifo = -1, 95 .host_rx_fifo_size = 520, /* 520 DWORDs */ 96 .host_nperio_tx_fifo_size = 128, /* 128 DWORDs */ 97 .host_perio_tx_fifo_size = 256, /* 256 DWORDs */ 98 .max_transfer_size = 65535, 99 .max_packet_count = -1, 100 .host_channels = -1, 101 .phy_type = -1, 102 .phy_utmi_width = -1, 103 .phy_ulpi_ddr = -1, 104 .phy_ulpi_ext_vbus = -1, 105 .i2c_enable = -1, 106 .ulpi_fs_ls = -1, 107 .host_support_fs_ls_low_power = -1, 108 .host_ls_low_power_phy_clk = -1, 109 .ts_dline = -1, 110 .reload_ctl = -1, 111 .ahbcfg = GAHBCFG_HBSTLEN_INCR16 << 112 GAHBCFG_HBSTLEN_SHIFT, 113 .uframe_sched = -1, 114 .external_id_pin_ctl = -1, 115 .hibernation = -1, 116 }; 117 118 static int __dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg) 119 { 120 struct platform_device *pdev = to_platform_device(hsotg->dev); 121 int ret; 122 123 ret = regulator_bulk_enable(ARRAY_SIZE(hsotg->supplies), 124 hsotg->supplies); 125 if (ret) 126 return ret; 127 128 ret = clk_prepare_enable(hsotg->clk); 129 if (ret) 130 return ret; 131 132 if (hsotg->uphy) 133 ret = usb_phy_init(hsotg->uphy); 134 else if (hsotg->plat && hsotg->plat->phy_init) 135 ret = hsotg->plat->phy_init(pdev, hsotg->plat->phy_type); 136 else { 137 ret = phy_power_on(hsotg->phy); 138 if (ret == 0) 139 ret = phy_init(hsotg->phy); 140 } 141 142 return ret; 143 } 144 145 /** 146 * dwc2_lowlevel_hw_enable - enable platform lowlevel hw resources 147 * @hsotg: The driver state 148 * 149 * A wrapper for platform code responsible for controlling 150 * low-level USB platform resources (phy, clock, regulators) 151 */ 152 int dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg) 153 { 154 int ret = __dwc2_lowlevel_hw_enable(hsotg); 155 156 if (ret == 0) 157 hsotg->ll_hw_enabled = true; 158 return ret; 159 } 160 161 static int __dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg) 162 { 163 struct platform_device *pdev = to_platform_device(hsotg->dev); 164 int ret = 0; 165 166 if (hsotg->uphy) 167 usb_phy_shutdown(hsotg->uphy); 168 else if (hsotg->plat && hsotg->plat->phy_exit) 169 ret = hsotg->plat->phy_exit(pdev, hsotg->plat->phy_type); 170 else { 171 ret = phy_exit(hsotg->phy); 172 if (ret == 0) 173 ret = phy_power_off(hsotg->phy); 174 } 175 if (ret) 176 return ret; 177 178 clk_disable_unprepare(hsotg->clk); 179 180 ret = regulator_bulk_disable(ARRAY_SIZE(hsotg->supplies), 181 hsotg->supplies); 182 183 return ret; 184 } 185 186 /** 187 * dwc2_lowlevel_hw_disable - disable platform lowlevel hw resources 188 * @hsotg: The driver state 189 * 190 * A wrapper for platform code responsible for controlling 191 * low-level USB platform resources (phy, clock, regulators) 192 */ 193 int dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg) 194 { 195 int ret = __dwc2_lowlevel_hw_disable(hsotg); 196 197 if (ret == 0) 198 hsotg->ll_hw_enabled = false; 199 return ret; 200 } 201 202 static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg) 203 { 204 int i, ret; 205 206 /* Set default UTMI width */ 207 hsotg->phyif = GUSBCFG_PHYIF16; 208 209 /* 210 * Attempt to find a generic PHY, then look for an old style 211 * USB PHY and then fall back to pdata 212 */ 213 hsotg->phy = devm_phy_get(hsotg->dev, "usb2-phy"); 214 if (IS_ERR(hsotg->phy)) { 215 hsotg->phy = NULL; 216 hsotg->uphy = devm_usb_get_phy(hsotg->dev, USB_PHY_TYPE_USB2); 217 if (IS_ERR(hsotg->uphy)) 218 hsotg->uphy = NULL; 219 else 220 hsotg->plat = dev_get_platdata(hsotg->dev); 221 } 222 223 if (hsotg->phy) { 224 /* 225 * If using the generic PHY framework, check if the PHY bus 226 * width is 8-bit and set the phyif appropriately. 227 */ 228 if (phy_get_bus_width(hsotg->phy) == 8) 229 hsotg->phyif = GUSBCFG_PHYIF8; 230 } 231 232 if (!hsotg->phy && !hsotg->uphy && !hsotg->plat) { 233 dev_err(hsotg->dev, "no platform data or transceiver defined\n"); 234 return -EPROBE_DEFER; 235 } 236 237 /* Clock */ 238 hsotg->clk = devm_clk_get(hsotg->dev, "otg"); 239 if (IS_ERR(hsotg->clk)) { 240 hsotg->clk = NULL; 241 dev_dbg(hsotg->dev, "cannot get otg clock\n"); 242 } 243 244 /* Regulators */ 245 for (i = 0; i < ARRAY_SIZE(hsotg->supplies); i++) 246 hsotg->supplies[i].supply = dwc2_hsotg_supply_names[i]; 247 248 ret = devm_regulator_bulk_get(hsotg->dev, ARRAY_SIZE(hsotg->supplies), 249 hsotg->supplies); 250 if (ret) { 251 dev_err(hsotg->dev, "failed to request supplies: %d\n", ret); 252 return ret; 253 } 254 return 0; 255 } 256 257 /** 258 * dwc2_driver_remove() - Called when the DWC_otg core is unregistered with the 259 * DWC_otg driver 260 * 261 * @dev: Platform device 262 * 263 * This routine is called, for example, when the rmmod command is executed. The 264 * device may or may not be electrically present. If it is present, the driver 265 * stops device processing. Any resources used on behalf of this device are 266 * freed. 267 */ 268 static int dwc2_driver_remove(struct platform_device *dev) 269 { 270 struct dwc2_hsotg *hsotg = platform_get_drvdata(dev); 271 272 dwc2_debugfs_exit(hsotg); 273 if (hsotg->hcd_enabled) 274 dwc2_hcd_remove(hsotg); 275 if (hsotg->gadget_enabled) 276 dwc2_hsotg_remove(hsotg); 277 278 if (hsotg->ll_hw_enabled) 279 dwc2_lowlevel_hw_disable(hsotg); 280 281 return 0; 282 } 283 284 static const struct of_device_id dwc2_of_match_table[] = { 285 { .compatible = "brcm,bcm2835-usb", .data = ¶ms_bcm2835 }, 286 { .compatible = "rockchip,rk3066-usb", .data = ¶ms_rk3066 }, 287 { .compatible = "snps,dwc2", .data = NULL }, 288 { .compatible = "samsung,s3c6400-hsotg", .data = NULL}, 289 {}, 290 }; 291 MODULE_DEVICE_TABLE(of, dwc2_of_match_table); 292 293 /** 294 * dwc2_driver_probe() - Called when the DWC_otg core is bound to the DWC_otg 295 * driver 296 * 297 * @dev: Platform device 298 * 299 * This routine creates the driver components required to control the device 300 * (core, HCD, and PCD) and initializes the device. The driver components are 301 * stored in a dwc2_hsotg structure. A reference to the dwc2_hsotg is saved 302 * in the device private data. This allows the driver to access the dwc2_hsotg 303 * structure on subsequent calls to driver methods for this device. 304 */ 305 static int dwc2_driver_probe(struct platform_device *dev) 306 { 307 const struct of_device_id *match; 308 const struct dwc2_core_params *params; 309 struct dwc2_core_params defparams; 310 struct dwc2_hsotg *hsotg; 311 struct resource *res; 312 int retval; 313 int irq; 314 315 match = of_match_device(dwc2_of_match_table, &dev->dev); 316 if (match && match->data) { 317 params = match->data; 318 } else { 319 /* Default all params to autodetect */ 320 dwc2_set_all_params(&defparams, -1); 321 params = &defparams; 322 323 /* 324 * Disable descriptor dma mode by default as the HW can support 325 * it, but does not support it for SPLIT transactions. 326 */ 327 defparams.dma_desc_enable = 0; 328 } 329 330 hsotg = devm_kzalloc(&dev->dev, sizeof(*hsotg), GFP_KERNEL); 331 if (!hsotg) 332 return -ENOMEM; 333 334 hsotg->dev = &dev->dev; 335 336 /* 337 * Use reasonable defaults so platforms don't have to provide these. 338 */ 339 if (!dev->dev.dma_mask) 340 dev->dev.dma_mask = &dev->dev.coherent_dma_mask; 341 retval = dma_set_coherent_mask(&dev->dev, DMA_BIT_MASK(32)); 342 if (retval) 343 return retval; 344 345 irq = platform_get_irq(dev, 0); 346 if (irq < 0) { 347 dev_err(&dev->dev, "missing IRQ resource\n"); 348 return irq; 349 } 350 351 dev_dbg(hsotg->dev, "registering common handler for irq%d\n", 352 irq); 353 retval = devm_request_irq(hsotg->dev, irq, 354 dwc2_handle_common_intr, IRQF_SHARED, 355 dev_name(hsotg->dev), hsotg); 356 if (retval) 357 return retval; 358 359 res = platform_get_resource(dev, IORESOURCE_MEM, 0); 360 hsotg->regs = devm_ioremap_resource(&dev->dev, res); 361 if (IS_ERR(hsotg->regs)) 362 return PTR_ERR(hsotg->regs); 363 364 dev_dbg(&dev->dev, "mapped PA %08lx to VA %p\n", 365 (unsigned long)res->start, hsotg->regs); 366 367 hsotg->dr_mode = usb_get_dr_mode(&dev->dev); 368 if (IS_ENABLED(CONFIG_USB_DWC2_HOST) && 369 hsotg->dr_mode != USB_DR_MODE_HOST) { 370 hsotg->dr_mode = USB_DR_MODE_HOST; 371 dev_warn(hsotg->dev, 372 "Configuration mismatch. Forcing host mode\n"); 373 } else if (IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL) && 374 hsotg->dr_mode != USB_DR_MODE_PERIPHERAL) { 375 hsotg->dr_mode = USB_DR_MODE_PERIPHERAL; 376 dev_warn(hsotg->dev, 377 "Configuration mismatch. Forcing peripheral mode\n"); 378 } 379 380 retval = dwc2_lowlevel_hw_init(hsotg); 381 if (retval) 382 return retval; 383 384 spin_lock_init(&hsotg->lock); 385 386 hsotg->core_params = devm_kzalloc(&dev->dev, 387 sizeof(*hsotg->core_params), GFP_KERNEL); 388 if (!hsotg->core_params) 389 return -ENOMEM; 390 391 dwc2_set_all_params(hsotg->core_params, -1); 392 393 retval = dwc2_lowlevel_hw_enable(hsotg); 394 if (retval) 395 return retval; 396 397 /* Detect config values from hardware */ 398 retval = dwc2_get_hwparams(hsotg); 399 if (retval) 400 goto error; 401 402 /* Validate parameter values */ 403 dwc2_set_parameters(hsotg, params); 404 405 if (hsotg->dr_mode != USB_DR_MODE_HOST) { 406 retval = dwc2_gadget_init(hsotg, irq); 407 if (retval) 408 goto error; 409 hsotg->gadget_enabled = 1; 410 } 411 412 if (hsotg->dr_mode != USB_DR_MODE_PERIPHERAL) { 413 retval = dwc2_hcd_init(hsotg, irq); 414 if (retval) { 415 if (hsotg->gadget_enabled) 416 dwc2_hsotg_remove(hsotg); 417 goto error; 418 } 419 hsotg->hcd_enabled = 1; 420 } 421 422 platform_set_drvdata(dev, hsotg); 423 424 dwc2_debugfs_init(hsotg); 425 426 /* Gadget code manages lowlevel hw on its own */ 427 if (hsotg->dr_mode == USB_DR_MODE_PERIPHERAL) 428 dwc2_lowlevel_hw_disable(hsotg); 429 430 return 0; 431 432 error: 433 dwc2_lowlevel_hw_disable(hsotg); 434 return retval; 435 } 436 437 static int __maybe_unused dwc2_suspend(struct device *dev) 438 { 439 struct dwc2_hsotg *dwc2 = dev_get_drvdata(dev); 440 int ret = 0; 441 442 if (dwc2_is_device_mode(dwc2)) 443 dwc2_hsotg_suspend(dwc2); 444 445 if (dwc2->ll_hw_enabled) 446 ret = __dwc2_lowlevel_hw_disable(dwc2); 447 448 return ret; 449 } 450 451 static int __maybe_unused dwc2_resume(struct device *dev) 452 { 453 struct dwc2_hsotg *dwc2 = dev_get_drvdata(dev); 454 int ret = 0; 455 456 if (dwc2->ll_hw_enabled) { 457 ret = __dwc2_lowlevel_hw_enable(dwc2); 458 if (ret) 459 return ret; 460 } 461 462 if (dwc2_is_device_mode(dwc2)) 463 ret = dwc2_hsotg_resume(dwc2); 464 465 return ret; 466 } 467 468 static const struct dev_pm_ops dwc2_dev_pm_ops = { 469 SET_SYSTEM_SLEEP_PM_OPS(dwc2_suspend, dwc2_resume) 470 }; 471 472 static struct platform_driver dwc2_platform_driver = { 473 .driver = { 474 .name = dwc2_driver_name, 475 .of_match_table = dwc2_of_match_table, 476 .pm = &dwc2_dev_pm_ops, 477 }, 478 .probe = dwc2_driver_probe, 479 .remove = dwc2_driver_remove, 480 }; 481 482 module_platform_driver(dwc2_platform_driver); 483 484 MODULE_DESCRIPTION("DESIGNWARE HS OTG Platform Glue"); 485 MODULE_AUTHOR("Matthijs Kooijman <matthijs@stdin.nl>"); 486 MODULE_LICENSE("Dual BSD/GPL"); 487