xref: /openbmc/linux/drivers/usb/dwc2/pci.c (revision 30614cf3)
1 /*
2  * pci.c - DesignWare HS OTG Controller PCI driver
3  *
4  * Copyright (C) 2004-2013 Synopsys, Inc.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions, and the following disclaimer,
11  *    without modification.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. The names of the above-listed copyright holders may not be used
16  *    to endorse or promote products derived from this software without
17  *    specific prior written permission.
18  *
19  * ALTERNATIVELY, this software may be distributed under the terms of the
20  * GNU General Public License ("GPL") as published by the Free Software
21  * Foundation; either version 2 of the License, or (at your option) any
22  * later version.
23  *
24  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
25  * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
26  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
27  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
28  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
29  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
30  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
31  * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
32  * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
33  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
34  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35  */
36 
37 /*
38  * Provides the initialization and cleanup entry points for the DWC_otg PCI
39  * driver
40  */
41 #include <linux/kernel.h>
42 #include <linux/module.h>
43 #include <linux/moduleparam.h>
44 #include <linux/spinlock.h>
45 #include <linux/interrupt.h>
46 #include <linux/io.h>
47 #include <linux/slab.h>
48 #include <linux/pci.h>
49 #include <linux/usb.h>
50 
51 #include <linux/usb/hcd.h>
52 #include <linux/usb/ch11.h>
53 
54 #include "core.h"
55 #include "hcd.h"
56 
57 #define PCI_VENDOR_ID_SYNOPSYS		0x16c3
58 #define PCI_PRODUCT_ID_HAPS_HSOTG	0xabc0
59 
60 static const char dwc2_driver_name[] = "dwc2";
61 
62 static const struct dwc2_core_params dwc2_module_params = {
63 	.otg_cap			= -1,
64 	.otg_ver			= -1,
65 	.dma_enable			= -1,
66 	.dma_desc_enable		= 0,
67 	.speed				= -1,
68 	.enable_dynamic_fifo		= -1,
69 	.en_multiple_tx_fifo		= -1,
70 	.host_rx_fifo_size		= 1024,
71 	.host_nperio_tx_fifo_size	= 256,
72 	.host_perio_tx_fifo_size	= 1024,
73 	.max_transfer_size		= 65535,
74 	.max_packet_count		= 511,
75 	.host_channels			= -1,
76 	.phy_type			= -1,
77 	.phy_utmi_width			= -1,
78 	.phy_ulpi_ddr			= -1,
79 	.phy_ulpi_ext_vbus		= -1,
80 	.i2c_enable			= -1,
81 	.ulpi_fs_ls			= -1,
82 	.host_support_fs_ls_low_power	= -1,
83 	.host_ls_low_power_phy_clk	= -1,
84 	.ts_dline			= -1,
85 	.reload_ctl			= -1,
86 	.ahbcfg				= -1,
87 	.uframe_sched			= -1,
88 };
89 
90 /**
91  * dwc2_driver_remove() - Called when the DWC_otg core is unregistered with the
92  * DWC_otg driver
93  *
94  * @dev: Bus device
95  *
96  * This routine is called, for example, when the rmmod command is executed. The
97  * device may or may not be electrically present. If it is present, the driver
98  * stops device processing. Any resources used on behalf of this device are
99  * freed.
100  */
101 static void dwc2_driver_remove(struct pci_dev *dev)
102 {
103 	struct dwc2_hsotg *hsotg = pci_get_drvdata(dev);
104 
105 	dwc2_hcd_remove(hsotg);
106 	pci_disable_device(dev);
107 }
108 
109 /**
110  * dwc2_driver_probe() - Called when the DWC_otg core is bound to the DWC_otg
111  * driver
112  *
113  * @dev: Bus device
114  *
115  * This routine creates the driver components required to control the device
116  * (core, HCD, and PCD) and initializes the device. The driver components are
117  * stored in a dwc2_hsotg structure. A reference to the dwc2_hsotg is saved
118  * in the device private data. This allows the driver to access the dwc2_hsotg
119  * structure on subsequent calls to driver methods for this device.
120  */
121 static int dwc2_driver_probe(struct pci_dev *dev,
122 			     const struct pci_device_id *id)
123 {
124 	struct dwc2_hsotg *hsotg;
125 	int retval;
126 
127 	hsotg = devm_kzalloc(&dev->dev, sizeof(*hsotg), GFP_KERNEL);
128 	if (!hsotg)
129 		return -ENOMEM;
130 
131 	hsotg->dev = &dev->dev;
132 	hsotg->regs = devm_ioremap_resource(&dev->dev, &dev->resource[0]);
133 	if (IS_ERR(hsotg->regs))
134 		return PTR_ERR(hsotg->regs);
135 
136 	dev_dbg(&dev->dev, "mapped PA %08lx to VA %p\n",
137 		(unsigned long)pci_resource_start(dev, 0), hsotg->regs);
138 
139 	if (pci_enable_device(dev) < 0)
140 		return -ENODEV;
141 
142 	pci_set_master(dev);
143 
144 	retval = dwc2_hcd_init(hsotg, dev->irq, &dwc2_module_params);
145 	if (retval) {
146 		pci_disable_device(dev);
147 		return retval;
148 	}
149 
150 	pci_set_drvdata(dev, hsotg);
151 
152 	return retval;
153 }
154 
155 static const struct pci_device_id dwc2_pci_ids[] = {
156 	{
157 		PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS, PCI_PRODUCT_ID_HAPS_HSOTG),
158 	},
159 	{
160 		PCI_DEVICE(PCI_VENDOR_ID_STMICRO,
161 			   PCI_DEVICE_ID_STMICRO_USB_OTG),
162 	},
163 	{ /* end: all zeroes */ }
164 };
165 MODULE_DEVICE_TABLE(pci, dwc2_pci_ids);
166 
167 static struct pci_driver dwc2_pci_driver = {
168 	.name = dwc2_driver_name,
169 	.id_table = dwc2_pci_ids,
170 	.probe = dwc2_driver_probe,
171 	.remove = dwc2_driver_remove,
172 };
173 
174 module_pci_driver(dwc2_pci_driver);
175 
176 MODULE_DESCRIPTION("DESIGNWARE HS OTG PCI Bus Glue");
177 MODULE_AUTHOR("Synopsys, Inc.");
178 MODULE_LICENSE("Dual BSD/GPL");
179