1 // SPDX-License-Identifier: GPL-2.0 2 /** 3 * debugfs.c - Designware USB2 DRD controller debugfs 4 * 5 * Copyright (C) 2015 Intel Corporation 6 * Mian Yousaf Kaukab <yousaf.kaukab@intel.com> 7 */ 8 9 #include <linux/spinlock.h> 10 #include <linux/debugfs.h> 11 #include <linux/seq_file.h> 12 #include <linux/uaccess.h> 13 14 #include "core.h" 15 #include "debug.h" 16 17 #if IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL) || \ 18 IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE) 19 /** 20 * testmode_write - debugfs: change usb test mode 21 * @seq: The seq file to write to. 22 * @v: Unused parameter. 23 * 24 * This debugfs entry modify the current usb test mode. 25 */ 26 static ssize_t testmode_write(struct file *file, const char __user *ubuf, size_t 27 count, loff_t *ppos) 28 { 29 struct seq_file *s = file->private_data; 30 struct dwc2_hsotg *hsotg = s->private; 31 unsigned long flags; 32 u32 testmode = 0; 33 char buf[32]; 34 35 if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) 36 return -EFAULT; 37 38 if (!strncmp(buf, "test_j", 6)) 39 testmode = TEST_J; 40 else if (!strncmp(buf, "test_k", 6)) 41 testmode = TEST_K; 42 else if (!strncmp(buf, "test_se0_nak", 12)) 43 testmode = TEST_SE0_NAK; 44 else if (!strncmp(buf, "test_packet", 11)) 45 testmode = TEST_PACKET; 46 else if (!strncmp(buf, "test_force_enable", 17)) 47 testmode = TEST_FORCE_EN; 48 else 49 testmode = 0; 50 51 spin_lock_irqsave(&hsotg->lock, flags); 52 dwc2_hsotg_set_test_mode(hsotg, testmode); 53 spin_unlock_irqrestore(&hsotg->lock, flags); 54 return count; 55 } 56 57 /** 58 * testmode_show - debugfs: show usb test mode state 59 * @seq: The seq file to write to. 60 * @v: Unused parameter. 61 * 62 * This debugfs entry shows which usb test mode is currently enabled. 63 */ 64 static int testmode_show(struct seq_file *s, void *unused) 65 { 66 struct dwc2_hsotg *hsotg = s->private; 67 unsigned long flags; 68 int dctl; 69 70 spin_lock_irqsave(&hsotg->lock, flags); 71 dctl = dwc2_readl(hsotg->regs + DCTL); 72 dctl &= DCTL_TSTCTL_MASK; 73 dctl >>= DCTL_TSTCTL_SHIFT; 74 spin_unlock_irqrestore(&hsotg->lock, flags); 75 76 switch (dctl) { 77 case 0: 78 seq_puts(s, "no test\n"); 79 break; 80 case TEST_J: 81 seq_puts(s, "test_j\n"); 82 break; 83 case TEST_K: 84 seq_puts(s, "test_k\n"); 85 break; 86 case TEST_SE0_NAK: 87 seq_puts(s, "test_se0_nak\n"); 88 break; 89 case TEST_PACKET: 90 seq_puts(s, "test_packet\n"); 91 break; 92 case TEST_FORCE_EN: 93 seq_puts(s, "test_force_enable\n"); 94 break; 95 default: 96 seq_printf(s, "UNKNOWN %d\n", dctl); 97 } 98 99 return 0; 100 } 101 102 static int testmode_open(struct inode *inode, struct file *file) 103 { 104 return single_open(file, testmode_show, inode->i_private); 105 } 106 107 static const struct file_operations testmode_fops = { 108 .owner = THIS_MODULE, 109 .open = testmode_open, 110 .write = testmode_write, 111 .read = seq_read, 112 .llseek = seq_lseek, 113 .release = single_release, 114 }; 115 116 /** 117 * state_show - debugfs: show overall driver and device state. 118 * @seq: The seq file to write to. 119 * @v: Unused parameter. 120 * 121 * This debugfs entry shows the overall state of the hardware and 122 * some general information about each of the endpoints available 123 * to the system. 124 */ 125 static int state_show(struct seq_file *seq, void *v) 126 { 127 struct dwc2_hsotg *hsotg = seq->private; 128 void __iomem *regs = hsotg->regs; 129 int idx; 130 131 seq_printf(seq, "DCFG=0x%08x, DCTL=0x%08x, DSTS=0x%08x\n", 132 dwc2_readl(regs + DCFG), 133 dwc2_readl(regs + DCTL), 134 dwc2_readl(regs + DSTS)); 135 136 seq_printf(seq, "DIEPMSK=0x%08x, DOEPMASK=0x%08x\n", 137 dwc2_readl(regs + DIEPMSK), dwc2_readl(regs + DOEPMSK)); 138 139 seq_printf(seq, "GINTMSK=0x%08x, GINTSTS=0x%08x\n", 140 dwc2_readl(regs + GINTMSK), 141 dwc2_readl(regs + GINTSTS)); 142 143 seq_printf(seq, "DAINTMSK=0x%08x, DAINT=0x%08x\n", 144 dwc2_readl(regs + DAINTMSK), 145 dwc2_readl(regs + DAINT)); 146 147 seq_printf(seq, "GNPTXSTS=0x%08x, GRXSTSR=%08x\n", 148 dwc2_readl(regs + GNPTXSTS), 149 dwc2_readl(regs + GRXSTSR)); 150 151 seq_puts(seq, "\nEndpoint status:\n"); 152 153 for (idx = 0; idx < hsotg->num_of_eps; idx++) { 154 u32 in, out; 155 156 in = dwc2_readl(regs + DIEPCTL(idx)); 157 out = dwc2_readl(regs + DOEPCTL(idx)); 158 159 seq_printf(seq, "ep%d: DIEPCTL=0x%08x, DOEPCTL=0x%08x", 160 idx, in, out); 161 162 in = dwc2_readl(regs + DIEPTSIZ(idx)); 163 out = dwc2_readl(regs + DOEPTSIZ(idx)); 164 165 seq_printf(seq, ", DIEPTSIZ=0x%08x, DOEPTSIZ=0x%08x", 166 in, out); 167 168 seq_puts(seq, "\n"); 169 } 170 171 return 0; 172 } 173 DEFINE_SHOW_ATTRIBUTE(state); 174 175 /** 176 * fifo_show - debugfs: show the fifo information 177 * @seq: The seq_file to write data to. 178 * @v: Unused parameter. 179 * 180 * Show the FIFO information for the overall fifo and all the 181 * periodic transmission FIFOs. 182 */ 183 static int fifo_show(struct seq_file *seq, void *v) 184 { 185 struct dwc2_hsotg *hsotg = seq->private; 186 void __iomem *regs = hsotg->regs; 187 u32 val; 188 int idx; 189 190 seq_puts(seq, "Non-periodic FIFOs:\n"); 191 seq_printf(seq, "RXFIFO: Size %d\n", dwc2_readl(regs + GRXFSIZ)); 192 193 val = dwc2_readl(regs + GNPTXFSIZ); 194 seq_printf(seq, "NPTXFIFO: Size %d, Start 0x%08x\n", 195 val >> FIFOSIZE_DEPTH_SHIFT, 196 val & FIFOSIZE_STARTADDR_MASK); 197 198 seq_puts(seq, "\nPeriodic TXFIFOs:\n"); 199 200 for (idx = 1; idx < hsotg->num_of_eps; idx++) { 201 val = dwc2_readl(regs + DPTXFSIZN(idx)); 202 203 seq_printf(seq, "\tDPTXFIFO%2d: Size %d, Start 0x%08x\n", idx, 204 val >> FIFOSIZE_DEPTH_SHIFT, 205 val & FIFOSIZE_STARTADDR_MASK); 206 } 207 208 return 0; 209 } 210 DEFINE_SHOW_ATTRIBUTE(fifo); 211 212 static const char *decode_direction(int is_in) 213 { 214 return is_in ? "in" : "out"; 215 } 216 217 /** 218 * ep_show - debugfs: show the state of an endpoint. 219 * @seq: The seq_file to write data to. 220 * @v: Unused parameter. 221 * 222 * This debugfs entry shows the state of the given endpoint (one is 223 * registered for each available). 224 */ 225 static int ep_show(struct seq_file *seq, void *v) 226 { 227 struct dwc2_hsotg_ep *ep = seq->private; 228 struct dwc2_hsotg *hsotg = ep->parent; 229 struct dwc2_hsotg_req *req; 230 void __iomem *regs = hsotg->regs; 231 int index = ep->index; 232 int show_limit = 15; 233 unsigned long flags; 234 235 seq_printf(seq, "Endpoint index %d, named %s, dir %s:\n", 236 ep->index, ep->ep.name, decode_direction(ep->dir_in)); 237 238 /* first show the register state */ 239 240 seq_printf(seq, "\tDIEPCTL=0x%08x, DOEPCTL=0x%08x\n", 241 dwc2_readl(regs + DIEPCTL(index)), 242 dwc2_readl(regs + DOEPCTL(index))); 243 244 seq_printf(seq, "\tDIEPDMA=0x%08x, DOEPDMA=0x%08x\n", 245 dwc2_readl(regs + DIEPDMA(index)), 246 dwc2_readl(regs + DOEPDMA(index))); 247 248 seq_printf(seq, "\tDIEPINT=0x%08x, DOEPINT=0x%08x\n", 249 dwc2_readl(regs + DIEPINT(index)), 250 dwc2_readl(regs + DOEPINT(index))); 251 252 seq_printf(seq, "\tDIEPTSIZ=0x%08x, DOEPTSIZ=0x%08x\n", 253 dwc2_readl(regs + DIEPTSIZ(index)), 254 dwc2_readl(regs + DOEPTSIZ(index))); 255 256 seq_puts(seq, "\n"); 257 seq_printf(seq, "mps %d\n", ep->ep.maxpacket); 258 seq_printf(seq, "total_data=%ld\n", ep->total_data); 259 260 seq_printf(seq, "request list (%p,%p):\n", 261 ep->queue.next, ep->queue.prev); 262 263 spin_lock_irqsave(&hsotg->lock, flags); 264 265 list_for_each_entry(req, &ep->queue, queue) { 266 if (--show_limit < 0) { 267 seq_puts(seq, "not showing more requests...\n"); 268 break; 269 } 270 271 seq_printf(seq, "%c req %p: %d bytes @%p, ", 272 req == ep->req ? '*' : ' ', 273 req, req->req.length, req->req.buf); 274 seq_printf(seq, "%d done, res %d\n", 275 req->req.actual, req->req.status); 276 } 277 278 spin_unlock_irqrestore(&hsotg->lock, flags); 279 280 return 0; 281 } 282 DEFINE_SHOW_ATTRIBUTE(ep); 283 284 /** 285 * dwc2_hsotg_create_debug - create debugfs directory and files 286 * @hsotg: The driver state 287 * 288 * Create the debugfs files to allow the user to get information 289 * about the state of the system. The directory name is created 290 * with the same name as the device itself, in case we end up 291 * with multiple blocks in future systems. 292 */ 293 static void dwc2_hsotg_create_debug(struct dwc2_hsotg *hsotg) 294 { 295 struct dentry *root; 296 struct dentry *file; 297 unsigned int epidx; 298 299 root = hsotg->debug_root; 300 301 /* create general state file */ 302 303 file = debugfs_create_file("state", 0444, root, hsotg, &state_fops); 304 if (IS_ERR(file)) 305 dev_err(hsotg->dev, "%s: failed to create state\n", __func__); 306 307 file = debugfs_create_file("testmode", 0644, root, hsotg, 308 &testmode_fops); 309 if (IS_ERR(file)) 310 dev_err(hsotg->dev, "%s: failed to create testmode\n", 311 __func__); 312 313 file = debugfs_create_file("fifo", 0444, root, hsotg, &fifo_fops); 314 if (IS_ERR(file)) 315 dev_err(hsotg->dev, "%s: failed to create fifo\n", __func__); 316 317 /* Create one file for each out endpoint */ 318 for (epidx = 0; epidx < hsotg->num_of_eps; epidx++) { 319 struct dwc2_hsotg_ep *ep; 320 321 ep = hsotg->eps_out[epidx]; 322 if (ep) { 323 file = debugfs_create_file(ep->name, 0444, 324 root, ep, &ep_fops); 325 if (IS_ERR(file)) 326 dev_err(hsotg->dev, "failed to create %s debug file\n", 327 ep->name); 328 } 329 } 330 /* Create one file for each in endpoint. EP0 is handled with out eps */ 331 for (epidx = 1; epidx < hsotg->num_of_eps; epidx++) { 332 struct dwc2_hsotg_ep *ep; 333 334 ep = hsotg->eps_in[epidx]; 335 if (ep) { 336 file = debugfs_create_file(ep->name, 0444, 337 root, ep, &ep_fops); 338 if (IS_ERR(file)) 339 dev_err(hsotg->dev, "failed to create %s debug file\n", 340 ep->name); 341 } 342 } 343 } 344 #else 345 static inline void dwc2_hsotg_create_debug(struct dwc2_hsotg *hsotg) {} 346 #endif 347 348 /* dwc2_hsotg_delete_debug is removed as cleanup in done in dwc2_debugfs_exit */ 349 350 #define dump_register(nm) \ 351 { \ 352 .name = #nm, \ 353 .offset = nm, \ 354 } 355 356 static const struct debugfs_reg32 dwc2_regs[] = { 357 /* 358 * Accessing registers like this can trigger mode mismatch interrupt. 359 * However, according to dwc2 databook, the register access, in this 360 * case, is completed on the processor bus but is ignored by the core 361 * and does not affect its operation. 362 */ 363 dump_register(GOTGCTL), 364 dump_register(GOTGINT), 365 dump_register(GAHBCFG), 366 dump_register(GUSBCFG), 367 dump_register(GRSTCTL), 368 dump_register(GINTSTS), 369 dump_register(GINTMSK), 370 dump_register(GRXSTSR), 371 dump_register(GRXSTSP), 372 dump_register(GRXFSIZ), 373 dump_register(GNPTXFSIZ), 374 dump_register(GNPTXSTS), 375 dump_register(GI2CCTL), 376 dump_register(GPVNDCTL), 377 dump_register(GGPIO), 378 dump_register(GUID), 379 dump_register(GSNPSID), 380 dump_register(GHWCFG1), 381 dump_register(GHWCFG2), 382 dump_register(GHWCFG3), 383 dump_register(GHWCFG4), 384 dump_register(GLPMCFG), 385 dump_register(GPWRDN), 386 dump_register(GDFIFOCFG), 387 dump_register(ADPCTL), 388 dump_register(HPTXFSIZ), 389 dump_register(DPTXFSIZN(1)), 390 dump_register(DPTXFSIZN(2)), 391 dump_register(DPTXFSIZN(3)), 392 dump_register(DPTXFSIZN(4)), 393 dump_register(DPTXFSIZN(5)), 394 dump_register(DPTXFSIZN(6)), 395 dump_register(DPTXFSIZN(7)), 396 dump_register(DPTXFSIZN(8)), 397 dump_register(DPTXFSIZN(9)), 398 dump_register(DPTXFSIZN(10)), 399 dump_register(DPTXFSIZN(11)), 400 dump_register(DPTXFSIZN(12)), 401 dump_register(DPTXFSIZN(13)), 402 dump_register(DPTXFSIZN(14)), 403 dump_register(DPTXFSIZN(15)), 404 dump_register(DCFG), 405 dump_register(DCTL), 406 dump_register(DSTS), 407 dump_register(DIEPMSK), 408 dump_register(DOEPMSK), 409 dump_register(DAINT), 410 dump_register(DAINTMSK), 411 dump_register(DTKNQR1), 412 dump_register(DTKNQR2), 413 dump_register(DTKNQR3), 414 dump_register(DTKNQR4), 415 dump_register(DVBUSDIS), 416 dump_register(DVBUSPULSE), 417 dump_register(DIEPCTL(0)), 418 dump_register(DIEPCTL(1)), 419 dump_register(DIEPCTL(2)), 420 dump_register(DIEPCTL(3)), 421 dump_register(DIEPCTL(4)), 422 dump_register(DIEPCTL(5)), 423 dump_register(DIEPCTL(6)), 424 dump_register(DIEPCTL(7)), 425 dump_register(DIEPCTL(8)), 426 dump_register(DIEPCTL(9)), 427 dump_register(DIEPCTL(10)), 428 dump_register(DIEPCTL(11)), 429 dump_register(DIEPCTL(12)), 430 dump_register(DIEPCTL(13)), 431 dump_register(DIEPCTL(14)), 432 dump_register(DIEPCTL(15)), 433 dump_register(DOEPCTL(0)), 434 dump_register(DOEPCTL(1)), 435 dump_register(DOEPCTL(2)), 436 dump_register(DOEPCTL(3)), 437 dump_register(DOEPCTL(4)), 438 dump_register(DOEPCTL(5)), 439 dump_register(DOEPCTL(6)), 440 dump_register(DOEPCTL(7)), 441 dump_register(DOEPCTL(8)), 442 dump_register(DOEPCTL(9)), 443 dump_register(DOEPCTL(10)), 444 dump_register(DOEPCTL(11)), 445 dump_register(DOEPCTL(12)), 446 dump_register(DOEPCTL(13)), 447 dump_register(DOEPCTL(14)), 448 dump_register(DOEPCTL(15)), 449 dump_register(DIEPINT(0)), 450 dump_register(DIEPINT(1)), 451 dump_register(DIEPINT(2)), 452 dump_register(DIEPINT(3)), 453 dump_register(DIEPINT(4)), 454 dump_register(DIEPINT(5)), 455 dump_register(DIEPINT(6)), 456 dump_register(DIEPINT(7)), 457 dump_register(DIEPINT(8)), 458 dump_register(DIEPINT(9)), 459 dump_register(DIEPINT(10)), 460 dump_register(DIEPINT(11)), 461 dump_register(DIEPINT(12)), 462 dump_register(DIEPINT(13)), 463 dump_register(DIEPINT(14)), 464 dump_register(DIEPINT(15)), 465 dump_register(DOEPINT(0)), 466 dump_register(DOEPINT(1)), 467 dump_register(DOEPINT(2)), 468 dump_register(DOEPINT(3)), 469 dump_register(DOEPINT(4)), 470 dump_register(DOEPINT(5)), 471 dump_register(DOEPINT(6)), 472 dump_register(DOEPINT(7)), 473 dump_register(DOEPINT(8)), 474 dump_register(DOEPINT(9)), 475 dump_register(DOEPINT(10)), 476 dump_register(DOEPINT(11)), 477 dump_register(DOEPINT(12)), 478 dump_register(DOEPINT(13)), 479 dump_register(DOEPINT(14)), 480 dump_register(DOEPINT(15)), 481 dump_register(DIEPTSIZ(0)), 482 dump_register(DIEPTSIZ(1)), 483 dump_register(DIEPTSIZ(2)), 484 dump_register(DIEPTSIZ(3)), 485 dump_register(DIEPTSIZ(4)), 486 dump_register(DIEPTSIZ(5)), 487 dump_register(DIEPTSIZ(6)), 488 dump_register(DIEPTSIZ(7)), 489 dump_register(DIEPTSIZ(8)), 490 dump_register(DIEPTSIZ(9)), 491 dump_register(DIEPTSIZ(10)), 492 dump_register(DIEPTSIZ(11)), 493 dump_register(DIEPTSIZ(12)), 494 dump_register(DIEPTSIZ(13)), 495 dump_register(DIEPTSIZ(14)), 496 dump_register(DIEPTSIZ(15)), 497 dump_register(DOEPTSIZ(0)), 498 dump_register(DOEPTSIZ(1)), 499 dump_register(DOEPTSIZ(2)), 500 dump_register(DOEPTSIZ(3)), 501 dump_register(DOEPTSIZ(4)), 502 dump_register(DOEPTSIZ(5)), 503 dump_register(DOEPTSIZ(6)), 504 dump_register(DOEPTSIZ(7)), 505 dump_register(DOEPTSIZ(8)), 506 dump_register(DOEPTSIZ(9)), 507 dump_register(DOEPTSIZ(10)), 508 dump_register(DOEPTSIZ(11)), 509 dump_register(DOEPTSIZ(12)), 510 dump_register(DOEPTSIZ(13)), 511 dump_register(DOEPTSIZ(14)), 512 dump_register(DOEPTSIZ(15)), 513 dump_register(DIEPDMA(0)), 514 dump_register(DIEPDMA(1)), 515 dump_register(DIEPDMA(2)), 516 dump_register(DIEPDMA(3)), 517 dump_register(DIEPDMA(4)), 518 dump_register(DIEPDMA(5)), 519 dump_register(DIEPDMA(6)), 520 dump_register(DIEPDMA(7)), 521 dump_register(DIEPDMA(8)), 522 dump_register(DIEPDMA(9)), 523 dump_register(DIEPDMA(10)), 524 dump_register(DIEPDMA(11)), 525 dump_register(DIEPDMA(12)), 526 dump_register(DIEPDMA(13)), 527 dump_register(DIEPDMA(14)), 528 dump_register(DIEPDMA(15)), 529 dump_register(DOEPDMA(0)), 530 dump_register(DOEPDMA(1)), 531 dump_register(DOEPDMA(2)), 532 dump_register(DOEPDMA(3)), 533 dump_register(DOEPDMA(4)), 534 dump_register(DOEPDMA(5)), 535 dump_register(DOEPDMA(6)), 536 dump_register(DOEPDMA(7)), 537 dump_register(DOEPDMA(8)), 538 dump_register(DOEPDMA(9)), 539 dump_register(DOEPDMA(10)), 540 dump_register(DOEPDMA(11)), 541 dump_register(DOEPDMA(12)), 542 dump_register(DOEPDMA(13)), 543 dump_register(DOEPDMA(14)), 544 dump_register(DOEPDMA(15)), 545 dump_register(DTXFSTS(0)), 546 dump_register(DTXFSTS(1)), 547 dump_register(DTXFSTS(2)), 548 dump_register(DTXFSTS(3)), 549 dump_register(DTXFSTS(4)), 550 dump_register(DTXFSTS(5)), 551 dump_register(DTXFSTS(6)), 552 dump_register(DTXFSTS(7)), 553 dump_register(DTXFSTS(8)), 554 dump_register(DTXFSTS(9)), 555 dump_register(DTXFSTS(10)), 556 dump_register(DTXFSTS(11)), 557 dump_register(DTXFSTS(12)), 558 dump_register(DTXFSTS(13)), 559 dump_register(DTXFSTS(14)), 560 dump_register(DTXFSTS(15)), 561 dump_register(PCGCTL), 562 dump_register(HCFG), 563 dump_register(HFIR), 564 dump_register(HFNUM), 565 dump_register(HPTXSTS), 566 dump_register(HAINT), 567 dump_register(HAINTMSK), 568 dump_register(HFLBADDR), 569 dump_register(HPRT0), 570 dump_register(HCCHAR(0)), 571 dump_register(HCCHAR(1)), 572 dump_register(HCCHAR(2)), 573 dump_register(HCCHAR(3)), 574 dump_register(HCCHAR(4)), 575 dump_register(HCCHAR(5)), 576 dump_register(HCCHAR(6)), 577 dump_register(HCCHAR(7)), 578 dump_register(HCCHAR(8)), 579 dump_register(HCCHAR(9)), 580 dump_register(HCCHAR(10)), 581 dump_register(HCCHAR(11)), 582 dump_register(HCCHAR(12)), 583 dump_register(HCCHAR(13)), 584 dump_register(HCCHAR(14)), 585 dump_register(HCCHAR(15)), 586 dump_register(HCSPLT(0)), 587 dump_register(HCSPLT(1)), 588 dump_register(HCSPLT(2)), 589 dump_register(HCSPLT(3)), 590 dump_register(HCSPLT(4)), 591 dump_register(HCSPLT(5)), 592 dump_register(HCSPLT(6)), 593 dump_register(HCSPLT(7)), 594 dump_register(HCSPLT(8)), 595 dump_register(HCSPLT(9)), 596 dump_register(HCSPLT(10)), 597 dump_register(HCSPLT(11)), 598 dump_register(HCSPLT(12)), 599 dump_register(HCSPLT(13)), 600 dump_register(HCSPLT(14)), 601 dump_register(HCSPLT(15)), 602 dump_register(HCINT(0)), 603 dump_register(HCINT(1)), 604 dump_register(HCINT(2)), 605 dump_register(HCINT(3)), 606 dump_register(HCINT(4)), 607 dump_register(HCINT(5)), 608 dump_register(HCINT(6)), 609 dump_register(HCINT(7)), 610 dump_register(HCINT(8)), 611 dump_register(HCINT(9)), 612 dump_register(HCINT(10)), 613 dump_register(HCINT(11)), 614 dump_register(HCINT(12)), 615 dump_register(HCINT(13)), 616 dump_register(HCINT(14)), 617 dump_register(HCINT(15)), 618 dump_register(HCINTMSK(0)), 619 dump_register(HCINTMSK(1)), 620 dump_register(HCINTMSK(2)), 621 dump_register(HCINTMSK(3)), 622 dump_register(HCINTMSK(4)), 623 dump_register(HCINTMSK(5)), 624 dump_register(HCINTMSK(6)), 625 dump_register(HCINTMSK(7)), 626 dump_register(HCINTMSK(8)), 627 dump_register(HCINTMSK(9)), 628 dump_register(HCINTMSK(10)), 629 dump_register(HCINTMSK(11)), 630 dump_register(HCINTMSK(12)), 631 dump_register(HCINTMSK(13)), 632 dump_register(HCINTMSK(14)), 633 dump_register(HCINTMSK(15)), 634 dump_register(HCTSIZ(0)), 635 dump_register(HCTSIZ(1)), 636 dump_register(HCTSIZ(2)), 637 dump_register(HCTSIZ(3)), 638 dump_register(HCTSIZ(4)), 639 dump_register(HCTSIZ(5)), 640 dump_register(HCTSIZ(6)), 641 dump_register(HCTSIZ(7)), 642 dump_register(HCTSIZ(8)), 643 dump_register(HCTSIZ(9)), 644 dump_register(HCTSIZ(10)), 645 dump_register(HCTSIZ(11)), 646 dump_register(HCTSIZ(12)), 647 dump_register(HCTSIZ(13)), 648 dump_register(HCTSIZ(14)), 649 dump_register(HCTSIZ(15)), 650 dump_register(HCDMA(0)), 651 dump_register(HCDMA(1)), 652 dump_register(HCDMA(2)), 653 dump_register(HCDMA(3)), 654 dump_register(HCDMA(4)), 655 dump_register(HCDMA(5)), 656 dump_register(HCDMA(6)), 657 dump_register(HCDMA(7)), 658 dump_register(HCDMA(8)), 659 dump_register(HCDMA(9)), 660 dump_register(HCDMA(10)), 661 dump_register(HCDMA(11)), 662 dump_register(HCDMA(12)), 663 dump_register(HCDMA(13)), 664 dump_register(HCDMA(14)), 665 dump_register(HCDMA(15)), 666 dump_register(HCDMAB(0)), 667 dump_register(HCDMAB(1)), 668 dump_register(HCDMAB(2)), 669 dump_register(HCDMAB(3)), 670 dump_register(HCDMAB(4)), 671 dump_register(HCDMAB(5)), 672 dump_register(HCDMAB(6)), 673 dump_register(HCDMAB(7)), 674 dump_register(HCDMAB(8)), 675 dump_register(HCDMAB(9)), 676 dump_register(HCDMAB(10)), 677 dump_register(HCDMAB(11)), 678 dump_register(HCDMAB(12)), 679 dump_register(HCDMAB(13)), 680 dump_register(HCDMAB(14)), 681 dump_register(HCDMAB(15)), 682 }; 683 684 #define print_param(_seq, _ptr, _param) \ 685 seq_printf((_seq), "%-30s: %d\n", #_param, (_ptr)->_param) 686 687 #define print_param_hex(_seq, _ptr, _param) \ 688 seq_printf((_seq), "%-30s: 0x%x\n", #_param, (_ptr)->_param) 689 690 static int params_show(struct seq_file *seq, void *v) 691 { 692 struct dwc2_hsotg *hsotg = seq->private; 693 struct dwc2_core_params *p = &hsotg->params; 694 int i; 695 696 print_param(seq, p, otg_cap); 697 print_param(seq, p, dma_desc_enable); 698 print_param(seq, p, dma_desc_fs_enable); 699 print_param(seq, p, speed); 700 print_param(seq, p, enable_dynamic_fifo); 701 print_param(seq, p, en_multiple_tx_fifo); 702 print_param(seq, p, host_rx_fifo_size); 703 print_param(seq, p, host_nperio_tx_fifo_size); 704 print_param(seq, p, host_perio_tx_fifo_size); 705 print_param(seq, p, max_transfer_size); 706 print_param(seq, p, max_packet_count); 707 print_param(seq, p, host_channels); 708 print_param(seq, p, phy_type); 709 print_param(seq, p, phy_utmi_width); 710 print_param(seq, p, phy_ulpi_ddr); 711 print_param(seq, p, phy_ulpi_ext_vbus); 712 print_param(seq, p, i2c_enable); 713 print_param(seq, p, ulpi_fs_ls); 714 print_param(seq, p, host_support_fs_ls_low_power); 715 print_param(seq, p, host_ls_low_power_phy_clk); 716 print_param(seq, p, ts_dline); 717 print_param(seq, p, reload_ctl); 718 print_param_hex(seq, p, ahbcfg); 719 print_param(seq, p, uframe_sched); 720 print_param(seq, p, external_id_pin_ctl); 721 print_param(seq, p, power_down); 722 print_param(seq, p, lpm); 723 print_param(seq, p, lpm_clock_gating); 724 print_param(seq, p, besl); 725 print_param(seq, p, hird_threshold_en); 726 print_param(seq, p, hird_threshold); 727 print_param(seq, p, host_dma); 728 print_param(seq, p, g_dma); 729 print_param(seq, p, g_dma_desc); 730 print_param(seq, p, g_rx_fifo_size); 731 print_param(seq, p, g_np_tx_fifo_size); 732 733 for (i = 0; i < MAX_EPS_CHANNELS; i++) { 734 char str[32]; 735 736 snprintf(str, 32, "g_tx_fifo_size[%d]", i); 737 seq_printf(seq, "%-30s: %d\n", str, p->g_tx_fifo_size[i]); 738 } 739 740 return 0; 741 } 742 DEFINE_SHOW_ATTRIBUTE(params); 743 744 static int hw_params_show(struct seq_file *seq, void *v) 745 { 746 struct dwc2_hsotg *hsotg = seq->private; 747 struct dwc2_hw_params *hw = &hsotg->hw_params; 748 749 print_param(seq, hw, op_mode); 750 print_param(seq, hw, arch); 751 print_param(seq, hw, dma_desc_enable); 752 print_param(seq, hw, enable_dynamic_fifo); 753 print_param(seq, hw, en_multiple_tx_fifo); 754 print_param(seq, hw, rx_fifo_size); 755 print_param(seq, hw, host_nperio_tx_fifo_size); 756 print_param(seq, hw, dev_nperio_tx_fifo_size); 757 print_param(seq, hw, host_perio_tx_fifo_size); 758 print_param(seq, hw, nperio_tx_q_depth); 759 print_param(seq, hw, host_perio_tx_q_depth); 760 print_param(seq, hw, dev_token_q_depth); 761 print_param(seq, hw, max_transfer_size); 762 print_param(seq, hw, max_packet_count); 763 print_param(seq, hw, host_channels); 764 print_param(seq, hw, hs_phy_type); 765 print_param(seq, hw, fs_phy_type); 766 print_param(seq, hw, i2c_enable); 767 print_param(seq, hw, num_dev_ep); 768 print_param(seq, hw, num_dev_perio_in_ep); 769 print_param(seq, hw, total_fifo_size); 770 print_param(seq, hw, power_optimized); 771 print_param(seq, hw, utmi_phy_data_width); 772 print_param_hex(seq, hw, snpsid); 773 print_param_hex(seq, hw, dev_ep_dirs); 774 775 return 0; 776 } 777 DEFINE_SHOW_ATTRIBUTE(hw_params); 778 779 static int dr_mode_show(struct seq_file *seq, void *v) 780 { 781 struct dwc2_hsotg *hsotg = seq->private; 782 const char *dr_mode = ""; 783 784 device_property_read_string(hsotg->dev, "dr_mode", &dr_mode); 785 seq_printf(seq, "%s\n", dr_mode); 786 return 0; 787 } 788 DEFINE_SHOW_ATTRIBUTE(dr_mode); 789 790 int dwc2_debugfs_init(struct dwc2_hsotg *hsotg) 791 { 792 int ret; 793 struct dentry *file; 794 795 hsotg->debug_root = debugfs_create_dir(dev_name(hsotg->dev), NULL); 796 if (!hsotg->debug_root) { 797 ret = -ENOMEM; 798 goto err0; 799 } 800 801 file = debugfs_create_file("params", 0444, 802 hsotg->debug_root, 803 hsotg, ¶ms_fops); 804 if (IS_ERR(file)) 805 dev_err(hsotg->dev, "%s: failed to create params\n", __func__); 806 807 file = debugfs_create_file("hw_params", 0444, 808 hsotg->debug_root, 809 hsotg, &hw_params_fops); 810 if (IS_ERR(file)) 811 dev_err(hsotg->dev, "%s: failed to create hw_params\n", 812 __func__); 813 814 file = debugfs_create_file("dr_mode", 0444, 815 hsotg->debug_root, 816 hsotg, &dr_mode_fops); 817 if (IS_ERR(file)) 818 dev_err(hsotg->dev, "%s: failed to create dr_mode\n", __func__); 819 820 /* Add gadget debugfs nodes */ 821 dwc2_hsotg_create_debug(hsotg); 822 823 hsotg->regset = devm_kzalloc(hsotg->dev, sizeof(*hsotg->regset), 824 GFP_KERNEL); 825 if (!hsotg->regset) { 826 ret = -ENOMEM; 827 goto err1; 828 } 829 830 hsotg->regset->regs = dwc2_regs; 831 hsotg->regset->nregs = ARRAY_SIZE(dwc2_regs); 832 hsotg->regset->base = hsotg->regs; 833 834 file = debugfs_create_regset32("regdump", 0444, hsotg->debug_root, 835 hsotg->regset); 836 if (!file) { 837 ret = -ENOMEM; 838 goto err1; 839 } 840 841 return 0; 842 err1: 843 debugfs_remove_recursive(hsotg->debug_root); 844 err0: 845 return ret; 846 } 847 848 void dwc2_debugfs_exit(struct dwc2_hsotg *hsotg) 849 { 850 debugfs_remove_recursive(hsotg->debug_root); 851 hsotg->debug_root = NULL; 852 } 853