1 /* 2 * Copyright 2012 Freescale Semiconductor, Inc. 3 * 4 * The code contained herein is licensed under the GNU General Public 5 * License. You may obtain a copy of the GNU General Public License 6 * Version 2 or later at the following locations: 7 * 8 * http://www.opensource.org/licenses/gpl-license.html 9 * http://www.gnu.org/copyleft/gpl.html 10 */ 11 12 #include <linux/module.h> 13 #include <linux/of_platform.h> 14 #include <linux/err.h> 15 #include <linux/io.h> 16 #include <linux/delay.h> 17 18 #include "ci_hdrc_imx.h" 19 20 #define MX25_USB_PHY_CTRL_OFFSET 0x08 21 #define MX25_BM_EXTERNAL_VBUS_DIVIDER BIT(23) 22 23 #define MX25_EHCI_INTERFACE_SINGLE_UNI (2 << 0) 24 #define MX25_EHCI_INTERFACE_DIFF_UNI (0 << 0) 25 #define MX25_EHCI_INTERFACE_MASK (0xf) 26 27 #define MX25_OTG_SIC_SHIFT 29 28 #define MX25_OTG_SIC_MASK (0x3 << MX25_OTG_SIC_SHIFT) 29 #define MX25_OTG_PM_BIT BIT(24) 30 #define MX25_OTG_PP_BIT BIT(11) 31 #define MX25_OTG_OCPOL_BIT BIT(3) 32 33 #define MX25_H1_SIC_SHIFT 21 34 #define MX25_H1_SIC_MASK (0x3 << MX25_H1_SIC_SHIFT) 35 #define MX25_H1_PP_BIT BIT(18) 36 #define MX25_H1_PM_BIT BIT(16) 37 #define MX25_H1_IPPUE_UP_BIT BIT(7) 38 #define MX25_H1_IPPUE_DOWN_BIT BIT(6) 39 #define MX25_H1_TLL_BIT BIT(5) 40 #define MX25_H1_USBTE_BIT BIT(4) 41 #define MX25_H1_OCPOL_BIT BIT(2) 42 43 #define MX27_H1_PM_BIT BIT(8) 44 #define MX27_H2_PM_BIT BIT(16) 45 #define MX27_OTG_PM_BIT BIT(24) 46 47 #define MX53_USB_OTG_PHY_CTRL_0_OFFSET 0x08 48 #define MX53_USB_OTG_PHY_CTRL_1_OFFSET 0x0c 49 #define MX53_USB_CTRL_1_OFFSET 0x10 50 #define MX53_USB_CTRL_1_H2_XCVR_CLK_SEL_MASK (0x11 << 2) 51 #define MX53_USB_CTRL_1_H2_XCVR_CLK_SEL_ULPI BIT(2) 52 #define MX53_USB_CTRL_1_H3_XCVR_CLK_SEL_MASK (0x11 << 6) 53 #define MX53_USB_CTRL_1_H3_XCVR_CLK_SEL_ULPI BIT(6) 54 #define MX53_USB_UH2_CTRL_OFFSET 0x14 55 #define MX53_USB_UH3_CTRL_OFFSET 0x18 56 #define MX53_USB_CLKONOFF_CTRL_OFFSET 0x24 57 #define MX53_USB_CLKONOFF_CTRL_H2_INT60CKOFF BIT(21) 58 #define MX53_USB_CLKONOFF_CTRL_H3_INT60CKOFF BIT(22) 59 #define MX53_BM_OVER_CUR_DIS_H1 BIT(5) 60 #define MX53_BM_OVER_CUR_DIS_OTG BIT(8) 61 #define MX53_BM_OVER_CUR_DIS_UHx BIT(30) 62 #define MX53_USB_CTRL_1_UH2_ULPI_EN BIT(26) 63 #define MX53_USB_CTRL_1_UH3_ULPI_EN BIT(27) 64 #define MX53_USB_UHx_CTRL_WAKE_UP_EN BIT(7) 65 #define MX53_USB_UHx_CTRL_ULPI_INT_EN BIT(8) 66 #define MX53_USB_PHYCTRL1_PLLDIV_MASK 0x3 67 #define MX53_USB_PLL_DIV_24_MHZ 0x01 68 69 #define MX6_BM_NON_BURST_SETTING BIT(1) 70 #define MX6_BM_OVER_CUR_DIS BIT(7) 71 #define MX6_BM_OVER_CUR_POLARITY BIT(8) 72 #define MX6_BM_WAKEUP_ENABLE BIT(10) 73 #define MX6_BM_ID_WAKEUP BIT(16) 74 #define MX6_BM_VBUS_WAKEUP BIT(17) 75 #define MX6SX_BM_DPDM_WAKEUP_EN BIT(29) 76 #define MX6_BM_WAKEUP_INTR BIT(31) 77 #define MX6_USB_OTG1_PHY_CTRL 0x18 78 /* For imx6dql, it is host-only controller, for later imx6, it is otg's */ 79 #define MX6_USB_OTG2_PHY_CTRL 0x1c 80 #define MX6SX_USB_VBUS_WAKEUP_SOURCE(v) (v << 8) 81 #define MX6SX_USB_VBUS_WAKEUP_SOURCE_VBUS MX6SX_USB_VBUS_WAKEUP_SOURCE(0) 82 #define MX6SX_USB_VBUS_WAKEUP_SOURCE_AVALID MX6SX_USB_VBUS_WAKEUP_SOURCE(1) 83 #define MX6SX_USB_VBUS_WAKEUP_SOURCE_BVALID MX6SX_USB_VBUS_WAKEUP_SOURCE(2) 84 #define MX6SX_USB_VBUS_WAKEUP_SOURCE_SESS_END MX6SX_USB_VBUS_WAKEUP_SOURCE(3) 85 86 #define VF610_OVER_CUR_DIS BIT(7) 87 88 #define MX7D_USBNC_USB_CTRL2 0x4 89 #define MX7D_USB_VBUS_WAKEUP_SOURCE_MASK 0x3 90 #define MX7D_USB_VBUS_WAKEUP_SOURCE(v) (v << 0) 91 #define MX7D_USB_VBUS_WAKEUP_SOURCE_VBUS MX7D_USB_VBUS_WAKEUP_SOURCE(0) 92 #define MX7D_USB_VBUS_WAKEUP_SOURCE_AVALID MX7D_USB_VBUS_WAKEUP_SOURCE(1) 93 #define MX7D_USB_VBUS_WAKEUP_SOURCE_BVALID MX7D_USB_VBUS_WAKEUP_SOURCE(2) 94 #define MX7D_USB_VBUS_WAKEUP_SOURCE_SESS_END MX7D_USB_VBUS_WAKEUP_SOURCE(3) 95 96 struct usbmisc_ops { 97 /* It's called once when probe a usb device */ 98 int (*init)(struct imx_usbmisc_data *data); 99 /* It's called once after adding a usb device */ 100 int (*post)(struct imx_usbmisc_data *data); 101 /* It's called when we need to enable/disable usb wakeup */ 102 int (*set_wakeup)(struct imx_usbmisc_data *data, bool enabled); 103 }; 104 105 struct imx_usbmisc { 106 void __iomem *base; 107 spinlock_t lock; 108 const struct usbmisc_ops *ops; 109 }; 110 111 static inline bool is_imx53_usbmisc(struct imx_usbmisc_data *data); 112 113 static int usbmisc_imx25_init(struct imx_usbmisc_data *data) 114 { 115 struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); 116 unsigned long flags; 117 u32 val = 0; 118 119 if (data->index > 1) 120 return -EINVAL; 121 122 spin_lock_irqsave(&usbmisc->lock, flags); 123 switch (data->index) { 124 case 0: 125 val = readl(usbmisc->base); 126 val &= ~(MX25_OTG_SIC_MASK | MX25_OTG_PP_BIT); 127 val |= (MX25_EHCI_INTERFACE_DIFF_UNI & MX25_EHCI_INTERFACE_MASK) << MX25_OTG_SIC_SHIFT; 128 val |= (MX25_OTG_PM_BIT | MX25_OTG_OCPOL_BIT); 129 writel(val, usbmisc->base); 130 break; 131 case 1: 132 val = readl(usbmisc->base); 133 val &= ~(MX25_H1_SIC_MASK | MX25_H1_PP_BIT | MX25_H1_IPPUE_UP_BIT); 134 val |= (MX25_EHCI_INTERFACE_SINGLE_UNI & MX25_EHCI_INTERFACE_MASK) << MX25_H1_SIC_SHIFT; 135 val |= (MX25_H1_PM_BIT | MX25_H1_OCPOL_BIT | MX25_H1_TLL_BIT | 136 MX25_H1_USBTE_BIT | MX25_H1_IPPUE_DOWN_BIT); 137 138 writel(val, usbmisc->base); 139 140 break; 141 } 142 spin_unlock_irqrestore(&usbmisc->lock, flags); 143 144 return 0; 145 } 146 147 static int usbmisc_imx25_post(struct imx_usbmisc_data *data) 148 { 149 struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); 150 void __iomem *reg; 151 unsigned long flags; 152 u32 val; 153 154 if (data->index > 2) 155 return -EINVAL; 156 157 if (data->evdo) { 158 spin_lock_irqsave(&usbmisc->lock, flags); 159 reg = usbmisc->base + MX25_USB_PHY_CTRL_OFFSET; 160 val = readl(reg); 161 writel(val | MX25_BM_EXTERNAL_VBUS_DIVIDER, reg); 162 spin_unlock_irqrestore(&usbmisc->lock, flags); 163 usleep_range(5000, 10000); /* needed to stabilize voltage */ 164 } 165 166 return 0; 167 } 168 169 static int usbmisc_imx27_init(struct imx_usbmisc_data *data) 170 { 171 struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); 172 unsigned long flags; 173 u32 val; 174 175 switch (data->index) { 176 case 0: 177 val = MX27_OTG_PM_BIT; 178 break; 179 case 1: 180 val = MX27_H1_PM_BIT; 181 break; 182 case 2: 183 val = MX27_H2_PM_BIT; 184 break; 185 default: 186 return -EINVAL; 187 } 188 189 spin_lock_irqsave(&usbmisc->lock, flags); 190 if (data->disable_oc) 191 val = readl(usbmisc->base) | val; 192 else 193 val = readl(usbmisc->base) & ~val; 194 writel(val, usbmisc->base); 195 spin_unlock_irqrestore(&usbmisc->lock, flags); 196 197 return 0; 198 } 199 200 static int usbmisc_imx53_init(struct imx_usbmisc_data *data) 201 { 202 struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); 203 void __iomem *reg = NULL; 204 unsigned long flags; 205 u32 val = 0; 206 207 if (data->index > 3) 208 return -EINVAL; 209 210 /* Select a 24 MHz reference clock for the PHY */ 211 val = readl(usbmisc->base + MX53_USB_OTG_PHY_CTRL_1_OFFSET); 212 val &= ~MX53_USB_PHYCTRL1_PLLDIV_MASK; 213 val |= MX53_USB_PLL_DIV_24_MHZ; 214 writel(val, usbmisc->base + MX53_USB_OTG_PHY_CTRL_1_OFFSET); 215 216 spin_lock_irqsave(&usbmisc->lock, flags); 217 218 switch (data->index) { 219 case 0: 220 if (data->disable_oc) { 221 reg = usbmisc->base + MX53_USB_OTG_PHY_CTRL_0_OFFSET; 222 val = readl(reg) | MX53_BM_OVER_CUR_DIS_OTG; 223 writel(val, reg); 224 } 225 break; 226 case 1: 227 if (data->disable_oc) { 228 reg = usbmisc->base + MX53_USB_OTG_PHY_CTRL_0_OFFSET; 229 val = readl(reg) | MX53_BM_OVER_CUR_DIS_H1; 230 writel(val, reg); 231 } 232 break; 233 case 2: 234 if (data->ulpi) { 235 /* set USBH2 into ULPI-mode. */ 236 reg = usbmisc->base + MX53_USB_CTRL_1_OFFSET; 237 val = readl(reg) | MX53_USB_CTRL_1_UH2_ULPI_EN; 238 /* select ULPI clock */ 239 val &= ~MX53_USB_CTRL_1_H2_XCVR_CLK_SEL_MASK; 240 val |= MX53_USB_CTRL_1_H2_XCVR_CLK_SEL_ULPI; 241 writel(val, reg); 242 /* Set interrupt wake up enable */ 243 reg = usbmisc->base + MX53_USB_UH2_CTRL_OFFSET; 244 val = readl(reg) | MX53_USB_UHx_CTRL_WAKE_UP_EN 245 | MX53_USB_UHx_CTRL_ULPI_INT_EN; 246 writel(val, reg); 247 if (is_imx53_usbmisc(data)) { 248 /* Disable internal 60Mhz clock */ 249 reg = usbmisc->base + 250 MX53_USB_CLKONOFF_CTRL_OFFSET; 251 val = readl(reg) | 252 MX53_USB_CLKONOFF_CTRL_H2_INT60CKOFF; 253 writel(val, reg); 254 } 255 256 } 257 if (data->disable_oc) { 258 reg = usbmisc->base + MX53_USB_UH2_CTRL_OFFSET; 259 val = readl(reg) | MX53_BM_OVER_CUR_DIS_UHx; 260 writel(val, reg); 261 } 262 break; 263 case 3: 264 if (data->ulpi) { 265 /* set USBH3 into ULPI-mode. */ 266 reg = usbmisc->base + MX53_USB_CTRL_1_OFFSET; 267 val = readl(reg) | MX53_USB_CTRL_1_UH3_ULPI_EN; 268 /* select ULPI clock */ 269 val &= ~MX53_USB_CTRL_1_H3_XCVR_CLK_SEL_MASK; 270 val |= MX53_USB_CTRL_1_H3_XCVR_CLK_SEL_ULPI; 271 writel(val, reg); 272 /* Set interrupt wake up enable */ 273 reg = usbmisc->base + MX53_USB_UH3_CTRL_OFFSET; 274 val = readl(reg) | MX53_USB_UHx_CTRL_WAKE_UP_EN 275 | MX53_USB_UHx_CTRL_ULPI_INT_EN; 276 writel(val, reg); 277 278 if (is_imx53_usbmisc(data)) { 279 /* Disable internal 60Mhz clock */ 280 reg = usbmisc->base + 281 MX53_USB_CLKONOFF_CTRL_OFFSET; 282 val = readl(reg) | 283 MX53_USB_CLKONOFF_CTRL_H3_INT60CKOFF; 284 writel(val, reg); 285 } 286 } 287 if (data->disable_oc) { 288 reg = usbmisc->base + MX53_USB_UH3_CTRL_OFFSET; 289 val = readl(reg) | MX53_BM_OVER_CUR_DIS_UHx; 290 writel(val, reg); 291 } 292 break; 293 } 294 295 spin_unlock_irqrestore(&usbmisc->lock, flags); 296 297 return 0; 298 } 299 300 static int usbmisc_imx6q_set_wakeup 301 (struct imx_usbmisc_data *data, bool enabled) 302 { 303 struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); 304 unsigned long flags; 305 u32 val; 306 u32 wakeup_setting = (MX6_BM_WAKEUP_ENABLE | 307 MX6_BM_VBUS_WAKEUP | MX6_BM_ID_WAKEUP); 308 int ret = 0; 309 310 if (data->index > 3) 311 return -EINVAL; 312 313 spin_lock_irqsave(&usbmisc->lock, flags); 314 val = readl(usbmisc->base + data->index * 4); 315 if (enabled) { 316 val |= wakeup_setting; 317 writel(val, usbmisc->base + data->index * 4); 318 } else { 319 if (val & MX6_BM_WAKEUP_INTR) 320 pr_debug("wakeup int at ci_hdrc.%d\n", data->index); 321 val &= ~wakeup_setting; 322 writel(val, usbmisc->base + data->index * 4); 323 } 324 spin_unlock_irqrestore(&usbmisc->lock, flags); 325 326 return ret; 327 } 328 329 static int usbmisc_imx6q_init(struct imx_usbmisc_data *data) 330 { 331 struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); 332 unsigned long flags; 333 u32 reg; 334 335 if (data->index > 3) 336 return -EINVAL; 337 338 spin_lock_irqsave(&usbmisc->lock, flags); 339 340 reg = readl(usbmisc->base + data->index * 4); 341 if (data->disable_oc) { 342 reg |= MX6_BM_OVER_CUR_DIS; 343 } else if (data->oc_polarity == 1) { 344 /* High active */ 345 reg &= ~(MX6_BM_OVER_CUR_DIS | MX6_BM_OVER_CUR_POLARITY); 346 } 347 writel(reg, usbmisc->base + data->index * 4); 348 349 /* SoC non-burst setting */ 350 reg = readl(usbmisc->base + data->index * 4); 351 writel(reg | MX6_BM_NON_BURST_SETTING, 352 usbmisc->base + data->index * 4); 353 354 spin_unlock_irqrestore(&usbmisc->lock, flags); 355 356 usbmisc_imx6q_set_wakeup(data, false); 357 358 return 0; 359 } 360 361 static int usbmisc_imx6sx_init(struct imx_usbmisc_data *data) 362 { 363 void __iomem *reg = NULL; 364 unsigned long flags; 365 struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); 366 u32 val; 367 368 usbmisc_imx6q_init(data); 369 370 if (data->index == 0 || data->index == 1) { 371 reg = usbmisc->base + MX6_USB_OTG1_PHY_CTRL + data->index * 4; 372 spin_lock_irqsave(&usbmisc->lock, flags); 373 /* Set vbus wakeup source as bvalid */ 374 val = readl(reg); 375 writel(val | MX6SX_USB_VBUS_WAKEUP_SOURCE_BVALID, reg); 376 /* 377 * Disable dp/dm wakeup in device mode when vbus is 378 * not there. 379 */ 380 val = readl(usbmisc->base + data->index * 4); 381 writel(val & ~MX6SX_BM_DPDM_WAKEUP_EN, 382 usbmisc->base + data->index * 4); 383 spin_unlock_irqrestore(&usbmisc->lock, flags); 384 } 385 386 return 0; 387 } 388 389 static int usbmisc_vf610_init(struct imx_usbmisc_data *data) 390 { 391 struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); 392 u32 reg; 393 394 /* 395 * Vybrid only has one misc register set, but in two different 396 * areas. These is reflected in two instances of this driver. 397 */ 398 if (data->index >= 1) 399 return -EINVAL; 400 401 if (data->disable_oc) { 402 reg = readl(usbmisc->base); 403 writel(reg | VF610_OVER_CUR_DIS, usbmisc->base); 404 } 405 406 return 0; 407 } 408 409 static int usbmisc_imx7d_set_wakeup 410 (struct imx_usbmisc_data *data, bool enabled) 411 { 412 struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); 413 unsigned long flags; 414 u32 val; 415 u32 wakeup_setting = (MX6_BM_WAKEUP_ENABLE | 416 MX6_BM_VBUS_WAKEUP | MX6_BM_ID_WAKEUP); 417 418 spin_lock_irqsave(&usbmisc->lock, flags); 419 val = readl(usbmisc->base); 420 if (enabled) { 421 writel(val | wakeup_setting, usbmisc->base); 422 } else { 423 if (val & MX6_BM_WAKEUP_INTR) 424 dev_dbg(data->dev, "wakeup int\n"); 425 writel(val & ~wakeup_setting, usbmisc->base); 426 } 427 spin_unlock_irqrestore(&usbmisc->lock, flags); 428 429 return 0; 430 } 431 432 static int usbmisc_imx7d_init(struct imx_usbmisc_data *data) 433 { 434 struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); 435 unsigned long flags; 436 u32 reg; 437 438 if (data->index >= 1) 439 return -EINVAL; 440 441 spin_lock_irqsave(&usbmisc->lock, flags); 442 reg = readl(usbmisc->base); 443 if (data->disable_oc) { 444 reg |= MX6_BM_OVER_CUR_DIS; 445 } else if (data->oc_polarity == 1) { 446 /* High active */ 447 reg &= ~(MX6_BM_OVER_CUR_DIS | MX6_BM_OVER_CUR_POLARITY); 448 } 449 writel(reg, usbmisc->base); 450 451 reg = readl(usbmisc->base + MX7D_USBNC_USB_CTRL2); 452 reg &= ~MX7D_USB_VBUS_WAKEUP_SOURCE_MASK; 453 writel(reg | MX7D_USB_VBUS_WAKEUP_SOURCE_BVALID, 454 usbmisc->base + MX7D_USBNC_USB_CTRL2); 455 spin_unlock_irqrestore(&usbmisc->lock, flags); 456 457 usbmisc_imx7d_set_wakeup(data, false); 458 459 return 0; 460 } 461 462 static const struct usbmisc_ops imx25_usbmisc_ops = { 463 .init = usbmisc_imx25_init, 464 .post = usbmisc_imx25_post, 465 }; 466 467 static const struct usbmisc_ops imx27_usbmisc_ops = { 468 .init = usbmisc_imx27_init, 469 }; 470 471 static const struct usbmisc_ops imx51_usbmisc_ops = { 472 .init = usbmisc_imx53_init, 473 }; 474 475 static const struct usbmisc_ops imx53_usbmisc_ops = { 476 .init = usbmisc_imx53_init, 477 }; 478 479 static const struct usbmisc_ops imx6q_usbmisc_ops = { 480 .set_wakeup = usbmisc_imx6q_set_wakeup, 481 .init = usbmisc_imx6q_init, 482 }; 483 484 static const struct usbmisc_ops vf610_usbmisc_ops = { 485 .init = usbmisc_vf610_init, 486 }; 487 488 static const struct usbmisc_ops imx6sx_usbmisc_ops = { 489 .set_wakeup = usbmisc_imx6q_set_wakeup, 490 .init = usbmisc_imx6sx_init, 491 }; 492 493 static const struct usbmisc_ops imx7d_usbmisc_ops = { 494 .init = usbmisc_imx7d_init, 495 .set_wakeup = usbmisc_imx7d_set_wakeup, 496 }; 497 498 static inline bool is_imx53_usbmisc(struct imx_usbmisc_data *data) 499 { 500 struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); 501 502 return usbmisc->ops == &imx53_usbmisc_ops; 503 } 504 505 int imx_usbmisc_init(struct imx_usbmisc_data *data) 506 { 507 struct imx_usbmisc *usbmisc; 508 509 if (!data) 510 return 0; 511 512 usbmisc = dev_get_drvdata(data->dev); 513 if (!usbmisc->ops->init) 514 return 0; 515 return usbmisc->ops->init(data); 516 } 517 EXPORT_SYMBOL_GPL(imx_usbmisc_init); 518 519 int imx_usbmisc_init_post(struct imx_usbmisc_data *data) 520 { 521 struct imx_usbmisc *usbmisc; 522 523 if (!data) 524 return 0; 525 526 usbmisc = dev_get_drvdata(data->dev); 527 if (!usbmisc->ops->post) 528 return 0; 529 return usbmisc->ops->post(data); 530 } 531 EXPORT_SYMBOL_GPL(imx_usbmisc_init_post); 532 533 int imx_usbmisc_set_wakeup(struct imx_usbmisc_data *data, bool enabled) 534 { 535 struct imx_usbmisc *usbmisc; 536 537 if (!data) 538 return 0; 539 540 usbmisc = dev_get_drvdata(data->dev); 541 if (!usbmisc->ops->set_wakeup) 542 return 0; 543 return usbmisc->ops->set_wakeup(data, enabled); 544 } 545 EXPORT_SYMBOL_GPL(imx_usbmisc_set_wakeup); 546 547 static const struct of_device_id usbmisc_imx_dt_ids[] = { 548 { 549 .compatible = "fsl,imx25-usbmisc", 550 .data = &imx25_usbmisc_ops, 551 }, 552 { 553 .compatible = "fsl,imx35-usbmisc", 554 .data = &imx25_usbmisc_ops, 555 }, 556 { 557 .compatible = "fsl,imx27-usbmisc", 558 .data = &imx27_usbmisc_ops, 559 }, 560 { 561 .compatible = "fsl,imx51-usbmisc", 562 .data = &imx51_usbmisc_ops, 563 }, 564 { 565 .compatible = "fsl,imx53-usbmisc", 566 .data = &imx53_usbmisc_ops, 567 }, 568 { 569 .compatible = "fsl,imx6q-usbmisc", 570 .data = &imx6q_usbmisc_ops, 571 }, 572 { 573 .compatible = "fsl,vf610-usbmisc", 574 .data = &vf610_usbmisc_ops, 575 }, 576 { 577 .compatible = "fsl,imx6sx-usbmisc", 578 .data = &imx6sx_usbmisc_ops, 579 }, 580 { 581 .compatible = "fsl,imx6ul-usbmisc", 582 .data = &imx6sx_usbmisc_ops, 583 }, 584 { 585 .compatible = "fsl,imx7d-usbmisc", 586 .data = &imx7d_usbmisc_ops, 587 }, 588 { /* sentinel */ } 589 }; 590 MODULE_DEVICE_TABLE(of, usbmisc_imx_dt_ids); 591 592 static int usbmisc_imx_probe(struct platform_device *pdev) 593 { 594 struct resource *res; 595 struct imx_usbmisc *data; 596 const struct of_device_id *of_id; 597 598 of_id = of_match_device(usbmisc_imx_dt_ids, &pdev->dev); 599 if (!of_id) 600 return -ENODEV; 601 602 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); 603 if (!data) 604 return -ENOMEM; 605 606 spin_lock_init(&data->lock); 607 608 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 609 data->base = devm_ioremap_resource(&pdev->dev, res); 610 if (IS_ERR(data->base)) 611 return PTR_ERR(data->base); 612 613 data->ops = (const struct usbmisc_ops *)of_id->data; 614 platform_set_drvdata(pdev, data); 615 616 return 0; 617 } 618 619 static int usbmisc_imx_remove(struct platform_device *pdev) 620 { 621 return 0; 622 } 623 624 static struct platform_driver usbmisc_imx_driver = { 625 .probe = usbmisc_imx_probe, 626 .remove = usbmisc_imx_remove, 627 .driver = { 628 .name = "usbmisc_imx", 629 .of_match_table = usbmisc_imx_dt_ids, 630 }, 631 }; 632 633 module_platform_driver(usbmisc_imx_driver); 634 635 MODULE_ALIAS("platform:usbmisc-imx"); 636 MODULE_LICENSE("GPL v2"); 637 MODULE_DESCRIPTION("driver for imx usb non-core registers"); 638 MODULE_AUTHOR("Richard Zhao <richard.zhao@freescale.com>"); 639