xref: /openbmc/linux/drivers/usb/chipidea/udc.c (revision c7e1962a)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * udc.c - ChipIdea UDC driver
4  *
5  * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
6  *
7  * Author: David Lopo
8  */
9 
10 #include <linux/delay.h>
11 #include <linux/device.h>
12 #include <linux/dmapool.h>
13 #include <linux/err.h>
14 #include <linux/irqreturn.h>
15 #include <linux/kernel.h>
16 #include <linux/slab.h>
17 #include <linux/pm_runtime.h>
18 #include <linux/pinctrl/consumer.h>
19 #include <linux/usb/ch9.h>
20 #include <linux/usb/gadget.h>
21 #include <linux/usb/otg-fsm.h>
22 #include <linux/usb/chipidea.h>
23 
24 #include "ci.h"
25 #include "udc.h"
26 #include "bits.h"
27 #include "otg.h"
28 #include "otg_fsm.h"
29 #include "trace.h"
30 
31 /* control endpoint description */
32 static const struct usb_endpoint_descriptor
33 ctrl_endpt_out_desc = {
34 	.bLength         = USB_DT_ENDPOINT_SIZE,
35 	.bDescriptorType = USB_DT_ENDPOINT,
36 
37 	.bEndpointAddress = USB_DIR_OUT,
38 	.bmAttributes    = USB_ENDPOINT_XFER_CONTROL,
39 	.wMaxPacketSize  = cpu_to_le16(CTRL_PAYLOAD_MAX),
40 };
41 
42 static const struct usb_endpoint_descriptor
43 ctrl_endpt_in_desc = {
44 	.bLength         = USB_DT_ENDPOINT_SIZE,
45 	.bDescriptorType = USB_DT_ENDPOINT,
46 
47 	.bEndpointAddress = USB_DIR_IN,
48 	.bmAttributes    = USB_ENDPOINT_XFER_CONTROL,
49 	.wMaxPacketSize  = cpu_to_le16(CTRL_PAYLOAD_MAX),
50 };
51 
52 static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
53 		       struct td_node *node);
54 /**
55  * hw_ep_bit: calculates the bit number
56  * @num: endpoint number
57  * @dir: endpoint direction
58  *
59  * This function returns bit number
60  */
61 static inline int hw_ep_bit(int num, int dir)
62 {
63 	return num + ((dir == TX) ? 16 : 0);
64 }
65 
66 static inline int ep_to_bit(struct ci_hdrc *ci, int n)
67 {
68 	int fill = 16 - ci->hw_ep_max / 2;
69 
70 	if (n >= ci->hw_ep_max / 2)
71 		n += fill;
72 
73 	return n;
74 }
75 
76 /**
77  * hw_device_state: enables/disables interrupts (execute without interruption)
78  * @ci: the controller
79  * @dma: 0 => disable, !0 => enable and set dma engine
80  *
81  * This function returns an error code
82  */
83 static int hw_device_state(struct ci_hdrc *ci, u32 dma)
84 {
85 	if (dma) {
86 		hw_write(ci, OP_ENDPTLISTADDR, ~0, dma);
87 		/* interrupt, error, port change, reset, sleep/suspend */
88 		hw_write(ci, OP_USBINTR, ~0,
89 			     USBi_UI|USBi_UEI|USBi_PCI|USBi_URI);
90 	} else {
91 		hw_write(ci, OP_USBINTR, ~0, 0);
92 	}
93 	return 0;
94 }
95 
96 /**
97  * hw_ep_flush: flush endpoint fifo (execute without interruption)
98  * @ci: the controller
99  * @num: endpoint number
100  * @dir: endpoint direction
101  *
102  * This function returns an error code
103  */
104 static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir)
105 {
106 	int n = hw_ep_bit(num, dir);
107 
108 	do {
109 		/* flush any pending transfer */
110 		hw_write(ci, OP_ENDPTFLUSH, ~0, BIT(n));
111 		while (hw_read(ci, OP_ENDPTFLUSH, BIT(n)))
112 			cpu_relax();
113 	} while (hw_read(ci, OP_ENDPTSTAT, BIT(n)));
114 
115 	return 0;
116 }
117 
118 /**
119  * hw_ep_disable: disables endpoint (execute without interruption)
120  * @ci: the controller
121  * @num: endpoint number
122  * @dir: endpoint direction
123  *
124  * This function returns an error code
125  */
126 static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir)
127 {
128 	hw_write(ci, OP_ENDPTCTRL + num,
129 		 (dir == TX) ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
130 	return 0;
131 }
132 
133 /**
134  * hw_ep_enable: enables endpoint (execute without interruption)
135  * @ci: the controller
136  * @num:  endpoint number
137  * @dir:  endpoint direction
138  * @type: endpoint type
139  *
140  * This function returns an error code
141  */
142 static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type)
143 {
144 	u32 mask, data;
145 
146 	if (dir == TX) {
147 		mask  = ENDPTCTRL_TXT;  /* type    */
148 		data  = type << __ffs(mask);
149 
150 		mask |= ENDPTCTRL_TXS;  /* unstall */
151 		mask |= ENDPTCTRL_TXR;  /* reset data toggle */
152 		data |= ENDPTCTRL_TXR;
153 		mask |= ENDPTCTRL_TXE;  /* enable  */
154 		data |= ENDPTCTRL_TXE;
155 	} else {
156 		mask  = ENDPTCTRL_RXT;  /* type    */
157 		data  = type << __ffs(mask);
158 
159 		mask |= ENDPTCTRL_RXS;  /* unstall */
160 		mask |= ENDPTCTRL_RXR;  /* reset data toggle */
161 		data |= ENDPTCTRL_RXR;
162 		mask |= ENDPTCTRL_RXE;  /* enable  */
163 		data |= ENDPTCTRL_RXE;
164 	}
165 	hw_write(ci, OP_ENDPTCTRL + num, mask, data);
166 	return 0;
167 }
168 
169 /**
170  * hw_ep_get_halt: return endpoint halt status
171  * @ci: the controller
172  * @num: endpoint number
173  * @dir: endpoint direction
174  *
175  * This function returns 1 if endpoint halted
176  */
177 static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir)
178 {
179 	u32 mask = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
180 
181 	return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0;
182 }
183 
184 /**
185  * hw_ep_prime: primes endpoint (execute without interruption)
186  * @ci: the controller
187  * @num:     endpoint number
188  * @dir:     endpoint direction
189  * @is_ctrl: true if control endpoint
190  *
191  * This function returns an error code
192  */
193 static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl)
194 {
195 	int n = hw_ep_bit(num, dir);
196 
197 	/* Synchronize before ep prime */
198 	wmb();
199 
200 	if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
201 		return -EAGAIN;
202 
203 	hw_write(ci, OP_ENDPTPRIME, ~0, BIT(n));
204 
205 	while (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
206 		cpu_relax();
207 	if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
208 		return -EAGAIN;
209 
210 	/* status shoult be tested according with manual but it doesn't work */
211 	return 0;
212 }
213 
214 /**
215  * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
216  *                 without interruption)
217  * @ci: the controller
218  * @num:   endpoint number
219  * @dir:   endpoint direction
220  * @value: true => stall, false => unstall
221  *
222  * This function returns an error code
223  */
224 static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value)
225 {
226 	if (value != 0 && value != 1)
227 		return -EINVAL;
228 
229 	do {
230 		enum ci_hw_regs reg = OP_ENDPTCTRL + num;
231 		u32 mask_xs = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
232 		u32 mask_xr = (dir == TX) ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
233 
234 		/* data toggle - reserved for EP0 but it's in ESS */
235 		hw_write(ci, reg, mask_xs|mask_xr,
236 			  value ? mask_xs : mask_xr);
237 	} while (value != hw_ep_get_halt(ci, num, dir));
238 
239 	return 0;
240 }
241 
242 /**
243  * hw_port_is_high_speed: test if port is high speed
244  * @ci: the controller
245  *
246  * This function returns true if high speed port
247  */
248 static int hw_port_is_high_speed(struct ci_hdrc *ci)
249 {
250 	return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) :
251 		hw_read(ci, OP_PORTSC, PORTSC_HSP);
252 }
253 
254 /**
255  * hw_test_and_clear_complete: test & clear complete status (execute without
256  *                             interruption)
257  * @ci: the controller
258  * @n: endpoint number
259  *
260  * This function returns complete status
261  */
262 static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n)
263 {
264 	n = ep_to_bit(ci, n);
265 	return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n));
266 }
267 
268 /**
269  * hw_test_and_clear_intr_active: test & clear active interrupts (execute
270  *                                without interruption)
271  * @ci: the controller
272  *
273  * This function returns active interrutps
274  */
275 static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci)
276 {
277 	u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci);
278 
279 	hw_write(ci, OP_USBSTS, ~0, reg);
280 	return reg;
281 }
282 
283 /**
284  * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
285  *                                interruption)
286  * @ci: the controller
287  *
288  * This function returns guard value
289  */
290 static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci)
291 {
292 	return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0);
293 }
294 
295 /**
296  * hw_test_and_set_setup_guard: test & set setup guard (execute without
297  *                              interruption)
298  * @ci: the controller
299  *
300  * This function returns guard value
301  */
302 static int hw_test_and_set_setup_guard(struct ci_hdrc *ci)
303 {
304 	return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
305 }
306 
307 /**
308  * hw_usb_set_address: configures USB address (execute without interruption)
309  * @ci: the controller
310  * @value: new USB address
311  *
312  * This function explicitly sets the address, without the "USBADRA" (advance)
313  * feature, which is not supported by older versions of the controller.
314  */
315 static void hw_usb_set_address(struct ci_hdrc *ci, u8 value)
316 {
317 	hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR,
318 		 value << __ffs(DEVICEADDR_USBADR));
319 }
320 
321 /**
322  * hw_usb_reset: restart device after a bus reset (execute without
323  *               interruption)
324  * @ci: the controller
325  *
326  * This function returns an error code
327  */
328 static int hw_usb_reset(struct ci_hdrc *ci)
329 {
330 	hw_usb_set_address(ci, 0);
331 
332 	/* ESS flushes only at end?!? */
333 	hw_write(ci, OP_ENDPTFLUSH,    ~0, ~0);
334 
335 	/* clear setup token semaphores */
336 	hw_write(ci, OP_ENDPTSETUPSTAT, 0,  0);
337 
338 	/* clear complete status */
339 	hw_write(ci, OP_ENDPTCOMPLETE,  0,  0);
340 
341 	/* wait until all bits cleared */
342 	while (hw_read(ci, OP_ENDPTPRIME, ~0))
343 		udelay(10);             /* not RTOS friendly */
344 
345 	/* reset all endpoints ? */
346 
347 	/* reset internal status and wait for further instructions
348 	   no need to verify the port reset status (ESS does it) */
349 
350 	return 0;
351 }
352 
353 /******************************************************************************
354  * UTIL block
355  *****************************************************************************/
356 
357 static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
358 			unsigned int length, struct scatterlist *s)
359 {
360 	int i;
361 	u32 temp;
362 	struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node),
363 						  GFP_ATOMIC);
364 
365 	if (node == NULL)
366 		return -ENOMEM;
367 
368 	node->ptr = dma_pool_zalloc(hwep->td_pool, GFP_ATOMIC, &node->dma);
369 	if (node->ptr == NULL) {
370 		kfree(node);
371 		return -ENOMEM;
372 	}
373 
374 	node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES));
375 	node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES);
376 	node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE);
377 	if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) {
378 		u32 mul = hwreq->req.length / hwep->ep.maxpacket;
379 
380 		if (hwreq->req.length == 0
381 				|| hwreq->req.length % hwep->ep.maxpacket)
382 			mul++;
383 		node->ptr->token |= cpu_to_le32(mul << __ffs(TD_MULTO));
384 	}
385 
386 	if (s) {
387 		temp = (u32) (sg_dma_address(s) + hwreq->req.actual);
388 		node->td_remaining_size = CI_MAX_BUF_SIZE - length;
389 	} else {
390 		temp = (u32) (hwreq->req.dma + hwreq->req.actual);
391 	}
392 
393 	if (length) {
394 		node->ptr->page[0] = cpu_to_le32(temp);
395 		for (i = 1; i < TD_PAGE_COUNT; i++) {
396 			u32 page = temp + i * CI_HDRC_PAGE_SIZE;
397 			page &= ~TD_RESERVED_MASK;
398 			node->ptr->page[i] = cpu_to_le32(page);
399 		}
400 	}
401 
402 	hwreq->req.actual += length;
403 
404 	if (!list_empty(&hwreq->tds)) {
405 		/* get the last entry */
406 		lastnode = list_entry(hwreq->tds.prev,
407 				struct td_node, td);
408 		lastnode->ptr->next = cpu_to_le32(node->dma);
409 	}
410 
411 	INIT_LIST_HEAD(&node->td);
412 	list_add_tail(&node->td, &hwreq->tds);
413 
414 	return 0;
415 }
416 
417 /**
418  * _usb_addr: calculates endpoint address from direction & number
419  * @ep:  endpoint
420  */
421 static inline u8 _usb_addr(struct ci_hw_ep *ep)
422 {
423 	return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
424 }
425 
426 static int prepare_td_for_non_sg(struct ci_hw_ep *hwep,
427 		struct ci_hw_req *hwreq)
428 {
429 	unsigned int rest = hwreq->req.length;
430 	int pages = TD_PAGE_COUNT;
431 	int ret = 0;
432 
433 	if (rest == 0) {
434 		ret = add_td_to_list(hwep, hwreq, 0, NULL);
435 		if (ret < 0)
436 			return ret;
437 	}
438 
439 	/*
440 	 * The first buffer could be not page aligned.
441 	 * In that case we have to span into one extra td.
442 	 */
443 	if (hwreq->req.dma % PAGE_SIZE)
444 		pages--;
445 
446 	while (rest > 0) {
447 		unsigned int count = min(hwreq->req.length - hwreq->req.actual,
448 			(unsigned int)(pages * CI_HDRC_PAGE_SIZE));
449 
450 		ret = add_td_to_list(hwep, hwreq, count, NULL);
451 		if (ret < 0)
452 			return ret;
453 
454 		rest -= count;
455 	}
456 
457 	if (hwreq->req.zero && hwreq->req.length && hwep->dir == TX
458 	    && (hwreq->req.length % hwep->ep.maxpacket == 0)) {
459 		ret = add_td_to_list(hwep, hwreq, 0, NULL);
460 		if (ret < 0)
461 			return ret;
462 	}
463 
464 	return ret;
465 }
466 
467 static int prepare_td_per_sg(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
468 		struct scatterlist *s)
469 {
470 	unsigned int rest = sg_dma_len(s);
471 	int ret = 0;
472 
473 	hwreq->req.actual = 0;
474 	while (rest > 0) {
475 		unsigned int count = min_t(unsigned int, rest,
476 				CI_MAX_BUF_SIZE);
477 
478 		ret = add_td_to_list(hwep, hwreq, count, s);
479 		if (ret < 0)
480 			return ret;
481 
482 		rest -= count;
483 	}
484 
485 	return ret;
486 }
487 
488 static void ci_add_buffer_entry(struct td_node *node, struct scatterlist *s)
489 {
490 	int empty_td_slot_index = (CI_MAX_BUF_SIZE - node->td_remaining_size)
491 			/ CI_HDRC_PAGE_SIZE;
492 	int i;
493 	u32 token;
494 
495 	token = le32_to_cpu(node->ptr->token) + (sg_dma_len(s) << __ffs(TD_TOTAL_BYTES));
496 	node->ptr->token = cpu_to_le32(token);
497 
498 	for (i = empty_td_slot_index; i < TD_PAGE_COUNT; i++) {
499 		u32 page = (u32) sg_dma_address(s) +
500 			(i - empty_td_slot_index) * CI_HDRC_PAGE_SIZE;
501 
502 		page &= ~TD_RESERVED_MASK;
503 		node->ptr->page[i] = cpu_to_le32(page);
504 	}
505 }
506 
507 static int prepare_td_for_sg(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
508 {
509 	struct usb_request *req = &hwreq->req;
510 	struct scatterlist *s = req->sg;
511 	int ret = 0, i = 0;
512 	struct td_node *node = NULL;
513 
514 	if (!s || req->zero || req->length == 0) {
515 		dev_err(hwep->ci->dev, "not supported operation for sg\n");
516 		return -EINVAL;
517 	}
518 
519 	while (i++ < req->num_mapped_sgs) {
520 		if (sg_dma_address(s) % PAGE_SIZE) {
521 			dev_err(hwep->ci->dev, "not page aligned sg buffer\n");
522 			return -EINVAL;
523 		}
524 
525 		if (node && (node->td_remaining_size >= sg_dma_len(s))) {
526 			ci_add_buffer_entry(node, s);
527 			node->td_remaining_size -= sg_dma_len(s);
528 		} else {
529 			ret = prepare_td_per_sg(hwep, hwreq, s);
530 			if (ret)
531 				return ret;
532 
533 			node = list_entry(hwreq->tds.prev,
534 				struct td_node, td);
535 		}
536 
537 		s = sg_next(s);
538 	}
539 
540 	return ret;
541 }
542 
543 /**
544  * _hardware_enqueue: configures a request at hardware level
545  * @hwep:   endpoint
546  * @hwreq:  request
547  *
548  * This function returns an error code
549  */
550 static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
551 {
552 	struct ci_hdrc *ci = hwep->ci;
553 	int ret = 0;
554 	struct td_node *firstnode, *lastnode;
555 
556 	/* don't queue twice */
557 	if (hwreq->req.status == -EALREADY)
558 		return -EALREADY;
559 
560 	hwreq->req.status = -EALREADY;
561 
562 	ret = usb_gadget_map_request_by_dev(ci->dev->parent,
563 					    &hwreq->req, hwep->dir);
564 	if (ret)
565 		return ret;
566 
567 	if (hwreq->req.num_mapped_sgs)
568 		ret = prepare_td_for_sg(hwep, hwreq);
569 	else
570 		ret = prepare_td_for_non_sg(hwep, hwreq);
571 
572 	if (ret)
573 		return ret;
574 
575 	lastnode = list_entry(hwreq->tds.prev,
576 		struct td_node, td);
577 
578 	lastnode->ptr->next = cpu_to_le32(TD_TERMINATE);
579 	if (!hwreq->req.no_interrupt)
580 		lastnode->ptr->token |= cpu_to_le32(TD_IOC);
581 
582 	list_for_each_entry_safe(firstnode, lastnode, &hwreq->tds, td)
583 		trace_ci_prepare_td(hwep, hwreq, firstnode);
584 
585 	firstnode = list_first_entry(&hwreq->tds, struct td_node, td);
586 
587 	wmb();
588 
589 	hwreq->req.actual = 0;
590 	if (!list_empty(&hwep->qh.queue)) {
591 		struct ci_hw_req *hwreqprev;
592 		int n = hw_ep_bit(hwep->num, hwep->dir);
593 		int tmp_stat;
594 		struct td_node *prevlastnode;
595 		u32 next = firstnode->dma & TD_ADDR_MASK;
596 
597 		hwreqprev = list_entry(hwep->qh.queue.prev,
598 				struct ci_hw_req, queue);
599 		prevlastnode = list_entry(hwreqprev->tds.prev,
600 				struct td_node, td);
601 
602 		prevlastnode->ptr->next = cpu_to_le32(next);
603 		wmb();
604 
605 		if (ci->rev == CI_REVISION_22) {
606 			if (!hw_read(ci, OP_ENDPTSTAT, BIT(n)))
607 				reprime_dtd(ci, hwep, prevlastnode);
608 		}
609 
610 		if (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
611 			goto done;
612 		do {
613 			hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
614 			tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n));
615 		} while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW));
616 		hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0);
617 		if (tmp_stat)
618 			goto done;
619 	}
620 
621 	/*  QH configuration */
622 	hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma);
623 	hwep->qh.ptr->td.token &=
624 		cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE));
625 
626 	if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == RX) {
627 		u32 mul = hwreq->req.length / hwep->ep.maxpacket;
628 
629 		if (hwreq->req.length == 0
630 				|| hwreq->req.length % hwep->ep.maxpacket)
631 			mul++;
632 		hwep->qh.ptr->cap |= cpu_to_le32(mul << __ffs(QH_MULT));
633 	}
634 
635 	ret = hw_ep_prime(ci, hwep->num, hwep->dir,
636 			   hwep->type == USB_ENDPOINT_XFER_CONTROL);
637 done:
638 	return ret;
639 }
640 
641 /**
642  * free_pending_td: remove a pending request for the endpoint
643  * @hwep: endpoint
644  */
645 static void free_pending_td(struct ci_hw_ep *hwep)
646 {
647 	struct td_node *pending = hwep->pending_td;
648 
649 	dma_pool_free(hwep->td_pool, pending->ptr, pending->dma);
650 	hwep->pending_td = NULL;
651 	kfree(pending);
652 }
653 
654 static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
655 					   struct td_node *node)
656 {
657 	hwep->qh.ptr->td.next = cpu_to_le32(node->dma);
658 	hwep->qh.ptr->td.token &=
659 		cpu_to_le32(~(TD_STATUS_HALTED | TD_STATUS_ACTIVE));
660 
661 	return hw_ep_prime(ci, hwep->num, hwep->dir,
662 				hwep->type == USB_ENDPOINT_XFER_CONTROL);
663 }
664 
665 /**
666  * _hardware_dequeue: handles a request at hardware level
667  * @hwep: endpoint
668  * @hwreq:  request
669  *
670  * This function returns an error code
671  */
672 static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
673 {
674 	u32 tmptoken;
675 	struct td_node *node, *tmpnode;
676 	unsigned remaining_length;
677 	unsigned actual = hwreq->req.length;
678 	struct ci_hdrc *ci = hwep->ci;
679 
680 	if (hwreq->req.status != -EALREADY)
681 		return -EINVAL;
682 
683 	hwreq->req.status = 0;
684 
685 	list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
686 		tmptoken = le32_to_cpu(node->ptr->token);
687 		trace_ci_complete_td(hwep, hwreq, node);
688 		if ((TD_STATUS_ACTIVE & tmptoken) != 0) {
689 			int n = hw_ep_bit(hwep->num, hwep->dir);
690 
691 			if (ci->rev == CI_REVISION_24)
692 				if (!hw_read(ci, OP_ENDPTSTAT, BIT(n)))
693 					reprime_dtd(ci, hwep, node);
694 			hwreq->req.status = -EALREADY;
695 			return -EBUSY;
696 		}
697 
698 		remaining_length = (tmptoken & TD_TOTAL_BYTES);
699 		remaining_length >>= __ffs(TD_TOTAL_BYTES);
700 		actual -= remaining_length;
701 
702 		hwreq->req.status = tmptoken & TD_STATUS;
703 		if ((TD_STATUS_HALTED & hwreq->req.status)) {
704 			hwreq->req.status = -EPIPE;
705 			break;
706 		} else if ((TD_STATUS_DT_ERR & hwreq->req.status)) {
707 			hwreq->req.status = -EPROTO;
708 			break;
709 		} else if ((TD_STATUS_TR_ERR & hwreq->req.status)) {
710 			hwreq->req.status = -EILSEQ;
711 			break;
712 		}
713 
714 		if (remaining_length) {
715 			if (hwep->dir == TX) {
716 				hwreq->req.status = -EPROTO;
717 				break;
718 			}
719 		}
720 		/*
721 		 * As the hardware could still address the freed td
722 		 * which will run the udc unusable, the cleanup of the
723 		 * td has to be delayed by one.
724 		 */
725 		if (hwep->pending_td)
726 			free_pending_td(hwep);
727 
728 		hwep->pending_td = node;
729 		list_del_init(&node->td);
730 	}
731 
732 	usb_gadget_unmap_request_by_dev(hwep->ci->dev->parent,
733 					&hwreq->req, hwep->dir);
734 
735 	hwreq->req.actual += actual;
736 
737 	if (hwreq->req.status)
738 		return hwreq->req.status;
739 
740 	return hwreq->req.actual;
741 }
742 
743 /**
744  * _ep_nuke: dequeues all endpoint requests
745  * @hwep: endpoint
746  *
747  * This function returns an error code
748  * Caller must hold lock
749  */
750 static int _ep_nuke(struct ci_hw_ep *hwep)
751 __releases(hwep->lock)
752 __acquires(hwep->lock)
753 {
754 	struct td_node *node, *tmpnode;
755 	if (hwep == NULL)
756 		return -EINVAL;
757 
758 	hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
759 
760 	while (!list_empty(&hwep->qh.queue)) {
761 
762 		/* pop oldest request */
763 		struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next,
764 						     struct ci_hw_req, queue);
765 
766 		list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
767 			dma_pool_free(hwep->td_pool, node->ptr, node->dma);
768 			list_del_init(&node->td);
769 			node->ptr = NULL;
770 			kfree(node);
771 		}
772 
773 		list_del_init(&hwreq->queue);
774 		hwreq->req.status = -ESHUTDOWN;
775 
776 		if (hwreq->req.complete != NULL) {
777 			spin_unlock(hwep->lock);
778 			usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
779 			spin_lock(hwep->lock);
780 		}
781 	}
782 
783 	if (hwep->pending_td)
784 		free_pending_td(hwep);
785 
786 	return 0;
787 }
788 
789 static int _ep_set_halt(struct usb_ep *ep, int value, bool check_transfer)
790 {
791 	struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
792 	int direction, retval = 0;
793 	unsigned long flags;
794 
795 	if (ep == NULL || hwep->ep.desc == NULL)
796 		return -EINVAL;
797 
798 	if (usb_endpoint_xfer_isoc(hwep->ep.desc))
799 		return -EOPNOTSUPP;
800 
801 	spin_lock_irqsave(hwep->lock, flags);
802 
803 	if (value && hwep->dir == TX && check_transfer &&
804 		!list_empty(&hwep->qh.queue) &&
805 			!usb_endpoint_xfer_control(hwep->ep.desc)) {
806 		spin_unlock_irqrestore(hwep->lock, flags);
807 		return -EAGAIN;
808 	}
809 
810 	direction = hwep->dir;
811 	do {
812 		retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value);
813 
814 		if (!value)
815 			hwep->wedge = 0;
816 
817 		if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
818 			hwep->dir = (hwep->dir == TX) ? RX : TX;
819 
820 	} while (hwep->dir != direction);
821 
822 	spin_unlock_irqrestore(hwep->lock, flags);
823 	return retval;
824 }
825 
826 
827 /**
828  * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
829  * @gadget: gadget
830  *
831  * This function returns an error code
832  */
833 static int _gadget_stop_activity(struct usb_gadget *gadget)
834 {
835 	struct usb_ep *ep;
836 	struct ci_hdrc    *ci = container_of(gadget, struct ci_hdrc, gadget);
837 	unsigned long flags;
838 
839 	/* flush all endpoints */
840 	gadget_for_each_ep(ep, gadget) {
841 		usb_ep_fifo_flush(ep);
842 	}
843 	usb_ep_fifo_flush(&ci->ep0out->ep);
844 	usb_ep_fifo_flush(&ci->ep0in->ep);
845 
846 	/* make sure to disable all endpoints */
847 	gadget_for_each_ep(ep, gadget) {
848 		usb_ep_disable(ep);
849 	}
850 
851 	if (ci->status != NULL) {
852 		usb_ep_free_request(&ci->ep0in->ep, ci->status);
853 		ci->status = NULL;
854 	}
855 
856 	spin_lock_irqsave(&ci->lock, flags);
857 	ci->gadget.speed = USB_SPEED_UNKNOWN;
858 	ci->remote_wakeup = 0;
859 	ci->suspended = 0;
860 	spin_unlock_irqrestore(&ci->lock, flags);
861 
862 	return 0;
863 }
864 
865 /******************************************************************************
866  * ISR block
867  *****************************************************************************/
868 /**
869  * isr_reset_handler: USB reset interrupt handler
870  * @ci: UDC device
871  *
872  * This function resets USB engine after a bus reset occurred
873  */
874 static void isr_reset_handler(struct ci_hdrc *ci)
875 __releases(ci->lock)
876 __acquires(ci->lock)
877 {
878 	int retval;
879 	u32 intr;
880 
881 	spin_unlock(&ci->lock);
882 	if (ci->gadget.speed != USB_SPEED_UNKNOWN)
883 		usb_gadget_udc_reset(&ci->gadget, ci->driver);
884 
885 	retval = _gadget_stop_activity(&ci->gadget);
886 	if (retval)
887 		goto done;
888 
889 	retval = hw_usb_reset(ci);
890 	if (retval)
891 		goto done;
892 
893 	/* clear SLI */
894 	hw_write(ci, OP_USBSTS, USBi_SLI, USBi_SLI);
895 	intr = hw_read(ci, OP_USBINTR, ~0);
896 	hw_write(ci, OP_USBINTR, ~0, intr | USBi_SLI);
897 
898 	ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC);
899 	if (ci->status == NULL)
900 		retval = -ENOMEM;
901 
902 done:
903 	spin_lock(&ci->lock);
904 
905 	if (retval)
906 		dev_err(ci->dev, "error: %i\n", retval);
907 }
908 
909 /**
910  * isr_get_status_complete: get_status request complete function
911  * @ep:  endpoint
912  * @req: request handled
913  *
914  * Caller must release lock
915  */
916 static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
917 {
918 	if (ep == NULL || req == NULL)
919 		return;
920 
921 	kfree(req->buf);
922 	usb_ep_free_request(ep, req);
923 }
924 
925 /**
926  * _ep_queue: queues (submits) an I/O request to an endpoint
927  * @ep:        endpoint
928  * @req:       request
929  * @gfp_flags: GFP flags (not used)
930  *
931  * Caller must hold lock
932  * This function returns an error code
933  */
934 static int _ep_queue(struct usb_ep *ep, struct usb_request *req,
935 		    gfp_t __maybe_unused gfp_flags)
936 {
937 	struct ci_hw_ep  *hwep  = container_of(ep,  struct ci_hw_ep, ep);
938 	struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
939 	struct ci_hdrc *ci = hwep->ci;
940 	int retval = 0;
941 
942 	if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
943 		return -EINVAL;
944 
945 	if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
946 		if (req->length)
947 			hwep = (ci->ep0_dir == RX) ?
948 			       ci->ep0out : ci->ep0in;
949 		if (!list_empty(&hwep->qh.queue)) {
950 			_ep_nuke(hwep);
951 			dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n",
952 				 _usb_addr(hwep));
953 		}
954 	}
955 
956 	if (usb_endpoint_xfer_isoc(hwep->ep.desc) &&
957 	    hwreq->req.length > hwep->ep.mult * hwep->ep.maxpacket) {
958 		dev_err(hwep->ci->dev, "request length too big for isochronous\n");
959 		return -EMSGSIZE;
960 	}
961 
962 	/* first nuke then test link, e.g. previous status has not sent */
963 	if (!list_empty(&hwreq->queue)) {
964 		dev_err(hwep->ci->dev, "request already in queue\n");
965 		return -EBUSY;
966 	}
967 
968 	/* push request */
969 	hwreq->req.status = -EINPROGRESS;
970 	hwreq->req.actual = 0;
971 
972 	retval = _hardware_enqueue(hwep, hwreq);
973 
974 	if (retval == -EALREADY)
975 		retval = 0;
976 	if (!retval)
977 		list_add_tail(&hwreq->queue, &hwep->qh.queue);
978 
979 	return retval;
980 }
981 
982 /**
983  * isr_get_status_response: get_status request response
984  * @ci: ci struct
985  * @setup: setup request packet
986  *
987  * This function returns an error code
988  */
989 static int isr_get_status_response(struct ci_hdrc *ci,
990 				   struct usb_ctrlrequest *setup)
991 __releases(hwep->lock)
992 __acquires(hwep->lock)
993 {
994 	struct ci_hw_ep *hwep = ci->ep0in;
995 	struct usb_request *req = NULL;
996 	gfp_t gfp_flags = GFP_ATOMIC;
997 	int dir, num, retval;
998 
999 	if (hwep == NULL || setup == NULL)
1000 		return -EINVAL;
1001 
1002 	spin_unlock(hwep->lock);
1003 	req = usb_ep_alloc_request(&hwep->ep, gfp_flags);
1004 	spin_lock(hwep->lock);
1005 	if (req == NULL)
1006 		return -ENOMEM;
1007 
1008 	req->complete = isr_get_status_complete;
1009 	req->length   = 2;
1010 	req->buf      = kzalloc(req->length, gfp_flags);
1011 	if (req->buf == NULL) {
1012 		retval = -ENOMEM;
1013 		goto err_free_req;
1014 	}
1015 
1016 	if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
1017 		*(u16 *)req->buf = (ci->remote_wakeup << 1) |
1018 			ci->gadget.is_selfpowered;
1019 	} else if ((setup->bRequestType & USB_RECIP_MASK) \
1020 		   == USB_RECIP_ENDPOINT) {
1021 		dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
1022 			TX : RX;
1023 		num =  le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
1024 		*(u16 *)req->buf = hw_ep_get_halt(ci, num, dir);
1025 	}
1026 	/* else do nothing; reserved for future use */
1027 
1028 	retval = _ep_queue(&hwep->ep, req, gfp_flags);
1029 	if (retval)
1030 		goto err_free_buf;
1031 
1032 	return 0;
1033 
1034  err_free_buf:
1035 	kfree(req->buf);
1036  err_free_req:
1037 	spin_unlock(hwep->lock);
1038 	usb_ep_free_request(&hwep->ep, req);
1039 	spin_lock(hwep->lock);
1040 	return retval;
1041 }
1042 
1043 /**
1044  * isr_setup_status_complete: setup_status request complete function
1045  * @ep:  endpoint
1046  * @req: request handled
1047  *
1048  * Caller must release lock. Put the port in test mode if test mode
1049  * feature is selected.
1050  */
1051 static void
1052 isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
1053 {
1054 	struct ci_hdrc *ci = req->context;
1055 	unsigned long flags;
1056 
1057 	if (req->status < 0)
1058 		return;
1059 
1060 	if (ci->setaddr) {
1061 		hw_usb_set_address(ci, ci->address);
1062 		ci->setaddr = false;
1063 		if (ci->address)
1064 			usb_gadget_set_state(&ci->gadget, USB_STATE_ADDRESS);
1065 	}
1066 
1067 	spin_lock_irqsave(&ci->lock, flags);
1068 	if (ci->test_mode)
1069 		hw_port_test_set(ci, ci->test_mode);
1070 	spin_unlock_irqrestore(&ci->lock, flags);
1071 }
1072 
1073 /**
1074  * isr_setup_status_phase: queues the status phase of a setup transation
1075  * @ci: ci struct
1076  *
1077  * This function returns an error code
1078  */
1079 static int isr_setup_status_phase(struct ci_hdrc *ci)
1080 {
1081 	struct ci_hw_ep *hwep;
1082 
1083 	/*
1084 	 * Unexpected USB controller behavior, caused by bad signal integrity
1085 	 * or ground reference problems, can lead to isr_setup_status_phase
1086 	 * being called with ci->status equal to NULL.
1087 	 * If this situation occurs, you should review your USB hardware design.
1088 	 */
1089 	if (WARN_ON_ONCE(!ci->status))
1090 		return -EPIPE;
1091 
1092 	hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in;
1093 	ci->status->context = ci;
1094 	ci->status->complete = isr_setup_status_complete;
1095 
1096 	return _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC);
1097 }
1098 
1099 /**
1100  * isr_tr_complete_low: transaction complete low level handler
1101  * @hwep: endpoint
1102  *
1103  * This function returns an error code
1104  * Caller must hold lock
1105  */
1106 static int isr_tr_complete_low(struct ci_hw_ep *hwep)
1107 __releases(hwep->lock)
1108 __acquires(hwep->lock)
1109 {
1110 	struct ci_hw_req *hwreq, *hwreqtemp;
1111 	struct ci_hw_ep *hweptemp = hwep;
1112 	int retval = 0;
1113 
1114 	list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue,
1115 			queue) {
1116 		retval = _hardware_dequeue(hwep, hwreq);
1117 		if (retval < 0)
1118 			break;
1119 		list_del_init(&hwreq->queue);
1120 		if (hwreq->req.complete != NULL) {
1121 			spin_unlock(hwep->lock);
1122 			if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) &&
1123 					hwreq->req.length)
1124 				hweptemp = hwep->ci->ep0in;
1125 			usb_gadget_giveback_request(&hweptemp->ep, &hwreq->req);
1126 			spin_lock(hwep->lock);
1127 		}
1128 	}
1129 
1130 	if (retval == -EBUSY)
1131 		retval = 0;
1132 
1133 	return retval;
1134 }
1135 
1136 static int otg_a_alt_hnp_support(struct ci_hdrc *ci)
1137 {
1138 	dev_warn(&ci->gadget.dev,
1139 		"connect the device to an alternate port if you want HNP\n");
1140 	return isr_setup_status_phase(ci);
1141 }
1142 
1143 /**
1144  * isr_setup_packet_handler: setup packet handler
1145  * @ci: UDC descriptor
1146  *
1147  * This function handles setup packet
1148  */
1149 static void isr_setup_packet_handler(struct ci_hdrc *ci)
1150 __releases(ci->lock)
1151 __acquires(ci->lock)
1152 {
1153 	struct ci_hw_ep *hwep = &ci->ci_hw_ep[0];
1154 	struct usb_ctrlrequest req;
1155 	int type, num, dir, err = -EINVAL;
1156 	u8 tmode = 0;
1157 
1158 	/*
1159 	 * Flush data and handshake transactions of previous
1160 	 * setup packet.
1161 	 */
1162 	_ep_nuke(ci->ep0out);
1163 	_ep_nuke(ci->ep0in);
1164 
1165 	/* read_setup_packet */
1166 	do {
1167 		hw_test_and_set_setup_guard(ci);
1168 		memcpy(&req, &hwep->qh.ptr->setup, sizeof(req));
1169 	} while (!hw_test_and_clear_setup_guard(ci));
1170 
1171 	type = req.bRequestType;
1172 
1173 	ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
1174 
1175 	switch (req.bRequest) {
1176 	case USB_REQ_CLEAR_FEATURE:
1177 		if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1178 				le16_to_cpu(req.wValue) ==
1179 				USB_ENDPOINT_HALT) {
1180 			if (req.wLength != 0)
1181 				break;
1182 			num  = le16_to_cpu(req.wIndex);
1183 			dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX;
1184 			num &= USB_ENDPOINT_NUMBER_MASK;
1185 			if (dir == TX)
1186 				num += ci->hw_ep_max / 2;
1187 			if (!ci->ci_hw_ep[num].wedge) {
1188 				spin_unlock(&ci->lock);
1189 				err = usb_ep_clear_halt(
1190 					&ci->ci_hw_ep[num].ep);
1191 				spin_lock(&ci->lock);
1192 				if (err)
1193 					break;
1194 			}
1195 			err = isr_setup_status_phase(ci);
1196 		} else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
1197 				le16_to_cpu(req.wValue) ==
1198 				USB_DEVICE_REMOTE_WAKEUP) {
1199 			if (req.wLength != 0)
1200 				break;
1201 			ci->remote_wakeup = 0;
1202 			err = isr_setup_status_phase(ci);
1203 		} else {
1204 			goto delegate;
1205 		}
1206 		break;
1207 	case USB_REQ_GET_STATUS:
1208 		if ((type != (USB_DIR_IN|USB_RECIP_DEVICE) ||
1209 			le16_to_cpu(req.wIndex) == OTG_STS_SELECTOR) &&
1210 		    type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
1211 		    type != (USB_DIR_IN|USB_RECIP_INTERFACE))
1212 			goto delegate;
1213 		if (le16_to_cpu(req.wLength) != 2 ||
1214 		    le16_to_cpu(req.wValue)  != 0)
1215 			break;
1216 		err = isr_get_status_response(ci, &req);
1217 		break;
1218 	case USB_REQ_SET_ADDRESS:
1219 		if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
1220 			goto delegate;
1221 		if (le16_to_cpu(req.wLength) != 0 ||
1222 		    le16_to_cpu(req.wIndex)  != 0)
1223 			break;
1224 		ci->address = (u8)le16_to_cpu(req.wValue);
1225 		ci->setaddr = true;
1226 		err = isr_setup_status_phase(ci);
1227 		break;
1228 	case USB_REQ_SET_FEATURE:
1229 		if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1230 				le16_to_cpu(req.wValue) ==
1231 				USB_ENDPOINT_HALT) {
1232 			if (req.wLength != 0)
1233 				break;
1234 			num  = le16_to_cpu(req.wIndex);
1235 			dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX;
1236 			num &= USB_ENDPOINT_NUMBER_MASK;
1237 			if (dir == TX)
1238 				num += ci->hw_ep_max / 2;
1239 
1240 			spin_unlock(&ci->lock);
1241 			err = _ep_set_halt(&ci->ci_hw_ep[num].ep, 1, false);
1242 			spin_lock(&ci->lock);
1243 			if (!err)
1244 				isr_setup_status_phase(ci);
1245 		} else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
1246 			if (req.wLength != 0)
1247 				break;
1248 			switch (le16_to_cpu(req.wValue)) {
1249 			case USB_DEVICE_REMOTE_WAKEUP:
1250 				ci->remote_wakeup = 1;
1251 				err = isr_setup_status_phase(ci);
1252 				break;
1253 			case USB_DEVICE_TEST_MODE:
1254 				tmode = le16_to_cpu(req.wIndex) >> 8;
1255 				switch (tmode) {
1256 				case USB_TEST_J:
1257 				case USB_TEST_K:
1258 				case USB_TEST_SE0_NAK:
1259 				case USB_TEST_PACKET:
1260 				case USB_TEST_FORCE_ENABLE:
1261 					ci->test_mode = tmode;
1262 					err = isr_setup_status_phase(
1263 							ci);
1264 					break;
1265 				default:
1266 					break;
1267 				}
1268 				break;
1269 			case USB_DEVICE_B_HNP_ENABLE:
1270 				if (ci_otg_is_fsm_mode(ci)) {
1271 					ci->gadget.b_hnp_enable = 1;
1272 					err = isr_setup_status_phase(
1273 							ci);
1274 				}
1275 				break;
1276 			case USB_DEVICE_A_ALT_HNP_SUPPORT:
1277 				if (ci_otg_is_fsm_mode(ci))
1278 					err = otg_a_alt_hnp_support(ci);
1279 				break;
1280 			case USB_DEVICE_A_HNP_SUPPORT:
1281 				if (ci_otg_is_fsm_mode(ci)) {
1282 					ci->gadget.a_hnp_support = 1;
1283 					err = isr_setup_status_phase(
1284 							ci);
1285 				}
1286 				break;
1287 			default:
1288 				goto delegate;
1289 			}
1290 		} else {
1291 			goto delegate;
1292 		}
1293 		break;
1294 	default:
1295 delegate:
1296 		if (req.wLength == 0)   /* no data phase */
1297 			ci->ep0_dir = TX;
1298 
1299 		spin_unlock(&ci->lock);
1300 		err = ci->driver->setup(&ci->gadget, &req);
1301 		spin_lock(&ci->lock);
1302 		break;
1303 	}
1304 
1305 	if (err < 0) {
1306 		spin_unlock(&ci->lock);
1307 		if (_ep_set_halt(&hwep->ep, 1, false))
1308 			dev_err(ci->dev, "error: _ep_set_halt\n");
1309 		spin_lock(&ci->lock);
1310 	}
1311 }
1312 
1313 /**
1314  * isr_tr_complete_handler: transaction complete interrupt handler
1315  * @ci: UDC descriptor
1316  *
1317  * This function handles traffic events
1318  */
1319 static void isr_tr_complete_handler(struct ci_hdrc *ci)
1320 __releases(ci->lock)
1321 __acquires(ci->lock)
1322 {
1323 	unsigned i;
1324 	int err;
1325 
1326 	for (i = 0; i < ci->hw_ep_max; i++) {
1327 		struct ci_hw_ep *hwep  = &ci->ci_hw_ep[i];
1328 
1329 		if (hwep->ep.desc == NULL)
1330 			continue;   /* not configured */
1331 
1332 		if (hw_test_and_clear_complete(ci, i)) {
1333 			err = isr_tr_complete_low(hwep);
1334 			if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
1335 				if (err > 0)   /* needs status phase */
1336 					err = isr_setup_status_phase(ci);
1337 				if (err < 0) {
1338 					spin_unlock(&ci->lock);
1339 					if (_ep_set_halt(&hwep->ep, 1, false))
1340 						dev_err(ci->dev,
1341 						"error: _ep_set_halt\n");
1342 					spin_lock(&ci->lock);
1343 				}
1344 			}
1345 		}
1346 
1347 		/* Only handle setup packet below */
1348 		if (i == 0 &&
1349 			hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(0)))
1350 			isr_setup_packet_handler(ci);
1351 	}
1352 }
1353 
1354 /******************************************************************************
1355  * ENDPT block
1356  *****************************************************************************/
1357 /*
1358  * ep_enable: configure endpoint, making it usable
1359  *
1360  * Check usb_ep_enable() at "usb_gadget.h" for details
1361  */
1362 static int ep_enable(struct usb_ep *ep,
1363 		     const struct usb_endpoint_descriptor *desc)
1364 {
1365 	struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1366 	int retval = 0;
1367 	unsigned long flags;
1368 	u32 cap = 0;
1369 
1370 	if (ep == NULL || desc == NULL)
1371 		return -EINVAL;
1372 
1373 	spin_lock_irqsave(hwep->lock, flags);
1374 
1375 	/* only internal SW should enable ctrl endpts */
1376 
1377 	if (!list_empty(&hwep->qh.queue)) {
1378 		dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n");
1379 		spin_unlock_irqrestore(hwep->lock, flags);
1380 		return -EBUSY;
1381 	}
1382 
1383 	hwep->ep.desc = desc;
1384 
1385 	hwep->dir  = usb_endpoint_dir_in(desc) ? TX : RX;
1386 	hwep->num  = usb_endpoint_num(desc);
1387 	hwep->type = usb_endpoint_type(desc);
1388 
1389 	hwep->ep.maxpacket = usb_endpoint_maxp(desc);
1390 	hwep->ep.mult = usb_endpoint_maxp_mult(desc);
1391 
1392 	if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1393 		cap |= QH_IOS;
1394 
1395 	cap |= QH_ZLT;
1396 	cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT;
1397 	/*
1398 	 * For ISO-TX, we set mult at QH as the largest value, and use
1399 	 * MultO at TD as real mult value.
1400 	 */
1401 	if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX)
1402 		cap |= 3 << __ffs(QH_MULT);
1403 
1404 	hwep->qh.ptr->cap = cpu_to_le32(cap);
1405 
1406 	hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE);   /* needed? */
1407 
1408 	if (hwep->num != 0 && hwep->type == USB_ENDPOINT_XFER_CONTROL) {
1409 		dev_err(hwep->ci->dev, "Set control xfer at non-ep0\n");
1410 		retval = -EINVAL;
1411 	}
1412 
1413 	/*
1414 	 * Enable endpoints in the HW other than ep0 as ep0
1415 	 * is always enabled
1416 	 */
1417 	if (hwep->num)
1418 		retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir,
1419 				       hwep->type);
1420 
1421 	spin_unlock_irqrestore(hwep->lock, flags);
1422 	return retval;
1423 }
1424 
1425 /*
1426  * ep_disable: endpoint is no longer usable
1427  *
1428  * Check usb_ep_disable() at "usb_gadget.h" for details
1429  */
1430 static int ep_disable(struct usb_ep *ep)
1431 {
1432 	struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1433 	int direction, retval = 0;
1434 	unsigned long flags;
1435 
1436 	if (ep == NULL)
1437 		return -EINVAL;
1438 	else if (hwep->ep.desc == NULL)
1439 		return -EBUSY;
1440 
1441 	spin_lock_irqsave(hwep->lock, flags);
1442 	if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) {
1443 		spin_unlock_irqrestore(hwep->lock, flags);
1444 		return 0;
1445 	}
1446 
1447 	/* only internal SW should disable ctrl endpts */
1448 
1449 	direction = hwep->dir;
1450 	do {
1451 		retval |= _ep_nuke(hwep);
1452 		retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir);
1453 
1454 		if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1455 			hwep->dir = (hwep->dir == TX) ? RX : TX;
1456 
1457 	} while (hwep->dir != direction);
1458 
1459 	hwep->ep.desc = NULL;
1460 
1461 	spin_unlock_irqrestore(hwep->lock, flags);
1462 	return retval;
1463 }
1464 
1465 /*
1466  * ep_alloc_request: allocate a request object to use with this endpoint
1467  *
1468  * Check usb_ep_alloc_request() at "usb_gadget.h" for details
1469  */
1470 static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
1471 {
1472 	struct ci_hw_req *hwreq;
1473 
1474 	if (ep == NULL)
1475 		return NULL;
1476 
1477 	hwreq = kzalloc(sizeof(struct ci_hw_req), gfp_flags);
1478 	if (hwreq != NULL) {
1479 		INIT_LIST_HEAD(&hwreq->queue);
1480 		INIT_LIST_HEAD(&hwreq->tds);
1481 	}
1482 
1483 	return (hwreq == NULL) ? NULL : &hwreq->req;
1484 }
1485 
1486 /*
1487  * ep_free_request: frees a request object
1488  *
1489  * Check usb_ep_free_request() at "usb_gadget.h" for details
1490  */
1491 static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
1492 {
1493 	struct ci_hw_ep  *hwep  = container_of(ep,  struct ci_hw_ep, ep);
1494 	struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
1495 	struct td_node *node, *tmpnode;
1496 	unsigned long flags;
1497 
1498 	if (ep == NULL || req == NULL) {
1499 		return;
1500 	} else if (!list_empty(&hwreq->queue)) {
1501 		dev_err(hwep->ci->dev, "freeing queued request\n");
1502 		return;
1503 	}
1504 
1505 	spin_lock_irqsave(hwep->lock, flags);
1506 
1507 	list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
1508 		dma_pool_free(hwep->td_pool, node->ptr, node->dma);
1509 		list_del_init(&node->td);
1510 		node->ptr = NULL;
1511 		kfree(node);
1512 	}
1513 
1514 	kfree(hwreq);
1515 
1516 	spin_unlock_irqrestore(hwep->lock, flags);
1517 }
1518 
1519 /*
1520  * ep_queue: queues (submits) an I/O request to an endpoint
1521  *
1522  * Check usb_ep_queue()* at usb_gadget.h" for details
1523  */
1524 static int ep_queue(struct usb_ep *ep, struct usb_request *req,
1525 		    gfp_t __maybe_unused gfp_flags)
1526 {
1527 	struct ci_hw_ep  *hwep  = container_of(ep,  struct ci_hw_ep, ep);
1528 	int retval = 0;
1529 	unsigned long flags;
1530 
1531 	if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
1532 		return -EINVAL;
1533 
1534 	spin_lock_irqsave(hwep->lock, flags);
1535 	if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) {
1536 		spin_unlock_irqrestore(hwep->lock, flags);
1537 		return 0;
1538 	}
1539 	retval = _ep_queue(ep, req, gfp_flags);
1540 	spin_unlock_irqrestore(hwep->lock, flags);
1541 	return retval;
1542 }
1543 
1544 /*
1545  * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
1546  *
1547  * Check usb_ep_dequeue() at "usb_gadget.h" for details
1548  */
1549 static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
1550 {
1551 	struct ci_hw_ep  *hwep  = container_of(ep,  struct ci_hw_ep, ep);
1552 	struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
1553 	unsigned long flags;
1554 	struct td_node *node, *tmpnode;
1555 
1556 	if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY ||
1557 		hwep->ep.desc == NULL || list_empty(&hwreq->queue) ||
1558 		list_empty(&hwep->qh.queue))
1559 		return -EINVAL;
1560 
1561 	spin_lock_irqsave(hwep->lock, flags);
1562 	if (hwep->ci->gadget.speed != USB_SPEED_UNKNOWN)
1563 		hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
1564 
1565 	list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
1566 		dma_pool_free(hwep->td_pool, node->ptr, node->dma);
1567 		list_del(&node->td);
1568 		kfree(node);
1569 	}
1570 
1571 	/* pop request */
1572 	list_del_init(&hwreq->queue);
1573 
1574 	usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir);
1575 
1576 	req->status = -ECONNRESET;
1577 
1578 	if (hwreq->req.complete != NULL) {
1579 		spin_unlock(hwep->lock);
1580 		usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
1581 		spin_lock(hwep->lock);
1582 	}
1583 
1584 	spin_unlock_irqrestore(hwep->lock, flags);
1585 	return 0;
1586 }
1587 
1588 /*
1589  * ep_set_halt: sets the endpoint halt feature
1590  *
1591  * Check usb_ep_set_halt() at "usb_gadget.h" for details
1592  */
1593 static int ep_set_halt(struct usb_ep *ep, int value)
1594 {
1595 	return _ep_set_halt(ep, value, true);
1596 }
1597 
1598 /*
1599  * ep_set_wedge: sets the halt feature and ignores clear requests
1600  *
1601  * Check usb_ep_set_wedge() at "usb_gadget.h" for details
1602  */
1603 static int ep_set_wedge(struct usb_ep *ep)
1604 {
1605 	struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1606 	unsigned long flags;
1607 
1608 	if (ep == NULL || hwep->ep.desc == NULL)
1609 		return -EINVAL;
1610 
1611 	spin_lock_irqsave(hwep->lock, flags);
1612 	hwep->wedge = 1;
1613 	spin_unlock_irqrestore(hwep->lock, flags);
1614 
1615 	return usb_ep_set_halt(ep);
1616 }
1617 
1618 /*
1619  * ep_fifo_flush: flushes contents of a fifo
1620  *
1621  * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
1622  */
1623 static void ep_fifo_flush(struct usb_ep *ep)
1624 {
1625 	struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1626 	unsigned long flags;
1627 
1628 	if (ep == NULL) {
1629 		dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep));
1630 		return;
1631 	}
1632 
1633 	spin_lock_irqsave(hwep->lock, flags);
1634 	if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) {
1635 		spin_unlock_irqrestore(hwep->lock, flags);
1636 		return;
1637 	}
1638 
1639 	hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
1640 
1641 	spin_unlock_irqrestore(hwep->lock, flags);
1642 }
1643 
1644 /*
1645  * Endpoint-specific part of the API to the USB controller hardware
1646  * Check "usb_gadget.h" for details
1647  */
1648 static const struct usb_ep_ops usb_ep_ops = {
1649 	.enable	       = ep_enable,
1650 	.disable       = ep_disable,
1651 	.alloc_request = ep_alloc_request,
1652 	.free_request  = ep_free_request,
1653 	.queue	       = ep_queue,
1654 	.dequeue       = ep_dequeue,
1655 	.set_halt      = ep_set_halt,
1656 	.set_wedge     = ep_set_wedge,
1657 	.fifo_flush    = ep_fifo_flush,
1658 };
1659 
1660 /******************************************************************************
1661  * GADGET block
1662  *****************************************************************************/
1663 
1664 static int ci_udc_get_frame(struct usb_gadget *_gadget)
1665 {
1666 	struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1667 	unsigned long flags;
1668 	int ret;
1669 
1670 	spin_lock_irqsave(&ci->lock, flags);
1671 	ret = hw_read(ci, OP_FRINDEX, 0x3fff);
1672 	spin_unlock_irqrestore(&ci->lock, flags);
1673 	return ret >> 3;
1674 }
1675 
1676 /*
1677  * ci_hdrc_gadget_connect: caller makes sure gadget driver is binded
1678  */
1679 static void ci_hdrc_gadget_connect(struct usb_gadget *_gadget, int is_active)
1680 {
1681 	struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1682 
1683 	if (is_active) {
1684 		pm_runtime_get_sync(ci->dev);
1685 		hw_device_reset(ci);
1686 		spin_lock_irq(&ci->lock);
1687 		if (ci->driver) {
1688 			hw_device_state(ci, ci->ep0out->qh.dma);
1689 			usb_gadget_set_state(_gadget, USB_STATE_POWERED);
1690 			spin_unlock_irq(&ci->lock);
1691 			usb_udc_vbus_handler(_gadget, true);
1692 		} else {
1693 			spin_unlock_irq(&ci->lock);
1694 		}
1695 	} else {
1696 		usb_udc_vbus_handler(_gadget, false);
1697 		if (ci->driver)
1698 			ci->driver->disconnect(&ci->gadget);
1699 		hw_device_state(ci, 0);
1700 		if (ci->platdata->notify_event)
1701 			ci->platdata->notify_event(ci,
1702 			CI_HDRC_CONTROLLER_STOPPED_EVENT);
1703 		_gadget_stop_activity(&ci->gadget);
1704 		pm_runtime_put_sync(ci->dev);
1705 		usb_gadget_set_state(_gadget, USB_STATE_NOTATTACHED);
1706 	}
1707 }
1708 
1709 static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
1710 {
1711 	struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1712 	unsigned long flags;
1713 	int ret = 0;
1714 
1715 	spin_lock_irqsave(&ci->lock, flags);
1716 	ci->vbus_active = is_active;
1717 	spin_unlock_irqrestore(&ci->lock, flags);
1718 
1719 	if (ci->usb_phy)
1720 		usb_phy_set_charger_state(ci->usb_phy, is_active ?
1721 			USB_CHARGER_PRESENT : USB_CHARGER_ABSENT);
1722 
1723 	if (ci->platdata->notify_event)
1724 		ret = ci->platdata->notify_event(ci,
1725 				CI_HDRC_CONTROLLER_VBUS_EVENT);
1726 
1727 	if (ci->usb_phy) {
1728 		if (is_active)
1729 			usb_phy_set_event(ci->usb_phy, USB_EVENT_VBUS);
1730 		else
1731 			usb_phy_set_event(ci->usb_phy, USB_EVENT_NONE);
1732 	}
1733 
1734 	if (ci->driver)
1735 		ci_hdrc_gadget_connect(_gadget, is_active);
1736 
1737 	return ret;
1738 }
1739 
1740 static int ci_udc_wakeup(struct usb_gadget *_gadget)
1741 {
1742 	struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1743 	unsigned long flags;
1744 	int ret = 0;
1745 
1746 	spin_lock_irqsave(&ci->lock, flags);
1747 	if (ci->gadget.speed == USB_SPEED_UNKNOWN) {
1748 		spin_unlock_irqrestore(&ci->lock, flags);
1749 		return 0;
1750 	}
1751 	if (!ci->remote_wakeup) {
1752 		ret = -EOPNOTSUPP;
1753 		goto out;
1754 	}
1755 	if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) {
1756 		ret = -EINVAL;
1757 		goto out;
1758 	}
1759 	hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR);
1760 out:
1761 	spin_unlock_irqrestore(&ci->lock, flags);
1762 	return ret;
1763 }
1764 
1765 static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
1766 {
1767 	struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1768 
1769 	if (ci->usb_phy)
1770 		return usb_phy_set_power(ci->usb_phy, ma);
1771 	return -ENOTSUPP;
1772 }
1773 
1774 static int ci_udc_selfpowered(struct usb_gadget *_gadget, int is_on)
1775 {
1776 	struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1777 	struct ci_hw_ep *hwep = ci->ep0in;
1778 	unsigned long flags;
1779 
1780 	spin_lock_irqsave(hwep->lock, flags);
1781 	_gadget->is_selfpowered = (is_on != 0);
1782 	spin_unlock_irqrestore(hwep->lock, flags);
1783 
1784 	return 0;
1785 }
1786 
1787 /* Change Data+ pullup status
1788  * this func is used by usb_gadget_connect/disconnect
1789  */
1790 static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on)
1791 {
1792 	struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1793 
1794 	/*
1795 	 * Data+ pullup controlled by OTG state machine in OTG fsm mode;
1796 	 * and don't touch Data+ in host mode for dual role config.
1797 	 */
1798 	if (ci_otg_is_fsm_mode(ci) || ci->role == CI_ROLE_HOST)
1799 		return 0;
1800 
1801 	pm_runtime_get_sync(ci->dev);
1802 	if (is_on)
1803 		hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
1804 	else
1805 		hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
1806 	pm_runtime_put_sync(ci->dev);
1807 
1808 	return 0;
1809 }
1810 
1811 static int ci_udc_start(struct usb_gadget *gadget,
1812 			 struct usb_gadget_driver *driver);
1813 static int ci_udc_stop(struct usb_gadget *gadget);
1814 
1815 /* Match ISOC IN from the highest endpoint */
1816 static struct usb_ep *ci_udc_match_ep(struct usb_gadget *gadget,
1817 			      struct usb_endpoint_descriptor *desc,
1818 			      struct usb_ss_ep_comp_descriptor *comp_desc)
1819 {
1820 	struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1821 	struct usb_ep *ep;
1822 
1823 	if (usb_endpoint_xfer_isoc(desc) && usb_endpoint_dir_in(desc)) {
1824 		list_for_each_entry_reverse(ep, &ci->gadget.ep_list, ep_list) {
1825 			if (ep->caps.dir_in && !ep->claimed)
1826 				return ep;
1827 		}
1828 	}
1829 
1830 	return NULL;
1831 }
1832 
1833 /*
1834  * Device operations part of the API to the USB controller hardware,
1835  * which don't involve endpoints (or i/o)
1836  * Check  "usb_gadget.h" for details
1837  */
1838 static const struct usb_gadget_ops usb_gadget_ops = {
1839 	.get_frame	= ci_udc_get_frame,
1840 	.vbus_session	= ci_udc_vbus_session,
1841 	.wakeup		= ci_udc_wakeup,
1842 	.set_selfpowered	= ci_udc_selfpowered,
1843 	.pullup		= ci_udc_pullup,
1844 	.vbus_draw	= ci_udc_vbus_draw,
1845 	.udc_start	= ci_udc_start,
1846 	.udc_stop	= ci_udc_stop,
1847 	.match_ep 	= ci_udc_match_ep,
1848 };
1849 
1850 static int init_eps(struct ci_hdrc *ci)
1851 {
1852 	int retval = 0, i, j;
1853 
1854 	for (i = 0; i < ci->hw_ep_max/2; i++)
1855 		for (j = RX; j <= TX; j++) {
1856 			int k = i + j * ci->hw_ep_max/2;
1857 			struct ci_hw_ep *hwep = &ci->ci_hw_ep[k];
1858 
1859 			scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i,
1860 					(j == TX)  ? "in" : "out");
1861 
1862 			hwep->ci          = ci;
1863 			hwep->lock         = &ci->lock;
1864 			hwep->td_pool      = ci->td_pool;
1865 
1866 			hwep->ep.name      = hwep->name;
1867 			hwep->ep.ops       = &usb_ep_ops;
1868 
1869 			if (i == 0) {
1870 				hwep->ep.caps.type_control = true;
1871 			} else {
1872 				hwep->ep.caps.type_iso = true;
1873 				hwep->ep.caps.type_bulk = true;
1874 				hwep->ep.caps.type_int = true;
1875 			}
1876 
1877 			if (j == TX)
1878 				hwep->ep.caps.dir_in = true;
1879 			else
1880 				hwep->ep.caps.dir_out = true;
1881 
1882 			/*
1883 			 * for ep0: maxP defined in desc, for other
1884 			 * eps, maxP is set by epautoconfig() called
1885 			 * by gadget layer
1886 			 */
1887 			usb_ep_set_maxpacket_limit(&hwep->ep, (unsigned short)~0);
1888 
1889 			INIT_LIST_HEAD(&hwep->qh.queue);
1890 			hwep->qh.ptr = dma_pool_zalloc(ci->qh_pool, GFP_KERNEL,
1891 						       &hwep->qh.dma);
1892 			if (hwep->qh.ptr == NULL)
1893 				retval = -ENOMEM;
1894 
1895 			/*
1896 			 * set up shorthands for ep0 out and in endpoints,
1897 			 * don't add to gadget's ep_list
1898 			 */
1899 			if (i == 0) {
1900 				if (j == RX)
1901 					ci->ep0out = hwep;
1902 				else
1903 					ci->ep0in = hwep;
1904 
1905 				usb_ep_set_maxpacket_limit(&hwep->ep, CTRL_PAYLOAD_MAX);
1906 				continue;
1907 			}
1908 
1909 			list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list);
1910 		}
1911 
1912 	return retval;
1913 }
1914 
1915 static void destroy_eps(struct ci_hdrc *ci)
1916 {
1917 	int i;
1918 
1919 	for (i = 0; i < ci->hw_ep_max; i++) {
1920 		struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
1921 
1922 		if (hwep->pending_td)
1923 			free_pending_td(hwep);
1924 		dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma);
1925 	}
1926 }
1927 
1928 /**
1929  * ci_udc_start: register a gadget driver
1930  * @gadget: our gadget
1931  * @driver: the driver being registered
1932  *
1933  * Interrupts are enabled here.
1934  */
1935 static int ci_udc_start(struct usb_gadget *gadget,
1936 			 struct usb_gadget_driver *driver)
1937 {
1938 	struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1939 	int retval;
1940 
1941 	if (driver->disconnect == NULL)
1942 		return -EINVAL;
1943 
1944 	ci->ep0out->ep.desc = &ctrl_endpt_out_desc;
1945 	retval = usb_ep_enable(&ci->ep0out->ep);
1946 	if (retval)
1947 		return retval;
1948 
1949 	ci->ep0in->ep.desc = &ctrl_endpt_in_desc;
1950 	retval = usb_ep_enable(&ci->ep0in->ep);
1951 	if (retval)
1952 		return retval;
1953 
1954 	ci->driver = driver;
1955 
1956 	/* Start otg fsm for B-device */
1957 	if (ci_otg_is_fsm_mode(ci) && ci->fsm.id) {
1958 		ci_hdrc_otg_fsm_start(ci);
1959 		return retval;
1960 	}
1961 
1962 	if (ci->vbus_active)
1963 		ci_hdrc_gadget_connect(gadget, 1);
1964 	else
1965 		usb_udc_vbus_handler(&ci->gadget, false);
1966 
1967 	return retval;
1968 }
1969 
1970 static void ci_udc_stop_for_otg_fsm(struct ci_hdrc *ci)
1971 {
1972 	if (!ci_otg_is_fsm_mode(ci))
1973 		return;
1974 
1975 	mutex_lock(&ci->fsm.lock);
1976 	if (ci->fsm.otg->state == OTG_STATE_A_PERIPHERAL) {
1977 		ci->fsm.a_bidl_adis_tmout = 1;
1978 		ci_hdrc_otg_fsm_start(ci);
1979 	} else if (ci->fsm.otg->state == OTG_STATE_B_PERIPHERAL) {
1980 		ci->fsm.protocol = PROTO_UNDEF;
1981 		ci->fsm.otg->state = OTG_STATE_UNDEFINED;
1982 	}
1983 	mutex_unlock(&ci->fsm.lock);
1984 }
1985 
1986 /*
1987  * ci_udc_stop: unregister a gadget driver
1988  */
1989 static int ci_udc_stop(struct usb_gadget *gadget)
1990 {
1991 	struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1992 	unsigned long flags;
1993 
1994 	spin_lock_irqsave(&ci->lock, flags);
1995 	ci->driver = NULL;
1996 
1997 	if (ci->vbus_active) {
1998 		hw_device_state(ci, 0);
1999 		spin_unlock_irqrestore(&ci->lock, flags);
2000 		if (ci->platdata->notify_event)
2001 			ci->platdata->notify_event(ci,
2002 			CI_HDRC_CONTROLLER_STOPPED_EVENT);
2003 		_gadget_stop_activity(&ci->gadget);
2004 		spin_lock_irqsave(&ci->lock, flags);
2005 		pm_runtime_put(ci->dev);
2006 	}
2007 
2008 	spin_unlock_irqrestore(&ci->lock, flags);
2009 
2010 	ci_udc_stop_for_otg_fsm(ci);
2011 	return 0;
2012 }
2013 
2014 /******************************************************************************
2015  * BUS block
2016  *****************************************************************************/
2017 /*
2018  * udc_irq: ci interrupt handler
2019  *
2020  * This function returns IRQ_HANDLED if the IRQ has been handled
2021  * It locks access to registers
2022  */
2023 static irqreturn_t udc_irq(struct ci_hdrc *ci)
2024 {
2025 	irqreturn_t retval;
2026 	u32 intr;
2027 
2028 	if (ci == NULL)
2029 		return IRQ_HANDLED;
2030 
2031 	spin_lock(&ci->lock);
2032 
2033 	if (ci->platdata->flags & CI_HDRC_REGS_SHARED) {
2034 		if (hw_read(ci, OP_USBMODE, USBMODE_CM) !=
2035 				USBMODE_CM_DC) {
2036 			spin_unlock(&ci->lock);
2037 			return IRQ_NONE;
2038 		}
2039 	}
2040 	intr = hw_test_and_clear_intr_active(ci);
2041 
2042 	if (intr) {
2043 		/* order defines priority - do NOT change it */
2044 		if (USBi_URI & intr)
2045 			isr_reset_handler(ci);
2046 
2047 		if (USBi_PCI & intr) {
2048 			ci->gadget.speed = hw_port_is_high_speed(ci) ?
2049 				USB_SPEED_HIGH : USB_SPEED_FULL;
2050 			if (ci->usb_phy)
2051 				usb_phy_set_event(ci->usb_phy,
2052 					USB_EVENT_ENUMERATED);
2053 			if (ci->suspended) {
2054 				if (ci->driver->resume) {
2055 					spin_unlock(&ci->lock);
2056 					ci->driver->resume(&ci->gadget);
2057 					spin_lock(&ci->lock);
2058 				}
2059 				ci->suspended = 0;
2060 				usb_gadget_set_state(&ci->gadget,
2061 						ci->resume_state);
2062 			}
2063 		}
2064 
2065 		if ((USBi_UI | USBi_UEI) & intr)
2066 			isr_tr_complete_handler(ci);
2067 
2068 		if ((USBi_SLI & intr) && !(ci->suspended)) {
2069 			ci->suspended = 1;
2070 			ci->resume_state = ci->gadget.state;
2071 			if (ci->gadget.speed != USB_SPEED_UNKNOWN &&
2072 			    ci->driver->suspend) {
2073 				spin_unlock(&ci->lock);
2074 				ci->driver->suspend(&ci->gadget);
2075 				spin_lock(&ci->lock);
2076 			}
2077 			usb_gadget_set_state(&ci->gadget,
2078 					USB_STATE_SUSPENDED);
2079 		}
2080 		retval = IRQ_HANDLED;
2081 	} else {
2082 		retval = IRQ_NONE;
2083 	}
2084 	spin_unlock(&ci->lock);
2085 
2086 	return retval;
2087 }
2088 
2089 /**
2090  * udc_start: initialize gadget role
2091  * @ci: chipidea controller
2092  */
2093 static int udc_start(struct ci_hdrc *ci)
2094 {
2095 	struct device *dev = ci->dev;
2096 	struct usb_otg_caps *otg_caps = &ci->platdata->ci_otg_caps;
2097 	int retval = 0;
2098 
2099 	ci->gadget.ops          = &usb_gadget_ops;
2100 	ci->gadget.speed        = USB_SPEED_UNKNOWN;
2101 	ci->gadget.max_speed    = USB_SPEED_HIGH;
2102 	ci->gadget.name         = ci->platdata->name;
2103 	ci->gadget.otg_caps	= otg_caps;
2104 	ci->gadget.sg_supported = 1;
2105 	ci->gadget.irq		= ci->irq;
2106 
2107 	if (ci->platdata->flags & CI_HDRC_REQUIRES_ALIGNED_DMA)
2108 		ci->gadget.quirk_avoids_skb_reserve = 1;
2109 
2110 	if (ci->is_otg && (otg_caps->hnp_support || otg_caps->srp_support ||
2111 						otg_caps->adp_support))
2112 		ci->gadget.is_otg = 1;
2113 
2114 	INIT_LIST_HEAD(&ci->gadget.ep_list);
2115 
2116 	/* alloc resources */
2117 	ci->qh_pool = dma_pool_create("ci_hw_qh", dev->parent,
2118 				       sizeof(struct ci_hw_qh),
2119 				       64, CI_HDRC_PAGE_SIZE);
2120 	if (ci->qh_pool == NULL)
2121 		return -ENOMEM;
2122 
2123 	ci->td_pool = dma_pool_create("ci_hw_td", dev->parent,
2124 				       sizeof(struct ci_hw_td),
2125 				       64, CI_HDRC_PAGE_SIZE);
2126 	if (ci->td_pool == NULL) {
2127 		retval = -ENOMEM;
2128 		goto free_qh_pool;
2129 	}
2130 
2131 	retval = init_eps(ci);
2132 	if (retval)
2133 		goto free_pools;
2134 
2135 	ci->gadget.ep0 = &ci->ep0in->ep;
2136 
2137 	retval = usb_add_gadget_udc(dev, &ci->gadget);
2138 	if (retval)
2139 		goto destroy_eps;
2140 
2141 	return retval;
2142 
2143 destroy_eps:
2144 	destroy_eps(ci);
2145 free_pools:
2146 	dma_pool_destroy(ci->td_pool);
2147 free_qh_pool:
2148 	dma_pool_destroy(ci->qh_pool);
2149 	return retval;
2150 }
2151 
2152 /*
2153  * ci_hdrc_gadget_destroy: parent remove must call this to remove UDC
2154  *
2155  * No interrupts active, the IRQ has been released
2156  */
2157 void ci_hdrc_gadget_destroy(struct ci_hdrc *ci)
2158 {
2159 	if (!ci->roles[CI_ROLE_GADGET])
2160 		return;
2161 
2162 	usb_del_gadget_udc(&ci->gadget);
2163 
2164 	destroy_eps(ci);
2165 
2166 	dma_pool_destroy(ci->td_pool);
2167 	dma_pool_destroy(ci->qh_pool);
2168 }
2169 
2170 static int udc_id_switch_for_device(struct ci_hdrc *ci)
2171 {
2172 	if (ci->platdata->pins_device)
2173 		pinctrl_select_state(ci->platdata->pctl,
2174 				     ci->platdata->pins_device);
2175 
2176 	if (ci->is_otg)
2177 		/* Clear and enable BSV irq */
2178 		hw_write_otgsc(ci, OTGSC_BSVIS | OTGSC_BSVIE,
2179 					OTGSC_BSVIS | OTGSC_BSVIE);
2180 
2181 	return 0;
2182 }
2183 
2184 static void udc_id_switch_for_host(struct ci_hdrc *ci)
2185 {
2186 	/*
2187 	 * host doesn't care B_SESSION_VALID event
2188 	 * so clear and disable BSV irq
2189 	 */
2190 	if (ci->is_otg)
2191 		hw_write_otgsc(ci, OTGSC_BSVIE | OTGSC_BSVIS, OTGSC_BSVIS);
2192 
2193 	ci->vbus_active = 0;
2194 
2195 	if (ci->platdata->pins_device && ci->platdata->pins_default)
2196 		pinctrl_select_state(ci->platdata->pctl,
2197 				     ci->platdata->pins_default);
2198 }
2199 
2200 #ifdef CONFIG_PM_SLEEP
2201 static void udc_suspend(struct ci_hdrc *ci)
2202 {
2203 	/*
2204 	 * Set OP_ENDPTLISTADDR to be non-zero for
2205 	 * checking if controller resume from power lost
2206 	 * in non-host mode.
2207 	 */
2208 	if (hw_read(ci, OP_ENDPTLISTADDR, ~0) == 0)
2209 		hw_write(ci, OP_ENDPTLISTADDR, ~0, ~0);
2210 }
2211 
2212 static void udc_resume(struct ci_hdrc *ci, bool power_lost)
2213 {
2214 	if (power_lost) {
2215 		if (ci->is_otg)
2216 			hw_write_otgsc(ci, OTGSC_BSVIS | OTGSC_BSVIE,
2217 					OTGSC_BSVIS | OTGSC_BSVIE);
2218 		if (ci->vbus_active)
2219 			usb_gadget_vbus_disconnect(&ci->gadget);
2220 	}
2221 
2222 	/* Restore value 0 if it was set for power lost check */
2223 	if (hw_read(ci, OP_ENDPTLISTADDR, ~0) == 0xFFFFFFFF)
2224 		hw_write(ci, OP_ENDPTLISTADDR, ~0, 0);
2225 }
2226 #endif
2227 
2228 /**
2229  * ci_hdrc_gadget_init - initialize device related bits
2230  * @ci: the controller
2231  *
2232  * This function initializes the gadget, if the device is "device capable".
2233  */
2234 int ci_hdrc_gadget_init(struct ci_hdrc *ci)
2235 {
2236 	struct ci_role_driver *rdrv;
2237 	int ret;
2238 
2239 	if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC))
2240 		return -ENXIO;
2241 
2242 	rdrv = devm_kzalloc(ci->dev, sizeof(*rdrv), GFP_KERNEL);
2243 	if (!rdrv)
2244 		return -ENOMEM;
2245 
2246 	rdrv->start	= udc_id_switch_for_device;
2247 	rdrv->stop	= udc_id_switch_for_host;
2248 #ifdef CONFIG_PM_SLEEP
2249 	rdrv->suspend	= udc_suspend;
2250 	rdrv->resume	= udc_resume;
2251 #endif
2252 	rdrv->irq	= udc_irq;
2253 	rdrv->name	= "gadget";
2254 
2255 	ret = udc_start(ci);
2256 	if (!ret)
2257 		ci->roles[CI_ROLE_GADGET] = rdrv;
2258 
2259 	return ret;
2260 }
2261