1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * udc.c - ChipIdea UDC driver 4 * 5 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved. 6 * 7 * Author: David Lopo 8 */ 9 10 #include <linux/delay.h> 11 #include <linux/device.h> 12 #include <linux/dmapool.h> 13 #include <linux/err.h> 14 #include <linux/irqreturn.h> 15 #include <linux/kernel.h> 16 #include <linux/slab.h> 17 #include <linux/pm_runtime.h> 18 #include <linux/pinctrl/consumer.h> 19 #include <linux/usb/ch9.h> 20 #include <linux/usb/gadget.h> 21 #include <linux/usb/otg-fsm.h> 22 #include <linux/usb/chipidea.h> 23 24 #include "ci.h" 25 #include "udc.h" 26 #include "bits.h" 27 #include "otg.h" 28 #include "otg_fsm.h" 29 30 /* control endpoint description */ 31 static const struct usb_endpoint_descriptor 32 ctrl_endpt_out_desc = { 33 .bLength = USB_DT_ENDPOINT_SIZE, 34 .bDescriptorType = USB_DT_ENDPOINT, 35 36 .bEndpointAddress = USB_DIR_OUT, 37 .bmAttributes = USB_ENDPOINT_XFER_CONTROL, 38 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX), 39 }; 40 41 static const struct usb_endpoint_descriptor 42 ctrl_endpt_in_desc = { 43 .bLength = USB_DT_ENDPOINT_SIZE, 44 .bDescriptorType = USB_DT_ENDPOINT, 45 46 .bEndpointAddress = USB_DIR_IN, 47 .bmAttributes = USB_ENDPOINT_XFER_CONTROL, 48 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX), 49 }; 50 51 /** 52 * hw_ep_bit: calculates the bit number 53 * @num: endpoint number 54 * @dir: endpoint direction 55 * 56 * This function returns bit number 57 */ 58 static inline int hw_ep_bit(int num, int dir) 59 { 60 return num + ((dir == TX) ? 16 : 0); 61 } 62 63 static inline int ep_to_bit(struct ci_hdrc *ci, int n) 64 { 65 int fill = 16 - ci->hw_ep_max / 2; 66 67 if (n >= ci->hw_ep_max / 2) 68 n += fill; 69 70 return n; 71 } 72 73 /** 74 * hw_device_state: enables/disables interrupts (execute without interruption) 75 * @dma: 0 => disable, !0 => enable and set dma engine 76 * 77 * This function returns an error code 78 */ 79 static int hw_device_state(struct ci_hdrc *ci, u32 dma) 80 { 81 if (dma) { 82 hw_write(ci, OP_ENDPTLISTADDR, ~0, dma); 83 /* interrupt, error, port change, reset, sleep/suspend */ 84 hw_write(ci, OP_USBINTR, ~0, 85 USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI); 86 } else { 87 hw_write(ci, OP_USBINTR, ~0, 0); 88 } 89 return 0; 90 } 91 92 /** 93 * hw_ep_flush: flush endpoint fifo (execute without interruption) 94 * @num: endpoint number 95 * @dir: endpoint direction 96 * 97 * This function returns an error code 98 */ 99 static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir) 100 { 101 int n = hw_ep_bit(num, dir); 102 103 do { 104 /* flush any pending transfer */ 105 hw_write(ci, OP_ENDPTFLUSH, ~0, BIT(n)); 106 while (hw_read(ci, OP_ENDPTFLUSH, BIT(n))) 107 cpu_relax(); 108 } while (hw_read(ci, OP_ENDPTSTAT, BIT(n))); 109 110 return 0; 111 } 112 113 /** 114 * hw_ep_disable: disables endpoint (execute without interruption) 115 * @num: endpoint number 116 * @dir: endpoint direction 117 * 118 * This function returns an error code 119 */ 120 static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir) 121 { 122 hw_write(ci, OP_ENDPTCTRL + num, 123 (dir == TX) ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0); 124 return 0; 125 } 126 127 /** 128 * hw_ep_enable: enables endpoint (execute without interruption) 129 * @num: endpoint number 130 * @dir: endpoint direction 131 * @type: endpoint type 132 * 133 * This function returns an error code 134 */ 135 static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type) 136 { 137 u32 mask, data; 138 139 if (dir == TX) { 140 mask = ENDPTCTRL_TXT; /* type */ 141 data = type << __ffs(mask); 142 143 mask |= ENDPTCTRL_TXS; /* unstall */ 144 mask |= ENDPTCTRL_TXR; /* reset data toggle */ 145 data |= ENDPTCTRL_TXR; 146 mask |= ENDPTCTRL_TXE; /* enable */ 147 data |= ENDPTCTRL_TXE; 148 } else { 149 mask = ENDPTCTRL_RXT; /* type */ 150 data = type << __ffs(mask); 151 152 mask |= ENDPTCTRL_RXS; /* unstall */ 153 mask |= ENDPTCTRL_RXR; /* reset data toggle */ 154 data |= ENDPTCTRL_RXR; 155 mask |= ENDPTCTRL_RXE; /* enable */ 156 data |= ENDPTCTRL_RXE; 157 } 158 hw_write(ci, OP_ENDPTCTRL + num, mask, data); 159 return 0; 160 } 161 162 /** 163 * hw_ep_get_halt: return endpoint halt status 164 * @num: endpoint number 165 * @dir: endpoint direction 166 * 167 * This function returns 1 if endpoint halted 168 */ 169 static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir) 170 { 171 u32 mask = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS; 172 173 return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0; 174 } 175 176 /** 177 * hw_ep_prime: primes endpoint (execute without interruption) 178 * @num: endpoint number 179 * @dir: endpoint direction 180 * @is_ctrl: true if control endpoint 181 * 182 * This function returns an error code 183 */ 184 static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl) 185 { 186 int n = hw_ep_bit(num, dir); 187 188 /* Synchronize before ep prime */ 189 wmb(); 190 191 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num))) 192 return -EAGAIN; 193 194 hw_write(ci, OP_ENDPTPRIME, ~0, BIT(n)); 195 196 while (hw_read(ci, OP_ENDPTPRIME, BIT(n))) 197 cpu_relax(); 198 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num))) 199 return -EAGAIN; 200 201 /* status shoult be tested according with manual but it doesn't work */ 202 return 0; 203 } 204 205 /** 206 * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute 207 * without interruption) 208 * @num: endpoint number 209 * @dir: endpoint direction 210 * @value: true => stall, false => unstall 211 * 212 * This function returns an error code 213 */ 214 static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value) 215 { 216 if (value != 0 && value != 1) 217 return -EINVAL; 218 219 do { 220 enum ci_hw_regs reg = OP_ENDPTCTRL + num; 221 u32 mask_xs = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS; 222 u32 mask_xr = (dir == TX) ? ENDPTCTRL_TXR : ENDPTCTRL_RXR; 223 224 /* data toggle - reserved for EP0 but it's in ESS */ 225 hw_write(ci, reg, mask_xs|mask_xr, 226 value ? mask_xs : mask_xr); 227 } while (value != hw_ep_get_halt(ci, num, dir)); 228 229 return 0; 230 } 231 232 /** 233 * hw_is_port_high_speed: test if port is high speed 234 * 235 * This function returns true if high speed port 236 */ 237 static int hw_port_is_high_speed(struct ci_hdrc *ci) 238 { 239 return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) : 240 hw_read(ci, OP_PORTSC, PORTSC_HSP); 241 } 242 243 /** 244 * hw_test_and_clear_complete: test & clear complete status (execute without 245 * interruption) 246 * @n: endpoint number 247 * 248 * This function returns complete status 249 */ 250 static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n) 251 { 252 n = ep_to_bit(ci, n); 253 return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n)); 254 } 255 256 /** 257 * hw_test_and_clear_intr_active: test & clear active interrupts (execute 258 * without interruption) 259 * 260 * This function returns active interrutps 261 */ 262 static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci) 263 { 264 u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci); 265 266 hw_write(ci, OP_USBSTS, ~0, reg); 267 return reg; 268 } 269 270 /** 271 * hw_test_and_clear_setup_guard: test & clear setup guard (execute without 272 * interruption) 273 * 274 * This function returns guard value 275 */ 276 static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci) 277 { 278 return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0); 279 } 280 281 /** 282 * hw_test_and_set_setup_guard: test & set setup guard (execute without 283 * interruption) 284 * 285 * This function returns guard value 286 */ 287 static int hw_test_and_set_setup_guard(struct ci_hdrc *ci) 288 { 289 return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW); 290 } 291 292 /** 293 * hw_usb_set_address: configures USB address (execute without interruption) 294 * @value: new USB address 295 * 296 * This function explicitly sets the address, without the "USBADRA" (advance) 297 * feature, which is not supported by older versions of the controller. 298 */ 299 static void hw_usb_set_address(struct ci_hdrc *ci, u8 value) 300 { 301 hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR, 302 value << __ffs(DEVICEADDR_USBADR)); 303 } 304 305 /** 306 * hw_usb_reset: restart device after a bus reset (execute without 307 * interruption) 308 * 309 * This function returns an error code 310 */ 311 static int hw_usb_reset(struct ci_hdrc *ci) 312 { 313 hw_usb_set_address(ci, 0); 314 315 /* ESS flushes only at end?!? */ 316 hw_write(ci, OP_ENDPTFLUSH, ~0, ~0); 317 318 /* clear setup token semaphores */ 319 hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0); 320 321 /* clear complete status */ 322 hw_write(ci, OP_ENDPTCOMPLETE, 0, 0); 323 324 /* wait until all bits cleared */ 325 while (hw_read(ci, OP_ENDPTPRIME, ~0)) 326 udelay(10); /* not RTOS friendly */ 327 328 /* reset all endpoints ? */ 329 330 /* reset internal status and wait for further instructions 331 no need to verify the port reset status (ESS does it) */ 332 333 return 0; 334 } 335 336 /****************************************************************************** 337 * UTIL block 338 *****************************************************************************/ 339 340 static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq, 341 unsigned length) 342 { 343 int i; 344 u32 temp; 345 struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node), 346 GFP_ATOMIC); 347 348 if (node == NULL) 349 return -ENOMEM; 350 351 node->ptr = dma_pool_zalloc(hwep->td_pool, GFP_ATOMIC, &node->dma); 352 if (node->ptr == NULL) { 353 kfree(node); 354 return -ENOMEM; 355 } 356 357 node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES)); 358 node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES); 359 node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE); 360 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) { 361 u32 mul = hwreq->req.length / hwep->ep.maxpacket; 362 363 if (hwreq->req.length == 0 364 || hwreq->req.length % hwep->ep.maxpacket) 365 mul++; 366 node->ptr->token |= cpu_to_le32(mul << __ffs(TD_MULTO)); 367 } 368 369 temp = (u32) (hwreq->req.dma + hwreq->req.actual); 370 if (length) { 371 node->ptr->page[0] = cpu_to_le32(temp); 372 for (i = 1; i < TD_PAGE_COUNT; i++) { 373 u32 page = temp + i * CI_HDRC_PAGE_SIZE; 374 page &= ~TD_RESERVED_MASK; 375 node->ptr->page[i] = cpu_to_le32(page); 376 } 377 } 378 379 hwreq->req.actual += length; 380 381 if (!list_empty(&hwreq->tds)) { 382 /* get the last entry */ 383 lastnode = list_entry(hwreq->tds.prev, 384 struct td_node, td); 385 lastnode->ptr->next = cpu_to_le32(node->dma); 386 } 387 388 INIT_LIST_HEAD(&node->td); 389 list_add_tail(&node->td, &hwreq->tds); 390 391 return 0; 392 } 393 394 /** 395 * _usb_addr: calculates endpoint address from direction & number 396 * @ep: endpoint 397 */ 398 static inline u8 _usb_addr(struct ci_hw_ep *ep) 399 { 400 return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num; 401 } 402 403 /** 404 * _hardware_enqueue: configures a request at hardware level 405 * @hwep: endpoint 406 * @hwreq: request 407 * 408 * This function returns an error code 409 */ 410 static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq) 411 { 412 struct ci_hdrc *ci = hwep->ci; 413 int ret = 0; 414 unsigned rest = hwreq->req.length; 415 int pages = TD_PAGE_COUNT; 416 struct td_node *firstnode, *lastnode; 417 418 /* don't queue twice */ 419 if (hwreq->req.status == -EALREADY) 420 return -EALREADY; 421 422 hwreq->req.status = -EALREADY; 423 424 ret = usb_gadget_map_request_by_dev(ci->dev->parent, 425 &hwreq->req, hwep->dir); 426 if (ret) 427 return ret; 428 429 /* 430 * The first buffer could be not page aligned. 431 * In that case we have to span into one extra td. 432 */ 433 if (hwreq->req.dma % PAGE_SIZE) 434 pages--; 435 436 if (rest == 0) { 437 ret = add_td_to_list(hwep, hwreq, 0); 438 if (ret < 0) 439 goto done; 440 } 441 442 while (rest > 0) { 443 unsigned count = min(hwreq->req.length - hwreq->req.actual, 444 (unsigned)(pages * CI_HDRC_PAGE_SIZE)); 445 ret = add_td_to_list(hwep, hwreq, count); 446 if (ret < 0) 447 goto done; 448 449 rest -= count; 450 } 451 452 if (hwreq->req.zero && hwreq->req.length && hwep->dir == TX 453 && (hwreq->req.length % hwep->ep.maxpacket == 0)) { 454 ret = add_td_to_list(hwep, hwreq, 0); 455 if (ret < 0) 456 goto done; 457 } 458 459 firstnode = list_first_entry(&hwreq->tds, struct td_node, td); 460 461 lastnode = list_entry(hwreq->tds.prev, 462 struct td_node, td); 463 464 lastnode->ptr->next = cpu_to_le32(TD_TERMINATE); 465 if (!hwreq->req.no_interrupt) 466 lastnode->ptr->token |= cpu_to_le32(TD_IOC); 467 wmb(); 468 469 hwreq->req.actual = 0; 470 if (!list_empty(&hwep->qh.queue)) { 471 struct ci_hw_req *hwreqprev; 472 int n = hw_ep_bit(hwep->num, hwep->dir); 473 int tmp_stat; 474 struct td_node *prevlastnode; 475 u32 next = firstnode->dma & TD_ADDR_MASK; 476 477 hwreqprev = list_entry(hwep->qh.queue.prev, 478 struct ci_hw_req, queue); 479 prevlastnode = list_entry(hwreqprev->tds.prev, 480 struct td_node, td); 481 482 prevlastnode->ptr->next = cpu_to_le32(next); 483 wmb(); 484 if (hw_read(ci, OP_ENDPTPRIME, BIT(n))) 485 goto done; 486 do { 487 hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW); 488 tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n)); 489 } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW)); 490 hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0); 491 if (tmp_stat) 492 goto done; 493 } 494 495 /* QH configuration */ 496 hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma); 497 hwep->qh.ptr->td.token &= 498 cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE)); 499 500 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == RX) { 501 u32 mul = hwreq->req.length / hwep->ep.maxpacket; 502 503 if (hwreq->req.length == 0 504 || hwreq->req.length % hwep->ep.maxpacket) 505 mul++; 506 hwep->qh.ptr->cap |= cpu_to_le32(mul << __ffs(QH_MULT)); 507 } 508 509 ret = hw_ep_prime(ci, hwep->num, hwep->dir, 510 hwep->type == USB_ENDPOINT_XFER_CONTROL); 511 done: 512 return ret; 513 } 514 515 /* 516 * free_pending_td: remove a pending request for the endpoint 517 * @hwep: endpoint 518 */ 519 static void free_pending_td(struct ci_hw_ep *hwep) 520 { 521 struct td_node *pending = hwep->pending_td; 522 523 dma_pool_free(hwep->td_pool, pending->ptr, pending->dma); 524 hwep->pending_td = NULL; 525 kfree(pending); 526 } 527 528 static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep, 529 struct td_node *node) 530 { 531 hwep->qh.ptr->td.next = cpu_to_le32(node->dma); 532 hwep->qh.ptr->td.token &= 533 cpu_to_le32(~(TD_STATUS_HALTED | TD_STATUS_ACTIVE)); 534 535 return hw_ep_prime(ci, hwep->num, hwep->dir, 536 hwep->type == USB_ENDPOINT_XFER_CONTROL); 537 } 538 539 /** 540 * _hardware_dequeue: handles a request at hardware level 541 * @gadget: gadget 542 * @hwep: endpoint 543 * 544 * This function returns an error code 545 */ 546 static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq) 547 { 548 u32 tmptoken; 549 struct td_node *node, *tmpnode; 550 unsigned remaining_length; 551 unsigned actual = hwreq->req.length; 552 struct ci_hdrc *ci = hwep->ci; 553 554 if (hwreq->req.status != -EALREADY) 555 return -EINVAL; 556 557 hwreq->req.status = 0; 558 559 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) { 560 tmptoken = le32_to_cpu(node->ptr->token); 561 if ((TD_STATUS_ACTIVE & tmptoken) != 0) { 562 int n = hw_ep_bit(hwep->num, hwep->dir); 563 564 if (ci->rev == CI_REVISION_24) 565 if (!hw_read(ci, OP_ENDPTSTAT, BIT(n))) 566 reprime_dtd(ci, hwep, node); 567 hwreq->req.status = -EALREADY; 568 return -EBUSY; 569 } 570 571 remaining_length = (tmptoken & TD_TOTAL_BYTES); 572 remaining_length >>= __ffs(TD_TOTAL_BYTES); 573 actual -= remaining_length; 574 575 hwreq->req.status = tmptoken & TD_STATUS; 576 if ((TD_STATUS_HALTED & hwreq->req.status)) { 577 hwreq->req.status = -EPIPE; 578 break; 579 } else if ((TD_STATUS_DT_ERR & hwreq->req.status)) { 580 hwreq->req.status = -EPROTO; 581 break; 582 } else if ((TD_STATUS_TR_ERR & hwreq->req.status)) { 583 hwreq->req.status = -EILSEQ; 584 break; 585 } 586 587 if (remaining_length) { 588 if (hwep->dir == TX) { 589 hwreq->req.status = -EPROTO; 590 break; 591 } 592 } 593 /* 594 * As the hardware could still address the freed td 595 * which will run the udc unusable, the cleanup of the 596 * td has to be delayed by one. 597 */ 598 if (hwep->pending_td) 599 free_pending_td(hwep); 600 601 hwep->pending_td = node; 602 list_del_init(&node->td); 603 } 604 605 usb_gadget_unmap_request_by_dev(hwep->ci->dev->parent, 606 &hwreq->req, hwep->dir); 607 608 hwreq->req.actual += actual; 609 610 if (hwreq->req.status) 611 return hwreq->req.status; 612 613 return hwreq->req.actual; 614 } 615 616 /** 617 * _ep_nuke: dequeues all endpoint requests 618 * @hwep: endpoint 619 * 620 * This function returns an error code 621 * Caller must hold lock 622 */ 623 static int _ep_nuke(struct ci_hw_ep *hwep) 624 __releases(hwep->lock) 625 __acquires(hwep->lock) 626 { 627 struct td_node *node, *tmpnode; 628 if (hwep == NULL) 629 return -EINVAL; 630 631 hw_ep_flush(hwep->ci, hwep->num, hwep->dir); 632 633 while (!list_empty(&hwep->qh.queue)) { 634 635 /* pop oldest request */ 636 struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next, 637 struct ci_hw_req, queue); 638 639 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) { 640 dma_pool_free(hwep->td_pool, node->ptr, node->dma); 641 list_del_init(&node->td); 642 node->ptr = NULL; 643 kfree(node); 644 } 645 646 list_del_init(&hwreq->queue); 647 hwreq->req.status = -ESHUTDOWN; 648 649 if (hwreq->req.complete != NULL) { 650 spin_unlock(hwep->lock); 651 usb_gadget_giveback_request(&hwep->ep, &hwreq->req); 652 spin_lock(hwep->lock); 653 } 654 } 655 656 if (hwep->pending_td) 657 free_pending_td(hwep); 658 659 return 0; 660 } 661 662 static int _ep_set_halt(struct usb_ep *ep, int value, bool check_transfer) 663 { 664 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); 665 int direction, retval = 0; 666 unsigned long flags; 667 668 if (ep == NULL || hwep->ep.desc == NULL) 669 return -EINVAL; 670 671 if (usb_endpoint_xfer_isoc(hwep->ep.desc)) 672 return -EOPNOTSUPP; 673 674 spin_lock_irqsave(hwep->lock, flags); 675 676 if (value && hwep->dir == TX && check_transfer && 677 !list_empty(&hwep->qh.queue) && 678 !usb_endpoint_xfer_control(hwep->ep.desc)) { 679 spin_unlock_irqrestore(hwep->lock, flags); 680 return -EAGAIN; 681 } 682 683 direction = hwep->dir; 684 do { 685 retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value); 686 687 if (!value) 688 hwep->wedge = 0; 689 690 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) 691 hwep->dir = (hwep->dir == TX) ? RX : TX; 692 693 } while (hwep->dir != direction); 694 695 spin_unlock_irqrestore(hwep->lock, flags); 696 return retval; 697 } 698 699 700 /** 701 * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts 702 * @gadget: gadget 703 * 704 * This function returns an error code 705 */ 706 static int _gadget_stop_activity(struct usb_gadget *gadget) 707 { 708 struct usb_ep *ep; 709 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget); 710 unsigned long flags; 711 712 /* flush all endpoints */ 713 gadget_for_each_ep(ep, gadget) { 714 usb_ep_fifo_flush(ep); 715 } 716 usb_ep_fifo_flush(&ci->ep0out->ep); 717 usb_ep_fifo_flush(&ci->ep0in->ep); 718 719 /* make sure to disable all endpoints */ 720 gadget_for_each_ep(ep, gadget) { 721 usb_ep_disable(ep); 722 } 723 724 if (ci->status != NULL) { 725 usb_ep_free_request(&ci->ep0in->ep, ci->status); 726 ci->status = NULL; 727 } 728 729 spin_lock_irqsave(&ci->lock, flags); 730 ci->gadget.speed = USB_SPEED_UNKNOWN; 731 ci->remote_wakeup = 0; 732 ci->suspended = 0; 733 spin_unlock_irqrestore(&ci->lock, flags); 734 735 return 0; 736 } 737 738 /****************************************************************************** 739 * ISR block 740 *****************************************************************************/ 741 /** 742 * isr_reset_handler: USB reset interrupt handler 743 * @ci: UDC device 744 * 745 * This function resets USB engine after a bus reset occurred 746 */ 747 static void isr_reset_handler(struct ci_hdrc *ci) 748 __releases(ci->lock) 749 __acquires(ci->lock) 750 { 751 int retval; 752 753 spin_unlock(&ci->lock); 754 if (ci->gadget.speed != USB_SPEED_UNKNOWN) 755 usb_gadget_udc_reset(&ci->gadget, ci->driver); 756 757 retval = _gadget_stop_activity(&ci->gadget); 758 if (retval) 759 goto done; 760 761 retval = hw_usb_reset(ci); 762 if (retval) 763 goto done; 764 765 ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC); 766 if (ci->status == NULL) 767 retval = -ENOMEM; 768 769 done: 770 spin_lock(&ci->lock); 771 772 if (retval) 773 dev_err(ci->dev, "error: %i\n", retval); 774 } 775 776 /** 777 * isr_get_status_complete: get_status request complete function 778 * @ep: endpoint 779 * @req: request handled 780 * 781 * Caller must release lock 782 */ 783 static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req) 784 { 785 if (ep == NULL || req == NULL) 786 return; 787 788 kfree(req->buf); 789 usb_ep_free_request(ep, req); 790 } 791 792 /** 793 * _ep_queue: queues (submits) an I/O request to an endpoint 794 * @ep: endpoint 795 * @req: request 796 * @gfp_flags: GFP flags (not used) 797 * 798 * Caller must hold lock 799 * This function returns an error code 800 */ 801 static int _ep_queue(struct usb_ep *ep, struct usb_request *req, 802 gfp_t __maybe_unused gfp_flags) 803 { 804 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); 805 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req); 806 struct ci_hdrc *ci = hwep->ci; 807 int retval = 0; 808 809 if (ep == NULL || req == NULL || hwep->ep.desc == NULL) 810 return -EINVAL; 811 812 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) { 813 if (req->length) 814 hwep = (ci->ep0_dir == RX) ? 815 ci->ep0out : ci->ep0in; 816 if (!list_empty(&hwep->qh.queue)) { 817 _ep_nuke(hwep); 818 dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n", 819 _usb_addr(hwep)); 820 } 821 } 822 823 if (usb_endpoint_xfer_isoc(hwep->ep.desc) && 824 hwreq->req.length > hwep->ep.mult * hwep->ep.maxpacket) { 825 dev_err(hwep->ci->dev, "request length too big for isochronous\n"); 826 return -EMSGSIZE; 827 } 828 829 /* first nuke then test link, e.g. previous status has not sent */ 830 if (!list_empty(&hwreq->queue)) { 831 dev_err(hwep->ci->dev, "request already in queue\n"); 832 return -EBUSY; 833 } 834 835 /* push request */ 836 hwreq->req.status = -EINPROGRESS; 837 hwreq->req.actual = 0; 838 839 retval = _hardware_enqueue(hwep, hwreq); 840 841 if (retval == -EALREADY) 842 retval = 0; 843 if (!retval) 844 list_add_tail(&hwreq->queue, &hwep->qh.queue); 845 846 return retval; 847 } 848 849 /** 850 * isr_get_status_response: get_status request response 851 * @ci: ci struct 852 * @setup: setup request packet 853 * 854 * This function returns an error code 855 */ 856 static int isr_get_status_response(struct ci_hdrc *ci, 857 struct usb_ctrlrequest *setup) 858 __releases(hwep->lock) 859 __acquires(hwep->lock) 860 { 861 struct ci_hw_ep *hwep = ci->ep0in; 862 struct usb_request *req = NULL; 863 gfp_t gfp_flags = GFP_ATOMIC; 864 int dir, num, retval; 865 866 if (hwep == NULL || setup == NULL) 867 return -EINVAL; 868 869 spin_unlock(hwep->lock); 870 req = usb_ep_alloc_request(&hwep->ep, gfp_flags); 871 spin_lock(hwep->lock); 872 if (req == NULL) 873 return -ENOMEM; 874 875 req->complete = isr_get_status_complete; 876 req->length = 2; 877 req->buf = kzalloc(req->length, gfp_flags); 878 if (req->buf == NULL) { 879 retval = -ENOMEM; 880 goto err_free_req; 881 } 882 883 if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) { 884 *(u16 *)req->buf = (ci->remote_wakeup << 1) | 885 ci->gadget.is_selfpowered; 886 } else if ((setup->bRequestType & USB_RECIP_MASK) \ 887 == USB_RECIP_ENDPOINT) { 888 dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ? 889 TX : RX; 890 num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK; 891 *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir); 892 } 893 /* else do nothing; reserved for future use */ 894 895 retval = _ep_queue(&hwep->ep, req, gfp_flags); 896 if (retval) 897 goto err_free_buf; 898 899 return 0; 900 901 err_free_buf: 902 kfree(req->buf); 903 err_free_req: 904 spin_unlock(hwep->lock); 905 usb_ep_free_request(&hwep->ep, req); 906 spin_lock(hwep->lock); 907 return retval; 908 } 909 910 /** 911 * isr_setup_status_complete: setup_status request complete function 912 * @ep: endpoint 913 * @req: request handled 914 * 915 * Caller must release lock. Put the port in test mode if test mode 916 * feature is selected. 917 */ 918 static void 919 isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req) 920 { 921 struct ci_hdrc *ci = req->context; 922 unsigned long flags; 923 924 if (ci->setaddr) { 925 hw_usb_set_address(ci, ci->address); 926 ci->setaddr = false; 927 if (ci->address) 928 usb_gadget_set_state(&ci->gadget, USB_STATE_ADDRESS); 929 } 930 931 spin_lock_irqsave(&ci->lock, flags); 932 if (ci->test_mode) 933 hw_port_test_set(ci, ci->test_mode); 934 spin_unlock_irqrestore(&ci->lock, flags); 935 } 936 937 /** 938 * isr_setup_status_phase: queues the status phase of a setup transation 939 * @ci: ci struct 940 * 941 * This function returns an error code 942 */ 943 static int isr_setup_status_phase(struct ci_hdrc *ci) 944 { 945 struct ci_hw_ep *hwep; 946 947 /* 948 * Unexpected USB controller behavior, caused by bad signal integrity 949 * or ground reference problems, can lead to isr_setup_status_phase 950 * being called with ci->status equal to NULL. 951 * If this situation occurs, you should review your USB hardware design. 952 */ 953 if (WARN_ON_ONCE(!ci->status)) 954 return -EPIPE; 955 956 hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in; 957 ci->status->context = ci; 958 ci->status->complete = isr_setup_status_complete; 959 960 return _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC); 961 } 962 963 /** 964 * isr_tr_complete_low: transaction complete low level handler 965 * @hwep: endpoint 966 * 967 * This function returns an error code 968 * Caller must hold lock 969 */ 970 static int isr_tr_complete_low(struct ci_hw_ep *hwep) 971 __releases(hwep->lock) 972 __acquires(hwep->lock) 973 { 974 struct ci_hw_req *hwreq, *hwreqtemp; 975 struct ci_hw_ep *hweptemp = hwep; 976 int retval = 0; 977 978 list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue, 979 queue) { 980 retval = _hardware_dequeue(hwep, hwreq); 981 if (retval < 0) 982 break; 983 list_del_init(&hwreq->queue); 984 if (hwreq->req.complete != NULL) { 985 spin_unlock(hwep->lock); 986 if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) && 987 hwreq->req.length) 988 hweptemp = hwep->ci->ep0in; 989 usb_gadget_giveback_request(&hweptemp->ep, &hwreq->req); 990 spin_lock(hwep->lock); 991 } 992 } 993 994 if (retval == -EBUSY) 995 retval = 0; 996 997 return retval; 998 } 999 1000 static int otg_a_alt_hnp_support(struct ci_hdrc *ci) 1001 { 1002 dev_warn(&ci->gadget.dev, 1003 "connect the device to an alternate port if you want HNP\n"); 1004 return isr_setup_status_phase(ci); 1005 } 1006 1007 /** 1008 * isr_setup_packet_handler: setup packet handler 1009 * @ci: UDC descriptor 1010 * 1011 * This function handles setup packet 1012 */ 1013 static void isr_setup_packet_handler(struct ci_hdrc *ci) 1014 __releases(ci->lock) 1015 __acquires(ci->lock) 1016 { 1017 struct ci_hw_ep *hwep = &ci->ci_hw_ep[0]; 1018 struct usb_ctrlrequest req; 1019 int type, num, dir, err = -EINVAL; 1020 u8 tmode = 0; 1021 1022 /* 1023 * Flush data and handshake transactions of previous 1024 * setup packet. 1025 */ 1026 _ep_nuke(ci->ep0out); 1027 _ep_nuke(ci->ep0in); 1028 1029 /* read_setup_packet */ 1030 do { 1031 hw_test_and_set_setup_guard(ci); 1032 memcpy(&req, &hwep->qh.ptr->setup, sizeof(req)); 1033 } while (!hw_test_and_clear_setup_guard(ci)); 1034 1035 type = req.bRequestType; 1036 1037 ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX; 1038 1039 switch (req.bRequest) { 1040 case USB_REQ_CLEAR_FEATURE: 1041 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) && 1042 le16_to_cpu(req.wValue) == 1043 USB_ENDPOINT_HALT) { 1044 if (req.wLength != 0) 1045 break; 1046 num = le16_to_cpu(req.wIndex); 1047 dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX; 1048 num &= USB_ENDPOINT_NUMBER_MASK; 1049 if (dir == TX) 1050 num += ci->hw_ep_max / 2; 1051 if (!ci->ci_hw_ep[num].wedge) { 1052 spin_unlock(&ci->lock); 1053 err = usb_ep_clear_halt( 1054 &ci->ci_hw_ep[num].ep); 1055 spin_lock(&ci->lock); 1056 if (err) 1057 break; 1058 } 1059 err = isr_setup_status_phase(ci); 1060 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) && 1061 le16_to_cpu(req.wValue) == 1062 USB_DEVICE_REMOTE_WAKEUP) { 1063 if (req.wLength != 0) 1064 break; 1065 ci->remote_wakeup = 0; 1066 err = isr_setup_status_phase(ci); 1067 } else { 1068 goto delegate; 1069 } 1070 break; 1071 case USB_REQ_GET_STATUS: 1072 if ((type != (USB_DIR_IN|USB_RECIP_DEVICE) || 1073 le16_to_cpu(req.wIndex) == OTG_STS_SELECTOR) && 1074 type != (USB_DIR_IN|USB_RECIP_ENDPOINT) && 1075 type != (USB_DIR_IN|USB_RECIP_INTERFACE)) 1076 goto delegate; 1077 if (le16_to_cpu(req.wLength) != 2 || 1078 le16_to_cpu(req.wValue) != 0) 1079 break; 1080 err = isr_get_status_response(ci, &req); 1081 break; 1082 case USB_REQ_SET_ADDRESS: 1083 if (type != (USB_DIR_OUT|USB_RECIP_DEVICE)) 1084 goto delegate; 1085 if (le16_to_cpu(req.wLength) != 0 || 1086 le16_to_cpu(req.wIndex) != 0) 1087 break; 1088 ci->address = (u8)le16_to_cpu(req.wValue); 1089 ci->setaddr = true; 1090 err = isr_setup_status_phase(ci); 1091 break; 1092 case USB_REQ_SET_FEATURE: 1093 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) && 1094 le16_to_cpu(req.wValue) == 1095 USB_ENDPOINT_HALT) { 1096 if (req.wLength != 0) 1097 break; 1098 num = le16_to_cpu(req.wIndex); 1099 dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX; 1100 num &= USB_ENDPOINT_NUMBER_MASK; 1101 if (dir == TX) 1102 num += ci->hw_ep_max / 2; 1103 1104 spin_unlock(&ci->lock); 1105 err = _ep_set_halt(&ci->ci_hw_ep[num].ep, 1, false); 1106 spin_lock(&ci->lock); 1107 if (!err) 1108 isr_setup_status_phase(ci); 1109 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) { 1110 if (req.wLength != 0) 1111 break; 1112 switch (le16_to_cpu(req.wValue)) { 1113 case USB_DEVICE_REMOTE_WAKEUP: 1114 ci->remote_wakeup = 1; 1115 err = isr_setup_status_phase(ci); 1116 break; 1117 case USB_DEVICE_TEST_MODE: 1118 tmode = le16_to_cpu(req.wIndex) >> 8; 1119 switch (tmode) { 1120 case TEST_J: 1121 case TEST_K: 1122 case TEST_SE0_NAK: 1123 case TEST_PACKET: 1124 case TEST_FORCE_EN: 1125 ci->test_mode = tmode; 1126 err = isr_setup_status_phase( 1127 ci); 1128 break; 1129 default: 1130 break; 1131 } 1132 break; 1133 case USB_DEVICE_B_HNP_ENABLE: 1134 if (ci_otg_is_fsm_mode(ci)) { 1135 ci->gadget.b_hnp_enable = 1; 1136 err = isr_setup_status_phase( 1137 ci); 1138 } 1139 break; 1140 case USB_DEVICE_A_ALT_HNP_SUPPORT: 1141 if (ci_otg_is_fsm_mode(ci)) 1142 err = otg_a_alt_hnp_support(ci); 1143 break; 1144 case USB_DEVICE_A_HNP_SUPPORT: 1145 if (ci_otg_is_fsm_mode(ci)) { 1146 ci->gadget.a_hnp_support = 1; 1147 err = isr_setup_status_phase( 1148 ci); 1149 } 1150 break; 1151 default: 1152 goto delegate; 1153 } 1154 } else { 1155 goto delegate; 1156 } 1157 break; 1158 default: 1159 delegate: 1160 if (req.wLength == 0) /* no data phase */ 1161 ci->ep0_dir = TX; 1162 1163 spin_unlock(&ci->lock); 1164 err = ci->driver->setup(&ci->gadget, &req); 1165 spin_lock(&ci->lock); 1166 break; 1167 } 1168 1169 if (err < 0) { 1170 spin_unlock(&ci->lock); 1171 if (_ep_set_halt(&hwep->ep, 1, false)) 1172 dev_err(ci->dev, "error: _ep_set_halt\n"); 1173 spin_lock(&ci->lock); 1174 } 1175 } 1176 1177 /** 1178 * isr_tr_complete_handler: transaction complete interrupt handler 1179 * @ci: UDC descriptor 1180 * 1181 * This function handles traffic events 1182 */ 1183 static void isr_tr_complete_handler(struct ci_hdrc *ci) 1184 __releases(ci->lock) 1185 __acquires(ci->lock) 1186 { 1187 unsigned i; 1188 int err; 1189 1190 for (i = 0; i < ci->hw_ep_max; i++) { 1191 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i]; 1192 1193 if (hwep->ep.desc == NULL) 1194 continue; /* not configured */ 1195 1196 if (hw_test_and_clear_complete(ci, i)) { 1197 err = isr_tr_complete_low(hwep); 1198 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) { 1199 if (err > 0) /* needs status phase */ 1200 err = isr_setup_status_phase(ci); 1201 if (err < 0) { 1202 spin_unlock(&ci->lock); 1203 if (_ep_set_halt(&hwep->ep, 1, false)) 1204 dev_err(ci->dev, 1205 "error: _ep_set_halt\n"); 1206 spin_lock(&ci->lock); 1207 } 1208 } 1209 } 1210 1211 /* Only handle setup packet below */ 1212 if (i == 0 && 1213 hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(0))) 1214 isr_setup_packet_handler(ci); 1215 } 1216 } 1217 1218 /****************************************************************************** 1219 * ENDPT block 1220 *****************************************************************************/ 1221 /** 1222 * ep_enable: configure endpoint, making it usable 1223 * 1224 * Check usb_ep_enable() at "usb_gadget.h" for details 1225 */ 1226 static int ep_enable(struct usb_ep *ep, 1227 const struct usb_endpoint_descriptor *desc) 1228 { 1229 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); 1230 int retval = 0; 1231 unsigned long flags; 1232 u32 cap = 0; 1233 1234 if (ep == NULL || desc == NULL) 1235 return -EINVAL; 1236 1237 spin_lock_irqsave(hwep->lock, flags); 1238 1239 /* only internal SW should enable ctrl endpts */ 1240 1241 if (!list_empty(&hwep->qh.queue)) { 1242 dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n"); 1243 spin_unlock_irqrestore(hwep->lock, flags); 1244 return -EBUSY; 1245 } 1246 1247 hwep->ep.desc = desc; 1248 1249 hwep->dir = usb_endpoint_dir_in(desc) ? TX : RX; 1250 hwep->num = usb_endpoint_num(desc); 1251 hwep->type = usb_endpoint_type(desc); 1252 1253 hwep->ep.maxpacket = usb_endpoint_maxp(desc); 1254 hwep->ep.mult = usb_endpoint_maxp_mult(desc); 1255 1256 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) 1257 cap |= QH_IOS; 1258 1259 cap |= QH_ZLT; 1260 cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT; 1261 /* 1262 * For ISO-TX, we set mult at QH as the largest value, and use 1263 * MultO at TD as real mult value. 1264 */ 1265 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) 1266 cap |= 3 << __ffs(QH_MULT); 1267 1268 hwep->qh.ptr->cap = cpu_to_le32(cap); 1269 1270 hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE); /* needed? */ 1271 1272 if (hwep->num != 0 && hwep->type == USB_ENDPOINT_XFER_CONTROL) { 1273 dev_err(hwep->ci->dev, "Set control xfer at non-ep0\n"); 1274 retval = -EINVAL; 1275 } 1276 1277 /* 1278 * Enable endpoints in the HW other than ep0 as ep0 1279 * is always enabled 1280 */ 1281 if (hwep->num) 1282 retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir, 1283 hwep->type); 1284 1285 spin_unlock_irqrestore(hwep->lock, flags); 1286 return retval; 1287 } 1288 1289 /** 1290 * ep_disable: endpoint is no longer usable 1291 * 1292 * Check usb_ep_disable() at "usb_gadget.h" for details 1293 */ 1294 static int ep_disable(struct usb_ep *ep) 1295 { 1296 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); 1297 int direction, retval = 0; 1298 unsigned long flags; 1299 1300 if (ep == NULL) 1301 return -EINVAL; 1302 else if (hwep->ep.desc == NULL) 1303 return -EBUSY; 1304 1305 spin_lock_irqsave(hwep->lock, flags); 1306 if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) { 1307 spin_unlock_irqrestore(hwep->lock, flags); 1308 return 0; 1309 } 1310 1311 /* only internal SW should disable ctrl endpts */ 1312 1313 direction = hwep->dir; 1314 do { 1315 retval |= _ep_nuke(hwep); 1316 retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir); 1317 1318 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) 1319 hwep->dir = (hwep->dir == TX) ? RX : TX; 1320 1321 } while (hwep->dir != direction); 1322 1323 hwep->ep.desc = NULL; 1324 1325 spin_unlock_irqrestore(hwep->lock, flags); 1326 return retval; 1327 } 1328 1329 /** 1330 * ep_alloc_request: allocate a request object to use with this endpoint 1331 * 1332 * Check usb_ep_alloc_request() at "usb_gadget.h" for details 1333 */ 1334 static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags) 1335 { 1336 struct ci_hw_req *hwreq = NULL; 1337 1338 if (ep == NULL) 1339 return NULL; 1340 1341 hwreq = kzalloc(sizeof(struct ci_hw_req), gfp_flags); 1342 if (hwreq != NULL) { 1343 INIT_LIST_HEAD(&hwreq->queue); 1344 INIT_LIST_HEAD(&hwreq->tds); 1345 } 1346 1347 return (hwreq == NULL) ? NULL : &hwreq->req; 1348 } 1349 1350 /** 1351 * ep_free_request: frees a request object 1352 * 1353 * Check usb_ep_free_request() at "usb_gadget.h" for details 1354 */ 1355 static void ep_free_request(struct usb_ep *ep, struct usb_request *req) 1356 { 1357 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); 1358 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req); 1359 struct td_node *node, *tmpnode; 1360 unsigned long flags; 1361 1362 if (ep == NULL || req == NULL) { 1363 return; 1364 } else if (!list_empty(&hwreq->queue)) { 1365 dev_err(hwep->ci->dev, "freeing queued request\n"); 1366 return; 1367 } 1368 1369 spin_lock_irqsave(hwep->lock, flags); 1370 1371 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) { 1372 dma_pool_free(hwep->td_pool, node->ptr, node->dma); 1373 list_del_init(&node->td); 1374 node->ptr = NULL; 1375 kfree(node); 1376 } 1377 1378 kfree(hwreq); 1379 1380 spin_unlock_irqrestore(hwep->lock, flags); 1381 } 1382 1383 /** 1384 * ep_queue: queues (submits) an I/O request to an endpoint 1385 * 1386 * Check usb_ep_queue()* at usb_gadget.h" for details 1387 */ 1388 static int ep_queue(struct usb_ep *ep, struct usb_request *req, 1389 gfp_t __maybe_unused gfp_flags) 1390 { 1391 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); 1392 int retval = 0; 1393 unsigned long flags; 1394 1395 if (ep == NULL || req == NULL || hwep->ep.desc == NULL) 1396 return -EINVAL; 1397 1398 spin_lock_irqsave(hwep->lock, flags); 1399 if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) { 1400 spin_unlock_irqrestore(hwep->lock, flags); 1401 return 0; 1402 } 1403 retval = _ep_queue(ep, req, gfp_flags); 1404 spin_unlock_irqrestore(hwep->lock, flags); 1405 return retval; 1406 } 1407 1408 /** 1409 * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint 1410 * 1411 * Check usb_ep_dequeue() at "usb_gadget.h" for details 1412 */ 1413 static int ep_dequeue(struct usb_ep *ep, struct usb_request *req) 1414 { 1415 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); 1416 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req); 1417 unsigned long flags; 1418 struct td_node *node, *tmpnode; 1419 1420 if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY || 1421 hwep->ep.desc == NULL || list_empty(&hwreq->queue) || 1422 list_empty(&hwep->qh.queue)) 1423 return -EINVAL; 1424 1425 spin_lock_irqsave(hwep->lock, flags); 1426 if (hwep->ci->gadget.speed != USB_SPEED_UNKNOWN) 1427 hw_ep_flush(hwep->ci, hwep->num, hwep->dir); 1428 1429 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) { 1430 dma_pool_free(hwep->td_pool, node->ptr, node->dma); 1431 list_del(&node->td); 1432 kfree(node); 1433 } 1434 1435 /* pop request */ 1436 list_del_init(&hwreq->queue); 1437 1438 usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir); 1439 1440 req->status = -ECONNRESET; 1441 1442 if (hwreq->req.complete != NULL) { 1443 spin_unlock(hwep->lock); 1444 usb_gadget_giveback_request(&hwep->ep, &hwreq->req); 1445 spin_lock(hwep->lock); 1446 } 1447 1448 spin_unlock_irqrestore(hwep->lock, flags); 1449 return 0; 1450 } 1451 1452 /** 1453 * ep_set_halt: sets the endpoint halt feature 1454 * 1455 * Check usb_ep_set_halt() at "usb_gadget.h" for details 1456 */ 1457 static int ep_set_halt(struct usb_ep *ep, int value) 1458 { 1459 return _ep_set_halt(ep, value, true); 1460 } 1461 1462 /** 1463 * ep_set_wedge: sets the halt feature and ignores clear requests 1464 * 1465 * Check usb_ep_set_wedge() at "usb_gadget.h" for details 1466 */ 1467 static int ep_set_wedge(struct usb_ep *ep) 1468 { 1469 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); 1470 unsigned long flags; 1471 1472 if (ep == NULL || hwep->ep.desc == NULL) 1473 return -EINVAL; 1474 1475 spin_lock_irqsave(hwep->lock, flags); 1476 hwep->wedge = 1; 1477 spin_unlock_irqrestore(hwep->lock, flags); 1478 1479 return usb_ep_set_halt(ep); 1480 } 1481 1482 /** 1483 * ep_fifo_flush: flushes contents of a fifo 1484 * 1485 * Check usb_ep_fifo_flush() at "usb_gadget.h" for details 1486 */ 1487 static void ep_fifo_flush(struct usb_ep *ep) 1488 { 1489 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); 1490 unsigned long flags; 1491 1492 if (ep == NULL) { 1493 dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep)); 1494 return; 1495 } 1496 1497 spin_lock_irqsave(hwep->lock, flags); 1498 if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) { 1499 spin_unlock_irqrestore(hwep->lock, flags); 1500 return; 1501 } 1502 1503 hw_ep_flush(hwep->ci, hwep->num, hwep->dir); 1504 1505 spin_unlock_irqrestore(hwep->lock, flags); 1506 } 1507 1508 /** 1509 * Endpoint-specific part of the API to the USB controller hardware 1510 * Check "usb_gadget.h" for details 1511 */ 1512 static const struct usb_ep_ops usb_ep_ops = { 1513 .enable = ep_enable, 1514 .disable = ep_disable, 1515 .alloc_request = ep_alloc_request, 1516 .free_request = ep_free_request, 1517 .queue = ep_queue, 1518 .dequeue = ep_dequeue, 1519 .set_halt = ep_set_halt, 1520 .set_wedge = ep_set_wedge, 1521 .fifo_flush = ep_fifo_flush, 1522 }; 1523 1524 /****************************************************************************** 1525 * GADGET block 1526 *****************************************************************************/ 1527 /** 1528 * ci_hdrc_gadget_connect: caller makes sure gadget driver is binded 1529 */ 1530 static void ci_hdrc_gadget_connect(struct usb_gadget *_gadget, int is_active) 1531 { 1532 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); 1533 unsigned long flags; 1534 1535 if (is_active) { 1536 pm_runtime_get_sync(&_gadget->dev); 1537 hw_device_reset(ci); 1538 spin_lock_irqsave(&ci->lock, flags); 1539 if (ci->driver) { 1540 hw_device_state(ci, ci->ep0out->qh.dma); 1541 usb_gadget_set_state(_gadget, USB_STATE_POWERED); 1542 usb_udc_vbus_handler(_gadget, true); 1543 } 1544 spin_unlock_irqrestore(&ci->lock, flags); 1545 } else { 1546 usb_udc_vbus_handler(_gadget, false); 1547 if (ci->driver) 1548 ci->driver->disconnect(&ci->gadget); 1549 hw_device_state(ci, 0); 1550 if (ci->platdata->notify_event) 1551 ci->platdata->notify_event(ci, 1552 CI_HDRC_CONTROLLER_STOPPED_EVENT); 1553 _gadget_stop_activity(&ci->gadget); 1554 pm_runtime_put_sync(&_gadget->dev); 1555 usb_gadget_set_state(_gadget, USB_STATE_NOTATTACHED); 1556 } 1557 } 1558 1559 static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active) 1560 { 1561 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); 1562 unsigned long flags; 1563 1564 spin_lock_irqsave(&ci->lock, flags); 1565 ci->vbus_active = is_active; 1566 spin_unlock_irqrestore(&ci->lock, flags); 1567 1568 if (ci->usb_phy) 1569 usb_phy_set_charger_state(ci->usb_phy, is_active ? 1570 USB_CHARGER_PRESENT : USB_CHARGER_ABSENT); 1571 1572 if (ci->driver) 1573 ci_hdrc_gadget_connect(_gadget, is_active); 1574 1575 return 0; 1576 } 1577 1578 static int ci_udc_wakeup(struct usb_gadget *_gadget) 1579 { 1580 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); 1581 unsigned long flags; 1582 int ret = 0; 1583 1584 spin_lock_irqsave(&ci->lock, flags); 1585 if (ci->gadget.speed == USB_SPEED_UNKNOWN) { 1586 spin_unlock_irqrestore(&ci->lock, flags); 1587 return 0; 1588 } 1589 if (!ci->remote_wakeup) { 1590 ret = -EOPNOTSUPP; 1591 goto out; 1592 } 1593 if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) { 1594 ret = -EINVAL; 1595 goto out; 1596 } 1597 hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR); 1598 out: 1599 spin_unlock_irqrestore(&ci->lock, flags); 1600 return ret; 1601 } 1602 1603 static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma) 1604 { 1605 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); 1606 1607 if (ci->usb_phy) 1608 return usb_phy_set_power(ci->usb_phy, ma); 1609 return -ENOTSUPP; 1610 } 1611 1612 static int ci_udc_selfpowered(struct usb_gadget *_gadget, int is_on) 1613 { 1614 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); 1615 struct ci_hw_ep *hwep = ci->ep0in; 1616 unsigned long flags; 1617 1618 spin_lock_irqsave(hwep->lock, flags); 1619 _gadget->is_selfpowered = (is_on != 0); 1620 spin_unlock_irqrestore(hwep->lock, flags); 1621 1622 return 0; 1623 } 1624 1625 /* Change Data+ pullup status 1626 * this func is used by usb_gadget_connect/disconnect 1627 */ 1628 static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on) 1629 { 1630 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); 1631 1632 /* 1633 * Data+ pullup controlled by OTG state machine in OTG fsm mode; 1634 * and don't touch Data+ in host mode for dual role config. 1635 */ 1636 if (ci_otg_is_fsm_mode(ci) || ci->role == CI_ROLE_HOST) 1637 return 0; 1638 1639 pm_runtime_get_sync(&ci->gadget.dev); 1640 if (is_on) 1641 hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS); 1642 else 1643 hw_write(ci, OP_USBCMD, USBCMD_RS, 0); 1644 pm_runtime_put_sync(&ci->gadget.dev); 1645 1646 return 0; 1647 } 1648 1649 static int ci_udc_start(struct usb_gadget *gadget, 1650 struct usb_gadget_driver *driver); 1651 static int ci_udc_stop(struct usb_gadget *gadget); 1652 1653 /* Match ISOC IN from the highest endpoint */ 1654 static struct usb_ep *ci_udc_match_ep(struct usb_gadget *gadget, 1655 struct usb_endpoint_descriptor *desc, 1656 struct usb_ss_ep_comp_descriptor *comp_desc) 1657 { 1658 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget); 1659 struct usb_ep *ep; 1660 1661 if (usb_endpoint_xfer_isoc(desc) && usb_endpoint_dir_in(desc)) { 1662 list_for_each_entry_reverse(ep, &ci->gadget.ep_list, ep_list) { 1663 if (ep->caps.dir_in && !ep->claimed) 1664 return ep; 1665 } 1666 } 1667 1668 return NULL; 1669 } 1670 1671 /** 1672 * Device operations part of the API to the USB controller hardware, 1673 * which don't involve endpoints (or i/o) 1674 * Check "usb_gadget.h" for details 1675 */ 1676 static const struct usb_gadget_ops usb_gadget_ops = { 1677 .vbus_session = ci_udc_vbus_session, 1678 .wakeup = ci_udc_wakeup, 1679 .set_selfpowered = ci_udc_selfpowered, 1680 .pullup = ci_udc_pullup, 1681 .vbus_draw = ci_udc_vbus_draw, 1682 .udc_start = ci_udc_start, 1683 .udc_stop = ci_udc_stop, 1684 .match_ep = ci_udc_match_ep, 1685 }; 1686 1687 static int init_eps(struct ci_hdrc *ci) 1688 { 1689 int retval = 0, i, j; 1690 1691 for (i = 0; i < ci->hw_ep_max/2; i++) 1692 for (j = RX; j <= TX; j++) { 1693 int k = i + j * ci->hw_ep_max/2; 1694 struct ci_hw_ep *hwep = &ci->ci_hw_ep[k]; 1695 1696 scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i, 1697 (j == TX) ? "in" : "out"); 1698 1699 hwep->ci = ci; 1700 hwep->lock = &ci->lock; 1701 hwep->td_pool = ci->td_pool; 1702 1703 hwep->ep.name = hwep->name; 1704 hwep->ep.ops = &usb_ep_ops; 1705 1706 if (i == 0) { 1707 hwep->ep.caps.type_control = true; 1708 } else { 1709 hwep->ep.caps.type_iso = true; 1710 hwep->ep.caps.type_bulk = true; 1711 hwep->ep.caps.type_int = true; 1712 } 1713 1714 if (j == TX) 1715 hwep->ep.caps.dir_in = true; 1716 else 1717 hwep->ep.caps.dir_out = true; 1718 1719 /* 1720 * for ep0: maxP defined in desc, for other 1721 * eps, maxP is set by epautoconfig() called 1722 * by gadget layer 1723 */ 1724 usb_ep_set_maxpacket_limit(&hwep->ep, (unsigned short)~0); 1725 1726 INIT_LIST_HEAD(&hwep->qh.queue); 1727 hwep->qh.ptr = dma_pool_zalloc(ci->qh_pool, GFP_KERNEL, 1728 &hwep->qh.dma); 1729 if (hwep->qh.ptr == NULL) 1730 retval = -ENOMEM; 1731 1732 /* 1733 * set up shorthands for ep0 out and in endpoints, 1734 * don't add to gadget's ep_list 1735 */ 1736 if (i == 0) { 1737 if (j == RX) 1738 ci->ep0out = hwep; 1739 else 1740 ci->ep0in = hwep; 1741 1742 usb_ep_set_maxpacket_limit(&hwep->ep, CTRL_PAYLOAD_MAX); 1743 continue; 1744 } 1745 1746 list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list); 1747 } 1748 1749 return retval; 1750 } 1751 1752 static void destroy_eps(struct ci_hdrc *ci) 1753 { 1754 int i; 1755 1756 for (i = 0; i < ci->hw_ep_max; i++) { 1757 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i]; 1758 1759 if (hwep->pending_td) 1760 free_pending_td(hwep); 1761 dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma); 1762 } 1763 } 1764 1765 /** 1766 * ci_udc_start: register a gadget driver 1767 * @gadget: our gadget 1768 * @driver: the driver being registered 1769 * 1770 * Interrupts are enabled here. 1771 */ 1772 static int ci_udc_start(struct usb_gadget *gadget, 1773 struct usb_gadget_driver *driver) 1774 { 1775 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget); 1776 int retval; 1777 1778 if (driver->disconnect == NULL) 1779 return -EINVAL; 1780 1781 ci->ep0out->ep.desc = &ctrl_endpt_out_desc; 1782 retval = usb_ep_enable(&ci->ep0out->ep); 1783 if (retval) 1784 return retval; 1785 1786 ci->ep0in->ep.desc = &ctrl_endpt_in_desc; 1787 retval = usb_ep_enable(&ci->ep0in->ep); 1788 if (retval) 1789 return retval; 1790 1791 ci->driver = driver; 1792 1793 /* Start otg fsm for B-device */ 1794 if (ci_otg_is_fsm_mode(ci) && ci->fsm.id) { 1795 ci_hdrc_otg_fsm_start(ci); 1796 return retval; 1797 } 1798 1799 if (ci->vbus_active) 1800 ci_hdrc_gadget_connect(gadget, 1); 1801 else 1802 usb_udc_vbus_handler(&ci->gadget, false); 1803 1804 return retval; 1805 } 1806 1807 static void ci_udc_stop_for_otg_fsm(struct ci_hdrc *ci) 1808 { 1809 if (!ci_otg_is_fsm_mode(ci)) 1810 return; 1811 1812 mutex_lock(&ci->fsm.lock); 1813 if (ci->fsm.otg->state == OTG_STATE_A_PERIPHERAL) { 1814 ci->fsm.a_bidl_adis_tmout = 1; 1815 ci_hdrc_otg_fsm_start(ci); 1816 } else if (ci->fsm.otg->state == OTG_STATE_B_PERIPHERAL) { 1817 ci->fsm.protocol = PROTO_UNDEF; 1818 ci->fsm.otg->state = OTG_STATE_UNDEFINED; 1819 } 1820 mutex_unlock(&ci->fsm.lock); 1821 } 1822 1823 /** 1824 * ci_udc_stop: unregister a gadget driver 1825 */ 1826 static int ci_udc_stop(struct usb_gadget *gadget) 1827 { 1828 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget); 1829 unsigned long flags; 1830 1831 spin_lock_irqsave(&ci->lock, flags); 1832 ci->driver = NULL; 1833 1834 if (ci->vbus_active) { 1835 hw_device_state(ci, 0); 1836 spin_unlock_irqrestore(&ci->lock, flags); 1837 if (ci->platdata->notify_event) 1838 ci->platdata->notify_event(ci, 1839 CI_HDRC_CONTROLLER_STOPPED_EVENT); 1840 _gadget_stop_activity(&ci->gadget); 1841 spin_lock_irqsave(&ci->lock, flags); 1842 pm_runtime_put(&ci->gadget.dev); 1843 } 1844 1845 spin_unlock_irqrestore(&ci->lock, flags); 1846 1847 ci_udc_stop_for_otg_fsm(ci); 1848 return 0; 1849 } 1850 1851 /****************************************************************************** 1852 * BUS block 1853 *****************************************************************************/ 1854 /** 1855 * udc_irq: ci interrupt handler 1856 * 1857 * This function returns IRQ_HANDLED if the IRQ has been handled 1858 * It locks access to registers 1859 */ 1860 static irqreturn_t udc_irq(struct ci_hdrc *ci) 1861 { 1862 irqreturn_t retval; 1863 u32 intr; 1864 1865 if (ci == NULL) 1866 return IRQ_HANDLED; 1867 1868 spin_lock(&ci->lock); 1869 1870 if (ci->platdata->flags & CI_HDRC_REGS_SHARED) { 1871 if (hw_read(ci, OP_USBMODE, USBMODE_CM) != 1872 USBMODE_CM_DC) { 1873 spin_unlock(&ci->lock); 1874 return IRQ_NONE; 1875 } 1876 } 1877 intr = hw_test_and_clear_intr_active(ci); 1878 1879 if (intr) { 1880 /* order defines priority - do NOT change it */ 1881 if (USBi_URI & intr) 1882 isr_reset_handler(ci); 1883 1884 if (USBi_PCI & intr) { 1885 ci->gadget.speed = hw_port_is_high_speed(ci) ? 1886 USB_SPEED_HIGH : USB_SPEED_FULL; 1887 if (ci->suspended) { 1888 if (ci->driver->resume) { 1889 spin_unlock(&ci->lock); 1890 ci->driver->resume(&ci->gadget); 1891 spin_lock(&ci->lock); 1892 } 1893 ci->suspended = 0; 1894 usb_gadget_set_state(&ci->gadget, 1895 ci->resume_state); 1896 } 1897 } 1898 1899 if (USBi_UI & intr) 1900 isr_tr_complete_handler(ci); 1901 1902 if ((USBi_SLI & intr) && !(ci->suspended)) { 1903 ci->suspended = 1; 1904 ci->resume_state = ci->gadget.state; 1905 if (ci->gadget.speed != USB_SPEED_UNKNOWN && 1906 ci->driver->suspend) { 1907 spin_unlock(&ci->lock); 1908 ci->driver->suspend(&ci->gadget); 1909 spin_lock(&ci->lock); 1910 } 1911 usb_gadget_set_state(&ci->gadget, 1912 USB_STATE_SUSPENDED); 1913 } 1914 retval = IRQ_HANDLED; 1915 } else { 1916 retval = IRQ_NONE; 1917 } 1918 spin_unlock(&ci->lock); 1919 1920 return retval; 1921 } 1922 1923 /** 1924 * udc_start: initialize gadget role 1925 * @ci: chipidea controller 1926 */ 1927 static int udc_start(struct ci_hdrc *ci) 1928 { 1929 struct device *dev = ci->dev; 1930 struct usb_otg_caps *otg_caps = &ci->platdata->ci_otg_caps; 1931 int retval = 0; 1932 1933 ci->gadget.ops = &usb_gadget_ops; 1934 ci->gadget.speed = USB_SPEED_UNKNOWN; 1935 ci->gadget.max_speed = USB_SPEED_HIGH; 1936 ci->gadget.name = ci->platdata->name; 1937 ci->gadget.otg_caps = otg_caps; 1938 1939 if (ci->platdata->flags & CI_HDRC_REQUIRES_ALIGNED_DMA) 1940 ci->gadget.quirk_avoids_skb_reserve = 1; 1941 1942 if (ci->is_otg && (otg_caps->hnp_support || otg_caps->srp_support || 1943 otg_caps->adp_support)) 1944 ci->gadget.is_otg = 1; 1945 1946 INIT_LIST_HEAD(&ci->gadget.ep_list); 1947 1948 /* alloc resources */ 1949 ci->qh_pool = dma_pool_create("ci_hw_qh", dev->parent, 1950 sizeof(struct ci_hw_qh), 1951 64, CI_HDRC_PAGE_SIZE); 1952 if (ci->qh_pool == NULL) 1953 return -ENOMEM; 1954 1955 ci->td_pool = dma_pool_create("ci_hw_td", dev->parent, 1956 sizeof(struct ci_hw_td), 1957 64, CI_HDRC_PAGE_SIZE); 1958 if (ci->td_pool == NULL) { 1959 retval = -ENOMEM; 1960 goto free_qh_pool; 1961 } 1962 1963 retval = init_eps(ci); 1964 if (retval) 1965 goto free_pools; 1966 1967 ci->gadget.ep0 = &ci->ep0in->ep; 1968 1969 retval = usb_add_gadget_udc(dev, &ci->gadget); 1970 if (retval) 1971 goto destroy_eps; 1972 1973 pm_runtime_no_callbacks(&ci->gadget.dev); 1974 pm_runtime_enable(&ci->gadget.dev); 1975 1976 return retval; 1977 1978 destroy_eps: 1979 destroy_eps(ci); 1980 free_pools: 1981 dma_pool_destroy(ci->td_pool); 1982 free_qh_pool: 1983 dma_pool_destroy(ci->qh_pool); 1984 return retval; 1985 } 1986 1987 /** 1988 * ci_hdrc_gadget_destroy: parent remove must call this to remove UDC 1989 * 1990 * No interrupts active, the IRQ has been released 1991 */ 1992 void ci_hdrc_gadget_destroy(struct ci_hdrc *ci) 1993 { 1994 if (!ci->roles[CI_ROLE_GADGET]) 1995 return; 1996 1997 usb_del_gadget_udc(&ci->gadget); 1998 1999 destroy_eps(ci); 2000 2001 dma_pool_destroy(ci->td_pool); 2002 dma_pool_destroy(ci->qh_pool); 2003 } 2004 2005 static int udc_id_switch_for_device(struct ci_hdrc *ci) 2006 { 2007 if (ci->platdata->pins_device) 2008 pinctrl_select_state(ci->platdata->pctl, 2009 ci->platdata->pins_device); 2010 2011 if (ci->is_otg) 2012 /* Clear and enable BSV irq */ 2013 hw_write_otgsc(ci, OTGSC_BSVIS | OTGSC_BSVIE, 2014 OTGSC_BSVIS | OTGSC_BSVIE); 2015 2016 return 0; 2017 } 2018 2019 static void udc_id_switch_for_host(struct ci_hdrc *ci) 2020 { 2021 /* 2022 * host doesn't care B_SESSION_VALID event 2023 * so clear and disbale BSV irq 2024 */ 2025 if (ci->is_otg) 2026 hw_write_otgsc(ci, OTGSC_BSVIE | OTGSC_BSVIS, OTGSC_BSVIS); 2027 2028 ci->vbus_active = 0; 2029 2030 if (ci->platdata->pins_device && ci->platdata->pins_default) 2031 pinctrl_select_state(ci->platdata->pctl, 2032 ci->platdata->pins_default); 2033 } 2034 2035 /** 2036 * ci_hdrc_gadget_init - initialize device related bits 2037 * ci: the controller 2038 * 2039 * This function initializes the gadget, if the device is "device capable". 2040 */ 2041 int ci_hdrc_gadget_init(struct ci_hdrc *ci) 2042 { 2043 struct ci_role_driver *rdrv; 2044 int ret; 2045 2046 if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC)) 2047 return -ENXIO; 2048 2049 rdrv = devm_kzalloc(ci->dev, sizeof(*rdrv), GFP_KERNEL); 2050 if (!rdrv) 2051 return -ENOMEM; 2052 2053 rdrv->start = udc_id_switch_for_device; 2054 rdrv->stop = udc_id_switch_for_host; 2055 rdrv->irq = udc_irq; 2056 rdrv->name = "gadget"; 2057 2058 ret = udc_start(ci); 2059 if (!ret) 2060 ci->roles[CI_ROLE_GADGET] = rdrv; 2061 2062 return ret; 2063 } 2064