1 /* 2 * udc.c - ChipIdea UDC driver 3 * 4 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved. 5 * 6 * Author: David Lopo 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 */ 12 13 #include <linux/delay.h> 14 #include <linux/device.h> 15 #include <linux/dmapool.h> 16 #include <linux/err.h> 17 #include <linux/irqreturn.h> 18 #include <linux/kernel.h> 19 #include <linux/slab.h> 20 #include <linux/pm_runtime.h> 21 #include <linux/usb/ch9.h> 22 #include <linux/usb/gadget.h> 23 #include <linux/usb/chipidea.h> 24 25 #include "ci.h" 26 #include "udc.h" 27 #include "bits.h" 28 #include "debug.h" 29 #include "otg.h" 30 31 /* control endpoint description */ 32 static const struct usb_endpoint_descriptor 33 ctrl_endpt_out_desc = { 34 .bLength = USB_DT_ENDPOINT_SIZE, 35 .bDescriptorType = USB_DT_ENDPOINT, 36 37 .bEndpointAddress = USB_DIR_OUT, 38 .bmAttributes = USB_ENDPOINT_XFER_CONTROL, 39 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX), 40 }; 41 42 static const struct usb_endpoint_descriptor 43 ctrl_endpt_in_desc = { 44 .bLength = USB_DT_ENDPOINT_SIZE, 45 .bDescriptorType = USB_DT_ENDPOINT, 46 47 .bEndpointAddress = USB_DIR_IN, 48 .bmAttributes = USB_ENDPOINT_XFER_CONTROL, 49 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX), 50 }; 51 52 /** 53 * hw_ep_bit: calculates the bit number 54 * @num: endpoint number 55 * @dir: endpoint direction 56 * 57 * This function returns bit number 58 */ 59 static inline int hw_ep_bit(int num, int dir) 60 { 61 return num + (dir ? 16 : 0); 62 } 63 64 static inline int ep_to_bit(struct ci_hdrc *ci, int n) 65 { 66 int fill = 16 - ci->hw_ep_max / 2; 67 68 if (n >= ci->hw_ep_max / 2) 69 n += fill; 70 71 return n; 72 } 73 74 /** 75 * hw_device_state: enables/disables interrupts (execute without interruption) 76 * @dma: 0 => disable, !0 => enable and set dma engine 77 * 78 * This function returns an error code 79 */ 80 static int hw_device_state(struct ci_hdrc *ci, u32 dma) 81 { 82 if (dma) { 83 hw_write(ci, OP_ENDPTLISTADDR, ~0, dma); 84 /* interrupt, error, port change, reset, sleep/suspend */ 85 hw_write(ci, OP_USBINTR, ~0, 86 USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI); 87 hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS); 88 } else { 89 hw_write(ci, OP_USBINTR, ~0, 0); 90 hw_write(ci, OP_USBCMD, USBCMD_RS, 0); 91 } 92 return 0; 93 } 94 95 /** 96 * hw_ep_flush: flush endpoint fifo (execute without interruption) 97 * @num: endpoint number 98 * @dir: endpoint direction 99 * 100 * This function returns an error code 101 */ 102 static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir) 103 { 104 int n = hw_ep_bit(num, dir); 105 106 do { 107 /* flush any pending transfer */ 108 hw_write(ci, OP_ENDPTFLUSH, BIT(n), BIT(n)); 109 while (hw_read(ci, OP_ENDPTFLUSH, BIT(n))) 110 cpu_relax(); 111 } while (hw_read(ci, OP_ENDPTSTAT, BIT(n))); 112 113 return 0; 114 } 115 116 /** 117 * hw_ep_disable: disables endpoint (execute without interruption) 118 * @num: endpoint number 119 * @dir: endpoint direction 120 * 121 * This function returns an error code 122 */ 123 static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir) 124 { 125 hw_ep_flush(ci, num, dir); 126 hw_write(ci, OP_ENDPTCTRL + num, 127 dir ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0); 128 return 0; 129 } 130 131 /** 132 * hw_ep_enable: enables endpoint (execute without interruption) 133 * @num: endpoint number 134 * @dir: endpoint direction 135 * @type: endpoint type 136 * 137 * This function returns an error code 138 */ 139 static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type) 140 { 141 u32 mask, data; 142 143 if (dir) { 144 mask = ENDPTCTRL_TXT; /* type */ 145 data = type << __ffs(mask); 146 147 mask |= ENDPTCTRL_TXS; /* unstall */ 148 mask |= ENDPTCTRL_TXR; /* reset data toggle */ 149 data |= ENDPTCTRL_TXR; 150 mask |= ENDPTCTRL_TXE; /* enable */ 151 data |= ENDPTCTRL_TXE; 152 } else { 153 mask = ENDPTCTRL_RXT; /* type */ 154 data = type << __ffs(mask); 155 156 mask |= ENDPTCTRL_RXS; /* unstall */ 157 mask |= ENDPTCTRL_RXR; /* reset data toggle */ 158 data |= ENDPTCTRL_RXR; 159 mask |= ENDPTCTRL_RXE; /* enable */ 160 data |= ENDPTCTRL_RXE; 161 } 162 hw_write(ci, OP_ENDPTCTRL + num, mask, data); 163 return 0; 164 } 165 166 /** 167 * hw_ep_get_halt: return endpoint halt status 168 * @num: endpoint number 169 * @dir: endpoint direction 170 * 171 * This function returns 1 if endpoint halted 172 */ 173 static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir) 174 { 175 u32 mask = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS; 176 177 return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0; 178 } 179 180 /** 181 * hw_test_and_clear_setup_status: test & clear setup status (execute without 182 * interruption) 183 * @n: endpoint number 184 * 185 * This function returns setup status 186 */ 187 static int hw_test_and_clear_setup_status(struct ci_hdrc *ci, int n) 188 { 189 n = ep_to_bit(ci, n); 190 return hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(n)); 191 } 192 193 /** 194 * hw_ep_prime: primes endpoint (execute without interruption) 195 * @num: endpoint number 196 * @dir: endpoint direction 197 * @is_ctrl: true if control endpoint 198 * 199 * This function returns an error code 200 */ 201 static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl) 202 { 203 int n = hw_ep_bit(num, dir); 204 205 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num))) 206 return -EAGAIN; 207 208 hw_write(ci, OP_ENDPTPRIME, BIT(n), BIT(n)); 209 210 while (hw_read(ci, OP_ENDPTPRIME, BIT(n))) 211 cpu_relax(); 212 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num))) 213 return -EAGAIN; 214 215 /* status shoult be tested according with manual but it doesn't work */ 216 return 0; 217 } 218 219 /** 220 * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute 221 * without interruption) 222 * @num: endpoint number 223 * @dir: endpoint direction 224 * @value: true => stall, false => unstall 225 * 226 * This function returns an error code 227 */ 228 static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value) 229 { 230 if (value != 0 && value != 1) 231 return -EINVAL; 232 233 do { 234 enum ci_hw_regs reg = OP_ENDPTCTRL + num; 235 u32 mask_xs = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS; 236 u32 mask_xr = dir ? ENDPTCTRL_TXR : ENDPTCTRL_RXR; 237 238 /* data toggle - reserved for EP0 but it's in ESS */ 239 hw_write(ci, reg, mask_xs|mask_xr, 240 value ? mask_xs : mask_xr); 241 } while (value != hw_ep_get_halt(ci, num, dir)); 242 243 return 0; 244 } 245 246 /** 247 * hw_is_port_high_speed: test if port is high speed 248 * 249 * This function returns true if high speed port 250 */ 251 static int hw_port_is_high_speed(struct ci_hdrc *ci) 252 { 253 return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) : 254 hw_read(ci, OP_PORTSC, PORTSC_HSP); 255 } 256 257 /** 258 * hw_read_intr_enable: returns interrupt enable register 259 * 260 * This function returns register data 261 */ 262 static u32 hw_read_intr_enable(struct ci_hdrc *ci) 263 { 264 return hw_read(ci, OP_USBINTR, ~0); 265 } 266 267 /** 268 * hw_read_intr_status: returns interrupt status register 269 * 270 * This function returns register data 271 */ 272 static u32 hw_read_intr_status(struct ci_hdrc *ci) 273 { 274 return hw_read(ci, OP_USBSTS, ~0); 275 } 276 277 /** 278 * hw_test_and_clear_complete: test & clear complete status (execute without 279 * interruption) 280 * @n: endpoint number 281 * 282 * This function returns complete status 283 */ 284 static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n) 285 { 286 n = ep_to_bit(ci, n); 287 return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n)); 288 } 289 290 /** 291 * hw_test_and_clear_intr_active: test & clear active interrupts (execute 292 * without interruption) 293 * 294 * This function returns active interrutps 295 */ 296 static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci) 297 { 298 u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci); 299 300 hw_write(ci, OP_USBSTS, ~0, reg); 301 return reg; 302 } 303 304 /** 305 * hw_test_and_clear_setup_guard: test & clear setup guard (execute without 306 * interruption) 307 * 308 * This function returns guard value 309 */ 310 static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci) 311 { 312 return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0); 313 } 314 315 /** 316 * hw_test_and_set_setup_guard: test & set setup guard (execute without 317 * interruption) 318 * 319 * This function returns guard value 320 */ 321 static int hw_test_and_set_setup_guard(struct ci_hdrc *ci) 322 { 323 return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW); 324 } 325 326 /** 327 * hw_usb_set_address: configures USB address (execute without interruption) 328 * @value: new USB address 329 * 330 * This function explicitly sets the address, without the "USBADRA" (advance) 331 * feature, which is not supported by older versions of the controller. 332 */ 333 static void hw_usb_set_address(struct ci_hdrc *ci, u8 value) 334 { 335 hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR, 336 value << __ffs(DEVICEADDR_USBADR)); 337 } 338 339 /** 340 * hw_usb_reset: restart device after a bus reset (execute without 341 * interruption) 342 * 343 * This function returns an error code 344 */ 345 static int hw_usb_reset(struct ci_hdrc *ci) 346 { 347 hw_usb_set_address(ci, 0); 348 349 /* ESS flushes only at end?!? */ 350 hw_write(ci, OP_ENDPTFLUSH, ~0, ~0); 351 352 /* clear setup token semaphores */ 353 hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0); 354 355 /* clear complete status */ 356 hw_write(ci, OP_ENDPTCOMPLETE, 0, 0); 357 358 /* wait until all bits cleared */ 359 while (hw_read(ci, OP_ENDPTPRIME, ~0)) 360 udelay(10); /* not RTOS friendly */ 361 362 /* reset all endpoints ? */ 363 364 /* reset internal status and wait for further instructions 365 no need to verify the port reset status (ESS does it) */ 366 367 return 0; 368 } 369 370 /****************************************************************************** 371 * UTIL block 372 *****************************************************************************/ 373 374 static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq, 375 unsigned length) 376 { 377 int i; 378 u32 temp; 379 struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node), 380 GFP_ATOMIC); 381 382 if (node == NULL) 383 return -ENOMEM; 384 385 node->ptr = dma_pool_alloc(hwep->td_pool, GFP_ATOMIC, 386 &node->dma); 387 if (node->ptr == NULL) { 388 kfree(node); 389 return -ENOMEM; 390 } 391 392 memset(node->ptr, 0, sizeof(struct ci_hw_td)); 393 node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES)); 394 node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES); 395 node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE); 396 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) { 397 u32 mul = hwreq->req.length / hwep->ep.maxpacket; 398 399 if (hwreq->req.length == 0 400 || hwreq->req.length % hwep->ep.maxpacket) 401 mul++; 402 node->ptr->token |= mul << __ffs(TD_MULTO); 403 } 404 405 temp = (u32) (hwreq->req.dma + hwreq->req.actual); 406 if (length) { 407 node->ptr->page[0] = cpu_to_le32(temp); 408 for (i = 1; i < TD_PAGE_COUNT; i++) { 409 u32 page = temp + i * CI_HDRC_PAGE_SIZE; 410 page &= ~TD_RESERVED_MASK; 411 node->ptr->page[i] = cpu_to_le32(page); 412 } 413 } 414 415 hwreq->req.actual += length; 416 417 if (!list_empty(&hwreq->tds)) { 418 /* get the last entry */ 419 lastnode = list_entry(hwreq->tds.prev, 420 struct td_node, td); 421 lastnode->ptr->next = cpu_to_le32(node->dma); 422 } 423 424 INIT_LIST_HEAD(&node->td); 425 list_add_tail(&node->td, &hwreq->tds); 426 427 return 0; 428 } 429 430 /** 431 * _usb_addr: calculates endpoint address from direction & number 432 * @ep: endpoint 433 */ 434 static inline u8 _usb_addr(struct ci_hw_ep *ep) 435 { 436 return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num; 437 } 438 439 /** 440 * _hardware_queue: configures a request at hardware level 441 * @gadget: gadget 442 * @hwep: endpoint 443 * 444 * This function returns an error code 445 */ 446 static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq) 447 { 448 struct ci_hdrc *ci = hwep->ci; 449 int ret = 0; 450 unsigned rest = hwreq->req.length; 451 int pages = TD_PAGE_COUNT; 452 struct td_node *firstnode, *lastnode; 453 454 /* don't queue twice */ 455 if (hwreq->req.status == -EALREADY) 456 return -EALREADY; 457 458 hwreq->req.status = -EALREADY; 459 460 ret = usb_gadget_map_request(&ci->gadget, &hwreq->req, hwep->dir); 461 if (ret) 462 return ret; 463 464 /* 465 * The first buffer could be not page aligned. 466 * In that case we have to span into one extra td. 467 */ 468 if (hwreq->req.dma % PAGE_SIZE) 469 pages--; 470 471 if (rest == 0) 472 add_td_to_list(hwep, hwreq, 0); 473 474 while (rest > 0) { 475 unsigned count = min(hwreq->req.length - hwreq->req.actual, 476 (unsigned)(pages * CI_HDRC_PAGE_SIZE)); 477 add_td_to_list(hwep, hwreq, count); 478 rest -= count; 479 } 480 481 if (hwreq->req.zero && hwreq->req.length 482 && (hwreq->req.length % hwep->ep.maxpacket == 0)) 483 add_td_to_list(hwep, hwreq, 0); 484 485 firstnode = list_first_entry(&hwreq->tds, struct td_node, td); 486 487 lastnode = list_entry(hwreq->tds.prev, 488 struct td_node, td); 489 490 lastnode->ptr->next = cpu_to_le32(TD_TERMINATE); 491 if (!hwreq->req.no_interrupt) 492 lastnode->ptr->token |= cpu_to_le32(TD_IOC); 493 wmb(); 494 495 hwreq->req.actual = 0; 496 if (!list_empty(&hwep->qh.queue)) { 497 struct ci_hw_req *hwreqprev; 498 int n = hw_ep_bit(hwep->num, hwep->dir); 499 int tmp_stat; 500 struct td_node *prevlastnode; 501 u32 next = firstnode->dma & TD_ADDR_MASK; 502 503 hwreqprev = list_entry(hwep->qh.queue.prev, 504 struct ci_hw_req, queue); 505 prevlastnode = list_entry(hwreqprev->tds.prev, 506 struct td_node, td); 507 508 prevlastnode->ptr->next = cpu_to_le32(next); 509 wmb(); 510 if (hw_read(ci, OP_ENDPTPRIME, BIT(n))) 511 goto done; 512 do { 513 hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW); 514 tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n)); 515 } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW)); 516 hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0); 517 if (tmp_stat) 518 goto done; 519 } 520 521 /* QH configuration */ 522 hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma); 523 hwep->qh.ptr->td.token &= 524 cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE)); 525 526 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == RX) { 527 u32 mul = hwreq->req.length / hwep->ep.maxpacket; 528 529 if (hwreq->req.length == 0 530 || hwreq->req.length % hwep->ep.maxpacket) 531 mul++; 532 hwep->qh.ptr->cap |= mul << __ffs(QH_MULT); 533 } 534 535 wmb(); /* synchronize before ep prime */ 536 537 ret = hw_ep_prime(ci, hwep->num, hwep->dir, 538 hwep->type == USB_ENDPOINT_XFER_CONTROL); 539 done: 540 return ret; 541 } 542 543 /* 544 * free_pending_td: remove a pending request for the endpoint 545 * @hwep: endpoint 546 */ 547 static void free_pending_td(struct ci_hw_ep *hwep) 548 { 549 struct td_node *pending = hwep->pending_td; 550 551 dma_pool_free(hwep->td_pool, pending->ptr, pending->dma); 552 hwep->pending_td = NULL; 553 kfree(pending); 554 } 555 556 /** 557 * _hardware_dequeue: handles a request at hardware level 558 * @gadget: gadget 559 * @hwep: endpoint 560 * 561 * This function returns an error code 562 */ 563 static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq) 564 { 565 u32 tmptoken; 566 struct td_node *node, *tmpnode; 567 unsigned remaining_length; 568 unsigned actual = hwreq->req.length; 569 570 if (hwreq->req.status != -EALREADY) 571 return -EINVAL; 572 573 hwreq->req.status = 0; 574 575 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) { 576 tmptoken = le32_to_cpu(node->ptr->token); 577 if ((TD_STATUS_ACTIVE & tmptoken) != 0) { 578 hwreq->req.status = -EALREADY; 579 return -EBUSY; 580 } 581 582 remaining_length = (tmptoken & TD_TOTAL_BYTES); 583 remaining_length >>= __ffs(TD_TOTAL_BYTES); 584 actual -= remaining_length; 585 586 hwreq->req.status = tmptoken & TD_STATUS; 587 if ((TD_STATUS_HALTED & hwreq->req.status)) { 588 hwreq->req.status = -EPIPE; 589 break; 590 } else if ((TD_STATUS_DT_ERR & hwreq->req.status)) { 591 hwreq->req.status = -EPROTO; 592 break; 593 } else if ((TD_STATUS_TR_ERR & hwreq->req.status)) { 594 hwreq->req.status = -EILSEQ; 595 break; 596 } 597 598 if (remaining_length) { 599 if (hwep->dir) { 600 hwreq->req.status = -EPROTO; 601 break; 602 } 603 } 604 /* 605 * As the hardware could still address the freed td 606 * which will run the udc unusable, the cleanup of the 607 * td has to be delayed by one. 608 */ 609 if (hwep->pending_td) 610 free_pending_td(hwep); 611 612 hwep->pending_td = node; 613 list_del_init(&node->td); 614 } 615 616 usb_gadget_unmap_request(&hwep->ci->gadget, &hwreq->req, hwep->dir); 617 618 hwreq->req.actual += actual; 619 620 if (hwreq->req.status) 621 return hwreq->req.status; 622 623 return hwreq->req.actual; 624 } 625 626 /** 627 * _ep_nuke: dequeues all endpoint requests 628 * @hwep: endpoint 629 * 630 * This function returns an error code 631 * Caller must hold lock 632 */ 633 static int _ep_nuke(struct ci_hw_ep *hwep) 634 __releases(hwep->lock) 635 __acquires(hwep->lock) 636 { 637 struct td_node *node, *tmpnode; 638 if (hwep == NULL) 639 return -EINVAL; 640 641 hw_ep_flush(hwep->ci, hwep->num, hwep->dir); 642 643 while (!list_empty(&hwep->qh.queue)) { 644 645 /* pop oldest request */ 646 struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next, 647 struct ci_hw_req, queue); 648 649 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) { 650 dma_pool_free(hwep->td_pool, node->ptr, node->dma); 651 list_del_init(&node->td); 652 node->ptr = NULL; 653 kfree(node); 654 } 655 656 list_del_init(&hwreq->queue); 657 hwreq->req.status = -ESHUTDOWN; 658 659 if (hwreq->req.complete != NULL) { 660 spin_unlock(hwep->lock); 661 hwreq->req.complete(&hwep->ep, &hwreq->req); 662 spin_lock(hwep->lock); 663 } 664 } 665 666 if (hwep->pending_td) 667 free_pending_td(hwep); 668 669 return 0; 670 } 671 672 /** 673 * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts 674 * @gadget: gadget 675 * 676 * This function returns an error code 677 */ 678 static int _gadget_stop_activity(struct usb_gadget *gadget) 679 { 680 struct usb_ep *ep; 681 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget); 682 unsigned long flags; 683 684 spin_lock_irqsave(&ci->lock, flags); 685 ci->gadget.speed = USB_SPEED_UNKNOWN; 686 ci->remote_wakeup = 0; 687 ci->suspended = 0; 688 spin_unlock_irqrestore(&ci->lock, flags); 689 690 /* flush all endpoints */ 691 gadget_for_each_ep(ep, gadget) { 692 usb_ep_fifo_flush(ep); 693 } 694 usb_ep_fifo_flush(&ci->ep0out->ep); 695 usb_ep_fifo_flush(&ci->ep0in->ep); 696 697 /* make sure to disable all endpoints */ 698 gadget_for_each_ep(ep, gadget) { 699 usb_ep_disable(ep); 700 } 701 702 if (ci->status != NULL) { 703 usb_ep_free_request(&ci->ep0in->ep, ci->status); 704 ci->status = NULL; 705 } 706 707 return 0; 708 } 709 710 /****************************************************************************** 711 * ISR block 712 *****************************************************************************/ 713 /** 714 * isr_reset_handler: USB reset interrupt handler 715 * @ci: UDC device 716 * 717 * This function resets USB engine after a bus reset occurred 718 */ 719 static void isr_reset_handler(struct ci_hdrc *ci) 720 __releases(ci->lock) 721 __acquires(ci->lock) 722 { 723 int retval; 724 725 spin_unlock(&ci->lock); 726 if (ci->gadget.speed != USB_SPEED_UNKNOWN) { 727 if (ci->driver) 728 ci->driver->disconnect(&ci->gadget); 729 } 730 731 retval = _gadget_stop_activity(&ci->gadget); 732 if (retval) 733 goto done; 734 735 retval = hw_usb_reset(ci); 736 if (retval) 737 goto done; 738 739 ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC); 740 if (ci->status == NULL) 741 retval = -ENOMEM; 742 743 done: 744 spin_lock(&ci->lock); 745 746 if (retval) 747 dev_err(ci->dev, "error: %i\n", retval); 748 } 749 750 /** 751 * isr_get_status_complete: get_status request complete function 752 * @ep: endpoint 753 * @req: request handled 754 * 755 * Caller must release lock 756 */ 757 static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req) 758 { 759 if (ep == NULL || req == NULL) 760 return; 761 762 kfree(req->buf); 763 usb_ep_free_request(ep, req); 764 } 765 766 /** 767 * _ep_queue: queues (submits) an I/O request to an endpoint 768 * 769 * Caller must hold lock 770 */ 771 static int _ep_queue(struct usb_ep *ep, struct usb_request *req, 772 gfp_t __maybe_unused gfp_flags) 773 { 774 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); 775 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req); 776 struct ci_hdrc *ci = hwep->ci; 777 int retval = 0; 778 779 if (ep == NULL || req == NULL || hwep->ep.desc == NULL) 780 return -EINVAL; 781 782 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) { 783 if (req->length) 784 hwep = (ci->ep0_dir == RX) ? 785 ci->ep0out : ci->ep0in; 786 if (!list_empty(&hwep->qh.queue)) { 787 _ep_nuke(hwep); 788 retval = -EOVERFLOW; 789 dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n", 790 _usb_addr(hwep)); 791 } 792 } 793 794 if (usb_endpoint_xfer_isoc(hwep->ep.desc) && 795 hwreq->req.length > (1 + hwep->ep.mult) * hwep->ep.maxpacket) { 796 dev_err(hwep->ci->dev, "request length too big for isochronous\n"); 797 return -EMSGSIZE; 798 } 799 800 /* first nuke then test link, e.g. previous status has not sent */ 801 if (!list_empty(&hwreq->queue)) { 802 dev_err(hwep->ci->dev, "request already in queue\n"); 803 return -EBUSY; 804 } 805 806 /* push request */ 807 hwreq->req.status = -EINPROGRESS; 808 hwreq->req.actual = 0; 809 810 retval = _hardware_enqueue(hwep, hwreq); 811 812 if (retval == -EALREADY) 813 retval = 0; 814 if (!retval) 815 list_add_tail(&hwreq->queue, &hwep->qh.queue); 816 817 return retval; 818 } 819 820 /** 821 * isr_get_status_response: get_status request response 822 * @ci: ci struct 823 * @setup: setup request packet 824 * 825 * This function returns an error code 826 */ 827 static int isr_get_status_response(struct ci_hdrc *ci, 828 struct usb_ctrlrequest *setup) 829 __releases(hwep->lock) 830 __acquires(hwep->lock) 831 { 832 struct ci_hw_ep *hwep = ci->ep0in; 833 struct usb_request *req = NULL; 834 gfp_t gfp_flags = GFP_ATOMIC; 835 int dir, num, retval; 836 837 if (hwep == NULL || setup == NULL) 838 return -EINVAL; 839 840 spin_unlock(hwep->lock); 841 req = usb_ep_alloc_request(&hwep->ep, gfp_flags); 842 spin_lock(hwep->lock); 843 if (req == NULL) 844 return -ENOMEM; 845 846 req->complete = isr_get_status_complete; 847 req->length = 2; 848 req->buf = kzalloc(req->length, gfp_flags); 849 if (req->buf == NULL) { 850 retval = -ENOMEM; 851 goto err_free_req; 852 } 853 854 if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) { 855 /* Assume that device is bus powered for now. */ 856 *(u16 *)req->buf = ci->remote_wakeup << 1; 857 retval = 0; 858 } else if ((setup->bRequestType & USB_RECIP_MASK) \ 859 == USB_RECIP_ENDPOINT) { 860 dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ? 861 TX : RX; 862 num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK; 863 *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir); 864 } 865 /* else do nothing; reserved for future use */ 866 867 retval = _ep_queue(&hwep->ep, req, gfp_flags); 868 if (retval) 869 goto err_free_buf; 870 871 return 0; 872 873 err_free_buf: 874 kfree(req->buf); 875 err_free_req: 876 spin_unlock(hwep->lock); 877 usb_ep_free_request(&hwep->ep, req); 878 spin_lock(hwep->lock); 879 return retval; 880 } 881 882 /** 883 * isr_setup_status_complete: setup_status request complete function 884 * @ep: endpoint 885 * @req: request handled 886 * 887 * Caller must release lock. Put the port in test mode if test mode 888 * feature is selected. 889 */ 890 static void 891 isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req) 892 { 893 struct ci_hdrc *ci = req->context; 894 unsigned long flags; 895 896 if (ci->setaddr) { 897 hw_usb_set_address(ci, ci->address); 898 ci->setaddr = false; 899 } 900 901 spin_lock_irqsave(&ci->lock, flags); 902 if (ci->test_mode) 903 hw_port_test_set(ci, ci->test_mode); 904 spin_unlock_irqrestore(&ci->lock, flags); 905 } 906 907 /** 908 * isr_setup_status_phase: queues the status phase of a setup transation 909 * @ci: ci struct 910 * 911 * This function returns an error code 912 */ 913 static int isr_setup_status_phase(struct ci_hdrc *ci) 914 { 915 int retval; 916 struct ci_hw_ep *hwep; 917 918 hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in; 919 ci->status->context = ci; 920 ci->status->complete = isr_setup_status_complete; 921 922 retval = _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC); 923 924 return retval; 925 } 926 927 /** 928 * isr_tr_complete_low: transaction complete low level handler 929 * @hwep: endpoint 930 * 931 * This function returns an error code 932 * Caller must hold lock 933 */ 934 static int isr_tr_complete_low(struct ci_hw_ep *hwep) 935 __releases(hwep->lock) 936 __acquires(hwep->lock) 937 { 938 struct ci_hw_req *hwreq, *hwreqtemp; 939 struct ci_hw_ep *hweptemp = hwep; 940 int retval = 0; 941 942 list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue, 943 queue) { 944 retval = _hardware_dequeue(hwep, hwreq); 945 if (retval < 0) 946 break; 947 list_del_init(&hwreq->queue); 948 if (hwreq->req.complete != NULL) { 949 spin_unlock(hwep->lock); 950 if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) && 951 hwreq->req.length) 952 hweptemp = hwep->ci->ep0in; 953 hwreq->req.complete(&hweptemp->ep, &hwreq->req); 954 spin_lock(hwep->lock); 955 } 956 } 957 958 if (retval == -EBUSY) 959 retval = 0; 960 961 return retval; 962 } 963 964 /** 965 * isr_tr_complete_handler: transaction complete interrupt handler 966 * @ci: UDC descriptor 967 * 968 * This function handles traffic events 969 */ 970 static void isr_tr_complete_handler(struct ci_hdrc *ci) 971 __releases(ci->lock) 972 __acquires(ci->lock) 973 { 974 unsigned i; 975 u8 tmode = 0; 976 977 for (i = 0; i < ci->hw_ep_max; i++) { 978 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i]; 979 int type, num, dir, err = -EINVAL; 980 struct usb_ctrlrequest req; 981 982 if (hwep->ep.desc == NULL) 983 continue; /* not configured */ 984 985 if (hw_test_and_clear_complete(ci, i)) { 986 err = isr_tr_complete_low(hwep); 987 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) { 988 if (err > 0) /* needs status phase */ 989 err = isr_setup_status_phase(ci); 990 if (err < 0) { 991 spin_unlock(&ci->lock); 992 if (usb_ep_set_halt(&hwep->ep)) 993 dev_err(ci->dev, 994 "error: ep_set_halt\n"); 995 spin_lock(&ci->lock); 996 } 997 } 998 } 999 1000 if (hwep->type != USB_ENDPOINT_XFER_CONTROL || 1001 !hw_test_and_clear_setup_status(ci, i)) 1002 continue; 1003 1004 if (i != 0) { 1005 dev_warn(ci->dev, "ctrl traffic at endpoint %d\n", i); 1006 continue; 1007 } 1008 1009 /* 1010 * Flush data and handshake transactions of previous 1011 * setup packet. 1012 */ 1013 _ep_nuke(ci->ep0out); 1014 _ep_nuke(ci->ep0in); 1015 1016 /* read_setup_packet */ 1017 do { 1018 hw_test_and_set_setup_guard(ci); 1019 memcpy(&req, &hwep->qh.ptr->setup, sizeof(req)); 1020 } while (!hw_test_and_clear_setup_guard(ci)); 1021 1022 type = req.bRequestType; 1023 1024 ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX; 1025 1026 switch (req.bRequest) { 1027 case USB_REQ_CLEAR_FEATURE: 1028 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) && 1029 le16_to_cpu(req.wValue) == 1030 USB_ENDPOINT_HALT) { 1031 if (req.wLength != 0) 1032 break; 1033 num = le16_to_cpu(req.wIndex); 1034 dir = num & USB_ENDPOINT_DIR_MASK; 1035 num &= USB_ENDPOINT_NUMBER_MASK; 1036 if (dir) /* TX */ 1037 num += ci->hw_ep_max/2; 1038 if (!ci->ci_hw_ep[num].wedge) { 1039 spin_unlock(&ci->lock); 1040 err = usb_ep_clear_halt( 1041 &ci->ci_hw_ep[num].ep); 1042 spin_lock(&ci->lock); 1043 if (err) 1044 break; 1045 } 1046 err = isr_setup_status_phase(ci); 1047 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) && 1048 le16_to_cpu(req.wValue) == 1049 USB_DEVICE_REMOTE_WAKEUP) { 1050 if (req.wLength != 0) 1051 break; 1052 ci->remote_wakeup = 0; 1053 err = isr_setup_status_phase(ci); 1054 } else { 1055 goto delegate; 1056 } 1057 break; 1058 case USB_REQ_GET_STATUS: 1059 if (type != (USB_DIR_IN|USB_RECIP_DEVICE) && 1060 type != (USB_DIR_IN|USB_RECIP_ENDPOINT) && 1061 type != (USB_DIR_IN|USB_RECIP_INTERFACE)) 1062 goto delegate; 1063 if (le16_to_cpu(req.wLength) != 2 || 1064 le16_to_cpu(req.wValue) != 0) 1065 break; 1066 err = isr_get_status_response(ci, &req); 1067 break; 1068 case USB_REQ_SET_ADDRESS: 1069 if (type != (USB_DIR_OUT|USB_RECIP_DEVICE)) 1070 goto delegate; 1071 if (le16_to_cpu(req.wLength) != 0 || 1072 le16_to_cpu(req.wIndex) != 0) 1073 break; 1074 ci->address = (u8)le16_to_cpu(req.wValue); 1075 ci->setaddr = true; 1076 err = isr_setup_status_phase(ci); 1077 break; 1078 case USB_REQ_SET_FEATURE: 1079 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) && 1080 le16_to_cpu(req.wValue) == 1081 USB_ENDPOINT_HALT) { 1082 if (req.wLength != 0) 1083 break; 1084 num = le16_to_cpu(req.wIndex); 1085 dir = num & USB_ENDPOINT_DIR_MASK; 1086 num &= USB_ENDPOINT_NUMBER_MASK; 1087 if (dir) /* TX */ 1088 num += ci->hw_ep_max/2; 1089 1090 spin_unlock(&ci->lock); 1091 err = usb_ep_set_halt(&ci->ci_hw_ep[num].ep); 1092 spin_lock(&ci->lock); 1093 if (!err) 1094 isr_setup_status_phase(ci); 1095 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) { 1096 if (req.wLength != 0) 1097 break; 1098 switch (le16_to_cpu(req.wValue)) { 1099 case USB_DEVICE_REMOTE_WAKEUP: 1100 ci->remote_wakeup = 1; 1101 err = isr_setup_status_phase(ci); 1102 break; 1103 case USB_DEVICE_TEST_MODE: 1104 tmode = le16_to_cpu(req.wIndex) >> 8; 1105 switch (tmode) { 1106 case TEST_J: 1107 case TEST_K: 1108 case TEST_SE0_NAK: 1109 case TEST_PACKET: 1110 case TEST_FORCE_EN: 1111 ci->test_mode = tmode; 1112 err = isr_setup_status_phase( 1113 ci); 1114 break; 1115 default: 1116 break; 1117 } 1118 default: 1119 goto delegate; 1120 } 1121 } else { 1122 goto delegate; 1123 } 1124 break; 1125 default: 1126 delegate: 1127 if (req.wLength == 0) /* no data phase */ 1128 ci->ep0_dir = TX; 1129 1130 spin_unlock(&ci->lock); 1131 err = ci->driver->setup(&ci->gadget, &req); 1132 spin_lock(&ci->lock); 1133 break; 1134 } 1135 1136 if (err < 0) { 1137 spin_unlock(&ci->lock); 1138 if (usb_ep_set_halt(&hwep->ep)) 1139 dev_err(ci->dev, "error: ep_set_halt\n"); 1140 spin_lock(&ci->lock); 1141 } 1142 } 1143 } 1144 1145 /****************************************************************************** 1146 * ENDPT block 1147 *****************************************************************************/ 1148 /** 1149 * ep_enable: configure endpoint, making it usable 1150 * 1151 * Check usb_ep_enable() at "usb_gadget.h" for details 1152 */ 1153 static int ep_enable(struct usb_ep *ep, 1154 const struct usb_endpoint_descriptor *desc) 1155 { 1156 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); 1157 int retval = 0; 1158 unsigned long flags; 1159 u32 cap = 0; 1160 1161 if (ep == NULL || desc == NULL) 1162 return -EINVAL; 1163 1164 spin_lock_irqsave(hwep->lock, flags); 1165 1166 /* only internal SW should enable ctrl endpts */ 1167 1168 hwep->ep.desc = desc; 1169 1170 if (!list_empty(&hwep->qh.queue)) 1171 dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n"); 1172 1173 hwep->dir = usb_endpoint_dir_in(desc) ? TX : RX; 1174 hwep->num = usb_endpoint_num(desc); 1175 hwep->type = usb_endpoint_type(desc); 1176 1177 hwep->ep.maxpacket = usb_endpoint_maxp(desc) & 0x07ff; 1178 hwep->ep.mult = QH_ISO_MULT(usb_endpoint_maxp(desc)); 1179 1180 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) 1181 cap |= QH_IOS; 1182 if (hwep->num) 1183 cap |= QH_ZLT; 1184 cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT; 1185 /* 1186 * For ISO-TX, we set mult at QH as the largest value, and use 1187 * MultO at TD as real mult value. 1188 */ 1189 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) 1190 cap |= 3 << __ffs(QH_MULT); 1191 1192 hwep->qh.ptr->cap = cpu_to_le32(cap); 1193 1194 hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE); /* needed? */ 1195 1196 /* 1197 * Enable endpoints in the HW other than ep0 as ep0 1198 * is always enabled 1199 */ 1200 if (hwep->num) 1201 retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir, 1202 hwep->type); 1203 1204 spin_unlock_irqrestore(hwep->lock, flags); 1205 return retval; 1206 } 1207 1208 /** 1209 * ep_disable: endpoint is no longer usable 1210 * 1211 * Check usb_ep_disable() at "usb_gadget.h" for details 1212 */ 1213 static int ep_disable(struct usb_ep *ep) 1214 { 1215 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); 1216 int direction, retval = 0; 1217 unsigned long flags; 1218 1219 if (ep == NULL) 1220 return -EINVAL; 1221 else if (hwep->ep.desc == NULL) 1222 return -EBUSY; 1223 1224 spin_lock_irqsave(hwep->lock, flags); 1225 1226 /* only internal SW should disable ctrl endpts */ 1227 1228 direction = hwep->dir; 1229 do { 1230 retval |= _ep_nuke(hwep); 1231 retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir); 1232 1233 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) 1234 hwep->dir = (hwep->dir == TX) ? RX : TX; 1235 1236 } while (hwep->dir != direction); 1237 1238 hwep->ep.desc = NULL; 1239 1240 spin_unlock_irqrestore(hwep->lock, flags); 1241 return retval; 1242 } 1243 1244 /** 1245 * ep_alloc_request: allocate a request object to use with this endpoint 1246 * 1247 * Check usb_ep_alloc_request() at "usb_gadget.h" for details 1248 */ 1249 static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags) 1250 { 1251 struct ci_hw_req *hwreq = NULL; 1252 1253 if (ep == NULL) 1254 return NULL; 1255 1256 hwreq = kzalloc(sizeof(struct ci_hw_req), gfp_flags); 1257 if (hwreq != NULL) { 1258 INIT_LIST_HEAD(&hwreq->queue); 1259 INIT_LIST_HEAD(&hwreq->tds); 1260 } 1261 1262 return (hwreq == NULL) ? NULL : &hwreq->req; 1263 } 1264 1265 /** 1266 * ep_free_request: frees a request object 1267 * 1268 * Check usb_ep_free_request() at "usb_gadget.h" for details 1269 */ 1270 static void ep_free_request(struct usb_ep *ep, struct usb_request *req) 1271 { 1272 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); 1273 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req); 1274 struct td_node *node, *tmpnode; 1275 unsigned long flags; 1276 1277 if (ep == NULL || req == NULL) { 1278 return; 1279 } else if (!list_empty(&hwreq->queue)) { 1280 dev_err(hwep->ci->dev, "freeing queued request\n"); 1281 return; 1282 } 1283 1284 spin_lock_irqsave(hwep->lock, flags); 1285 1286 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) { 1287 dma_pool_free(hwep->td_pool, node->ptr, node->dma); 1288 list_del_init(&node->td); 1289 node->ptr = NULL; 1290 kfree(node); 1291 } 1292 1293 kfree(hwreq); 1294 1295 spin_unlock_irqrestore(hwep->lock, flags); 1296 } 1297 1298 /** 1299 * ep_queue: queues (submits) an I/O request to an endpoint 1300 * 1301 * Check usb_ep_queue()* at usb_gadget.h" for details 1302 */ 1303 static int ep_queue(struct usb_ep *ep, struct usb_request *req, 1304 gfp_t __maybe_unused gfp_flags) 1305 { 1306 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); 1307 int retval = 0; 1308 unsigned long flags; 1309 1310 if (ep == NULL || req == NULL || hwep->ep.desc == NULL) 1311 return -EINVAL; 1312 1313 spin_lock_irqsave(hwep->lock, flags); 1314 retval = _ep_queue(ep, req, gfp_flags); 1315 spin_unlock_irqrestore(hwep->lock, flags); 1316 return retval; 1317 } 1318 1319 /** 1320 * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint 1321 * 1322 * Check usb_ep_dequeue() at "usb_gadget.h" for details 1323 */ 1324 static int ep_dequeue(struct usb_ep *ep, struct usb_request *req) 1325 { 1326 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); 1327 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req); 1328 unsigned long flags; 1329 1330 if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY || 1331 hwep->ep.desc == NULL || list_empty(&hwreq->queue) || 1332 list_empty(&hwep->qh.queue)) 1333 return -EINVAL; 1334 1335 spin_lock_irqsave(hwep->lock, flags); 1336 1337 hw_ep_flush(hwep->ci, hwep->num, hwep->dir); 1338 1339 /* pop request */ 1340 list_del_init(&hwreq->queue); 1341 1342 usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir); 1343 1344 req->status = -ECONNRESET; 1345 1346 if (hwreq->req.complete != NULL) { 1347 spin_unlock(hwep->lock); 1348 hwreq->req.complete(&hwep->ep, &hwreq->req); 1349 spin_lock(hwep->lock); 1350 } 1351 1352 spin_unlock_irqrestore(hwep->lock, flags); 1353 return 0; 1354 } 1355 1356 /** 1357 * ep_set_halt: sets the endpoint halt feature 1358 * 1359 * Check usb_ep_set_halt() at "usb_gadget.h" for details 1360 */ 1361 static int ep_set_halt(struct usb_ep *ep, int value) 1362 { 1363 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); 1364 int direction, retval = 0; 1365 unsigned long flags; 1366 1367 if (ep == NULL || hwep->ep.desc == NULL) 1368 return -EINVAL; 1369 1370 if (usb_endpoint_xfer_isoc(hwep->ep.desc)) 1371 return -EOPNOTSUPP; 1372 1373 spin_lock_irqsave(hwep->lock, flags); 1374 1375 #ifndef STALL_IN 1376 /* g_file_storage MS compliant but g_zero fails chapter 9 compliance */ 1377 if (value && hwep->type == USB_ENDPOINT_XFER_BULK && hwep->dir == TX && 1378 !list_empty(&hwep->qh.queue)) { 1379 spin_unlock_irqrestore(hwep->lock, flags); 1380 return -EAGAIN; 1381 } 1382 #endif 1383 1384 direction = hwep->dir; 1385 do { 1386 retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value); 1387 1388 if (!value) 1389 hwep->wedge = 0; 1390 1391 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) 1392 hwep->dir = (hwep->dir == TX) ? RX : TX; 1393 1394 } while (hwep->dir != direction); 1395 1396 spin_unlock_irqrestore(hwep->lock, flags); 1397 return retval; 1398 } 1399 1400 /** 1401 * ep_set_wedge: sets the halt feature and ignores clear requests 1402 * 1403 * Check usb_ep_set_wedge() at "usb_gadget.h" for details 1404 */ 1405 static int ep_set_wedge(struct usb_ep *ep) 1406 { 1407 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); 1408 unsigned long flags; 1409 1410 if (ep == NULL || hwep->ep.desc == NULL) 1411 return -EINVAL; 1412 1413 spin_lock_irqsave(hwep->lock, flags); 1414 hwep->wedge = 1; 1415 spin_unlock_irqrestore(hwep->lock, flags); 1416 1417 return usb_ep_set_halt(ep); 1418 } 1419 1420 /** 1421 * ep_fifo_flush: flushes contents of a fifo 1422 * 1423 * Check usb_ep_fifo_flush() at "usb_gadget.h" for details 1424 */ 1425 static void ep_fifo_flush(struct usb_ep *ep) 1426 { 1427 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); 1428 unsigned long flags; 1429 1430 if (ep == NULL) { 1431 dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep)); 1432 return; 1433 } 1434 1435 spin_lock_irqsave(hwep->lock, flags); 1436 1437 hw_ep_flush(hwep->ci, hwep->num, hwep->dir); 1438 1439 spin_unlock_irqrestore(hwep->lock, flags); 1440 } 1441 1442 /** 1443 * Endpoint-specific part of the API to the USB controller hardware 1444 * Check "usb_gadget.h" for details 1445 */ 1446 static const struct usb_ep_ops usb_ep_ops = { 1447 .enable = ep_enable, 1448 .disable = ep_disable, 1449 .alloc_request = ep_alloc_request, 1450 .free_request = ep_free_request, 1451 .queue = ep_queue, 1452 .dequeue = ep_dequeue, 1453 .set_halt = ep_set_halt, 1454 .set_wedge = ep_set_wedge, 1455 .fifo_flush = ep_fifo_flush, 1456 }; 1457 1458 /****************************************************************************** 1459 * GADGET block 1460 *****************************************************************************/ 1461 static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active) 1462 { 1463 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); 1464 unsigned long flags; 1465 int gadget_ready = 0; 1466 1467 spin_lock_irqsave(&ci->lock, flags); 1468 ci->vbus_active = is_active; 1469 if (ci->driver) 1470 gadget_ready = 1; 1471 spin_unlock_irqrestore(&ci->lock, flags); 1472 1473 if (gadget_ready) { 1474 if (is_active) { 1475 pm_runtime_get_sync(&_gadget->dev); 1476 hw_device_reset(ci, USBMODE_CM_DC); 1477 hw_device_state(ci, ci->ep0out->qh.dma); 1478 dev_dbg(ci->dev, "Connected to host\n"); 1479 } else { 1480 if (ci->driver) 1481 ci->driver->disconnect(&ci->gadget); 1482 hw_device_state(ci, 0); 1483 if (ci->platdata->notify_event) 1484 ci->platdata->notify_event(ci, 1485 CI_HDRC_CONTROLLER_STOPPED_EVENT); 1486 _gadget_stop_activity(&ci->gadget); 1487 pm_runtime_put_sync(&_gadget->dev); 1488 dev_dbg(ci->dev, "Disconnected from host\n"); 1489 } 1490 } 1491 1492 return 0; 1493 } 1494 1495 static int ci_udc_wakeup(struct usb_gadget *_gadget) 1496 { 1497 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); 1498 unsigned long flags; 1499 int ret = 0; 1500 1501 spin_lock_irqsave(&ci->lock, flags); 1502 if (!ci->remote_wakeup) { 1503 ret = -EOPNOTSUPP; 1504 goto out; 1505 } 1506 if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) { 1507 ret = -EINVAL; 1508 goto out; 1509 } 1510 hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR); 1511 out: 1512 spin_unlock_irqrestore(&ci->lock, flags); 1513 return ret; 1514 } 1515 1516 static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma) 1517 { 1518 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); 1519 1520 if (ci->transceiver) 1521 return usb_phy_set_power(ci->transceiver, ma); 1522 return -ENOTSUPP; 1523 } 1524 1525 /* Change Data+ pullup status 1526 * this func is used by usb_gadget_connect/disconnet 1527 */ 1528 static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on) 1529 { 1530 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); 1531 1532 if (!ci->vbus_active) 1533 return -EOPNOTSUPP; 1534 1535 if (is_on) 1536 hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS); 1537 else 1538 hw_write(ci, OP_USBCMD, USBCMD_RS, 0); 1539 1540 return 0; 1541 } 1542 1543 static int ci_udc_start(struct usb_gadget *gadget, 1544 struct usb_gadget_driver *driver); 1545 static int ci_udc_stop(struct usb_gadget *gadget, 1546 struct usb_gadget_driver *driver); 1547 /** 1548 * Device operations part of the API to the USB controller hardware, 1549 * which don't involve endpoints (or i/o) 1550 * Check "usb_gadget.h" for details 1551 */ 1552 static const struct usb_gadget_ops usb_gadget_ops = { 1553 .vbus_session = ci_udc_vbus_session, 1554 .wakeup = ci_udc_wakeup, 1555 .pullup = ci_udc_pullup, 1556 .vbus_draw = ci_udc_vbus_draw, 1557 .udc_start = ci_udc_start, 1558 .udc_stop = ci_udc_stop, 1559 }; 1560 1561 static int init_eps(struct ci_hdrc *ci) 1562 { 1563 int retval = 0, i, j; 1564 1565 for (i = 0; i < ci->hw_ep_max/2; i++) 1566 for (j = RX; j <= TX; j++) { 1567 int k = i + j * ci->hw_ep_max/2; 1568 struct ci_hw_ep *hwep = &ci->ci_hw_ep[k]; 1569 1570 scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i, 1571 (j == TX) ? "in" : "out"); 1572 1573 hwep->ci = ci; 1574 hwep->lock = &ci->lock; 1575 hwep->td_pool = ci->td_pool; 1576 1577 hwep->ep.name = hwep->name; 1578 hwep->ep.ops = &usb_ep_ops; 1579 /* 1580 * for ep0: maxP defined in desc, for other 1581 * eps, maxP is set by epautoconfig() called 1582 * by gadget layer 1583 */ 1584 usb_ep_set_maxpacket_limit(&hwep->ep, (unsigned short)~0); 1585 1586 INIT_LIST_HEAD(&hwep->qh.queue); 1587 hwep->qh.ptr = dma_pool_alloc(ci->qh_pool, GFP_KERNEL, 1588 &hwep->qh.dma); 1589 if (hwep->qh.ptr == NULL) 1590 retval = -ENOMEM; 1591 else 1592 memset(hwep->qh.ptr, 0, sizeof(*hwep->qh.ptr)); 1593 1594 /* 1595 * set up shorthands for ep0 out and in endpoints, 1596 * don't add to gadget's ep_list 1597 */ 1598 if (i == 0) { 1599 if (j == RX) 1600 ci->ep0out = hwep; 1601 else 1602 ci->ep0in = hwep; 1603 1604 usb_ep_set_maxpacket_limit(&hwep->ep, CTRL_PAYLOAD_MAX); 1605 continue; 1606 } 1607 1608 list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list); 1609 } 1610 1611 return retval; 1612 } 1613 1614 static void destroy_eps(struct ci_hdrc *ci) 1615 { 1616 int i; 1617 1618 for (i = 0; i < ci->hw_ep_max; i++) { 1619 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i]; 1620 1621 if (hwep->pending_td) 1622 free_pending_td(hwep); 1623 dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma); 1624 } 1625 } 1626 1627 /** 1628 * ci_udc_start: register a gadget driver 1629 * @gadget: our gadget 1630 * @driver: the driver being registered 1631 * 1632 * Interrupts are enabled here. 1633 */ 1634 static int ci_udc_start(struct usb_gadget *gadget, 1635 struct usb_gadget_driver *driver) 1636 { 1637 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget); 1638 unsigned long flags; 1639 int retval = -ENOMEM; 1640 1641 if (driver->disconnect == NULL) 1642 return -EINVAL; 1643 1644 1645 ci->ep0out->ep.desc = &ctrl_endpt_out_desc; 1646 retval = usb_ep_enable(&ci->ep0out->ep); 1647 if (retval) 1648 return retval; 1649 1650 ci->ep0in->ep.desc = &ctrl_endpt_in_desc; 1651 retval = usb_ep_enable(&ci->ep0in->ep); 1652 if (retval) 1653 return retval; 1654 1655 ci->driver = driver; 1656 pm_runtime_get_sync(&ci->gadget.dev); 1657 if (ci->vbus_active) { 1658 spin_lock_irqsave(&ci->lock, flags); 1659 hw_device_reset(ci, USBMODE_CM_DC); 1660 } else { 1661 pm_runtime_put_sync(&ci->gadget.dev); 1662 return retval; 1663 } 1664 1665 retval = hw_device_state(ci, ci->ep0out->qh.dma); 1666 spin_unlock_irqrestore(&ci->lock, flags); 1667 if (retval) 1668 pm_runtime_put_sync(&ci->gadget.dev); 1669 1670 return retval; 1671 } 1672 1673 /** 1674 * ci_udc_stop: unregister a gadget driver 1675 */ 1676 static int ci_udc_stop(struct usb_gadget *gadget, 1677 struct usb_gadget_driver *driver) 1678 { 1679 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget); 1680 unsigned long flags; 1681 1682 spin_lock_irqsave(&ci->lock, flags); 1683 1684 if (ci->vbus_active) { 1685 hw_device_state(ci, 0); 1686 if (ci->platdata->notify_event) 1687 ci->platdata->notify_event(ci, 1688 CI_HDRC_CONTROLLER_STOPPED_EVENT); 1689 spin_unlock_irqrestore(&ci->lock, flags); 1690 _gadget_stop_activity(&ci->gadget); 1691 spin_lock_irqsave(&ci->lock, flags); 1692 pm_runtime_put(&ci->gadget.dev); 1693 } 1694 1695 ci->driver = NULL; 1696 spin_unlock_irqrestore(&ci->lock, flags); 1697 1698 return 0; 1699 } 1700 1701 /****************************************************************************** 1702 * BUS block 1703 *****************************************************************************/ 1704 /** 1705 * udc_irq: ci interrupt handler 1706 * 1707 * This function returns IRQ_HANDLED if the IRQ has been handled 1708 * It locks access to registers 1709 */ 1710 static irqreturn_t udc_irq(struct ci_hdrc *ci) 1711 { 1712 irqreturn_t retval; 1713 u32 intr; 1714 1715 if (ci == NULL) 1716 return IRQ_HANDLED; 1717 1718 spin_lock(&ci->lock); 1719 1720 if (ci->platdata->flags & CI_HDRC_REGS_SHARED) { 1721 if (hw_read(ci, OP_USBMODE, USBMODE_CM) != 1722 USBMODE_CM_DC) { 1723 spin_unlock(&ci->lock); 1724 return IRQ_NONE; 1725 } 1726 } 1727 intr = hw_test_and_clear_intr_active(ci); 1728 1729 if (intr) { 1730 /* order defines priority - do NOT change it */ 1731 if (USBi_URI & intr) 1732 isr_reset_handler(ci); 1733 1734 if (USBi_PCI & intr) { 1735 ci->gadget.speed = hw_port_is_high_speed(ci) ? 1736 USB_SPEED_HIGH : USB_SPEED_FULL; 1737 if (ci->suspended && ci->driver->resume) { 1738 spin_unlock(&ci->lock); 1739 ci->driver->resume(&ci->gadget); 1740 spin_lock(&ci->lock); 1741 ci->suspended = 0; 1742 } 1743 } 1744 1745 if (USBi_UI & intr) 1746 isr_tr_complete_handler(ci); 1747 1748 if (USBi_SLI & intr) { 1749 if (ci->gadget.speed != USB_SPEED_UNKNOWN && 1750 ci->driver->suspend) { 1751 ci->suspended = 1; 1752 spin_unlock(&ci->lock); 1753 ci->driver->suspend(&ci->gadget); 1754 spin_lock(&ci->lock); 1755 } 1756 } 1757 retval = IRQ_HANDLED; 1758 } else { 1759 retval = IRQ_NONE; 1760 } 1761 spin_unlock(&ci->lock); 1762 1763 return retval; 1764 } 1765 1766 /** 1767 * udc_start: initialize gadget role 1768 * @ci: chipidea controller 1769 */ 1770 static int udc_start(struct ci_hdrc *ci) 1771 { 1772 struct device *dev = ci->dev; 1773 int retval = 0; 1774 1775 spin_lock_init(&ci->lock); 1776 1777 ci->gadget.ops = &usb_gadget_ops; 1778 ci->gadget.speed = USB_SPEED_UNKNOWN; 1779 ci->gadget.max_speed = USB_SPEED_HIGH; 1780 ci->gadget.is_otg = 0; 1781 ci->gadget.name = ci->platdata->name; 1782 1783 INIT_LIST_HEAD(&ci->gadget.ep_list); 1784 1785 /* alloc resources */ 1786 ci->qh_pool = dma_pool_create("ci_hw_qh", dev, 1787 sizeof(struct ci_hw_qh), 1788 64, CI_HDRC_PAGE_SIZE); 1789 if (ci->qh_pool == NULL) 1790 return -ENOMEM; 1791 1792 ci->td_pool = dma_pool_create("ci_hw_td", dev, 1793 sizeof(struct ci_hw_td), 1794 64, CI_HDRC_PAGE_SIZE); 1795 if (ci->td_pool == NULL) { 1796 retval = -ENOMEM; 1797 goto free_qh_pool; 1798 } 1799 1800 retval = init_eps(ci); 1801 if (retval) 1802 goto free_pools; 1803 1804 ci->gadget.ep0 = &ci->ep0in->ep; 1805 1806 retval = usb_add_gadget_udc(dev, &ci->gadget); 1807 if (retval) 1808 goto destroy_eps; 1809 1810 pm_runtime_no_callbacks(&ci->gadget.dev); 1811 pm_runtime_enable(&ci->gadget.dev); 1812 1813 return retval; 1814 1815 destroy_eps: 1816 destroy_eps(ci); 1817 free_pools: 1818 dma_pool_destroy(ci->td_pool); 1819 free_qh_pool: 1820 dma_pool_destroy(ci->qh_pool); 1821 return retval; 1822 } 1823 1824 /** 1825 * ci_hdrc_gadget_destroy: parent remove must call this to remove UDC 1826 * 1827 * No interrupts active, the IRQ has been released 1828 */ 1829 void ci_hdrc_gadget_destroy(struct ci_hdrc *ci) 1830 { 1831 if (!ci->roles[CI_ROLE_GADGET]) 1832 return; 1833 1834 usb_del_gadget_udc(&ci->gadget); 1835 1836 destroy_eps(ci); 1837 1838 dma_pool_destroy(ci->td_pool); 1839 dma_pool_destroy(ci->qh_pool); 1840 1841 if (ci->transceiver) { 1842 otg_set_peripheral(ci->transceiver->otg, NULL); 1843 if (ci->global_phy) 1844 usb_put_phy(ci->transceiver); 1845 } 1846 } 1847 1848 static int udc_id_switch_for_device(struct ci_hdrc *ci) 1849 { 1850 if (ci->is_otg) { 1851 ci_clear_otg_interrupt(ci, OTGSC_BSVIS); 1852 ci_enable_otg_interrupt(ci, OTGSC_BSVIE); 1853 } 1854 1855 return 0; 1856 } 1857 1858 static void udc_id_switch_for_host(struct ci_hdrc *ci) 1859 { 1860 if (ci->is_otg) { 1861 /* host doesn't care B_SESSION_VALID event */ 1862 ci_clear_otg_interrupt(ci, OTGSC_BSVIS); 1863 ci_disable_otg_interrupt(ci, OTGSC_BSVIE); 1864 } 1865 } 1866 1867 /** 1868 * ci_hdrc_gadget_init - initialize device related bits 1869 * ci: the controller 1870 * 1871 * This function initializes the gadget, if the device is "device capable". 1872 */ 1873 int ci_hdrc_gadget_init(struct ci_hdrc *ci) 1874 { 1875 struct ci_role_driver *rdrv; 1876 1877 if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC)) 1878 return -ENXIO; 1879 1880 rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL); 1881 if (!rdrv) 1882 return -ENOMEM; 1883 1884 rdrv->start = udc_id_switch_for_device; 1885 rdrv->stop = udc_id_switch_for_host; 1886 rdrv->irq = udc_irq; 1887 rdrv->name = "gadget"; 1888 ci->roles[CI_ROLE_GADGET] = rdrv; 1889 1890 return udc_start(ci); 1891 } 1892