1 /* 2 * udc.c - ChipIdea UDC driver 3 * 4 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved. 5 * 6 * Author: David Lopo 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 */ 12 13 #include <linux/delay.h> 14 #include <linux/device.h> 15 #include <linux/dmapool.h> 16 #include <linux/err.h> 17 #include <linux/irqreturn.h> 18 #include <linux/kernel.h> 19 #include <linux/slab.h> 20 #include <linux/pm_runtime.h> 21 #include <linux/usb/ch9.h> 22 #include <linux/usb/gadget.h> 23 #include <linux/usb/chipidea.h> 24 25 #include "ci.h" 26 #include "udc.h" 27 #include "bits.h" 28 #include "debug.h" 29 #include "otg.h" 30 31 /* control endpoint description */ 32 static const struct usb_endpoint_descriptor 33 ctrl_endpt_out_desc = { 34 .bLength = USB_DT_ENDPOINT_SIZE, 35 .bDescriptorType = USB_DT_ENDPOINT, 36 37 .bEndpointAddress = USB_DIR_OUT, 38 .bmAttributes = USB_ENDPOINT_XFER_CONTROL, 39 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX), 40 }; 41 42 static const struct usb_endpoint_descriptor 43 ctrl_endpt_in_desc = { 44 .bLength = USB_DT_ENDPOINT_SIZE, 45 .bDescriptorType = USB_DT_ENDPOINT, 46 47 .bEndpointAddress = USB_DIR_IN, 48 .bmAttributes = USB_ENDPOINT_XFER_CONTROL, 49 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX), 50 }; 51 52 /** 53 * hw_ep_bit: calculates the bit number 54 * @num: endpoint number 55 * @dir: endpoint direction 56 * 57 * This function returns bit number 58 */ 59 static inline int hw_ep_bit(int num, int dir) 60 { 61 return num + (dir ? 16 : 0); 62 } 63 64 static inline int ep_to_bit(struct ci_hdrc *ci, int n) 65 { 66 int fill = 16 - ci->hw_ep_max / 2; 67 68 if (n >= ci->hw_ep_max / 2) 69 n += fill; 70 71 return n; 72 } 73 74 /** 75 * hw_device_state: enables/disables interrupts (execute without interruption) 76 * @dma: 0 => disable, !0 => enable and set dma engine 77 * 78 * This function returns an error code 79 */ 80 static int hw_device_state(struct ci_hdrc *ci, u32 dma) 81 { 82 if (dma) { 83 hw_write(ci, OP_ENDPTLISTADDR, ~0, dma); 84 /* interrupt, error, port change, reset, sleep/suspend */ 85 hw_write(ci, OP_USBINTR, ~0, 86 USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI); 87 hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS); 88 } else { 89 hw_write(ci, OP_USBINTR, ~0, 0); 90 hw_write(ci, OP_USBCMD, USBCMD_RS, 0); 91 } 92 return 0; 93 } 94 95 /** 96 * hw_ep_flush: flush endpoint fifo (execute without interruption) 97 * @num: endpoint number 98 * @dir: endpoint direction 99 * 100 * This function returns an error code 101 */ 102 static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir) 103 { 104 int n = hw_ep_bit(num, dir); 105 106 do { 107 /* flush any pending transfer */ 108 hw_write(ci, OP_ENDPTFLUSH, ~0, BIT(n)); 109 while (hw_read(ci, OP_ENDPTFLUSH, BIT(n))) 110 cpu_relax(); 111 } while (hw_read(ci, OP_ENDPTSTAT, BIT(n))); 112 113 return 0; 114 } 115 116 /** 117 * hw_ep_disable: disables endpoint (execute without interruption) 118 * @num: endpoint number 119 * @dir: endpoint direction 120 * 121 * This function returns an error code 122 */ 123 static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir) 124 { 125 hw_ep_flush(ci, num, dir); 126 hw_write(ci, OP_ENDPTCTRL + num, 127 dir ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0); 128 return 0; 129 } 130 131 /** 132 * hw_ep_enable: enables endpoint (execute without interruption) 133 * @num: endpoint number 134 * @dir: endpoint direction 135 * @type: endpoint type 136 * 137 * This function returns an error code 138 */ 139 static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type) 140 { 141 u32 mask, data; 142 143 if (dir) { 144 mask = ENDPTCTRL_TXT; /* type */ 145 data = type << __ffs(mask); 146 147 mask |= ENDPTCTRL_TXS; /* unstall */ 148 mask |= ENDPTCTRL_TXR; /* reset data toggle */ 149 data |= ENDPTCTRL_TXR; 150 mask |= ENDPTCTRL_TXE; /* enable */ 151 data |= ENDPTCTRL_TXE; 152 } else { 153 mask = ENDPTCTRL_RXT; /* type */ 154 data = type << __ffs(mask); 155 156 mask |= ENDPTCTRL_RXS; /* unstall */ 157 mask |= ENDPTCTRL_RXR; /* reset data toggle */ 158 data |= ENDPTCTRL_RXR; 159 mask |= ENDPTCTRL_RXE; /* enable */ 160 data |= ENDPTCTRL_RXE; 161 } 162 hw_write(ci, OP_ENDPTCTRL + num, mask, data); 163 return 0; 164 } 165 166 /** 167 * hw_ep_get_halt: return endpoint halt status 168 * @num: endpoint number 169 * @dir: endpoint direction 170 * 171 * This function returns 1 if endpoint halted 172 */ 173 static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir) 174 { 175 u32 mask = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS; 176 177 return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0; 178 } 179 180 /** 181 * hw_ep_prime: primes endpoint (execute without interruption) 182 * @num: endpoint number 183 * @dir: endpoint direction 184 * @is_ctrl: true if control endpoint 185 * 186 * This function returns an error code 187 */ 188 static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl) 189 { 190 int n = hw_ep_bit(num, dir); 191 192 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num))) 193 return -EAGAIN; 194 195 hw_write(ci, OP_ENDPTPRIME, ~0, BIT(n)); 196 197 while (hw_read(ci, OP_ENDPTPRIME, BIT(n))) 198 cpu_relax(); 199 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num))) 200 return -EAGAIN; 201 202 /* status shoult be tested according with manual but it doesn't work */ 203 return 0; 204 } 205 206 /** 207 * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute 208 * without interruption) 209 * @num: endpoint number 210 * @dir: endpoint direction 211 * @value: true => stall, false => unstall 212 * 213 * This function returns an error code 214 */ 215 static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value) 216 { 217 if (value != 0 && value != 1) 218 return -EINVAL; 219 220 do { 221 enum ci_hw_regs reg = OP_ENDPTCTRL + num; 222 u32 mask_xs = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS; 223 u32 mask_xr = dir ? ENDPTCTRL_TXR : ENDPTCTRL_RXR; 224 225 /* data toggle - reserved for EP0 but it's in ESS */ 226 hw_write(ci, reg, mask_xs|mask_xr, 227 value ? mask_xs : mask_xr); 228 } while (value != hw_ep_get_halt(ci, num, dir)); 229 230 return 0; 231 } 232 233 /** 234 * hw_is_port_high_speed: test if port is high speed 235 * 236 * This function returns true if high speed port 237 */ 238 static int hw_port_is_high_speed(struct ci_hdrc *ci) 239 { 240 return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) : 241 hw_read(ci, OP_PORTSC, PORTSC_HSP); 242 } 243 244 /** 245 * hw_read_intr_enable: returns interrupt enable register 246 * 247 * This function returns register data 248 */ 249 static u32 hw_read_intr_enable(struct ci_hdrc *ci) 250 { 251 return hw_read(ci, OP_USBINTR, ~0); 252 } 253 254 /** 255 * hw_read_intr_status: returns interrupt status register 256 * 257 * This function returns register data 258 */ 259 static u32 hw_read_intr_status(struct ci_hdrc *ci) 260 { 261 return hw_read(ci, OP_USBSTS, ~0); 262 } 263 264 /** 265 * hw_test_and_clear_complete: test & clear complete status (execute without 266 * interruption) 267 * @n: endpoint number 268 * 269 * This function returns complete status 270 */ 271 static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n) 272 { 273 n = ep_to_bit(ci, n); 274 return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n)); 275 } 276 277 /** 278 * hw_test_and_clear_intr_active: test & clear active interrupts (execute 279 * without interruption) 280 * 281 * This function returns active interrutps 282 */ 283 static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci) 284 { 285 u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci); 286 287 hw_write(ci, OP_USBSTS, ~0, reg); 288 return reg; 289 } 290 291 /** 292 * hw_test_and_clear_setup_guard: test & clear setup guard (execute without 293 * interruption) 294 * 295 * This function returns guard value 296 */ 297 static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci) 298 { 299 return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0); 300 } 301 302 /** 303 * hw_test_and_set_setup_guard: test & set setup guard (execute without 304 * interruption) 305 * 306 * This function returns guard value 307 */ 308 static int hw_test_and_set_setup_guard(struct ci_hdrc *ci) 309 { 310 return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW); 311 } 312 313 /** 314 * hw_usb_set_address: configures USB address (execute without interruption) 315 * @value: new USB address 316 * 317 * This function explicitly sets the address, without the "USBADRA" (advance) 318 * feature, which is not supported by older versions of the controller. 319 */ 320 static void hw_usb_set_address(struct ci_hdrc *ci, u8 value) 321 { 322 hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR, 323 value << __ffs(DEVICEADDR_USBADR)); 324 } 325 326 /** 327 * hw_usb_reset: restart device after a bus reset (execute without 328 * interruption) 329 * 330 * This function returns an error code 331 */ 332 static int hw_usb_reset(struct ci_hdrc *ci) 333 { 334 hw_usb_set_address(ci, 0); 335 336 /* ESS flushes only at end?!? */ 337 hw_write(ci, OP_ENDPTFLUSH, ~0, ~0); 338 339 /* clear setup token semaphores */ 340 hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0); 341 342 /* clear complete status */ 343 hw_write(ci, OP_ENDPTCOMPLETE, 0, 0); 344 345 /* wait until all bits cleared */ 346 while (hw_read(ci, OP_ENDPTPRIME, ~0)) 347 udelay(10); /* not RTOS friendly */ 348 349 /* reset all endpoints ? */ 350 351 /* reset internal status and wait for further instructions 352 no need to verify the port reset status (ESS does it) */ 353 354 return 0; 355 } 356 357 /****************************************************************************** 358 * UTIL block 359 *****************************************************************************/ 360 361 static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq, 362 unsigned length) 363 { 364 int i; 365 u32 temp; 366 struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node), 367 GFP_ATOMIC); 368 369 if (node == NULL) 370 return -ENOMEM; 371 372 node->ptr = dma_pool_alloc(hwep->td_pool, GFP_ATOMIC, 373 &node->dma); 374 if (node->ptr == NULL) { 375 kfree(node); 376 return -ENOMEM; 377 } 378 379 memset(node->ptr, 0, sizeof(struct ci_hw_td)); 380 node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES)); 381 node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES); 382 node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE); 383 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) { 384 u32 mul = hwreq->req.length / hwep->ep.maxpacket; 385 386 if (hwreq->req.length == 0 387 || hwreq->req.length % hwep->ep.maxpacket) 388 mul++; 389 node->ptr->token |= mul << __ffs(TD_MULTO); 390 } 391 392 temp = (u32) (hwreq->req.dma + hwreq->req.actual); 393 if (length) { 394 node->ptr->page[0] = cpu_to_le32(temp); 395 for (i = 1; i < TD_PAGE_COUNT; i++) { 396 u32 page = temp + i * CI_HDRC_PAGE_SIZE; 397 page &= ~TD_RESERVED_MASK; 398 node->ptr->page[i] = cpu_to_le32(page); 399 } 400 } 401 402 hwreq->req.actual += length; 403 404 if (!list_empty(&hwreq->tds)) { 405 /* get the last entry */ 406 lastnode = list_entry(hwreq->tds.prev, 407 struct td_node, td); 408 lastnode->ptr->next = cpu_to_le32(node->dma); 409 } 410 411 INIT_LIST_HEAD(&node->td); 412 list_add_tail(&node->td, &hwreq->tds); 413 414 return 0; 415 } 416 417 /** 418 * _usb_addr: calculates endpoint address from direction & number 419 * @ep: endpoint 420 */ 421 static inline u8 _usb_addr(struct ci_hw_ep *ep) 422 { 423 return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num; 424 } 425 426 /** 427 * _hardware_queue: configures a request at hardware level 428 * @gadget: gadget 429 * @hwep: endpoint 430 * 431 * This function returns an error code 432 */ 433 static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq) 434 { 435 struct ci_hdrc *ci = hwep->ci; 436 int ret = 0; 437 unsigned rest = hwreq->req.length; 438 int pages = TD_PAGE_COUNT; 439 struct td_node *firstnode, *lastnode; 440 441 /* don't queue twice */ 442 if (hwreq->req.status == -EALREADY) 443 return -EALREADY; 444 445 hwreq->req.status = -EALREADY; 446 447 ret = usb_gadget_map_request(&ci->gadget, &hwreq->req, hwep->dir); 448 if (ret) 449 return ret; 450 451 /* 452 * The first buffer could be not page aligned. 453 * In that case we have to span into one extra td. 454 */ 455 if (hwreq->req.dma % PAGE_SIZE) 456 pages--; 457 458 if (rest == 0) 459 add_td_to_list(hwep, hwreq, 0); 460 461 while (rest > 0) { 462 unsigned count = min(hwreq->req.length - hwreq->req.actual, 463 (unsigned)(pages * CI_HDRC_PAGE_SIZE)); 464 add_td_to_list(hwep, hwreq, count); 465 rest -= count; 466 } 467 468 if (hwreq->req.zero && hwreq->req.length 469 && (hwreq->req.length % hwep->ep.maxpacket == 0)) 470 add_td_to_list(hwep, hwreq, 0); 471 472 firstnode = list_first_entry(&hwreq->tds, struct td_node, td); 473 474 lastnode = list_entry(hwreq->tds.prev, 475 struct td_node, td); 476 477 lastnode->ptr->next = cpu_to_le32(TD_TERMINATE); 478 if (!hwreq->req.no_interrupt) 479 lastnode->ptr->token |= cpu_to_le32(TD_IOC); 480 wmb(); 481 482 hwreq->req.actual = 0; 483 if (!list_empty(&hwep->qh.queue)) { 484 struct ci_hw_req *hwreqprev; 485 int n = hw_ep_bit(hwep->num, hwep->dir); 486 int tmp_stat; 487 struct td_node *prevlastnode; 488 u32 next = firstnode->dma & TD_ADDR_MASK; 489 490 hwreqprev = list_entry(hwep->qh.queue.prev, 491 struct ci_hw_req, queue); 492 prevlastnode = list_entry(hwreqprev->tds.prev, 493 struct td_node, td); 494 495 prevlastnode->ptr->next = cpu_to_le32(next); 496 wmb(); 497 if (hw_read(ci, OP_ENDPTPRIME, BIT(n))) 498 goto done; 499 do { 500 hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW); 501 tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n)); 502 } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW)); 503 hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0); 504 if (tmp_stat) 505 goto done; 506 } 507 508 /* QH configuration */ 509 hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma); 510 hwep->qh.ptr->td.token &= 511 cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE)); 512 513 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == RX) { 514 u32 mul = hwreq->req.length / hwep->ep.maxpacket; 515 516 if (hwreq->req.length == 0 517 || hwreq->req.length % hwep->ep.maxpacket) 518 mul++; 519 hwep->qh.ptr->cap |= mul << __ffs(QH_MULT); 520 } 521 522 wmb(); /* synchronize before ep prime */ 523 524 ret = hw_ep_prime(ci, hwep->num, hwep->dir, 525 hwep->type == USB_ENDPOINT_XFER_CONTROL); 526 done: 527 return ret; 528 } 529 530 /* 531 * free_pending_td: remove a pending request for the endpoint 532 * @hwep: endpoint 533 */ 534 static void free_pending_td(struct ci_hw_ep *hwep) 535 { 536 struct td_node *pending = hwep->pending_td; 537 538 dma_pool_free(hwep->td_pool, pending->ptr, pending->dma); 539 hwep->pending_td = NULL; 540 kfree(pending); 541 } 542 543 /** 544 * _hardware_dequeue: handles a request at hardware level 545 * @gadget: gadget 546 * @hwep: endpoint 547 * 548 * This function returns an error code 549 */ 550 static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq) 551 { 552 u32 tmptoken; 553 struct td_node *node, *tmpnode; 554 unsigned remaining_length; 555 unsigned actual = hwreq->req.length; 556 557 if (hwreq->req.status != -EALREADY) 558 return -EINVAL; 559 560 hwreq->req.status = 0; 561 562 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) { 563 tmptoken = le32_to_cpu(node->ptr->token); 564 if ((TD_STATUS_ACTIVE & tmptoken) != 0) { 565 hwreq->req.status = -EALREADY; 566 return -EBUSY; 567 } 568 569 remaining_length = (tmptoken & TD_TOTAL_BYTES); 570 remaining_length >>= __ffs(TD_TOTAL_BYTES); 571 actual -= remaining_length; 572 573 hwreq->req.status = tmptoken & TD_STATUS; 574 if ((TD_STATUS_HALTED & hwreq->req.status)) { 575 hwreq->req.status = -EPIPE; 576 break; 577 } else if ((TD_STATUS_DT_ERR & hwreq->req.status)) { 578 hwreq->req.status = -EPROTO; 579 break; 580 } else if ((TD_STATUS_TR_ERR & hwreq->req.status)) { 581 hwreq->req.status = -EILSEQ; 582 break; 583 } 584 585 if (remaining_length) { 586 if (hwep->dir) { 587 hwreq->req.status = -EPROTO; 588 break; 589 } 590 } 591 /* 592 * As the hardware could still address the freed td 593 * which will run the udc unusable, the cleanup of the 594 * td has to be delayed by one. 595 */ 596 if (hwep->pending_td) 597 free_pending_td(hwep); 598 599 hwep->pending_td = node; 600 list_del_init(&node->td); 601 } 602 603 usb_gadget_unmap_request(&hwep->ci->gadget, &hwreq->req, hwep->dir); 604 605 hwreq->req.actual += actual; 606 607 if (hwreq->req.status) 608 return hwreq->req.status; 609 610 return hwreq->req.actual; 611 } 612 613 /** 614 * _ep_nuke: dequeues all endpoint requests 615 * @hwep: endpoint 616 * 617 * This function returns an error code 618 * Caller must hold lock 619 */ 620 static int _ep_nuke(struct ci_hw_ep *hwep) 621 __releases(hwep->lock) 622 __acquires(hwep->lock) 623 { 624 struct td_node *node, *tmpnode; 625 if (hwep == NULL) 626 return -EINVAL; 627 628 hw_ep_flush(hwep->ci, hwep->num, hwep->dir); 629 630 while (!list_empty(&hwep->qh.queue)) { 631 632 /* pop oldest request */ 633 struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next, 634 struct ci_hw_req, queue); 635 636 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) { 637 dma_pool_free(hwep->td_pool, node->ptr, node->dma); 638 list_del_init(&node->td); 639 node->ptr = NULL; 640 kfree(node); 641 } 642 643 list_del_init(&hwreq->queue); 644 hwreq->req.status = -ESHUTDOWN; 645 646 if (hwreq->req.complete != NULL) { 647 spin_unlock(hwep->lock); 648 hwreq->req.complete(&hwep->ep, &hwreq->req); 649 spin_lock(hwep->lock); 650 } 651 } 652 653 if (hwep->pending_td) 654 free_pending_td(hwep); 655 656 return 0; 657 } 658 659 /** 660 * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts 661 * @gadget: gadget 662 * 663 * This function returns an error code 664 */ 665 static int _gadget_stop_activity(struct usb_gadget *gadget) 666 { 667 struct usb_ep *ep; 668 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget); 669 unsigned long flags; 670 671 spin_lock_irqsave(&ci->lock, flags); 672 ci->gadget.speed = USB_SPEED_UNKNOWN; 673 ci->remote_wakeup = 0; 674 ci->suspended = 0; 675 spin_unlock_irqrestore(&ci->lock, flags); 676 677 /* flush all endpoints */ 678 gadget_for_each_ep(ep, gadget) { 679 usb_ep_fifo_flush(ep); 680 } 681 usb_ep_fifo_flush(&ci->ep0out->ep); 682 usb_ep_fifo_flush(&ci->ep0in->ep); 683 684 /* make sure to disable all endpoints */ 685 gadget_for_each_ep(ep, gadget) { 686 usb_ep_disable(ep); 687 } 688 689 if (ci->status != NULL) { 690 usb_ep_free_request(&ci->ep0in->ep, ci->status); 691 ci->status = NULL; 692 } 693 694 return 0; 695 } 696 697 /****************************************************************************** 698 * ISR block 699 *****************************************************************************/ 700 /** 701 * isr_reset_handler: USB reset interrupt handler 702 * @ci: UDC device 703 * 704 * This function resets USB engine after a bus reset occurred 705 */ 706 static void isr_reset_handler(struct ci_hdrc *ci) 707 __releases(ci->lock) 708 __acquires(ci->lock) 709 { 710 int retval; 711 712 spin_unlock(&ci->lock); 713 if (ci->gadget.speed != USB_SPEED_UNKNOWN) { 714 if (ci->driver) 715 ci->driver->disconnect(&ci->gadget); 716 } 717 718 retval = _gadget_stop_activity(&ci->gadget); 719 if (retval) 720 goto done; 721 722 retval = hw_usb_reset(ci); 723 if (retval) 724 goto done; 725 726 ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC); 727 if (ci->status == NULL) 728 retval = -ENOMEM; 729 730 done: 731 spin_lock(&ci->lock); 732 733 if (retval) 734 dev_err(ci->dev, "error: %i\n", retval); 735 } 736 737 /** 738 * isr_get_status_complete: get_status request complete function 739 * @ep: endpoint 740 * @req: request handled 741 * 742 * Caller must release lock 743 */ 744 static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req) 745 { 746 if (ep == NULL || req == NULL) 747 return; 748 749 kfree(req->buf); 750 usb_ep_free_request(ep, req); 751 } 752 753 /** 754 * _ep_queue: queues (submits) an I/O request to an endpoint 755 * 756 * Caller must hold lock 757 */ 758 static int _ep_queue(struct usb_ep *ep, struct usb_request *req, 759 gfp_t __maybe_unused gfp_flags) 760 { 761 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); 762 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req); 763 struct ci_hdrc *ci = hwep->ci; 764 int retval = 0; 765 766 if (ep == NULL || req == NULL || hwep->ep.desc == NULL) 767 return -EINVAL; 768 769 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) { 770 if (req->length) 771 hwep = (ci->ep0_dir == RX) ? 772 ci->ep0out : ci->ep0in; 773 if (!list_empty(&hwep->qh.queue)) { 774 _ep_nuke(hwep); 775 retval = -EOVERFLOW; 776 dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n", 777 _usb_addr(hwep)); 778 } 779 } 780 781 if (usb_endpoint_xfer_isoc(hwep->ep.desc) && 782 hwreq->req.length > (1 + hwep->ep.mult) * hwep->ep.maxpacket) { 783 dev_err(hwep->ci->dev, "request length too big for isochronous\n"); 784 return -EMSGSIZE; 785 } 786 787 /* first nuke then test link, e.g. previous status has not sent */ 788 if (!list_empty(&hwreq->queue)) { 789 dev_err(hwep->ci->dev, "request already in queue\n"); 790 return -EBUSY; 791 } 792 793 /* push request */ 794 hwreq->req.status = -EINPROGRESS; 795 hwreq->req.actual = 0; 796 797 retval = _hardware_enqueue(hwep, hwreq); 798 799 if (retval == -EALREADY) 800 retval = 0; 801 if (!retval) 802 list_add_tail(&hwreq->queue, &hwep->qh.queue); 803 804 return retval; 805 } 806 807 /** 808 * isr_get_status_response: get_status request response 809 * @ci: ci struct 810 * @setup: setup request packet 811 * 812 * This function returns an error code 813 */ 814 static int isr_get_status_response(struct ci_hdrc *ci, 815 struct usb_ctrlrequest *setup) 816 __releases(hwep->lock) 817 __acquires(hwep->lock) 818 { 819 struct ci_hw_ep *hwep = ci->ep0in; 820 struct usb_request *req = NULL; 821 gfp_t gfp_flags = GFP_ATOMIC; 822 int dir, num, retval; 823 824 if (hwep == NULL || setup == NULL) 825 return -EINVAL; 826 827 spin_unlock(hwep->lock); 828 req = usb_ep_alloc_request(&hwep->ep, gfp_flags); 829 spin_lock(hwep->lock); 830 if (req == NULL) 831 return -ENOMEM; 832 833 req->complete = isr_get_status_complete; 834 req->length = 2; 835 req->buf = kzalloc(req->length, gfp_flags); 836 if (req->buf == NULL) { 837 retval = -ENOMEM; 838 goto err_free_req; 839 } 840 841 if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) { 842 /* Assume that device is bus powered for now. */ 843 *(u16 *)req->buf = ci->remote_wakeup << 1; 844 retval = 0; 845 } else if ((setup->bRequestType & USB_RECIP_MASK) \ 846 == USB_RECIP_ENDPOINT) { 847 dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ? 848 TX : RX; 849 num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK; 850 *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir); 851 } 852 /* else do nothing; reserved for future use */ 853 854 retval = _ep_queue(&hwep->ep, req, gfp_flags); 855 if (retval) 856 goto err_free_buf; 857 858 return 0; 859 860 err_free_buf: 861 kfree(req->buf); 862 err_free_req: 863 spin_unlock(hwep->lock); 864 usb_ep_free_request(&hwep->ep, req); 865 spin_lock(hwep->lock); 866 return retval; 867 } 868 869 /** 870 * isr_setup_status_complete: setup_status request complete function 871 * @ep: endpoint 872 * @req: request handled 873 * 874 * Caller must release lock. Put the port in test mode if test mode 875 * feature is selected. 876 */ 877 static void 878 isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req) 879 { 880 struct ci_hdrc *ci = req->context; 881 unsigned long flags; 882 883 if (ci->setaddr) { 884 hw_usb_set_address(ci, ci->address); 885 ci->setaddr = false; 886 } 887 888 spin_lock_irqsave(&ci->lock, flags); 889 if (ci->test_mode) 890 hw_port_test_set(ci, ci->test_mode); 891 spin_unlock_irqrestore(&ci->lock, flags); 892 } 893 894 /** 895 * isr_setup_status_phase: queues the status phase of a setup transation 896 * @ci: ci struct 897 * 898 * This function returns an error code 899 */ 900 static int isr_setup_status_phase(struct ci_hdrc *ci) 901 { 902 int retval; 903 struct ci_hw_ep *hwep; 904 905 hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in; 906 ci->status->context = ci; 907 ci->status->complete = isr_setup_status_complete; 908 909 retval = _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC); 910 911 return retval; 912 } 913 914 /** 915 * isr_tr_complete_low: transaction complete low level handler 916 * @hwep: endpoint 917 * 918 * This function returns an error code 919 * Caller must hold lock 920 */ 921 static int isr_tr_complete_low(struct ci_hw_ep *hwep) 922 __releases(hwep->lock) 923 __acquires(hwep->lock) 924 { 925 struct ci_hw_req *hwreq, *hwreqtemp; 926 struct ci_hw_ep *hweptemp = hwep; 927 int retval = 0; 928 929 list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue, 930 queue) { 931 retval = _hardware_dequeue(hwep, hwreq); 932 if (retval < 0) 933 break; 934 list_del_init(&hwreq->queue); 935 if (hwreq->req.complete != NULL) { 936 spin_unlock(hwep->lock); 937 if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) && 938 hwreq->req.length) 939 hweptemp = hwep->ci->ep0in; 940 hwreq->req.complete(&hweptemp->ep, &hwreq->req); 941 spin_lock(hwep->lock); 942 } 943 } 944 945 if (retval == -EBUSY) 946 retval = 0; 947 948 return retval; 949 } 950 951 /** 952 * isr_setup_packet_handler: setup packet handler 953 * @ci: UDC descriptor 954 * 955 * This function handles setup packet 956 */ 957 static void isr_setup_packet_handler(struct ci_hdrc *ci) 958 __releases(ci->lock) 959 __acquires(ci->lock) 960 { 961 struct ci_hw_ep *hwep = &ci->ci_hw_ep[0]; 962 struct usb_ctrlrequest req; 963 int type, num, dir, err = -EINVAL; 964 u8 tmode = 0; 965 966 /* 967 * Flush data and handshake transactions of previous 968 * setup packet. 969 */ 970 _ep_nuke(ci->ep0out); 971 _ep_nuke(ci->ep0in); 972 973 /* read_setup_packet */ 974 do { 975 hw_test_and_set_setup_guard(ci); 976 memcpy(&req, &hwep->qh.ptr->setup, sizeof(req)); 977 } while (!hw_test_and_clear_setup_guard(ci)); 978 979 type = req.bRequestType; 980 981 ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX; 982 983 switch (req.bRequest) { 984 case USB_REQ_CLEAR_FEATURE: 985 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) && 986 le16_to_cpu(req.wValue) == 987 USB_ENDPOINT_HALT) { 988 if (req.wLength != 0) 989 break; 990 num = le16_to_cpu(req.wIndex); 991 dir = num & USB_ENDPOINT_DIR_MASK; 992 num &= USB_ENDPOINT_NUMBER_MASK; 993 if (dir) /* TX */ 994 num += ci->hw_ep_max / 2; 995 if (!ci->ci_hw_ep[num].wedge) { 996 spin_unlock(&ci->lock); 997 err = usb_ep_clear_halt( 998 &ci->ci_hw_ep[num].ep); 999 spin_lock(&ci->lock); 1000 if (err) 1001 break; 1002 } 1003 err = isr_setup_status_phase(ci); 1004 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) && 1005 le16_to_cpu(req.wValue) == 1006 USB_DEVICE_REMOTE_WAKEUP) { 1007 if (req.wLength != 0) 1008 break; 1009 ci->remote_wakeup = 0; 1010 err = isr_setup_status_phase(ci); 1011 } else { 1012 goto delegate; 1013 } 1014 break; 1015 case USB_REQ_GET_STATUS: 1016 if (type != (USB_DIR_IN|USB_RECIP_DEVICE) && 1017 type != (USB_DIR_IN|USB_RECIP_ENDPOINT) && 1018 type != (USB_DIR_IN|USB_RECIP_INTERFACE)) 1019 goto delegate; 1020 if (le16_to_cpu(req.wLength) != 2 || 1021 le16_to_cpu(req.wValue) != 0) 1022 break; 1023 err = isr_get_status_response(ci, &req); 1024 break; 1025 case USB_REQ_SET_ADDRESS: 1026 if (type != (USB_DIR_OUT|USB_RECIP_DEVICE)) 1027 goto delegate; 1028 if (le16_to_cpu(req.wLength) != 0 || 1029 le16_to_cpu(req.wIndex) != 0) 1030 break; 1031 ci->address = (u8)le16_to_cpu(req.wValue); 1032 ci->setaddr = true; 1033 err = isr_setup_status_phase(ci); 1034 break; 1035 case USB_REQ_SET_FEATURE: 1036 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) && 1037 le16_to_cpu(req.wValue) == 1038 USB_ENDPOINT_HALT) { 1039 if (req.wLength != 0) 1040 break; 1041 num = le16_to_cpu(req.wIndex); 1042 dir = num & USB_ENDPOINT_DIR_MASK; 1043 num &= USB_ENDPOINT_NUMBER_MASK; 1044 if (dir) /* TX */ 1045 num += ci->hw_ep_max / 2; 1046 1047 spin_unlock(&ci->lock); 1048 err = usb_ep_set_halt(&ci->ci_hw_ep[num].ep); 1049 spin_lock(&ci->lock); 1050 if (!err) 1051 isr_setup_status_phase(ci); 1052 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) { 1053 if (req.wLength != 0) 1054 break; 1055 switch (le16_to_cpu(req.wValue)) { 1056 case USB_DEVICE_REMOTE_WAKEUP: 1057 ci->remote_wakeup = 1; 1058 err = isr_setup_status_phase(ci); 1059 break; 1060 case USB_DEVICE_TEST_MODE: 1061 tmode = le16_to_cpu(req.wIndex) >> 8; 1062 switch (tmode) { 1063 case TEST_J: 1064 case TEST_K: 1065 case TEST_SE0_NAK: 1066 case TEST_PACKET: 1067 case TEST_FORCE_EN: 1068 ci->test_mode = tmode; 1069 err = isr_setup_status_phase( 1070 ci); 1071 break; 1072 default: 1073 break; 1074 } 1075 default: 1076 goto delegate; 1077 } 1078 } else { 1079 goto delegate; 1080 } 1081 break; 1082 default: 1083 delegate: 1084 if (req.wLength == 0) /* no data phase */ 1085 ci->ep0_dir = TX; 1086 1087 spin_unlock(&ci->lock); 1088 err = ci->driver->setup(&ci->gadget, &req); 1089 spin_lock(&ci->lock); 1090 break; 1091 } 1092 1093 if (err < 0) { 1094 spin_unlock(&ci->lock); 1095 if (usb_ep_set_halt(&hwep->ep)) 1096 dev_err(ci->dev, "error: ep_set_halt\n"); 1097 spin_lock(&ci->lock); 1098 } 1099 } 1100 1101 /** 1102 * isr_tr_complete_handler: transaction complete interrupt handler 1103 * @ci: UDC descriptor 1104 * 1105 * This function handles traffic events 1106 */ 1107 static void isr_tr_complete_handler(struct ci_hdrc *ci) 1108 __releases(ci->lock) 1109 __acquires(ci->lock) 1110 { 1111 unsigned i; 1112 int err; 1113 1114 for (i = 0; i < ci->hw_ep_max; i++) { 1115 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i]; 1116 1117 if (hwep->ep.desc == NULL) 1118 continue; /* not configured */ 1119 1120 if (hw_test_and_clear_complete(ci, i)) { 1121 err = isr_tr_complete_low(hwep); 1122 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) { 1123 if (err > 0) /* needs status phase */ 1124 err = isr_setup_status_phase(ci); 1125 if (err < 0) { 1126 spin_unlock(&ci->lock); 1127 if (usb_ep_set_halt(&hwep->ep)) 1128 dev_err(ci->dev, 1129 "error: ep_set_halt\n"); 1130 spin_lock(&ci->lock); 1131 } 1132 } 1133 } 1134 1135 /* Only handle setup packet below */ 1136 if (i == 0 && 1137 hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(0))) 1138 isr_setup_packet_handler(ci); 1139 } 1140 } 1141 1142 /****************************************************************************** 1143 * ENDPT block 1144 *****************************************************************************/ 1145 /** 1146 * ep_enable: configure endpoint, making it usable 1147 * 1148 * Check usb_ep_enable() at "usb_gadget.h" for details 1149 */ 1150 static int ep_enable(struct usb_ep *ep, 1151 const struct usb_endpoint_descriptor *desc) 1152 { 1153 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); 1154 int retval = 0; 1155 unsigned long flags; 1156 u32 cap = 0; 1157 1158 if (ep == NULL || desc == NULL) 1159 return -EINVAL; 1160 1161 spin_lock_irqsave(hwep->lock, flags); 1162 1163 /* only internal SW should enable ctrl endpts */ 1164 1165 hwep->ep.desc = desc; 1166 1167 if (!list_empty(&hwep->qh.queue)) 1168 dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n"); 1169 1170 hwep->dir = usb_endpoint_dir_in(desc) ? TX : RX; 1171 hwep->num = usb_endpoint_num(desc); 1172 hwep->type = usb_endpoint_type(desc); 1173 1174 hwep->ep.maxpacket = usb_endpoint_maxp(desc) & 0x07ff; 1175 hwep->ep.mult = QH_ISO_MULT(usb_endpoint_maxp(desc)); 1176 1177 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) 1178 cap |= QH_IOS; 1179 if (hwep->num) 1180 cap |= QH_ZLT; 1181 cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT; 1182 /* 1183 * For ISO-TX, we set mult at QH as the largest value, and use 1184 * MultO at TD as real mult value. 1185 */ 1186 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) 1187 cap |= 3 << __ffs(QH_MULT); 1188 1189 hwep->qh.ptr->cap = cpu_to_le32(cap); 1190 1191 hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE); /* needed? */ 1192 1193 if (hwep->num != 0 && hwep->type == USB_ENDPOINT_XFER_CONTROL) { 1194 dev_err(hwep->ci->dev, "Set control xfer at non-ep0\n"); 1195 retval = -EINVAL; 1196 } 1197 1198 /* 1199 * Enable endpoints in the HW other than ep0 as ep0 1200 * is always enabled 1201 */ 1202 if (hwep->num) 1203 retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir, 1204 hwep->type); 1205 1206 spin_unlock_irqrestore(hwep->lock, flags); 1207 return retval; 1208 } 1209 1210 /** 1211 * ep_disable: endpoint is no longer usable 1212 * 1213 * Check usb_ep_disable() at "usb_gadget.h" for details 1214 */ 1215 static int ep_disable(struct usb_ep *ep) 1216 { 1217 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); 1218 int direction, retval = 0; 1219 unsigned long flags; 1220 1221 if (ep == NULL) 1222 return -EINVAL; 1223 else if (hwep->ep.desc == NULL) 1224 return -EBUSY; 1225 1226 spin_lock_irqsave(hwep->lock, flags); 1227 1228 /* only internal SW should disable ctrl endpts */ 1229 1230 direction = hwep->dir; 1231 do { 1232 retval |= _ep_nuke(hwep); 1233 retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir); 1234 1235 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) 1236 hwep->dir = (hwep->dir == TX) ? RX : TX; 1237 1238 } while (hwep->dir != direction); 1239 1240 hwep->ep.desc = NULL; 1241 1242 spin_unlock_irqrestore(hwep->lock, flags); 1243 return retval; 1244 } 1245 1246 /** 1247 * ep_alloc_request: allocate a request object to use with this endpoint 1248 * 1249 * Check usb_ep_alloc_request() at "usb_gadget.h" for details 1250 */ 1251 static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags) 1252 { 1253 struct ci_hw_req *hwreq = NULL; 1254 1255 if (ep == NULL) 1256 return NULL; 1257 1258 hwreq = kzalloc(sizeof(struct ci_hw_req), gfp_flags); 1259 if (hwreq != NULL) { 1260 INIT_LIST_HEAD(&hwreq->queue); 1261 INIT_LIST_HEAD(&hwreq->tds); 1262 } 1263 1264 return (hwreq == NULL) ? NULL : &hwreq->req; 1265 } 1266 1267 /** 1268 * ep_free_request: frees a request object 1269 * 1270 * Check usb_ep_free_request() at "usb_gadget.h" for details 1271 */ 1272 static void ep_free_request(struct usb_ep *ep, struct usb_request *req) 1273 { 1274 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); 1275 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req); 1276 struct td_node *node, *tmpnode; 1277 unsigned long flags; 1278 1279 if (ep == NULL || req == NULL) { 1280 return; 1281 } else if (!list_empty(&hwreq->queue)) { 1282 dev_err(hwep->ci->dev, "freeing queued request\n"); 1283 return; 1284 } 1285 1286 spin_lock_irqsave(hwep->lock, flags); 1287 1288 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) { 1289 dma_pool_free(hwep->td_pool, node->ptr, node->dma); 1290 list_del_init(&node->td); 1291 node->ptr = NULL; 1292 kfree(node); 1293 } 1294 1295 kfree(hwreq); 1296 1297 spin_unlock_irqrestore(hwep->lock, flags); 1298 } 1299 1300 /** 1301 * ep_queue: queues (submits) an I/O request to an endpoint 1302 * 1303 * Check usb_ep_queue()* at usb_gadget.h" for details 1304 */ 1305 static int ep_queue(struct usb_ep *ep, struct usb_request *req, 1306 gfp_t __maybe_unused gfp_flags) 1307 { 1308 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); 1309 int retval = 0; 1310 unsigned long flags; 1311 1312 if (ep == NULL || req == NULL || hwep->ep.desc == NULL) 1313 return -EINVAL; 1314 1315 spin_lock_irqsave(hwep->lock, flags); 1316 retval = _ep_queue(ep, req, gfp_flags); 1317 spin_unlock_irqrestore(hwep->lock, flags); 1318 return retval; 1319 } 1320 1321 /** 1322 * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint 1323 * 1324 * Check usb_ep_dequeue() at "usb_gadget.h" for details 1325 */ 1326 static int ep_dequeue(struct usb_ep *ep, struct usb_request *req) 1327 { 1328 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); 1329 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req); 1330 unsigned long flags; 1331 1332 if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY || 1333 hwep->ep.desc == NULL || list_empty(&hwreq->queue) || 1334 list_empty(&hwep->qh.queue)) 1335 return -EINVAL; 1336 1337 spin_lock_irqsave(hwep->lock, flags); 1338 1339 hw_ep_flush(hwep->ci, hwep->num, hwep->dir); 1340 1341 /* pop request */ 1342 list_del_init(&hwreq->queue); 1343 1344 usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir); 1345 1346 req->status = -ECONNRESET; 1347 1348 if (hwreq->req.complete != NULL) { 1349 spin_unlock(hwep->lock); 1350 hwreq->req.complete(&hwep->ep, &hwreq->req); 1351 spin_lock(hwep->lock); 1352 } 1353 1354 spin_unlock_irqrestore(hwep->lock, flags); 1355 return 0; 1356 } 1357 1358 /** 1359 * ep_set_halt: sets the endpoint halt feature 1360 * 1361 * Check usb_ep_set_halt() at "usb_gadget.h" for details 1362 */ 1363 static int ep_set_halt(struct usb_ep *ep, int value) 1364 { 1365 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); 1366 int direction, retval = 0; 1367 unsigned long flags; 1368 1369 if (ep == NULL || hwep->ep.desc == NULL) 1370 return -EINVAL; 1371 1372 if (usb_endpoint_xfer_isoc(hwep->ep.desc)) 1373 return -EOPNOTSUPP; 1374 1375 spin_lock_irqsave(hwep->lock, flags); 1376 1377 #ifndef STALL_IN 1378 /* g_file_storage MS compliant but g_zero fails chapter 9 compliance */ 1379 if (value && hwep->type == USB_ENDPOINT_XFER_BULK && hwep->dir == TX && 1380 !list_empty(&hwep->qh.queue)) { 1381 spin_unlock_irqrestore(hwep->lock, flags); 1382 return -EAGAIN; 1383 } 1384 #endif 1385 1386 direction = hwep->dir; 1387 do { 1388 retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value); 1389 1390 if (!value) 1391 hwep->wedge = 0; 1392 1393 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) 1394 hwep->dir = (hwep->dir == TX) ? RX : TX; 1395 1396 } while (hwep->dir != direction); 1397 1398 spin_unlock_irqrestore(hwep->lock, flags); 1399 return retval; 1400 } 1401 1402 /** 1403 * ep_set_wedge: sets the halt feature and ignores clear requests 1404 * 1405 * Check usb_ep_set_wedge() at "usb_gadget.h" for details 1406 */ 1407 static int ep_set_wedge(struct usb_ep *ep) 1408 { 1409 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); 1410 unsigned long flags; 1411 1412 if (ep == NULL || hwep->ep.desc == NULL) 1413 return -EINVAL; 1414 1415 spin_lock_irqsave(hwep->lock, flags); 1416 hwep->wedge = 1; 1417 spin_unlock_irqrestore(hwep->lock, flags); 1418 1419 return usb_ep_set_halt(ep); 1420 } 1421 1422 /** 1423 * ep_fifo_flush: flushes contents of a fifo 1424 * 1425 * Check usb_ep_fifo_flush() at "usb_gadget.h" for details 1426 */ 1427 static void ep_fifo_flush(struct usb_ep *ep) 1428 { 1429 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); 1430 unsigned long flags; 1431 1432 if (ep == NULL) { 1433 dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep)); 1434 return; 1435 } 1436 1437 spin_lock_irqsave(hwep->lock, flags); 1438 1439 hw_ep_flush(hwep->ci, hwep->num, hwep->dir); 1440 1441 spin_unlock_irqrestore(hwep->lock, flags); 1442 } 1443 1444 /** 1445 * Endpoint-specific part of the API to the USB controller hardware 1446 * Check "usb_gadget.h" for details 1447 */ 1448 static const struct usb_ep_ops usb_ep_ops = { 1449 .enable = ep_enable, 1450 .disable = ep_disable, 1451 .alloc_request = ep_alloc_request, 1452 .free_request = ep_free_request, 1453 .queue = ep_queue, 1454 .dequeue = ep_dequeue, 1455 .set_halt = ep_set_halt, 1456 .set_wedge = ep_set_wedge, 1457 .fifo_flush = ep_fifo_flush, 1458 }; 1459 1460 /****************************************************************************** 1461 * GADGET block 1462 *****************************************************************************/ 1463 static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active) 1464 { 1465 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); 1466 unsigned long flags; 1467 int gadget_ready = 0; 1468 1469 spin_lock_irqsave(&ci->lock, flags); 1470 ci->vbus_active = is_active; 1471 if (ci->driver) 1472 gadget_ready = 1; 1473 spin_unlock_irqrestore(&ci->lock, flags); 1474 1475 if (gadget_ready) { 1476 if (is_active) { 1477 pm_runtime_get_sync(&_gadget->dev); 1478 hw_device_reset(ci, USBMODE_CM_DC); 1479 hw_device_state(ci, ci->ep0out->qh.dma); 1480 dev_dbg(ci->dev, "Connected to host\n"); 1481 } else { 1482 if (ci->driver) 1483 ci->driver->disconnect(&ci->gadget); 1484 hw_device_state(ci, 0); 1485 if (ci->platdata->notify_event) 1486 ci->platdata->notify_event(ci, 1487 CI_HDRC_CONTROLLER_STOPPED_EVENT); 1488 _gadget_stop_activity(&ci->gadget); 1489 pm_runtime_put_sync(&_gadget->dev); 1490 dev_dbg(ci->dev, "Disconnected from host\n"); 1491 } 1492 } 1493 1494 return 0; 1495 } 1496 1497 static int ci_udc_wakeup(struct usb_gadget *_gadget) 1498 { 1499 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); 1500 unsigned long flags; 1501 int ret = 0; 1502 1503 spin_lock_irqsave(&ci->lock, flags); 1504 if (!ci->remote_wakeup) { 1505 ret = -EOPNOTSUPP; 1506 goto out; 1507 } 1508 if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) { 1509 ret = -EINVAL; 1510 goto out; 1511 } 1512 hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR); 1513 out: 1514 spin_unlock_irqrestore(&ci->lock, flags); 1515 return ret; 1516 } 1517 1518 static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma) 1519 { 1520 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); 1521 1522 if (ci->transceiver) 1523 return usb_phy_set_power(ci->transceiver, ma); 1524 return -ENOTSUPP; 1525 } 1526 1527 /* Change Data+ pullup status 1528 * this func is used by usb_gadget_connect/disconnet 1529 */ 1530 static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on) 1531 { 1532 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); 1533 1534 if (!ci->vbus_active) 1535 return -EOPNOTSUPP; 1536 1537 if (is_on) 1538 hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS); 1539 else 1540 hw_write(ci, OP_USBCMD, USBCMD_RS, 0); 1541 1542 return 0; 1543 } 1544 1545 static int ci_udc_start(struct usb_gadget *gadget, 1546 struct usb_gadget_driver *driver); 1547 static int ci_udc_stop(struct usb_gadget *gadget, 1548 struct usb_gadget_driver *driver); 1549 /** 1550 * Device operations part of the API to the USB controller hardware, 1551 * which don't involve endpoints (or i/o) 1552 * Check "usb_gadget.h" for details 1553 */ 1554 static const struct usb_gadget_ops usb_gadget_ops = { 1555 .vbus_session = ci_udc_vbus_session, 1556 .wakeup = ci_udc_wakeup, 1557 .pullup = ci_udc_pullup, 1558 .vbus_draw = ci_udc_vbus_draw, 1559 .udc_start = ci_udc_start, 1560 .udc_stop = ci_udc_stop, 1561 }; 1562 1563 static int init_eps(struct ci_hdrc *ci) 1564 { 1565 int retval = 0, i, j; 1566 1567 for (i = 0; i < ci->hw_ep_max/2; i++) 1568 for (j = RX; j <= TX; j++) { 1569 int k = i + j * ci->hw_ep_max/2; 1570 struct ci_hw_ep *hwep = &ci->ci_hw_ep[k]; 1571 1572 scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i, 1573 (j == TX) ? "in" : "out"); 1574 1575 hwep->ci = ci; 1576 hwep->lock = &ci->lock; 1577 hwep->td_pool = ci->td_pool; 1578 1579 hwep->ep.name = hwep->name; 1580 hwep->ep.ops = &usb_ep_ops; 1581 /* 1582 * for ep0: maxP defined in desc, for other 1583 * eps, maxP is set by epautoconfig() called 1584 * by gadget layer 1585 */ 1586 usb_ep_set_maxpacket_limit(&hwep->ep, (unsigned short)~0); 1587 1588 INIT_LIST_HEAD(&hwep->qh.queue); 1589 hwep->qh.ptr = dma_pool_alloc(ci->qh_pool, GFP_KERNEL, 1590 &hwep->qh.dma); 1591 if (hwep->qh.ptr == NULL) 1592 retval = -ENOMEM; 1593 else 1594 memset(hwep->qh.ptr, 0, sizeof(*hwep->qh.ptr)); 1595 1596 /* 1597 * set up shorthands for ep0 out and in endpoints, 1598 * don't add to gadget's ep_list 1599 */ 1600 if (i == 0) { 1601 if (j == RX) 1602 ci->ep0out = hwep; 1603 else 1604 ci->ep0in = hwep; 1605 1606 usb_ep_set_maxpacket_limit(&hwep->ep, CTRL_PAYLOAD_MAX); 1607 continue; 1608 } 1609 1610 list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list); 1611 } 1612 1613 return retval; 1614 } 1615 1616 static void destroy_eps(struct ci_hdrc *ci) 1617 { 1618 int i; 1619 1620 for (i = 0; i < ci->hw_ep_max; i++) { 1621 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i]; 1622 1623 if (hwep->pending_td) 1624 free_pending_td(hwep); 1625 dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma); 1626 } 1627 } 1628 1629 /** 1630 * ci_udc_start: register a gadget driver 1631 * @gadget: our gadget 1632 * @driver: the driver being registered 1633 * 1634 * Interrupts are enabled here. 1635 */ 1636 static int ci_udc_start(struct usb_gadget *gadget, 1637 struct usb_gadget_driver *driver) 1638 { 1639 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget); 1640 unsigned long flags; 1641 int retval = -ENOMEM; 1642 1643 if (driver->disconnect == NULL) 1644 return -EINVAL; 1645 1646 1647 ci->ep0out->ep.desc = &ctrl_endpt_out_desc; 1648 retval = usb_ep_enable(&ci->ep0out->ep); 1649 if (retval) 1650 return retval; 1651 1652 ci->ep0in->ep.desc = &ctrl_endpt_in_desc; 1653 retval = usb_ep_enable(&ci->ep0in->ep); 1654 if (retval) 1655 return retval; 1656 1657 ci->driver = driver; 1658 pm_runtime_get_sync(&ci->gadget.dev); 1659 if (ci->vbus_active) { 1660 spin_lock_irqsave(&ci->lock, flags); 1661 hw_device_reset(ci, USBMODE_CM_DC); 1662 } else { 1663 pm_runtime_put_sync(&ci->gadget.dev); 1664 return retval; 1665 } 1666 1667 retval = hw_device_state(ci, ci->ep0out->qh.dma); 1668 spin_unlock_irqrestore(&ci->lock, flags); 1669 if (retval) 1670 pm_runtime_put_sync(&ci->gadget.dev); 1671 1672 return retval; 1673 } 1674 1675 /** 1676 * ci_udc_stop: unregister a gadget driver 1677 */ 1678 static int ci_udc_stop(struct usb_gadget *gadget, 1679 struct usb_gadget_driver *driver) 1680 { 1681 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget); 1682 unsigned long flags; 1683 1684 spin_lock_irqsave(&ci->lock, flags); 1685 1686 if (ci->vbus_active) { 1687 hw_device_state(ci, 0); 1688 if (ci->platdata->notify_event) 1689 ci->platdata->notify_event(ci, 1690 CI_HDRC_CONTROLLER_STOPPED_EVENT); 1691 spin_unlock_irqrestore(&ci->lock, flags); 1692 _gadget_stop_activity(&ci->gadget); 1693 spin_lock_irqsave(&ci->lock, flags); 1694 pm_runtime_put(&ci->gadget.dev); 1695 } 1696 1697 ci->driver = NULL; 1698 spin_unlock_irqrestore(&ci->lock, flags); 1699 1700 return 0; 1701 } 1702 1703 /****************************************************************************** 1704 * BUS block 1705 *****************************************************************************/ 1706 /** 1707 * udc_irq: ci interrupt handler 1708 * 1709 * This function returns IRQ_HANDLED if the IRQ has been handled 1710 * It locks access to registers 1711 */ 1712 static irqreturn_t udc_irq(struct ci_hdrc *ci) 1713 { 1714 irqreturn_t retval; 1715 u32 intr; 1716 1717 if (ci == NULL) 1718 return IRQ_HANDLED; 1719 1720 spin_lock(&ci->lock); 1721 1722 if (ci->platdata->flags & CI_HDRC_REGS_SHARED) { 1723 if (hw_read(ci, OP_USBMODE, USBMODE_CM) != 1724 USBMODE_CM_DC) { 1725 spin_unlock(&ci->lock); 1726 return IRQ_NONE; 1727 } 1728 } 1729 intr = hw_test_and_clear_intr_active(ci); 1730 1731 if (intr) { 1732 /* order defines priority - do NOT change it */ 1733 if (USBi_URI & intr) 1734 isr_reset_handler(ci); 1735 1736 if (USBi_PCI & intr) { 1737 ci->gadget.speed = hw_port_is_high_speed(ci) ? 1738 USB_SPEED_HIGH : USB_SPEED_FULL; 1739 if (ci->suspended && ci->driver->resume) { 1740 spin_unlock(&ci->lock); 1741 ci->driver->resume(&ci->gadget); 1742 spin_lock(&ci->lock); 1743 ci->suspended = 0; 1744 } 1745 } 1746 1747 if (USBi_UI & intr) 1748 isr_tr_complete_handler(ci); 1749 1750 if (USBi_SLI & intr) { 1751 if (ci->gadget.speed != USB_SPEED_UNKNOWN && 1752 ci->driver->suspend) { 1753 ci->suspended = 1; 1754 spin_unlock(&ci->lock); 1755 ci->driver->suspend(&ci->gadget); 1756 spin_lock(&ci->lock); 1757 } 1758 } 1759 retval = IRQ_HANDLED; 1760 } else { 1761 retval = IRQ_NONE; 1762 } 1763 spin_unlock(&ci->lock); 1764 1765 return retval; 1766 } 1767 1768 /** 1769 * udc_start: initialize gadget role 1770 * @ci: chipidea controller 1771 */ 1772 static int udc_start(struct ci_hdrc *ci) 1773 { 1774 struct device *dev = ci->dev; 1775 int retval = 0; 1776 1777 spin_lock_init(&ci->lock); 1778 1779 ci->gadget.ops = &usb_gadget_ops; 1780 ci->gadget.speed = USB_SPEED_UNKNOWN; 1781 ci->gadget.max_speed = USB_SPEED_HIGH; 1782 ci->gadget.is_otg = 0; 1783 ci->gadget.name = ci->platdata->name; 1784 1785 INIT_LIST_HEAD(&ci->gadget.ep_list); 1786 1787 /* alloc resources */ 1788 ci->qh_pool = dma_pool_create("ci_hw_qh", dev, 1789 sizeof(struct ci_hw_qh), 1790 64, CI_HDRC_PAGE_SIZE); 1791 if (ci->qh_pool == NULL) 1792 return -ENOMEM; 1793 1794 ci->td_pool = dma_pool_create("ci_hw_td", dev, 1795 sizeof(struct ci_hw_td), 1796 64, CI_HDRC_PAGE_SIZE); 1797 if (ci->td_pool == NULL) { 1798 retval = -ENOMEM; 1799 goto free_qh_pool; 1800 } 1801 1802 retval = init_eps(ci); 1803 if (retval) 1804 goto free_pools; 1805 1806 ci->gadget.ep0 = &ci->ep0in->ep; 1807 1808 retval = usb_add_gadget_udc(dev, &ci->gadget); 1809 if (retval) 1810 goto destroy_eps; 1811 1812 pm_runtime_no_callbacks(&ci->gadget.dev); 1813 pm_runtime_enable(&ci->gadget.dev); 1814 1815 return retval; 1816 1817 destroy_eps: 1818 destroy_eps(ci); 1819 free_pools: 1820 dma_pool_destroy(ci->td_pool); 1821 free_qh_pool: 1822 dma_pool_destroy(ci->qh_pool); 1823 return retval; 1824 } 1825 1826 /** 1827 * ci_hdrc_gadget_destroy: parent remove must call this to remove UDC 1828 * 1829 * No interrupts active, the IRQ has been released 1830 */ 1831 void ci_hdrc_gadget_destroy(struct ci_hdrc *ci) 1832 { 1833 if (!ci->roles[CI_ROLE_GADGET]) 1834 return; 1835 1836 usb_del_gadget_udc(&ci->gadget); 1837 1838 destroy_eps(ci); 1839 1840 dma_pool_destroy(ci->td_pool); 1841 dma_pool_destroy(ci->qh_pool); 1842 } 1843 1844 static int udc_id_switch_for_device(struct ci_hdrc *ci) 1845 { 1846 if (ci->is_otg) { 1847 ci_clear_otg_interrupt(ci, OTGSC_BSVIS); 1848 ci_enable_otg_interrupt(ci, OTGSC_BSVIE); 1849 } 1850 1851 return 0; 1852 } 1853 1854 static void udc_id_switch_for_host(struct ci_hdrc *ci) 1855 { 1856 if (ci->is_otg) { 1857 /* host doesn't care B_SESSION_VALID event */ 1858 ci_clear_otg_interrupt(ci, OTGSC_BSVIS); 1859 ci_disable_otg_interrupt(ci, OTGSC_BSVIE); 1860 } 1861 } 1862 1863 /** 1864 * ci_hdrc_gadget_init - initialize device related bits 1865 * ci: the controller 1866 * 1867 * This function initializes the gadget, if the device is "device capable". 1868 */ 1869 int ci_hdrc_gadget_init(struct ci_hdrc *ci) 1870 { 1871 struct ci_role_driver *rdrv; 1872 1873 if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC)) 1874 return -ENXIO; 1875 1876 rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL); 1877 if (!rdrv) 1878 return -ENOMEM; 1879 1880 rdrv->start = udc_id_switch_for_device; 1881 rdrv->stop = udc_id_switch_for_host; 1882 rdrv->irq = udc_irq; 1883 rdrv->name = "gadget"; 1884 ci->roles[CI_ROLE_GADGET] = rdrv; 1885 1886 return udc_start(ci); 1887 } 1888