xref: /openbmc/linux/drivers/usb/chipidea/udc.c (revision 3b27d139)
1 /*
2  * udc.c - ChipIdea UDC driver
3  *
4  * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
5  *
6  * Author: David Lopo
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  */
12 
13 #include <linux/delay.h>
14 #include <linux/device.h>
15 #include <linux/dmapool.h>
16 #include <linux/err.h>
17 #include <linux/irqreturn.h>
18 #include <linux/kernel.h>
19 #include <linux/slab.h>
20 #include <linux/pm_runtime.h>
21 #include <linux/usb/ch9.h>
22 #include <linux/usb/gadget.h>
23 #include <linux/usb/otg-fsm.h>
24 #include <linux/usb/chipidea.h>
25 
26 #include "ci.h"
27 #include "udc.h"
28 #include "bits.h"
29 #include "debug.h"
30 #include "otg.h"
31 #include "otg_fsm.h"
32 
33 /* control endpoint description */
34 static const struct usb_endpoint_descriptor
35 ctrl_endpt_out_desc = {
36 	.bLength         = USB_DT_ENDPOINT_SIZE,
37 	.bDescriptorType = USB_DT_ENDPOINT,
38 
39 	.bEndpointAddress = USB_DIR_OUT,
40 	.bmAttributes    = USB_ENDPOINT_XFER_CONTROL,
41 	.wMaxPacketSize  = cpu_to_le16(CTRL_PAYLOAD_MAX),
42 };
43 
44 static const struct usb_endpoint_descriptor
45 ctrl_endpt_in_desc = {
46 	.bLength         = USB_DT_ENDPOINT_SIZE,
47 	.bDescriptorType = USB_DT_ENDPOINT,
48 
49 	.bEndpointAddress = USB_DIR_IN,
50 	.bmAttributes    = USB_ENDPOINT_XFER_CONTROL,
51 	.wMaxPacketSize  = cpu_to_le16(CTRL_PAYLOAD_MAX),
52 };
53 
54 /**
55  * hw_ep_bit: calculates the bit number
56  * @num: endpoint number
57  * @dir: endpoint direction
58  *
59  * This function returns bit number
60  */
61 static inline int hw_ep_bit(int num, int dir)
62 {
63 	return num + (dir ? 16 : 0);
64 }
65 
66 static inline int ep_to_bit(struct ci_hdrc *ci, int n)
67 {
68 	int fill = 16 - ci->hw_ep_max / 2;
69 
70 	if (n >= ci->hw_ep_max / 2)
71 		n += fill;
72 
73 	return n;
74 }
75 
76 /**
77  * hw_device_state: enables/disables interrupts (execute without interruption)
78  * @dma: 0 => disable, !0 => enable and set dma engine
79  *
80  * This function returns an error code
81  */
82 static int hw_device_state(struct ci_hdrc *ci, u32 dma)
83 {
84 	if (dma) {
85 		hw_write(ci, OP_ENDPTLISTADDR, ~0, dma);
86 		/* interrupt, error, port change, reset, sleep/suspend */
87 		hw_write(ci, OP_USBINTR, ~0,
88 			     USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
89 	} else {
90 		hw_write(ci, OP_USBINTR, ~0, 0);
91 	}
92 	return 0;
93 }
94 
95 /**
96  * hw_ep_flush: flush endpoint fifo (execute without interruption)
97  * @num: endpoint number
98  * @dir: endpoint direction
99  *
100  * This function returns an error code
101  */
102 static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir)
103 {
104 	int n = hw_ep_bit(num, dir);
105 
106 	do {
107 		/* flush any pending transfer */
108 		hw_write(ci, OP_ENDPTFLUSH, ~0, BIT(n));
109 		while (hw_read(ci, OP_ENDPTFLUSH, BIT(n)))
110 			cpu_relax();
111 	} while (hw_read(ci, OP_ENDPTSTAT, BIT(n)));
112 
113 	return 0;
114 }
115 
116 /**
117  * hw_ep_disable: disables endpoint (execute without interruption)
118  * @num: endpoint number
119  * @dir: endpoint direction
120  *
121  * This function returns an error code
122  */
123 static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir)
124 {
125 	hw_ep_flush(ci, num, dir);
126 	hw_write(ci, OP_ENDPTCTRL + num,
127 		 dir ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
128 	return 0;
129 }
130 
131 /**
132  * hw_ep_enable: enables endpoint (execute without interruption)
133  * @num:  endpoint number
134  * @dir:  endpoint direction
135  * @type: endpoint type
136  *
137  * This function returns an error code
138  */
139 static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type)
140 {
141 	u32 mask, data;
142 
143 	if (dir) {
144 		mask  = ENDPTCTRL_TXT;  /* type    */
145 		data  = type << __ffs(mask);
146 
147 		mask |= ENDPTCTRL_TXS;  /* unstall */
148 		mask |= ENDPTCTRL_TXR;  /* reset data toggle */
149 		data |= ENDPTCTRL_TXR;
150 		mask |= ENDPTCTRL_TXE;  /* enable  */
151 		data |= ENDPTCTRL_TXE;
152 	} else {
153 		mask  = ENDPTCTRL_RXT;  /* type    */
154 		data  = type << __ffs(mask);
155 
156 		mask |= ENDPTCTRL_RXS;  /* unstall */
157 		mask |= ENDPTCTRL_RXR;  /* reset data toggle */
158 		data |= ENDPTCTRL_RXR;
159 		mask |= ENDPTCTRL_RXE;  /* enable  */
160 		data |= ENDPTCTRL_RXE;
161 	}
162 	hw_write(ci, OP_ENDPTCTRL + num, mask, data);
163 	return 0;
164 }
165 
166 /**
167  * hw_ep_get_halt: return endpoint halt status
168  * @num: endpoint number
169  * @dir: endpoint direction
170  *
171  * This function returns 1 if endpoint halted
172  */
173 static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir)
174 {
175 	u32 mask = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
176 
177 	return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0;
178 }
179 
180 /**
181  * hw_ep_prime: primes endpoint (execute without interruption)
182  * @num:     endpoint number
183  * @dir:     endpoint direction
184  * @is_ctrl: true if control endpoint
185  *
186  * This function returns an error code
187  */
188 static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl)
189 {
190 	int n = hw_ep_bit(num, dir);
191 
192 	if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
193 		return -EAGAIN;
194 
195 	hw_write(ci, OP_ENDPTPRIME, ~0, BIT(n));
196 
197 	while (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
198 		cpu_relax();
199 	if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
200 		return -EAGAIN;
201 
202 	/* status shoult be tested according with manual but it doesn't work */
203 	return 0;
204 }
205 
206 /**
207  * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
208  *                 without interruption)
209  * @num:   endpoint number
210  * @dir:   endpoint direction
211  * @value: true => stall, false => unstall
212  *
213  * This function returns an error code
214  */
215 static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value)
216 {
217 	if (value != 0 && value != 1)
218 		return -EINVAL;
219 
220 	do {
221 		enum ci_hw_regs reg = OP_ENDPTCTRL + num;
222 		u32 mask_xs = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
223 		u32 mask_xr = dir ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
224 
225 		/* data toggle - reserved for EP0 but it's in ESS */
226 		hw_write(ci, reg, mask_xs|mask_xr,
227 			  value ? mask_xs : mask_xr);
228 	} while (value != hw_ep_get_halt(ci, num, dir));
229 
230 	return 0;
231 }
232 
233 /**
234  * hw_is_port_high_speed: test if port is high speed
235  *
236  * This function returns true if high speed port
237  */
238 static int hw_port_is_high_speed(struct ci_hdrc *ci)
239 {
240 	return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) :
241 		hw_read(ci, OP_PORTSC, PORTSC_HSP);
242 }
243 
244 /**
245  * hw_test_and_clear_complete: test & clear complete status (execute without
246  *                             interruption)
247  * @n: endpoint number
248  *
249  * This function returns complete status
250  */
251 static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n)
252 {
253 	n = ep_to_bit(ci, n);
254 	return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n));
255 }
256 
257 /**
258  * hw_test_and_clear_intr_active: test & clear active interrupts (execute
259  *                                without interruption)
260  *
261  * This function returns active interrutps
262  */
263 static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci)
264 {
265 	u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci);
266 
267 	hw_write(ci, OP_USBSTS, ~0, reg);
268 	return reg;
269 }
270 
271 /**
272  * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
273  *                                interruption)
274  *
275  * This function returns guard value
276  */
277 static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci)
278 {
279 	return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0);
280 }
281 
282 /**
283  * hw_test_and_set_setup_guard: test & set setup guard (execute without
284  *                              interruption)
285  *
286  * This function returns guard value
287  */
288 static int hw_test_and_set_setup_guard(struct ci_hdrc *ci)
289 {
290 	return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
291 }
292 
293 /**
294  * hw_usb_set_address: configures USB address (execute without interruption)
295  * @value: new USB address
296  *
297  * This function explicitly sets the address, without the "USBADRA" (advance)
298  * feature, which is not supported by older versions of the controller.
299  */
300 static void hw_usb_set_address(struct ci_hdrc *ci, u8 value)
301 {
302 	hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR,
303 		 value << __ffs(DEVICEADDR_USBADR));
304 }
305 
306 /**
307  * hw_usb_reset: restart device after a bus reset (execute without
308  *               interruption)
309  *
310  * This function returns an error code
311  */
312 static int hw_usb_reset(struct ci_hdrc *ci)
313 {
314 	hw_usb_set_address(ci, 0);
315 
316 	/* ESS flushes only at end?!? */
317 	hw_write(ci, OP_ENDPTFLUSH,    ~0, ~0);
318 
319 	/* clear setup token semaphores */
320 	hw_write(ci, OP_ENDPTSETUPSTAT, 0,  0);
321 
322 	/* clear complete status */
323 	hw_write(ci, OP_ENDPTCOMPLETE,  0,  0);
324 
325 	/* wait until all bits cleared */
326 	while (hw_read(ci, OP_ENDPTPRIME, ~0))
327 		udelay(10);             /* not RTOS friendly */
328 
329 	/* reset all endpoints ? */
330 
331 	/* reset internal status and wait for further instructions
332 	   no need to verify the port reset status (ESS does it) */
333 
334 	return 0;
335 }
336 
337 /******************************************************************************
338  * UTIL block
339  *****************************************************************************/
340 
341 static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
342 			  unsigned length)
343 {
344 	int i;
345 	u32 temp;
346 	struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node),
347 						  GFP_ATOMIC);
348 
349 	if (node == NULL)
350 		return -ENOMEM;
351 
352 	node->ptr = dma_pool_alloc(hwep->td_pool, GFP_ATOMIC,
353 				   &node->dma);
354 	if (node->ptr == NULL) {
355 		kfree(node);
356 		return -ENOMEM;
357 	}
358 
359 	memset(node->ptr, 0, sizeof(struct ci_hw_td));
360 	node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES));
361 	node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES);
362 	node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE);
363 	if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) {
364 		u32 mul = hwreq->req.length / hwep->ep.maxpacket;
365 
366 		if (hwreq->req.length == 0
367 				|| hwreq->req.length % hwep->ep.maxpacket)
368 			mul++;
369 		node->ptr->token |= mul << __ffs(TD_MULTO);
370 	}
371 
372 	temp = (u32) (hwreq->req.dma + hwreq->req.actual);
373 	if (length) {
374 		node->ptr->page[0] = cpu_to_le32(temp);
375 		for (i = 1; i < TD_PAGE_COUNT; i++) {
376 			u32 page = temp + i * CI_HDRC_PAGE_SIZE;
377 			page &= ~TD_RESERVED_MASK;
378 			node->ptr->page[i] = cpu_to_le32(page);
379 		}
380 	}
381 
382 	hwreq->req.actual += length;
383 
384 	if (!list_empty(&hwreq->tds)) {
385 		/* get the last entry */
386 		lastnode = list_entry(hwreq->tds.prev,
387 				struct td_node, td);
388 		lastnode->ptr->next = cpu_to_le32(node->dma);
389 	}
390 
391 	INIT_LIST_HEAD(&node->td);
392 	list_add_tail(&node->td, &hwreq->tds);
393 
394 	return 0;
395 }
396 
397 /**
398  * _usb_addr: calculates endpoint address from direction & number
399  * @ep:  endpoint
400  */
401 static inline u8 _usb_addr(struct ci_hw_ep *ep)
402 {
403 	return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
404 }
405 
406 /**
407  * _hardware_queue: configures a request at hardware level
408  * @gadget: gadget
409  * @hwep:   endpoint
410  *
411  * This function returns an error code
412  */
413 static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
414 {
415 	struct ci_hdrc *ci = hwep->ci;
416 	int ret = 0;
417 	unsigned rest = hwreq->req.length;
418 	int pages = TD_PAGE_COUNT;
419 	struct td_node *firstnode, *lastnode;
420 
421 	/* don't queue twice */
422 	if (hwreq->req.status == -EALREADY)
423 		return -EALREADY;
424 
425 	hwreq->req.status = -EALREADY;
426 
427 	ret = usb_gadget_map_request(&ci->gadget, &hwreq->req, hwep->dir);
428 	if (ret)
429 		return ret;
430 
431 	/*
432 	 * The first buffer could be not page aligned.
433 	 * In that case we have to span into one extra td.
434 	 */
435 	if (hwreq->req.dma % PAGE_SIZE)
436 		pages--;
437 
438 	if (rest == 0)
439 		add_td_to_list(hwep, hwreq, 0);
440 
441 	while (rest > 0) {
442 		unsigned count = min(hwreq->req.length - hwreq->req.actual,
443 					(unsigned)(pages * CI_HDRC_PAGE_SIZE));
444 		add_td_to_list(hwep, hwreq, count);
445 		rest -= count;
446 	}
447 
448 	if (hwreq->req.zero && hwreq->req.length && hwep->dir == TX
449 	    && (hwreq->req.length % hwep->ep.maxpacket == 0))
450 		add_td_to_list(hwep, hwreq, 0);
451 
452 	firstnode = list_first_entry(&hwreq->tds, struct td_node, td);
453 
454 	lastnode = list_entry(hwreq->tds.prev,
455 		struct td_node, td);
456 
457 	lastnode->ptr->next = cpu_to_le32(TD_TERMINATE);
458 	if (!hwreq->req.no_interrupt)
459 		lastnode->ptr->token |= cpu_to_le32(TD_IOC);
460 	wmb();
461 
462 	hwreq->req.actual = 0;
463 	if (!list_empty(&hwep->qh.queue)) {
464 		struct ci_hw_req *hwreqprev;
465 		int n = hw_ep_bit(hwep->num, hwep->dir);
466 		int tmp_stat;
467 		struct td_node *prevlastnode;
468 		u32 next = firstnode->dma & TD_ADDR_MASK;
469 
470 		hwreqprev = list_entry(hwep->qh.queue.prev,
471 				struct ci_hw_req, queue);
472 		prevlastnode = list_entry(hwreqprev->tds.prev,
473 				struct td_node, td);
474 
475 		prevlastnode->ptr->next = cpu_to_le32(next);
476 		wmb();
477 		if (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
478 			goto done;
479 		do {
480 			hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
481 			tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n));
482 		} while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW));
483 		hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0);
484 		if (tmp_stat)
485 			goto done;
486 	}
487 
488 	/*  QH configuration */
489 	hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma);
490 	hwep->qh.ptr->td.token &=
491 		cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE));
492 
493 	if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == RX) {
494 		u32 mul = hwreq->req.length / hwep->ep.maxpacket;
495 
496 		if (hwreq->req.length == 0
497 				|| hwreq->req.length % hwep->ep.maxpacket)
498 			mul++;
499 		hwep->qh.ptr->cap |= mul << __ffs(QH_MULT);
500 	}
501 
502 	wmb();   /* synchronize before ep prime */
503 
504 	ret = hw_ep_prime(ci, hwep->num, hwep->dir,
505 			   hwep->type == USB_ENDPOINT_XFER_CONTROL);
506 done:
507 	return ret;
508 }
509 
510 /*
511  * free_pending_td: remove a pending request for the endpoint
512  * @hwep: endpoint
513  */
514 static void free_pending_td(struct ci_hw_ep *hwep)
515 {
516 	struct td_node *pending = hwep->pending_td;
517 
518 	dma_pool_free(hwep->td_pool, pending->ptr, pending->dma);
519 	hwep->pending_td = NULL;
520 	kfree(pending);
521 }
522 
523 static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
524 					   struct td_node *node)
525 {
526 	hwep->qh.ptr->td.next = node->dma;
527 	hwep->qh.ptr->td.token &=
528 		cpu_to_le32(~(TD_STATUS_HALTED | TD_STATUS_ACTIVE));
529 
530 	/* Synchronize before ep prime */
531 	wmb();
532 
533 	return hw_ep_prime(ci, hwep->num, hwep->dir,
534 				hwep->type == USB_ENDPOINT_XFER_CONTROL);
535 }
536 
537 /**
538  * _hardware_dequeue: handles a request at hardware level
539  * @gadget: gadget
540  * @hwep:   endpoint
541  *
542  * This function returns an error code
543  */
544 static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
545 {
546 	u32 tmptoken;
547 	struct td_node *node, *tmpnode;
548 	unsigned remaining_length;
549 	unsigned actual = hwreq->req.length;
550 	struct ci_hdrc *ci = hwep->ci;
551 
552 	if (hwreq->req.status != -EALREADY)
553 		return -EINVAL;
554 
555 	hwreq->req.status = 0;
556 
557 	list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
558 		tmptoken = le32_to_cpu(node->ptr->token);
559 		if ((TD_STATUS_ACTIVE & tmptoken) != 0) {
560 			int n = hw_ep_bit(hwep->num, hwep->dir);
561 
562 			if (ci->rev == CI_REVISION_24)
563 				if (!hw_read(ci, OP_ENDPTSTAT, BIT(n)))
564 					reprime_dtd(ci, hwep, node);
565 			hwreq->req.status = -EALREADY;
566 			return -EBUSY;
567 		}
568 
569 		remaining_length = (tmptoken & TD_TOTAL_BYTES);
570 		remaining_length >>= __ffs(TD_TOTAL_BYTES);
571 		actual -= remaining_length;
572 
573 		hwreq->req.status = tmptoken & TD_STATUS;
574 		if ((TD_STATUS_HALTED & hwreq->req.status)) {
575 			hwreq->req.status = -EPIPE;
576 			break;
577 		} else if ((TD_STATUS_DT_ERR & hwreq->req.status)) {
578 			hwreq->req.status = -EPROTO;
579 			break;
580 		} else if ((TD_STATUS_TR_ERR & hwreq->req.status)) {
581 			hwreq->req.status = -EILSEQ;
582 			break;
583 		}
584 
585 		if (remaining_length) {
586 			if (hwep->dir) {
587 				hwreq->req.status = -EPROTO;
588 				break;
589 			}
590 		}
591 		/*
592 		 * As the hardware could still address the freed td
593 		 * which will run the udc unusable, the cleanup of the
594 		 * td has to be delayed by one.
595 		 */
596 		if (hwep->pending_td)
597 			free_pending_td(hwep);
598 
599 		hwep->pending_td = node;
600 		list_del_init(&node->td);
601 	}
602 
603 	usb_gadget_unmap_request(&hwep->ci->gadget, &hwreq->req, hwep->dir);
604 
605 	hwreq->req.actual += actual;
606 
607 	if (hwreq->req.status)
608 		return hwreq->req.status;
609 
610 	return hwreq->req.actual;
611 }
612 
613 /**
614  * _ep_nuke: dequeues all endpoint requests
615  * @hwep: endpoint
616  *
617  * This function returns an error code
618  * Caller must hold lock
619  */
620 static int _ep_nuke(struct ci_hw_ep *hwep)
621 __releases(hwep->lock)
622 __acquires(hwep->lock)
623 {
624 	struct td_node *node, *tmpnode;
625 	if (hwep == NULL)
626 		return -EINVAL;
627 
628 	hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
629 
630 	while (!list_empty(&hwep->qh.queue)) {
631 
632 		/* pop oldest request */
633 		struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next,
634 						     struct ci_hw_req, queue);
635 
636 		list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
637 			dma_pool_free(hwep->td_pool, node->ptr, node->dma);
638 			list_del_init(&node->td);
639 			node->ptr = NULL;
640 			kfree(node);
641 		}
642 
643 		list_del_init(&hwreq->queue);
644 		hwreq->req.status = -ESHUTDOWN;
645 
646 		if (hwreq->req.complete != NULL) {
647 			spin_unlock(hwep->lock);
648 			usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
649 			spin_lock(hwep->lock);
650 		}
651 	}
652 
653 	if (hwep->pending_td)
654 		free_pending_td(hwep);
655 
656 	return 0;
657 }
658 
659 /**
660  * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
661  * @gadget: gadget
662  *
663  * This function returns an error code
664  */
665 static int _gadget_stop_activity(struct usb_gadget *gadget)
666 {
667 	struct usb_ep *ep;
668 	struct ci_hdrc    *ci = container_of(gadget, struct ci_hdrc, gadget);
669 	unsigned long flags;
670 
671 	spin_lock_irqsave(&ci->lock, flags);
672 	ci->gadget.speed = USB_SPEED_UNKNOWN;
673 	ci->remote_wakeup = 0;
674 	ci->suspended = 0;
675 	spin_unlock_irqrestore(&ci->lock, flags);
676 
677 	/* flush all endpoints */
678 	gadget_for_each_ep(ep, gadget) {
679 		usb_ep_fifo_flush(ep);
680 	}
681 	usb_ep_fifo_flush(&ci->ep0out->ep);
682 	usb_ep_fifo_flush(&ci->ep0in->ep);
683 
684 	/* make sure to disable all endpoints */
685 	gadget_for_each_ep(ep, gadget) {
686 		usb_ep_disable(ep);
687 	}
688 
689 	if (ci->status != NULL) {
690 		usb_ep_free_request(&ci->ep0in->ep, ci->status);
691 		ci->status = NULL;
692 	}
693 
694 	return 0;
695 }
696 
697 /******************************************************************************
698  * ISR block
699  *****************************************************************************/
700 /**
701  * isr_reset_handler: USB reset interrupt handler
702  * @ci: UDC device
703  *
704  * This function resets USB engine after a bus reset occurred
705  */
706 static void isr_reset_handler(struct ci_hdrc *ci)
707 __releases(ci->lock)
708 __acquires(ci->lock)
709 {
710 	int retval;
711 
712 	spin_unlock(&ci->lock);
713 	if (ci->gadget.speed != USB_SPEED_UNKNOWN)
714 		usb_gadget_udc_reset(&ci->gadget, ci->driver);
715 
716 	retval = _gadget_stop_activity(&ci->gadget);
717 	if (retval)
718 		goto done;
719 
720 	retval = hw_usb_reset(ci);
721 	if (retval)
722 		goto done;
723 
724 	ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC);
725 	if (ci->status == NULL)
726 		retval = -ENOMEM;
727 
728 done:
729 	spin_lock(&ci->lock);
730 
731 	if (retval)
732 		dev_err(ci->dev, "error: %i\n", retval);
733 }
734 
735 /**
736  * isr_get_status_complete: get_status request complete function
737  * @ep:  endpoint
738  * @req: request handled
739  *
740  * Caller must release lock
741  */
742 static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
743 {
744 	if (ep == NULL || req == NULL)
745 		return;
746 
747 	kfree(req->buf);
748 	usb_ep_free_request(ep, req);
749 }
750 
751 /**
752  * _ep_queue: queues (submits) an I/O request to an endpoint
753  *
754  * Caller must hold lock
755  */
756 static int _ep_queue(struct usb_ep *ep, struct usb_request *req,
757 		    gfp_t __maybe_unused gfp_flags)
758 {
759 	struct ci_hw_ep  *hwep  = container_of(ep,  struct ci_hw_ep, ep);
760 	struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
761 	struct ci_hdrc *ci = hwep->ci;
762 	int retval = 0;
763 
764 	if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
765 		return -EINVAL;
766 
767 	if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
768 		if (req->length)
769 			hwep = (ci->ep0_dir == RX) ?
770 			       ci->ep0out : ci->ep0in;
771 		if (!list_empty(&hwep->qh.queue)) {
772 			_ep_nuke(hwep);
773 			retval = -EOVERFLOW;
774 			dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n",
775 				 _usb_addr(hwep));
776 		}
777 	}
778 
779 	if (usb_endpoint_xfer_isoc(hwep->ep.desc) &&
780 	    hwreq->req.length > (1 + hwep->ep.mult) * hwep->ep.maxpacket) {
781 		dev_err(hwep->ci->dev, "request length too big for isochronous\n");
782 		return -EMSGSIZE;
783 	}
784 
785 	/* first nuke then test link, e.g. previous status has not sent */
786 	if (!list_empty(&hwreq->queue)) {
787 		dev_err(hwep->ci->dev, "request already in queue\n");
788 		return -EBUSY;
789 	}
790 
791 	/* push request */
792 	hwreq->req.status = -EINPROGRESS;
793 	hwreq->req.actual = 0;
794 
795 	retval = _hardware_enqueue(hwep, hwreq);
796 
797 	if (retval == -EALREADY)
798 		retval = 0;
799 	if (!retval)
800 		list_add_tail(&hwreq->queue, &hwep->qh.queue);
801 
802 	return retval;
803 }
804 
805 /**
806  * isr_get_status_response: get_status request response
807  * @ci: ci struct
808  * @setup: setup request packet
809  *
810  * This function returns an error code
811  */
812 static int isr_get_status_response(struct ci_hdrc *ci,
813 				   struct usb_ctrlrequest *setup)
814 __releases(hwep->lock)
815 __acquires(hwep->lock)
816 {
817 	struct ci_hw_ep *hwep = ci->ep0in;
818 	struct usb_request *req = NULL;
819 	gfp_t gfp_flags = GFP_ATOMIC;
820 	int dir, num, retval;
821 
822 	if (hwep == NULL || setup == NULL)
823 		return -EINVAL;
824 
825 	spin_unlock(hwep->lock);
826 	req = usb_ep_alloc_request(&hwep->ep, gfp_flags);
827 	spin_lock(hwep->lock);
828 	if (req == NULL)
829 		return -ENOMEM;
830 
831 	req->complete = isr_get_status_complete;
832 	req->length   = 2;
833 	req->buf      = kzalloc(req->length, gfp_flags);
834 	if (req->buf == NULL) {
835 		retval = -ENOMEM;
836 		goto err_free_req;
837 	}
838 
839 	if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
840 		*(u16 *)req->buf = (ci->remote_wakeup << 1) |
841 			ci->gadget.is_selfpowered;
842 	} else if ((setup->bRequestType & USB_RECIP_MASK) \
843 		   == USB_RECIP_ENDPOINT) {
844 		dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
845 			TX : RX;
846 		num =  le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
847 		*(u16 *)req->buf = hw_ep_get_halt(ci, num, dir);
848 	}
849 	/* else do nothing; reserved for future use */
850 
851 	retval = _ep_queue(&hwep->ep, req, gfp_flags);
852 	if (retval)
853 		goto err_free_buf;
854 
855 	return 0;
856 
857  err_free_buf:
858 	kfree(req->buf);
859  err_free_req:
860 	spin_unlock(hwep->lock);
861 	usb_ep_free_request(&hwep->ep, req);
862 	spin_lock(hwep->lock);
863 	return retval;
864 }
865 
866 /**
867  * isr_setup_status_complete: setup_status request complete function
868  * @ep:  endpoint
869  * @req: request handled
870  *
871  * Caller must release lock. Put the port in test mode if test mode
872  * feature is selected.
873  */
874 static void
875 isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
876 {
877 	struct ci_hdrc *ci = req->context;
878 	unsigned long flags;
879 
880 	if (ci->setaddr) {
881 		hw_usb_set_address(ci, ci->address);
882 		ci->setaddr = false;
883 		if (ci->address)
884 			usb_gadget_set_state(&ci->gadget, USB_STATE_ADDRESS);
885 	}
886 
887 	spin_lock_irqsave(&ci->lock, flags);
888 	if (ci->test_mode)
889 		hw_port_test_set(ci, ci->test_mode);
890 	spin_unlock_irqrestore(&ci->lock, flags);
891 }
892 
893 /**
894  * isr_setup_status_phase: queues the status phase of a setup transation
895  * @ci: ci struct
896  *
897  * This function returns an error code
898  */
899 static int isr_setup_status_phase(struct ci_hdrc *ci)
900 {
901 	int retval;
902 	struct ci_hw_ep *hwep;
903 
904 	hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in;
905 	ci->status->context = ci;
906 	ci->status->complete = isr_setup_status_complete;
907 
908 	retval = _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC);
909 
910 	return retval;
911 }
912 
913 /**
914  * isr_tr_complete_low: transaction complete low level handler
915  * @hwep: endpoint
916  *
917  * This function returns an error code
918  * Caller must hold lock
919  */
920 static int isr_tr_complete_low(struct ci_hw_ep *hwep)
921 __releases(hwep->lock)
922 __acquires(hwep->lock)
923 {
924 	struct ci_hw_req *hwreq, *hwreqtemp;
925 	struct ci_hw_ep *hweptemp = hwep;
926 	int retval = 0;
927 
928 	list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue,
929 			queue) {
930 		retval = _hardware_dequeue(hwep, hwreq);
931 		if (retval < 0)
932 			break;
933 		list_del_init(&hwreq->queue);
934 		if (hwreq->req.complete != NULL) {
935 			spin_unlock(hwep->lock);
936 			if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) &&
937 					hwreq->req.length)
938 				hweptemp = hwep->ci->ep0in;
939 			usb_gadget_giveback_request(&hweptemp->ep, &hwreq->req);
940 			spin_lock(hwep->lock);
941 		}
942 	}
943 
944 	if (retval == -EBUSY)
945 		retval = 0;
946 
947 	return retval;
948 }
949 
950 static int otg_a_alt_hnp_support(struct ci_hdrc *ci)
951 {
952 	dev_warn(&ci->gadget.dev,
953 		"connect the device to an alternate port if you want HNP\n");
954 	return isr_setup_status_phase(ci);
955 }
956 
957 /**
958  * isr_setup_packet_handler: setup packet handler
959  * @ci: UDC descriptor
960  *
961  * This function handles setup packet
962  */
963 static void isr_setup_packet_handler(struct ci_hdrc *ci)
964 __releases(ci->lock)
965 __acquires(ci->lock)
966 {
967 	struct ci_hw_ep *hwep = &ci->ci_hw_ep[0];
968 	struct usb_ctrlrequest req;
969 	int type, num, dir, err = -EINVAL;
970 	u8 tmode = 0;
971 
972 	/*
973 	 * Flush data and handshake transactions of previous
974 	 * setup packet.
975 	 */
976 	_ep_nuke(ci->ep0out);
977 	_ep_nuke(ci->ep0in);
978 
979 	/* read_setup_packet */
980 	do {
981 		hw_test_and_set_setup_guard(ci);
982 		memcpy(&req, &hwep->qh.ptr->setup, sizeof(req));
983 	} while (!hw_test_and_clear_setup_guard(ci));
984 
985 	type = req.bRequestType;
986 
987 	ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
988 
989 	switch (req.bRequest) {
990 	case USB_REQ_CLEAR_FEATURE:
991 		if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
992 				le16_to_cpu(req.wValue) ==
993 				USB_ENDPOINT_HALT) {
994 			if (req.wLength != 0)
995 				break;
996 			num  = le16_to_cpu(req.wIndex);
997 			dir = num & USB_ENDPOINT_DIR_MASK;
998 			num &= USB_ENDPOINT_NUMBER_MASK;
999 			if (dir) /* TX */
1000 				num += ci->hw_ep_max / 2;
1001 			if (!ci->ci_hw_ep[num].wedge) {
1002 				spin_unlock(&ci->lock);
1003 				err = usb_ep_clear_halt(
1004 					&ci->ci_hw_ep[num].ep);
1005 				spin_lock(&ci->lock);
1006 				if (err)
1007 					break;
1008 			}
1009 			err = isr_setup_status_phase(ci);
1010 		} else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
1011 				le16_to_cpu(req.wValue) ==
1012 				USB_DEVICE_REMOTE_WAKEUP) {
1013 			if (req.wLength != 0)
1014 				break;
1015 			ci->remote_wakeup = 0;
1016 			err = isr_setup_status_phase(ci);
1017 		} else {
1018 			goto delegate;
1019 		}
1020 		break;
1021 	case USB_REQ_GET_STATUS:
1022 		if (type != (USB_DIR_IN|USB_RECIP_DEVICE)   &&
1023 		    type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
1024 		    type != (USB_DIR_IN|USB_RECIP_INTERFACE))
1025 			goto delegate;
1026 		if (le16_to_cpu(req.wLength) != 2 ||
1027 		    le16_to_cpu(req.wValue)  != 0)
1028 			break;
1029 		err = isr_get_status_response(ci, &req);
1030 		break;
1031 	case USB_REQ_SET_ADDRESS:
1032 		if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
1033 			goto delegate;
1034 		if (le16_to_cpu(req.wLength) != 0 ||
1035 		    le16_to_cpu(req.wIndex)  != 0)
1036 			break;
1037 		ci->address = (u8)le16_to_cpu(req.wValue);
1038 		ci->setaddr = true;
1039 		err = isr_setup_status_phase(ci);
1040 		break;
1041 	case USB_REQ_SET_FEATURE:
1042 		if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1043 				le16_to_cpu(req.wValue) ==
1044 				USB_ENDPOINT_HALT) {
1045 			if (req.wLength != 0)
1046 				break;
1047 			num  = le16_to_cpu(req.wIndex);
1048 			dir = num & USB_ENDPOINT_DIR_MASK;
1049 			num &= USB_ENDPOINT_NUMBER_MASK;
1050 			if (dir) /* TX */
1051 				num += ci->hw_ep_max / 2;
1052 
1053 			spin_unlock(&ci->lock);
1054 			err = usb_ep_set_halt(&ci->ci_hw_ep[num].ep);
1055 			spin_lock(&ci->lock);
1056 			if (!err)
1057 				isr_setup_status_phase(ci);
1058 		} else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
1059 			if (req.wLength != 0)
1060 				break;
1061 			switch (le16_to_cpu(req.wValue)) {
1062 			case USB_DEVICE_REMOTE_WAKEUP:
1063 				ci->remote_wakeup = 1;
1064 				err = isr_setup_status_phase(ci);
1065 				break;
1066 			case USB_DEVICE_TEST_MODE:
1067 				tmode = le16_to_cpu(req.wIndex) >> 8;
1068 				switch (tmode) {
1069 				case TEST_J:
1070 				case TEST_K:
1071 				case TEST_SE0_NAK:
1072 				case TEST_PACKET:
1073 				case TEST_FORCE_EN:
1074 					ci->test_mode = tmode;
1075 					err = isr_setup_status_phase(
1076 							ci);
1077 					break;
1078 				default:
1079 					break;
1080 				}
1081 				break;
1082 			case USB_DEVICE_B_HNP_ENABLE:
1083 				if (ci_otg_is_fsm_mode(ci)) {
1084 					ci->gadget.b_hnp_enable = 1;
1085 					err = isr_setup_status_phase(
1086 							ci);
1087 				}
1088 				break;
1089 			case USB_DEVICE_A_ALT_HNP_SUPPORT:
1090 				if (ci_otg_is_fsm_mode(ci))
1091 					err = otg_a_alt_hnp_support(ci);
1092 				break;
1093 			case USB_DEVICE_A_HNP_SUPPORT:
1094 				if (ci_otg_is_fsm_mode(ci)) {
1095 					ci->gadget.a_hnp_support = 1;
1096 					err = isr_setup_status_phase(
1097 							ci);
1098 				}
1099 				break;
1100 			default:
1101 				goto delegate;
1102 			}
1103 		} else {
1104 			goto delegate;
1105 		}
1106 		break;
1107 	default:
1108 delegate:
1109 		if (req.wLength == 0)   /* no data phase */
1110 			ci->ep0_dir = TX;
1111 
1112 		spin_unlock(&ci->lock);
1113 		err = ci->driver->setup(&ci->gadget, &req);
1114 		spin_lock(&ci->lock);
1115 		break;
1116 	}
1117 
1118 	if (err < 0) {
1119 		spin_unlock(&ci->lock);
1120 		if (usb_ep_set_halt(&hwep->ep))
1121 			dev_err(ci->dev, "error: ep_set_halt\n");
1122 		spin_lock(&ci->lock);
1123 	}
1124 }
1125 
1126 /**
1127  * isr_tr_complete_handler: transaction complete interrupt handler
1128  * @ci: UDC descriptor
1129  *
1130  * This function handles traffic events
1131  */
1132 static void isr_tr_complete_handler(struct ci_hdrc *ci)
1133 __releases(ci->lock)
1134 __acquires(ci->lock)
1135 {
1136 	unsigned i;
1137 	int err;
1138 
1139 	for (i = 0; i < ci->hw_ep_max; i++) {
1140 		struct ci_hw_ep *hwep  = &ci->ci_hw_ep[i];
1141 
1142 		if (hwep->ep.desc == NULL)
1143 			continue;   /* not configured */
1144 
1145 		if (hw_test_and_clear_complete(ci, i)) {
1146 			err = isr_tr_complete_low(hwep);
1147 			if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
1148 				if (err > 0)   /* needs status phase */
1149 					err = isr_setup_status_phase(ci);
1150 				if (err < 0) {
1151 					spin_unlock(&ci->lock);
1152 					if (usb_ep_set_halt(&hwep->ep))
1153 						dev_err(ci->dev,
1154 							"error: ep_set_halt\n");
1155 					spin_lock(&ci->lock);
1156 				}
1157 			}
1158 		}
1159 
1160 		/* Only handle setup packet below */
1161 		if (i == 0 &&
1162 			hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(0)))
1163 			isr_setup_packet_handler(ci);
1164 	}
1165 }
1166 
1167 /******************************************************************************
1168  * ENDPT block
1169  *****************************************************************************/
1170 /**
1171  * ep_enable: configure endpoint, making it usable
1172  *
1173  * Check usb_ep_enable() at "usb_gadget.h" for details
1174  */
1175 static int ep_enable(struct usb_ep *ep,
1176 		     const struct usb_endpoint_descriptor *desc)
1177 {
1178 	struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1179 	int retval = 0;
1180 	unsigned long flags;
1181 	u32 cap = 0;
1182 
1183 	if (ep == NULL || desc == NULL)
1184 		return -EINVAL;
1185 
1186 	spin_lock_irqsave(hwep->lock, flags);
1187 
1188 	/* only internal SW should enable ctrl endpts */
1189 
1190 	if (!list_empty(&hwep->qh.queue)) {
1191 		dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n");
1192 		spin_unlock_irqrestore(hwep->lock, flags);
1193 		return -EBUSY;
1194 	}
1195 
1196 	hwep->ep.desc = desc;
1197 
1198 	hwep->dir  = usb_endpoint_dir_in(desc) ? TX : RX;
1199 	hwep->num  = usb_endpoint_num(desc);
1200 	hwep->type = usb_endpoint_type(desc);
1201 
1202 	hwep->ep.maxpacket = usb_endpoint_maxp(desc) & 0x07ff;
1203 	hwep->ep.mult = QH_ISO_MULT(usb_endpoint_maxp(desc));
1204 
1205 	if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1206 		cap |= QH_IOS;
1207 
1208 	cap |= QH_ZLT;
1209 	cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT;
1210 	/*
1211 	 * For ISO-TX, we set mult at QH as the largest value, and use
1212 	 * MultO at TD as real mult value.
1213 	 */
1214 	if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX)
1215 		cap |= 3 << __ffs(QH_MULT);
1216 
1217 	hwep->qh.ptr->cap = cpu_to_le32(cap);
1218 
1219 	hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE);   /* needed? */
1220 
1221 	if (hwep->num != 0 && hwep->type == USB_ENDPOINT_XFER_CONTROL) {
1222 		dev_err(hwep->ci->dev, "Set control xfer at non-ep0\n");
1223 		retval = -EINVAL;
1224 	}
1225 
1226 	/*
1227 	 * Enable endpoints in the HW other than ep0 as ep0
1228 	 * is always enabled
1229 	 */
1230 	if (hwep->num)
1231 		retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir,
1232 				       hwep->type);
1233 
1234 	spin_unlock_irqrestore(hwep->lock, flags);
1235 	return retval;
1236 }
1237 
1238 /**
1239  * ep_disable: endpoint is no longer usable
1240  *
1241  * Check usb_ep_disable() at "usb_gadget.h" for details
1242  */
1243 static int ep_disable(struct usb_ep *ep)
1244 {
1245 	struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1246 	int direction, retval = 0;
1247 	unsigned long flags;
1248 
1249 	if (ep == NULL)
1250 		return -EINVAL;
1251 	else if (hwep->ep.desc == NULL)
1252 		return -EBUSY;
1253 
1254 	spin_lock_irqsave(hwep->lock, flags);
1255 
1256 	/* only internal SW should disable ctrl endpts */
1257 
1258 	direction = hwep->dir;
1259 	do {
1260 		retval |= _ep_nuke(hwep);
1261 		retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir);
1262 
1263 		if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1264 			hwep->dir = (hwep->dir == TX) ? RX : TX;
1265 
1266 	} while (hwep->dir != direction);
1267 
1268 	hwep->ep.desc = NULL;
1269 
1270 	spin_unlock_irqrestore(hwep->lock, flags);
1271 	return retval;
1272 }
1273 
1274 /**
1275  * ep_alloc_request: allocate a request object to use with this endpoint
1276  *
1277  * Check usb_ep_alloc_request() at "usb_gadget.h" for details
1278  */
1279 static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
1280 {
1281 	struct ci_hw_req *hwreq = NULL;
1282 
1283 	if (ep == NULL)
1284 		return NULL;
1285 
1286 	hwreq = kzalloc(sizeof(struct ci_hw_req), gfp_flags);
1287 	if (hwreq != NULL) {
1288 		INIT_LIST_HEAD(&hwreq->queue);
1289 		INIT_LIST_HEAD(&hwreq->tds);
1290 	}
1291 
1292 	return (hwreq == NULL) ? NULL : &hwreq->req;
1293 }
1294 
1295 /**
1296  * ep_free_request: frees a request object
1297  *
1298  * Check usb_ep_free_request() at "usb_gadget.h" for details
1299  */
1300 static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
1301 {
1302 	struct ci_hw_ep  *hwep  = container_of(ep,  struct ci_hw_ep, ep);
1303 	struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
1304 	struct td_node *node, *tmpnode;
1305 	unsigned long flags;
1306 
1307 	if (ep == NULL || req == NULL) {
1308 		return;
1309 	} else if (!list_empty(&hwreq->queue)) {
1310 		dev_err(hwep->ci->dev, "freeing queued request\n");
1311 		return;
1312 	}
1313 
1314 	spin_lock_irqsave(hwep->lock, flags);
1315 
1316 	list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
1317 		dma_pool_free(hwep->td_pool, node->ptr, node->dma);
1318 		list_del_init(&node->td);
1319 		node->ptr = NULL;
1320 		kfree(node);
1321 	}
1322 
1323 	kfree(hwreq);
1324 
1325 	spin_unlock_irqrestore(hwep->lock, flags);
1326 }
1327 
1328 /**
1329  * ep_queue: queues (submits) an I/O request to an endpoint
1330  *
1331  * Check usb_ep_queue()* at usb_gadget.h" for details
1332  */
1333 static int ep_queue(struct usb_ep *ep, struct usb_request *req,
1334 		    gfp_t __maybe_unused gfp_flags)
1335 {
1336 	struct ci_hw_ep  *hwep  = container_of(ep,  struct ci_hw_ep, ep);
1337 	int retval = 0;
1338 	unsigned long flags;
1339 
1340 	if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
1341 		return -EINVAL;
1342 
1343 	spin_lock_irqsave(hwep->lock, flags);
1344 	retval = _ep_queue(ep, req, gfp_flags);
1345 	spin_unlock_irqrestore(hwep->lock, flags);
1346 	return retval;
1347 }
1348 
1349 /**
1350  * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
1351  *
1352  * Check usb_ep_dequeue() at "usb_gadget.h" for details
1353  */
1354 static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
1355 {
1356 	struct ci_hw_ep  *hwep  = container_of(ep,  struct ci_hw_ep, ep);
1357 	struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
1358 	unsigned long flags;
1359 	struct td_node *node, *tmpnode;
1360 
1361 	if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY ||
1362 		hwep->ep.desc == NULL || list_empty(&hwreq->queue) ||
1363 		list_empty(&hwep->qh.queue))
1364 		return -EINVAL;
1365 
1366 	spin_lock_irqsave(hwep->lock, flags);
1367 
1368 	hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
1369 
1370 	list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
1371 		dma_pool_free(hwep->td_pool, node->ptr, node->dma);
1372 		list_del(&node->td);
1373 		kfree(node);
1374 	}
1375 
1376 	/* pop request */
1377 	list_del_init(&hwreq->queue);
1378 
1379 	usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir);
1380 
1381 	req->status = -ECONNRESET;
1382 
1383 	if (hwreq->req.complete != NULL) {
1384 		spin_unlock(hwep->lock);
1385 		usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
1386 		spin_lock(hwep->lock);
1387 	}
1388 
1389 	spin_unlock_irqrestore(hwep->lock, flags);
1390 	return 0;
1391 }
1392 
1393 /**
1394  * ep_set_halt: sets the endpoint halt feature
1395  *
1396  * Check usb_ep_set_halt() at "usb_gadget.h" for details
1397  */
1398 static int ep_set_halt(struct usb_ep *ep, int value)
1399 {
1400 	struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1401 	int direction, retval = 0;
1402 	unsigned long flags;
1403 
1404 	if (ep == NULL || hwep->ep.desc == NULL)
1405 		return -EINVAL;
1406 
1407 	if (usb_endpoint_xfer_isoc(hwep->ep.desc))
1408 		return -EOPNOTSUPP;
1409 
1410 	spin_lock_irqsave(hwep->lock, flags);
1411 
1412 #ifndef STALL_IN
1413 	/* g_file_storage MS compliant but g_zero fails chapter 9 compliance */
1414 	if (value && hwep->type == USB_ENDPOINT_XFER_BULK && hwep->dir == TX &&
1415 	    !list_empty(&hwep->qh.queue)) {
1416 		spin_unlock_irqrestore(hwep->lock, flags);
1417 		return -EAGAIN;
1418 	}
1419 #endif
1420 
1421 	direction = hwep->dir;
1422 	do {
1423 		retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value);
1424 
1425 		if (!value)
1426 			hwep->wedge = 0;
1427 
1428 		if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1429 			hwep->dir = (hwep->dir == TX) ? RX : TX;
1430 
1431 	} while (hwep->dir != direction);
1432 
1433 	spin_unlock_irqrestore(hwep->lock, flags);
1434 	return retval;
1435 }
1436 
1437 /**
1438  * ep_set_wedge: sets the halt feature and ignores clear requests
1439  *
1440  * Check usb_ep_set_wedge() at "usb_gadget.h" for details
1441  */
1442 static int ep_set_wedge(struct usb_ep *ep)
1443 {
1444 	struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1445 	unsigned long flags;
1446 
1447 	if (ep == NULL || hwep->ep.desc == NULL)
1448 		return -EINVAL;
1449 
1450 	spin_lock_irqsave(hwep->lock, flags);
1451 	hwep->wedge = 1;
1452 	spin_unlock_irqrestore(hwep->lock, flags);
1453 
1454 	return usb_ep_set_halt(ep);
1455 }
1456 
1457 /**
1458  * ep_fifo_flush: flushes contents of a fifo
1459  *
1460  * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
1461  */
1462 static void ep_fifo_flush(struct usb_ep *ep)
1463 {
1464 	struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1465 	unsigned long flags;
1466 
1467 	if (ep == NULL) {
1468 		dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep));
1469 		return;
1470 	}
1471 
1472 	spin_lock_irqsave(hwep->lock, flags);
1473 
1474 	hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
1475 
1476 	spin_unlock_irqrestore(hwep->lock, flags);
1477 }
1478 
1479 /**
1480  * Endpoint-specific part of the API to the USB controller hardware
1481  * Check "usb_gadget.h" for details
1482  */
1483 static const struct usb_ep_ops usb_ep_ops = {
1484 	.enable	       = ep_enable,
1485 	.disable       = ep_disable,
1486 	.alloc_request = ep_alloc_request,
1487 	.free_request  = ep_free_request,
1488 	.queue	       = ep_queue,
1489 	.dequeue       = ep_dequeue,
1490 	.set_halt      = ep_set_halt,
1491 	.set_wedge     = ep_set_wedge,
1492 	.fifo_flush    = ep_fifo_flush,
1493 };
1494 
1495 /******************************************************************************
1496  * GADGET block
1497  *****************************************************************************/
1498 static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
1499 {
1500 	struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1501 	unsigned long flags;
1502 	int gadget_ready = 0;
1503 
1504 	spin_lock_irqsave(&ci->lock, flags);
1505 	ci->vbus_active = is_active;
1506 	if (ci->driver)
1507 		gadget_ready = 1;
1508 	spin_unlock_irqrestore(&ci->lock, flags);
1509 
1510 	if (gadget_ready) {
1511 		if (is_active) {
1512 			pm_runtime_get_sync(&_gadget->dev);
1513 			hw_device_reset(ci);
1514 			hw_device_state(ci, ci->ep0out->qh.dma);
1515 			usb_gadget_set_state(_gadget, USB_STATE_POWERED);
1516 			usb_udc_vbus_handler(_gadget, true);
1517 		} else {
1518 			usb_udc_vbus_handler(_gadget, false);
1519 			if (ci->driver)
1520 				ci->driver->disconnect(&ci->gadget);
1521 			hw_device_state(ci, 0);
1522 			if (ci->platdata->notify_event)
1523 				ci->platdata->notify_event(ci,
1524 				CI_HDRC_CONTROLLER_STOPPED_EVENT);
1525 			_gadget_stop_activity(&ci->gadget);
1526 			pm_runtime_put_sync(&_gadget->dev);
1527 			usb_gadget_set_state(_gadget, USB_STATE_NOTATTACHED);
1528 		}
1529 	}
1530 
1531 	return 0;
1532 }
1533 
1534 static int ci_udc_wakeup(struct usb_gadget *_gadget)
1535 {
1536 	struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1537 	unsigned long flags;
1538 	int ret = 0;
1539 
1540 	spin_lock_irqsave(&ci->lock, flags);
1541 	if (!ci->remote_wakeup) {
1542 		ret = -EOPNOTSUPP;
1543 		goto out;
1544 	}
1545 	if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) {
1546 		ret = -EINVAL;
1547 		goto out;
1548 	}
1549 	hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR);
1550 out:
1551 	spin_unlock_irqrestore(&ci->lock, flags);
1552 	return ret;
1553 }
1554 
1555 static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
1556 {
1557 	struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1558 
1559 	if (ci->usb_phy)
1560 		return usb_phy_set_power(ci->usb_phy, ma);
1561 	return -ENOTSUPP;
1562 }
1563 
1564 static int ci_udc_selfpowered(struct usb_gadget *_gadget, int is_on)
1565 {
1566 	struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1567 	struct ci_hw_ep *hwep = ci->ep0in;
1568 	unsigned long flags;
1569 
1570 	spin_lock_irqsave(hwep->lock, flags);
1571 	_gadget->is_selfpowered = (is_on != 0);
1572 	spin_unlock_irqrestore(hwep->lock, flags);
1573 
1574 	return 0;
1575 }
1576 
1577 /* Change Data+ pullup status
1578  * this func is used by usb_gadget_connect/disconnet
1579  */
1580 static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on)
1581 {
1582 	struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1583 
1584 	/* Data+ pullup controlled by OTG state machine in OTG fsm mode */
1585 	if (ci_otg_is_fsm_mode(ci))
1586 		return 0;
1587 
1588 	pm_runtime_get_sync(&ci->gadget.dev);
1589 	if (is_on)
1590 		hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
1591 	else
1592 		hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
1593 	pm_runtime_put_sync(&ci->gadget.dev);
1594 
1595 	return 0;
1596 }
1597 
1598 static int ci_udc_start(struct usb_gadget *gadget,
1599 			 struct usb_gadget_driver *driver);
1600 static int ci_udc_stop(struct usb_gadget *gadget);
1601 /**
1602  * Device operations part of the API to the USB controller hardware,
1603  * which don't involve endpoints (or i/o)
1604  * Check  "usb_gadget.h" for details
1605  */
1606 static const struct usb_gadget_ops usb_gadget_ops = {
1607 	.vbus_session	= ci_udc_vbus_session,
1608 	.wakeup		= ci_udc_wakeup,
1609 	.set_selfpowered	= ci_udc_selfpowered,
1610 	.pullup		= ci_udc_pullup,
1611 	.vbus_draw	= ci_udc_vbus_draw,
1612 	.udc_start	= ci_udc_start,
1613 	.udc_stop	= ci_udc_stop,
1614 };
1615 
1616 static int init_eps(struct ci_hdrc *ci)
1617 {
1618 	int retval = 0, i, j;
1619 
1620 	for (i = 0; i < ci->hw_ep_max/2; i++)
1621 		for (j = RX; j <= TX; j++) {
1622 			int k = i + j * ci->hw_ep_max/2;
1623 			struct ci_hw_ep *hwep = &ci->ci_hw_ep[k];
1624 
1625 			scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i,
1626 					(j == TX)  ? "in" : "out");
1627 
1628 			hwep->ci          = ci;
1629 			hwep->lock         = &ci->lock;
1630 			hwep->td_pool      = ci->td_pool;
1631 
1632 			hwep->ep.name      = hwep->name;
1633 			hwep->ep.ops       = &usb_ep_ops;
1634 
1635 			if (i == 0) {
1636 				hwep->ep.caps.type_control = true;
1637 			} else {
1638 				hwep->ep.caps.type_iso = true;
1639 				hwep->ep.caps.type_bulk = true;
1640 				hwep->ep.caps.type_int = true;
1641 			}
1642 
1643 			if (j == TX)
1644 				hwep->ep.caps.dir_in = true;
1645 			else
1646 				hwep->ep.caps.dir_out = true;
1647 
1648 			/*
1649 			 * for ep0: maxP defined in desc, for other
1650 			 * eps, maxP is set by epautoconfig() called
1651 			 * by gadget layer
1652 			 */
1653 			usb_ep_set_maxpacket_limit(&hwep->ep, (unsigned short)~0);
1654 
1655 			INIT_LIST_HEAD(&hwep->qh.queue);
1656 			hwep->qh.ptr = dma_pool_alloc(ci->qh_pool, GFP_KERNEL,
1657 						     &hwep->qh.dma);
1658 			if (hwep->qh.ptr == NULL)
1659 				retval = -ENOMEM;
1660 			else
1661 				memset(hwep->qh.ptr, 0, sizeof(*hwep->qh.ptr));
1662 
1663 			/*
1664 			 * set up shorthands for ep0 out and in endpoints,
1665 			 * don't add to gadget's ep_list
1666 			 */
1667 			if (i == 0) {
1668 				if (j == RX)
1669 					ci->ep0out = hwep;
1670 				else
1671 					ci->ep0in = hwep;
1672 
1673 				usb_ep_set_maxpacket_limit(&hwep->ep, CTRL_PAYLOAD_MAX);
1674 				continue;
1675 			}
1676 
1677 			list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list);
1678 		}
1679 
1680 	return retval;
1681 }
1682 
1683 static void destroy_eps(struct ci_hdrc *ci)
1684 {
1685 	int i;
1686 
1687 	for (i = 0; i < ci->hw_ep_max; i++) {
1688 		struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
1689 
1690 		if (hwep->pending_td)
1691 			free_pending_td(hwep);
1692 		dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma);
1693 	}
1694 }
1695 
1696 /**
1697  * ci_udc_start: register a gadget driver
1698  * @gadget: our gadget
1699  * @driver: the driver being registered
1700  *
1701  * Interrupts are enabled here.
1702  */
1703 static int ci_udc_start(struct usb_gadget *gadget,
1704 			 struct usb_gadget_driver *driver)
1705 {
1706 	struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1707 	unsigned long flags;
1708 	int retval = -ENOMEM;
1709 
1710 	if (driver->disconnect == NULL)
1711 		return -EINVAL;
1712 
1713 
1714 	ci->ep0out->ep.desc = &ctrl_endpt_out_desc;
1715 	retval = usb_ep_enable(&ci->ep0out->ep);
1716 	if (retval)
1717 		return retval;
1718 
1719 	ci->ep0in->ep.desc = &ctrl_endpt_in_desc;
1720 	retval = usb_ep_enable(&ci->ep0in->ep);
1721 	if (retval)
1722 		return retval;
1723 
1724 	ci->driver = driver;
1725 
1726 	/* Start otg fsm for B-device */
1727 	if (ci_otg_is_fsm_mode(ci) && ci->fsm.id) {
1728 		ci_hdrc_otg_fsm_start(ci);
1729 		return retval;
1730 	}
1731 
1732 	pm_runtime_get_sync(&ci->gadget.dev);
1733 	if (ci->vbus_active) {
1734 		spin_lock_irqsave(&ci->lock, flags);
1735 		hw_device_reset(ci);
1736 	} else {
1737 		usb_udc_vbus_handler(&ci->gadget, false);
1738 		pm_runtime_put_sync(&ci->gadget.dev);
1739 		return retval;
1740 	}
1741 
1742 	retval = hw_device_state(ci, ci->ep0out->qh.dma);
1743 	spin_unlock_irqrestore(&ci->lock, flags);
1744 	if (retval)
1745 		pm_runtime_put_sync(&ci->gadget.dev);
1746 
1747 	return retval;
1748 }
1749 
1750 /**
1751  * ci_udc_stop: unregister a gadget driver
1752  */
1753 static int ci_udc_stop(struct usb_gadget *gadget)
1754 {
1755 	struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1756 	unsigned long flags;
1757 
1758 	spin_lock_irqsave(&ci->lock, flags);
1759 
1760 	if (ci->vbus_active) {
1761 		hw_device_state(ci, 0);
1762 		if (ci->platdata->notify_event)
1763 			ci->platdata->notify_event(ci,
1764 			CI_HDRC_CONTROLLER_STOPPED_EVENT);
1765 		spin_unlock_irqrestore(&ci->lock, flags);
1766 		_gadget_stop_activity(&ci->gadget);
1767 		spin_lock_irqsave(&ci->lock, flags);
1768 		pm_runtime_put(&ci->gadget.dev);
1769 	}
1770 
1771 	ci->driver = NULL;
1772 	spin_unlock_irqrestore(&ci->lock, flags);
1773 
1774 	return 0;
1775 }
1776 
1777 /******************************************************************************
1778  * BUS block
1779  *****************************************************************************/
1780 /**
1781  * udc_irq: ci interrupt handler
1782  *
1783  * This function returns IRQ_HANDLED if the IRQ has been handled
1784  * It locks access to registers
1785  */
1786 static irqreturn_t udc_irq(struct ci_hdrc *ci)
1787 {
1788 	irqreturn_t retval;
1789 	u32 intr;
1790 
1791 	if (ci == NULL)
1792 		return IRQ_HANDLED;
1793 
1794 	spin_lock(&ci->lock);
1795 
1796 	if (ci->platdata->flags & CI_HDRC_REGS_SHARED) {
1797 		if (hw_read(ci, OP_USBMODE, USBMODE_CM) !=
1798 				USBMODE_CM_DC) {
1799 			spin_unlock(&ci->lock);
1800 			return IRQ_NONE;
1801 		}
1802 	}
1803 	intr = hw_test_and_clear_intr_active(ci);
1804 
1805 	if (intr) {
1806 		/* order defines priority - do NOT change it */
1807 		if (USBi_URI & intr)
1808 			isr_reset_handler(ci);
1809 
1810 		if (USBi_PCI & intr) {
1811 			ci->gadget.speed = hw_port_is_high_speed(ci) ?
1812 				USB_SPEED_HIGH : USB_SPEED_FULL;
1813 			if (ci->suspended && ci->driver->resume) {
1814 				spin_unlock(&ci->lock);
1815 				ci->driver->resume(&ci->gadget);
1816 				spin_lock(&ci->lock);
1817 				ci->suspended = 0;
1818 			}
1819 		}
1820 
1821 		if (USBi_UI  & intr)
1822 			isr_tr_complete_handler(ci);
1823 
1824 		if (USBi_SLI & intr) {
1825 			if (ci->gadget.speed != USB_SPEED_UNKNOWN &&
1826 			    ci->driver->suspend) {
1827 				ci->suspended = 1;
1828 				spin_unlock(&ci->lock);
1829 				ci->driver->suspend(&ci->gadget);
1830 				usb_gadget_set_state(&ci->gadget,
1831 						USB_STATE_SUSPENDED);
1832 				spin_lock(&ci->lock);
1833 			}
1834 		}
1835 		retval = IRQ_HANDLED;
1836 	} else {
1837 		retval = IRQ_NONE;
1838 	}
1839 	spin_unlock(&ci->lock);
1840 
1841 	return retval;
1842 }
1843 
1844 /**
1845  * udc_start: initialize gadget role
1846  * @ci: chipidea controller
1847  */
1848 static int udc_start(struct ci_hdrc *ci)
1849 {
1850 	struct device *dev = ci->dev;
1851 	struct usb_otg_caps *otg_caps = &ci->platdata->ci_otg_caps;
1852 	int retval = 0;
1853 
1854 	spin_lock_init(&ci->lock);
1855 
1856 	ci->gadget.ops          = &usb_gadget_ops;
1857 	ci->gadget.speed        = USB_SPEED_UNKNOWN;
1858 	ci->gadget.max_speed    = USB_SPEED_HIGH;
1859 	ci->gadget.name         = ci->platdata->name;
1860 	ci->gadget.otg_caps	= otg_caps;
1861 
1862 	if (ci->is_otg && (otg_caps->hnp_support || otg_caps->srp_support ||
1863 						otg_caps->adp_support))
1864 		ci->gadget.is_otg = 1;
1865 
1866 	INIT_LIST_HEAD(&ci->gadget.ep_list);
1867 
1868 	/* alloc resources */
1869 	ci->qh_pool = dma_pool_create("ci_hw_qh", dev,
1870 				       sizeof(struct ci_hw_qh),
1871 				       64, CI_HDRC_PAGE_SIZE);
1872 	if (ci->qh_pool == NULL)
1873 		return -ENOMEM;
1874 
1875 	ci->td_pool = dma_pool_create("ci_hw_td", dev,
1876 				       sizeof(struct ci_hw_td),
1877 				       64, CI_HDRC_PAGE_SIZE);
1878 	if (ci->td_pool == NULL) {
1879 		retval = -ENOMEM;
1880 		goto free_qh_pool;
1881 	}
1882 
1883 	retval = init_eps(ci);
1884 	if (retval)
1885 		goto free_pools;
1886 
1887 	ci->gadget.ep0 = &ci->ep0in->ep;
1888 
1889 	retval = usb_add_gadget_udc(dev, &ci->gadget);
1890 	if (retval)
1891 		goto destroy_eps;
1892 
1893 	pm_runtime_no_callbacks(&ci->gadget.dev);
1894 	pm_runtime_enable(&ci->gadget.dev);
1895 
1896 	return retval;
1897 
1898 destroy_eps:
1899 	destroy_eps(ci);
1900 free_pools:
1901 	dma_pool_destroy(ci->td_pool);
1902 free_qh_pool:
1903 	dma_pool_destroy(ci->qh_pool);
1904 	return retval;
1905 }
1906 
1907 /**
1908  * ci_hdrc_gadget_destroy: parent remove must call this to remove UDC
1909  *
1910  * No interrupts active, the IRQ has been released
1911  */
1912 void ci_hdrc_gadget_destroy(struct ci_hdrc *ci)
1913 {
1914 	if (!ci->roles[CI_ROLE_GADGET])
1915 		return;
1916 
1917 	usb_del_gadget_udc(&ci->gadget);
1918 
1919 	destroy_eps(ci);
1920 
1921 	dma_pool_destroy(ci->td_pool);
1922 	dma_pool_destroy(ci->qh_pool);
1923 }
1924 
1925 static int udc_id_switch_for_device(struct ci_hdrc *ci)
1926 {
1927 	if (ci->is_otg)
1928 		/* Clear and enable BSV irq */
1929 		hw_write_otgsc(ci, OTGSC_BSVIS | OTGSC_BSVIE,
1930 					OTGSC_BSVIS | OTGSC_BSVIE);
1931 
1932 	return 0;
1933 }
1934 
1935 static void udc_id_switch_for_host(struct ci_hdrc *ci)
1936 {
1937 	/*
1938 	 * host doesn't care B_SESSION_VALID event
1939 	 * so clear and disbale BSV irq
1940 	 */
1941 	if (ci->is_otg)
1942 		hw_write_otgsc(ci, OTGSC_BSVIE | OTGSC_BSVIS, OTGSC_BSVIS);
1943 }
1944 
1945 /**
1946  * ci_hdrc_gadget_init - initialize device related bits
1947  * ci: the controller
1948  *
1949  * This function initializes the gadget, if the device is "device capable".
1950  */
1951 int ci_hdrc_gadget_init(struct ci_hdrc *ci)
1952 {
1953 	struct ci_role_driver *rdrv;
1954 
1955 	if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC))
1956 		return -ENXIO;
1957 
1958 	rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL);
1959 	if (!rdrv)
1960 		return -ENOMEM;
1961 
1962 	rdrv->start	= udc_id_switch_for_device;
1963 	rdrv->stop	= udc_id_switch_for_host;
1964 	rdrv->irq	= udc_irq;
1965 	rdrv->name	= "gadget";
1966 	ci->roles[CI_ROLE_GADGET] = rdrv;
1967 
1968 	return udc_start(ci);
1969 }
1970