xref: /openbmc/linux/drivers/usb/chipidea/host.c (revision ff2c8252)
1 /*
2  * host.c - ChipIdea USB host controller driver
3  *
4  * Copyright (c) 2012 Intel Corporation
5  *
6  * Author: Alexander Shishkin
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20  */
21 
22 #include <linux/kernel.h>
23 #include <linux/io.h>
24 #include <linux/usb.h>
25 #include <linux/usb/hcd.h>
26 #include <linux/usb/chipidea.h>
27 #include <linux/regulator/consumer.h>
28 
29 #include "../host/ehci.h"
30 
31 #include "ci.h"
32 #include "bits.h"
33 #include "host.h"
34 
35 static struct hc_driver __read_mostly ci_ehci_hc_driver;
36 static int (*orig_bus_suspend)(struct usb_hcd *hcd);
37 
38 struct ehci_ci_priv {
39 	struct regulator *reg_vbus;
40 };
41 
42 static int ehci_ci_portpower(struct usb_hcd *hcd, int portnum, bool enable)
43 {
44 	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
45 	struct ehci_ci_priv *priv = (struct ehci_ci_priv *)ehci->priv;
46 	struct device *dev = hcd->self.controller;
47 	struct ci_hdrc *ci = dev_get_drvdata(dev);
48 	int ret = 0;
49 	int port = HCS_N_PORTS(ehci->hcs_params);
50 
51 	if (priv->reg_vbus) {
52 		if (port > 1) {
53 			dev_warn(dev,
54 				"Not support multi-port regulator control\n");
55 			return 0;
56 		}
57 		if (enable)
58 			ret = regulator_enable(priv->reg_vbus);
59 		else
60 			ret = regulator_disable(priv->reg_vbus);
61 		if (ret) {
62 			dev_err(dev,
63 				"Failed to %s vbus regulator, ret=%d\n",
64 				enable ? "enable" : "disable", ret);
65 			return ret;
66 		}
67 	}
68 
69 	if (enable && (ci->platdata->phy_mode == USBPHY_INTERFACE_MODE_HSIC)) {
70 		/*
71 		 * Marvell 28nm HSIC PHY requires forcing the port to HS mode.
72 		 * As HSIC is always HS, this should be safe for others.
73 		 */
74 		hw_port_test_set(ci, 5);
75 		hw_port_test_set(ci, 0);
76 	}
77 	return 0;
78 };
79 
80 static int ehci_ci_reset(struct usb_hcd *hcd)
81 {
82 	struct device *dev = hcd->self.controller;
83 	struct ci_hdrc *ci = dev_get_drvdata(dev);
84 	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
85 	int ret;
86 
87 	ret = ehci_setup(hcd);
88 	if (ret)
89 		return ret;
90 
91 	ehci->need_io_watchdog = 0;
92 
93 	if (ci->platdata->notify_event) {
94 		ret = ci->platdata->notify_event(ci,
95 				CI_HDRC_CONTROLLER_RESET_EVENT);
96 		if (ret)
97 			return ret;
98 	}
99 
100 	ci_platform_configure(ci);
101 
102 	return ret;
103 }
104 
105 static const struct ehci_driver_overrides ehci_ci_overrides = {
106 	.extra_priv_size = sizeof(struct ehci_ci_priv),
107 	.port_power	 = ehci_ci_portpower,
108 	.reset		 = ehci_ci_reset,
109 };
110 
111 static irqreturn_t host_irq(struct ci_hdrc *ci)
112 {
113 	return usb_hcd_irq(ci->irq, ci->hcd);
114 }
115 
116 static int host_start(struct ci_hdrc *ci)
117 {
118 	struct usb_hcd *hcd;
119 	struct ehci_hcd *ehci;
120 	struct ehci_ci_priv *priv;
121 	int ret;
122 
123 	if (usb_disabled())
124 		return -ENODEV;
125 
126 	hcd = __usb_create_hcd(&ci_ehci_hc_driver, ci->dev->parent,
127 			       ci->dev, dev_name(ci->dev), NULL);
128 	if (!hcd)
129 		return -ENOMEM;
130 
131 	dev_set_drvdata(ci->dev, ci);
132 	hcd->rsrc_start = ci->hw_bank.phys;
133 	hcd->rsrc_len = ci->hw_bank.size;
134 	hcd->regs = ci->hw_bank.abs;
135 	hcd->has_tt = 1;
136 
137 	hcd->power_budget = ci->platdata->power_budget;
138 	hcd->tpl_support = ci->platdata->tpl_support;
139 	if (ci->phy)
140 		hcd->phy = ci->phy;
141 	else
142 		hcd->usb_phy = ci->usb_phy;
143 
144 	ehci = hcd_to_ehci(hcd);
145 	ehci->caps = ci->hw_bank.cap;
146 	ehci->has_hostpc = ci->hw_bank.lpm;
147 	ehci->has_tdi_phy_lpm = ci->hw_bank.lpm;
148 	ehci->imx28_write_fix = ci->imx28_write_fix;
149 
150 	priv = (struct ehci_ci_priv *)ehci->priv;
151 	priv->reg_vbus = NULL;
152 
153 	if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci)) {
154 		if (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON) {
155 			ret = regulator_enable(ci->platdata->reg_vbus);
156 			if (ret) {
157 				dev_err(ci->dev,
158 				"Failed to enable vbus regulator, ret=%d\n",
159 									ret);
160 				goto put_hcd;
161 			}
162 		} else {
163 			priv->reg_vbus = ci->platdata->reg_vbus;
164 		}
165 	}
166 
167 	ret = usb_add_hcd(hcd, 0, 0);
168 	if (ret) {
169 		goto disable_reg;
170 	} else {
171 		struct usb_otg *otg = &ci->otg;
172 
173 		ci->hcd = hcd;
174 
175 		if (ci_otg_is_fsm_mode(ci)) {
176 			otg->host = &hcd->self;
177 			hcd->self.otg_port = 1;
178 		}
179 	}
180 
181 	return ret;
182 
183 disable_reg:
184 	if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) &&
185 			(ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON))
186 		regulator_disable(ci->platdata->reg_vbus);
187 put_hcd:
188 	usb_put_hcd(hcd);
189 
190 	return ret;
191 }
192 
193 static void host_stop(struct ci_hdrc *ci)
194 {
195 	struct usb_hcd *hcd = ci->hcd;
196 
197 	if (hcd) {
198 		if (ci->platdata->notify_event)
199 			ci->platdata->notify_event(ci,
200 				CI_HDRC_CONTROLLER_STOPPED_EVENT);
201 		usb_remove_hcd(hcd);
202 		ci->role = CI_ROLE_END;
203 		synchronize_irq(ci->irq);
204 		usb_put_hcd(hcd);
205 		if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) &&
206 			(ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON))
207 				regulator_disable(ci->platdata->reg_vbus);
208 	}
209 	ci->hcd = NULL;
210 	ci->otg.host = NULL;
211 }
212 
213 
214 void ci_hdrc_host_destroy(struct ci_hdrc *ci)
215 {
216 	if (ci->role == CI_ROLE_HOST && ci->hcd)
217 		host_stop(ci);
218 }
219 
220 static int ci_ehci_bus_suspend(struct usb_hcd *hcd)
221 {
222 	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
223 	int port;
224 	u32 tmp;
225 
226 	int ret = orig_bus_suspend(hcd);
227 
228 	if (ret)
229 		return ret;
230 
231 	port = HCS_N_PORTS(ehci->hcs_params);
232 	while (port--) {
233 		u32 __iomem *reg = &ehci->regs->port_status[port];
234 		u32 portsc = ehci_readl(ehci, reg);
235 
236 		if (portsc & PORT_CONNECT) {
237 			/*
238 			 * For chipidea, the resume signal will be ended
239 			 * automatically, so for remote wakeup case, the
240 			 * usbcmd.rs may not be set before the resume has
241 			 * ended if other resume paths consumes too much
242 			 * time (~24ms), in that case, the SOF will not
243 			 * send out within 3ms after resume ends, then the
244 			 * high speed device will enter full speed mode.
245 			 */
246 
247 			tmp = ehci_readl(ehci, &ehci->regs->command);
248 			tmp |= CMD_RUN;
249 			ehci_writel(ehci, tmp, &ehci->regs->command);
250 			/*
251 			 * It needs a short delay between set RS bit and PHCD.
252 			 */
253 			usleep_range(150, 200);
254 			break;
255 		}
256 	}
257 
258 	return 0;
259 }
260 
261 int ci_hdrc_host_init(struct ci_hdrc *ci)
262 {
263 	struct ci_role_driver *rdrv;
264 
265 	if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_HC))
266 		return -ENXIO;
267 
268 	rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL);
269 	if (!rdrv)
270 		return -ENOMEM;
271 
272 	rdrv->start	= host_start;
273 	rdrv->stop	= host_stop;
274 	rdrv->irq	= host_irq;
275 	rdrv->name	= "host";
276 	ci->roles[CI_ROLE_HOST] = rdrv;
277 
278 	return 0;
279 }
280 
281 void ci_hdrc_host_driver_init(void)
282 {
283 	ehci_init_driver(&ci_ehci_hc_driver, &ehci_ci_overrides);
284 	orig_bus_suspend = ci_ehci_hc_driver.bus_suspend;
285 	ci_ehci_hc_driver.bus_suspend = ci_ehci_bus_suspend;
286 }
287