1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * host.c - ChipIdea USB host controller driver 4 * 5 * Copyright (c) 2012 Intel Corporation 6 * 7 * Author: Alexander Shishkin 8 */ 9 10 #include <linux/kernel.h> 11 #include <linux/io.h> 12 #include <linux/usb.h> 13 #include <linux/usb/hcd.h> 14 #include <linux/usb/chipidea.h> 15 #include <linux/regulator/consumer.h> 16 #include <linux/pinctrl/consumer.h> 17 18 #include "../host/ehci.h" 19 20 #include "ci.h" 21 #include "bits.h" 22 #include "host.h" 23 24 static struct hc_driver __read_mostly ci_ehci_hc_driver; 25 static int (*orig_bus_suspend)(struct usb_hcd *hcd); 26 27 struct ehci_ci_priv { 28 struct regulator *reg_vbus; 29 bool enabled; 30 }; 31 32 struct ci_hdrc_dma_aligned_buffer { 33 void *kmalloc_ptr; 34 void *old_xfer_buffer; 35 u8 data[]; 36 }; 37 38 static int ehci_ci_portpower(struct usb_hcd *hcd, int portnum, bool enable) 39 { 40 struct ehci_hcd *ehci = hcd_to_ehci(hcd); 41 struct ehci_ci_priv *priv = (struct ehci_ci_priv *)ehci->priv; 42 struct device *dev = hcd->self.controller; 43 struct ci_hdrc *ci = dev_get_drvdata(dev); 44 int ret = 0; 45 int port = HCS_N_PORTS(ehci->hcs_params); 46 47 if (priv->reg_vbus && enable != priv->enabled) { 48 if (port > 1) { 49 dev_warn(dev, 50 "Not support multi-port regulator control\n"); 51 return 0; 52 } 53 if (enable) 54 ret = regulator_enable(priv->reg_vbus); 55 else 56 ret = regulator_disable(priv->reg_vbus); 57 if (ret) { 58 dev_err(dev, 59 "Failed to %s vbus regulator, ret=%d\n", 60 enable ? "enable" : "disable", ret); 61 return ret; 62 } 63 priv->enabled = enable; 64 } 65 66 if (ci->platdata->flags & CI_HDRC_PHY_VBUS_CONTROL) { 67 if (enable) 68 usb_phy_vbus_on(ci->usb_phy); 69 else 70 usb_phy_vbus_off(ci->usb_phy); 71 } 72 73 if (enable && (ci->platdata->phy_mode == USBPHY_INTERFACE_MODE_HSIC)) { 74 /* 75 * Marvell 28nm HSIC PHY requires forcing the port to HS mode. 76 * As HSIC is always HS, this should be safe for others. 77 */ 78 hw_port_test_set(ci, 5); 79 hw_port_test_set(ci, 0); 80 } 81 return 0; 82 }; 83 84 static int ehci_ci_reset(struct usb_hcd *hcd) 85 { 86 struct device *dev = hcd->self.controller; 87 struct ci_hdrc *ci = dev_get_drvdata(dev); 88 struct ehci_hcd *ehci = hcd_to_ehci(hcd); 89 int ret; 90 91 ret = ehci_setup(hcd); 92 if (ret) 93 return ret; 94 95 ehci->need_io_watchdog = 0; 96 97 if (ci->platdata->notify_event) { 98 ret = ci->platdata->notify_event(ci, 99 CI_HDRC_CONTROLLER_RESET_EVENT); 100 if (ret) 101 return ret; 102 } 103 104 ci_platform_configure(ci); 105 106 return ret; 107 } 108 109 static const struct ehci_driver_overrides ehci_ci_overrides = { 110 .extra_priv_size = sizeof(struct ehci_ci_priv), 111 .port_power = ehci_ci_portpower, 112 .reset = ehci_ci_reset, 113 }; 114 115 static irqreturn_t host_irq(struct ci_hdrc *ci) 116 { 117 return usb_hcd_irq(ci->irq, ci->hcd); 118 } 119 120 static int host_start(struct ci_hdrc *ci) 121 { 122 struct usb_hcd *hcd; 123 struct ehci_hcd *ehci; 124 struct ehci_ci_priv *priv; 125 int ret; 126 127 if (usb_disabled()) 128 return -ENODEV; 129 130 hcd = __usb_create_hcd(&ci_ehci_hc_driver, ci->dev->parent, 131 ci->dev, dev_name(ci->dev), NULL); 132 if (!hcd) 133 return -ENOMEM; 134 135 dev_set_drvdata(ci->dev, ci); 136 hcd->rsrc_start = ci->hw_bank.phys; 137 hcd->rsrc_len = ci->hw_bank.size; 138 hcd->regs = ci->hw_bank.abs; 139 hcd->has_tt = 1; 140 141 hcd->power_budget = ci->platdata->power_budget; 142 hcd->tpl_support = ci->platdata->tpl_support; 143 if (ci->phy || ci->usb_phy) { 144 hcd->skip_phy_initialization = 1; 145 if (ci->usb_phy) 146 hcd->usb_phy = ci->usb_phy; 147 } 148 149 ehci = hcd_to_ehci(hcd); 150 ehci->caps = ci->hw_bank.cap; 151 ehci->has_hostpc = ci->hw_bank.lpm; 152 ehci->has_tdi_phy_lpm = ci->hw_bank.lpm; 153 ehci->imx28_write_fix = ci->imx28_write_fix; 154 155 priv = (struct ehci_ci_priv *)ehci->priv; 156 priv->reg_vbus = NULL; 157 158 if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci)) { 159 if (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON) { 160 ret = regulator_enable(ci->platdata->reg_vbus); 161 if (ret) { 162 dev_err(ci->dev, 163 "Failed to enable vbus regulator, ret=%d\n", 164 ret); 165 goto put_hcd; 166 } 167 } else { 168 priv->reg_vbus = ci->platdata->reg_vbus; 169 } 170 } 171 172 if (ci->platdata->pins_host) 173 pinctrl_select_state(ci->platdata->pctl, 174 ci->platdata->pins_host); 175 176 ci->hcd = hcd; 177 178 ret = usb_add_hcd(hcd, 0, 0); 179 if (ret) { 180 ci->hcd = NULL; 181 goto disable_reg; 182 } else { 183 struct usb_otg *otg = &ci->otg; 184 185 if (ci_otg_is_fsm_mode(ci)) { 186 otg->host = &hcd->self; 187 hcd->self.otg_port = 1; 188 } 189 190 if (ci->platdata->notify_event && 191 (ci->platdata->flags & CI_HDRC_IMX_IS_HSIC)) 192 ci->platdata->notify_event 193 (ci, CI_HDRC_IMX_HSIC_ACTIVE_EVENT); 194 } 195 196 return ret; 197 198 disable_reg: 199 if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) && 200 (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON)) 201 regulator_disable(ci->platdata->reg_vbus); 202 put_hcd: 203 usb_put_hcd(hcd); 204 205 return ret; 206 } 207 208 static void host_stop(struct ci_hdrc *ci) 209 { 210 struct usb_hcd *hcd = ci->hcd; 211 212 if (hcd) { 213 if (ci->platdata->notify_event) 214 ci->platdata->notify_event(ci, 215 CI_HDRC_CONTROLLER_STOPPED_EVENT); 216 usb_remove_hcd(hcd); 217 ci->role = CI_ROLE_END; 218 synchronize_irq(ci->irq); 219 usb_put_hcd(hcd); 220 if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) && 221 (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON)) 222 regulator_disable(ci->platdata->reg_vbus); 223 } 224 ci->hcd = NULL; 225 ci->otg.host = NULL; 226 227 if (ci->platdata->pins_host && ci->platdata->pins_default) 228 pinctrl_select_state(ci->platdata->pctl, 229 ci->platdata->pins_default); 230 } 231 232 233 void ci_hdrc_host_destroy(struct ci_hdrc *ci) 234 { 235 if (ci->role == CI_ROLE_HOST && ci->hcd) 236 host_stop(ci); 237 } 238 239 /* The below code is based on tegra ehci driver */ 240 static int ci_ehci_hub_control( 241 struct usb_hcd *hcd, 242 u16 typeReq, 243 u16 wValue, 244 u16 wIndex, 245 char *buf, 246 u16 wLength 247 ) 248 { 249 struct ehci_hcd *ehci = hcd_to_ehci(hcd); 250 unsigned int ports = HCS_N_PORTS(ehci->hcs_params); 251 u32 __iomem *status_reg; 252 u32 temp, port_index; 253 unsigned long flags; 254 int retval = 0; 255 bool done = false; 256 struct device *dev = hcd->self.controller; 257 struct ci_hdrc *ci = dev_get_drvdata(dev); 258 259 port_index = wIndex & 0xff; 260 port_index -= (port_index > 0); 261 status_reg = &ehci->regs->port_status[port_index]; 262 263 spin_lock_irqsave(&ehci->lock, flags); 264 265 if (ci->platdata->hub_control) { 266 retval = ci->platdata->hub_control(ci, typeReq, wValue, wIndex, 267 buf, wLength, &done, &flags); 268 if (done) 269 goto done; 270 } 271 272 if (typeReq == SetPortFeature && wValue == USB_PORT_FEAT_SUSPEND) { 273 if (!wIndex || wIndex > ports) { 274 retval = -EPIPE; 275 goto done; 276 } 277 278 temp = ehci_readl(ehci, status_reg); 279 if ((temp & PORT_PE) == 0 || (temp & PORT_RESET) != 0) { 280 retval = -EPIPE; 281 goto done; 282 } 283 284 temp &= ~(PORT_RWC_BITS | PORT_WKCONN_E); 285 temp |= PORT_WKDISC_E | PORT_WKOC_E; 286 ehci_writel(ehci, temp | PORT_SUSPEND, status_reg); 287 288 /* 289 * If a transaction is in progress, there may be a delay in 290 * suspending the port. Poll until the port is suspended. 291 */ 292 if (ehci_handshake(ehci, status_reg, PORT_SUSPEND, 293 PORT_SUSPEND, 5000)) 294 ehci_err(ehci, "timeout waiting for SUSPEND\n"); 295 296 if (ci->platdata->flags & CI_HDRC_IMX_IS_HSIC) { 297 if (ci->platdata->notify_event) 298 ci->platdata->notify_event(ci, 299 CI_HDRC_IMX_HSIC_SUSPEND_EVENT); 300 301 temp = ehci_readl(ehci, status_reg); 302 temp &= ~(PORT_WKDISC_E | PORT_WKCONN_E); 303 ehci_writel(ehci, temp, status_reg); 304 } 305 306 set_bit(port_index, &ehci->suspended_ports); 307 goto done; 308 } 309 310 /* 311 * After resume has finished, it needs do some post resume 312 * operation for some SoCs. 313 */ 314 else if (typeReq == ClearPortFeature && 315 wValue == USB_PORT_FEAT_C_SUSPEND) { 316 /* Make sure the resume has finished, it should be finished */ 317 if (ehci_handshake(ehci, status_reg, PORT_RESUME, 0, 25000)) 318 ehci_err(ehci, "timeout waiting for resume\n"); 319 } 320 321 spin_unlock_irqrestore(&ehci->lock, flags); 322 323 /* Handle the hub control events here */ 324 return ehci_hub_control(hcd, typeReq, wValue, wIndex, buf, wLength); 325 done: 326 spin_unlock_irqrestore(&ehci->lock, flags); 327 return retval; 328 } 329 static int ci_ehci_bus_suspend(struct usb_hcd *hcd) 330 { 331 struct ehci_hcd *ehci = hcd_to_ehci(hcd); 332 struct device *dev = hcd->self.controller; 333 struct ci_hdrc *ci = dev_get_drvdata(dev); 334 int port; 335 u32 tmp; 336 337 int ret = orig_bus_suspend(hcd); 338 339 if (ret) 340 return ret; 341 342 port = HCS_N_PORTS(ehci->hcs_params); 343 while (port--) { 344 u32 __iomem *reg = &ehci->regs->port_status[port]; 345 u32 portsc = ehci_readl(ehci, reg); 346 347 if (portsc & PORT_CONNECT) { 348 /* 349 * For chipidea, the resume signal will be ended 350 * automatically, so for remote wakeup case, the 351 * usbcmd.rs may not be set before the resume has 352 * ended if other resume paths consumes too much 353 * time (~24ms), in that case, the SOF will not 354 * send out within 3ms after resume ends, then the 355 * high speed device will enter full speed mode. 356 */ 357 358 tmp = ehci_readl(ehci, &ehci->regs->command); 359 tmp |= CMD_RUN; 360 ehci_writel(ehci, tmp, &ehci->regs->command); 361 /* 362 * It needs a short delay between set RS bit and PHCD. 363 */ 364 usleep_range(150, 200); 365 /* 366 * Need to clear WKCN and WKOC for imx HSIC, 367 * otherwise, there will be wakeup event. 368 */ 369 if (ci->platdata->flags & CI_HDRC_IMX_IS_HSIC) { 370 tmp = ehci_readl(ehci, reg); 371 tmp &= ~(PORT_WKDISC_E | PORT_WKCONN_E); 372 ehci_writel(ehci, tmp, reg); 373 } 374 375 break; 376 } 377 } 378 379 return 0; 380 } 381 382 static void ci_hdrc_free_dma_aligned_buffer(struct urb *urb) 383 { 384 struct ci_hdrc_dma_aligned_buffer *temp; 385 size_t length; 386 387 if (!(urb->transfer_flags & URB_ALIGNED_TEMP_BUFFER)) 388 return; 389 390 temp = container_of(urb->transfer_buffer, 391 struct ci_hdrc_dma_aligned_buffer, data); 392 393 if (usb_urb_dir_in(urb)) { 394 if (usb_pipeisoc(urb->pipe)) 395 length = urb->transfer_buffer_length; 396 else 397 length = urb->actual_length; 398 399 memcpy(temp->old_xfer_buffer, temp->data, length); 400 } 401 urb->transfer_buffer = temp->old_xfer_buffer; 402 kfree(temp->kmalloc_ptr); 403 404 urb->transfer_flags &= ~URB_ALIGNED_TEMP_BUFFER; 405 } 406 407 static int ci_hdrc_alloc_dma_aligned_buffer(struct urb *urb, gfp_t mem_flags) 408 { 409 struct ci_hdrc_dma_aligned_buffer *temp, *kmalloc_ptr; 410 const unsigned int ci_hdrc_usb_dma_align = 32; 411 size_t kmalloc_size; 412 413 if (urb->num_sgs || urb->sg || urb->transfer_buffer_length == 0 || 414 !((uintptr_t)urb->transfer_buffer & (ci_hdrc_usb_dma_align - 1))) 415 return 0; 416 417 /* Allocate a buffer with enough padding for alignment */ 418 kmalloc_size = urb->transfer_buffer_length + 419 sizeof(struct ci_hdrc_dma_aligned_buffer) + 420 ci_hdrc_usb_dma_align - 1; 421 422 kmalloc_ptr = kmalloc(kmalloc_size, mem_flags); 423 if (!kmalloc_ptr) 424 return -ENOMEM; 425 426 /* Position our struct dma_aligned_buffer such that data is aligned */ 427 temp = PTR_ALIGN(kmalloc_ptr + 1, ci_hdrc_usb_dma_align) - 1; 428 temp->kmalloc_ptr = kmalloc_ptr; 429 temp->old_xfer_buffer = urb->transfer_buffer; 430 if (usb_urb_dir_out(urb)) 431 memcpy(temp->data, urb->transfer_buffer, 432 urb->transfer_buffer_length); 433 urb->transfer_buffer = temp->data; 434 435 urb->transfer_flags |= URB_ALIGNED_TEMP_BUFFER; 436 437 return 0; 438 } 439 440 static int ci_hdrc_map_urb_for_dma(struct usb_hcd *hcd, struct urb *urb, 441 gfp_t mem_flags) 442 { 443 int ret; 444 445 ret = ci_hdrc_alloc_dma_aligned_buffer(urb, mem_flags); 446 if (ret) 447 return ret; 448 449 ret = usb_hcd_map_urb_for_dma(hcd, urb, mem_flags); 450 if (ret) 451 ci_hdrc_free_dma_aligned_buffer(urb); 452 453 return ret; 454 } 455 456 static void ci_hdrc_unmap_urb_for_dma(struct usb_hcd *hcd, struct urb *urb) 457 { 458 usb_hcd_unmap_urb_for_dma(hcd, urb); 459 ci_hdrc_free_dma_aligned_buffer(urb); 460 } 461 462 #ifdef CONFIG_PM_SLEEP 463 static void ci_hdrc_host_suspend(struct ci_hdrc *ci) 464 { 465 ehci_suspend(ci->hcd, device_may_wakeup(ci->dev)); 466 } 467 468 static void ci_hdrc_host_resume(struct ci_hdrc *ci, bool power_lost) 469 { 470 ehci_resume(ci->hcd, power_lost); 471 } 472 #endif 473 474 int ci_hdrc_host_init(struct ci_hdrc *ci) 475 { 476 struct ci_role_driver *rdrv; 477 478 if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_HC)) 479 return -ENXIO; 480 481 rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL); 482 if (!rdrv) 483 return -ENOMEM; 484 485 rdrv->start = host_start; 486 rdrv->stop = host_stop; 487 #ifdef CONFIG_PM_SLEEP 488 rdrv->suspend = ci_hdrc_host_suspend; 489 rdrv->resume = ci_hdrc_host_resume; 490 #endif 491 rdrv->irq = host_irq; 492 rdrv->name = "host"; 493 ci->roles[CI_ROLE_HOST] = rdrv; 494 495 if (ci->platdata->flags & CI_HDRC_REQUIRES_ALIGNED_DMA) { 496 ci_ehci_hc_driver.map_urb_for_dma = ci_hdrc_map_urb_for_dma; 497 ci_ehci_hc_driver.unmap_urb_for_dma = ci_hdrc_unmap_urb_for_dma; 498 } 499 500 return 0; 501 } 502 503 void ci_hdrc_host_driver_init(void) 504 { 505 ehci_init_driver(&ci_ehci_hc_driver, &ehci_ci_overrides); 506 orig_bus_suspend = ci_ehci_hc_driver.bus_suspend; 507 ci_ehci_hc_driver.bus_suspend = ci_ehci_bus_suspend; 508 ci_ehci_hc_driver.hub_control = ci_ehci_hub_control; 509 } 510