xref: /openbmc/linux/drivers/usb/chipidea/host.c (revision b4a6aaea)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * host.c - ChipIdea USB host controller driver
4  *
5  * Copyright (c) 2012 Intel Corporation
6  *
7  * Author: Alexander Shishkin
8  */
9 
10 #include <linux/kernel.h>
11 #include <linux/io.h>
12 #include <linux/usb.h>
13 #include <linux/usb/hcd.h>
14 #include <linux/usb/chipidea.h>
15 #include <linux/regulator/consumer.h>
16 #include <linux/pinctrl/consumer.h>
17 
18 #include "../host/ehci.h"
19 
20 #include "ci.h"
21 #include "bits.h"
22 #include "host.h"
23 
24 static struct hc_driver __read_mostly ci_ehci_hc_driver;
25 static int (*orig_bus_suspend)(struct usb_hcd *hcd);
26 
27 struct ehci_ci_priv {
28 	struct regulator *reg_vbus;
29 	bool enabled;
30 };
31 
32 struct ci_hdrc_dma_aligned_buffer {
33 	void *kmalloc_ptr;
34 	void *old_xfer_buffer;
35 	u8 data[];
36 };
37 
38 static int ehci_ci_portpower(struct usb_hcd *hcd, int portnum, bool enable)
39 {
40 	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
41 	struct ehci_ci_priv *priv = (struct ehci_ci_priv *)ehci->priv;
42 	struct device *dev = hcd->self.controller;
43 	struct ci_hdrc *ci = dev_get_drvdata(dev);
44 	int ret = 0;
45 	int port = HCS_N_PORTS(ehci->hcs_params);
46 
47 	if (priv->reg_vbus && enable != priv->enabled) {
48 		if (port > 1) {
49 			dev_warn(dev,
50 				"Not support multi-port regulator control\n");
51 			return 0;
52 		}
53 		if (enable)
54 			ret = regulator_enable(priv->reg_vbus);
55 		else
56 			ret = regulator_disable(priv->reg_vbus);
57 		if (ret) {
58 			dev_err(dev,
59 				"Failed to %s vbus regulator, ret=%d\n",
60 				enable ? "enable" : "disable", ret);
61 			return ret;
62 		}
63 		priv->enabled = enable;
64 	}
65 
66 	if (enable && (ci->platdata->phy_mode == USBPHY_INTERFACE_MODE_HSIC)) {
67 		/*
68 		 * Marvell 28nm HSIC PHY requires forcing the port to HS mode.
69 		 * As HSIC is always HS, this should be safe for others.
70 		 */
71 		hw_port_test_set(ci, 5);
72 		hw_port_test_set(ci, 0);
73 	}
74 	return 0;
75 };
76 
77 static int ehci_ci_reset(struct usb_hcd *hcd)
78 {
79 	struct device *dev = hcd->self.controller;
80 	struct ci_hdrc *ci = dev_get_drvdata(dev);
81 	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
82 	int ret;
83 
84 	ret = ehci_setup(hcd);
85 	if (ret)
86 		return ret;
87 
88 	ehci->need_io_watchdog = 0;
89 
90 	if (ci->platdata->notify_event) {
91 		ret = ci->platdata->notify_event(ci,
92 				CI_HDRC_CONTROLLER_RESET_EVENT);
93 		if (ret)
94 			return ret;
95 	}
96 
97 	ci_platform_configure(ci);
98 
99 	return ret;
100 }
101 
102 static const struct ehci_driver_overrides ehci_ci_overrides = {
103 	.extra_priv_size = sizeof(struct ehci_ci_priv),
104 	.port_power	 = ehci_ci_portpower,
105 	.reset		 = ehci_ci_reset,
106 };
107 
108 static irqreturn_t host_irq(struct ci_hdrc *ci)
109 {
110 	return usb_hcd_irq(ci->irq, ci->hcd);
111 }
112 
113 static int host_start(struct ci_hdrc *ci)
114 {
115 	struct usb_hcd *hcd;
116 	struct ehci_hcd *ehci;
117 	struct ehci_ci_priv *priv;
118 	int ret;
119 
120 	if (usb_disabled())
121 		return -ENODEV;
122 
123 	hcd = __usb_create_hcd(&ci_ehci_hc_driver, ci->dev->parent,
124 			       ci->dev, dev_name(ci->dev), NULL);
125 	if (!hcd)
126 		return -ENOMEM;
127 
128 	dev_set_drvdata(ci->dev, ci);
129 	hcd->rsrc_start = ci->hw_bank.phys;
130 	hcd->rsrc_len = ci->hw_bank.size;
131 	hcd->regs = ci->hw_bank.abs;
132 	hcd->has_tt = 1;
133 
134 	hcd->power_budget = ci->platdata->power_budget;
135 	hcd->tpl_support = ci->platdata->tpl_support;
136 	if (ci->phy || ci->usb_phy) {
137 		hcd->skip_phy_initialization = 1;
138 		if (ci->usb_phy)
139 			hcd->usb_phy = ci->usb_phy;
140 	}
141 
142 	ehci = hcd_to_ehci(hcd);
143 	ehci->caps = ci->hw_bank.cap;
144 	ehci->has_hostpc = ci->hw_bank.lpm;
145 	ehci->has_tdi_phy_lpm = ci->hw_bank.lpm;
146 	ehci->imx28_write_fix = ci->imx28_write_fix;
147 
148 	priv = (struct ehci_ci_priv *)ehci->priv;
149 	priv->reg_vbus = NULL;
150 
151 	if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci)) {
152 		if (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON) {
153 			ret = regulator_enable(ci->platdata->reg_vbus);
154 			if (ret) {
155 				dev_err(ci->dev,
156 				"Failed to enable vbus regulator, ret=%d\n",
157 									ret);
158 				goto put_hcd;
159 			}
160 		} else {
161 			priv->reg_vbus = ci->platdata->reg_vbus;
162 		}
163 	}
164 
165 	if (ci->platdata->pins_host)
166 		pinctrl_select_state(ci->platdata->pctl,
167 				     ci->platdata->pins_host);
168 
169 	ci->hcd = hcd;
170 
171 	ret = usb_add_hcd(hcd, 0, 0);
172 	if (ret) {
173 		ci->hcd = NULL;
174 		goto disable_reg;
175 	} else {
176 		struct usb_otg *otg = &ci->otg;
177 
178 		if (ci_otg_is_fsm_mode(ci)) {
179 			otg->host = &hcd->self;
180 			hcd->self.otg_port = 1;
181 		}
182 
183 		if (ci->platdata->notify_event &&
184 			(ci->platdata->flags & CI_HDRC_IMX_IS_HSIC))
185 			ci->platdata->notify_event
186 				(ci, CI_HDRC_IMX_HSIC_ACTIVE_EVENT);
187 	}
188 
189 	return ret;
190 
191 disable_reg:
192 	if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) &&
193 			(ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON))
194 		regulator_disable(ci->platdata->reg_vbus);
195 put_hcd:
196 	usb_put_hcd(hcd);
197 
198 	return ret;
199 }
200 
201 static void host_stop(struct ci_hdrc *ci)
202 {
203 	struct usb_hcd *hcd = ci->hcd;
204 
205 	if (hcd) {
206 		if (ci->platdata->notify_event)
207 			ci->platdata->notify_event(ci,
208 				CI_HDRC_CONTROLLER_STOPPED_EVENT);
209 		usb_remove_hcd(hcd);
210 		ci->role = CI_ROLE_END;
211 		synchronize_irq(ci->irq);
212 		usb_put_hcd(hcd);
213 		if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) &&
214 			(ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON))
215 				regulator_disable(ci->platdata->reg_vbus);
216 	}
217 	ci->hcd = NULL;
218 	ci->otg.host = NULL;
219 
220 	if (ci->platdata->pins_host && ci->platdata->pins_default)
221 		pinctrl_select_state(ci->platdata->pctl,
222 				     ci->platdata->pins_default);
223 }
224 
225 
226 void ci_hdrc_host_destroy(struct ci_hdrc *ci)
227 {
228 	if (ci->role == CI_ROLE_HOST && ci->hcd)
229 		host_stop(ci);
230 }
231 
232 /* The below code is based on tegra ehci driver */
233 static int ci_ehci_hub_control(
234 	struct usb_hcd	*hcd,
235 	u16		typeReq,
236 	u16		wValue,
237 	u16		wIndex,
238 	char		*buf,
239 	u16		wLength
240 )
241 {
242 	struct ehci_hcd	*ehci = hcd_to_ehci(hcd);
243 	unsigned int	ports = HCS_N_PORTS(ehci->hcs_params);
244 	u32 __iomem	*status_reg;
245 	u32		temp, port_index;
246 	unsigned long	flags;
247 	int		retval = 0;
248 	bool		done = false;
249 	struct device *dev = hcd->self.controller;
250 	struct ci_hdrc *ci = dev_get_drvdata(dev);
251 
252 	port_index = wIndex & 0xff;
253 	port_index -= (port_index > 0);
254 	status_reg = &ehci->regs->port_status[port_index];
255 
256 	spin_lock_irqsave(&ehci->lock, flags);
257 
258 	if (ci->platdata->hub_control) {
259 		retval = ci->platdata->hub_control(ci, typeReq, wValue, wIndex,
260 						   buf, wLength, &done, &flags);
261 		if (done)
262 			goto done;
263 	}
264 
265 	if (typeReq == SetPortFeature && wValue == USB_PORT_FEAT_SUSPEND) {
266 		if (!wIndex || wIndex > ports) {
267 			retval = -EPIPE;
268 			goto done;
269 		}
270 
271 		temp = ehci_readl(ehci, status_reg);
272 		if ((temp & PORT_PE) == 0 || (temp & PORT_RESET) != 0) {
273 			retval = -EPIPE;
274 			goto done;
275 		}
276 
277 		temp &= ~(PORT_RWC_BITS | PORT_WKCONN_E);
278 		temp |= PORT_WKDISC_E | PORT_WKOC_E;
279 		ehci_writel(ehci, temp | PORT_SUSPEND, status_reg);
280 
281 		/*
282 		 * If a transaction is in progress, there may be a delay in
283 		 * suspending the port. Poll until the port is suspended.
284 		 */
285 		if (ehci_handshake(ehci, status_reg, PORT_SUSPEND,
286 			PORT_SUSPEND, 5000))
287 			ehci_err(ehci, "timeout waiting for SUSPEND\n");
288 
289 		if (ci->platdata->flags & CI_HDRC_IMX_IS_HSIC) {
290 			if (ci->platdata->notify_event)
291 				ci->platdata->notify_event(ci,
292 					CI_HDRC_IMX_HSIC_SUSPEND_EVENT);
293 
294 			temp = ehci_readl(ehci, status_reg);
295 			temp &= ~(PORT_WKDISC_E | PORT_WKCONN_E);
296 			ehci_writel(ehci, temp, status_reg);
297 		}
298 
299 		set_bit(port_index, &ehci->suspended_ports);
300 		goto done;
301 	}
302 
303 	/*
304 	 * After resume has finished, it needs do some post resume
305 	 * operation for some SoCs.
306 	 */
307 	else if (typeReq == ClearPortFeature &&
308 		wValue == USB_PORT_FEAT_C_SUSPEND) {
309 		/* Make sure the resume has finished, it should be finished */
310 		if (ehci_handshake(ehci, status_reg, PORT_RESUME, 0, 25000))
311 			ehci_err(ehci, "timeout waiting for resume\n");
312 	}
313 
314 	spin_unlock_irqrestore(&ehci->lock, flags);
315 
316 	/* Handle the hub control events here */
317 	return ehci_hub_control(hcd, typeReq, wValue, wIndex, buf, wLength);
318 done:
319 	spin_unlock_irqrestore(&ehci->lock, flags);
320 	return retval;
321 }
322 static int ci_ehci_bus_suspend(struct usb_hcd *hcd)
323 {
324 	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
325 	struct device *dev = hcd->self.controller;
326 	struct ci_hdrc *ci = dev_get_drvdata(dev);
327 	int port;
328 	u32 tmp;
329 
330 	int ret = orig_bus_suspend(hcd);
331 
332 	if (ret)
333 		return ret;
334 
335 	port = HCS_N_PORTS(ehci->hcs_params);
336 	while (port--) {
337 		u32 __iomem *reg = &ehci->regs->port_status[port];
338 		u32 portsc = ehci_readl(ehci, reg);
339 
340 		if (portsc & PORT_CONNECT) {
341 			/*
342 			 * For chipidea, the resume signal will be ended
343 			 * automatically, so for remote wakeup case, the
344 			 * usbcmd.rs may not be set before the resume has
345 			 * ended if other resume paths consumes too much
346 			 * time (~24ms), in that case, the SOF will not
347 			 * send out within 3ms after resume ends, then the
348 			 * high speed device will enter full speed mode.
349 			 */
350 
351 			tmp = ehci_readl(ehci, &ehci->regs->command);
352 			tmp |= CMD_RUN;
353 			ehci_writel(ehci, tmp, &ehci->regs->command);
354 			/*
355 			 * It needs a short delay between set RS bit and PHCD.
356 			 */
357 			usleep_range(150, 200);
358 			/*
359 			 * Need to clear WKCN and WKOC for imx HSIC,
360 			 * otherwise, there will be wakeup event.
361 			 */
362 			if (ci->platdata->flags & CI_HDRC_IMX_IS_HSIC) {
363 				tmp = ehci_readl(ehci, reg);
364 				tmp &= ~(PORT_WKDISC_E | PORT_WKCONN_E);
365 				ehci_writel(ehci, tmp, reg);
366 			}
367 
368 			break;
369 		}
370 	}
371 
372 	return 0;
373 }
374 
375 static void ci_hdrc_free_dma_aligned_buffer(struct urb *urb)
376 {
377 	struct ci_hdrc_dma_aligned_buffer *temp;
378 	size_t length;
379 
380 	if (!(urb->transfer_flags & URB_ALIGNED_TEMP_BUFFER))
381 		return;
382 
383 	temp = container_of(urb->transfer_buffer,
384 			    struct ci_hdrc_dma_aligned_buffer, data);
385 
386 	if (usb_urb_dir_in(urb)) {
387 		if (usb_pipeisoc(urb->pipe))
388 			length = urb->transfer_buffer_length;
389 		else
390 			length = urb->actual_length;
391 
392 		memcpy(temp->old_xfer_buffer, temp->data, length);
393 	}
394 	urb->transfer_buffer = temp->old_xfer_buffer;
395 	kfree(temp->kmalloc_ptr);
396 
397 	urb->transfer_flags &= ~URB_ALIGNED_TEMP_BUFFER;
398 }
399 
400 static int ci_hdrc_alloc_dma_aligned_buffer(struct urb *urb, gfp_t mem_flags)
401 {
402 	struct ci_hdrc_dma_aligned_buffer *temp, *kmalloc_ptr;
403 	const unsigned int ci_hdrc_usb_dma_align = 32;
404 	size_t kmalloc_size;
405 
406 	if (urb->num_sgs || urb->sg || urb->transfer_buffer_length == 0 ||
407 	    !((uintptr_t)urb->transfer_buffer & (ci_hdrc_usb_dma_align - 1)))
408 		return 0;
409 
410 	/* Allocate a buffer with enough padding for alignment */
411 	kmalloc_size = urb->transfer_buffer_length +
412 		       sizeof(struct ci_hdrc_dma_aligned_buffer) +
413 		       ci_hdrc_usb_dma_align - 1;
414 
415 	kmalloc_ptr = kmalloc(kmalloc_size, mem_flags);
416 	if (!kmalloc_ptr)
417 		return -ENOMEM;
418 
419 	/* Position our struct dma_aligned_buffer such that data is aligned */
420 	temp = PTR_ALIGN(kmalloc_ptr + 1, ci_hdrc_usb_dma_align) - 1;
421 	temp->kmalloc_ptr = kmalloc_ptr;
422 	temp->old_xfer_buffer = urb->transfer_buffer;
423 	if (usb_urb_dir_out(urb))
424 		memcpy(temp->data, urb->transfer_buffer,
425 		       urb->transfer_buffer_length);
426 	urb->transfer_buffer = temp->data;
427 
428 	urb->transfer_flags |= URB_ALIGNED_TEMP_BUFFER;
429 
430 	return 0;
431 }
432 
433 static int ci_hdrc_map_urb_for_dma(struct usb_hcd *hcd, struct urb *urb,
434 				   gfp_t mem_flags)
435 {
436 	int ret;
437 
438 	ret = ci_hdrc_alloc_dma_aligned_buffer(urb, mem_flags);
439 	if (ret)
440 		return ret;
441 
442 	ret = usb_hcd_map_urb_for_dma(hcd, urb, mem_flags);
443 	if (ret)
444 		ci_hdrc_free_dma_aligned_buffer(urb);
445 
446 	return ret;
447 }
448 
449 static void ci_hdrc_unmap_urb_for_dma(struct usb_hcd *hcd, struct urb *urb)
450 {
451 	usb_hcd_unmap_urb_for_dma(hcd, urb);
452 	ci_hdrc_free_dma_aligned_buffer(urb);
453 }
454 
455 int ci_hdrc_host_init(struct ci_hdrc *ci)
456 {
457 	struct ci_role_driver *rdrv;
458 
459 	if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_HC))
460 		return -ENXIO;
461 
462 	rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL);
463 	if (!rdrv)
464 		return -ENOMEM;
465 
466 	rdrv->start	= host_start;
467 	rdrv->stop	= host_stop;
468 	rdrv->irq	= host_irq;
469 	rdrv->name	= "host";
470 	ci->roles[CI_ROLE_HOST] = rdrv;
471 
472 	if (ci->platdata->flags & CI_HDRC_REQUIRES_ALIGNED_DMA) {
473 		ci_ehci_hc_driver.map_urb_for_dma = ci_hdrc_map_urb_for_dma;
474 		ci_ehci_hc_driver.unmap_urb_for_dma = ci_hdrc_unmap_urb_for_dma;
475 	}
476 
477 	return 0;
478 }
479 
480 void ci_hdrc_host_driver_init(void)
481 {
482 	ehci_init_driver(&ci_ehci_hc_driver, &ehci_ci_overrides);
483 	orig_bus_suspend = ci_ehci_hc_driver.bus_suspend;
484 	ci_ehci_hc_driver.bus_suspend = ci_ehci_bus_suspend;
485 	ci_ehci_hc_driver.hub_control = ci_ehci_hub_control;
486 }
487