1 /* 2 * host.c - ChipIdea USB host controller driver 3 * 4 * Copyright (c) 2012 Intel Corporation 5 * 6 * Author: Alexander Shishkin 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 20 */ 21 22 #include <linux/kernel.h> 23 #include <linux/io.h> 24 #include <linux/usb.h> 25 #include <linux/usb/hcd.h> 26 #include <linux/usb/chipidea.h> 27 #include <linux/regulator/consumer.h> 28 29 #include "../host/ehci.h" 30 31 #include "ci.h" 32 #include "bits.h" 33 #include "host.h" 34 35 static struct hc_driver __read_mostly ci_ehci_hc_driver; 36 static int (*orig_bus_suspend)(struct usb_hcd *hcd); 37 38 struct ehci_ci_priv { 39 struct regulator *reg_vbus; 40 }; 41 42 static int ehci_ci_portpower(struct usb_hcd *hcd, int portnum, bool enable) 43 { 44 struct ehci_hcd *ehci = hcd_to_ehci(hcd); 45 struct ehci_ci_priv *priv = (struct ehci_ci_priv *)ehci->priv; 46 struct device *dev = hcd->self.controller; 47 struct ci_hdrc *ci = dev_get_drvdata(dev); 48 int ret = 0; 49 int port = HCS_N_PORTS(ehci->hcs_params); 50 51 if (priv->reg_vbus) { 52 if (port > 1) { 53 dev_warn(dev, 54 "Not support multi-port regulator control\n"); 55 return 0; 56 } 57 if (enable) 58 ret = regulator_enable(priv->reg_vbus); 59 else 60 ret = regulator_disable(priv->reg_vbus); 61 if (ret) { 62 dev_err(dev, 63 "Failed to %s vbus regulator, ret=%d\n", 64 enable ? "enable" : "disable", ret); 65 return ret; 66 } 67 } 68 69 if (enable && (ci->platdata->phy_mode == USBPHY_INTERFACE_MODE_HSIC)) { 70 /* 71 * Marvell 28nm HSIC PHY requires forcing the port to HS mode. 72 * As HSIC is always HS, this should be safe for others. 73 */ 74 hw_port_test_set(ci, 5); 75 hw_port_test_set(ci, 0); 76 } 77 return 0; 78 }; 79 80 static int ehci_ci_reset(struct usb_hcd *hcd) 81 { 82 struct device *dev = hcd->self.controller; 83 struct ci_hdrc *ci = dev_get_drvdata(dev); 84 int ret; 85 86 ret = ehci_setup(hcd); 87 if (ret) 88 return ret; 89 90 ci_platform_configure(ci); 91 92 return ret; 93 } 94 95 static const struct ehci_driver_overrides ehci_ci_overrides = { 96 .extra_priv_size = sizeof(struct ehci_ci_priv), 97 .port_power = ehci_ci_portpower, 98 .reset = ehci_ci_reset, 99 }; 100 101 static irqreturn_t host_irq(struct ci_hdrc *ci) 102 { 103 return usb_hcd_irq(ci->irq, ci->hcd); 104 } 105 106 static int host_start(struct ci_hdrc *ci) 107 { 108 struct usb_hcd *hcd; 109 struct ehci_hcd *ehci; 110 struct ehci_ci_priv *priv; 111 int ret; 112 113 if (usb_disabled()) 114 return -ENODEV; 115 116 hcd = usb_create_hcd(&ci_ehci_hc_driver, ci->dev, dev_name(ci->dev)); 117 if (!hcd) 118 return -ENOMEM; 119 120 dev_set_drvdata(ci->dev, ci); 121 hcd->rsrc_start = ci->hw_bank.phys; 122 hcd->rsrc_len = ci->hw_bank.size; 123 hcd->regs = ci->hw_bank.abs; 124 hcd->has_tt = 1; 125 126 hcd->power_budget = ci->platdata->power_budget; 127 hcd->tpl_support = ci->platdata->tpl_support; 128 if (ci->phy) 129 hcd->phy = ci->phy; 130 else 131 hcd->usb_phy = ci->usb_phy; 132 133 ehci = hcd_to_ehci(hcd); 134 ehci->caps = ci->hw_bank.cap; 135 ehci->has_hostpc = ci->hw_bank.lpm; 136 ehci->has_tdi_phy_lpm = ci->hw_bank.lpm; 137 ehci->imx28_write_fix = ci->imx28_write_fix; 138 139 priv = (struct ehci_ci_priv *)ehci->priv; 140 priv->reg_vbus = NULL; 141 142 if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci)) { 143 if (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON) { 144 ret = regulator_enable(ci->platdata->reg_vbus); 145 if (ret) { 146 dev_err(ci->dev, 147 "Failed to enable vbus regulator, ret=%d\n", 148 ret); 149 goto put_hcd; 150 } 151 } else { 152 priv->reg_vbus = ci->platdata->reg_vbus; 153 } 154 } 155 156 ret = usb_add_hcd(hcd, 0, 0); 157 if (ret) { 158 goto disable_reg; 159 } else { 160 struct usb_otg *otg = &ci->otg; 161 162 ci->hcd = hcd; 163 164 if (ci_otg_is_fsm_mode(ci)) { 165 otg->host = &hcd->self; 166 hcd->self.otg_port = 1; 167 } 168 } 169 170 return ret; 171 172 disable_reg: 173 if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) && 174 (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON)) 175 regulator_disable(ci->platdata->reg_vbus); 176 put_hcd: 177 usb_put_hcd(hcd); 178 179 return ret; 180 } 181 182 static void host_stop(struct ci_hdrc *ci) 183 { 184 struct usb_hcd *hcd = ci->hcd; 185 186 if (hcd) { 187 usb_remove_hcd(hcd); 188 usb_put_hcd(hcd); 189 if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) && 190 (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON)) 191 regulator_disable(ci->platdata->reg_vbus); 192 } 193 ci->hcd = NULL; 194 ci->otg.host = NULL; 195 } 196 197 198 void ci_hdrc_host_destroy(struct ci_hdrc *ci) 199 { 200 if (ci->role == CI_ROLE_HOST && ci->hcd) 201 host_stop(ci); 202 } 203 204 static int ci_ehci_bus_suspend(struct usb_hcd *hcd) 205 { 206 struct ehci_hcd *ehci = hcd_to_ehci(hcd); 207 int port; 208 u32 tmp; 209 210 int ret = orig_bus_suspend(hcd); 211 212 if (ret) 213 return ret; 214 215 port = HCS_N_PORTS(ehci->hcs_params); 216 while (port--) { 217 u32 __iomem *reg = &ehci->regs->port_status[port]; 218 u32 portsc = ehci_readl(ehci, reg); 219 220 if (portsc & PORT_CONNECT) { 221 /* 222 * For chipidea, the resume signal will be ended 223 * automatically, so for remote wakeup case, the 224 * usbcmd.rs may not be set before the resume has 225 * ended if other resume paths consumes too much 226 * time (~24ms), in that case, the SOF will not 227 * send out within 3ms after resume ends, then the 228 * high speed device will enter full speed mode. 229 */ 230 231 tmp = ehci_readl(ehci, &ehci->regs->command); 232 tmp |= CMD_RUN; 233 ehci_writel(ehci, tmp, &ehci->regs->command); 234 /* 235 * It needs a short delay between set RS bit and PHCD. 236 */ 237 usleep_range(150, 200); 238 break; 239 } 240 } 241 242 return 0; 243 } 244 245 int ci_hdrc_host_init(struct ci_hdrc *ci) 246 { 247 struct ci_role_driver *rdrv; 248 249 if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_HC)) 250 return -ENXIO; 251 252 rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL); 253 if (!rdrv) 254 return -ENOMEM; 255 256 rdrv->start = host_start; 257 rdrv->stop = host_stop; 258 rdrv->irq = host_irq; 259 rdrv->name = "host"; 260 ci->roles[CI_ROLE_HOST] = rdrv; 261 262 return 0; 263 } 264 265 void ci_hdrc_host_driver_init(void) 266 { 267 ehci_init_driver(&ci_ehci_hc_driver, &ehci_ci_overrides); 268 orig_bus_suspend = ci_ehci_hc_driver.bus_suspend; 269 ci_ehci_hc_driver.bus_suspend = ci_ehci_bus_suspend; 270 } 271