1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Universal Flash Storage Host controller Platform bus based glue driver 4 * Copyright (C) 2011-2013 Samsung India Software Operations 5 * 6 * Authors: 7 * Santosh Yaraganavi <santosh.sy@samsung.com> 8 * Vinayak Holikatti <h.vinayak@samsung.com> 9 */ 10 11 #include <linux/module.h> 12 #include <linux/platform_device.h> 13 #include <linux/pm_runtime.h> 14 #include <linux/of.h> 15 16 #include <ufs/ufshcd.h> 17 #include "ufshcd-pltfrm.h" 18 #include <ufs/unipro.h> 19 20 #define UFSHCD_DEFAULT_LANES_PER_DIRECTION 2 21 22 static int ufshcd_parse_clock_info(struct ufs_hba *hba) 23 { 24 int ret = 0; 25 int cnt; 26 int i; 27 struct device *dev = hba->dev; 28 struct device_node *np = dev->of_node; 29 char *name; 30 u32 *clkfreq = NULL; 31 struct ufs_clk_info *clki; 32 int len = 0; 33 size_t sz = 0; 34 35 if (!np) 36 goto out; 37 38 cnt = of_property_count_strings(np, "clock-names"); 39 if (!cnt || (cnt == -EINVAL)) { 40 dev_info(dev, "%s: Unable to find clocks, assuming enabled\n", 41 __func__); 42 } else if (cnt < 0) { 43 dev_err(dev, "%s: count clock strings failed, err %d\n", 44 __func__, cnt); 45 ret = cnt; 46 } 47 48 if (cnt <= 0) 49 goto out; 50 51 if (!of_get_property(np, "freq-table-hz", &len)) { 52 dev_info(dev, "freq-table-hz property not specified\n"); 53 goto out; 54 } 55 56 if (len <= 0) 57 goto out; 58 59 sz = len / sizeof(*clkfreq); 60 if (sz != 2 * cnt) { 61 dev_err(dev, "%s len mismatch\n", "freq-table-hz"); 62 ret = -EINVAL; 63 goto out; 64 } 65 66 clkfreq = devm_kcalloc(dev, sz, sizeof(*clkfreq), 67 GFP_KERNEL); 68 if (!clkfreq) { 69 ret = -ENOMEM; 70 goto out; 71 } 72 73 ret = of_property_read_u32_array(np, "freq-table-hz", 74 clkfreq, sz); 75 if (ret && (ret != -EINVAL)) { 76 dev_err(dev, "%s: error reading array %d\n", 77 "freq-table-hz", ret); 78 return ret; 79 } 80 81 for (i = 0; i < sz; i += 2) { 82 ret = of_property_read_string_index(np, 83 "clock-names", i/2, (const char **)&name); 84 if (ret) 85 goto out; 86 87 clki = devm_kzalloc(dev, sizeof(*clki), GFP_KERNEL); 88 if (!clki) { 89 ret = -ENOMEM; 90 goto out; 91 } 92 93 clki->min_freq = clkfreq[i]; 94 clki->max_freq = clkfreq[i+1]; 95 clki->name = devm_kstrdup(dev, name, GFP_KERNEL); 96 if (!clki->name) { 97 ret = -ENOMEM; 98 goto out; 99 } 100 101 if (!strcmp(name, "ref_clk")) 102 clki->keep_link_active = true; 103 dev_dbg(dev, "%s: min %u max %u name %s\n", "freq-table-hz", 104 clki->min_freq, clki->max_freq, clki->name); 105 list_add_tail(&clki->list, &hba->clk_list_head); 106 } 107 out: 108 return ret; 109 } 110 111 #define MAX_PROP_SIZE 32 112 static int ufshcd_populate_vreg(struct device *dev, const char *name, 113 struct ufs_vreg **out_vreg) 114 { 115 char prop_name[MAX_PROP_SIZE]; 116 struct ufs_vreg *vreg = NULL; 117 struct device_node *np = dev->of_node; 118 119 if (!np) { 120 dev_err(dev, "%s: non DT initialization\n", __func__); 121 goto out; 122 } 123 124 snprintf(prop_name, MAX_PROP_SIZE, "%s-supply", name); 125 if (!of_parse_phandle(np, prop_name, 0)) { 126 dev_info(dev, "%s: Unable to find %s regulator, assuming enabled\n", 127 __func__, prop_name); 128 goto out; 129 } 130 131 vreg = devm_kzalloc(dev, sizeof(*vreg), GFP_KERNEL); 132 if (!vreg) 133 return -ENOMEM; 134 135 vreg->name = devm_kstrdup(dev, name, GFP_KERNEL); 136 if (!vreg->name) 137 return -ENOMEM; 138 139 snprintf(prop_name, MAX_PROP_SIZE, "%s-max-microamp", name); 140 if (of_property_read_u32(np, prop_name, &vreg->max_uA)) { 141 dev_info(dev, "%s: unable to find %s\n", __func__, prop_name); 142 vreg->max_uA = 0; 143 } 144 out: 145 *out_vreg = vreg; 146 return 0; 147 } 148 149 /** 150 * ufshcd_parse_regulator_info - get regulator info from device tree 151 * @hba: per adapter instance 152 * 153 * Get regulator info from device tree for vcc, vccq, vccq2 power supplies. 154 * If any of the supplies are not defined it is assumed that they are always-on 155 * and hence return zero. If the property is defined but parsing is failed 156 * then return corresponding error. 157 */ 158 static int ufshcd_parse_regulator_info(struct ufs_hba *hba) 159 { 160 int err; 161 struct device *dev = hba->dev; 162 struct ufs_vreg_info *info = &hba->vreg_info; 163 164 err = ufshcd_populate_vreg(dev, "vdd-hba", &info->vdd_hba); 165 if (err) 166 goto out; 167 168 err = ufshcd_populate_vreg(dev, "vcc", &info->vcc); 169 if (err) 170 goto out; 171 172 err = ufshcd_populate_vreg(dev, "vccq", &info->vccq); 173 if (err) 174 goto out; 175 176 err = ufshcd_populate_vreg(dev, "vccq2", &info->vccq2); 177 out: 178 return err; 179 } 180 181 void ufshcd_pltfrm_shutdown(struct platform_device *pdev) 182 { 183 ufshcd_shutdown((struct ufs_hba *)platform_get_drvdata(pdev)); 184 } 185 EXPORT_SYMBOL_GPL(ufshcd_pltfrm_shutdown); 186 187 static void ufshcd_init_lanes_per_dir(struct ufs_hba *hba) 188 { 189 struct device *dev = hba->dev; 190 int ret; 191 192 ret = of_property_read_u32(dev->of_node, "lanes-per-direction", 193 &hba->lanes_per_direction); 194 if (ret) { 195 dev_dbg(hba->dev, 196 "%s: failed to read lanes-per-direction, ret=%d\n", 197 __func__, ret); 198 hba->lanes_per_direction = UFSHCD_DEFAULT_LANES_PER_DIRECTION; 199 } 200 } 201 202 /** 203 * ufshcd_get_pwr_dev_param - get finally agreed attributes for 204 * power mode change 205 * @pltfrm_param: pointer to platform parameters 206 * @dev_max: pointer to device attributes 207 * @agreed_pwr: returned agreed attributes 208 * 209 * Returns 0 on success, non-zero value on failure 210 */ 211 int ufshcd_get_pwr_dev_param(struct ufs_dev_params *pltfrm_param, 212 struct ufs_pa_layer_attr *dev_max, 213 struct ufs_pa_layer_attr *agreed_pwr) 214 { 215 int min_pltfrm_gear; 216 int min_dev_gear; 217 bool is_dev_sup_hs = false; 218 bool is_pltfrm_max_hs = false; 219 220 if (dev_max->pwr_rx == FAST_MODE) 221 is_dev_sup_hs = true; 222 223 if (pltfrm_param->desired_working_mode == UFS_HS_MODE) { 224 is_pltfrm_max_hs = true; 225 min_pltfrm_gear = min_t(u32, pltfrm_param->hs_rx_gear, 226 pltfrm_param->hs_tx_gear); 227 } else { 228 min_pltfrm_gear = min_t(u32, pltfrm_param->pwm_rx_gear, 229 pltfrm_param->pwm_tx_gear); 230 } 231 232 /* 233 * device doesn't support HS but 234 * pltfrm_param->desired_working_mode is HS, 235 * thus device and pltfrm_param don't agree 236 */ 237 if (!is_dev_sup_hs && is_pltfrm_max_hs) { 238 pr_info("%s: device doesn't support HS\n", 239 __func__); 240 return -ENOTSUPP; 241 } else if (is_dev_sup_hs && is_pltfrm_max_hs) { 242 /* 243 * since device supports HS, it supports FAST_MODE. 244 * since pltfrm_param->desired_working_mode is also HS 245 * then final decision (FAST/FASTAUTO) is done according 246 * to pltfrm_params as it is the restricting factor 247 */ 248 agreed_pwr->pwr_rx = pltfrm_param->rx_pwr_hs; 249 agreed_pwr->pwr_tx = agreed_pwr->pwr_rx; 250 } else { 251 /* 252 * here pltfrm_param->desired_working_mode is PWM. 253 * it doesn't matter whether device supports HS or PWM, 254 * in both cases pltfrm_param->desired_working_mode will 255 * determine the mode 256 */ 257 agreed_pwr->pwr_rx = pltfrm_param->rx_pwr_pwm; 258 agreed_pwr->pwr_tx = agreed_pwr->pwr_rx; 259 } 260 261 /* 262 * we would like tx to work in the minimum number of lanes 263 * between device capability and vendor preferences. 264 * the same decision will be made for rx 265 */ 266 agreed_pwr->lane_tx = min_t(u32, dev_max->lane_tx, 267 pltfrm_param->tx_lanes); 268 agreed_pwr->lane_rx = min_t(u32, dev_max->lane_rx, 269 pltfrm_param->rx_lanes); 270 271 /* device maximum gear is the minimum between device rx and tx gears */ 272 min_dev_gear = min_t(u32, dev_max->gear_rx, dev_max->gear_tx); 273 274 /* 275 * if both device capabilities and vendor pre-defined preferences are 276 * both HS or both PWM then set the minimum gear to be the chosen 277 * working gear. 278 * if one is PWM and one is HS then the one that is PWM get to decide 279 * what is the gear, as it is the one that also decided previously what 280 * pwr the device will be configured to. 281 */ 282 if ((is_dev_sup_hs && is_pltfrm_max_hs) || 283 (!is_dev_sup_hs && !is_pltfrm_max_hs)) { 284 agreed_pwr->gear_rx = 285 min_t(u32, min_dev_gear, min_pltfrm_gear); 286 } else if (!is_dev_sup_hs) { 287 agreed_pwr->gear_rx = min_dev_gear; 288 } else { 289 agreed_pwr->gear_rx = min_pltfrm_gear; 290 } 291 agreed_pwr->gear_tx = agreed_pwr->gear_rx; 292 293 agreed_pwr->hs_rate = pltfrm_param->hs_rate; 294 295 return 0; 296 } 297 EXPORT_SYMBOL_GPL(ufshcd_get_pwr_dev_param); 298 299 void ufshcd_init_pwr_dev_param(struct ufs_dev_params *dev_param) 300 { 301 *dev_param = (struct ufs_dev_params){ 302 .tx_lanes = 2, 303 .rx_lanes = 2, 304 .hs_rx_gear = UFS_HS_G3, 305 .hs_tx_gear = UFS_HS_G3, 306 .pwm_rx_gear = UFS_PWM_G4, 307 .pwm_tx_gear = UFS_PWM_G4, 308 .rx_pwr_pwm = SLOW_MODE, 309 .tx_pwr_pwm = SLOW_MODE, 310 .rx_pwr_hs = FAST_MODE, 311 .tx_pwr_hs = FAST_MODE, 312 .hs_rate = PA_HS_MODE_B, 313 .desired_working_mode = UFS_HS_MODE, 314 }; 315 } 316 EXPORT_SYMBOL_GPL(ufshcd_init_pwr_dev_param); 317 318 /** 319 * ufshcd_pltfrm_init - probe routine of the driver 320 * @pdev: pointer to Platform device handle 321 * @vops: pointer to variant ops 322 * 323 * Returns 0 on success, non-zero value on failure 324 */ 325 int ufshcd_pltfrm_init(struct platform_device *pdev, 326 const struct ufs_hba_variant_ops *vops) 327 { 328 struct ufs_hba *hba; 329 void __iomem *mmio_base; 330 int irq, err; 331 struct device *dev = &pdev->dev; 332 333 mmio_base = devm_platform_ioremap_resource(pdev, 0); 334 if (IS_ERR(mmio_base)) { 335 err = PTR_ERR(mmio_base); 336 goto out; 337 } 338 339 irq = platform_get_irq(pdev, 0); 340 if (irq < 0) { 341 err = irq; 342 goto out; 343 } 344 345 err = ufshcd_alloc_host(dev, &hba); 346 if (err) { 347 dev_err(dev, "Allocation failed\n"); 348 goto out; 349 } 350 351 hba->vops = vops; 352 353 err = ufshcd_parse_clock_info(hba); 354 if (err) { 355 dev_err(dev, "%s: clock parse failed %d\n", 356 __func__, err); 357 goto dealloc_host; 358 } 359 err = ufshcd_parse_regulator_info(hba); 360 if (err) { 361 dev_err(dev, "%s: regulator init failed %d\n", 362 __func__, err); 363 goto dealloc_host; 364 } 365 366 ufshcd_init_lanes_per_dir(hba); 367 368 err = ufshcd_init(hba, mmio_base, irq); 369 if (err) { 370 dev_err(dev, "Initialization failed\n"); 371 goto dealloc_host; 372 } 373 374 pm_runtime_set_active(dev); 375 pm_runtime_enable(dev); 376 377 return 0; 378 379 dealloc_host: 380 ufshcd_dealloc_host(hba); 381 out: 382 return err; 383 } 384 EXPORT_SYMBOL_GPL(ufshcd_pltfrm_init); 385 386 MODULE_AUTHOR("Santosh Yaragnavi <santosh.sy@samsung.com>"); 387 MODULE_AUTHOR("Vinayak Holikatti <h.vinayak@samsung.com>"); 388 MODULE_DESCRIPTION("UFS host controller Platform bus based glue driver"); 389 MODULE_LICENSE("GPL"); 390