1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Universal Flash Storage Host controller Platform bus based glue driver 4 * Copyright (C) 2011-2013 Samsung India Software Operations 5 * 6 * Authors: 7 * Santosh Yaraganavi <santosh.sy@samsung.com> 8 * Vinayak Holikatti <h.vinayak@samsung.com> 9 */ 10 11 #include <linux/module.h> 12 #include <linux/platform_device.h> 13 #include <linux/pm_runtime.h> 14 #include <linux/of.h> 15 16 #include <ufs/ufshcd.h> 17 #include "ufshcd-pltfrm.h" 18 #include <ufs/unipro.h> 19 20 #define UFSHCD_DEFAULT_LANES_PER_DIRECTION 2 21 22 static int ufshcd_parse_clock_info(struct ufs_hba *hba) 23 { 24 int ret = 0; 25 int cnt; 26 int i; 27 struct device *dev = hba->dev; 28 struct device_node *np = dev->of_node; 29 const char *name; 30 u32 *clkfreq = NULL; 31 struct ufs_clk_info *clki; 32 int len = 0; 33 size_t sz = 0; 34 35 if (!np) 36 goto out; 37 38 cnt = of_property_count_strings(np, "clock-names"); 39 if (!cnt || (cnt == -EINVAL)) { 40 dev_info(dev, "%s: Unable to find clocks, assuming enabled\n", 41 __func__); 42 } else if (cnt < 0) { 43 dev_err(dev, "%s: count clock strings failed, err %d\n", 44 __func__, cnt); 45 ret = cnt; 46 } 47 48 if (cnt <= 0) 49 goto out; 50 51 if (!of_get_property(np, "freq-table-hz", &len)) { 52 dev_info(dev, "freq-table-hz property not specified\n"); 53 goto out; 54 } 55 56 if (len <= 0) 57 goto out; 58 59 sz = len / sizeof(*clkfreq); 60 if (sz != 2 * cnt) { 61 dev_err(dev, "%s len mismatch\n", "freq-table-hz"); 62 ret = -EINVAL; 63 goto out; 64 } 65 66 clkfreq = devm_kcalloc(dev, sz, sizeof(*clkfreq), 67 GFP_KERNEL); 68 if (!clkfreq) { 69 ret = -ENOMEM; 70 goto out; 71 } 72 73 ret = of_property_read_u32_array(np, "freq-table-hz", 74 clkfreq, sz); 75 if (ret && (ret != -EINVAL)) { 76 dev_err(dev, "%s: error reading array %d\n", 77 "freq-table-hz", ret); 78 return ret; 79 } 80 81 for (i = 0; i < sz; i += 2) { 82 ret = of_property_read_string_index(np, "clock-names", i/2, 83 &name); 84 if (ret) 85 goto out; 86 87 clki = devm_kzalloc(dev, sizeof(*clki), GFP_KERNEL); 88 if (!clki) { 89 ret = -ENOMEM; 90 goto out; 91 } 92 93 clki->min_freq = clkfreq[i]; 94 clki->max_freq = clkfreq[i+1]; 95 clki->name = devm_kstrdup(dev, name, GFP_KERNEL); 96 if (!clki->name) { 97 ret = -ENOMEM; 98 goto out; 99 } 100 101 if (!strcmp(name, "ref_clk")) 102 clki->keep_link_active = true; 103 dev_dbg(dev, "%s: min %u max %u name %s\n", "freq-table-hz", 104 clki->min_freq, clki->max_freq, clki->name); 105 list_add_tail(&clki->list, &hba->clk_list_head); 106 } 107 out: 108 return ret; 109 } 110 111 #define MAX_PROP_SIZE 32 112 int ufshcd_populate_vreg(struct device *dev, const char *name, 113 struct ufs_vreg **out_vreg) 114 { 115 char prop_name[MAX_PROP_SIZE]; 116 struct ufs_vreg *vreg = NULL; 117 struct device_node *np = dev->of_node; 118 119 if (!np) { 120 dev_err(dev, "%s: non DT initialization\n", __func__); 121 goto out; 122 } 123 124 snprintf(prop_name, MAX_PROP_SIZE, "%s-supply", name); 125 if (!of_parse_phandle(np, prop_name, 0)) { 126 dev_info(dev, "%s: Unable to find %s regulator, assuming enabled\n", 127 __func__, prop_name); 128 goto out; 129 } 130 131 vreg = devm_kzalloc(dev, sizeof(*vreg), GFP_KERNEL); 132 if (!vreg) 133 return -ENOMEM; 134 135 vreg->name = devm_kstrdup(dev, name, GFP_KERNEL); 136 if (!vreg->name) 137 return -ENOMEM; 138 139 snprintf(prop_name, MAX_PROP_SIZE, "%s-max-microamp", name); 140 if (of_property_read_u32(np, prop_name, &vreg->max_uA)) { 141 dev_info(dev, "%s: unable to find %s\n", __func__, prop_name); 142 vreg->max_uA = 0; 143 } 144 out: 145 *out_vreg = vreg; 146 return 0; 147 } 148 EXPORT_SYMBOL_GPL(ufshcd_populate_vreg); 149 150 /** 151 * ufshcd_parse_regulator_info - get regulator info from device tree 152 * @hba: per adapter instance 153 * 154 * Get regulator info from device tree for vcc, vccq, vccq2 power supplies. 155 * If any of the supplies are not defined it is assumed that they are always-on 156 * and hence return zero. If the property is defined but parsing is failed 157 * then return corresponding error. 158 */ 159 static int ufshcd_parse_regulator_info(struct ufs_hba *hba) 160 { 161 int err; 162 struct device *dev = hba->dev; 163 struct ufs_vreg_info *info = &hba->vreg_info; 164 165 err = ufshcd_populate_vreg(dev, "vdd-hba", &info->vdd_hba); 166 if (err) 167 goto out; 168 169 err = ufshcd_populate_vreg(dev, "vcc", &info->vcc); 170 if (err) 171 goto out; 172 173 err = ufshcd_populate_vreg(dev, "vccq", &info->vccq); 174 if (err) 175 goto out; 176 177 err = ufshcd_populate_vreg(dev, "vccq2", &info->vccq2); 178 out: 179 return err; 180 } 181 182 void ufshcd_pltfrm_shutdown(struct platform_device *pdev) 183 { 184 ufshcd_shutdown((struct ufs_hba *)platform_get_drvdata(pdev)); 185 } 186 EXPORT_SYMBOL_GPL(ufshcd_pltfrm_shutdown); 187 188 static void ufshcd_init_lanes_per_dir(struct ufs_hba *hba) 189 { 190 struct device *dev = hba->dev; 191 int ret; 192 193 ret = of_property_read_u32(dev->of_node, "lanes-per-direction", 194 &hba->lanes_per_direction); 195 if (ret) { 196 dev_dbg(hba->dev, 197 "%s: failed to read lanes-per-direction, ret=%d\n", 198 __func__, ret); 199 hba->lanes_per_direction = UFSHCD_DEFAULT_LANES_PER_DIRECTION; 200 } 201 } 202 203 /** 204 * ufshcd_get_pwr_dev_param - get finally agreed attributes for 205 * power mode change 206 * @pltfrm_param: pointer to platform parameters 207 * @dev_max: pointer to device attributes 208 * @agreed_pwr: returned agreed attributes 209 * 210 * Returns 0 on success, non-zero value on failure 211 */ 212 int ufshcd_get_pwr_dev_param(const struct ufs_dev_params *pltfrm_param, 213 const struct ufs_pa_layer_attr *dev_max, 214 struct ufs_pa_layer_attr *agreed_pwr) 215 { 216 int min_pltfrm_gear; 217 int min_dev_gear; 218 bool is_dev_sup_hs = false; 219 bool is_pltfrm_max_hs = false; 220 221 if (dev_max->pwr_rx == FAST_MODE) 222 is_dev_sup_hs = true; 223 224 if (pltfrm_param->desired_working_mode == UFS_HS_MODE) { 225 is_pltfrm_max_hs = true; 226 min_pltfrm_gear = min_t(u32, pltfrm_param->hs_rx_gear, 227 pltfrm_param->hs_tx_gear); 228 } else { 229 min_pltfrm_gear = min_t(u32, pltfrm_param->pwm_rx_gear, 230 pltfrm_param->pwm_tx_gear); 231 } 232 233 /* 234 * device doesn't support HS but 235 * pltfrm_param->desired_working_mode is HS, 236 * thus device and pltfrm_param don't agree 237 */ 238 if (!is_dev_sup_hs && is_pltfrm_max_hs) { 239 pr_info("%s: device doesn't support HS\n", 240 __func__); 241 return -ENOTSUPP; 242 } else if (is_dev_sup_hs && is_pltfrm_max_hs) { 243 /* 244 * since device supports HS, it supports FAST_MODE. 245 * since pltfrm_param->desired_working_mode is also HS 246 * then final decision (FAST/FASTAUTO) is done according 247 * to pltfrm_params as it is the restricting factor 248 */ 249 agreed_pwr->pwr_rx = pltfrm_param->rx_pwr_hs; 250 agreed_pwr->pwr_tx = agreed_pwr->pwr_rx; 251 } else { 252 /* 253 * here pltfrm_param->desired_working_mode is PWM. 254 * it doesn't matter whether device supports HS or PWM, 255 * in both cases pltfrm_param->desired_working_mode will 256 * determine the mode 257 */ 258 agreed_pwr->pwr_rx = pltfrm_param->rx_pwr_pwm; 259 agreed_pwr->pwr_tx = agreed_pwr->pwr_rx; 260 } 261 262 /* 263 * we would like tx to work in the minimum number of lanes 264 * between device capability and vendor preferences. 265 * the same decision will be made for rx 266 */ 267 agreed_pwr->lane_tx = min_t(u32, dev_max->lane_tx, 268 pltfrm_param->tx_lanes); 269 agreed_pwr->lane_rx = min_t(u32, dev_max->lane_rx, 270 pltfrm_param->rx_lanes); 271 272 /* device maximum gear is the minimum between device rx and tx gears */ 273 min_dev_gear = min_t(u32, dev_max->gear_rx, dev_max->gear_tx); 274 275 /* 276 * if both device capabilities and vendor pre-defined preferences are 277 * both HS or both PWM then set the minimum gear to be the chosen 278 * working gear. 279 * if one is PWM and one is HS then the one that is PWM get to decide 280 * what is the gear, as it is the one that also decided previously what 281 * pwr the device will be configured to. 282 */ 283 if ((is_dev_sup_hs && is_pltfrm_max_hs) || 284 (!is_dev_sup_hs && !is_pltfrm_max_hs)) { 285 agreed_pwr->gear_rx = 286 min_t(u32, min_dev_gear, min_pltfrm_gear); 287 } else if (!is_dev_sup_hs) { 288 agreed_pwr->gear_rx = min_dev_gear; 289 } else { 290 agreed_pwr->gear_rx = min_pltfrm_gear; 291 } 292 agreed_pwr->gear_tx = agreed_pwr->gear_rx; 293 294 agreed_pwr->hs_rate = pltfrm_param->hs_rate; 295 296 return 0; 297 } 298 EXPORT_SYMBOL_GPL(ufshcd_get_pwr_dev_param); 299 300 void ufshcd_init_pwr_dev_param(struct ufs_dev_params *dev_param) 301 { 302 *dev_param = (struct ufs_dev_params){ 303 .tx_lanes = 2, 304 .rx_lanes = 2, 305 .hs_rx_gear = UFS_HS_G3, 306 .hs_tx_gear = UFS_HS_G3, 307 .pwm_rx_gear = UFS_PWM_G4, 308 .pwm_tx_gear = UFS_PWM_G4, 309 .rx_pwr_pwm = SLOW_MODE, 310 .tx_pwr_pwm = SLOW_MODE, 311 .rx_pwr_hs = FAST_MODE, 312 .tx_pwr_hs = FAST_MODE, 313 .hs_rate = PA_HS_MODE_B, 314 .desired_working_mode = UFS_HS_MODE, 315 }; 316 } 317 EXPORT_SYMBOL_GPL(ufshcd_init_pwr_dev_param); 318 319 /** 320 * ufshcd_pltfrm_init - probe routine of the driver 321 * @pdev: pointer to Platform device handle 322 * @vops: pointer to variant ops 323 * 324 * Returns 0 on success, non-zero value on failure 325 */ 326 int ufshcd_pltfrm_init(struct platform_device *pdev, 327 const struct ufs_hba_variant_ops *vops) 328 { 329 struct ufs_hba *hba; 330 void __iomem *mmio_base; 331 int irq, err; 332 struct device *dev = &pdev->dev; 333 334 mmio_base = devm_platform_ioremap_resource(pdev, 0); 335 if (IS_ERR(mmio_base)) { 336 err = PTR_ERR(mmio_base); 337 goto out; 338 } 339 340 irq = platform_get_irq(pdev, 0); 341 if (irq < 0) { 342 err = irq; 343 goto out; 344 } 345 346 err = ufshcd_alloc_host(dev, &hba); 347 if (err) { 348 dev_err(dev, "Allocation failed\n"); 349 goto out; 350 } 351 352 hba->vops = vops; 353 354 err = ufshcd_parse_clock_info(hba); 355 if (err) { 356 dev_err(dev, "%s: clock parse failed %d\n", 357 __func__, err); 358 goto dealloc_host; 359 } 360 err = ufshcd_parse_regulator_info(hba); 361 if (err) { 362 dev_err(dev, "%s: regulator init failed %d\n", 363 __func__, err); 364 goto dealloc_host; 365 } 366 367 ufshcd_init_lanes_per_dir(hba); 368 369 err = ufshcd_init(hba, mmio_base, irq); 370 if (err) { 371 dev_err(dev, "Initialization failed\n"); 372 goto dealloc_host; 373 } 374 375 pm_runtime_set_active(dev); 376 pm_runtime_enable(dev); 377 378 return 0; 379 380 dealloc_host: 381 ufshcd_dealloc_host(hba); 382 out: 383 return err; 384 } 385 EXPORT_SYMBOL_GPL(ufshcd_pltfrm_init); 386 387 MODULE_AUTHOR("Santosh Yaragnavi <santosh.sy@samsung.com>"); 388 MODULE_AUTHOR("Vinayak Holikatti <h.vinayak@samsung.com>"); 389 MODULE_DESCRIPTION("UFS host controller Platform bus based glue driver"); 390 MODULE_LICENSE("GPL"); 391