1 /* 2 * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com> 3 * 4 * Based on msm_serial.c, which is: 5 * Copyright (C) 2007 Google, Inc. 6 * Author: Robert Love <rlove@google.com> 7 * 8 * This software is licensed under the terms of the GNU General Public 9 * License version 2, as published by the Free Software Foundation, and 10 * may be copied, distributed, and modified under those terms. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 */ 17 18 #if defined(CONFIG_SERIAL_VT8500_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) 19 # define SUPPORT_SYSRQ 20 #endif 21 22 #include <linux/hrtimer.h> 23 #include <linux/delay.h> 24 #include <linux/module.h> 25 #include <linux/io.h> 26 #include <linux/ioport.h> 27 #include <linux/irq.h> 28 #include <linux/init.h> 29 #include <linux/console.h> 30 #include <linux/tty.h> 31 #include <linux/tty_flip.h> 32 #include <linux/serial_core.h> 33 #include <linux/serial.h> 34 #include <linux/slab.h> 35 #include <linux/clk.h> 36 #include <linux/platform_device.h> 37 #include <linux/of.h> 38 #include <linux/err.h> 39 40 /* 41 * UART Register offsets 42 */ 43 44 #define VT8500_URTDR 0x0000 /* Transmit data */ 45 #define VT8500_URRDR 0x0004 /* Receive data */ 46 #define VT8500_URDIV 0x0008 /* Clock/Baud rate divisor */ 47 #define VT8500_URLCR 0x000C /* Line control */ 48 #define VT8500_URICR 0x0010 /* IrDA control */ 49 #define VT8500_URIER 0x0014 /* Interrupt enable */ 50 #define VT8500_URISR 0x0018 /* Interrupt status */ 51 #define VT8500_URUSR 0x001c /* UART status */ 52 #define VT8500_URFCR 0x0020 /* FIFO control */ 53 #define VT8500_URFIDX 0x0024 /* FIFO index */ 54 #define VT8500_URBKR 0x0028 /* Break signal count */ 55 #define VT8500_URTOD 0x002c /* Time out divisor */ 56 #define VT8500_TXFIFO 0x1000 /* Transmit FIFO (16x8) */ 57 #define VT8500_RXFIFO 0x1020 /* Receive FIFO (16x10) */ 58 59 /* 60 * Interrupt enable and status bits 61 */ 62 63 #define TXDE (1 << 0) /* Tx Data empty */ 64 #define RXDF (1 << 1) /* Rx Data full */ 65 #define TXFAE (1 << 2) /* Tx FIFO almost empty */ 66 #define TXFE (1 << 3) /* Tx FIFO empty */ 67 #define RXFAF (1 << 4) /* Rx FIFO almost full */ 68 #define RXFF (1 << 5) /* Rx FIFO full */ 69 #define TXUDR (1 << 6) /* Tx underrun */ 70 #define RXOVER (1 << 7) /* Rx overrun */ 71 #define PER (1 << 8) /* Parity error */ 72 #define FER (1 << 9) /* Frame error */ 73 #define TCTS (1 << 10) /* Toggle of CTS */ 74 #define RXTOUT (1 << 11) /* Rx timeout */ 75 #define BKDONE (1 << 12) /* Break signal done */ 76 #define ERR (1 << 13) /* AHB error response */ 77 78 #define RX_FIFO_INTS (RXFAF | RXFF | RXOVER | PER | FER | RXTOUT) 79 #define TX_FIFO_INTS (TXFAE | TXFE | TXUDR) 80 81 #define VT8500_MAX_PORTS 6 82 83 struct vt8500_port { 84 struct uart_port uart; 85 char name[16]; 86 struct clk *clk; 87 unsigned int ier; 88 }; 89 90 /* 91 * we use this variable to keep track of which ports 92 * have been allocated as we can't use pdev->id in 93 * devicetree 94 */ 95 static unsigned long vt8500_ports_in_use; 96 97 static inline void vt8500_write(struct uart_port *port, unsigned int val, 98 unsigned int off) 99 { 100 writel(val, port->membase + off); 101 } 102 103 static inline unsigned int vt8500_read(struct uart_port *port, unsigned int off) 104 { 105 return readl(port->membase + off); 106 } 107 108 static void vt8500_stop_tx(struct uart_port *port) 109 { 110 struct vt8500_port *vt8500_port = container_of(port, 111 struct vt8500_port, 112 uart); 113 114 vt8500_port->ier &= ~TX_FIFO_INTS; 115 vt8500_write(port, vt8500_port->ier, VT8500_URIER); 116 } 117 118 static void vt8500_stop_rx(struct uart_port *port) 119 { 120 struct vt8500_port *vt8500_port = container_of(port, 121 struct vt8500_port, 122 uart); 123 124 vt8500_port->ier &= ~RX_FIFO_INTS; 125 vt8500_write(port, vt8500_port->ier, VT8500_URIER); 126 } 127 128 static void vt8500_enable_ms(struct uart_port *port) 129 { 130 struct vt8500_port *vt8500_port = container_of(port, 131 struct vt8500_port, 132 uart); 133 134 vt8500_port->ier |= TCTS; 135 vt8500_write(port, vt8500_port->ier, VT8500_URIER); 136 } 137 138 static void handle_rx(struct uart_port *port) 139 { 140 struct tty_port *tport = &port->state->port; 141 142 /* 143 * Handle overrun 144 */ 145 if ((vt8500_read(port, VT8500_URISR) & RXOVER)) { 146 port->icount.overrun++; 147 tty_insert_flip_char(tport, 0, TTY_OVERRUN); 148 } 149 150 /* and now the main RX loop */ 151 while (vt8500_read(port, VT8500_URFIDX) & 0x1f00) { 152 unsigned int c; 153 char flag = TTY_NORMAL; 154 155 c = readw(port->membase + VT8500_RXFIFO) & 0x3ff; 156 157 /* Mask conditions we're ignorning. */ 158 c &= ~port->read_status_mask; 159 160 if (c & FER) { 161 port->icount.frame++; 162 flag = TTY_FRAME; 163 } else if (c & PER) { 164 port->icount.parity++; 165 flag = TTY_PARITY; 166 } 167 port->icount.rx++; 168 169 if (!uart_handle_sysrq_char(port, c)) 170 tty_insert_flip_char(tport, c, flag); 171 } 172 173 spin_unlock(&port->lock); 174 tty_flip_buffer_push(tport); 175 spin_lock(&port->lock); 176 } 177 178 static void handle_tx(struct uart_port *port) 179 { 180 struct circ_buf *xmit = &port->state->xmit; 181 182 if (port->x_char) { 183 writeb(port->x_char, port->membase + VT8500_TXFIFO); 184 port->icount.tx++; 185 port->x_char = 0; 186 } 187 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { 188 vt8500_stop_tx(port); 189 return; 190 } 191 192 while ((vt8500_read(port, VT8500_URFIDX) & 0x1f) < 16) { 193 if (uart_circ_empty(xmit)) 194 break; 195 196 writeb(xmit->buf[xmit->tail], port->membase + VT8500_TXFIFO); 197 198 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 199 port->icount.tx++; 200 } 201 202 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 203 uart_write_wakeup(port); 204 205 if (uart_circ_empty(xmit)) 206 vt8500_stop_tx(port); 207 } 208 209 static void vt8500_start_tx(struct uart_port *port) 210 { 211 struct vt8500_port *vt8500_port = container_of(port, 212 struct vt8500_port, 213 uart); 214 215 vt8500_port->ier &= ~TX_FIFO_INTS; 216 vt8500_write(port, vt8500_port->ier, VT8500_URIER); 217 handle_tx(port); 218 vt8500_port->ier |= TX_FIFO_INTS; 219 vt8500_write(port, vt8500_port->ier, VT8500_URIER); 220 } 221 222 static void handle_delta_cts(struct uart_port *port) 223 { 224 port->icount.cts++; 225 wake_up_interruptible(&port->state->port.delta_msr_wait); 226 } 227 228 static irqreturn_t vt8500_irq(int irq, void *dev_id) 229 { 230 struct uart_port *port = dev_id; 231 unsigned long isr; 232 233 spin_lock(&port->lock); 234 isr = vt8500_read(port, VT8500_URISR); 235 236 /* Acknowledge active status bits */ 237 vt8500_write(port, isr, VT8500_URISR); 238 239 if (isr & RX_FIFO_INTS) 240 handle_rx(port); 241 if (isr & TX_FIFO_INTS) 242 handle_tx(port); 243 if (isr & TCTS) 244 handle_delta_cts(port); 245 246 spin_unlock(&port->lock); 247 248 return IRQ_HANDLED; 249 } 250 251 static unsigned int vt8500_tx_empty(struct uart_port *port) 252 { 253 return (vt8500_read(port, VT8500_URFIDX) & 0x1f) < 16 ? 254 TIOCSER_TEMT : 0; 255 } 256 257 static unsigned int vt8500_get_mctrl(struct uart_port *port) 258 { 259 unsigned int usr; 260 261 usr = vt8500_read(port, VT8500_URUSR); 262 if (usr & (1 << 4)) 263 return TIOCM_CTS; 264 else 265 return 0; 266 } 267 268 static void vt8500_set_mctrl(struct uart_port *port, unsigned int mctrl) 269 { 270 } 271 272 static void vt8500_break_ctl(struct uart_port *port, int break_ctl) 273 { 274 if (break_ctl) 275 vt8500_write(port, vt8500_read(port, VT8500_URLCR) | (1 << 9), 276 VT8500_URLCR); 277 } 278 279 static int vt8500_set_baud_rate(struct uart_port *port, unsigned int baud) 280 { 281 unsigned long div; 282 unsigned int loops = 1000; 283 284 div = vt8500_read(port, VT8500_URDIV) & ~(0x3ff); 285 286 if (unlikely((baud < 900) || (baud > 921600))) 287 div |= 7; 288 else 289 div |= (921600 / baud) - 1; 290 291 while ((vt8500_read(port, VT8500_URUSR) & (1 << 5)) && --loops) 292 cpu_relax(); 293 vt8500_write(port, div, VT8500_URDIV); 294 295 return baud; 296 } 297 298 static int vt8500_startup(struct uart_port *port) 299 { 300 struct vt8500_port *vt8500_port = 301 container_of(port, struct vt8500_port, uart); 302 int ret; 303 304 snprintf(vt8500_port->name, sizeof(vt8500_port->name), 305 "vt8500_serial%d", port->line); 306 307 ret = request_irq(port->irq, vt8500_irq, IRQF_TRIGGER_HIGH, 308 vt8500_port->name, port); 309 if (unlikely(ret)) 310 return ret; 311 312 vt8500_write(port, 0x03, VT8500_URLCR); /* enable TX & RX */ 313 314 return 0; 315 } 316 317 static void vt8500_shutdown(struct uart_port *port) 318 { 319 struct vt8500_port *vt8500_port = 320 container_of(port, struct vt8500_port, uart); 321 322 vt8500_port->ier = 0; 323 324 /* disable interrupts and FIFOs */ 325 vt8500_write(&vt8500_port->uart, 0, VT8500_URIER); 326 vt8500_write(&vt8500_port->uart, 0x880, VT8500_URFCR); 327 free_irq(port->irq, port); 328 } 329 330 static void vt8500_set_termios(struct uart_port *port, 331 struct ktermios *termios, 332 struct ktermios *old) 333 { 334 struct vt8500_port *vt8500_port = 335 container_of(port, struct vt8500_port, uart); 336 unsigned long flags; 337 unsigned int baud, lcr; 338 unsigned int loops = 1000; 339 340 spin_lock_irqsave(&port->lock, flags); 341 342 /* calculate and set baud rate */ 343 baud = uart_get_baud_rate(port, termios, old, 900, 921600); 344 baud = vt8500_set_baud_rate(port, baud); 345 if (tty_termios_baud_rate(termios)) 346 tty_termios_encode_baud_rate(termios, baud, baud); 347 348 /* calculate parity */ 349 lcr = vt8500_read(&vt8500_port->uart, VT8500_URLCR); 350 lcr &= ~((1 << 5) | (1 << 4)); 351 if (termios->c_cflag & PARENB) { 352 lcr |= (1 << 4); 353 termios->c_cflag &= ~CMSPAR; 354 if (termios->c_cflag & PARODD) 355 lcr |= (1 << 5); 356 } 357 358 /* calculate bits per char */ 359 lcr &= ~(1 << 2); 360 switch (termios->c_cflag & CSIZE) { 361 case CS7: 362 break; 363 case CS8: 364 default: 365 lcr |= (1 << 2); 366 termios->c_cflag &= ~CSIZE; 367 termios->c_cflag |= CS8; 368 break; 369 } 370 371 /* calculate stop bits */ 372 lcr &= ~(1 << 3); 373 if (termios->c_cflag & CSTOPB) 374 lcr |= (1 << 3); 375 376 /* set parity, bits per char, and stop bit */ 377 vt8500_write(&vt8500_port->uart, lcr, VT8500_URLCR); 378 379 /* Configure status bits to ignore based on termio flags. */ 380 port->read_status_mask = 0; 381 if (termios->c_iflag & IGNPAR) 382 port->read_status_mask = FER | PER; 383 384 uart_update_timeout(port, termios->c_cflag, baud); 385 386 /* Reset FIFOs */ 387 vt8500_write(&vt8500_port->uart, 0x88c, VT8500_URFCR); 388 while ((vt8500_read(&vt8500_port->uart, VT8500_URFCR) & 0xc) 389 && --loops) 390 cpu_relax(); 391 392 /* Every possible FIFO-related interrupt */ 393 vt8500_port->ier = RX_FIFO_INTS | TX_FIFO_INTS; 394 395 /* 396 * CTS flow control 397 */ 398 if (UART_ENABLE_MS(&vt8500_port->uart, termios->c_cflag)) 399 vt8500_port->ier |= TCTS; 400 401 vt8500_write(&vt8500_port->uart, 0x881, VT8500_URFCR); 402 vt8500_write(&vt8500_port->uart, vt8500_port->ier, VT8500_URIER); 403 404 spin_unlock_irqrestore(&port->lock, flags); 405 } 406 407 static const char *vt8500_type(struct uart_port *port) 408 { 409 struct vt8500_port *vt8500_port = 410 container_of(port, struct vt8500_port, uart); 411 return vt8500_port->name; 412 } 413 414 static void vt8500_release_port(struct uart_port *port) 415 { 416 } 417 418 static int vt8500_request_port(struct uart_port *port) 419 { 420 return 0; 421 } 422 423 static void vt8500_config_port(struct uart_port *port, int flags) 424 { 425 port->type = PORT_VT8500; 426 } 427 428 static int vt8500_verify_port(struct uart_port *port, 429 struct serial_struct *ser) 430 { 431 if (unlikely(ser->type != PORT_UNKNOWN && ser->type != PORT_VT8500)) 432 return -EINVAL; 433 if (unlikely(port->irq != ser->irq)) 434 return -EINVAL; 435 return 0; 436 } 437 438 static struct vt8500_port *vt8500_uart_ports[VT8500_MAX_PORTS]; 439 static struct uart_driver vt8500_uart_driver; 440 441 #ifdef CONFIG_SERIAL_VT8500_CONSOLE 442 443 static inline void wait_for_xmitr(struct uart_port *port) 444 { 445 unsigned int status, tmout = 10000; 446 447 /* Wait up to 10ms for the character(s) to be sent. */ 448 do { 449 status = vt8500_read(port, VT8500_URFIDX); 450 451 if (--tmout == 0) 452 break; 453 udelay(1); 454 } while (status & 0x10); 455 } 456 457 static void vt8500_console_putchar(struct uart_port *port, int c) 458 { 459 wait_for_xmitr(port); 460 writeb(c, port->membase + VT8500_TXFIFO); 461 } 462 463 static void vt8500_console_write(struct console *co, const char *s, 464 unsigned int count) 465 { 466 struct vt8500_port *vt8500_port = vt8500_uart_ports[co->index]; 467 unsigned long ier; 468 469 BUG_ON(co->index < 0 || co->index >= vt8500_uart_driver.nr); 470 471 ier = vt8500_read(&vt8500_port->uart, VT8500_URIER); 472 vt8500_write(&vt8500_port->uart, VT8500_URIER, 0); 473 474 uart_console_write(&vt8500_port->uart, s, count, 475 vt8500_console_putchar); 476 477 /* 478 * Finally, wait for transmitter to become empty 479 * and switch back to FIFO 480 */ 481 wait_for_xmitr(&vt8500_port->uart); 482 vt8500_write(&vt8500_port->uart, VT8500_URIER, ier); 483 } 484 485 static int __init vt8500_console_setup(struct console *co, char *options) 486 { 487 struct vt8500_port *vt8500_port; 488 int baud = 9600; 489 int bits = 8; 490 int parity = 'n'; 491 int flow = 'n'; 492 493 if (unlikely(co->index >= vt8500_uart_driver.nr || co->index < 0)) 494 return -ENXIO; 495 496 vt8500_port = vt8500_uart_ports[co->index]; 497 498 if (!vt8500_port) 499 return -ENODEV; 500 501 if (options) 502 uart_parse_options(options, &baud, &parity, &bits, &flow); 503 504 return uart_set_options(&vt8500_port->uart, 505 co, baud, parity, bits, flow); 506 } 507 508 static struct console vt8500_console = { 509 .name = "ttyWMT", 510 .write = vt8500_console_write, 511 .device = uart_console_device, 512 .setup = vt8500_console_setup, 513 .flags = CON_PRINTBUFFER, 514 .index = -1, 515 .data = &vt8500_uart_driver, 516 }; 517 518 #define VT8500_CONSOLE (&vt8500_console) 519 520 #else 521 #define VT8500_CONSOLE NULL 522 #endif 523 524 static struct uart_ops vt8500_uart_pops = { 525 .tx_empty = vt8500_tx_empty, 526 .set_mctrl = vt8500_set_mctrl, 527 .get_mctrl = vt8500_get_mctrl, 528 .stop_tx = vt8500_stop_tx, 529 .start_tx = vt8500_start_tx, 530 .stop_rx = vt8500_stop_rx, 531 .enable_ms = vt8500_enable_ms, 532 .break_ctl = vt8500_break_ctl, 533 .startup = vt8500_startup, 534 .shutdown = vt8500_shutdown, 535 .set_termios = vt8500_set_termios, 536 .type = vt8500_type, 537 .release_port = vt8500_release_port, 538 .request_port = vt8500_request_port, 539 .config_port = vt8500_config_port, 540 .verify_port = vt8500_verify_port, 541 }; 542 543 static struct uart_driver vt8500_uart_driver = { 544 .owner = THIS_MODULE, 545 .driver_name = "vt8500_serial", 546 .dev_name = "ttyWMT", 547 .nr = 6, 548 .cons = VT8500_CONSOLE, 549 }; 550 551 static int vt8500_serial_probe(struct platform_device *pdev) 552 { 553 struct vt8500_port *vt8500_port; 554 struct resource *mmres, *irqres; 555 struct device_node *np = pdev->dev.of_node; 556 int ret; 557 int port; 558 559 mmres = platform_get_resource(pdev, IORESOURCE_MEM, 0); 560 irqres = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 561 if (!mmres || !irqres) 562 return -ENODEV; 563 564 if (np) 565 port = of_alias_get_id(np, "serial"); 566 if (port >= VT8500_MAX_PORTS) 567 port = -1; 568 else 569 port = -1; 570 571 if (port < 0) { 572 /* calculate the port id */ 573 port = find_first_zero_bit(&vt8500_ports_in_use, 574 sizeof(vt8500_ports_in_use)); 575 } 576 577 if (port >= VT8500_MAX_PORTS) 578 return -ENODEV; 579 580 /* reserve the port id */ 581 if (test_and_set_bit(port, &vt8500_ports_in_use)) { 582 /* port already in use - shouldn't really happen */ 583 return -EBUSY; 584 } 585 586 vt8500_port = devm_kzalloc(&pdev->dev, sizeof(struct vt8500_port), 587 GFP_KERNEL); 588 if (!vt8500_port) 589 return -ENOMEM; 590 591 vt8500_port->uart.membase = devm_ioremap_resource(&pdev->dev, mmres); 592 if (IS_ERR(vt8500_port->uart.membase)) 593 return PTR_ERR(vt8500_port->uart.membase); 594 595 vt8500_port->clk = of_clk_get(pdev->dev.of_node, 0); 596 if (IS_ERR(vt8500_port->clk)) { 597 dev_err(&pdev->dev, "failed to get clock\n"); 598 return -EINVAL; 599 } 600 601 ret = clk_prepare_enable(vt8500_port->clk); 602 if (ret) { 603 dev_err(&pdev->dev, "failed to enable clock\n"); 604 return ret; 605 } 606 607 vt8500_port->uart.type = PORT_VT8500; 608 vt8500_port->uart.iotype = UPIO_MEM; 609 vt8500_port->uart.mapbase = mmres->start; 610 vt8500_port->uart.irq = irqres->start; 611 vt8500_port->uart.fifosize = 16; 612 vt8500_port->uart.ops = &vt8500_uart_pops; 613 vt8500_port->uart.line = port; 614 vt8500_port->uart.dev = &pdev->dev; 615 vt8500_port->uart.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF; 616 617 vt8500_port->uart.uartclk = clk_get_rate(vt8500_port->clk); 618 619 snprintf(vt8500_port->name, sizeof(vt8500_port->name), 620 "VT8500 UART%d", pdev->id); 621 622 vt8500_uart_ports[port] = vt8500_port; 623 624 uart_add_one_port(&vt8500_uart_driver, &vt8500_port->uart); 625 626 platform_set_drvdata(pdev, vt8500_port); 627 628 return 0; 629 } 630 631 static int vt8500_serial_remove(struct platform_device *pdev) 632 { 633 struct vt8500_port *vt8500_port = platform_get_drvdata(pdev); 634 635 clk_disable_unprepare(vt8500_port->clk); 636 uart_remove_one_port(&vt8500_uart_driver, &vt8500_port->uart); 637 638 return 0; 639 } 640 641 static const struct of_device_id wmt_dt_ids[] = { 642 { .compatible = "via,vt8500-uart", }, 643 {} 644 }; 645 646 static struct platform_driver vt8500_platform_driver = { 647 .probe = vt8500_serial_probe, 648 .remove = vt8500_serial_remove, 649 .driver = { 650 .name = "vt8500_serial", 651 .owner = THIS_MODULE, 652 .of_match_table = wmt_dt_ids, 653 }, 654 }; 655 656 static int __init vt8500_serial_init(void) 657 { 658 int ret; 659 660 ret = uart_register_driver(&vt8500_uart_driver); 661 if (unlikely(ret)) 662 return ret; 663 664 ret = platform_driver_register(&vt8500_platform_driver); 665 666 if (unlikely(ret)) 667 uart_unregister_driver(&vt8500_uart_driver); 668 669 return ret; 670 } 671 672 static void __exit vt8500_serial_exit(void) 673 { 674 #ifdef CONFIG_SERIAL_VT8500_CONSOLE 675 unregister_console(&vt8500_console); 676 #endif 677 platform_driver_unregister(&vt8500_platform_driver); 678 uart_unregister_driver(&vt8500_uart_driver); 679 } 680 681 module_init(vt8500_serial_init); 682 module_exit(vt8500_serial_exit); 683 684 MODULE_AUTHOR("Alexey Charkov <alchark@gmail.com>"); 685 MODULE_DESCRIPTION("Driver for vt8500 serial device"); 686 MODULE_LICENSE("GPL v2"); 687