1 /* 2 * timbuart.c timberdale FPGA UART driver 3 * Copyright (c) 2009 Intel Corporation 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License version 2 as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software 16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 17 */ 18 19 /* Supports: 20 * Timberdale FPGA UART 21 */ 22 23 #include <linux/pci.h> 24 #include <linux/interrupt.h> 25 #include <linux/serial_core.h> 26 #include <linux/tty.h> 27 #include <linux/tty_flip.h> 28 #include <linux/kernel.h> 29 #include <linux/platform_device.h> 30 #include <linux/ioport.h> 31 #include <linux/slab.h> 32 #include <linux/module.h> 33 34 #include "timbuart.h" 35 36 struct timbuart_port { 37 struct uart_port port; 38 struct tasklet_struct tasklet; 39 int usedma; 40 u32 last_ier; 41 struct platform_device *dev; 42 }; 43 44 static int baudrates[] = {9600, 19200, 38400, 57600, 115200, 230400, 460800, 45 921600, 1843200, 3250000}; 46 47 static void timbuart_mctrl_check(struct uart_port *port, u32 isr, u32 *ier); 48 49 static irqreturn_t timbuart_handleinterrupt(int irq, void *devid); 50 51 static void timbuart_stop_rx(struct uart_port *port) 52 { 53 /* spin lock held by upper layer, disable all RX interrupts */ 54 u32 ier = ioread32(port->membase + TIMBUART_IER) & ~RXFLAGS; 55 iowrite32(ier, port->membase + TIMBUART_IER); 56 } 57 58 static void timbuart_stop_tx(struct uart_port *port) 59 { 60 /* spinlock held by upper layer, disable TX interrupt */ 61 u32 ier = ioread32(port->membase + TIMBUART_IER) & ~TXBAE; 62 iowrite32(ier, port->membase + TIMBUART_IER); 63 } 64 65 static void timbuart_start_tx(struct uart_port *port) 66 { 67 struct timbuart_port *uart = 68 container_of(port, struct timbuart_port, port); 69 70 /* do not transfer anything here -> fire off the tasklet */ 71 tasklet_schedule(&uart->tasklet); 72 } 73 74 static unsigned int timbuart_tx_empty(struct uart_port *port) 75 { 76 u32 isr = ioread32(port->membase + TIMBUART_ISR); 77 78 return (isr & TXBE) ? TIOCSER_TEMT : 0; 79 } 80 81 static void timbuart_flush_buffer(struct uart_port *port) 82 { 83 if (!timbuart_tx_empty(port)) { 84 u8 ctl = ioread8(port->membase + TIMBUART_CTRL) | 85 TIMBUART_CTRL_FLSHTX; 86 87 iowrite8(ctl, port->membase + TIMBUART_CTRL); 88 iowrite32(TXBF, port->membase + TIMBUART_ISR); 89 } 90 } 91 92 static void timbuart_rx_chars(struct uart_port *port) 93 { 94 struct tty_port *tport = &port->state->port; 95 96 while (ioread32(port->membase + TIMBUART_ISR) & RXDP) { 97 u8 ch = ioread8(port->membase + TIMBUART_RXFIFO); 98 port->icount.rx++; 99 tty_insert_flip_char(tport, ch, TTY_NORMAL); 100 } 101 102 spin_unlock(&port->lock); 103 tty_flip_buffer_push(tport); 104 spin_lock(&port->lock); 105 106 dev_dbg(port->dev, "%s - total read %d bytes\n", 107 __func__, port->icount.rx); 108 } 109 110 static void timbuart_tx_chars(struct uart_port *port) 111 { 112 struct circ_buf *xmit = &port->state->xmit; 113 114 while (!(ioread32(port->membase + TIMBUART_ISR) & TXBF) && 115 !uart_circ_empty(xmit)) { 116 iowrite8(xmit->buf[xmit->tail], 117 port->membase + TIMBUART_TXFIFO); 118 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 119 port->icount.tx++; 120 } 121 122 dev_dbg(port->dev, 123 "%s - total written %d bytes, CTL: %x, RTS: %x, baud: %x\n", 124 __func__, 125 port->icount.tx, 126 ioread8(port->membase + TIMBUART_CTRL), 127 port->mctrl & TIOCM_RTS, 128 ioread8(port->membase + TIMBUART_BAUDRATE)); 129 } 130 131 static void timbuart_handle_tx_port(struct uart_port *port, u32 isr, u32 *ier) 132 { 133 struct timbuart_port *uart = 134 container_of(port, struct timbuart_port, port); 135 struct circ_buf *xmit = &port->state->xmit; 136 137 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) 138 return; 139 140 if (port->x_char) 141 return; 142 143 if (isr & TXFLAGS) { 144 timbuart_tx_chars(port); 145 /* clear all TX interrupts */ 146 iowrite32(TXFLAGS, port->membase + TIMBUART_ISR); 147 148 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 149 uart_write_wakeup(port); 150 } else 151 /* Re-enable any tx interrupt */ 152 *ier |= uart->last_ier & TXFLAGS; 153 154 /* enable interrupts if there are chars in the transmit buffer, 155 * Or if we delivered some bytes and want the almost empty interrupt 156 * we wake up the upper layer later when we got the interrupt 157 * to give it some time to go out... 158 */ 159 if (!uart_circ_empty(xmit)) 160 *ier |= TXBAE; 161 162 dev_dbg(port->dev, "%s - leaving\n", __func__); 163 } 164 165 static void timbuart_handle_rx_port(struct uart_port *port, u32 isr, u32 *ier) 166 { 167 if (isr & RXFLAGS) { 168 /* Some RX status is set */ 169 if (isr & RXBF) { 170 u8 ctl = ioread8(port->membase + TIMBUART_CTRL) | 171 TIMBUART_CTRL_FLSHRX; 172 iowrite8(ctl, port->membase + TIMBUART_CTRL); 173 port->icount.overrun++; 174 } else if (isr & (RXDP)) 175 timbuart_rx_chars(port); 176 177 /* ack all RX interrupts */ 178 iowrite32(RXFLAGS, port->membase + TIMBUART_ISR); 179 } 180 181 /* always have the RX interrupts enabled */ 182 *ier |= RXBAF | RXBF | RXTT; 183 184 dev_dbg(port->dev, "%s - leaving\n", __func__); 185 } 186 187 static void timbuart_tasklet(unsigned long arg) 188 { 189 struct timbuart_port *uart = (struct timbuart_port *)arg; 190 u32 isr, ier = 0; 191 192 spin_lock(&uart->port.lock); 193 194 isr = ioread32(uart->port.membase + TIMBUART_ISR); 195 dev_dbg(uart->port.dev, "%s ISR: %x\n", __func__, isr); 196 197 if (!uart->usedma) 198 timbuart_handle_tx_port(&uart->port, isr, &ier); 199 200 timbuart_mctrl_check(&uart->port, isr, &ier); 201 202 if (!uart->usedma) 203 timbuart_handle_rx_port(&uart->port, isr, &ier); 204 205 iowrite32(ier, uart->port.membase + TIMBUART_IER); 206 207 spin_unlock(&uart->port.lock); 208 dev_dbg(uart->port.dev, "%s leaving\n", __func__); 209 } 210 211 static unsigned int timbuart_get_mctrl(struct uart_port *port) 212 { 213 u8 cts = ioread8(port->membase + TIMBUART_CTRL); 214 dev_dbg(port->dev, "%s - cts %x\n", __func__, cts); 215 216 if (cts & TIMBUART_CTRL_CTS) 217 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR; 218 else 219 return TIOCM_DSR | TIOCM_CAR; 220 } 221 222 static void timbuart_set_mctrl(struct uart_port *port, unsigned int mctrl) 223 { 224 dev_dbg(port->dev, "%s - %x\n", __func__, mctrl); 225 226 if (mctrl & TIOCM_RTS) 227 iowrite8(TIMBUART_CTRL_RTS, port->membase + TIMBUART_CTRL); 228 else 229 iowrite8(0, port->membase + TIMBUART_CTRL); 230 } 231 232 static void timbuart_mctrl_check(struct uart_port *port, u32 isr, u32 *ier) 233 { 234 unsigned int cts; 235 236 if (isr & CTS_DELTA) { 237 /* ack */ 238 iowrite32(CTS_DELTA, port->membase + TIMBUART_ISR); 239 cts = timbuart_get_mctrl(port); 240 uart_handle_cts_change(port, cts & TIOCM_CTS); 241 wake_up_interruptible(&port->state->port.delta_msr_wait); 242 } 243 244 *ier |= CTS_DELTA; 245 } 246 247 static void timbuart_enable_ms(struct uart_port *port) 248 { 249 /* N/A */ 250 } 251 252 static void timbuart_break_ctl(struct uart_port *port, int ctl) 253 { 254 /* N/A */ 255 } 256 257 static int timbuart_startup(struct uart_port *port) 258 { 259 struct timbuart_port *uart = 260 container_of(port, struct timbuart_port, port); 261 262 dev_dbg(port->dev, "%s\n", __func__); 263 264 iowrite8(TIMBUART_CTRL_FLSHRX, port->membase + TIMBUART_CTRL); 265 iowrite32(0x1ff, port->membase + TIMBUART_ISR); 266 /* Enable all but TX interrupts */ 267 iowrite32(RXBAF | RXBF | RXTT | CTS_DELTA, 268 port->membase + TIMBUART_IER); 269 270 return request_irq(port->irq, timbuart_handleinterrupt, IRQF_SHARED, 271 "timb-uart", uart); 272 } 273 274 static void timbuart_shutdown(struct uart_port *port) 275 { 276 struct timbuart_port *uart = 277 container_of(port, struct timbuart_port, port); 278 dev_dbg(port->dev, "%s\n", __func__); 279 free_irq(port->irq, uart); 280 iowrite32(0, port->membase + TIMBUART_IER); 281 } 282 283 static int get_bindex(int baud) 284 { 285 int i; 286 287 for (i = 0; i < ARRAY_SIZE(baudrates); i++) 288 if (baud <= baudrates[i]) 289 return i; 290 291 return -1; 292 } 293 294 static void timbuart_set_termios(struct uart_port *port, 295 struct ktermios *termios, 296 struct ktermios *old) 297 { 298 unsigned int baud; 299 short bindex; 300 unsigned long flags; 301 302 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16); 303 bindex = get_bindex(baud); 304 dev_dbg(port->dev, "%s - bindex %d\n", __func__, bindex); 305 306 if (bindex < 0) 307 bindex = 0; 308 baud = baudrates[bindex]; 309 310 /* The serial layer calls into this once with old = NULL when setting 311 up initially */ 312 if (old) 313 tty_termios_copy_hw(termios, old); 314 tty_termios_encode_baud_rate(termios, baud, baud); 315 316 spin_lock_irqsave(&port->lock, flags); 317 iowrite8((u8)bindex, port->membase + TIMBUART_BAUDRATE); 318 uart_update_timeout(port, termios->c_cflag, baud); 319 spin_unlock_irqrestore(&port->lock, flags); 320 } 321 322 static const char *timbuart_type(struct uart_port *port) 323 { 324 return port->type == PORT_UNKNOWN ? "timbuart" : NULL; 325 } 326 327 /* We do not request/release mappings of the registers here, 328 * currently it's done in the proble function. 329 */ 330 static void timbuart_release_port(struct uart_port *port) 331 { 332 struct platform_device *pdev = to_platform_device(port->dev); 333 int size = 334 resource_size(platform_get_resource(pdev, IORESOURCE_MEM, 0)); 335 336 if (port->flags & UPF_IOREMAP) { 337 iounmap(port->membase); 338 port->membase = NULL; 339 } 340 341 release_mem_region(port->mapbase, size); 342 } 343 344 static int timbuart_request_port(struct uart_port *port) 345 { 346 struct platform_device *pdev = to_platform_device(port->dev); 347 int size = 348 resource_size(platform_get_resource(pdev, IORESOURCE_MEM, 0)); 349 350 if (!request_mem_region(port->mapbase, size, "timb-uart")) 351 return -EBUSY; 352 353 if (port->flags & UPF_IOREMAP) { 354 port->membase = ioremap(port->mapbase, size); 355 if (port->membase == NULL) { 356 release_mem_region(port->mapbase, size); 357 return -ENOMEM; 358 } 359 } 360 361 return 0; 362 } 363 364 static irqreturn_t timbuart_handleinterrupt(int irq, void *devid) 365 { 366 struct timbuart_port *uart = (struct timbuart_port *)devid; 367 368 if (ioread8(uart->port.membase + TIMBUART_IPR)) { 369 uart->last_ier = ioread32(uart->port.membase + TIMBUART_IER); 370 371 /* disable interrupts, the tasklet enables them again */ 372 iowrite32(0, uart->port.membase + TIMBUART_IER); 373 374 /* fire off bottom half */ 375 tasklet_schedule(&uart->tasklet); 376 377 return IRQ_HANDLED; 378 } else 379 return IRQ_NONE; 380 } 381 382 /* 383 * Configure/autoconfigure the port. 384 */ 385 static void timbuart_config_port(struct uart_port *port, int flags) 386 { 387 if (flags & UART_CONFIG_TYPE) { 388 port->type = PORT_TIMBUART; 389 timbuart_request_port(port); 390 } 391 } 392 393 static int timbuart_verify_port(struct uart_port *port, 394 struct serial_struct *ser) 395 { 396 /* we don't want the core code to modify any port params */ 397 return -EINVAL; 398 } 399 400 static struct uart_ops timbuart_ops = { 401 .tx_empty = timbuart_tx_empty, 402 .set_mctrl = timbuart_set_mctrl, 403 .get_mctrl = timbuart_get_mctrl, 404 .stop_tx = timbuart_stop_tx, 405 .start_tx = timbuart_start_tx, 406 .flush_buffer = timbuart_flush_buffer, 407 .stop_rx = timbuart_stop_rx, 408 .enable_ms = timbuart_enable_ms, 409 .break_ctl = timbuart_break_ctl, 410 .startup = timbuart_startup, 411 .shutdown = timbuart_shutdown, 412 .set_termios = timbuart_set_termios, 413 .type = timbuart_type, 414 .release_port = timbuart_release_port, 415 .request_port = timbuart_request_port, 416 .config_port = timbuart_config_port, 417 .verify_port = timbuart_verify_port 418 }; 419 420 static struct uart_driver timbuart_driver = { 421 .owner = THIS_MODULE, 422 .driver_name = "timberdale_uart", 423 .dev_name = "ttyTU", 424 .major = TIMBUART_MAJOR, 425 .minor = TIMBUART_MINOR, 426 .nr = 1 427 }; 428 429 static int timbuart_probe(struct platform_device *dev) 430 { 431 int err, irq; 432 struct timbuart_port *uart; 433 struct resource *iomem; 434 435 dev_dbg(&dev->dev, "%s\n", __func__); 436 437 uart = kzalloc(sizeof(*uart), GFP_KERNEL); 438 if (!uart) { 439 err = -EINVAL; 440 goto err_mem; 441 } 442 443 uart->usedma = 0; 444 445 uart->port.uartclk = 3250000 * 16; 446 uart->port.fifosize = TIMBUART_FIFO_SIZE; 447 uart->port.regshift = 2; 448 uart->port.iotype = UPIO_MEM; 449 uart->port.ops = &timbuart_ops; 450 uart->port.irq = 0; 451 uart->port.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP; 452 uart->port.line = 0; 453 uart->port.dev = &dev->dev; 454 455 iomem = platform_get_resource(dev, IORESOURCE_MEM, 0); 456 if (!iomem) { 457 err = -ENOMEM; 458 goto err_register; 459 } 460 uart->port.mapbase = iomem->start; 461 uart->port.membase = NULL; 462 463 irq = platform_get_irq(dev, 0); 464 if (irq < 0) { 465 err = -EINVAL; 466 goto err_register; 467 } 468 uart->port.irq = irq; 469 470 tasklet_init(&uart->tasklet, timbuart_tasklet, (unsigned long)uart); 471 472 err = uart_register_driver(&timbuart_driver); 473 if (err) 474 goto err_register; 475 476 err = uart_add_one_port(&timbuart_driver, &uart->port); 477 if (err) 478 goto err_add_port; 479 480 platform_set_drvdata(dev, uart); 481 482 return 0; 483 484 err_add_port: 485 uart_unregister_driver(&timbuart_driver); 486 err_register: 487 kfree(uart); 488 err_mem: 489 printk(KERN_ERR "timberdale: Failed to register Timberdale UART: %d\n", 490 err); 491 492 return err; 493 } 494 495 static int timbuart_remove(struct platform_device *dev) 496 { 497 struct timbuart_port *uart = platform_get_drvdata(dev); 498 499 tasklet_kill(&uart->tasklet); 500 uart_remove_one_port(&timbuart_driver, &uart->port); 501 uart_unregister_driver(&timbuart_driver); 502 kfree(uart); 503 504 return 0; 505 } 506 507 static struct platform_driver timbuart_platform_driver = { 508 .driver = { 509 .name = "timb-uart", 510 .owner = THIS_MODULE, 511 }, 512 .probe = timbuart_probe, 513 .remove = timbuart_remove, 514 }; 515 516 module_platform_driver(timbuart_platform_driver); 517 518 MODULE_DESCRIPTION("Timberdale UART driver"); 519 MODULE_LICENSE("GPL v2"); 520 MODULE_ALIAS("platform:timb-uart"); 521 522