1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * su.c: Small serial driver for keyboard/mouse interface on sparc32/PCI 4 * 5 * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be) 6 * Copyright (C) 1998-1999 Pete Zaitcev (zaitcev@yahoo.com) 7 * 8 * This is mainly a variation of 8250.c, credits go to authors mentioned 9 * therein. In fact this driver should be merged into the generic 8250.c 10 * infrastructure perhaps using a 8250_sparc.c module. 11 * 12 * Fixed to use tty_get_baud_rate(). 13 * Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12 14 * 15 * Converted to new 2.5.x UART layer. 16 * David S. Miller (davem@davemloft.net), 2002-Jul-29 17 */ 18 19 #include <linux/module.h> 20 #include <linux/kernel.h> 21 #include <linux/spinlock.h> 22 #include <linux/errno.h> 23 #include <linux/tty.h> 24 #include <linux/tty_flip.h> 25 #include <linux/major.h> 26 #include <linux/string.h> 27 #include <linux/ptrace.h> 28 #include <linux/ioport.h> 29 #include <linux/circ_buf.h> 30 #include <linux/serial.h> 31 #include <linux/sysrq.h> 32 #include <linux/console.h> 33 #include <linux/slab.h> 34 #ifdef CONFIG_SERIO 35 #include <linux/serio.h> 36 #endif 37 #include <linux/serial_reg.h> 38 #include <linux/init.h> 39 #include <linux/delay.h> 40 #include <linux/of_device.h> 41 42 #include <asm/io.h> 43 #include <asm/irq.h> 44 #include <asm/prom.h> 45 #include <asm/setup.h> 46 47 #if defined(CONFIG_SERIAL_SUNSU_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) 48 #define SUPPORT_SYSRQ 49 #endif 50 51 #include <linux/serial_core.h> 52 #include <linux/sunserialcore.h> 53 54 /* We are on a NS PC87303 clocked with 24.0 MHz, which results 55 * in a UART clock of 1.8462 MHz. 56 */ 57 #define SU_BASE_BAUD (1846200 / 16) 58 59 enum su_type { SU_PORT_NONE, SU_PORT_MS, SU_PORT_KBD, SU_PORT_PORT }; 60 static char *su_typev[] = { "su(???)", "su(mouse)", "su(kbd)", "su(serial)" }; 61 62 struct serial_uart_config { 63 char *name; 64 int dfl_xmit_fifo_size; 65 int flags; 66 }; 67 68 /* 69 * Here we define the default xmit fifo size used for each type of UART. 70 */ 71 static const struct serial_uart_config uart_config[] = { 72 { "unknown", 1, 0 }, 73 { "8250", 1, 0 }, 74 { "16450", 1, 0 }, 75 { "16550", 1, 0 }, 76 { "16550A", 16, UART_CLEAR_FIFO | UART_USE_FIFO }, 77 { "Cirrus", 1, 0 }, 78 { "ST16650", 1, UART_CLEAR_FIFO | UART_STARTECH }, 79 { "ST16650V2", 32, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH }, 80 { "TI16750", 64, UART_CLEAR_FIFO | UART_USE_FIFO }, 81 { "Startech", 1, 0 }, 82 { "16C950/954", 128, UART_CLEAR_FIFO | UART_USE_FIFO }, 83 { "ST16654", 64, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH }, 84 { "XR16850", 128, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH }, 85 { "RSA", 2048, UART_CLEAR_FIFO | UART_USE_FIFO } 86 }; 87 88 struct uart_sunsu_port { 89 struct uart_port port; 90 unsigned char acr; 91 unsigned char ier; 92 unsigned short rev; 93 unsigned char lcr; 94 unsigned int lsr_break_flag; 95 unsigned int cflag; 96 97 /* Probing information. */ 98 enum su_type su_type; 99 unsigned int type_probed; /* XXX Stupid */ 100 unsigned long reg_size; 101 102 #ifdef CONFIG_SERIO 103 struct serio serio; 104 int serio_open; 105 #endif 106 }; 107 108 static unsigned int serial_in(struct uart_sunsu_port *up, int offset) 109 { 110 offset <<= up->port.regshift; 111 112 switch (up->port.iotype) { 113 case UPIO_HUB6: 114 outb(up->port.hub6 - 1 + offset, up->port.iobase); 115 return inb(up->port.iobase + 1); 116 117 case UPIO_MEM: 118 return readb(up->port.membase + offset); 119 120 default: 121 return inb(up->port.iobase + offset); 122 } 123 } 124 125 static void serial_out(struct uart_sunsu_port *up, int offset, int value) 126 { 127 #ifndef CONFIG_SPARC64 128 /* 129 * MrCoffee has weird schematics: IRQ4 & P10(?) pins of SuperIO are 130 * connected with a gate then go to SlavIO. When IRQ4 goes tristated 131 * gate outputs a logical one. Since we use level triggered interrupts 132 * we have lockup and watchdog reset. We cannot mask IRQ because 133 * keyboard shares IRQ with us (Word has it as Bob Smelik's design). 134 * This problem is similar to what Alpha people suffer, see serial.c. 135 */ 136 if (offset == UART_MCR) 137 value |= UART_MCR_OUT2; 138 #endif 139 offset <<= up->port.regshift; 140 141 switch (up->port.iotype) { 142 case UPIO_HUB6: 143 outb(up->port.hub6 - 1 + offset, up->port.iobase); 144 outb(value, up->port.iobase + 1); 145 break; 146 147 case UPIO_MEM: 148 writeb(value, up->port.membase + offset); 149 break; 150 151 default: 152 outb(value, up->port.iobase + offset); 153 } 154 } 155 156 /* 157 * We used to support using pause I/O for certain machines. We 158 * haven't supported this for a while, but just in case it's badly 159 * needed for certain old 386 machines, I've left these #define's 160 * in.... 161 */ 162 #define serial_inp(up, offset) serial_in(up, offset) 163 #define serial_outp(up, offset, value) serial_out(up, offset, value) 164 165 166 /* 167 * For the 16C950 168 */ 169 static void serial_icr_write(struct uart_sunsu_port *up, int offset, int value) 170 { 171 serial_out(up, UART_SCR, offset); 172 serial_out(up, UART_ICR, value); 173 } 174 175 #if 0 /* Unused currently */ 176 static unsigned int serial_icr_read(struct uart_sunsu_port *up, int offset) 177 { 178 unsigned int value; 179 180 serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD); 181 serial_out(up, UART_SCR, offset); 182 value = serial_in(up, UART_ICR); 183 serial_icr_write(up, UART_ACR, up->acr); 184 185 return value; 186 } 187 #endif 188 189 #ifdef CONFIG_SERIAL_8250_RSA 190 /* 191 * Attempts to turn on the RSA FIFO. Returns zero on failure. 192 * We set the port uart clock rate if we succeed. 193 */ 194 static int __enable_rsa(struct uart_sunsu_port *up) 195 { 196 unsigned char mode; 197 int result; 198 199 mode = serial_inp(up, UART_RSA_MSR); 200 result = mode & UART_RSA_MSR_FIFO; 201 202 if (!result) { 203 serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO); 204 mode = serial_inp(up, UART_RSA_MSR); 205 result = mode & UART_RSA_MSR_FIFO; 206 } 207 208 if (result) 209 up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16; 210 211 return result; 212 } 213 214 static void enable_rsa(struct uart_sunsu_port *up) 215 { 216 if (up->port.type == PORT_RSA) { 217 if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) { 218 spin_lock_irq(&up->port.lock); 219 __enable_rsa(up); 220 spin_unlock_irq(&up->port.lock); 221 } 222 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) 223 serial_outp(up, UART_RSA_FRR, 0); 224 } 225 } 226 227 /* 228 * Attempts to turn off the RSA FIFO. Returns zero on failure. 229 * It is unknown why interrupts were disabled in here. However, 230 * the caller is expected to preserve this behaviour by grabbing 231 * the spinlock before calling this function. 232 */ 233 static void disable_rsa(struct uart_sunsu_port *up) 234 { 235 unsigned char mode; 236 int result; 237 238 if (up->port.type == PORT_RSA && 239 up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) { 240 spin_lock_irq(&up->port.lock); 241 242 mode = serial_inp(up, UART_RSA_MSR); 243 result = !(mode & UART_RSA_MSR_FIFO); 244 245 if (!result) { 246 serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO); 247 mode = serial_inp(up, UART_RSA_MSR); 248 result = !(mode & UART_RSA_MSR_FIFO); 249 } 250 251 if (result) 252 up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16; 253 spin_unlock_irq(&up->port.lock); 254 } 255 } 256 #endif /* CONFIG_SERIAL_8250_RSA */ 257 258 static inline void __stop_tx(struct uart_sunsu_port *p) 259 { 260 if (p->ier & UART_IER_THRI) { 261 p->ier &= ~UART_IER_THRI; 262 serial_out(p, UART_IER, p->ier); 263 } 264 } 265 266 static void sunsu_stop_tx(struct uart_port *port) 267 { 268 struct uart_sunsu_port *up = 269 container_of(port, struct uart_sunsu_port, port); 270 271 __stop_tx(up); 272 273 /* 274 * We really want to stop the transmitter from sending. 275 */ 276 if (up->port.type == PORT_16C950) { 277 up->acr |= UART_ACR_TXDIS; 278 serial_icr_write(up, UART_ACR, up->acr); 279 } 280 } 281 282 static void sunsu_start_tx(struct uart_port *port) 283 { 284 struct uart_sunsu_port *up = 285 container_of(port, struct uart_sunsu_port, port); 286 287 if (!(up->ier & UART_IER_THRI)) { 288 up->ier |= UART_IER_THRI; 289 serial_out(up, UART_IER, up->ier); 290 } 291 292 /* 293 * Re-enable the transmitter if we disabled it. 294 */ 295 if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) { 296 up->acr &= ~UART_ACR_TXDIS; 297 serial_icr_write(up, UART_ACR, up->acr); 298 } 299 } 300 301 static void sunsu_stop_rx(struct uart_port *port) 302 { 303 struct uart_sunsu_port *up = 304 container_of(port, struct uart_sunsu_port, port); 305 306 up->ier &= ~UART_IER_RLSI; 307 up->port.read_status_mask &= ~UART_LSR_DR; 308 serial_out(up, UART_IER, up->ier); 309 } 310 311 static void sunsu_enable_ms(struct uart_port *port) 312 { 313 struct uart_sunsu_port *up = 314 container_of(port, struct uart_sunsu_port, port); 315 unsigned long flags; 316 317 spin_lock_irqsave(&up->port.lock, flags); 318 up->ier |= UART_IER_MSI; 319 serial_out(up, UART_IER, up->ier); 320 spin_unlock_irqrestore(&up->port.lock, flags); 321 } 322 323 static void 324 receive_chars(struct uart_sunsu_port *up, unsigned char *status) 325 { 326 struct tty_port *port = &up->port.state->port; 327 unsigned char ch, flag; 328 int max_count = 256; 329 int saw_console_brk = 0; 330 331 do { 332 ch = serial_inp(up, UART_RX); 333 flag = TTY_NORMAL; 334 up->port.icount.rx++; 335 336 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE | 337 UART_LSR_FE | UART_LSR_OE))) { 338 /* 339 * For statistics only 340 */ 341 if (*status & UART_LSR_BI) { 342 *status &= ~(UART_LSR_FE | UART_LSR_PE); 343 up->port.icount.brk++; 344 if (up->port.cons != NULL && 345 up->port.line == up->port.cons->index) 346 saw_console_brk = 1; 347 /* 348 * We do the SysRQ and SAK checking 349 * here because otherwise the break 350 * may get masked by ignore_status_mask 351 * or read_status_mask. 352 */ 353 if (uart_handle_break(&up->port)) 354 goto ignore_char; 355 } else if (*status & UART_LSR_PE) 356 up->port.icount.parity++; 357 else if (*status & UART_LSR_FE) 358 up->port.icount.frame++; 359 if (*status & UART_LSR_OE) 360 up->port.icount.overrun++; 361 362 /* 363 * Mask off conditions which should be ingored. 364 */ 365 *status &= up->port.read_status_mask; 366 367 if (up->port.cons != NULL && 368 up->port.line == up->port.cons->index) { 369 /* Recover the break flag from console xmit */ 370 *status |= up->lsr_break_flag; 371 up->lsr_break_flag = 0; 372 } 373 374 if (*status & UART_LSR_BI) { 375 flag = TTY_BREAK; 376 } else if (*status & UART_LSR_PE) 377 flag = TTY_PARITY; 378 else if (*status & UART_LSR_FE) 379 flag = TTY_FRAME; 380 } 381 if (uart_handle_sysrq_char(&up->port, ch)) 382 goto ignore_char; 383 if ((*status & up->port.ignore_status_mask) == 0) 384 tty_insert_flip_char(port, ch, flag); 385 if (*status & UART_LSR_OE) 386 /* 387 * Overrun is special, since it's reported 388 * immediately, and doesn't affect the current 389 * character. 390 */ 391 tty_insert_flip_char(port, 0, TTY_OVERRUN); 392 ignore_char: 393 *status = serial_inp(up, UART_LSR); 394 } while ((*status & UART_LSR_DR) && (max_count-- > 0)); 395 396 if (saw_console_brk) 397 sun_do_break(); 398 } 399 400 static void transmit_chars(struct uart_sunsu_port *up) 401 { 402 struct circ_buf *xmit = &up->port.state->xmit; 403 int count; 404 405 if (up->port.x_char) { 406 serial_outp(up, UART_TX, up->port.x_char); 407 up->port.icount.tx++; 408 up->port.x_char = 0; 409 return; 410 } 411 if (uart_tx_stopped(&up->port)) { 412 sunsu_stop_tx(&up->port); 413 return; 414 } 415 if (uart_circ_empty(xmit)) { 416 __stop_tx(up); 417 return; 418 } 419 420 count = up->port.fifosize; 421 do { 422 serial_out(up, UART_TX, xmit->buf[xmit->tail]); 423 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 424 up->port.icount.tx++; 425 if (uart_circ_empty(xmit)) 426 break; 427 } while (--count > 0); 428 429 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 430 uart_write_wakeup(&up->port); 431 432 if (uart_circ_empty(xmit)) 433 __stop_tx(up); 434 } 435 436 static void check_modem_status(struct uart_sunsu_port *up) 437 { 438 int status; 439 440 status = serial_in(up, UART_MSR); 441 442 if ((status & UART_MSR_ANY_DELTA) == 0) 443 return; 444 445 if (status & UART_MSR_TERI) 446 up->port.icount.rng++; 447 if (status & UART_MSR_DDSR) 448 up->port.icount.dsr++; 449 if (status & UART_MSR_DDCD) 450 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD); 451 if (status & UART_MSR_DCTS) 452 uart_handle_cts_change(&up->port, status & UART_MSR_CTS); 453 454 wake_up_interruptible(&up->port.state->port.delta_msr_wait); 455 } 456 457 static irqreturn_t sunsu_serial_interrupt(int irq, void *dev_id) 458 { 459 struct uart_sunsu_port *up = dev_id; 460 unsigned long flags; 461 unsigned char status; 462 463 spin_lock_irqsave(&up->port.lock, flags); 464 465 do { 466 status = serial_inp(up, UART_LSR); 467 if (status & UART_LSR_DR) 468 receive_chars(up, &status); 469 check_modem_status(up); 470 if (status & UART_LSR_THRE) 471 transmit_chars(up); 472 473 spin_unlock_irqrestore(&up->port.lock, flags); 474 475 tty_flip_buffer_push(&up->port.state->port); 476 477 spin_lock_irqsave(&up->port.lock, flags); 478 479 } while (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT)); 480 481 spin_unlock_irqrestore(&up->port.lock, flags); 482 483 return IRQ_HANDLED; 484 } 485 486 /* Separate interrupt handling path for keyboard/mouse ports. */ 487 488 static void 489 sunsu_change_speed(struct uart_port *port, unsigned int cflag, 490 unsigned int iflag, unsigned int quot); 491 492 static void sunsu_change_mouse_baud(struct uart_sunsu_port *up) 493 { 494 unsigned int cur_cflag = up->cflag; 495 int quot, new_baud; 496 497 up->cflag &= ~CBAUD; 498 up->cflag |= suncore_mouse_baud_cflag_next(cur_cflag, &new_baud); 499 500 quot = up->port.uartclk / (16 * new_baud); 501 502 sunsu_change_speed(&up->port, up->cflag, 0, quot); 503 } 504 505 static void receive_kbd_ms_chars(struct uart_sunsu_port *up, int is_break) 506 { 507 do { 508 unsigned char ch = serial_inp(up, UART_RX); 509 510 /* Stop-A is handled by drivers/char/keyboard.c now. */ 511 if (up->su_type == SU_PORT_KBD) { 512 #ifdef CONFIG_SERIO 513 serio_interrupt(&up->serio, ch, 0); 514 #endif 515 } else if (up->su_type == SU_PORT_MS) { 516 int ret = suncore_mouse_baud_detection(ch, is_break); 517 518 switch (ret) { 519 case 2: 520 sunsu_change_mouse_baud(up); 521 /* fallthru */ 522 case 1: 523 break; 524 525 case 0: 526 #ifdef CONFIG_SERIO 527 serio_interrupt(&up->serio, ch, 0); 528 #endif 529 break; 530 } 531 } 532 } while (serial_in(up, UART_LSR) & UART_LSR_DR); 533 } 534 535 static irqreturn_t sunsu_kbd_ms_interrupt(int irq, void *dev_id) 536 { 537 struct uart_sunsu_port *up = dev_id; 538 539 if (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT)) { 540 unsigned char status = serial_inp(up, UART_LSR); 541 542 if ((status & UART_LSR_DR) || (status & UART_LSR_BI)) 543 receive_kbd_ms_chars(up, (status & UART_LSR_BI) != 0); 544 } 545 546 return IRQ_HANDLED; 547 } 548 549 static unsigned int sunsu_tx_empty(struct uart_port *port) 550 { 551 struct uart_sunsu_port *up = 552 container_of(port, struct uart_sunsu_port, port); 553 unsigned long flags; 554 unsigned int ret; 555 556 spin_lock_irqsave(&up->port.lock, flags); 557 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0; 558 spin_unlock_irqrestore(&up->port.lock, flags); 559 560 return ret; 561 } 562 563 static unsigned int sunsu_get_mctrl(struct uart_port *port) 564 { 565 struct uart_sunsu_port *up = 566 container_of(port, struct uart_sunsu_port, port); 567 unsigned char status; 568 unsigned int ret; 569 570 status = serial_in(up, UART_MSR); 571 572 ret = 0; 573 if (status & UART_MSR_DCD) 574 ret |= TIOCM_CAR; 575 if (status & UART_MSR_RI) 576 ret |= TIOCM_RNG; 577 if (status & UART_MSR_DSR) 578 ret |= TIOCM_DSR; 579 if (status & UART_MSR_CTS) 580 ret |= TIOCM_CTS; 581 return ret; 582 } 583 584 static void sunsu_set_mctrl(struct uart_port *port, unsigned int mctrl) 585 { 586 struct uart_sunsu_port *up = 587 container_of(port, struct uart_sunsu_port, port); 588 unsigned char mcr = 0; 589 590 if (mctrl & TIOCM_RTS) 591 mcr |= UART_MCR_RTS; 592 if (mctrl & TIOCM_DTR) 593 mcr |= UART_MCR_DTR; 594 if (mctrl & TIOCM_OUT1) 595 mcr |= UART_MCR_OUT1; 596 if (mctrl & TIOCM_OUT2) 597 mcr |= UART_MCR_OUT2; 598 if (mctrl & TIOCM_LOOP) 599 mcr |= UART_MCR_LOOP; 600 601 serial_out(up, UART_MCR, mcr); 602 } 603 604 static void sunsu_break_ctl(struct uart_port *port, int break_state) 605 { 606 struct uart_sunsu_port *up = 607 container_of(port, struct uart_sunsu_port, port); 608 unsigned long flags; 609 610 spin_lock_irqsave(&up->port.lock, flags); 611 if (break_state == -1) 612 up->lcr |= UART_LCR_SBC; 613 else 614 up->lcr &= ~UART_LCR_SBC; 615 serial_out(up, UART_LCR, up->lcr); 616 spin_unlock_irqrestore(&up->port.lock, flags); 617 } 618 619 static int sunsu_startup(struct uart_port *port) 620 { 621 struct uart_sunsu_port *up = 622 container_of(port, struct uart_sunsu_port, port); 623 unsigned long flags; 624 int retval; 625 626 if (up->port.type == PORT_16C950) { 627 /* Wake up and initialize UART */ 628 up->acr = 0; 629 serial_outp(up, UART_LCR, 0xBF); 630 serial_outp(up, UART_EFR, UART_EFR_ECB); 631 serial_outp(up, UART_IER, 0); 632 serial_outp(up, UART_LCR, 0); 633 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */ 634 serial_outp(up, UART_LCR, 0xBF); 635 serial_outp(up, UART_EFR, UART_EFR_ECB); 636 serial_outp(up, UART_LCR, 0); 637 } 638 639 #ifdef CONFIG_SERIAL_8250_RSA 640 /* 641 * If this is an RSA port, see if we can kick it up to the 642 * higher speed clock. 643 */ 644 enable_rsa(up); 645 #endif 646 647 /* 648 * Clear the FIFO buffers and disable them. 649 * (they will be reenabled in set_termios()) 650 */ 651 if (uart_config[up->port.type].flags & UART_CLEAR_FIFO) { 652 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO); 653 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | 654 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); 655 serial_outp(up, UART_FCR, 0); 656 } 657 658 /* 659 * Clear the interrupt registers. 660 */ 661 (void) serial_inp(up, UART_LSR); 662 (void) serial_inp(up, UART_RX); 663 (void) serial_inp(up, UART_IIR); 664 (void) serial_inp(up, UART_MSR); 665 666 /* 667 * At this point, there's no way the LSR could still be 0xff; 668 * if it is, then bail out, because there's likely no UART 669 * here. 670 */ 671 if (!(up->port.flags & UPF_BUGGY_UART) && 672 (serial_inp(up, UART_LSR) == 0xff)) { 673 printk("ttyS%d: LSR safety check engaged!\n", up->port.line); 674 return -ENODEV; 675 } 676 677 if (up->su_type != SU_PORT_PORT) { 678 retval = request_irq(up->port.irq, sunsu_kbd_ms_interrupt, 679 IRQF_SHARED, su_typev[up->su_type], up); 680 } else { 681 retval = request_irq(up->port.irq, sunsu_serial_interrupt, 682 IRQF_SHARED, su_typev[up->su_type], up); 683 } 684 if (retval) { 685 printk("su: Cannot register IRQ %d\n", up->port.irq); 686 return retval; 687 } 688 689 /* 690 * Now, initialize the UART 691 */ 692 serial_outp(up, UART_LCR, UART_LCR_WLEN8); 693 694 spin_lock_irqsave(&up->port.lock, flags); 695 696 up->port.mctrl |= TIOCM_OUT2; 697 698 sunsu_set_mctrl(&up->port, up->port.mctrl); 699 spin_unlock_irqrestore(&up->port.lock, flags); 700 701 /* 702 * Finally, enable interrupts. Note: Modem status interrupts 703 * are set via set_termios(), which will be occurring imminently 704 * anyway, so we don't enable them here. 705 */ 706 up->ier = UART_IER_RLSI | UART_IER_RDI; 707 serial_outp(up, UART_IER, up->ier); 708 709 if (up->port.flags & UPF_FOURPORT) { 710 unsigned int icp; 711 /* 712 * Enable interrupts on the AST Fourport board 713 */ 714 icp = (up->port.iobase & 0xfe0) | 0x01f; 715 outb_p(0x80, icp); 716 (void) inb_p(icp); 717 } 718 719 /* 720 * And clear the interrupt registers again for luck. 721 */ 722 (void) serial_inp(up, UART_LSR); 723 (void) serial_inp(up, UART_RX); 724 (void) serial_inp(up, UART_IIR); 725 (void) serial_inp(up, UART_MSR); 726 727 return 0; 728 } 729 730 static void sunsu_shutdown(struct uart_port *port) 731 { 732 struct uart_sunsu_port *up = 733 container_of(port, struct uart_sunsu_port, port); 734 unsigned long flags; 735 736 /* 737 * Disable interrupts from this port 738 */ 739 up->ier = 0; 740 serial_outp(up, UART_IER, 0); 741 742 spin_lock_irqsave(&up->port.lock, flags); 743 if (up->port.flags & UPF_FOURPORT) { 744 /* reset interrupts on the AST Fourport board */ 745 inb((up->port.iobase & 0xfe0) | 0x1f); 746 up->port.mctrl |= TIOCM_OUT1; 747 } else 748 up->port.mctrl &= ~TIOCM_OUT2; 749 750 sunsu_set_mctrl(&up->port, up->port.mctrl); 751 spin_unlock_irqrestore(&up->port.lock, flags); 752 753 /* 754 * Disable break condition and FIFOs 755 */ 756 serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC); 757 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | 758 UART_FCR_CLEAR_RCVR | 759 UART_FCR_CLEAR_XMIT); 760 serial_outp(up, UART_FCR, 0); 761 762 #ifdef CONFIG_SERIAL_8250_RSA 763 /* 764 * Reset the RSA board back to 115kbps compat mode. 765 */ 766 disable_rsa(up); 767 #endif 768 769 /* 770 * Read data port to reset things. 771 */ 772 (void) serial_in(up, UART_RX); 773 774 free_irq(up->port.irq, up); 775 } 776 777 static void 778 sunsu_change_speed(struct uart_port *port, unsigned int cflag, 779 unsigned int iflag, unsigned int quot) 780 { 781 struct uart_sunsu_port *up = 782 container_of(port, struct uart_sunsu_port, port); 783 unsigned char cval, fcr = 0; 784 unsigned long flags; 785 786 switch (cflag & CSIZE) { 787 case CS5: 788 cval = 0x00; 789 break; 790 case CS6: 791 cval = 0x01; 792 break; 793 case CS7: 794 cval = 0x02; 795 break; 796 default: 797 case CS8: 798 cval = 0x03; 799 break; 800 } 801 802 if (cflag & CSTOPB) 803 cval |= 0x04; 804 if (cflag & PARENB) 805 cval |= UART_LCR_PARITY; 806 if (!(cflag & PARODD)) 807 cval |= UART_LCR_EPAR; 808 #ifdef CMSPAR 809 if (cflag & CMSPAR) 810 cval |= UART_LCR_SPAR; 811 #endif 812 813 /* 814 * Work around a bug in the Oxford Semiconductor 952 rev B 815 * chip which causes it to seriously miscalculate baud rates 816 * when DLL is 0. 817 */ 818 if ((quot & 0xff) == 0 && up->port.type == PORT_16C950 && 819 up->rev == 0x5201) 820 quot ++; 821 822 if (uart_config[up->port.type].flags & UART_USE_FIFO) { 823 if ((up->port.uartclk / quot) < (2400 * 16)) 824 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1; 825 #ifdef CONFIG_SERIAL_8250_RSA 826 else if (up->port.type == PORT_RSA) 827 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_14; 828 #endif 829 else 830 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_8; 831 } 832 if (up->port.type == PORT_16750) 833 fcr |= UART_FCR7_64BYTE; 834 835 /* 836 * Ok, we're now changing the port state. Do it with 837 * interrupts disabled. 838 */ 839 spin_lock_irqsave(&up->port.lock, flags); 840 841 /* 842 * Update the per-port timeout. 843 */ 844 uart_update_timeout(port, cflag, (port->uartclk / (16 * quot))); 845 846 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; 847 if (iflag & INPCK) 848 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE; 849 if (iflag & (IGNBRK | BRKINT | PARMRK)) 850 up->port.read_status_mask |= UART_LSR_BI; 851 852 /* 853 * Characteres to ignore 854 */ 855 up->port.ignore_status_mask = 0; 856 if (iflag & IGNPAR) 857 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE; 858 if (iflag & IGNBRK) { 859 up->port.ignore_status_mask |= UART_LSR_BI; 860 /* 861 * If we're ignoring parity and break indicators, 862 * ignore overruns too (for real raw support). 863 */ 864 if (iflag & IGNPAR) 865 up->port.ignore_status_mask |= UART_LSR_OE; 866 } 867 868 /* 869 * ignore all characters if CREAD is not set 870 */ 871 if ((cflag & CREAD) == 0) 872 up->port.ignore_status_mask |= UART_LSR_DR; 873 874 /* 875 * CTS flow control flag and modem status interrupts 876 */ 877 up->ier &= ~UART_IER_MSI; 878 if (UART_ENABLE_MS(&up->port, cflag)) 879 up->ier |= UART_IER_MSI; 880 881 serial_out(up, UART_IER, up->ier); 882 883 if (uart_config[up->port.type].flags & UART_STARTECH) { 884 serial_outp(up, UART_LCR, 0xBF); 885 serial_outp(up, UART_EFR, cflag & CRTSCTS ? UART_EFR_CTS :0); 886 } 887 serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */ 888 serial_outp(up, UART_DLL, quot & 0xff); /* LS of divisor */ 889 serial_outp(up, UART_DLM, quot >> 8); /* MS of divisor */ 890 if (up->port.type == PORT_16750) 891 serial_outp(up, UART_FCR, fcr); /* set fcr */ 892 serial_outp(up, UART_LCR, cval); /* reset DLAB */ 893 up->lcr = cval; /* Save LCR */ 894 if (up->port.type != PORT_16750) { 895 if (fcr & UART_FCR_ENABLE_FIFO) { 896 /* emulated UARTs (Lucent Venus 167x) need two steps */ 897 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO); 898 } 899 serial_outp(up, UART_FCR, fcr); /* set fcr */ 900 } 901 902 up->cflag = cflag; 903 904 spin_unlock_irqrestore(&up->port.lock, flags); 905 } 906 907 static void 908 sunsu_set_termios(struct uart_port *port, struct ktermios *termios, 909 struct ktermios *old) 910 { 911 unsigned int baud, quot; 912 913 /* 914 * Ask the core to calculate the divisor for us. 915 */ 916 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); 917 quot = uart_get_divisor(port, baud); 918 919 sunsu_change_speed(port, termios->c_cflag, termios->c_iflag, quot); 920 } 921 922 static void sunsu_release_port(struct uart_port *port) 923 { 924 } 925 926 static int sunsu_request_port(struct uart_port *port) 927 { 928 return 0; 929 } 930 931 static void sunsu_config_port(struct uart_port *port, int flags) 932 { 933 struct uart_sunsu_port *up = 934 container_of(port, struct uart_sunsu_port, port); 935 936 if (flags & UART_CONFIG_TYPE) { 937 /* 938 * We are supposed to call autoconfig here, but this requires 939 * splitting all the OBP probing crap from the UART probing. 940 * We'll do it when we kill sunsu.c altogether. 941 */ 942 port->type = up->type_probed; /* XXX */ 943 } 944 } 945 946 static int 947 sunsu_verify_port(struct uart_port *port, struct serial_struct *ser) 948 { 949 return -EINVAL; 950 } 951 952 static const char * 953 sunsu_type(struct uart_port *port) 954 { 955 int type = port->type; 956 957 if (type >= ARRAY_SIZE(uart_config)) 958 type = 0; 959 return uart_config[type].name; 960 } 961 962 static const struct uart_ops sunsu_pops = { 963 .tx_empty = sunsu_tx_empty, 964 .set_mctrl = sunsu_set_mctrl, 965 .get_mctrl = sunsu_get_mctrl, 966 .stop_tx = sunsu_stop_tx, 967 .start_tx = sunsu_start_tx, 968 .stop_rx = sunsu_stop_rx, 969 .enable_ms = sunsu_enable_ms, 970 .break_ctl = sunsu_break_ctl, 971 .startup = sunsu_startup, 972 .shutdown = sunsu_shutdown, 973 .set_termios = sunsu_set_termios, 974 .type = sunsu_type, 975 .release_port = sunsu_release_port, 976 .request_port = sunsu_request_port, 977 .config_port = sunsu_config_port, 978 .verify_port = sunsu_verify_port, 979 }; 980 981 #define UART_NR 4 982 983 static struct uart_sunsu_port sunsu_ports[UART_NR]; 984 static int nr_inst; /* Number of already registered ports */ 985 986 #ifdef CONFIG_SERIO 987 988 static DEFINE_SPINLOCK(sunsu_serio_lock); 989 990 static int sunsu_serio_write(struct serio *serio, unsigned char ch) 991 { 992 struct uart_sunsu_port *up = serio->port_data; 993 unsigned long flags; 994 int lsr; 995 996 spin_lock_irqsave(&sunsu_serio_lock, flags); 997 998 do { 999 lsr = serial_in(up, UART_LSR); 1000 } while (!(lsr & UART_LSR_THRE)); 1001 1002 /* Send the character out. */ 1003 serial_out(up, UART_TX, ch); 1004 1005 spin_unlock_irqrestore(&sunsu_serio_lock, flags); 1006 1007 return 0; 1008 } 1009 1010 static int sunsu_serio_open(struct serio *serio) 1011 { 1012 struct uart_sunsu_port *up = serio->port_data; 1013 unsigned long flags; 1014 int ret; 1015 1016 spin_lock_irqsave(&sunsu_serio_lock, flags); 1017 if (!up->serio_open) { 1018 up->serio_open = 1; 1019 ret = 0; 1020 } else 1021 ret = -EBUSY; 1022 spin_unlock_irqrestore(&sunsu_serio_lock, flags); 1023 1024 return ret; 1025 } 1026 1027 static void sunsu_serio_close(struct serio *serio) 1028 { 1029 struct uart_sunsu_port *up = serio->port_data; 1030 unsigned long flags; 1031 1032 spin_lock_irqsave(&sunsu_serio_lock, flags); 1033 up->serio_open = 0; 1034 spin_unlock_irqrestore(&sunsu_serio_lock, flags); 1035 } 1036 1037 #endif /* CONFIG_SERIO */ 1038 1039 static void sunsu_autoconfig(struct uart_sunsu_port *up) 1040 { 1041 unsigned char status1, status2, scratch, scratch2, scratch3; 1042 unsigned char save_lcr, save_mcr; 1043 unsigned long flags; 1044 1045 if (up->su_type == SU_PORT_NONE) 1046 return; 1047 1048 up->type_probed = PORT_UNKNOWN; 1049 up->port.iotype = UPIO_MEM; 1050 1051 spin_lock_irqsave(&up->port.lock, flags); 1052 1053 if (!(up->port.flags & UPF_BUGGY_UART)) { 1054 /* 1055 * Do a simple existence test first; if we fail this, there's 1056 * no point trying anything else. 1057 * 1058 * 0x80 is used as a nonsense port to prevent against false 1059 * positives due to ISA bus float. The assumption is that 1060 * 0x80 is a non-existent port; which should be safe since 1061 * include/asm/io.h also makes this assumption. 1062 */ 1063 scratch = serial_inp(up, UART_IER); 1064 serial_outp(up, UART_IER, 0); 1065 #ifdef __i386__ 1066 outb(0xff, 0x080); 1067 #endif 1068 scratch2 = serial_inp(up, UART_IER); 1069 serial_outp(up, UART_IER, 0x0f); 1070 #ifdef __i386__ 1071 outb(0, 0x080); 1072 #endif 1073 scratch3 = serial_inp(up, UART_IER); 1074 serial_outp(up, UART_IER, scratch); 1075 if (scratch2 != 0 || scratch3 != 0x0F) 1076 goto out; /* We failed; there's nothing here */ 1077 } 1078 1079 save_mcr = serial_in(up, UART_MCR); 1080 save_lcr = serial_in(up, UART_LCR); 1081 1082 /* 1083 * Check to see if a UART is really there. Certain broken 1084 * internal modems based on the Rockwell chipset fail this 1085 * test, because they apparently don't implement the loopback 1086 * test mode. So this test is skipped on the COM 1 through 1087 * COM 4 ports. This *should* be safe, since no board 1088 * manufacturer would be stupid enough to design a board 1089 * that conflicts with COM 1-4 --- we hope! 1090 */ 1091 if (!(up->port.flags & UPF_SKIP_TEST)) { 1092 serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A); 1093 status1 = serial_inp(up, UART_MSR) & 0xF0; 1094 serial_outp(up, UART_MCR, save_mcr); 1095 if (status1 != 0x90) 1096 goto out; /* We failed loopback test */ 1097 } 1098 serial_outp(up, UART_LCR, 0xBF); /* set up for StarTech test */ 1099 serial_outp(up, UART_EFR, 0); /* EFR is the same as FCR */ 1100 serial_outp(up, UART_LCR, 0); 1101 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO); 1102 scratch = serial_in(up, UART_IIR) >> 6; 1103 switch (scratch) { 1104 case 0: 1105 up->port.type = PORT_16450; 1106 break; 1107 case 1: 1108 up->port.type = PORT_UNKNOWN; 1109 break; 1110 case 2: 1111 up->port.type = PORT_16550; 1112 break; 1113 case 3: 1114 up->port.type = PORT_16550A; 1115 break; 1116 } 1117 if (up->port.type == PORT_16550A) { 1118 /* Check for Startech UART's */ 1119 serial_outp(up, UART_LCR, UART_LCR_DLAB); 1120 if (serial_in(up, UART_EFR) == 0) { 1121 up->port.type = PORT_16650; 1122 } else { 1123 serial_outp(up, UART_LCR, 0xBF); 1124 if (serial_in(up, UART_EFR) == 0) 1125 up->port.type = PORT_16650V2; 1126 } 1127 } 1128 if (up->port.type == PORT_16550A) { 1129 /* Check for TI 16750 */ 1130 serial_outp(up, UART_LCR, save_lcr | UART_LCR_DLAB); 1131 serial_outp(up, UART_FCR, 1132 UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE); 1133 scratch = serial_in(up, UART_IIR) >> 5; 1134 if (scratch == 7) { 1135 /* 1136 * If this is a 16750, and not a cheap UART 1137 * clone, then it should only go into 64 byte 1138 * mode if the UART_FCR7_64BYTE bit was set 1139 * while UART_LCR_DLAB was latched. 1140 */ 1141 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO); 1142 serial_outp(up, UART_LCR, 0); 1143 serial_outp(up, UART_FCR, 1144 UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE); 1145 scratch = serial_in(up, UART_IIR) >> 5; 1146 if (scratch == 6) 1147 up->port.type = PORT_16750; 1148 } 1149 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO); 1150 } 1151 serial_outp(up, UART_LCR, save_lcr); 1152 if (up->port.type == PORT_16450) { 1153 scratch = serial_in(up, UART_SCR); 1154 serial_outp(up, UART_SCR, 0xa5); 1155 status1 = serial_in(up, UART_SCR); 1156 serial_outp(up, UART_SCR, 0x5a); 1157 status2 = serial_in(up, UART_SCR); 1158 serial_outp(up, UART_SCR, scratch); 1159 1160 if ((status1 != 0xa5) || (status2 != 0x5a)) 1161 up->port.type = PORT_8250; 1162 } 1163 1164 up->port.fifosize = uart_config[up->port.type].dfl_xmit_fifo_size; 1165 1166 if (up->port.type == PORT_UNKNOWN) 1167 goto out; 1168 up->type_probed = up->port.type; /* XXX */ 1169 1170 /* 1171 * Reset the UART. 1172 */ 1173 #ifdef CONFIG_SERIAL_8250_RSA 1174 if (up->port.type == PORT_RSA) 1175 serial_outp(up, UART_RSA_FRR, 0); 1176 #endif 1177 serial_outp(up, UART_MCR, save_mcr); 1178 serial_outp(up, UART_FCR, (UART_FCR_ENABLE_FIFO | 1179 UART_FCR_CLEAR_RCVR | 1180 UART_FCR_CLEAR_XMIT)); 1181 serial_outp(up, UART_FCR, 0); 1182 (void)serial_in(up, UART_RX); 1183 serial_outp(up, UART_IER, 0); 1184 1185 out: 1186 spin_unlock_irqrestore(&up->port.lock, flags); 1187 } 1188 1189 static struct uart_driver sunsu_reg = { 1190 .owner = THIS_MODULE, 1191 .driver_name = "sunsu", 1192 .dev_name = "ttyS", 1193 .major = TTY_MAJOR, 1194 }; 1195 1196 static int sunsu_kbd_ms_init(struct uart_sunsu_port *up) 1197 { 1198 int quot, baud; 1199 #ifdef CONFIG_SERIO 1200 struct serio *serio; 1201 #endif 1202 1203 if (up->su_type == SU_PORT_KBD) { 1204 up->cflag = B1200 | CS8 | CLOCAL | CREAD; 1205 baud = 1200; 1206 } else { 1207 up->cflag = B4800 | CS8 | CLOCAL | CREAD; 1208 baud = 4800; 1209 } 1210 quot = up->port.uartclk / (16 * baud); 1211 1212 sunsu_autoconfig(up); 1213 if (up->port.type == PORT_UNKNOWN) 1214 return -ENODEV; 1215 1216 printk("%pOF: %s port at %llx, irq %u\n", 1217 up->port.dev->of_node, 1218 (up->su_type == SU_PORT_KBD) ? "Keyboard" : "Mouse", 1219 (unsigned long long) up->port.mapbase, 1220 up->port.irq); 1221 1222 #ifdef CONFIG_SERIO 1223 serio = &up->serio; 1224 serio->port_data = up; 1225 1226 serio->id.type = SERIO_RS232; 1227 if (up->su_type == SU_PORT_KBD) { 1228 serio->id.proto = SERIO_SUNKBD; 1229 strlcpy(serio->name, "sukbd", sizeof(serio->name)); 1230 } else { 1231 serio->id.proto = SERIO_SUN; 1232 serio->id.extra = 1; 1233 strlcpy(serio->name, "sums", sizeof(serio->name)); 1234 } 1235 strlcpy(serio->phys, 1236 (!(up->port.line & 1) ? "su/serio0" : "su/serio1"), 1237 sizeof(serio->phys)); 1238 1239 serio->write = sunsu_serio_write; 1240 serio->open = sunsu_serio_open; 1241 serio->close = sunsu_serio_close; 1242 serio->dev.parent = up->port.dev; 1243 1244 serio_register_port(serio); 1245 #endif 1246 1247 sunsu_change_speed(&up->port, up->cflag, 0, quot); 1248 1249 sunsu_startup(&up->port); 1250 return 0; 1251 } 1252 1253 /* 1254 * ------------------------------------------------------------ 1255 * Serial console driver 1256 * ------------------------------------------------------------ 1257 */ 1258 1259 #ifdef CONFIG_SERIAL_SUNSU_CONSOLE 1260 1261 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE) 1262 1263 /* 1264 * Wait for transmitter & holding register to empty 1265 */ 1266 static void wait_for_xmitr(struct uart_sunsu_port *up) 1267 { 1268 unsigned int status, tmout = 10000; 1269 1270 /* Wait up to 10ms for the character(s) to be sent. */ 1271 do { 1272 status = serial_in(up, UART_LSR); 1273 1274 if (status & UART_LSR_BI) 1275 up->lsr_break_flag = UART_LSR_BI; 1276 1277 if (--tmout == 0) 1278 break; 1279 udelay(1); 1280 } while ((status & BOTH_EMPTY) != BOTH_EMPTY); 1281 1282 /* Wait up to 1s for flow control if necessary */ 1283 if (up->port.flags & UPF_CONS_FLOW) { 1284 tmout = 1000000; 1285 while (--tmout && 1286 ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0)) 1287 udelay(1); 1288 } 1289 } 1290 1291 static void sunsu_console_putchar(struct uart_port *port, int ch) 1292 { 1293 struct uart_sunsu_port *up = 1294 container_of(port, struct uart_sunsu_port, port); 1295 1296 wait_for_xmitr(up); 1297 serial_out(up, UART_TX, ch); 1298 } 1299 1300 /* 1301 * Print a string to the serial port trying not to disturb 1302 * any possible real use of the port... 1303 */ 1304 static void sunsu_console_write(struct console *co, const char *s, 1305 unsigned int count) 1306 { 1307 struct uart_sunsu_port *up = &sunsu_ports[co->index]; 1308 unsigned long flags; 1309 unsigned int ier; 1310 int locked = 1; 1311 1312 if (up->port.sysrq || oops_in_progress) 1313 locked = spin_trylock_irqsave(&up->port.lock, flags); 1314 else 1315 spin_lock_irqsave(&up->port.lock, flags); 1316 1317 /* 1318 * First save the UER then disable the interrupts 1319 */ 1320 ier = serial_in(up, UART_IER); 1321 serial_out(up, UART_IER, 0); 1322 1323 uart_console_write(&up->port, s, count, sunsu_console_putchar); 1324 1325 /* 1326 * Finally, wait for transmitter to become empty 1327 * and restore the IER 1328 */ 1329 wait_for_xmitr(up); 1330 serial_out(up, UART_IER, ier); 1331 1332 if (locked) 1333 spin_unlock_irqrestore(&up->port.lock, flags); 1334 } 1335 1336 /* 1337 * Setup initial baud/bits/parity. We do two things here: 1338 * - construct a cflag setting for the first su_open() 1339 * - initialize the serial port 1340 * Return non-zero if we didn't find a serial port. 1341 */ 1342 static int __init sunsu_console_setup(struct console *co, char *options) 1343 { 1344 static struct ktermios dummy; 1345 struct ktermios termios; 1346 struct uart_port *port; 1347 1348 printk("Console: ttyS%d (SU)\n", 1349 (sunsu_reg.minor - 64) + co->index); 1350 1351 if (co->index > nr_inst) 1352 return -ENODEV; 1353 port = &sunsu_ports[co->index].port; 1354 1355 /* 1356 * Temporary fix. 1357 */ 1358 spin_lock_init(&port->lock); 1359 1360 /* Get firmware console settings. */ 1361 sunserial_console_termios(co, port->dev->of_node); 1362 1363 memset(&termios, 0, sizeof(struct ktermios)); 1364 termios.c_cflag = co->cflag; 1365 port->mctrl |= TIOCM_DTR; 1366 port->ops->set_termios(port, &termios, &dummy); 1367 1368 return 0; 1369 } 1370 1371 static struct console sunsu_console = { 1372 .name = "ttyS", 1373 .write = sunsu_console_write, 1374 .device = uart_console_device, 1375 .setup = sunsu_console_setup, 1376 .flags = CON_PRINTBUFFER, 1377 .index = -1, 1378 .data = &sunsu_reg, 1379 }; 1380 1381 /* 1382 * Register console. 1383 */ 1384 1385 static inline struct console *SUNSU_CONSOLE(void) 1386 { 1387 return &sunsu_console; 1388 } 1389 #else 1390 #define SUNSU_CONSOLE() (NULL) 1391 #define sunsu_serial_console_init() do { } while (0) 1392 #endif 1393 1394 static enum su_type su_get_type(struct device_node *dp) 1395 { 1396 struct device_node *ap = of_find_node_by_path("/aliases"); 1397 enum su_type rc = SU_PORT_PORT; 1398 1399 if (ap) { 1400 const char *keyb = of_get_property(ap, "keyboard", NULL); 1401 const char *ms = of_get_property(ap, "mouse", NULL); 1402 struct device_node *match; 1403 1404 if (keyb) { 1405 match = of_find_node_by_path(keyb); 1406 1407 /* 1408 * The pointer is used as an identifier not 1409 * as a pointer, we can drop the refcount on 1410 * the of__node immediately after getting it. 1411 */ 1412 of_node_put(match); 1413 1414 if (dp == match) { 1415 rc = SU_PORT_KBD; 1416 goto out; 1417 } 1418 } 1419 if (ms) { 1420 match = of_find_node_by_path(ms); 1421 1422 of_node_put(match); 1423 1424 if (dp == match) { 1425 rc = SU_PORT_MS; 1426 goto out; 1427 } 1428 } 1429 } 1430 1431 out: 1432 of_node_put(ap); 1433 return rc; 1434 } 1435 1436 static int su_probe(struct platform_device *op) 1437 { 1438 struct device_node *dp = op->dev.of_node; 1439 struct uart_sunsu_port *up; 1440 struct resource *rp; 1441 enum su_type type; 1442 bool ignore_line; 1443 int err; 1444 1445 type = su_get_type(dp); 1446 if (type == SU_PORT_PORT) { 1447 if (nr_inst >= UART_NR) 1448 return -EINVAL; 1449 up = &sunsu_ports[nr_inst]; 1450 } else { 1451 up = kzalloc(sizeof(*up), GFP_KERNEL); 1452 if (!up) 1453 return -ENOMEM; 1454 } 1455 1456 up->port.line = nr_inst; 1457 1458 spin_lock_init(&up->port.lock); 1459 1460 up->su_type = type; 1461 1462 rp = &op->resource[0]; 1463 up->port.mapbase = rp->start; 1464 up->reg_size = resource_size(rp); 1465 up->port.membase = of_ioremap(rp, 0, up->reg_size, "su"); 1466 if (!up->port.membase) { 1467 if (type != SU_PORT_PORT) 1468 kfree(up); 1469 return -ENOMEM; 1470 } 1471 1472 up->port.irq = op->archdata.irqs[0]; 1473 1474 up->port.dev = &op->dev; 1475 1476 up->port.type = PORT_UNKNOWN; 1477 up->port.uartclk = (SU_BASE_BAUD * 16); 1478 1479 err = 0; 1480 if (up->su_type == SU_PORT_KBD || up->su_type == SU_PORT_MS) { 1481 err = sunsu_kbd_ms_init(up); 1482 if (err) { 1483 of_iounmap(&op->resource[0], 1484 up->port.membase, up->reg_size); 1485 kfree(up); 1486 return err; 1487 } 1488 platform_set_drvdata(op, up); 1489 1490 nr_inst++; 1491 1492 return 0; 1493 } 1494 1495 up->port.flags |= UPF_BOOT_AUTOCONF; 1496 1497 sunsu_autoconfig(up); 1498 1499 err = -ENODEV; 1500 if (up->port.type == PORT_UNKNOWN) 1501 goto out_unmap; 1502 1503 up->port.ops = &sunsu_pops; 1504 1505 ignore_line = false; 1506 if (of_node_name_eq(dp, "rsc-console") || 1507 of_node_name_eq(dp, "lom-console")) 1508 ignore_line = true; 1509 1510 sunserial_console_match(SUNSU_CONSOLE(), dp, 1511 &sunsu_reg, up->port.line, 1512 ignore_line); 1513 err = uart_add_one_port(&sunsu_reg, &up->port); 1514 if (err) 1515 goto out_unmap; 1516 1517 platform_set_drvdata(op, up); 1518 1519 nr_inst++; 1520 1521 return 0; 1522 1523 out_unmap: 1524 of_iounmap(&op->resource[0], up->port.membase, up->reg_size); 1525 kfree(up); 1526 return err; 1527 } 1528 1529 static int su_remove(struct platform_device *op) 1530 { 1531 struct uart_sunsu_port *up = platform_get_drvdata(op); 1532 bool kbdms = false; 1533 1534 if (up->su_type == SU_PORT_MS || 1535 up->su_type == SU_PORT_KBD) 1536 kbdms = true; 1537 1538 if (kbdms) { 1539 #ifdef CONFIG_SERIO 1540 serio_unregister_port(&up->serio); 1541 #endif 1542 } else if (up->port.type != PORT_UNKNOWN) 1543 uart_remove_one_port(&sunsu_reg, &up->port); 1544 1545 if (up->port.membase) 1546 of_iounmap(&op->resource[0], up->port.membase, up->reg_size); 1547 1548 if (kbdms) 1549 kfree(up); 1550 1551 return 0; 1552 } 1553 1554 static const struct of_device_id su_match[] = { 1555 { 1556 .name = "su", 1557 }, 1558 { 1559 .name = "su_pnp", 1560 }, 1561 { 1562 .name = "serial", 1563 .compatible = "su", 1564 }, 1565 { 1566 .type = "serial", 1567 .compatible = "su", 1568 }, 1569 {}, 1570 }; 1571 MODULE_DEVICE_TABLE(of, su_match); 1572 1573 static struct platform_driver su_driver = { 1574 .driver = { 1575 .name = "su", 1576 .of_match_table = su_match, 1577 }, 1578 .probe = su_probe, 1579 .remove = su_remove, 1580 }; 1581 1582 static int __init sunsu_init(void) 1583 { 1584 struct device_node *dp; 1585 int err; 1586 int num_uart = 0; 1587 1588 for_each_node_by_name(dp, "su") { 1589 if (su_get_type(dp) == SU_PORT_PORT) 1590 num_uart++; 1591 } 1592 for_each_node_by_name(dp, "su_pnp") { 1593 if (su_get_type(dp) == SU_PORT_PORT) 1594 num_uart++; 1595 } 1596 for_each_node_by_name(dp, "serial") { 1597 if (of_device_is_compatible(dp, "su")) { 1598 if (su_get_type(dp) == SU_PORT_PORT) 1599 num_uart++; 1600 } 1601 } 1602 for_each_node_by_type(dp, "serial") { 1603 if (of_device_is_compatible(dp, "su")) { 1604 if (su_get_type(dp) == SU_PORT_PORT) 1605 num_uart++; 1606 } 1607 } 1608 1609 if (num_uart) { 1610 err = sunserial_register_minors(&sunsu_reg, num_uart); 1611 if (err) 1612 return err; 1613 } 1614 1615 err = platform_driver_register(&su_driver); 1616 if (err && num_uart) 1617 sunserial_unregister_minors(&sunsu_reg, num_uart); 1618 1619 return err; 1620 } 1621 1622 static void __exit sunsu_exit(void) 1623 { 1624 platform_driver_unregister(&su_driver); 1625 if (sunsu_reg.nr) 1626 sunserial_unregister_minors(&sunsu_reg, sunsu_reg.nr); 1627 } 1628 1629 module_init(sunsu_init); 1630 module_exit(sunsu_exit); 1631 1632 MODULE_AUTHOR("Eddie C. Dost, Peter Zaitcev, and David S. Miller"); 1633 MODULE_DESCRIPTION("Sun SU serial port driver"); 1634 MODULE_VERSION("2.0"); 1635 MODULE_LICENSE("GPL"); 1636