1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * st-asc.c: ST Asynchronous serial controller (ASC) driver 4 * 5 * Copyright (C) 2003-2013 STMicroelectronics (R&D) Limited 6 */ 7 8 #if defined(CONFIG_SERIAL_ST_ASC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) 9 #define SUPPORT_SYSRQ 10 #endif 11 12 #include <linux/module.h> 13 #include <linux/serial.h> 14 #include <linux/console.h> 15 #include <linux/sysrq.h> 16 #include <linux/pinctrl/consumer.h> 17 #include <linux/platform_device.h> 18 #include <linux/io.h> 19 #include <linux/irq.h> 20 #include <linux/tty.h> 21 #include <linux/tty_flip.h> 22 #include <linux/delay.h> 23 #include <linux/spinlock.h> 24 #include <linux/pm_runtime.h> 25 #include <linux/of.h> 26 #include <linux/of_platform.h> 27 #include <linux/serial_core.h> 28 #include <linux/clk.h> 29 #include <linux/gpio/consumer.h> 30 31 #define DRIVER_NAME "st-asc" 32 #define ASC_SERIAL_NAME "ttyAS" 33 #define ASC_FIFO_SIZE 16 34 #define ASC_MAX_PORTS 8 35 36 /* Pinctrl states */ 37 #define DEFAULT 0 38 #define NO_HW_FLOWCTRL 1 39 40 struct asc_port { 41 struct uart_port port; 42 struct gpio_desc *rts; 43 struct clk *clk; 44 struct pinctrl *pinctrl; 45 struct pinctrl_state *states[2]; 46 unsigned int hw_flow_control:1; 47 unsigned int force_m1:1; 48 }; 49 50 static struct asc_port asc_ports[ASC_MAX_PORTS]; 51 static struct uart_driver asc_uart_driver; 52 53 /*---- UART Register definitions ------------------------------*/ 54 55 /* Register offsets */ 56 57 #define ASC_BAUDRATE 0x00 58 #define ASC_TXBUF 0x04 59 #define ASC_RXBUF 0x08 60 #define ASC_CTL 0x0C 61 #define ASC_INTEN 0x10 62 #define ASC_STA 0x14 63 #define ASC_GUARDTIME 0x18 64 #define ASC_TIMEOUT 0x1C 65 #define ASC_TXRESET 0x20 66 #define ASC_RXRESET 0x24 67 #define ASC_RETRIES 0x28 68 69 /* ASC_RXBUF */ 70 #define ASC_RXBUF_PE 0x100 71 #define ASC_RXBUF_FE 0x200 72 /** 73 * Some of status comes from higher bits of the character and some come from 74 * the status register. Combining both of them in to single status using dummy 75 * bits. 76 */ 77 #define ASC_RXBUF_DUMMY_RX 0x10000 78 #define ASC_RXBUF_DUMMY_BE 0x20000 79 #define ASC_RXBUF_DUMMY_OE 0x40000 80 81 /* ASC_CTL */ 82 83 #define ASC_CTL_MODE_MSK 0x0007 84 #define ASC_CTL_MODE_8BIT 0x0001 85 #define ASC_CTL_MODE_7BIT_PAR 0x0003 86 #define ASC_CTL_MODE_9BIT 0x0004 87 #define ASC_CTL_MODE_8BIT_WKUP 0x0005 88 #define ASC_CTL_MODE_8BIT_PAR 0x0007 89 #define ASC_CTL_STOP_MSK 0x0018 90 #define ASC_CTL_STOP_HALFBIT 0x0000 91 #define ASC_CTL_STOP_1BIT 0x0008 92 #define ASC_CTL_STOP_1_HALFBIT 0x0010 93 #define ASC_CTL_STOP_2BIT 0x0018 94 #define ASC_CTL_PARITYODD 0x0020 95 #define ASC_CTL_LOOPBACK 0x0040 96 #define ASC_CTL_RUN 0x0080 97 #define ASC_CTL_RXENABLE 0x0100 98 #define ASC_CTL_SCENABLE 0x0200 99 #define ASC_CTL_FIFOENABLE 0x0400 100 #define ASC_CTL_CTSENABLE 0x0800 101 #define ASC_CTL_BAUDMODE 0x1000 102 103 /* ASC_GUARDTIME */ 104 105 #define ASC_GUARDTIME_MSK 0x00FF 106 107 /* ASC_INTEN */ 108 109 #define ASC_INTEN_RBE 0x0001 110 #define ASC_INTEN_TE 0x0002 111 #define ASC_INTEN_THE 0x0004 112 #define ASC_INTEN_PE 0x0008 113 #define ASC_INTEN_FE 0x0010 114 #define ASC_INTEN_OE 0x0020 115 #define ASC_INTEN_TNE 0x0040 116 #define ASC_INTEN_TOI 0x0080 117 #define ASC_INTEN_RHF 0x0100 118 119 /* ASC_RETRIES */ 120 121 #define ASC_RETRIES_MSK 0x00FF 122 123 /* ASC_RXBUF */ 124 125 #define ASC_RXBUF_MSK 0x03FF 126 127 /* ASC_STA */ 128 129 #define ASC_STA_RBF 0x0001 130 #define ASC_STA_TE 0x0002 131 #define ASC_STA_THE 0x0004 132 #define ASC_STA_PE 0x0008 133 #define ASC_STA_FE 0x0010 134 #define ASC_STA_OE 0x0020 135 #define ASC_STA_TNE 0x0040 136 #define ASC_STA_TOI 0x0080 137 #define ASC_STA_RHF 0x0100 138 #define ASC_STA_TF 0x0200 139 #define ASC_STA_NKD 0x0400 140 141 /* ASC_TIMEOUT */ 142 143 #define ASC_TIMEOUT_MSK 0x00FF 144 145 /* ASC_TXBUF */ 146 147 #define ASC_TXBUF_MSK 0x01FF 148 149 /*---- Inline function definitions ---------------------------*/ 150 151 static inline struct asc_port *to_asc_port(struct uart_port *port) 152 { 153 return container_of(port, struct asc_port, port); 154 } 155 156 static inline u32 asc_in(struct uart_port *port, u32 offset) 157 { 158 #ifdef readl_relaxed 159 return readl_relaxed(port->membase + offset); 160 #else 161 return readl(port->membase + offset); 162 #endif 163 } 164 165 static inline void asc_out(struct uart_port *port, u32 offset, u32 value) 166 { 167 #ifdef writel_relaxed 168 writel_relaxed(value, port->membase + offset); 169 #else 170 writel(value, port->membase + offset); 171 #endif 172 } 173 174 /* 175 * Some simple utility functions to enable and disable interrupts. 176 * Note that these need to be called with interrupts disabled. 177 */ 178 static inline void asc_disable_tx_interrupts(struct uart_port *port) 179 { 180 u32 intenable = asc_in(port, ASC_INTEN) & ~ASC_INTEN_THE; 181 asc_out(port, ASC_INTEN, intenable); 182 (void)asc_in(port, ASC_INTEN); /* Defeat bus write posting */ 183 } 184 185 static inline void asc_enable_tx_interrupts(struct uart_port *port) 186 { 187 u32 intenable = asc_in(port, ASC_INTEN) | ASC_INTEN_THE; 188 asc_out(port, ASC_INTEN, intenable); 189 } 190 191 static inline void asc_disable_rx_interrupts(struct uart_port *port) 192 { 193 u32 intenable = asc_in(port, ASC_INTEN) & ~ASC_INTEN_RBE; 194 asc_out(port, ASC_INTEN, intenable); 195 (void)asc_in(port, ASC_INTEN); /* Defeat bus write posting */ 196 } 197 198 static inline void asc_enable_rx_interrupts(struct uart_port *port) 199 { 200 u32 intenable = asc_in(port, ASC_INTEN) | ASC_INTEN_RBE; 201 asc_out(port, ASC_INTEN, intenable); 202 } 203 204 static inline u32 asc_txfifo_is_empty(struct uart_port *port) 205 { 206 return asc_in(port, ASC_STA) & ASC_STA_TE; 207 } 208 209 static inline u32 asc_txfifo_is_half_empty(struct uart_port *port) 210 { 211 return asc_in(port, ASC_STA) & ASC_STA_THE; 212 } 213 214 static inline const char *asc_port_name(struct uart_port *port) 215 { 216 return to_platform_device(port->dev)->name; 217 } 218 219 /*----------------------------------------------------------------------*/ 220 221 /* 222 * This section contains code to support the use of the ASC as a 223 * generic serial port. 224 */ 225 226 static inline unsigned asc_hw_txroom(struct uart_port *port) 227 { 228 u32 status = asc_in(port, ASC_STA); 229 230 if (status & ASC_STA_THE) 231 return port->fifosize / 2; 232 else if (!(status & ASC_STA_TF)) 233 return 1; 234 235 return 0; 236 } 237 238 /* 239 * Start transmitting chars. 240 * This is called from both interrupt and task level. 241 * Either way interrupts are disabled. 242 */ 243 static void asc_transmit_chars(struct uart_port *port) 244 { 245 struct circ_buf *xmit = &port->state->xmit; 246 int txroom; 247 unsigned char c; 248 249 txroom = asc_hw_txroom(port); 250 251 if ((txroom != 0) && port->x_char) { 252 c = port->x_char; 253 port->x_char = 0; 254 asc_out(port, ASC_TXBUF, c); 255 port->icount.tx++; 256 txroom = asc_hw_txroom(port); 257 } 258 259 if (uart_tx_stopped(port)) { 260 /* 261 * We should try and stop the hardware here, but I 262 * don't think the ASC has any way to do that. 263 */ 264 asc_disable_tx_interrupts(port); 265 return; 266 } 267 268 if (uart_circ_empty(xmit)) { 269 asc_disable_tx_interrupts(port); 270 return; 271 } 272 273 if (txroom == 0) 274 return; 275 276 do { 277 c = xmit->buf[xmit->tail]; 278 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 279 asc_out(port, ASC_TXBUF, c); 280 port->icount.tx++; 281 txroom--; 282 } while ((txroom > 0) && (!uart_circ_empty(xmit))); 283 284 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 285 uart_write_wakeup(port); 286 287 if (uart_circ_empty(xmit)) 288 asc_disable_tx_interrupts(port); 289 } 290 291 static void asc_receive_chars(struct uart_port *port) 292 { 293 struct tty_port *tport = &port->state->port; 294 unsigned long status, mode; 295 unsigned long c = 0; 296 char flag; 297 bool ignore_pe = false; 298 299 /* 300 * Datasheet states: If the MODE field selects an 8-bit frame then 301 * this [parity error] bit is undefined. Software should ignore this 302 * bit when reading 8-bit frames. 303 */ 304 mode = asc_in(port, ASC_CTL) & ASC_CTL_MODE_MSK; 305 if (mode == ASC_CTL_MODE_8BIT || mode == ASC_CTL_MODE_8BIT_PAR) 306 ignore_pe = true; 307 308 if (irqd_is_wakeup_set(irq_get_irq_data(port->irq))) 309 pm_wakeup_event(tport->tty->dev, 0); 310 311 while ((status = asc_in(port, ASC_STA)) & ASC_STA_RBF) { 312 c = asc_in(port, ASC_RXBUF) | ASC_RXBUF_DUMMY_RX; 313 flag = TTY_NORMAL; 314 port->icount.rx++; 315 316 if (status & ASC_STA_OE || c & ASC_RXBUF_FE || 317 (c & ASC_RXBUF_PE && !ignore_pe)) { 318 319 if (c & ASC_RXBUF_FE) { 320 if (c == (ASC_RXBUF_FE | ASC_RXBUF_DUMMY_RX)) { 321 port->icount.brk++; 322 if (uart_handle_break(port)) 323 continue; 324 c |= ASC_RXBUF_DUMMY_BE; 325 } else { 326 port->icount.frame++; 327 } 328 } else if (c & ASC_RXBUF_PE) { 329 port->icount.parity++; 330 } 331 /* 332 * Reading any data from the RX FIFO clears the 333 * overflow error condition. 334 */ 335 if (status & ASC_STA_OE) { 336 port->icount.overrun++; 337 c |= ASC_RXBUF_DUMMY_OE; 338 } 339 340 c &= port->read_status_mask; 341 342 if (c & ASC_RXBUF_DUMMY_BE) 343 flag = TTY_BREAK; 344 else if (c & ASC_RXBUF_PE) 345 flag = TTY_PARITY; 346 else if (c & ASC_RXBUF_FE) 347 flag = TTY_FRAME; 348 } 349 350 if (uart_handle_sysrq_char(port, c & 0xff)) 351 continue; 352 353 uart_insert_char(port, c, ASC_RXBUF_DUMMY_OE, c & 0xff, flag); 354 } 355 356 /* Tell the rest of the system the news. New characters! */ 357 tty_flip_buffer_push(tport); 358 } 359 360 static irqreturn_t asc_interrupt(int irq, void *ptr) 361 { 362 struct uart_port *port = ptr; 363 u32 status; 364 365 spin_lock(&port->lock); 366 367 status = asc_in(port, ASC_STA); 368 369 if (status & ASC_STA_RBF) { 370 /* Receive FIFO not empty */ 371 asc_receive_chars(port); 372 } 373 374 if ((status & ASC_STA_THE) && 375 (asc_in(port, ASC_INTEN) & ASC_INTEN_THE)) { 376 /* Transmitter FIFO at least half empty */ 377 asc_transmit_chars(port); 378 } 379 380 spin_unlock(&port->lock); 381 382 return IRQ_HANDLED; 383 } 384 385 /*----------------------------------------------------------------------*/ 386 387 /* 388 * UART Functions 389 */ 390 391 static unsigned int asc_tx_empty(struct uart_port *port) 392 { 393 return asc_txfifo_is_empty(port) ? TIOCSER_TEMT : 0; 394 } 395 396 static void asc_set_mctrl(struct uart_port *port, unsigned int mctrl) 397 { 398 struct asc_port *ascport = to_asc_port(port); 399 400 /* 401 * This routine is used for seting signals of: DTR, DCD, CTS and RTS. 402 * We use ASC's hardware for CTS/RTS when hardware flow-control is 403 * enabled, however if the RTS line is required for another purpose, 404 * commonly controlled using HUP from userspace, then we need to toggle 405 * it manually, using GPIO. 406 * 407 * Some boards also have DTR and DCD implemented using PIO pins, code to 408 * do this should be hooked in here. 409 */ 410 411 if (!ascport->rts) 412 return; 413 414 /* If HW flow-control is enabled, we can't fiddle with the RTS line */ 415 if (asc_in(port, ASC_CTL) & ASC_CTL_CTSENABLE) 416 return; 417 418 gpiod_set_value(ascport->rts, mctrl & TIOCM_RTS); 419 } 420 421 static unsigned int asc_get_mctrl(struct uart_port *port) 422 { 423 /* 424 * This routine is used for geting signals of: DTR, DCD, DSR, RI, 425 * and CTS/RTS 426 */ 427 return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS; 428 } 429 430 /* There are probably characters waiting to be transmitted. */ 431 static void asc_start_tx(struct uart_port *port) 432 { 433 struct circ_buf *xmit = &port->state->xmit; 434 435 if (!uart_circ_empty(xmit)) 436 asc_enable_tx_interrupts(port); 437 } 438 439 /* Transmit stop */ 440 static void asc_stop_tx(struct uart_port *port) 441 { 442 asc_disable_tx_interrupts(port); 443 } 444 445 /* Receive stop */ 446 static void asc_stop_rx(struct uart_port *port) 447 { 448 asc_disable_rx_interrupts(port); 449 } 450 451 /* Handle breaks - ignored by us */ 452 static void asc_break_ctl(struct uart_port *port, int break_state) 453 { 454 /* Nothing here yet .. */ 455 } 456 457 /* 458 * Enable port for reception. 459 */ 460 static int asc_startup(struct uart_port *port) 461 { 462 if (request_irq(port->irq, asc_interrupt, 0, 463 asc_port_name(port), port)) { 464 dev_err(port->dev, "cannot allocate irq.\n"); 465 return -ENODEV; 466 } 467 468 asc_transmit_chars(port); 469 asc_enable_rx_interrupts(port); 470 471 return 0; 472 } 473 474 static void asc_shutdown(struct uart_port *port) 475 { 476 asc_disable_tx_interrupts(port); 477 asc_disable_rx_interrupts(port); 478 free_irq(port->irq, port); 479 } 480 481 static void asc_pm(struct uart_port *port, unsigned int state, 482 unsigned int oldstate) 483 { 484 struct asc_port *ascport = to_asc_port(port); 485 unsigned long flags = 0; 486 u32 ctl; 487 488 switch (state) { 489 case UART_PM_STATE_ON: 490 clk_prepare_enable(ascport->clk); 491 break; 492 case UART_PM_STATE_OFF: 493 /* 494 * Disable the ASC baud rate generator, which is as close as 495 * we can come to turning it off. Note this is not called with 496 * the port spinlock held. 497 */ 498 spin_lock_irqsave(&port->lock, flags); 499 ctl = asc_in(port, ASC_CTL) & ~ASC_CTL_RUN; 500 asc_out(port, ASC_CTL, ctl); 501 spin_unlock_irqrestore(&port->lock, flags); 502 clk_disable_unprepare(ascport->clk); 503 break; 504 } 505 } 506 507 static void asc_set_termios(struct uart_port *port, struct ktermios *termios, 508 struct ktermios *old) 509 { 510 struct asc_port *ascport = to_asc_port(port); 511 struct device_node *np = port->dev->of_node; 512 struct gpio_desc *gpiod; 513 unsigned int baud; 514 u32 ctrl_val; 515 tcflag_t cflag; 516 unsigned long flags; 517 518 /* Update termios to reflect hardware capabilities */ 519 termios->c_cflag &= ~(CMSPAR | 520 (ascport->hw_flow_control ? 0 : CRTSCTS)); 521 522 port->uartclk = clk_get_rate(ascport->clk); 523 524 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); 525 cflag = termios->c_cflag; 526 527 spin_lock_irqsave(&port->lock, flags); 528 529 /* read control register */ 530 ctrl_val = asc_in(port, ASC_CTL); 531 532 /* stop serial port and reset value */ 533 asc_out(port, ASC_CTL, (ctrl_val & ~ASC_CTL_RUN)); 534 ctrl_val = ASC_CTL_RXENABLE | ASC_CTL_FIFOENABLE; 535 536 /* reset fifo rx & tx */ 537 asc_out(port, ASC_TXRESET, 1); 538 asc_out(port, ASC_RXRESET, 1); 539 540 /* set character length */ 541 if ((cflag & CSIZE) == CS7) { 542 ctrl_val |= ASC_CTL_MODE_7BIT_PAR; 543 } else { 544 ctrl_val |= (cflag & PARENB) ? ASC_CTL_MODE_8BIT_PAR : 545 ASC_CTL_MODE_8BIT; 546 } 547 548 /* set stop bit */ 549 ctrl_val |= (cflag & CSTOPB) ? ASC_CTL_STOP_2BIT : ASC_CTL_STOP_1BIT; 550 551 /* odd parity */ 552 if (cflag & PARODD) 553 ctrl_val |= ASC_CTL_PARITYODD; 554 555 /* hardware flow control */ 556 if ((cflag & CRTSCTS)) { 557 ctrl_val |= ASC_CTL_CTSENABLE; 558 559 /* If flow-control selected, stop handling RTS manually */ 560 if (ascport->rts) { 561 devm_gpiod_put(port->dev, ascport->rts); 562 ascport->rts = NULL; 563 564 pinctrl_select_state(ascport->pinctrl, 565 ascport->states[DEFAULT]); 566 } 567 } else { 568 /* If flow-control disabled, it's safe to handle RTS manually */ 569 if (!ascport->rts && ascport->states[NO_HW_FLOWCTRL]) { 570 pinctrl_select_state(ascport->pinctrl, 571 ascport->states[NO_HW_FLOWCTRL]); 572 573 gpiod = devm_fwnode_get_gpiod_from_child(port->dev, 574 "rts", 575 &np->fwnode, 576 GPIOD_OUT_LOW, 577 np->name); 578 if (!IS_ERR(gpiod)) 579 ascport->rts = gpiod; 580 } 581 } 582 583 if ((baud < 19200) && !ascport->force_m1) { 584 asc_out(port, ASC_BAUDRATE, (port->uartclk / (16 * baud))); 585 } else { 586 /* 587 * MODE 1: recommended for high bit rates (above 19.2K) 588 * 589 * baudrate * 16 * 2^16 590 * ASCBaudRate = ------------------------ 591 * inputclock 592 * 593 * To keep maths inside 64bits, we divide inputclock by 16. 594 */ 595 u64 dividend = (u64)baud * (1 << 16); 596 597 do_div(dividend, port->uartclk / 16); 598 asc_out(port, ASC_BAUDRATE, dividend); 599 ctrl_val |= ASC_CTL_BAUDMODE; 600 } 601 602 uart_update_timeout(port, cflag, baud); 603 604 ascport->port.read_status_mask = ASC_RXBUF_DUMMY_OE; 605 if (termios->c_iflag & INPCK) 606 ascport->port.read_status_mask |= ASC_RXBUF_FE | ASC_RXBUF_PE; 607 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK)) 608 ascport->port.read_status_mask |= ASC_RXBUF_DUMMY_BE; 609 610 /* 611 * Characters to ignore 612 */ 613 ascport->port.ignore_status_mask = 0; 614 if (termios->c_iflag & IGNPAR) 615 ascport->port.ignore_status_mask |= ASC_RXBUF_FE | ASC_RXBUF_PE; 616 if (termios->c_iflag & IGNBRK) { 617 ascport->port.ignore_status_mask |= ASC_RXBUF_DUMMY_BE; 618 /* 619 * If we're ignoring parity and break indicators, 620 * ignore overruns too (for real raw support). 621 */ 622 if (termios->c_iflag & IGNPAR) 623 ascport->port.ignore_status_mask |= ASC_RXBUF_DUMMY_OE; 624 } 625 626 /* 627 * Ignore all characters if CREAD is not set. 628 */ 629 if (!(termios->c_cflag & CREAD)) 630 ascport->port.ignore_status_mask |= ASC_RXBUF_DUMMY_RX; 631 632 /* Set the timeout */ 633 asc_out(port, ASC_TIMEOUT, 20); 634 635 /* write final value and enable port */ 636 asc_out(port, ASC_CTL, (ctrl_val | ASC_CTL_RUN)); 637 638 spin_unlock_irqrestore(&port->lock, flags); 639 } 640 641 static const char *asc_type(struct uart_port *port) 642 { 643 return (port->type == PORT_ASC) ? DRIVER_NAME : NULL; 644 } 645 646 static void asc_release_port(struct uart_port *port) 647 { 648 } 649 650 static int asc_request_port(struct uart_port *port) 651 { 652 return 0; 653 } 654 655 /* 656 * Called when the port is opened, and UPF_BOOT_AUTOCONF flag is set 657 * Set type field if successful 658 */ 659 static void asc_config_port(struct uart_port *port, int flags) 660 { 661 if ((flags & UART_CONFIG_TYPE)) 662 port->type = PORT_ASC; 663 } 664 665 static int 666 asc_verify_port(struct uart_port *port, struct serial_struct *ser) 667 { 668 /* No user changeable parameters */ 669 return -EINVAL; 670 } 671 672 #ifdef CONFIG_CONSOLE_POLL 673 /* 674 * Console polling routines for writing and reading from the uart while 675 * in an interrupt or debug context (i.e. kgdb). 676 */ 677 678 static int asc_get_poll_char(struct uart_port *port) 679 { 680 if (!(asc_in(port, ASC_STA) & ASC_STA_RBF)) 681 return NO_POLL_CHAR; 682 683 return asc_in(port, ASC_RXBUF); 684 } 685 686 static void asc_put_poll_char(struct uart_port *port, unsigned char c) 687 { 688 while (!asc_txfifo_is_half_empty(port)) 689 cpu_relax(); 690 asc_out(port, ASC_TXBUF, c); 691 } 692 693 #endif /* CONFIG_CONSOLE_POLL */ 694 695 /*---------------------------------------------------------------------*/ 696 697 static const struct uart_ops asc_uart_ops = { 698 .tx_empty = asc_tx_empty, 699 .set_mctrl = asc_set_mctrl, 700 .get_mctrl = asc_get_mctrl, 701 .start_tx = asc_start_tx, 702 .stop_tx = asc_stop_tx, 703 .stop_rx = asc_stop_rx, 704 .break_ctl = asc_break_ctl, 705 .startup = asc_startup, 706 .shutdown = asc_shutdown, 707 .set_termios = asc_set_termios, 708 .type = asc_type, 709 .release_port = asc_release_port, 710 .request_port = asc_request_port, 711 .config_port = asc_config_port, 712 .verify_port = asc_verify_port, 713 .pm = asc_pm, 714 #ifdef CONFIG_CONSOLE_POLL 715 .poll_get_char = asc_get_poll_char, 716 .poll_put_char = asc_put_poll_char, 717 #endif /* CONFIG_CONSOLE_POLL */ 718 }; 719 720 static int asc_init_port(struct asc_port *ascport, 721 struct platform_device *pdev) 722 { 723 struct uart_port *port = &ascport->port; 724 struct resource *res; 725 int ret; 726 727 port->iotype = UPIO_MEM; 728 port->flags = UPF_BOOT_AUTOCONF; 729 port->ops = &asc_uart_ops; 730 port->fifosize = ASC_FIFO_SIZE; 731 port->dev = &pdev->dev; 732 port->irq = platform_get_irq(pdev, 0); 733 734 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 735 port->membase = devm_ioremap_resource(&pdev->dev, res); 736 if (IS_ERR(port->membase)) 737 return PTR_ERR(port->membase); 738 port->mapbase = res->start; 739 740 spin_lock_init(&port->lock); 741 742 ascport->clk = devm_clk_get(&pdev->dev, NULL); 743 744 if (WARN_ON(IS_ERR(ascport->clk))) 745 return -EINVAL; 746 /* ensure that clk rate is correct by enabling the clk */ 747 clk_prepare_enable(ascport->clk); 748 ascport->port.uartclk = clk_get_rate(ascport->clk); 749 WARN_ON(ascport->port.uartclk == 0); 750 clk_disable_unprepare(ascport->clk); 751 752 ascport->pinctrl = devm_pinctrl_get(&pdev->dev); 753 if (IS_ERR(ascport->pinctrl)) { 754 ret = PTR_ERR(ascport->pinctrl); 755 dev_err(&pdev->dev, "Failed to get Pinctrl: %d\n", ret); 756 return ret; 757 } 758 759 ascport->states[DEFAULT] = 760 pinctrl_lookup_state(ascport->pinctrl, "default"); 761 if (IS_ERR(ascport->states[DEFAULT])) { 762 ret = PTR_ERR(ascport->states[DEFAULT]); 763 dev_err(&pdev->dev, 764 "Failed to look up Pinctrl state 'default': %d\n", ret); 765 return ret; 766 } 767 768 /* "no-hw-flowctrl" state is optional */ 769 ascport->states[NO_HW_FLOWCTRL] = 770 pinctrl_lookup_state(ascport->pinctrl, "no-hw-flowctrl"); 771 if (IS_ERR(ascport->states[NO_HW_FLOWCTRL])) 772 ascport->states[NO_HW_FLOWCTRL] = NULL; 773 774 return 0; 775 } 776 777 static struct asc_port *asc_of_get_asc_port(struct platform_device *pdev) 778 { 779 struct device_node *np = pdev->dev.of_node; 780 int id; 781 782 if (!np) 783 return NULL; 784 785 id = of_alias_get_id(np, ASC_SERIAL_NAME); 786 787 if (id < 0) 788 id = 0; 789 790 if (WARN_ON(id >= ASC_MAX_PORTS)) 791 return NULL; 792 793 asc_ports[id].hw_flow_control = of_property_read_bool(np, 794 "uart-has-rtscts"); 795 asc_ports[id].force_m1 = of_property_read_bool(np, "st,force_m1"); 796 asc_ports[id].port.line = id; 797 asc_ports[id].rts = NULL; 798 799 return &asc_ports[id]; 800 } 801 802 #ifdef CONFIG_OF 803 static const struct of_device_id asc_match[] = { 804 { .compatible = "st,asc", }, 805 {}, 806 }; 807 808 MODULE_DEVICE_TABLE(of, asc_match); 809 #endif 810 811 static int asc_serial_probe(struct platform_device *pdev) 812 { 813 int ret; 814 struct asc_port *ascport; 815 816 ascport = asc_of_get_asc_port(pdev); 817 if (!ascport) 818 return -ENODEV; 819 820 ret = asc_init_port(ascport, pdev); 821 if (ret) 822 return ret; 823 824 ret = uart_add_one_port(&asc_uart_driver, &ascport->port); 825 if (ret) 826 return ret; 827 828 platform_set_drvdata(pdev, &ascport->port); 829 830 return 0; 831 } 832 833 static int asc_serial_remove(struct platform_device *pdev) 834 { 835 struct uart_port *port = platform_get_drvdata(pdev); 836 837 return uart_remove_one_port(&asc_uart_driver, port); 838 } 839 840 #ifdef CONFIG_PM_SLEEP 841 static int asc_serial_suspend(struct device *dev) 842 { 843 struct platform_device *pdev = to_platform_device(dev); 844 struct uart_port *port = platform_get_drvdata(pdev); 845 846 return uart_suspend_port(&asc_uart_driver, port); 847 } 848 849 static int asc_serial_resume(struct device *dev) 850 { 851 struct platform_device *pdev = to_platform_device(dev); 852 struct uart_port *port = platform_get_drvdata(pdev); 853 854 return uart_resume_port(&asc_uart_driver, port); 855 } 856 857 #endif /* CONFIG_PM_SLEEP */ 858 859 /*----------------------------------------------------------------------*/ 860 861 #ifdef CONFIG_SERIAL_ST_ASC_CONSOLE 862 static void asc_console_putchar(struct uart_port *port, int ch) 863 { 864 unsigned int timeout = 1000000; 865 866 /* Wait for upto 1 second in case flow control is stopping us. */ 867 while (--timeout && !asc_txfifo_is_half_empty(port)) 868 udelay(1); 869 870 asc_out(port, ASC_TXBUF, ch); 871 } 872 873 /* 874 * Print a string to the serial port trying not to disturb 875 * any possible real use of the port... 876 */ 877 878 static void asc_console_write(struct console *co, const char *s, unsigned count) 879 { 880 struct uart_port *port = &asc_ports[co->index].port; 881 unsigned long flags; 882 unsigned long timeout = 1000000; 883 int locked = 1; 884 u32 intenable; 885 886 if (port->sysrq) 887 locked = 0; /* asc_interrupt has already claimed the lock */ 888 else if (oops_in_progress) 889 locked = spin_trylock_irqsave(&port->lock, flags); 890 else 891 spin_lock_irqsave(&port->lock, flags); 892 893 /* 894 * Disable interrupts so we don't get the IRQ line bouncing 895 * up and down while interrupts are disabled. 896 */ 897 intenable = asc_in(port, ASC_INTEN); 898 asc_out(port, ASC_INTEN, 0); 899 (void)asc_in(port, ASC_INTEN); /* Defeat bus write posting */ 900 901 uart_console_write(port, s, count, asc_console_putchar); 902 903 while (--timeout && !asc_txfifo_is_empty(port)) 904 udelay(1); 905 906 asc_out(port, ASC_INTEN, intenable); 907 908 if (locked) 909 spin_unlock_irqrestore(&port->lock, flags); 910 } 911 912 static int asc_console_setup(struct console *co, char *options) 913 { 914 struct asc_port *ascport; 915 int baud = 115200; 916 int bits = 8; 917 int parity = 'n'; 918 int flow = 'n'; 919 920 if (co->index >= ASC_MAX_PORTS) 921 return -ENODEV; 922 923 ascport = &asc_ports[co->index]; 924 925 /* 926 * This driver does not support early console initialization 927 * (use ARM early printk support instead), so we only expect 928 * this to be called during the uart port registration when the 929 * driver gets probed and the port should be mapped at that point. 930 */ 931 if (ascport->port.mapbase == 0 || ascport->port.membase == NULL) 932 return -ENXIO; 933 934 if (options) 935 uart_parse_options(options, &baud, &parity, &bits, &flow); 936 937 return uart_set_options(&ascport->port, co, baud, parity, bits, flow); 938 } 939 940 static struct console asc_console = { 941 .name = ASC_SERIAL_NAME, 942 .device = uart_console_device, 943 .write = asc_console_write, 944 .setup = asc_console_setup, 945 .flags = CON_PRINTBUFFER, 946 .index = -1, 947 .data = &asc_uart_driver, 948 }; 949 950 #define ASC_SERIAL_CONSOLE (&asc_console) 951 952 #else 953 #define ASC_SERIAL_CONSOLE NULL 954 #endif /* CONFIG_SERIAL_ST_ASC_CONSOLE */ 955 956 static struct uart_driver asc_uart_driver = { 957 .owner = THIS_MODULE, 958 .driver_name = DRIVER_NAME, 959 .dev_name = ASC_SERIAL_NAME, 960 .major = 0, 961 .minor = 0, 962 .nr = ASC_MAX_PORTS, 963 .cons = ASC_SERIAL_CONSOLE, 964 }; 965 966 static const struct dev_pm_ops asc_serial_pm_ops = { 967 SET_SYSTEM_SLEEP_PM_OPS(asc_serial_suspend, asc_serial_resume) 968 }; 969 970 static struct platform_driver asc_serial_driver = { 971 .probe = asc_serial_probe, 972 .remove = asc_serial_remove, 973 .driver = { 974 .name = DRIVER_NAME, 975 .pm = &asc_serial_pm_ops, 976 .of_match_table = of_match_ptr(asc_match), 977 }, 978 }; 979 980 static int __init asc_init(void) 981 { 982 int ret; 983 static const char banner[] __initconst = 984 KERN_INFO "STMicroelectronics ASC driver initialized\n"; 985 986 printk(banner); 987 988 ret = uart_register_driver(&asc_uart_driver); 989 if (ret) 990 return ret; 991 992 ret = platform_driver_register(&asc_serial_driver); 993 if (ret) 994 uart_unregister_driver(&asc_uart_driver); 995 996 return ret; 997 } 998 999 static void __exit asc_exit(void) 1000 { 1001 platform_driver_unregister(&asc_serial_driver); 1002 uart_unregister_driver(&asc_uart_driver); 1003 } 1004 1005 module_init(asc_init); 1006 module_exit(asc_exit); 1007 1008 MODULE_ALIAS("platform:" DRIVER_NAME); 1009 MODULE_AUTHOR("STMicroelectronics (R&D) Limited"); 1010 MODULE_DESCRIPTION("STMicroelectronics ASC serial port driver"); 1011 MODULE_LICENSE("GPL"); 1012