1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * st-asc.c: ST Asynchronous serial controller (ASC) driver 4 * 5 * Copyright (C) 2003-2013 STMicroelectronics (R&D) Limited 6 */ 7 8 #include <linux/module.h> 9 #include <linux/serial.h> 10 #include <linux/console.h> 11 #include <linux/sysrq.h> 12 #include <linux/pinctrl/consumer.h> 13 #include <linux/platform_device.h> 14 #include <linux/io.h> 15 #include <linux/irq.h> 16 #include <linux/tty.h> 17 #include <linux/tty_flip.h> 18 #include <linux/delay.h> 19 #include <linux/spinlock.h> 20 #include <linux/of.h> 21 #include <linux/of_platform.h> 22 #include <linux/serial_core.h> 23 #include <linux/clk.h> 24 #include <linux/gpio/consumer.h> 25 26 #define DRIVER_NAME "st-asc" 27 #define ASC_SERIAL_NAME "ttyAS" 28 #define ASC_FIFO_SIZE 16 29 #define ASC_MAX_PORTS 8 30 31 /* Pinctrl states */ 32 #define DEFAULT 0 33 #define NO_HW_FLOWCTRL 1 34 35 struct asc_port { 36 struct uart_port port; 37 struct gpio_desc *rts; 38 struct clk *clk; 39 struct pinctrl *pinctrl; 40 struct pinctrl_state *states[2]; 41 unsigned int hw_flow_control:1; 42 unsigned int force_m1:1; 43 }; 44 45 static struct asc_port asc_ports[ASC_MAX_PORTS]; 46 static struct uart_driver asc_uart_driver; 47 48 /*---- UART Register definitions ------------------------------*/ 49 50 /* Register offsets */ 51 52 #define ASC_BAUDRATE 0x00 53 #define ASC_TXBUF 0x04 54 #define ASC_RXBUF 0x08 55 #define ASC_CTL 0x0C 56 #define ASC_INTEN 0x10 57 #define ASC_STA 0x14 58 #define ASC_GUARDTIME 0x18 59 #define ASC_TIMEOUT 0x1C 60 #define ASC_TXRESET 0x20 61 #define ASC_RXRESET 0x24 62 #define ASC_RETRIES 0x28 63 64 /* ASC_RXBUF */ 65 #define ASC_RXBUF_PE 0x100 66 #define ASC_RXBUF_FE 0x200 67 /* 68 * Some of status comes from higher bits of the character and some come from 69 * the status register. Combining both of them in to single status using dummy 70 * bits. 71 */ 72 #define ASC_RXBUF_DUMMY_RX 0x10000 73 #define ASC_RXBUF_DUMMY_BE 0x20000 74 #define ASC_RXBUF_DUMMY_OE 0x40000 75 76 /* ASC_CTL */ 77 78 #define ASC_CTL_MODE_MSK 0x0007 79 #define ASC_CTL_MODE_8BIT 0x0001 80 #define ASC_CTL_MODE_7BIT_PAR 0x0003 81 #define ASC_CTL_MODE_9BIT 0x0004 82 #define ASC_CTL_MODE_8BIT_WKUP 0x0005 83 #define ASC_CTL_MODE_8BIT_PAR 0x0007 84 #define ASC_CTL_STOP_MSK 0x0018 85 #define ASC_CTL_STOP_HALFBIT 0x0000 86 #define ASC_CTL_STOP_1BIT 0x0008 87 #define ASC_CTL_STOP_1_HALFBIT 0x0010 88 #define ASC_CTL_STOP_2BIT 0x0018 89 #define ASC_CTL_PARITYODD 0x0020 90 #define ASC_CTL_LOOPBACK 0x0040 91 #define ASC_CTL_RUN 0x0080 92 #define ASC_CTL_RXENABLE 0x0100 93 #define ASC_CTL_SCENABLE 0x0200 94 #define ASC_CTL_FIFOENABLE 0x0400 95 #define ASC_CTL_CTSENABLE 0x0800 96 #define ASC_CTL_BAUDMODE 0x1000 97 98 /* ASC_GUARDTIME */ 99 100 #define ASC_GUARDTIME_MSK 0x00FF 101 102 /* ASC_INTEN */ 103 104 #define ASC_INTEN_RBE 0x0001 105 #define ASC_INTEN_TE 0x0002 106 #define ASC_INTEN_THE 0x0004 107 #define ASC_INTEN_PE 0x0008 108 #define ASC_INTEN_FE 0x0010 109 #define ASC_INTEN_OE 0x0020 110 #define ASC_INTEN_TNE 0x0040 111 #define ASC_INTEN_TOI 0x0080 112 #define ASC_INTEN_RHF 0x0100 113 114 /* ASC_RETRIES */ 115 116 #define ASC_RETRIES_MSK 0x00FF 117 118 /* ASC_RXBUF */ 119 120 #define ASC_RXBUF_MSK 0x03FF 121 122 /* ASC_STA */ 123 124 #define ASC_STA_RBF 0x0001 125 #define ASC_STA_TE 0x0002 126 #define ASC_STA_THE 0x0004 127 #define ASC_STA_PE 0x0008 128 #define ASC_STA_FE 0x0010 129 #define ASC_STA_OE 0x0020 130 #define ASC_STA_TNE 0x0040 131 #define ASC_STA_TOI 0x0080 132 #define ASC_STA_RHF 0x0100 133 #define ASC_STA_TF 0x0200 134 #define ASC_STA_NKD 0x0400 135 136 /* ASC_TIMEOUT */ 137 138 #define ASC_TIMEOUT_MSK 0x00FF 139 140 /* ASC_TXBUF */ 141 142 #define ASC_TXBUF_MSK 0x01FF 143 144 /*---- Inline function definitions ---------------------------*/ 145 146 static inline struct asc_port *to_asc_port(struct uart_port *port) 147 { 148 return container_of(port, struct asc_port, port); 149 } 150 151 static inline u32 asc_in(struct uart_port *port, u32 offset) 152 { 153 #ifdef readl_relaxed 154 return readl_relaxed(port->membase + offset); 155 #else 156 return readl(port->membase + offset); 157 #endif 158 } 159 160 static inline void asc_out(struct uart_port *port, u32 offset, u32 value) 161 { 162 #ifdef writel_relaxed 163 writel_relaxed(value, port->membase + offset); 164 #else 165 writel(value, port->membase + offset); 166 #endif 167 } 168 169 /* 170 * Some simple utility functions to enable and disable interrupts. 171 * Note that these need to be called with interrupts disabled. 172 */ 173 static inline void asc_disable_tx_interrupts(struct uart_port *port) 174 { 175 u32 intenable = asc_in(port, ASC_INTEN) & ~ASC_INTEN_THE; 176 asc_out(port, ASC_INTEN, intenable); 177 (void)asc_in(port, ASC_INTEN); /* Defeat bus write posting */ 178 } 179 180 static inline void asc_enable_tx_interrupts(struct uart_port *port) 181 { 182 u32 intenable = asc_in(port, ASC_INTEN) | ASC_INTEN_THE; 183 asc_out(port, ASC_INTEN, intenable); 184 } 185 186 static inline void asc_disable_rx_interrupts(struct uart_port *port) 187 { 188 u32 intenable = asc_in(port, ASC_INTEN) & ~ASC_INTEN_RBE; 189 asc_out(port, ASC_INTEN, intenable); 190 (void)asc_in(port, ASC_INTEN); /* Defeat bus write posting */ 191 } 192 193 static inline void asc_enable_rx_interrupts(struct uart_port *port) 194 { 195 u32 intenable = asc_in(port, ASC_INTEN) | ASC_INTEN_RBE; 196 asc_out(port, ASC_INTEN, intenable); 197 } 198 199 static inline u32 asc_txfifo_is_empty(struct uart_port *port) 200 { 201 return asc_in(port, ASC_STA) & ASC_STA_TE; 202 } 203 204 static inline u32 asc_txfifo_is_half_empty(struct uart_port *port) 205 { 206 return asc_in(port, ASC_STA) & ASC_STA_THE; 207 } 208 209 static inline const char *asc_port_name(struct uart_port *port) 210 { 211 return to_platform_device(port->dev)->name; 212 } 213 214 /*----------------------------------------------------------------------*/ 215 216 /* 217 * This section contains code to support the use of the ASC as a 218 * generic serial port. 219 */ 220 221 static inline unsigned asc_hw_txroom(struct uart_port *port) 222 { 223 u32 status = asc_in(port, ASC_STA); 224 225 if (status & ASC_STA_THE) 226 return port->fifosize / 2; 227 else if (!(status & ASC_STA_TF)) 228 return 1; 229 230 return 0; 231 } 232 233 /* 234 * Start transmitting chars. 235 * This is called from both interrupt and task level. 236 * Either way interrupts are disabled. 237 */ 238 static void asc_transmit_chars(struct uart_port *port) 239 { 240 struct circ_buf *xmit = &port->state->xmit; 241 int txroom; 242 unsigned char c; 243 244 txroom = asc_hw_txroom(port); 245 246 if ((txroom != 0) && port->x_char) { 247 c = port->x_char; 248 port->x_char = 0; 249 asc_out(port, ASC_TXBUF, c); 250 port->icount.tx++; 251 txroom = asc_hw_txroom(port); 252 } 253 254 if (uart_tx_stopped(port)) { 255 /* 256 * We should try and stop the hardware here, but I 257 * don't think the ASC has any way to do that. 258 */ 259 asc_disable_tx_interrupts(port); 260 return; 261 } 262 263 if (uart_circ_empty(xmit)) { 264 asc_disable_tx_interrupts(port); 265 return; 266 } 267 268 if (txroom == 0) 269 return; 270 271 do { 272 c = xmit->buf[xmit->tail]; 273 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 274 asc_out(port, ASC_TXBUF, c); 275 port->icount.tx++; 276 txroom--; 277 } while ((txroom > 0) && (!uart_circ_empty(xmit))); 278 279 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 280 uart_write_wakeup(port); 281 282 if (uart_circ_empty(xmit)) 283 asc_disable_tx_interrupts(port); 284 } 285 286 static void asc_receive_chars(struct uart_port *port) 287 { 288 struct tty_port *tport = &port->state->port; 289 unsigned long status, mode; 290 unsigned long c = 0; 291 char flag; 292 bool ignore_pe = false; 293 294 /* 295 * Datasheet states: If the MODE field selects an 8-bit frame then 296 * this [parity error] bit is undefined. Software should ignore this 297 * bit when reading 8-bit frames. 298 */ 299 mode = asc_in(port, ASC_CTL) & ASC_CTL_MODE_MSK; 300 if (mode == ASC_CTL_MODE_8BIT || mode == ASC_CTL_MODE_8BIT_PAR) 301 ignore_pe = true; 302 303 if (irqd_is_wakeup_set(irq_get_irq_data(port->irq))) 304 pm_wakeup_event(tport->tty->dev, 0); 305 306 while ((status = asc_in(port, ASC_STA)) & ASC_STA_RBF) { 307 c = asc_in(port, ASC_RXBUF) | ASC_RXBUF_DUMMY_RX; 308 flag = TTY_NORMAL; 309 port->icount.rx++; 310 311 if (status & ASC_STA_OE || c & ASC_RXBUF_FE || 312 (c & ASC_RXBUF_PE && !ignore_pe)) { 313 314 if (c & ASC_RXBUF_FE) { 315 if (c == (ASC_RXBUF_FE | ASC_RXBUF_DUMMY_RX)) { 316 port->icount.brk++; 317 if (uart_handle_break(port)) 318 continue; 319 c |= ASC_RXBUF_DUMMY_BE; 320 } else { 321 port->icount.frame++; 322 } 323 } else if (c & ASC_RXBUF_PE) { 324 port->icount.parity++; 325 } 326 /* 327 * Reading any data from the RX FIFO clears the 328 * overflow error condition. 329 */ 330 if (status & ASC_STA_OE) { 331 port->icount.overrun++; 332 c |= ASC_RXBUF_DUMMY_OE; 333 } 334 335 c &= port->read_status_mask; 336 337 if (c & ASC_RXBUF_DUMMY_BE) 338 flag = TTY_BREAK; 339 else if (c & ASC_RXBUF_PE) 340 flag = TTY_PARITY; 341 else if (c & ASC_RXBUF_FE) 342 flag = TTY_FRAME; 343 } 344 345 if (uart_handle_sysrq_char(port, c & 0xff)) 346 continue; 347 348 uart_insert_char(port, c, ASC_RXBUF_DUMMY_OE, c & 0xff, flag); 349 } 350 351 /* Tell the rest of the system the news. New characters! */ 352 tty_flip_buffer_push(tport); 353 } 354 355 static irqreturn_t asc_interrupt(int irq, void *ptr) 356 { 357 struct uart_port *port = ptr; 358 u32 status; 359 360 spin_lock(&port->lock); 361 362 status = asc_in(port, ASC_STA); 363 364 if (status & ASC_STA_RBF) { 365 /* Receive FIFO not empty */ 366 asc_receive_chars(port); 367 } 368 369 if ((status & ASC_STA_THE) && 370 (asc_in(port, ASC_INTEN) & ASC_INTEN_THE)) { 371 /* Transmitter FIFO at least half empty */ 372 asc_transmit_chars(port); 373 } 374 375 spin_unlock(&port->lock); 376 377 return IRQ_HANDLED; 378 } 379 380 /*----------------------------------------------------------------------*/ 381 382 /* 383 * UART Functions 384 */ 385 386 static unsigned int asc_tx_empty(struct uart_port *port) 387 { 388 return asc_txfifo_is_empty(port) ? TIOCSER_TEMT : 0; 389 } 390 391 static void asc_set_mctrl(struct uart_port *port, unsigned int mctrl) 392 { 393 struct asc_port *ascport = to_asc_port(port); 394 395 /* 396 * This routine is used for seting signals of: DTR, DCD, CTS and RTS. 397 * We use ASC's hardware for CTS/RTS when hardware flow-control is 398 * enabled, however if the RTS line is required for another purpose, 399 * commonly controlled using HUP from userspace, then we need to toggle 400 * it manually, using GPIO. 401 * 402 * Some boards also have DTR and DCD implemented using PIO pins, code to 403 * do this should be hooked in here. 404 */ 405 406 if (!ascport->rts) 407 return; 408 409 /* If HW flow-control is enabled, we can't fiddle with the RTS line */ 410 if (asc_in(port, ASC_CTL) & ASC_CTL_CTSENABLE) 411 return; 412 413 gpiod_set_value(ascport->rts, mctrl & TIOCM_RTS); 414 } 415 416 static unsigned int asc_get_mctrl(struct uart_port *port) 417 { 418 /* 419 * This routine is used for geting signals of: DTR, DCD, DSR, RI, 420 * and CTS/RTS 421 */ 422 return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS; 423 } 424 425 /* There are probably characters waiting to be transmitted. */ 426 static void asc_start_tx(struct uart_port *port) 427 { 428 struct circ_buf *xmit = &port->state->xmit; 429 430 if (!uart_circ_empty(xmit)) 431 asc_enable_tx_interrupts(port); 432 } 433 434 /* Transmit stop */ 435 static void asc_stop_tx(struct uart_port *port) 436 { 437 asc_disable_tx_interrupts(port); 438 } 439 440 /* Receive stop */ 441 static void asc_stop_rx(struct uart_port *port) 442 { 443 asc_disable_rx_interrupts(port); 444 } 445 446 /* Handle breaks - ignored by us */ 447 static void asc_break_ctl(struct uart_port *port, int break_state) 448 { 449 /* Nothing here yet .. */ 450 } 451 452 /* 453 * Enable port for reception. 454 */ 455 static int asc_startup(struct uart_port *port) 456 { 457 if (request_irq(port->irq, asc_interrupt, 0, 458 asc_port_name(port), port)) { 459 dev_err(port->dev, "cannot allocate irq.\n"); 460 return -ENODEV; 461 } 462 463 asc_transmit_chars(port); 464 asc_enable_rx_interrupts(port); 465 466 return 0; 467 } 468 469 static void asc_shutdown(struct uart_port *port) 470 { 471 asc_disable_tx_interrupts(port); 472 asc_disable_rx_interrupts(port); 473 free_irq(port->irq, port); 474 } 475 476 static void asc_pm(struct uart_port *port, unsigned int state, 477 unsigned int oldstate) 478 { 479 struct asc_port *ascport = to_asc_port(port); 480 unsigned long flags; 481 u32 ctl; 482 483 switch (state) { 484 case UART_PM_STATE_ON: 485 clk_prepare_enable(ascport->clk); 486 break; 487 case UART_PM_STATE_OFF: 488 /* 489 * Disable the ASC baud rate generator, which is as close as 490 * we can come to turning it off. Note this is not called with 491 * the port spinlock held. 492 */ 493 spin_lock_irqsave(&port->lock, flags); 494 ctl = asc_in(port, ASC_CTL) & ~ASC_CTL_RUN; 495 asc_out(port, ASC_CTL, ctl); 496 spin_unlock_irqrestore(&port->lock, flags); 497 clk_disable_unprepare(ascport->clk); 498 break; 499 } 500 } 501 502 static void asc_set_termios(struct uart_port *port, struct ktermios *termios, 503 struct ktermios *old) 504 { 505 struct asc_port *ascport = to_asc_port(port); 506 struct gpio_desc *gpiod; 507 unsigned int baud; 508 u32 ctrl_val; 509 tcflag_t cflag; 510 unsigned long flags; 511 512 /* Update termios to reflect hardware capabilities */ 513 termios->c_cflag &= ~(CMSPAR | 514 (ascport->hw_flow_control ? 0 : CRTSCTS)); 515 516 port->uartclk = clk_get_rate(ascport->clk); 517 518 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); 519 cflag = termios->c_cflag; 520 521 spin_lock_irqsave(&port->lock, flags); 522 523 /* read control register */ 524 ctrl_val = asc_in(port, ASC_CTL); 525 526 /* stop serial port and reset value */ 527 asc_out(port, ASC_CTL, (ctrl_val & ~ASC_CTL_RUN)); 528 ctrl_val = ASC_CTL_RXENABLE | ASC_CTL_FIFOENABLE; 529 530 /* reset fifo rx & tx */ 531 asc_out(port, ASC_TXRESET, 1); 532 asc_out(port, ASC_RXRESET, 1); 533 534 /* set character length */ 535 if ((cflag & CSIZE) == CS7) { 536 ctrl_val |= ASC_CTL_MODE_7BIT_PAR; 537 cflag |= PARENB; 538 } else { 539 ctrl_val |= (cflag & PARENB) ? ASC_CTL_MODE_8BIT_PAR : 540 ASC_CTL_MODE_8BIT; 541 cflag &= ~CSIZE; 542 cflag |= CS8; 543 } 544 termios->c_cflag = cflag; 545 546 /* set stop bit */ 547 ctrl_val |= (cflag & CSTOPB) ? ASC_CTL_STOP_2BIT : ASC_CTL_STOP_1BIT; 548 549 /* odd parity */ 550 if (cflag & PARODD) 551 ctrl_val |= ASC_CTL_PARITYODD; 552 553 /* hardware flow control */ 554 if ((cflag & CRTSCTS)) { 555 ctrl_val |= ASC_CTL_CTSENABLE; 556 557 /* If flow-control selected, stop handling RTS manually */ 558 if (ascport->rts) { 559 devm_gpiod_put(port->dev, ascport->rts); 560 ascport->rts = NULL; 561 562 pinctrl_select_state(ascport->pinctrl, 563 ascport->states[DEFAULT]); 564 } 565 } else { 566 /* If flow-control disabled, it's safe to handle RTS manually */ 567 if (!ascport->rts && ascport->states[NO_HW_FLOWCTRL]) { 568 pinctrl_select_state(ascport->pinctrl, 569 ascport->states[NO_HW_FLOWCTRL]); 570 571 gpiod = devm_gpiod_get(port->dev, "rts", GPIOD_OUT_LOW); 572 if (!IS_ERR(gpiod)) { 573 gpiod_set_consumer_name(gpiod, 574 port->dev->of_node->name); 575 ascport->rts = gpiod; 576 } 577 } 578 } 579 580 if ((baud < 19200) && !ascport->force_m1) { 581 asc_out(port, ASC_BAUDRATE, (port->uartclk / (16 * baud))); 582 } else { 583 /* 584 * MODE 1: recommended for high bit rates (above 19.2K) 585 * 586 * baudrate * 16 * 2^16 587 * ASCBaudRate = ------------------------ 588 * inputclock 589 * 590 * To keep maths inside 64bits, we divide inputclock by 16. 591 */ 592 u64 dividend = (u64)baud * (1 << 16); 593 594 do_div(dividend, port->uartclk / 16); 595 asc_out(port, ASC_BAUDRATE, dividend); 596 ctrl_val |= ASC_CTL_BAUDMODE; 597 } 598 599 uart_update_timeout(port, cflag, baud); 600 601 ascport->port.read_status_mask = ASC_RXBUF_DUMMY_OE; 602 if (termios->c_iflag & INPCK) 603 ascport->port.read_status_mask |= ASC_RXBUF_FE | ASC_RXBUF_PE; 604 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK)) 605 ascport->port.read_status_mask |= ASC_RXBUF_DUMMY_BE; 606 607 /* 608 * Characters to ignore 609 */ 610 ascport->port.ignore_status_mask = 0; 611 if (termios->c_iflag & IGNPAR) 612 ascport->port.ignore_status_mask |= ASC_RXBUF_FE | ASC_RXBUF_PE; 613 if (termios->c_iflag & IGNBRK) { 614 ascport->port.ignore_status_mask |= ASC_RXBUF_DUMMY_BE; 615 /* 616 * If we're ignoring parity and break indicators, 617 * ignore overruns too (for real raw support). 618 */ 619 if (termios->c_iflag & IGNPAR) 620 ascport->port.ignore_status_mask |= ASC_RXBUF_DUMMY_OE; 621 } 622 623 /* 624 * Ignore all characters if CREAD is not set. 625 */ 626 if (!(termios->c_cflag & CREAD)) 627 ascport->port.ignore_status_mask |= ASC_RXBUF_DUMMY_RX; 628 629 /* Set the timeout */ 630 asc_out(port, ASC_TIMEOUT, 20); 631 632 /* write final value and enable port */ 633 asc_out(port, ASC_CTL, (ctrl_val | ASC_CTL_RUN)); 634 635 spin_unlock_irqrestore(&port->lock, flags); 636 } 637 638 static const char *asc_type(struct uart_port *port) 639 { 640 return (port->type == PORT_ASC) ? DRIVER_NAME : NULL; 641 } 642 643 static void asc_release_port(struct uart_port *port) 644 { 645 } 646 647 static int asc_request_port(struct uart_port *port) 648 { 649 return 0; 650 } 651 652 /* 653 * Called when the port is opened, and UPF_BOOT_AUTOCONF flag is set 654 * Set type field if successful 655 */ 656 static void asc_config_port(struct uart_port *port, int flags) 657 { 658 if ((flags & UART_CONFIG_TYPE)) 659 port->type = PORT_ASC; 660 } 661 662 static int 663 asc_verify_port(struct uart_port *port, struct serial_struct *ser) 664 { 665 /* No user changeable parameters */ 666 return -EINVAL; 667 } 668 669 #ifdef CONFIG_CONSOLE_POLL 670 /* 671 * Console polling routines for writing and reading from the uart while 672 * in an interrupt or debug context (i.e. kgdb). 673 */ 674 675 static int asc_get_poll_char(struct uart_port *port) 676 { 677 if (!(asc_in(port, ASC_STA) & ASC_STA_RBF)) 678 return NO_POLL_CHAR; 679 680 return asc_in(port, ASC_RXBUF); 681 } 682 683 static void asc_put_poll_char(struct uart_port *port, unsigned char c) 684 { 685 while (!asc_txfifo_is_half_empty(port)) 686 cpu_relax(); 687 asc_out(port, ASC_TXBUF, c); 688 } 689 690 #endif /* CONFIG_CONSOLE_POLL */ 691 692 /*---------------------------------------------------------------------*/ 693 694 static const struct uart_ops asc_uart_ops = { 695 .tx_empty = asc_tx_empty, 696 .set_mctrl = asc_set_mctrl, 697 .get_mctrl = asc_get_mctrl, 698 .start_tx = asc_start_tx, 699 .stop_tx = asc_stop_tx, 700 .stop_rx = asc_stop_rx, 701 .break_ctl = asc_break_ctl, 702 .startup = asc_startup, 703 .shutdown = asc_shutdown, 704 .set_termios = asc_set_termios, 705 .type = asc_type, 706 .release_port = asc_release_port, 707 .request_port = asc_request_port, 708 .config_port = asc_config_port, 709 .verify_port = asc_verify_port, 710 .pm = asc_pm, 711 #ifdef CONFIG_CONSOLE_POLL 712 .poll_get_char = asc_get_poll_char, 713 .poll_put_char = asc_put_poll_char, 714 #endif /* CONFIG_CONSOLE_POLL */ 715 }; 716 717 static int asc_init_port(struct asc_port *ascport, 718 struct platform_device *pdev) 719 { 720 struct uart_port *port = &ascport->port; 721 struct resource *res; 722 int ret; 723 724 port->iotype = UPIO_MEM; 725 port->flags = UPF_BOOT_AUTOCONF; 726 port->ops = &asc_uart_ops; 727 port->fifosize = ASC_FIFO_SIZE; 728 port->dev = &pdev->dev; 729 port->irq = platform_get_irq(pdev, 0); 730 port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_ST_ASC_CONSOLE); 731 732 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 733 port->membase = devm_ioremap_resource(&pdev->dev, res); 734 if (IS_ERR(port->membase)) 735 return PTR_ERR(port->membase); 736 port->mapbase = res->start; 737 738 spin_lock_init(&port->lock); 739 740 ascport->clk = devm_clk_get(&pdev->dev, NULL); 741 742 if (WARN_ON(IS_ERR(ascport->clk))) 743 return -EINVAL; 744 /* ensure that clk rate is correct by enabling the clk */ 745 clk_prepare_enable(ascport->clk); 746 ascport->port.uartclk = clk_get_rate(ascport->clk); 747 WARN_ON(ascport->port.uartclk == 0); 748 clk_disable_unprepare(ascport->clk); 749 750 ascport->pinctrl = devm_pinctrl_get(&pdev->dev); 751 if (IS_ERR(ascport->pinctrl)) { 752 ret = PTR_ERR(ascport->pinctrl); 753 dev_err(&pdev->dev, "Failed to get Pinctrl: %d\n", ret); 754 return ret; 755 } 756 757 ascport->states[DEFAULT] = 758 pinctrl_lookup_state(ascport->pinctrl, "default"); 759 if (IS_ERR(ascport->states[DEFAULT])) { 760 ret = PTR_ERR(ascport->states[DEFAULT]); 761 dev_err(&pdev->dev, 762 "Failed to look up Pinctrl state 'default': %d\n", ret); 763 return ret; 764 } 765 766 /* "no-hw-flowctrl" state is optional */ 767 ascport->states[NO_HW_FLOWCTRL] = 768 pinctrl_lookup_state(ascport->pinctrl, "no-hw-flowctrl"); 769 if (IS_ERR(ascport->states[NO_HW_FLOWCTRL])) 770 ascport->states[NO_HW_FLOWCTRL] = NULL; 771 772 return 0; 773 } 774 775 static struct asc_port *asc_of_get_asc_port(struct platform_device *pdev) 776 { 777 struct device_node *np = pdev->dev.of_node; 778 int id; 779 780 if (!np) 781 return NULL; 782 783 id = of_alias_get_id(np, "serial"); 784 if (id < 0) 785 id = of_alias_get_id(np, ASC_SERIAL_NAME); 786 787 if (id < 0) 788 id = 0; 789 790 if (WARN_ON(id >= ASC_MAX_PORTS)) 791 return NULL; 792 793 asc_ports[id].hw_flow_control = of_property_read_bool(np, 794 "uart-has-rtscts"); 795 asc_ports[id].force_m1 = of_property_read_bool(np, "st,force_m1"); 796 asc_ports[id].port.line = id; 797 asc_ports[id].rts = NULL; 798 799 return &asc_ports[id]; 800 } 801 802 #ifdef CONFIG_OF 803 static const struct of_device_id asc_match[] = { 804 { .compatible = "st,asc", }, 805 {}, 806 }; 807 808 MODULE_DEVICE_TABLE(of, asc_match); 809 #endif 810 811 static int asc_serial_probe(struct platform_device *pdev) 812 { 813 int ret; 814 struct asc_port *ascport; 815 816 ascport = asc_of_get_asc_port(pdev); 817 if (!ascport) 818 return -ENODEV; 819 820 ret = asc_init_port(ascport, pdev); 821 if (ret) 822 return ret; 823 824 ret = uart_add_one_port(&asc_uart_driver, &ascport->port); 825 if (ret) 826 return ret; 827 828 platform_set_drvdata(pdev, &ascport->port); 829 830 return 0; 831 } 832 833 static int asc_serial_remove(struct platform_device *pdev) 834 { 835 struct uart_port *port = platform_get_drvdata(pdev); 836 837 return uart_remove_one_port(&asc_uart_driver, port); 838 } 839 840 #ifdef CONFIG_PM_SLEEP 841 static int asc_serial_suspend(struct device *dev) 842 { 843 struct uart_port *port = dev_get_drvdata(dev); 844 845 return uart_suspend_port(&asc_uart_driver, port); 846 } 847 848 static int asc_serial_resume(struct device *dev) 849 { 850 struct uart_port *port = dev_get_drvdata(dev); 851 852 return uart_resume_port(&asc_uart_driver, port); 853 } 854 855 #endif /* CONFIG_PM_SLEEP */ 856 857 /*----------------------------------------------------------------------*/ 858 859 #ifdef CONFIG_SERIAL_ST_ASC_CONSOLE 860 static void asc_console_putchar(struct uart_port *port, unsigned char ch) 861 { 862 unsigned int timeout = 1000000; 863 864 /* Wait for upto 1 second in case flow control is stopping us. */ 865 while (--timeout && !asc_txfifo_is_half_empty(port)) 866 udelay(1); 867 868 asc_out(port, ASC_TXBUF, ch); 869 } 870 871 /* 872 * Print a string to the serial port trying not to disturb 873 * any possible real use of the port... 874 */ 875 876 static void asc_console_write(struct console *co, const char *s, unsigned count) 877 { 878 struct uart_port *port = &asc_ports[co->index].port; 879 unsigned long flags; 880 unsigned long timeout = 1000000; 881 int locked = 1; 882 u32 intenable; 883 884 if (port->sysrq) 885 locked = 0; /* asc_interrupt has already claimed the lock */ 886 else if (oops_in_progress) 887 locked = spin_trylock_irqsave(&port->lock, flags); 888 else 889 spin_lock_irqsave(&port->lock, flags); 890 891 /* 892 * Disable interrupts so we don't get the IRQ line bouncing 893 * up and down while interrupts are disabled. 894 */ 895 intenable = asc_in(port, ASC_INTEN); 896 asc_out(port, ASC_INTEN, 0); 897 (void)asc_in(port, ASC_INTEN); /* Defeat bus write posting */ 898 899 uart_console_write(port, s, count, asc_console_putchar); 900 901 while (--timeout && !asc_txfifo_is_empty(port)) 902 udelay(1); 903 904 asc_out(port, ASC_INTEN, intenable); 905 906 if (locked) 907 spin_unlock_irqrestore(&port->lock, flags); 908 } 909 910 static int asc_console_setup(struct console *co, char *options) 911 { 912 struct asc_port *ascport; 913 int baud = 115200; 914 int bits = 8; 915 int parity = 'n'; 916 int flow = 'n'; 917 918 if (co->index >= ASC_MAX_PORTS) 919 return -ENODEV; 920 921 ascport = &asc_ports[co->index]; 922 923 /* 924 * This driver does not support early console initialization 925 * (use ARM early printk support instead), so we only expect 926 * this to be called during the uart port registration when the 927 * driver gets probed and the port should be mapped at that point. 928 */ 929 if (ascport->port.mapbase == 0 || ascport->port.membase == NULL) 930 return -ENXIO; 931 932 if (options) 933 uart_parse_options(options, &baud, &parity, &bits, &flow); 934 935 return uart_set_options(&ascport->port, co, baud, parity, bits, flow); 936 } 937 938 static struct console asc_console = { 939 .name = ASC_SERIAL_NAME, 940 .device = uart_console_device, 941 .write = asc_console_write, 942 .setup = asc_console_setup, 943 .flags = CON_PRINTBUFFER, 944 .index = -1, 945 .data = &asc_uart_driver, 946 }; 947 948 #define ASC_SERIAL_CONSOLE (&asc_console) 949 950 #else 951 #define ASC_SERIAL_CONSOLE NULL 952 #endif /* CONFIG_SERIAL_ST_ASC_CONSOLE */ 953 954 static struct uart_driver asc_uart_driver = { 955 .owner = THIS_MODULE, 956 .driver_name = DRIVER_NAME, 957 .dev_name = ASC_SERIAL_NAME, 958 .major = 0, 959 .minor = 0, 960 .nr = ASC_MAX_PORTS, 961 .cons = ASC_SERIAL_CONSOLE, 962 }; 963 964 static const struct dev_pm_ops asc_serial_pm_ops = { 965 SET_SYSTEM_SLEEP_PM_OPS(asc_serial_suspend, asc_serial_resume) 966 }; 967 968 static struct platform_driver asc_serial_driver = { 969 .probe = asc_serial_probe, 970 .remove = asc_serial_remove, 971 .driver = { 972 .name = DRIVER_NAME, 973 .pm = &asc_serial_pm_ops, 974 .of_match_table = of_match_ptr(asc_match), 975 }, 976 }; 977 978 static int __init asc_init(void) 979 { 980 int ret; 981 static const char banner[] __initconst = 982 KERN_INFO "STMicroelectronics ASC driver initialized\n"; 983 984 printk(banner); 985 986 ret = uart_register_driver(&asc_uart_driver); 987 if (ret) 988 return ret; 989 990 ret = platform_driver_register(&asc_serial_driver); 991 if (ret) 992 uart_unregister_driver(&asc_uart_driver); 993 994 return ret; 995 } 996 997 static void __exit asc_exit(void) 998 { 999 platform_driver_unregister(&asc_serial_driver); 1000 uart_unregister_driver(&asc_uart_driver); 1001 } 1002 1003 module_init(asc_init); 1004 module_exit(asc_exit); 1005 1006 MODULE_ALIAS("platform:" DRIVER_NAME); 1007 MODULE_AUTHOR("STMicroelectronics (R&D) Limited"); 1008 MODULE_DESCRIPTION("STMicroelectronics ASC serial port driver"); 1009 MODULE_LICENSE("GPL"); 1010