1 /* 2 * st-asc.c: ST Asynchronous serial controller (ASC) driver 3 * 4 * Copyright (C) 2003-2013 STMicroelectronics (R&D) Limited 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 */ 12 13 #if defined(CONFIG_SERIAL_ST_ASC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) 14 #define SUPPORT_SYSRQ 15 #endif 16 17 #include <linux/module.h> 18 #include <linux/serial.h> 19 #include <linux/console.h> 20 #include <linux/sysrq.h> 21 #include <linux/pinctrl/consumer.h> 22 #include <linux/platform_device.h> 23 #include <linux/io.h> 24 #include <linux/irq.h> 25 #include <linux/tty.h> 26 #include <linux/tty_flip.h> 27 #include <linux/delay.h> 28 #include <linux/spinlock.h> 29 #include <linux/pm_runtime.h> 30 #include <linux/of.h> 31 #include <linux/of_platform.h> 32 #include <linux/serial_core.h> 33 #include <linux/clk.h> 34 #include <linux/gpio/consumer.h> 35 36 #define DRIVER_NAME "st-asc" 37 #define ASC_SERIAL_NAME "ttyAS" 38 #define ASC_FIFO_SIZE 16 39 #define ASC_MAX_PORTS 8 40 41 /* Pinctrl states */ 42 #define DEFAULT 0 43 #define NO_HW_FLOWCTRL 1 44 45 struct asc_port { 46 struct uart_port port; 47 struct gpio_desc *rts; 48 struct clk *clk; 49 struct pinctrl *pinctrl; 50 struct pinctrl_state *states[2]; 51 unsigned int hw_flow_control:1; 52 unsigned int force_m1:1; 53 }; 54 55 static struct asc_port asc_ports[ASC_MAX_PORTS]; 56 static struct uart_driver asc_uart_driver; 57 58 /*---- UART Register definitions ------------------------------*/ 59 60 /* Register offsets */ 61 62 #define ASC_BAUDRATE 0x00 63 #define ASC_TXBUF 0x04 64 #define ASC_RXBUF 0x08 65 #define ASC_CTL 0x0C 66 #define ASC_INTEN 0x10 67 #define ASC_STA 0x14 68 #define ASC_GUARDTIME 0x18 69 #define ASC_TIMEOUT 0x1C 70 #define ASC_TXRESET 0x20 71 #define ASC_RXRESET 0x24 72 #define ASC_RETRIES 0x28 73 74 /* ASC_RXBUF */ 75 #define ASC_RXBUF_PE 0x100 76 #define ASC_RXBUF_FE 0x200 77 /** 78 * Some of status comes from higher bits of the character and some come from 79 * the status register. Combining both of them in to single status using dummy 80 * bits. 81 */ 82 #define ASC_RXBUF_DUMMY_RX 0x10000 83 #define ASC_RXBUF_DUMMY_BE 0x20000 84 #define ASC_RXBUF_DUMMY_OE 0x40000 85 86 /* ASC_CTL */ 87 88 #define ASC_CTL_MODE_MSK 0x0007 89 #define ASC_CTL_MODE_8BIT 0x0001 90 #define ASC_CTL_MODE_7BIT_PAR 0x0003 91 #define ASC_CTL_MODE_9BIT 0x0004 92 #define ASC_CTL_MODE_8BIT_WKUP 0x0005 93 #define ASC_CTL_MODE_8BIT_PAR 0x0007 94 #define ASC_CTL_STOP_MSK 0x0018 95 #define ASC_CTL_STOP_HALFBIT 0x0000 96 #define ASC_CTL_STOP_1BIT 0x0008 97 #define ASC_CTL_STOP_1_HALFBIT 0x0010 98 #define ASC_CTL_STOP_2BIT 0x0018 99 #define ASC_CTL_PARITYODD 0x0020 100 #define ASC_CTL_LOOPBACK 0x0040 101 #define ASC_CTL_RUN 0x0080 102 #define ASC_CTL_RXENABLE 0x0100 103 #define ASC_CTL_SCENABLE 0x0200 104 #define ASC_CTL_FIFOENABLE 0x0400 105 #define ASC_CTL_CTSENABLE 0x0800 106 #define ASC_CTL_BAUDMODE 0x1000 107 108 /* ASC_GUARDTIME */ 109 110 #define ASC_GUARDTIME_MSK 0x00FF 111 112 /* ASC_INTEN */ 113 114 #define ASC_INTEN_RBE 0x0001 115 #define ASC_INTEN_TE 0x0002 116 #define ASC_INTEN_THE 0x0004 117 #define ASC_INTEN_PE 0x0008 118 #define ASC_INTEN_FE 0x0010 119 #define ASC_INTEN_OE 0x0020 120 #define ASC_INTEN_TNE 0x0040 121 #define ASC_INTEN_TOI 0x0080 122 #define ASC_INTEN_RHF 0x0100 123 124 /* ASC_RETRIES */ 125 126 #define ASC_RETRIES_MSK 0x00FF 127 128 /* ASC_RXBUF */ 129 130 #define ASC_RXBUF_MSK 0x03FF 131 132 /* ASC_STA */ 133 134 #define ASC_STA_RBF 0x0001 135 #define ASC_STA_TE 0x0002 136 #define ASC_STA_THE 0x0004 137 #define ASC_STA_PE 0x0008 138 #define ASC_STA_FE 0x0010 139 #define ASC_STA_OE 0x0020 140 #define ASC_STA_TNE 0x0040 141 #define ASC_STA_TOI 0x0080 142 #define ASC_STA_RHF 0x0100 143 #define ASC_STA_TF 0x0200 144 #define ASC_STA_NKD 0x0400 145 146 /* ASC_TIMEOUT */ 147 148 #define ASC_TIMEOUT_MSK 0x00FF 149 150 /* ASC_TXBUF */ 151 152 #define ASC_TXBUF_MSK 0x01FF 153 154 /*---- Inline function definitions ---------------------------*/ 155 156 static inline struct asc_port *to_asc_port(struct uart_port *port) 157 { 158 return container_of(port, struct asc_port, port); 159 } 160 161 static inline u32 asc_in(struct uart_port *port, u32 offset) 162 { 163 #ifdef readl_relaxed 164 return readl_relaxed(port->membase + offset); 165 #else 166 return readl(port->membase + offset); 167 #endif 168 } 169 170 static inline void asc_out(struct uart_port *port, u32 offset, u32 value) 171 { 172 #ifdef writel_relaxed 173 writel_relaxed(value, port->membase + offset); 174 #else 175 writel(value, port->membase + offset); 176 #endif 177 } 178 179 /* 180 * Some simple utility functions to enable and disable interrupts. 181 * Note that these need to be called with interrupts disabled. 182 */ 183 static inline void asc_disable_tx_interrupts(struct uart_port *port) 184 { 185 u32 intenable = asc_in(port, ASC_INTEN) & ~ASC_INTEN_THE; 186 asc_out(port, ASC_INTEN, intenable); 187 (void)asc_in(port, ASC_INTEN); /* Defeat bus write posting */ 188 } 189 190 static inline void asc_enable_tx_interrupts(struct uart_port *port) 191 { 192 u32 intenable = asc_in(port, ASC_INTEN) | ASC_INTEN_THE; 193 asc_out(port, ASC_INTEN, intenable); 194 } 195 196 static inline void asc_disable_rx_interrupts(struct uart_port *port) 197 { 198 u32 intenable = asc_in(port, ASC_INTEN) & ~ASC_INTEN_RBE; 199 asc_out(port, ASC_INTEN, intenable); 200 (void)asc_in(port, ASC_INTEN); /* Defeat bus write posting */ 201 } 202 203 static inline void asc_enable_rx_interrupts(struct uart_port *port) 204 { 205 u32 intenable = asc_in(port, ASC_INTEN) | ASC_INTEN_RBE; 206 asc_out(port, ASC_INTEN, intenable); 207 } 208 209 static inline u32 asc_txfifo_is_empty(struct uart_port *port) 210 { 211 return asc_in(port, ASC_STA) & ASC_STA_TE; 212 } 213 214 static inline u32 asc_txfifo_is_half_empty(struct uart_port *port) 215 { 216 return asc_in(port, ASC_STA) & ASC_STA_THE; 217 } 218 219 static inline const char *asc_port_name(struct uart_port *port) 220 { 221 return to_platform_device(port->dev)->name; 222 } 223 224 /*----------------------------------------------------------------------*/ 225 226 /* 227 * This section contains code to support the use of the ASC as a 228 * generic serial port. 229 */ 230 231 static inline unsigned asc_hw_txroom(struct uart_port *port) 232 { 233 u32 status = asc_in(port, ASC_STA); 234 235 if (status & ASC_STA_THE) 236 return port->fifosize / 2; 237 else if (!(status & ASC_STA_TF)) 238 return 1; 239 240 return 0; 241 } 242 243 /* 244 * Start transmitting chars. 245 * This is called from both interrupt and task level. 246 * Either way interrupts are disabled. 247 */ 248 static void asc_transmit_chars(struct uart_port *port) 249 { 250 struct circ_buf *xmit = &port->state->xmit; 251 int txroom; 252 unsigned char c; 253 254 txroom = asc_hw_txroom(port); 255 256 if ((txroom != 0) && port->x_char) { 257 c = port->x_char; 258 port->x_char = 0; 259 asc_out(port, ASC_TXBUF, c); 260 port->icount.tx++; 261 txroom = asc_hw_txroom(port); 262 } 263 264 if (uart_tx_stopped(port)) { 265 /* 266 * We should try and stop the hardware here, but I 267 * don't think the ASC has any way to do that. 268 */ 269 asc_disable_tx_interrupts(port); 270 return; 271 } 272 273 if (uart_circ_empty(xmit)) { 274 asc_disable_tx_interrupts(port); 275 return; 276 } 277 278 if (txroom == 0) 279 return; 280 281 do { 282 c = xmit->buf[xmit->tail]; 283 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 284 asc_out(port, ASC_TXBUF, c); 285 port->icount.tx++; 286 txroom--; 287 } while ((txroom > 0) && (!uart_circ_empty(xmit))); 288 289 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 290 uart_write_wakeup(port); 291 292 if (uart_circ_empty(xmit)) 293 asc_disable_tx_interrupts(port); 294 } 295 296 static void asc_receive_chars(struct uart_port *port) 297 { 298 struct tty_port *tport = &port->state->port; 299 unsigned long status, mode; 300 unsigned long c = 0; 301 char flag; 302 bool ignore_pe = false; 303 304 /* 305 * Datasheet states: If the MODE field selects an 8-bit frame then 306 * this [parity error] bit is undefined. Software should ignore this 307 * bit when reading 8-bit frames. 308 */ 309 mode = asc_in(port, ASC_CTL) & ASC_CTL_MODE_MSK; 310 if (mode == ASC_CTL_MODE_8BIT || mode == ASC_CTL_MODE_8BIT_PAR) 311 ignore_pe = true; 312 313 if (port->irq_wake) 314 pm_wakeup_event(tport->tty->dev, 0); 315 316 while ((status = asc_in(port, ASC_STA)) & ASC_STA_RBF) { 317 c = asc_in(port, ASC_RXBUF) | ASC_RXBUF_DUMMY_RX; 318 flag = TTY_NORMAL; 319 port->icount.rx++; 320 321 if (status & ASC_STA_OE || c & ASC_RXBUF_FE || 322 (c & ASC_RXBUF_PE && !ignore_pe)) { 323 324 if (c & ASC_RXBUF_FE) { 325 if (c == (ASC_RXBUF_FE | ASC_RXBUF_DUMMY_RX)) { 326 port->icount.brk++; 327 if (uart_handle_break(port)) 328 continue; 329 c |= ASC_RXBUF_DUMMY_BE; 330 } else { 331 port->icount.frame++; 332 } 333 } else if (c & ASC_RXBUF_PE) { 334 port->icount.parity++; 335 } 336 /* 337 * Reading any data from the RX FIFO clears the 338 * overflow error condition. 339 */ 340 if (status & ASC_STA_OE) { 341 port->icount.overrun++; 342 c |= ASC_RXBUF_DUMMY_OE; 343 } 344 345 c &= port->read_status_mask; 346 347 if (c & ASC_RXBUF_DUMMY_BE) 348 flag = TTY_BREAK; 349 else if (c & ASC_RXBUF_PE) 350 flag = TTY_PARITY; 351 else if (c & ASC_RXBUF_FE) 352 flag = TTY_FRAME; 353 } 354 355 if (uart_handle_sysrq_char(port, c & 0xff)) 356 continue; 357 358 uart_insert_char(port, c, ASC_RXBUF_DUMMY_OE, c & 0xff, flag); 359 } 360 361 /* Tell the rest of the system the news. New characters! */ 362 tty_flip_buffer_push(tport); 363 } 364 365 static irqreturn_t asc_interrupt(int irq, void *ptr) 366 { 367 struct uart_port *port = ptr; 368 u32 status; 369 370 spin_lock(&port->lock); 371 372 status = asc_in(port, ASC_STA); 373 374 if (status & ASC_STA_RBF) { 375 /* Receive FIFO not empty */ 376 asc_receive_chars(port); 377 } 378 379 if ((status & ASC_STA_THE) && 380 (asc_in(port, ASC_INTEN) & ASC_INTEN_THE)) { 381 /* Transmitter FIFO at least half empty */ 382 asc_transmit_chars(port); 383 } 384 385 spin_unlock(&port->lock); 386 387 return IRQ_HANDLED; 388 } 389 390 /*----------------------------------------------------------------------*/ 391 392 /* 393 * UART Functions 394 */ 395 396 static unsigned int asc_tx_empty(struct uart_port *port) 397 { 398 return asc_txfifo_is_empty(port) ? TIOCSER_TEMT : 0; 399 } 400 401 static void asc_set_mctrl(struct uart_port *port, unsigned int mctrl) 402 { 403 struct asc_port *ascport = to_asc_port(port); 404 405 /* 406 * This routine is used for seting signals of: DTR, DCD, CTS and RTS. 407 * We use ASC's hardware for CTS/RTS when hardware flow-control is 408 * enabled, however if the RTS line is required for another purpose, 409 * commonly controlled using HUP from userspace, then we need to toggle 410 * it manually, using GPIO. 411 * 412 * Some boards also have DTR and DCD implemented using PIO pins, code to 413 * do this should be hooked in here. 414 */ 415 416 if (!ascport->rts) 417 return; 418 419 /* If HW flow-control is enabled, we can't fiddle with the RTS line */ 420 if (asc_in(port, ASC_CTL) & ASC_CTL_CTSENABLE) 421 return; 422 423 gpiod_set_value(ascport->rts, mctrl & TIOCM_RTS); 424 } 425 426 static unsigned int asc_get_mctrl(struct uart_port *port) 427 { 428 /* 429 * This routine is used for geting signals of: DTR, DCD, DSR, RI, 430 * and CTS/RTS 431 */ 432 return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS; 433 } 434 435 /* There are probably characters waiting to be transmitted. */ 436 static void asc_start_tx(struct uart_port *port) 437 { 438 struct circ_buf *xmit = &port->state->xmit; 439 440 if (!uart_circ_empty(xmit)) 441 asc_enable_tx_interrupts(port); 442 } 443 444 /* Transmit stop */ 445 static void asc_stop_tx(struct uart_port *port) 446 { 447 asc_disable_tx_interrupts(port); 448 } 449 450 /* Receive stop */ 451 static void asc_stop_rx(struct uart_port *port) 452 { 453 asc_disable_rx_interrupts(port); 454 } 455 456 /* Handle breaks - ignored by us */ 457 static void asc_break_ctl(struct uart_port *port, int break_state) 458 { 459 /* Nothing here yet .. */ 460 } 461 462 /* 463 * Enable port for reception. 464 */ 465 static int asc_startup(struct uart_port *port) 466 { 467 if (request_irq(port->irq, asc_interrupt, 0, 468 asc_port_name(port), port)) { 469 dev_err(port->dev, "cannot allocate irq.\n"); 470 return -ENODEV; 471 } 472 473 asc_transmit_chars(port); 474 asc_enable_rx_interrupts(port); 475 476 return 0; 477 } 478 479 static void asc_shutdown(struct uart_port *port) 480 { 481 asc_disable_tx_interrupts(port); 482 asc_disable_rx_interrupts(port); 483 free_irq(port->irq, port); 484 } 485 486 static void asc_pm(struct uart_port *port, unsigned int state, 487 unsigned int oldstate) 488 { 489 struct asc_port *ascport = to_asc_port(port); 490 unsigned long flags = 0; 491 u32 ctl; 492 493 switch (state) { 494 case UART_PM_STATE_ON: 495 clk_prepare_enable(ascport->clk); 496 break; 497 case UART_PM_STATE_OFF: 498 /* 499 * Disable the ASC baud rate generator, which is as close as 500 * we can come to turning it off. Note this is not called with 501 * the port spinlock held. 502 */ 503 spin_lock_irqsave(&port->lock, flags); 504 ctl = asc_in(port, ASC_CTL) & ~ASC_CTL_RUN; 505 asc_out(port, ASC_CTL, ctl); 506 spin_unlock_irqrestore(&port->lock, flags); 507 clk_disable_unprepare(ascport->clk); 508 break; 509 } 510 } 511 512 static void asc_set_termios(struct uart_port *port, struct ktermios *termios, 513 struct ktermios *old) 514 { 515 struct asc_port *ascport = to_asc_port(port); 516 struct device_node *np = port->dev->of_node; 517 struct gpio_desc *gpiod; 518 unsigned int baud; 519 u32 ctrl_val; 520 tcflag_t cflag; 521 unsigned long flags; 522 523 /* Update termios to reflect hardware capabilities */ 524 termios->c_cflag &= ~(CMSPAR | 525 (ascport->hw_flow_control ? 0 : CRTSCTS)); 526 527 port->uartclk = clk_get_rate(ascport->clk); 528 529 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); 530 cflag = termios->c_cflag; 531 532 spin_lock_irqsave(&port->lock, flags); 533 534 /* read control register */ 535 ctrl_val = asc_in(port, ASC_CTL); 536 537 /* stop serial port and reset value */ 538 asc_out(port, ASC_CTL, (ctrl_val & ~ASC_CTL_RUN)); 539 ctrl_val = ASC_CTL_RXENABLE | ASC_CTL_FIFOENABLE; 540 541 /* reset fifo rx & tx */ 542 asc_out(port, ASC_TXRESET, 1); 543 asc_out(port, ASC_RXRESET, 1); 544 545 /* set character length */ 546 if ((cflag & CSIZE) == CS7) { 547 ctrl_val |= ASC_CTL_MODE_7BIT_PAR; 548 } else { 549 ctrl_val |= (cflag & PARENB) ? ASC_CTL_MODE_8BIT_PAR : 550 ASC_CTL_MODE_8BIT; 551 } 552 553 /* set stop bit */ 554 ctrl_val |= (cflag & CSTOPB) ? ASC_CTL_STOP_2BIT : ASC_CTL_STOP_1BIT; 555 556 /* odd parity */ 557 if (cflag & PARODD) 558 ctrl_val |= ASC_CTL_PARITYODD; 559 560 /* hardware flow control */ 561 if ((cflag & CRTSCTS)) { 562 ctrl_val |= ASC_CTL_CTSENABLE; 563 564 /* If flow-control selected, stop handling RTS manually */ 565 if (ascport->rts) { 566 devm_gpiod_put(port->dev, ascport->rts); 567 ascport->rts = NULL; 568 569 pinctrl_select_state(ascport->pinctrl, 570 ascport->states[DEFAULT]); 571 } 572 } else { 573 /* If flow-control disabled, it's safe to handle RTS manually */ 574 if (!ascport->rts && ascport->states[NO_HW_FLOWCTRL]) { 575 pinctrl_select_state(ascport->pinctrl, 576 ascport->states[NO_HW_FLOWCTRL]); 577 578 gpiod = devm_fwnode_get_gpiod_from_child(port->dev, 579 "rts", 580 &np->fwnode, 581 GPIOD_OUT_LOW, 582 np->name); 583 if (!IS_ERR(gpiod)) 584 ascport->rts = gpiod; 585 } 586 } 587 588 if ((baud < 19200) && !ascport->force_m1) { 589 asc_out(port, ASC_BAUDRATE, (port->uartclk / (16 * baud))); 590 } else { 591 /* 592 * MODE 1: recommended for high bit rates (above 19.2K) 593 * 594 * baudrate * 16 * 2^16 595 * ASCBaudRate = ------------------------ 596 * inputclock 597 * 598 * To keep maths inside 64bits, we divide inputclock by 16. 599 */ 600 u64 dividend = (u64)baud * (1 << 16); 601 602 do_div(dividend, port->uartclk / 16); 603 asc_out(port, ASC_BAUDRATE, dividend); 604 ctrl_val |= ASC_CTL_BAUDMODE; 605 } 606 607 uart_update_timeout(port, cflag, baud); 608 609 ascport->port.read_status_mask = ASC_RXBUF_DUMMY_OE; 610 if (termios->c_iflag & INPCK) 611 ascport->port.read_status_mask |= ASC_RXBUF_FE | ASC_RXBUF_PE; 612 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK)) 613 ascport->port.read_status_mask |= ASC_RXBUF_DUMMY_BE; 614 615 /* 616 * Characters to ignore 617 */ 618 ascport->port.ignore_status_mask = 0; 619 if (termios->c_iflag & IGNPAR) 620 ascport->port.ignore_status_mask |= ASC_RXBUF_FE | ASC_RXBUF_PE; 621 if (termios->c_iflag & IGNBRK) { 622 ascport->port.ignore_status_mask |= ASC_RXBUF_DUMMY_BE; 623 /* 624 * If we're ignoring parity and break indicators, 625 * ignore overruns too (for real raw support). 626 */ 627 if (termios->c_iflag & IGNPAR) 628 ascport->port.ignore_status_mask |= ASC_RXBUF_DUMMY_OE; 629 } 630 631 /* 632 * Ignore all characters if CREAD is not set. 633 */ 634 if (!(termios->c_cflag & CREAD)) 635 ascport->port.ignore_status_mask |= ASC_RXBUF_DUMMY_RX; 636 637 /* Set the timeout */ 638 asc_out(port, ASC_TIMEOUT, 20); 639 640 /* write final value and enable port */ 641 asc_out(port, ASC_CTL, (ctrl_val | ASC_CTL_RUN)); 642 643 spin_unlock_irqrestore(&port->lock, flags); 644 } 645 646 static const char *asc_type(struct uart_port *port) 647 { 648 return (port->type == PORT_ASC) ? DRIVER_NAME : NULL; 649 } 650 651 static void asc_release_port(struct uart_port *port) 652 { 653 } 654 655 static int asc_request_port(struct uart_port *port) 656 { 657 return 0; 658 } 659 660 /* 661 * Called when the port is opened, and UPF_BOOT_AUTOCONF flag is set 662 * Set type field if successful 663 */ 664 static void asc_config_port(struct uart_port *port, int flags) 665 { 666 if ((flags & UART_CONFIG_TYPE)) 667 port->type = PORT_ASC; 668 } 669 670 static int 671 asc_verify_port(struct uart_port *port, struct serial_struct *ser) 672 { 673 /* No user changeable parameters */ 674 return -EINVAL; 675 } 676 677 #ifdef CONFIG_CONSOLE_POLL 678 /* 679 * Console polling routines for writing and reading from the uart while 680 * in an interrupt or debug context (i.e. kgdb). 681 */ 682 683 static int asc_get_poll_char(struct uart_port *port) 684 { 685 if (!(asc_in(port, ASC_STA) & ASC_STA_RBF)) 686 return NO_POLL_CHAR; 687 688 return asc_in(port, ASC_RXBUF); 689 } 690 691 static void asc_put_poll_char(struct uart_port *port, unsigned char c) 692 { 693 while (!asc_txfifo_is_half_empty(port)) 694 cpu_relax(); 695 asc_out(port, ASC_TXBUF, c); 696 } 697 698 #endif /* CONFIG_CONSOLE_POLL */ 699 700 /*---------------------------------------------------------------------*/ 701 702 static const struct uart_ops asc_uart_ops = { 703 .tx_empty = asc_tx_empty, 704 .set_mctrl = asc_set_mctrl, 705 .get_mctrl = asc_get_mctrl, 706 .start_tx = asc_start_tx, 707 .stop_tx = asc_stop_tx, 708 .stop_rx = asc_stop_rx, 709 .break_ctl = asc_break_ctl, 710 .startup = asc_startup, 711 .shutdown = asc_shutdown, 712 .set_termios = asc_set_termios, 713 .type = asc_type, 714 .release_port = asc_release_port, 715 .request_port = asc_request_port, 716 .config_port = asc_config_port, 717 .verify_port = asc_verify_port, 718 .pm = asc_pm, 719 #ifdef CONFIG_CONSOLE_POLL 720 .poll_get_char = asc_get_poll_char, 721 .poll_put_char = asc_put_poll_char, 722 #endif /* CONFIG_CONSOLE_POLL */ 723 }; 724 725 static int asc_init_port(struct asc_port *ascport, 726 struct platform_device *pdev) 727 { 728 struct uart_port *port = &ascport->port; 729 struct resource *res; 730 int ret; 731 732 port->iotype = UPIO_MEM; 733 port->flags = UPF_BOOT_AUTOCONF; 734 port->ops = &asc_uart_ops; 735 port->fifosize = ASC_FIFO_SIZE; 736 port->dev = &pdev->dev; 737 port->irq = platform_get_irq(pdev, 0); 738 739 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 740 port->membase = devm_ioremap_resource(&pdev->dev, res); 741 if (IS_ERR(port->membase)) 742 return PTR_ERR(port->membase); 743 port->mapbase = res->start; 744 745 spin_lock_init(&port->lock); 746 747 ascport->clk = devm_clk_get(&pdev->dev, NULL); 748 749 if (WARN_ON(IS_ERR(ascport->clk))) 750 return -EINVAL; 751 /* ensure that clk rate is correct by enabling the clk */ 752 clk_prepare_enable(ascport->clk); 753 ascport->port.uartclk = clk_get_rate(ascport->clk); 754 WARN_ON(ascport->port.uartclk == 0); 755 clk_disable_unprepare(ascport->clk); 756 757 ascport->pinctrl = devm_pinctrl_get(&pdev->dev); 758 if (IS_ERR(ascport->pinctrl)) { 759 ret = PTR_ERR(ascport->pinctrl); 760 dev_err(&pdev->dev, "Failed to get Pinctrl: %d\n", ret); 761 return ret; 762 } 763 764 ascport->states[DEFAULT] = 765 pinctrl_lookup_state(ascport->pinctrl, "default"); 766 if (IS_ERR(ascport->states[DEFAULT])) { 767 ret = PTR_ERR(ascport->states[DEFAULT]); 768 dev_err(&pdev->dev, 769 "Failed to look up Pinctrl state 'default': %d\n", ret); 770 return ret; 771 } 772 773 /* "no-hw-flowctrl" state is optional */ 774 ascport->states[NO_HW_FLOWCTRL] = 775 pinctrl_lookup_state(ascport->pinctrl, "no-hw-flowctrl"); 776 if (IS_ERR(ascport->states[NO_HW_FLOWCTRL])) 777 ascport->states[NO_HW_FLOWCTRL] = NULL; 778 779 return 0; 780 } 781 782 static struct asc_port *asc_of_get_asc_port(struct platform_device *pdev) 783 { 784 struct device_node *np = pdev->dev.of_node; 785 int id; 786 787 if (!np) 788 return NULL; 789 790 id = of_alias_get_id(np, ASC_SERIAL_NAME); 791 792 if (id < 0) 793 id = 0; 794 795 if (WARN_ON(id >= ASC_MAX_PORTS)) 796 return NULL; 797 798 asc_ports[id].hw_flow_control = of_property_read_bool(np, 799 "uart-has-rtscts"); 800 asc_ports[id].force_m1 = of_property_read_bool(np, "st,force_m1"); 801 asc_ports[id].port.line = id; 802 asc_ports[id].rts = NULL; 803 804 return &asc_ports[id]; 805 } 806 807 #ifdef CONFIG_OF 808 static const struct of_device_id asc_match[] = { 809 { .compatible = "st,asc", }, 810 {}, 811 }; 812 813 MODULE_DEVICE_TABLE(of, asc_match); 814 #endif 815 816 static int asc_serial_probe(struct platform_device *pdev) 817 { 818 int ret; 819 struct asc_port *ascport; 820 821 ascport = asc_of_get_asc_port(pdev); 822 if (!ascport) 823 return -ENODEV; 824 825 ret = asc_init_port(ascport, pdev); 826 if (ret) 827 return ret; 828 829 ret = uart_add_one_port(&asc_uart_driver, &ascport->port); 830 if (ret) 831 return ret; 832 833 platform_set_drvdata(pdev, &ascport->port); 834 835 return 0; 836 } 837 838 static int asc_serial_remove(struct platform_device *pdev) 839 { 840 struct uart_port *port = platform_get_drvdata(pdev); 841 842 return uart_remove_one_port(&asc_uart_driver, port); 843 } 844 845 #ifdef CONFIG_PM_SLEEP 846 static int asc_serial_suspend(struct device *dev) 847 { 848 struct platform_device *pdev = to_platform_device(dev); 849 struct uart_port *port = platform_get_drvdata(pdev); 850 851 return uart_suspend_port(&asc_uart_driver, port); 852 } 853 854 static int asc_serial_resume(struct device *dev) 855 { 856 struct platform_device *pdev = to_platform_device(dev); 857 struct uart_port *port = platform_get_drvdata(pdev); 858 859 return uart_resume_port(&asc_uart_driver, port); 860 } 861 862 #endif /* CONFIG_PM_SLEEP */ 863 864 /*----------------------------------------------------------------------*/ 865 866 #ifdef CONFIG_SERIAL_ST_ASC_CONSOLE 867 static void asc_console_putchar(struct uart_port *port, int ch) 868 { 869 unsigned int timeout = 1000000; 870 871 /* Wait for upto 1 second in case flow control is stopping us. */ 872 while (--timeout && !asc_txfifo_is_half_empty(port)) 873 udelay(1); 874 875 asc_out(port, ASC_TXBUF, ch); 876 } 877 878 /* 879 * Print a string to the serial port trying not to disturb 880 * any possible real use of the port... 881 */ 882 883 static void asc_console_write(struct console *co, const char *s, unsigned count) 884 { 885 struct uart_port *port = &asc_ports[co->index].port; 886 unsigned long flags; 887 unsigned long timeout = 1000000; 888 int locked = 1; 889 u32 intenable; 890 891 if (port->sysrq) 892 locked = 0; /* asc_interrupt has already claimed the lock */ 893 else if (oops_in_progress) 894 locked = spin_trylock_irqsave(&port->lock, flags); 895 else 896 spin_lock_irqsave(&port->lock, flags); 897 898 /* 899 * Disable interrupts so we don't get the IRQ line bouncing 900 * up and down while interrupts are disabled. 901 */ 902 intenable = asc_in(port, ASC_INTEN); 903 asc_out(port, ASC_INTEN, 0); 904 (void)asc_in(port, ASC_INTEN); /* Defeat bus write posting */ 905 906 uart_console_write(port, s, count, asc_console_putchar); 907 908 while (--timeout && !asc_txfifo_is_empty(port)) 909 udelay(1); 910 911 asc_out(port, ASC_INTEN, intenable); 912 913 if (locked) 914 spin_unlock_irqrestore(&port->lock, flags); 915 } 916 917 static int asc_console_setup(struct console *co, char *options) 918 { 919 struct asc_port *ascport; 920 int baud = 115200; 921 int bits = 8; 922 int parity = 'n'; 923 int flow = 'n'; 924 925 if (co->index >= ASC_MAX_PORTS) 926 return -ENODEV; 927 928 ascport = &asc_ports[co->index]; 929 930 /* 931 * This driver does not support early console initialization 932 * (use ARM early printk support instead), so we only expect 933 * this to be called during the uart port registration when the 934 * driver gets probed and the port should be mapped at that point. 935 */ 936 if (ascport->port.mapbase == 0 || ascport->port.membase == NULL) 937 return -ENXIO; 938 939 if (options) 940 uart_parse_options(options, &baud, &parity, &bits, &flow); 941 942 return uart_set_options(&ascport->port, co, baud, parity, bits, flow); 943 } 944 945 static struct console asc_console = { 946 .name = ASC_SERIAL_NAME, 947 .device = uart_console_device, 948 .write = asc_console_write, 949 .setup = asc_console_setup, 950 .flags = CON_PRINTBUFFER, 951 .index = -1, 952 .data = &asc_uart_driver, 953 }; 954 955 #define ASC_SERIAL_CONSOLE (&asc_console) 956 957 #else 958 #define ASC_SERIAL_CONSOLE NULL 959 #endif /* CONFIG_SERIAL_ST_ASC_CONSOLE */ 960 961 static struct uart_driver asc_uart_driver = { 962 .owner = THIS_MODULE, 963 .driver_name = DRIVER_NAME, 964 .dev_name = ASC_SERIAL_NAME, 965 .major = 0, 966 .minor = 0, 967 .nr = ASC_MAX_PORTS, 968 .cons = ASC_SERIAL_CONSOLE, 969 }; 970 971 static const struct dev_pm_ops asc_serial_pm_ops = { 972 SET_SYSTEM_SLEEP_PM_OPS(asc_serial_suspend, asc_serial_resume) 973 }; 974 975 static struct platform_driver asc_serial_driver = { 976 .probe = asc_serial_probe, 977 .remove = asc_serial_remove, 978 .driver = { 979 .name = DRIVER_NAME, 980 .pm = &asc_serial_pm_ops, 981 .of_match_table = of_match_ptr(asc_match), 982 }, 983 }; 984 985 static int __init asc_init(void) 986 { 987 int ret; 988 static const char banner[] __initconst = 989 KERN_INFO "STMicroelectronics ASC driver initialized\n"; 990 991 printk(banner); 992 993 ret = uart_register_driver(&asc_uart_driver); 994 if (ret) 995 return ret; 996 997 ret = platform_driver_register(&asc_serial_driver); 998 if (ret) 999 uart_unregister_driver(&asc_uart_driver); 1000 1001 return ret; 1002 } 1003 1004 static void __exit asc_exit(void) 1005 { 1006 platform_driver_unregister(&asc_serial_driver); 1007 uart_unregister_driver(&asc_uart_driver); 1008 } 1009 1010 module_init(asc_init); 1011 module_exit(asc_exit); 1012 1013 MODULE_ALIAS("platform:" DRIVER_NAME); 1014 MODULE_AUTHOR("STMicroelectronics (R&D) Limited"); 1015 MODULE_DESCRIPTION("STMicroelectronics ASC serial port driver"); 1016 MODULE_LICENSE("GPL"); 1017