xref: /openbmc/linux/drivers/tty/serial/serial_txx9.c (revision 83b975b5)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Derived from many drivers using generic_serial interface,
4  * especially serial_tx3912.c by Steven J. Hill and r39xx_serial.c
5  * (was in Linux/VR tree) by Jim Pick.
6  *
7  *  Copyright (C) 1999 Harald Koerfgen
8  *  Copyright (C) 2000 Jim Pick <jim@jimpick.com>
9  *  Copyright (C) 2001 Steven J. Hill (sjhill@realitydiluted.com)
10  *  Copyright (C) 2000-2002 Toshiba Corporation
11  *
12  *  Serial driver for TX3927/TX4927/TX4925/TX4938 internal SIO controller
13  */
14 
15 #include <linux/module.h>
16 #include <linux/ioport.h>
17 #include <linux/init.h>
18 #include <linux/console.h>
19 #include <linux/delay.h>
20 #include <linux/platform_device.h>
21 #include <linux/pci.h>
22 #include <linux/serial_core.h>
23 #include <linux/serial.h>
24 #include <linux/tty.h>
25 #include <linux/tty_flip.h>
26 
27 #include <linux/io.h>
28 
29 #define PASS_LIMIT	256
30 
31 #if !defined(CONFIG_SERIAL_TXX9_STDSERIAL)
32 /* "ttyS" is used for standard serial driver */
33 #define TXX9_TTY_NAME "ttyTX"
34 #define TXX9_TTY_MINOR_START	196
35 #define TXX9_TTY_MAJOR	204
36 #else
37 /* acts like standard serial driver */
38 #define TXX9_TTY_NAME "ttyS"
39 #define TXX9_TTY_MINOR_START	64
40 #define TXX9_TTY_MAJOR	TTY_MAJOR
41 #endif
42 
43 /* flag aliases */
44 #define UPF_TXX9_HAVE_CTS_LINE	UPF_BUGGY_UART
45 #define UPF_TXX9_USE_SCLK	UPF_MAGIC_MULTIPLIER
46 
47 #ifdef CONFIG_PCI
48 /* support for Toshiba TC86C001 SIO */
49 #define ENABLE_SERIAL_TXX9_PCI
50 #endif
51 
52 /*
53  * Number of serial ports
54  */
55 #define UART_NR  CONFIG_SERIAL_TXX9_NR_UARTS
56 
57 #define TXX9_REGION_SIZE	0x24
58 
59 /* TXX9 Serial Registers */
60 #define TXX9_SILCR	0x00
61 #define TXX9_SIDICR	0x04
62 #define TXX9_SIDISR	0x08
63 #define TXX9_SICISR	0x0c
64 #define TXX9_SIFCR	0x10
65 #define TXX9_SIFLCR	0x14
66 #define TXX9_SIBGR	0x18
67 #define TXX9_SITFIFO	0x1c
68 #define TXX9_SIRFIFO	0x20
69 
70 /* SILCR : Line Control */
71 #define TXX9_SILCR_SCS_MASK	0x00000060
72 #define TXX9_SILCR_SCS_IMCLK	0x00000000
73 #define TXX9_SILCR_SCS_IMCLK_BG	0x00000020
74 #define TXX9_SILCR_SCS_SCLK	0x00000040
75 #define TXX9_SILCR_SCS_SCLK_BG	0x00000060
76 #define TXX9_SILCR_UEPS	0x00000010
77 #define TXX9_SILCR_UPEN	0x00000008
78 #define TXX9_SILCR_USBL_MASK	0x00000004
79 #define TXX9_SILCR_USBL_1BIT	0x00000000
80 #define TXX9_SILCR_USBL_2BIT	0x00000004
81 #define TXX9_SILCR_UMODE_MASK	0x00000003
82 #define TXX9_SILCR_UMODE_8BIT	0x00000000
83 #define TXX9_SILCR_UMODE_7BIT	0x00000001
84 
85 /* SIDICR : DMA/Int. Control */
86 #define TXX9_SIDICR_TDE	0x00008000
87 #define TXX9_SIDICR_RDE	0x00004000
88 #define TXX9_SIDICR_TIE	0x00002000
89 #define TXX9_SIDICR_RIE	0x00001000
90 #define TXX9_SIDICR_SPIE	0x00000800
91 #define TXX9_SIDICR_CTSAC	0x00000600
92 #define TXX9_SIDICR_STIE_MASK	0x0000003f
93 #define TXX9_SIDICR_STIE_OERS		0x00000020
94 #define TXX9_SIDICR_STIE_CTSS		0x00000010
95 #define TXX9_SIDICR_STIE_RBRKD	0x00000008
96 #define TXX9_SIDICR_STIE_TRDY		0x00000004
97 #define TXX9_SIDICR_STIE_TXALS	0x00000002
98 #define TXX9_SIDICR_STIE_UBRKD	0x00000001
99 
100 /* SIDISR : DMA/Int. Status */
101 #define TXX9_SIDISR_UBRK	0x00008000
102 #define TXX9_SIDISR_UVALID	0x00004000
103 #define TXX9_SIDISR_UFER	0x00002000
104 #define TXX9_SIDISR_UPER	0x00001000
105 #define TXX9_SIDISR_UOER	0x00000800
106 #define TXX9_SIDISR_ERI	0x00000400
107 #define TXX9_SIDISR_TOUT	0x00000200
108 #define TXX9_SIDISR_TDIS	0x00000100
109 #define TXX9_SIDISR_RDIS	0x00000080
110 #define TXX9_SIDISR_STIS	0x00000040
111 #define TXX9_SIDISR_RFDN_MASK	0x0000001f
112 
113 /* SICISR : Change Int. Status */
114 #define TXX9_SICISR_OERS	0x00000020
115 #define TXX9_SICISR_CTSS	0x00000010
116 #define TXX9_SICISR_RBRKD	0x00000008
117 #define TXX9_SICISR_TRDY	0x00000004
118 #define TXX9_SICISR_TXALS	0x00000002
119 #define TXX9_SICISR_UBRKD	0x00000001
120 
121 /* SIFCR : FIFO Control */
122 #define TXX9_SIFCR_SWRST	0x00008000
123 #define TXX9_SIFCR_RDIL_MASK	0x00000180
124 #define TXX9_SIFCR_RDIL_1	0x00000000
125 #define TXX9_SIFCR_RDIL_4	0x00000080
126 #define TXX9_SIFCR_RDIL_8	0x00000100
127 #define TXX9_SIFCR_RDIL_12	0x00000180
128 #define TXX9_SIFCR_RDIL_MAX	0x00000180
129 #define TXX9_SIFCR_TDIL_MASK	0x00000018
130 #define TXX9_SIFCR_TDIL_1	0x00000000
131 #define TXX9_SIFCR_TDIL_4	0x00000001
132 #define TXX9_SIFCR_TDIL_8	0x00000010
133 #define TXX9_SIFCR_TDIL_MAX	0x00000010
134 #define TXX9_SIFCR_TFRST	0x00000004
135 #define TXX9_SIFCR_RFRST	0x00000002
136 #define TXX9_SIFCR_FRSTE	0x00000001
137 #define TXX9_SIO_TX_FIFO	8
138 #define TXX9_SIO_RX_FIFO	16
139 
140 /* SIFLCR : Flow Control */
141 #define TXX9_SIFLCR_RCS	0x00001000
142 #define TXX9_SIFLCR_TES	0x00000800
143 #define TXX9_SIFLCR_RTSSC	0x00000200
144 #define TXX9_SIFLCR_RSDE	0x00000100
145 #define TXX9_SIFLCR_TSDE	0x00000080
146 #define TXX9_SIFLCR_RTSTL_MASK	0x0000001e
147 #define TXX9_SIFLCR_RTSTL_MAX	0x0000001e
148 #define TXX9_SIFLCR_TBRK	0x00000001
149 
150 /* SIBGR : Baudrate Control */
151 #define TXX9_SIBGR_BCLK_MASK	0x00000300
152 #define TXX9_SIBGR_BCLK_T0	0x00000000
153 #define TXX9_SIBGR_BCLK_T2	0x00000100
154 #define TXX9_SIBGR_BCLK_T4	0x00000200
155 #define TXX9_SIBGR_BCLK_T6	0x00000300
156 #define TXX9_SIBGR_BRD_MASK	0x000000ff
157 
158 static inline unsigned int sio_in(struct uart_port *up, int offset)
159 {
160 	switch (up->iotype) {
161 	default:
162 		return __raw_readl(up->membase + offset);
163 	case UPIO_PORT:
164 		return inl(up->iobase + offset);
165 	}
166 }
167 
168 static inline void
169 sio_out(struct uart_port *up, int offset, int value)
170 {
171 	switch (up->iotype) {
172 	default:
173 		__raw_writel(value, up->membase + offset);
174 		break;
175 	case UPIO_PORT:
176 		outl(value, up->iobase + offset);
177 		break;
178 	}
179 }
180 
181 static inline void
182 sio_mask(struct uart_port *up, int offset, unsigned int value)
183 {
184 	sio_out(up, offset, sio_in(up, offset) & ~value);
185 }
186 static inline void
187 sio_set(struct uart_port *up, int offset, unsigned int value)
188 {
189 	sio_out(up, offset, sio_in(up, offset) | value);
190 }
191 
192 static inline void
193 sio_quot_set(struct uart_port *up, int quot)
194 {
195 	quot >>= 1;
196 	if (quot < 256)
197 		sio_out(up, TXX9_SIBGR, quot | TXX9_SIBGR_BCLK_T0);
198 	else if (quot < (256 << 2))
199 		sio_out(up, TXX9_SIBGR, (quot >> 2) | TXX9_SIBGR_BCLK_T2);
200 	else if (quot < (256 << 4))
201 		sio_out(up, TXX9_SIBGR, (quot >> 4) | TXX9_SIBGR_BCLK_T4);
202 	else if (quot < (256 << 6))
203 		sio_out(up, TXX9_SIBGR, (quot >> 6) | TXX9_SIBGR_BCLK_T6);
204 	else
205 		sio_out(up, TXX9_SIBGR, 0xff | TXX9_SIBGR_BCLK_T6);
206 }
207 
208 static void serial_txx9_stop_tx(struct uart_port *up)
209 {
210 	sio_mask(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
211 }
212 
213 static void serial_txx9_start_tx(struct uart_port *up)
214 {
215 	sio_set(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
216 }
217 
218 static void serial_txx9_stop_rx(struct uart_port *up)
219 {
220 	up->read_status_mask &= ~TXX9_SIDISR_RDIS;
221 }
222 
223 static void serial_txx9_initialize(struct uart_port *up)
224 {
225 	unsigned int tmout = 10000;
226 
227 	sio_out(up, TXX9_SIFCR, TXX9_SIFCR_SWRST);
228 	/* TX4925 BUG WORKAROUND.  Accessing SIOC register
229 	 * immediately after soft reset causes bus error. */
230 	udelay(1);
231 	while ((sio_in(up, TXX9_SIFCR) & TXX9_SIFCR_SWRST) && --tmout)
232 		udelay(1);
233 	/* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
234 	sio_set(up, TXX9_SIFCR,
235 		TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1);
236 	/* initial settings */
237 	sio_out(up, TXX9_SILCR,
238 		TXX9_SILCR_UMODE_8BIT | TXX9_SILCR_USBL_1BIT |
239 		((up->flags & UPF_TXX9_USE_SCLK) ?
240 		 TXX9_SILCR_SCS_SCLK_BG : TXX9_SILCR_SCS_IMCLK_BG));
241 	sio_quot_set(up, uart_get_divisor(up, 9600));
242 	sio_out(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSTL_MAX /* 15 */);
243 	sio_out(up, TXX9_SIDICR, 0);
244 }
245 
246 static inline void
247 receive_chars(struct uart_port *up, unsigned int *status)
248 {
249 	unsigned char ch;
250 	unsigned int disr = *status;
251 	int max_count = 256;
252 	char flag;
253 	unsigned int next_ignore_status_mask;
254 
255 	do {
256 		ch = sio_in(up, TXX9_SIRFIFO);
257 		flag = TTY_NORMAL;
258 		up->icount.rx++;
259 
260 		/* mask out RFDN_MASK bit added by previous overrun */
261 		next_ignore_status_mask =
262 			up->ignore_status_mask & ~TXX9_SIDISR_RFDN_MASK;
263 		if (unlikely(disr & (TXX9_SIDISR_UBRK | TXX9_SIDISR_UPER |
264 				     TXX9_SIDISR_UFER | TXX9_SIDISR_UOER))) {
265 			/*
266 			 * For statistics only
267 			 */
268 			if (disr & TXX9_SIDISR_UBRK) {
269 				disr &= ~(TXX9_SIDISR_UFER | TXX9_SIDISR_UPER);
270 				up->icount.brk++;
271 				/*
272 				 * We do the SysRQ and SAK checking
273 				 * here because otherwise the break
274 				 * may get masked by ignore_status_mask
275 				 * or read_status_mask.
276 				 */
277 				if (uart_handle_break(up))
278 					goto ignore_char;
279 			} else if (disr & TXX9_SIDISR_UPER)
280 				up->icount.parity++;
281 			else if (disr & TXX9_SIDISR_UFER)
282 				up->icount.frame++;
283 			if (disr & TXX9_SIDISR_UOER) {
284 				up->icount.overrun++;
285 				/*
286 				 * The receiver read buffer still hold
287 				 * a char which caused overrun.
288 				 * Ignore next char by adding RFDN_MASK
289 				 * to ignore_status_mask temporarily.
290 				 */
291 				next_ignore_status_mask |=
292 					TXX9_SIDISR_RFDN_MASK;
293 			}
294 
295 			/*
296 			 * Mask off conditions which should be ingored.
297 			 */
298 			disr &= up->read_status_mask;
299 
300 			if (disr & TXX9_SIDISR_UBRK) {
301 				flag = TTY_BREAK;
302 			} else if (disr & TXX9_SIDISR_UPER)
303 				flag = TTY_PARITY;
304 			else if (disr & TXX9_SIDISR_UFER)
305 				flag = TTY_FRAME;
306 		}
307 		if (uart_handle_sysrq_char(up, ch))
308 			goto ignore_char;
309 
310 		uart_insert_char(up, disr, TXX9_SIDISR_UOER, ch, flag);
311 
312 	ignore_char:
313 		up->ignore_status_mask = next_ignore_status_mask;
314 		disr = sio_in(up, TXX9_SIDISR);
315 	} while (!(disr & TXX9_SIDISR_UVALID) && (max_count-- > 0));
316 
317 	tty_flip_buffer_push(&up->state->port);
318 
319 	*status = disr;
320 }
321 
322 static inline void transmit_chars(struct uart_port *up)
323 {
324 	struct circ_buf *xmit = &up->state->xmit;
325 	int count;
326 
327 	if (up->x_char) {
328 		sio_out(up, TXX9_SITFIFO, up->x_char);
329 		up->icount.tx++;
330 		up->x_char = 0;
331 		return;
332 	}
333 	if (uart_circ_empty(xmit) || uart_tx_stopped(up)) {
334 		serial_txx9_stop_tx(up);
335 		return;
336 	}
337 
338 	count = TXX9_SIO_TX_FIFO;
339 	do {
340 		sio_out(up, TXX9_SITFIFO, xmit->buf[xmit->tail]);
341 		xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
342 		up->icount.tx++;
343 		if (uart_circ_empty(xmit))
344 			break;
345 	} while (--count > 0);
346 
347 	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
348 		uart_write_wakeup(up);
349 
350 	if (uart_circ_empty(xmit))
351 		serial_txx9_stop_tx(up);
352 }
353 
354 static irqreturn_t serial_txx9_interrupt(int irq, void *dev_id)
355 {
356 	int pass_counter = 0;
357 	struct uart_port *up = dev_id;
358 	unsigned int status;
359 
360 	while (1) {
361 		spin_lock(&up->lock);
362 		status = sio_in(up, TXX9_SIDISR);
363 		if (!(sio_in(up, TXX9_SIDICR) & TXX9_SIDICR_TIE))
364 			status &= ~TXX9_SIDISR_TDIS;
365 		if (!(status & (TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
366 				TXX9_SIDISR_TOUT))) {
367 			spin_unlock(&up->lock);
368 			break;
369 		}
370 
371 		if (status & TXX9_SIDISR_RDIS)
372 			receive_chars(up, &status);
373 		if (status & TXX9_SIDISR_TDIS)
374 			transmit_chars(up);
375 		/* Clear TX/RX Int. Status */
376 		sio_mask(up, TXX9_SIDISR,
377 			 TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
378 			 TXX9_SIDISR_TOUT);
379 		spin_unlock(&up->lock);
380 
381 		if (pass_counter++ > PASS_LIMIT)
382 			break;
383 	}
384 
385 	return pass_counter ? IRQ_HANDLED : IRQ_NONE;
386 }
387 
388 static unsigned int serial_txx9_tx_empty(struct uart_port *up)
389 {
390 	unsigned long flags;
391 	unsigned int ret;
392 
393 	spin_lock_irqsave(&up->lock, flags);
394 	ret = (sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS) ? TIOCSER_TEMT : 0;
395 	spin_unlock_irqrestore(&up->lock, flags);
396 
397 	return ret;
398 }
399 
400 static unsigned int serial_txx9_get_mctrl(struct uart_port *up)
401 {
402 	unsigned int ret;
403 
404 	/* no modem control lines */
405 	ret = TIOCM_CAR | TIOCM_DSR;
406 	ret |= (sio_in(up, TXX9_SIFLCR) & TXX9_SIFLCR_RTSSC) ? 0 : TIOCM_RTS;
407 	ret |= (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS) ? 0 : TIOCM_CTS;
408 
409 	return ret;
410 }
411 
412 static void serial_txx9_set_mctrl(struct uart_port *up, unsigned int mctrl)
413 {
414 
415 	if (mctrl & TIOCM_RTS)
416 		sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
417 	else
418 		sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
419 }
420 
421 static void serial_txx9_break_ctl(struct uart_port *up, int break_state)
422 {
423 	unsigned long flags;
424 
425 	spin_lock_irqsave(&up->lock, flags);
426 	if (break_state == -1)
427 		sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
428 	else
429 		sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
430 	spin_unlock_irqrestore(&up->lock, flags);
431 }
432 
433 #if defined(CONFIG_SERIAL_TXX9_CONSOLE) || defined(CONFIG_CONSOLE_POLL)
434 /*
435  *	Wait for transmitter & holding register to empty
436  */
437 static void wait_for_xmitr(struct uart_port *up)
438 {
439 	unsigned int tmout = 10000;
440 
441 	/* Wait up to 10ms for the character(s) to be sent. */
442 	while (--tmout &&
443 	       !(sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS))
444 		udelay(1);
445 
446 	/* Wait up to 1s for flow control if necessary */
447 	if (up->flags & UPF_CONS_FLOW) {
448 		tmout = 1000000;
449 		while (--tmout &&
450 		       (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS))
451 			udelay(1);
452 	}
453 }
454 #endif
455 
456 #ifdef CONFIG_CONSOLE_POLL
457 /*
458  * Console polling routines for writing and reading from the uart while
459  * in an interrupt or debug context.
460  */
461 
462 static int serial_txx9_get_poll_char(struct uart_port *up)
463 {
464 	unsigned int ier;
465 	unsigned char c;
466 
467 	/*
468 	 *	First save the IER then disable the interrupts
469 	 */
470 	ier = sio_in(up, TXX9_SIDICR);
471 	sio_out(up, TXX9_SIDICR, 0);
472 
473 	while (sio_in(up, TXX9_SIDISR) & TXX9_SIDISR_UVALID)
474 		;
475 
476 	c = sio_in(up, TXX9_SIRFIFO);
477 
478 	/*
479 	 *	Finally, clear RX interrupt status
480 	 *	and restore the IER
481 	 */
482 	sio_mask(up, TXX9_SIDISR, TXX9_SIDISR_RDIS);
483 	sio_out(up, TXX9_SIDICR, ier);
484 	return c;
485 }
486 
487 
488 static void serial_txx9_put_poll_char(struct uart_port *up, unsigned char c)
489 {
490 	unsigned int ier;
491 
492 	/*
493 	 *	First save the IER then disable the interrupts
494 	 */
495 	ier = sio_in(up, TXX9_SIDICR);
496 	sio_out(up, TXX9_SIDICR, 0);
497 
498 	wait_for_xmitr(up);
499 	/*
500 	 *	Send the character out.
501 	 */
502 	sio_out(up, TXX9_SITFIFO, c);
503 
504 	/*
505 	 *	Finally, wait for transmitter to become empty
506 	 *	and restore the IER
507 	 */
508 	wait_for_xmitr(up);
509 	sio_out(up, TXX9_SIDICR, ier);
510 }
511 
512 #endif /* CONFIG_CONSOLE_POLL */
513 
514 static int serial_txx9_startup(struct uart_port *up)
515 {
516 	unsigned long flags;
517 	int retval;
518 
519 	/*
520 	 * Clear the FIFO buffers and disable them.
521 	 * (they will be reenabled in set_termios())
522 	 */
523 	sio_set(up, TXX9_SIFCR,
524 		TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
525 	/* clear reset */
526 	sio_mask(up, TXX9_SIFCR,
527 		 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
528 	sio_out(up, TXX9_SIDICR, 0);
529 
530 	/*
531 	 * Clear the interrupt registers.
532 	 */
533 	sio_out(up, TXX9_SIDISR, 0);
534 
535 	retval = request_irq(up->irq, serial_txx9_interrupt,
536 			     IRQF_SHARED, "serial_txx9", up);
537 	if (retval)
538 		return retval;
539 
540 	/*
541 	 * Now, initialize the UART
542 	 */
543 	spin_lock_irqsave(&up->lock, flags);
544 	serial_txx9_set_mctrl(up, up->mctrl);
545 	spin_unlock_irqrestore(&up->lock, flags);
546 
547 	/* Enable RX/TX */
548 	sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
549 
550 	/*
551 	 * Finally, enable interrupts.
552 	 */
553 	sio_set(up, TXX9_SIDICR, TXX9_SIDICR_RIE);
554 
555 	return 0;
556 }
557 
558 static void serial_txx9_shutdown(struct uart_port *up)
559 {
560 	unsigned long flags;
561 
562 	/*
563 	 * Disable interrupts from this port
564 	 */
565 	sio_out(up, TXX9_SIDICR, 0);	/* disable all intrs */
566 
567 	spin_lock_irqsave(&up->lock, flags);
568 	serial_txx9_set_mctrl(up, up->mctrl);
569 	spin_unlock_irqrestore(&up->lock, flags);
570 
571 	/*
572 	 * Disable break condition
573 	 */
574 	sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
575 
576 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
577 	if (up->cons && up->line == up->cons->index) {
578 		free_irq(up->irq, up);
579 		return;
580 	}
581 #endif
582 	/* reset FIFOs */
583 	sio_set(up, TXX9_SIFCR,
584 		TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
585 	/* clear reset */
586 	sio_mask(up, TXX9_SIFCR,
587 		 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
588 
589 	/* Disable RX/TX */
590 	sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
591 
592 	free_irq(up->irq, up);
593 }
594 
595 static void
596 serial_txx9_set_termios(struct uart_port *up, struct ktermios *termios,
597 			const struct ktermios *old)
598 {
599 	unsigned int cval, fcr = 0;
600 	unsigned long flags;
601 	unsigned int baud, quot;
602 
603 	/*
604 	 * We don't support modem control lines.
605 	 */
606 	termios->c_cflag &= ~(HUPCL | CMSPAR);
607 	termios->c_cflag |= CLOCAL;
608 
609 	cval = sio_in(up, TXX9_SILCR);
610 	/* byte size and parity */
611 	cval &= ~TXX9_SILCR_UMODE_MASK;
612 	switch (termios->c_cflag & CSIZE) {
613 	case CS7:
614 		cval |= TXX9_SILCR_UMODE_7BIT;
615 		break;
616 	default:
617 	case CS5:	/* not supported */
618 	case CS6:	/* not supported */
619 	case CS8:
620 		cval |= TXX9_SILCR_UMODE_8BIT;
621 		termios->c_cflag &= ~CSIZE;
622 		termios->c_cflag |= CS8;
623 		break;
624 	}
625 
626 	cval &= ~TXX9_SILCR_USBL_MASK;
627 	if (termios->c_cflag & CSTOPB)
628 		cval |= TXX9_SILCR_USBL_2BIT;
629 	else
630 		cval |= TXX9_SILCR_USBL_1BIT;
631 	cval &= ~(TXX9_SILCR_UPEN | TXX9_SILCR_UEPS);
632 	if (termios->c_cflag & PARENB)
633 		cval |= TXX9_SILCR_UPEN;
634 	if (!(termios->c_cflag & PARODD))
635 		cval |= TXX9_SILCR_UEPS;
636 
637 	/*
638 	 * Ask the core to calculate the divisor for us.
639 	 */
640 	baud = uart_get_baud_rate(up, termios, old, 0, up->uartclk/16/2);
641 	quot = uart_get_divisor(up, baud);
642 
643 	/* Set up FIFOs */
644 	/* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
645 	fcr = TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1;
646 
647 	/*
648 	 * Ok, we're now changing the port state.  Do it with
649 	 * interrupts disabled.
650 	 */
651 	spin_lock_irqsave(&up->lock, flags);
652 
653 	/*
654 	 * Update the per-port timeout.
655 	 */
656 	uart_update_timeout(up, termios->c_cflag, baud);
657 
658 	up->read_status_mask = TXX9_SIDISR_UOER |
659 		TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS;
660 	if (termios->c_iflag & INPCK)
661 		up->read_status_mask |= TXX9_SIDISR_UFER | TXX9_SIDISR_UPER;
662 	if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
663 		up->read_status_mask |= TXX9_SIDISR_UBRK;
664 
665 	/*
666 	 * Characteres to ignore
667 	 */
668 	up->ignore_status_mask = 0;
669 	if (termios->c_iflag & IGNPAR)
670 		up->ignore_status_mask |= TXX9_SIDISR_UPER | TXX9_SIDISR_UFER;
671 	if (termios->c_iflag & IGNBRK) {
672 		up->ignore_status_mask |= TXX9_SIDISR_UBRK;
673 		/*
674 		 * If we're ignoring parity and break indicators,
675 		 * ignore overruns too (for real raw support).
676 		 */
677 		if (termios->c_iflag & IGNPAR)
678 			up->ignore_status_mask |= TXX9_SIDISR_UOER;
679 	}
680 
681 	/*
682 	 * ignore all characters if CREAD is not set
683 	 */
684 	if ((termios->c_cflag & CREAD) == 0)
685 		up->ignore_status_mask |= TXX9_SIDISR_RDIS;
686 
687 	/* CTS flow control flag */
688 	if ((termios->c_cflag & CRTSCTS) &&
689 	    (up->flags & UPF_TXX9_HAVE_CTS_LINE)) {
690 		sio_set(up, TXX9_SIFLCR,
691 			TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
692 	} else {
693 		sio_mask(up, TXX9_SIFLCR,
694 			 TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
695 	}
696 
697 	sio_out(up, TXX9_SILCR, cval);
698 	sio_quot_set(up, quot);
699 	sio_out(up, TXX9_SIFCR, fcr);
700 
701 	serial_txx9_set_mctrl(up, up->mctrl);
702 	spin_unlock_irqrestore(&up->lock, flags);
703 }
704 
705 static void
706 serial_txx9_pm(struct uart_port *port, unsigned int state,
707 	      unsigned int oldstate)
708 {
709 	/*
710 	 * If oldstate was -1 this is called from
711 	 * uart_configure_port().  In this case do not initialize the
712 	 * port now, because the port was already initialized (for
713 	 * non-console port) or should not be initialized here (for
714 	 * console port).  If we initialized the port here we lose
715 	 * serial console settings.
716 	 */
717 	if (state == 0 && oldstate != -1)
718 		serial_txx9_initialize(port);
719 }
720 
721 static int serial_txx9_request_resource(struct uart_port *up)
722 {
723 	unsigned int size = TXX9_REGION_SIZE;
724 	int ret = 0;
725 
726 	switch (up->iotype) {
727 	default:
728 		if (!up->mapbase)
729 			break;
730 
731 		if (!request_mem_region(up->mapbase, size, "serial_txx9")) {
732 			ret = -EBUSY;
733 			break;
734 		}
735 
736 		if (up->flags & UPF_IOREMAP) {
737 			up->membase = ioremap(up->mapbase, size);
738 			if (!up->membase) {
739 				release_mem_region(up->mapbase, size);
740 				ret = -ENOMEM;
741 			}
742 		}
743 		break;
744 
745 	case UPIO_PORT:
746 		if (!request_region(up->iobase, size, "serial_txx9"))
747 			ret = -EBUSY;
748 		break;
749 	}
750 	return ret;
751 }
752 
753 static void serial_txx9_release_resource(struct uart_port *up)
754 {
755 	unsigned int size = TXX9_REGION_SIZE;
756 
757 	switch (up->iotype) {
758 	default:
759 		if (!up->mapbase)
760 			break;
761 
762 		if (up->flags & UPF_IOREMAP) {
763 			iounmap(up->membase);
764 			up->membase = NULL;
765 		}
766 
767 		release_mem_region(up->mapbase, size);
768 		break;
769 
770 	case UPIO_PORT:
771 		release_region(up->iobase, size);
772 		break;
773 	}
774 }
775 
776 static void serial_txx9_release_port(struct uart_port *up)
777 {
778 	serial_txx9_release_resource(up);
779 }
780 
781 static int serial_txx9_request_port(struct uart_port *up)
782 {
783 	return serial_txx9_request_resource(up);
784 }
785 
786 static void serial_txx9_config_port(struct uart_port *up, int uflags)
787 {
788 	int ret;
789 
790 	/*
791 	 * Find the region that we can probe for.  This in turn
792 	 * tells us whether we can probe for the type of port.
793 	 */
794 	ret = serial_txx9_request_resource(up);
795 	if (ret < 0)
796 		return;
797 	up->type = PORT_TXX9;
798 	up->fifosize = TXX9_SIO_TX_FIFO;
799 
800 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
801 	if (up->line == up->cons->index)
802 		return;
803 #endif
804 	serial_txx9_initialize(up);
805 }
806 
807 static const char *
808 serial_txx9_type(struct uart_port *port)
809 {
810 	return "txx9";
811 }
812 
813 static const struct uart_ops serial_txx9_pops = {
814 	.tx_empty	= serial_txx9_tx_empty,
815 	.set_mctrl	= serial_txx9_set_mctrl,
816 	.get_mctrl	= serial_txx9_get_mctrl,
817 	.stop_tx	= serial_txx9_stop_tx,
818 	.start_tx	= serial_txx9_start_tx,
819 	.stop_rx	= serial_txx9_stop_rx,
820 	.break_ctl	= serial_txx9_break_ctl,
821 	.startup	= serial_txx9_startup,
822 	.shutdown	= serial_txx9_shutdown,
823 	.set_termios	= serial_txx9_set_termios,
824 	.pm		= serial_txx9_pm,
825 	.type		= serial_txx9_type,
826 	.release_port	= serial_txx9_release_port,
827 	.request_port	= serial_txx9_request_port,
828 	.config_port	= serial_txx9_config_port,
829 #ifdef CONFIG_CONSOLE_POLL
830 	.poll_get_char	= serial_txx9_get_poll_char,
831 	.poll_put_char	= serial_txx9_put_poll_char,
832 #endif
833 };
834 
835 static struct uart_port serial_txx9_ports[UART_NR];
836 
837 static void __init serial_txx9_register_ports(struct uart_driver *drv,
838 					      struct device *dev)
839 {
840 	int i;
841 
842 	for (i = 0; i < UART_NR; i++) {
843 		struct uart_port *up = &serial_txx9_ports[i];
844 
845 		up->line = i;
846 		up->ops = &serial_txx9_pops;
847 		up->dev = dev;
848 		if (up->iobase || up->mapbase)
849 			uart_add_one_port(drv, up);
850 	}
851 }
852 
853 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
854 
855 static void serial_txx9_console_putchar(struct uart_port *up, unsigned char ch)
856 {
857 	wait_for_xmitr(up);
858 	sio_out(up, TXX9_SITFIFO, ch);
859 }
860 
861 /*
862  *	Print a string to the serial port trying not to disturb
863  *	any possible real use of the port...
864  *
865  *	The console_lock must be held when we get here.
866  */
867 static void
868 serial_txx9_console_write(struct console *co, const char *s, unsigned int count)
869 {
870 	struct uart_port *up = &serial_txx9_ports[co->index];
871 	unsigned int ier, flcr;
872 
873 	/*
874 	 *	First save the UER then disable the interrupts
875 	 */
876 	ier = sio_in(up, TXX9_SIDICR);
877 	sio_out(up, TXX9_SIDICR, 0);
878 	/*
879 	 *	Disable flow-control if enabled (and unnecessary)
880 	 */
881 	flcr = sio_in(up, TXX9_SIFLCR);
882 	if (!(up->flags & UPF_CONS_FLOW) && (flcr & TXX9_SIFLCR_TES))
883 		sio_out(up, TXX9_SIFLCR, flcr & ~TXX9_SIFLCR_TES);
884 
885 	uart_console_write(up, s, count, serial_txx9_console_putchar);
886 
887 	/*
888 	 *	Finally, wait for transmitter to become empty
889 	 *	and restore the IER
890 	 */
891 	wait_for_xmitr(up);
892 	sio_out(up, TXX9_SIFLCR, flcr);
893 	sio_out(up, TXX9_SIDICR, ier);
894 }
895 
896 static int __init serial_txx9_console_setup(struct console *co, char *options)
897 {
898 	struct uart_port *up;
899 	int baud = 9600;
900 	int bits = 8;
901 	int parity = 'n';
902 	int flow = 'n';
903 
904 	/*
905 	 * Check whether an invalid uart number has been specified, and
906 	 * if so, search for the first available port that does have
907 	 * console support.
908 	 */
909 	if (co->index >= UART_NR)
910 		co->index = 0;
911 	up = &serial_txx9_ports[co->index];
912 	if (!up->ops)
913 		return -ENODEV;
914 
915 	serial_txx9_initialize(up);
916 
917 	if (options)
918 		uart_parse_options(options, &baud, &parity, &bits, &flow);
919 
920 	return uart_set_options(up, co, baud, parity, bits, flow);
921 }
922 
923 static struct uart_driver serial_txx9_reg;
924 static struct console serial_txx9_console = {
925 	.name		= TXX9_TTY_NAME,
926 	.write		= serial_txx9_console_write,
927 	.device		= uart_console_device,
928 	.setup		= serial_txx9_console_setup,
929 	.flags		= CON_PRINTBUFFER,
930 	.index		= -1,
931 	.data		= &serial_txx9_reg,
932 };
933 
934 static int __init serial_txx9_console_init(void)
935 {
936 	register_console(&serial_txx9_console);
937 	return 0;
938 }
939 console_initcall(serial_txx9_console_init);
940 
941 #define SERIAL_TXX9_CONSOLE	&serial_txx9_console
942 #else
943 #define SERIAL_TXX9_CONSOLE	NULL
944 #endif
945 
946 static struct uart_driver serial_txx9_reg = {
947 	.owner			= THIS_MODULE,
948 	.driver_name		= "serial_txx9",
949 	.dev_name		= TXX9_TTY_NAME,
950 	.major			= TXX9_TTY_MAJOR,
951 	.minor			= TXX9_TTY_MINOR_START,
952 	.nr			= UART_NR,
953 	.cons			= SERIAL_TXX9_CONSOLE,
954 };
955 
956 int __init early_serial_txx9_setup(struct uart_port *port)
957 {
958 	if (port->line >= ARRAY_SIZE(serial_txx9_ports))
959 		return -ENODEV;
960 
961 	serial_txx9_ports[port->line] = *port;
962 	serial_txx9_ports[port->line].ops = &serial_txx9_pops;
963 	serial_txx9_ports[port->line].flags |=
964 		UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
965 	return 0;
966 }
967 
968 static DEFINE_MUTEX(serial_txx9_mutex);
969 
970 /**
971  *	serial_txx9_register_port - register a serial port
972  *	@port: serial port template
973  *
974  *	Configure the serial port specified by the request.
975  *
976  *	The port is then probed and if necessary the IRQ is autodetected
977  *	If this fails an error is returned.
978  *
979  *	On success the port is ready to use and the line number is returned.
980  */
981 static int serial_txx9_register_port(struct uart_port *port)
982 {
983 	int i;
984 	struct uart_port *uart;
985 	int ret = -ENOSPC;
986 
987 	mutex_lock(&serial_txx9_mutex);
988 	for (i = 0; i < UART_NR; i++) {
989 		uart = &serial_txx9_ports[i];
990 		if (uart_match_port(uart, port)) {
991 			uart_remove_one_port(&serial_txx9_reg, uart);
992 			break;
993 		}
994 	}
995 	if (i == UART_NR) {
996 		/* Find unused port */
997 		for (i = 0; i < UART_NR; i++) {
998 			uart = &serial_txx9_ports[i];
999 			if (!(uart->iobase || uart->mapbase))
1000 				break;
1001 		}
1002 	}
1003 	if (i < UART_NR) {
1004 		uart->iobase = port->iobase;
1005 		uart->membase = port->membase;
1006 		uart->irq      = port->irq;
1007 		uart->uartclk  = port->uartclk;
1008 		uart->iotype   = port->iotype;
1009 		uart->flags    = port->flags
1010 			| UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
1011 		uart->mapbase  = port->mapbase;
1012 		if (port->dev)
1013 			uart->dev = port->dev;
1014 		ret = uart_add_one_port(&serial_txx9_reg, uart);
1015 		if (ret == 0)
1016 			ret = uart->line;
1017 	}
1018 	mutex_unlock(&serial_txx9_mutex);
1019 	return ret;
1020 }
1021 
1022 /**
1023  *	serial_txx9_unregister_port - remove a txx9 serial port at runtime
1024  *	@line: serial line number
1025  *
1026  *	Remove one serial port.  This may not be called from interrupt
1027  *	context.  We hand the port back to the our control.
1028  */
1029 static void serial_txx9_unregister_port(int line)
1030 {
1031 	struct uart_port *uart = &serial_txx9_ports[line];
1032 
1033 	mutex_lock(&serial_txx9_mutex);
1034 	uart_remove_one_port(&serial_txx9_reg, uart);
1035 	uart->flags = 0;
1036 	uart->type = PORT_UNKNOWN;
1037 	uart->iobase = 0;
1038 	uart->mapbase = 0;
1039 	uart->membase = NULL;
1040 	uart->dev = NULL;
1041 	mutex_unlock(&serial_txx9_mutex);
1042 }
1043 
1044 /*
1045  * Register a set of serial devices attached to a platform device.
1046  */
1047 static int serial_txx9_probe(struct platform_device *dev)
1048 {
1049 	struct uart_port *p = dev_get_platdata(&dev->dev);
1050 	struct uart_port port;
1051 	int ret, i;
1052 
1053 	memset(&port, 0, sizeof(struct uart_port));
1054 	for (i = 0; p && p->uartclk != 0; p++, i++) {
1055 		port.iobase	= p->iobase;
1056 		port.membase	= p->membase;
1057 		port.irq	= p->irq;
1058 		port.uartclk	= p->uartclk;
1059 		port.iotype	= p->iotype;
1060 		port.flags	= p->flags;
1061 		port.mapbase	= p->mapbase;
1062 		port.dev	= &dev->dev;
1063 		port.has_sysrq	= IS_ENABLED(CONFIG_SERIAL_TXX9_CONSOLE);
1064 		ret = serial_txx9_register_port(&port);
1065 		if (ret < 0) {
1066 			dev_err(&dev->dev, "unable to register port at index %d "
1067 				"(IO%lx MEM%llx IRQ%d): %d\n", i,
1068 				p->iobase, (unsigned long long)p->mapbase,
1069 				p->irq, ret);
1070 		}
1071 	}
1072 	return 0;
1073 }
1074 
1075 /*
1076  * Remove serial ports registered against a platform device.
1077  */
1078 static int serial_txx9_remove(struct platform_device *dev)
1079 {
1080 	int i;
1081 
1082 	for (i = 0; i < UART_NR; i++) {
1083 		struct uart_port *up = &serial_txx9_ports[i];
1084 
1085 		if (up->dev == &dev->dev)
1086 			serial_txx9_unregister_port(i);
1087 	}
1088 	return 0;
1089 }
1090 
1091 #ifdef CONFIG_PM
1092 static int serial_txx9_suspend(struct platform_device *dev, pm_message_t state)
1093 {
1094 	int i;
1095 
1096 	for (i = 0; i < UART_NR; i++) {
1097 		struct uart_port *up = &serial_txx9_ports[i];
1098 
1099 		if (up->type != PORT_UNKNOWN && up->dev == &dev->dev)
1100 			uart_suspend_port(&serial_txx9_reg, up);
1101 	}
1102 
1103 	return 0;
1104 }
1105 
1106 static int serial_txx9_resume(struct platform_device *dev)
1107 {
1108 	int i;
1109 
1110 	for (i = 0; i < UART_NR; i++) {
1111 		struct uart_port *up = &serial_txx9_ports[i];
1112 
1113 		if (up->type != PORT_UNKNOWN && up->dev == &dev->dev)
1114 			uart_resume_port(&serial_txx9_reg, up);
1115 	}
1116 
1117 	return 0;
1118 }
1119 #endif
1120 
1121 static struct platform_driver serial_txx9_plat_driver = {
1122 	.probe		= serial_txx9_probe,
1123 	.remove		= serial_txx9_remove,
1124 #ifdef CONFIG_PM
1125 	.suspend	= serial_txx9_suspend,
1126 	.resume		= serial_txx9_resume,
1127 #endif
1128 	.driver		= {
1129 		.name	= "serial_txx9",
1130 	},
1131 };
1132 
1133 #ifdef ENABLE_SERIAL_TXX9_PCI
1134 /*
1135  * Probe one serial board.  Unfortunately, there is no rhyme nor reason
1136  * to the arrangement of serial ports on a PCI card.
1137  */
1138 static int
1139 pciserial_txx9_init_one(struct pci_dev *dev, const struct pci_device_id *ent)
1140 {
1141 	struct uart_port port;
1142 	int line;
1143 	int rc;
1144 
1145 	rc = pci_enable_device(dev);
1146 	if (rc)
1147 		return rc;
1148 
1149 	memset(&port, 0, sizeof(port));
1150 	port.ops = &serial_txx9_pops;
1151 	port.flags |= UPF_TXX9_HAVE_CTS_LINE;
1152 	port.uartclk = 66670000;
1153 	port.irq = dev->irq;
1154 	port.iotype = UPIO_PORT;
1155 	port.iobase = pci_resource_start(dev, 1);
1156 	port.dev = &dev->dev;
1157 	line = serial_txx9_register_port(&port);
1158 	if (line < 0) {
1159 		printk(KERN_WARNING "Couldn't register serial port %s: %d\n", pci_name(dev), line);
1160 		pci_disable_device(dev);
1161 		return line;
1162 	}
1163 	pci_set_drvdata(dev, &serial_txx9_ports[line]);
1164 
1165 	return 0;
1166 }
1167 
1168 static void pciserial_txx9_remove_one(struct pci_dev *dev)
1169 {
1170 	struct uart_port *up = pci_get_drvdata(dev);
1171 
1172 	if (up) {
1173 		serial_txx9_unregister_port(up->line);
1174 		pci_disable_device(dev);
1175 	}
1176 }
1177 
1178 #ifdef CONFIG_PM
1179 static int pciserial_txx9_suspend_one(struct pci_dev *dev, pm_message_t state)
1180 {
1181 	struct uart_port *up = pci_get_drvdata(dev);
1182 
1183 	if (up)
1184 		uart_suspend_port(&serial_txx9_reg, up);
1185 	pci_save_state(dev);
1186 	pci_set_power_state(dev, pci_choose_state(dev, state));
1187 	return 0;
1188 }
1189 
1190 static int pciserial_txx9_resume_one(struct pci_dev *dev)
1191 {
1192 	struct uart_port *up = pci_get_drvdata(dev);
1193 
1194 	pci_set_power_state(dev, PCI_D0);
1195 	pci_restore_state(dev);
1196 	if (up)
1197 		uart_resume_port(&serial_txx9_reg, up);
1198 	return 0;
1199 }
1200 #endif
1201 
1202 static const struct pci_device_id serial_txx9_pci_tbl[] = {
1203 	{ PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC86C001_MISC) },
1204 	{ 0, }
1205 };
1206 
1207 static struct pci_driver serial_txx9_pci_driver = {
1208 	.name		= "serial_txx9",
1209 	.probe		= pciserial_txx9_init_one,
1210 	.remove		= pciserial_txx9_remove_one,
1211 #ifdef CONFIG_PM
1212 	.suspend	= pciserial_txx9_suspend_one,
1213 	.resume		= pciserial_txx9_resume_one,
1214 #endif
1215 	.id_table	= serial_txx9_pci_tbl,
1216 };
1217 
1218 MODULE_DEVICE_TABLE(pci, serial_txx9_pci_tbl);
1219 #endif /* ENABLE_SERIAL_TXX9_PCI */
1220 
1221 static struct platform_device *serial_txx9_plat_devs;
1222 
1223 static int __init serial_txx9_init(void)
1224 {
1225 	int ret;
1226 
1227 	ret = uart_register_driver(&serial_txx9_reg);
1228 	if (ret)
1229 		goto out;
1230 
1231 	serial_txx9_plat_devs = platform_device_alloc("serial_txx9", -1);
1232 	if (!serial_txx9_plat_devs) {
1233 		ret = -ENOMEM;
1234 		goto unreg_uart_drv;
1235 	}
1236 
1237 	ret = platform_device_add(serial_txx9_plat_devs);
1238 	if (ret)
1239 		goto put_dev;
1240 
1241 	serial_txx9_register_ports(&serial_txx9_reg,
1242 				   &serial_txx9_plat_devs->dev);
1243 
1244 	ret = platform_driver_register(&serial_txx9_plat_driver);
1245 	if (ret)
1246 		goto del_dev;
1247 
1248 #ifdef ENABLE_SERIAL_TXX9_PCI
1249 	ret = pci_register_driver(&serial_txx9_pci_driver);
1250 	if (ret) {
1251 		platform_driver_unregister(&serial_txx9_plat_driver);
1252 	}
1253 #endif
1254 	if (ret == 0)
1255 		goto out;
1256 
1257  del_dev:
1258 	platform_device_del(serial_txx9_plat_devs);
1259  put_dev:
1260 	platform_device_put(serial_txx9_plat_devs);
1261  unreg_uart_drv:
1262 	uart_unregister_driver(&serial_txx9_reg);
1263  out:
1264 	return ret;
1265 }
1266 
1267 static void __exit serial_txx9_exit(void)
1268 {
1269 	int i;
1270 
1271 #ifdef ENABLE_SERIAL_TXX9_PCI
1272 	pci_unregister_driver(&serial_txx9_pci_driver);
1273 #endif
1274 	platform_driver_unregister(&serial_txx9_plat_driver);
1275 	platform_device_unregister(serial_txx9_plat_devs);
1276 	for (i = 0; i < UART_NR; i++) {
1277 		struct uart_port *up = &serial_txx9_ports[i];
1278 		if (up->iobase || up->mapbase)
1279 			uart_remove_one_port(&serial_txx9_reg, up);
1280 	}
1281 
1282 	uart_unregister_driver(&serial_txx9_reg);
1283 }
1284 
1285 module_init(serial_txx9_init);
1286 module_exit(serial_txx9_exit);
1287 
1288 MODULE_LICENSE("GPL");
1289 MODULE_DESCRIPTION("TX39/49 serial driver");
1290 
1291 MODULE_ALIAS_CHARDEV_MAJOR(TXX9_TTY_MAJOR);
1292