1 /* 2 * Driver for SA11x0 serial ports 3 * 4 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o. 5 * 6 * Copyright (C) 2000 Deep Blue Solutions Ltd. 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; either version 2 of the License, or 11 * (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 21 */ 22 23 #if defined(CONFIG_SERIAL_SA1100_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) 24 #define SUPPORT_SYSRQ 25 #endif 26 27 #include <linux/module.h> 28 #include <linux/ioport.h> 29 #include <linux/init.h> 30 #include <linux/console.h> 31 #include <linux/sysrq.h> 32 #include <linux/platform_data/sa11x0-serial.h> 33 #include <linux/platform_device.h> 34 #include <linux/tty.h> 35 #include <linux/tty_flip.h> 36 #include <linux/serial_core.h> 37 #include <linux/serial.h> 38 #include <linux/io.h> 39 40 #include <asm/irq.h> 41 #include <mach/hardware.h> 42 #include <mach/irqs.h> 43 44 /* We've been assigned a range on the "Low-density serial ports" major */ 45 #define SERIAL_SA1100_MAJOR 204 46 #define MINOR_START 5 47 48 #define NR_PORTS 3 49 50 #define SA1100_ISR_PASS_LIMIT 256 51 52 /* 53 * Convert from ignore_status_mask or read_status_mask to UTSR[01] 54 */ 55 #define SM_TO_UTSR0(x) ((x) & 0xff) 56 #define SM_TO_UTSR1(x) ((x) >> 8) 57 #define UTSR0_TO_SM(x) ((x)) 58 #define UTSR1_TO_SM(x) ((x) << 8) 59 60 #define UART_GET_UTCR0(sport) __raw_readl((sport)->port.membase + UTCR0) 61 #define UART_GET_UTCR1(sport) __raw_readl((sport)->port.membase + UTCR1) 62 #define UART_GET_UTCR2(sport) __raw_readl((sport)->port.membase + UTCR2) 63 #define UART_GET_UTCR3(sport) __raw_readl((sport)->port.membase + UTCR3) 64 #define UART_GET_UTSR0(sport) __raw_readl((sport)->port.membase + UTSR0) 65 #define UART_GET_UTSR1(sport) __raw_readl((sport)->port.membase + UTSR1) 66 #define UART_GET_CHAR(sport) __raw_readl((sport)->port.membase + UTDR) 67 68 #define UART_PUT_UTCR0(sport,v) __raw_writel((v),(sport)->port.membase + UTCR0) 69 #define UART_PUT_UTCR1(sport,v) __raw_writel((v),(sport)->port.membase + UTCR1) 70 #define UART_PUT_UTCR2(sport,v) __raw_writel((v),(sport)->port.membase + UTCR2) 71 #define UART_PUT_UTCR3(sport,v) __raw_writel((v),(sport)->port.membase + UTCR3) 72 #define UART_PUT_UTSR0(sport,v) __raw_writel((v),(sport)->port.membase + UTSR0) 73 #define UART_PUT_UTSR1(sport,v) __raw_writel((v),(sport)->port.membase + UTSR1) 74 #define UART_PUT_CHAR(sport,v) __raw_writel((v),(sport)->port.membase + UTDR) 75 76 /* 77 * This is the size of our serial port register set. 78 */ 79 #define UART_PORT_SIZE 0x24 80 81 /* 82 * This determines how often we check the modem status signals 83 * for any change. They generally aren't connected to an IRQ 84 * so we have to poll them. We also check immediately before 85 * filling the TX fifo incase CTS has been dropped. 86 */ 87 #define MCTRL_TIMEOUT (250*HZ/1000) 88 89 struct sa1100_port { 90 struct uart_port port; 91 struct timer_list timer; 92 unsigned int old_status; 93 }; 94 95 /* 96 * Handle any change of modem status signal since we were last called. 97 */ 98 static void sa1100_mctrl_check(struct sa1100_port *sport) 99 { 100 unsigned int status, changed; 101 102 status = sport->port.ops->get_mctrl(&sport->port); 103 changed = status ^ sport->old_status; 104 105 if (changed == 0) 106 return; 107 108 sport->old_status = status; 109 110 if (changed & TIOCM_RI) 111 sport->port.icount.rng++; 112 if (changed & TIOCM_DSR) 113 sport->port.icount.dsr++; 114 if (changed & TIOCM_CAR) 115 uart_handle_dcd_change(&sport->port, status & TIOCM_CAR); 116 if (changed & TIOCM_CTS) 117 uart_handle_cts_change(&sport->port, status & TIOCM_CTS); 118 119 wake_up_interruptible(&sport->port.state->port.delta_msr_wait); 120 } 121 122 /* 123 * This is our per-port timeout handler, for checking the 124 * modem status signals. 125 */ 126 static void sa1100_timeout(unsigned long data) 127 { 128 struct sa1100_port *sport = (struct sa1100_port *)data; 129 unsigned long flags; 130 131 if (sport->port.state) { 132 spin_lock_irqsave(&sport->port.lock, flags); 133 sa1100_mctrl_check(sport); 134 spin_unlock_irqrestore(&sport->port.lock, flags); 135 136 mod_timer(&sport->timer, jiffies + MCTRL_TIMEOUT); 137 } 138 } 139 140 /* 141 * interrupts disabled on entry 142 */ 143 static void sa1100_stop_tx(struct uart_port *port) 144 { 145 struct sa1100_port *sport = (struct sa1100_port *)port; 146 u32 utcr3; 147 148 utcr3 = UART_GET_UTCR3(sport); 149 UART_PUT_UTCR3(sport, utcr3 & ~UTCR3_TIE); 150 sport->port.read_status_mask &= ~UTSR0_TO_SM(UTSR0_TFS); 151 } 152 153 /* 154 * port locked and interrupts disabled 155 */ 156 static void sa1100_start_tx(struct uart_port *port) 157 { 158 struct sa1100_port *sport = (struct sa1100_port *)port; 159 u32 utcr3; 160 161 utcr3 = UART_GET_UTCR3(sport); 162 sport->port.read_status_mask |= UTSR0_TO_SM(UTSR0_TFS); 163 UART_PUT_UTCR3(sport, utcr3 | UTCR3_TIE); 164 } 165 166 /* 167 * Interrupts enabled 168 */ 169 static void sa1100_stop_rx(struct uart_port *port) 170 { 171 struct sa1100_port *sport = (struct sa1100_port *)port; 172 u32 utcr3; 173 174 utcr3 = UART_GET_UTCR3(sport); 175 UART_PUT_UTCR3(sport, utcr3 & ~UTCR3_RIE); 176 } 177 178 /* 179 * Set the modem control timer to fire immediately. 180 */ 181 static void sa1100_enable_ms(struct uart_port *port) 182 { 183 struct sa1100_port *sport = (struct sa1100_port *)port; 184 185 mod_timer(&sport->timer, jiffies); 186 } 187 188 static void 189 sa1100_rx_chars(struct sa1100_port *sport) 190 { 191 unsigned int status, ch, flg; 192 193 status = UTSR1_TO_SM(UART_GET_UTSR1(sport)) | 194 UTSR0_TO_SM(UART_GET_UTSR0(sport)); 195 while (status & UTSR1_TO_SM(UTSR1_RNE)) { 196 ch = UART_GET_CHAR(sport); 197 198 sport->port.icount.rx++; 199 200 flg = TTY_NORMAL; 201 202 /* 203 * note that the error handling code is 204 * out of the main execution path 205 */ 206 if (status & UTSR1_TO_SM(UTSR1_PRE | UTSR1_FRE | UTSR1_ROR)) { 207 if (status & UTSR1_TO_SM(UTSR1_PRE)) 208 sport->port.icount.parity++; 209 else if (status & UTSR1_TO_SM(UTSR1_FRE)) 210 sport->port.icount.frame++; 211 if (status & UTSR1_TO_SM(UTSR1_ROR)) 212 sport->port.icount.overrun++; 213 214 status &= sport->port.read_status_mask; 215 216 if (status & UTSR1_TO_SM(UTSR1_PRE)) 217 flg = TTY_PARITY; 218 else if (status & UTSR1_TO_SM(UTSR1_FRE)) 219 flg = TTY_FRAME; 220 221 #ifdef SUPPORT_SYSRQ 222 sport->port.sysrq = 0; 223 #endif 224 } 225 226 if (uart_handle_sysrq_char(&sport->port, ch)) 227 goto ignore_char; 228 229 uart_insert_char(&sport->port, status, UTSR1_TO_SM(UTSR1_ROR), ch, flg); 230 231 ignore_char: 232 status = UTSR1_TO_SM(UART_GET_UTSR1(sport)) | 233 UTSR0_TO_SM(UART_GET_UTSR0(sport)); 234 } 235 236 spin_unlock(&sport->port.lock); 237 tty_flip_buffer_push(&sport->port.state->port); 238 spin_lock(&sport->port.lock); 239 } 240 241 static void sa1100_tx_chars(struct sa1100_port *sport) 242 { 243 struct circ_buf *xmit = &sport->port.state->xmit; 244 245 if (sport->port.x_char) { 246 UART_PUT_CHAR(sport, sport->port.x_char); 247 sport->port.icount.tx++; 248 sport->port.x_char = 0; 249 return; 250 } 251 252 /* 253 * Check the modem control lines before 254 * transmitting anything. 255 */ 256 sa1100_mctrl_check(sport); 257 258 if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) { 259 sa1100_stop_tx(&sport->port); 260 return; 261 } 262 263 /* 264 * Tried using FIFO (not checking TNF) for fifo fill: 265 * still had the '4 bytes repeated' problem. 266 */ 267 while (UART_GET_UTSR1(sport) & UTSR1_TNF) { 268 UART_PUT_CHAR(sport, xmit->buf[xmit->tail]); 269 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 270 sport->port.icount.tx++; 271 if (uart_circ_empty(xmit)) 272 break; 273 } 274 275 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 276 uart_write_wakeup(&sport->port); 277 278 if (uart_circ_empty(xmit)) 279 sa1100_stop_tx(&sport->port); 280 } 281 282 static irqreturn_t sa1100_int(int irq, void *dev_id) 283 { 284 struct sa1100_port *sport = dev_id; 285 unsigned int status, pass_counter = 0; 286 287 spin_lock(&sport->port.lock); 288 status = UART_GET_UTSR0(sport); 289 status &= SM_TO_UTSR0(sport->port.read_status_mask) | ~UTSR0_TFS; 290 do { 291 if (status & (UTSR0_RFS | UTSR0_RID)) { 292 /* Clear the receiver idle bit, if set */ 293 if (status & UTSR0_RID) 294 UART_PUT_UTSR0(sport, UTSR0_RID); 295 sa1100_rx_chars(sport); 296 } 297 298 /* Clear the relevant break bits */ 299 if (status & (UTSR0_RBB | UTSR0_REB)) 300 UART_PUT_UTSR0(sport, status & (UTSR0_RBB | UTSR0_REB)); 301 302 if (status & UTSR0_RBB) 303 sport->port.icount.brk++; 304 305 if (status & UTSR0_REB) 306 uart_handle_break(&sport->port); 307 308 if (status & UTSR0_TFS) 309 sa1100_tx_chars(sport); 310 if (pass_counter++ > SA1100_ISR_PASS_LIMIT) 311 break; 312 status = UART_GET_UTSR0(sport); 313 status &= SM_TO_UTSR0(sport->port.read_status_mask) | 314 ~UTSR0_TFS; 315 } while (status & (UTSR0_TFS | UTSR0_RFS | UTSR0_RID)); 316 spin_unlock(&sport->port.lock); 317 318 return IRQ_HANDLED; 319 } 320 321 /* 322 * Return TIOCSER_TEMT when transmitter is not busy. 323 */ 324 static unsigned int sa1100_tx_empty(struct uart_port *port) 325 { 326 struct sa1100_port *sport = (struct sa1100_port *)port; 327 328 return UART_GET_UTSR1(sport) & UTSR1_TBY ? 0 : TIOCSER_TEMT; 329 } 330 331 static unsigned int sa1100_get_mctrl(struct uart_port *port) 332 { 333 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR; 334 } 335 336 static void sa1100_set_mctrl(struct uart_port *port, unsigned int mctrl) 337 { 338 } 339 340 /* 341 * Interrupts always disabled. 342 */ 343 static void sa1100_break_ctl(struct uart_port *port, int break_state) 344 { 345 struct sa1100_port *sport = (struct sa1100_port *)port; 346 unsigned long flags; 347 unsigned int utcr3; 348 349 spin_lock_irqsave(&sport->port.lock, flags); 350 utcr3 = UART_GET_UTCR3(sport); 351 if (break_state == -1) 352 utcr3 |= UTCR3_BRK; 353 else 354 utcr3 &= ~UTCR3_BRK; 355 UART_PUT_UTCR3(sport, utcr3); 356 spin_unlock_irqrestore(&sport->port.lock, flags); 357 } 358 359 static int sa1100_startup(struct uart_port *port) 360 { 361 struct sa1100_port *sport = (struct sa1100_port *)port; 362 int retval; 363 364 /* 365 * Allocate the IRQ 366 */ 367 retval = request_irq(sport->port.irq, sa1100_int, 0, 368 "sa11x0-uart", sport); 369 if (retval) 370 return retval; 371 372 /* 373 * Finally, clear and enable interrupts 374 */ 375 UART_PUT_UTSR0(sport, -1); 376 UART_PUT_UTCR3(sport, UTCR3_RXE | UTCR3_TXE | UTCR3_RIE); 377 378 /* 379 * Enable modem status interrupts 380 */ 381 spin_lock_irq(&sport->port.lock); 382 sa1100_enable_ms(&sport->port); 383 spin_unlock_irq(&sport->port.lock); 384 385 return 0; 386 } 387 388 static void sa1100_shutdown(struct uart_port *port) 389 { 390 struct sa1100_port *sport = (struct sa1100_port *)port; 391 392 /* 393 * Stop our timer. 394 */ 395 del_timer_sync(&sport->timer); 396 397 /* 398 * Free the interrupt 399 */ 400 free_irq(sport->port.irq, sport); 401 402 /* 403 * Disable all interrupts, port and break condition. 404 */ 405 UART_PUT_UTCR3(sport, 0); 406 } 407 408 static void 409 sa1100_set_termios(struct uart_port *port, struct ktermios *termios, 410 struct ktermios *old) 411 { 412 struct sa1100_port *sport = (struct sa1100_port *)port; 413 unsigned long flags; 414 unsigned int utcr0, old_utcr3, baud, quot; 415 unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8; 416 417 /* 418 * We only support CS7 and CS8. 419 */ 420 while ((termios->c_cflag & CSIZE) != CS7 && 421 (termios->c_cflag & CSIZE) != CS8) { 422 termios->c_cflag &= ~CSIZE; 423 termios->c_cflag |= old_csize; 424 old_csize = CS8; 425 } 426 427 if ((termios->c_cflag & CSIZE) == CS8) 428 utcr0 = UTCR0_DSS; 429 else 430 utcr0 = 0; 431 432 if (termios->c_cflag & CSTOPB) 433 utcr0 |= UTCR0_SBS; 434 if (termios->c_cflag & PARENB) { 435 utcr0 |= UTCR0_PE; 436 if (!(termios->c_cflag & PARODD)) 437 utcr0 |= UTCR0_OES; 438 } 439 440 /* 441 * Ask the core to calculate the divisor for us. 442 */ 443 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); 444 quot = uart_get_divisor(port, baud); 445 446 spin_lock_irqsave(&sport->port.lock, flags); 447 448 sport->port.read_status_mask &= UTSR0_TO_SM(UTSR0_TFS); 449 sport->port.read_status_mask |= UTSR1_TO_SM(UTSR1_ROR); 450 if (termios->c_iflag & INPCK) 451 sport->port.read_status_mask |= 452 UTSR1_TO_SM(UTSR1_FRE | UTSR1_PRE); 453 if (termios->c_iflag & (BRKINT | PARMRK)) 454 sport->port.read_status_mask |= 455 UTSR0_TO_SM(UTSR0_RBB | UTSR0_REB); 456 457 /* 458 * Characters to ignore 459 */ 460 sport->port.ignore_status_mask = 0; 461 if (termios->c_iflag & IGNPAR) 462 sport->port.ignore_status_mask |= 463 UTSR1_TO_SM(UTSR1_FRE | UTSR1_PRE); 464 if (termios->c_iflag & IGNBRK) { 465 sport->port.ignore_status_mask |= 466 UTSR0_TO_SM(UTSR0_RBB | UTSR0_REB); 467 /* 468 * If we're ignoring parity and break indicators, 469 * ignore overruns too (for real raw support). 470 */ 471 if (termios->c_iflag & IGNPAR) 472 sport->port.ignore_status_mask |= 473 UTSR1_TO_SM(UTSR1_ROR); 474 } 475 476 del_timer_sync(&sport->timer); 477 478 /* 479 * Update the per-port timeout. 480 */ 481 uart_update_timeout(port, termios->c_cflag, baud); 482 483 /* 484 * disable interrupts and drain transmitter 485 */ 486 old_utcr3 = UART_GET_UTCR3(sport); 487 UART_PUT_UTCR3(sport, old_utcr3 & ~(UTCR3_RIE | UTCR3_TIE)); 488 489 while (UART_GET_UTSR1(sport) & UTSR1_TBY) 490 barrier(); 491 492 /* then, disable everything */ 493 UART_PUT_UTCR3(sport, 0); 494 495 /* set the parity, stop bits and data size */ 496 UART_PUT_UTCR0(sport, utcr0); 497 498 /* set the baud rate */ 499 quot -= 1; 500 UART_PUT_UTCR1(sport, ((quot & 0xf00) >> 8)); 501 UART_PUT_UTCR2(sport, (quot & 0xff)); 502 503 UART_PUT_UTSR0(sport, -1); 504 505 UART_PUT_UTCR3(sport, old_utcr3); 506 507 if (UART_ENABLE_MS(&sport->port, termios->c_cflag)) 508 sa1100_enable_ms(&sport->port); 509 510 spin_unlock_irqrestore(&sport->port.lock, flags); 511 } 512 513 static const char *sa1100_type(struct uart_port *port) 514 { 515 struct sa1100_port *sport = (struct sa1100_port *)port; 516 517 return sport->port.type == PORT_SA1100 ? "SA1100" : NULL; 518 } 519 520 /* 521 * Release the memory region(s) being used by 'port'. 522 */ 523 static void sa1100_release_port(struct uart_port *port) 524 { 525 struct sa1100_port *sport = (struct sa1100_port *)port; 526 527 release_mem_region(sport->port.mapbase, UART_PORT_SIZE); 528 } 529 530 /* 531 * Request the memory region(s) being used by 'port'. 532 */ 533 static int sa1100_request_port(struct uart_port *port) 534 { 535 struct sa1100_port *sport = (struct sa1100_port *)port; 536 537 return request_mem_region(sport->port.mapbase, UART_PORT_SIZE, 538 "sa11x0-uart") != NULL ? 0 : -EBUSY; 539 } 540 541 /* 542 * Configure/autoconfigure the port. 543 */ 544 static void sa1100_config_port(struct uart_port *port, int flags) 545 { 546 struct sa1100_port *sport = (struct sa1100_port *)port; 547 548 if (flags & UART_CONFIG_TYPE && 549 sa1100_request_port(&sport->port) == 0) 550 sport->port.type = PORT_SA1100; 551 } 552 553 /* 554 * Verify the new serial_struct (for TIOCSSERIAL). 555 * The only change we allow are to the flags and type, and 556 * even then only between PORT_SA1100 and PORT_UNKNOWN 557 */ 558 static int 559 sa1100_verify_port(struct uart_port *port, struct serial_struct *ser) 560 { 561 struct sa1100_port *sport = (struct sa1100_port *)port; 562 int ret = 0; 563 564 if (ser->type != PORT_UNKNOWN && ser->type != PORT_SA1100) 565 ret = -EINVAL; 566 if (sport->port.irq != ser->irq) 567 ret = -EINVAL; 568 if (ser->io_type != SERIAL_IO_MEM) 569 ret = -EINVAL; 570 if (sport->port.uartclk / 16 != ser->baud_base) 571 ret = -EINVAL; 572 if ((void *)sport->port.mapbase != ser->iomem_base) 573 ret = -EINVAL; 574 if (sport->port.iobase != ser->port) 575 ret = -EINVAL; 576 if (ser->hub6 != 0) 577 ret = -EINVAL; 578 return ret; 579 } 580 581 static struct uart_ops sa1100_pops = { 582 .tx_empty = sa1100_tx_empty, 583 .set_mctrl = sa1100_set_mctrl, 584 .get_mctrl = sa1100_get_mctrl, 585 .stop_tx = sa1100_stop_tx, 586 .start_tx = sa1100_start_tx, 587 .stop_rx = sa1100_stop_rx, 588 .enable_ms = sa1100_enable_ms, 589 .break_ctl = sa1100_break_ctl, 590 .startup = sa1100_startup, 591 .shutdown = sa1100_shutdown, 592 .set_termios = sa1100_set_termios, 593 .type = sa1100_type, 594 .release_port = sa1100_release_port, 595 .request_port = sa1100_request_port, 596 .config_port = sa1100_config_port, 597 .verify_port = sa1100_verify_port, 598 }; 599 600 static struct sa1100_port sa1100_ports[NR_PORTS]; 601 602 /* 603 * Setup the SA1100 serial ports. Note that we don't include the IrDA 604 * port here since we have our own SIR/FIR driver (see drivers/net/irda) 605 * 606 * Note also that we support "console=ttySAx" where "x" is either 0 or 1. 607 * Which serial port this ends up being depends on the machine you're 608 * running this kernel on. I'm not convinced that this is a good idea, 609 * but that's the way it traditionally works. 610 * 611 * Note that NanoEngine UART3 becomes UART2, and UART2 is no longer 612 * used here. 613 */ 614 static void __init sa1100_init_ports(void) 615 { 616 static int first = 1; 617 int i; 618 619 if (!first) 620 return; 621 first = 0; 622 623 for (i = 0; i < NR_PORTS; i++) { 624 sa1100_ports[i].port.uartclk = 3686400; 625 sa1100_ports[i].port.ops = &sa1100_pops; 626 sa1100_ports[i].port.fifosize = 8; 627 sa1100_ports[i].port.line = i; 628 sa1100_ports[i].port.iotype = UPIO_MEM; 629 init_timer(&sa1100_ports[i].timer); 630 sa1100_ports[i].timer.function = sa1100_timeout; 631 sa1100_ports[i].timer.data = (unsigned long)&sa1100_ports[i]; 632 } 633 634 /* 635 * make transmit lines outputs, so that when the port 636 * is closed, the output is in the MARK state. 637 */ 638 PPDR |= PPC_TXD1 | PPC_TXD3; 639 PPSR |= PPC_TXD1 | PPC_TXD3; 640 } 641 642 void sa1100_register_uart_fns(struct sa1100_port_fns *fns) 643 { 644 if (fns->get_mctrl) 645 sa1100_pops.get_mctrl = fns->get_mctrl; 646 if (fns->set_mctrl) 647 sa1100_pops.set_mctrl = fns->set_mctrl; 648 649 sa1100_pops.pm = fns->pm; 650 /* 651 * FIXME: fns->set_wake is unused - this should be called from 652 * the suspend() callback if device_may_wakeup(dev)) is set. 653 */ 654 } 655 656 void __init sa1100_register_uart(int idx, int port) 657 { 658 if (idx >= NR_PORTS) { 659 printk(KERN_ERR "%s: bad index number %d\n", __func__, idx); 660 return; 661 } 662 663 switch (port) { 664 case 1: 665 sa1100_ports[idx].port.membase = (void __iomem *)&Ser1UTCR0; 666 sa1100_ports[idx].port.mapbase = _Ser1UTCR0; 667 sa1100_ports[idx].port.irq = IRQ_Ser1UART; 668 sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF; 669 break; 670 671 case 2: 672 sa1100_ports[idx].port.membase = (void __iomem *)&Ser2UTCR0; 673 sa1100_ports[idx].port.mapbase = _Ser2UTCR0; 674 sa1100_ports[idx].port.irq = IRQ_Ser2ICP; 675 sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF; 676 break; 677 678 case 3: 679 sa1100_ports[idx].port.membase = (void __iomem *)&Ser3UTCR0; 680 sa1100_ports[idx].port.mapbase = _Ser3UTCR0; 681 sa1100_ports[idx].port.irq = IRQ_Ser3UART; 682 sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF; 683 break; 684 685 default: 686 printk(KERN_ERR "%s: bad port number %d\n", __func__, port); 687 } 688 } 689 690 691 #ifdef CONFIG_SERIAL_SA1100_CONSOLE 692 static void sa1100_console_putchar(struct uart_port *port, int ch) 693 { 694 struct sa1100_port *sport = (struct sa1100_port *)port; 695 696 while (!(UART_GET_UTSR1(sport) & UTSR1_TNF)) 697 barrier(); 698 UART_PUT_CHAR(sport, ch); 699 } 700 701 /* 702 * Interrupts are disabled on entering 703 */ 704 static void 705 sa1100_console_write(struct console *co, const char *s, unsigned int count) 706 { 707 struct sa1100_port *sport = &sa1100_ports[co->index]; 708 unsigned int old_utcr3, status; 709 710 /* 711 * First, save UTCR3 and then disable interrupts 712 */ 713 old_utcr3 = UART_GET_UTCR3(sport); 714 UART_PUT_UTCR3(sport, (old_utcr3 & ~(UTCR3_RIE | UTCR3_TIE)) | 715 UTCR3_TXE); 716 717 uart_console_write(&sport->port, s, count, sa1100_console_putchar); 718 719 /* 720 * Finally, wait for transmitter to become empty 721 * and restore UTCR3 722 */ 723 do { 724 status = UART_GET_UTSR1(sport); 725 } while (status & UTSR1_TBY); 726 UART_PUT_UTCR3(sport, old_utcr3); 727 } 728 729 /* 730 * If the port was already initialised (eg, by a boot loader), 731 * try to determine the current setup. 732 */ 733 static void __init 734 sa1100_console_get_options(struct sa1100_port *sport, int *baud, 735 int *parity, int *bits) 736 { 737 unsigned int utcr3; 738 739 utcr3 = UART_GET_UTCR3(sport) & (UTCR3_RXE | UTCR3_TXE); 740 if (utcr3 == (UTCR3_RXE | UTCR3_TXE)) { 741 /* ok, the port was enabled */ 742 unsigned int utcr0, quot; 743 744 utcr0 = UART_GET_UTCR0(sport); 745 746 *parity = 'n'; 747 if (utcr0 & UTCR0_PE) { 748 if (utcr0 & UTCR0_OES) 749 *parity = 'e'; 750 else 751 *parity = 'o'; 752 } 753 754 if (utcr0 & UTCR0_DSS) 755 *bits = 8; 756 else 757 *bits = 7; 758 759 quot = UART_GET_UTCR2(sport) | UART_GET_UTCR1(sport) << 8; 760 quot &= 0xfff; 761 *baud = sport->port.uartclk / (16 * (quot + 1)); 762 } 763 } 764 765 static int __init 766 sa1100_console_setup(struct console *co, char *options) 767 { 768 struct sa1100_port *sport; 769 int baud = 9600; 770 int bits = 8; 771 int parity = 'n'; 772 int flow = 'n'; 773 774 /* 775 * Check whether an invalid uart number has been specified, and 776 * if so, search for the first available port that does have 777 * console support. 778 */ 779 if (co->index == -1 || co->index >= NR_PORTS) 780 co->index = 0; 781 sport = &sa1100_ports[co->index]; 782 783 if (options) 784 uart_parse_options(options, &baud, &parity, &bits, &flow); 785 else 786 sa1100_console_get_options(sport, &baud, &parity, &bits); 787 788 return uart_set_options(&sport->port, co, baud, parity, bits, flow); 789 } 790 791 static struct uart_driver sa1100_reg; 792 static struct console sa1100_console = { 793 .name = "ttySA", 794 .write = sa1100_console_write, 795 .device = uart_console_device, 796 .setup = sa1100_console_setup, 797 .flags = CON_PRINTBUFFER, 798 .index = -1, 799 .data = &sa1100_reg, 800 }; 801 802 static int __init sa1100_rs_console_init(void) 803 { 804 sa1100_init_ports(); 805 register_console(&sa1100_console); 806 return 0; 807 } 808 console_initcall(sa1100_rs_console_init); 809 810 #define SA1100_CONSOLE &sa1100_console 811 #else 812 #define SA1100_CONSOLE NULL 813 #endif 814 815 static struct uart_driver sa1100_reg = { 816 .owner = THIS_MODULE, 817 .driver_name = "ttySA", 818 .dev_name = "ttySA", 819 .major = SERIAL_SA1100_MAJOR, 820 .minor = MINOR_START, 821 .nr = NR_PORTS, 822 .cons = SA1100_CONSOLE, 823 }; 824 825 static int sa1100_serial_suspend(struct platform_device *dev, pm_message_t state) 826 { 827 struct sa1100_port *sport = platform_get_drvdata(dev); 828 829 if (sport) 830 uart_suspend_port(&sa1100_reg, &sport->port); 831 832 return 0; 833 } 834 835 static int sa1100_serial_resume(struct platform_device *dev) 836 { 837 struct sa1100_port *sport = platform_get_drvdata(dev); 838 839 if (sport) 840 uart_resume_port(&sa1100_reg, &sport->port); 841 842 return 0; 843 } 844 845 static int sa1100_serial_probe(struct platform_device *dev) 846 { 847 struct resource *res = dev->resource; 848 int i; 849 850 for (i = 0; i < dev->num_resources; i++, res++) 851 if (res->flags & IORESOURCE_MEM) 852 break; 853 854 if (i < dev->num_resources) { 855 for (i = 0; i < NR_PORTS; i++) { 856 if (sa1100_ports[i].port.mapbase != res->start) 857 continue; 858 859 sa1100_ports[i].port.dev = &dev->dev; 860 uart_add_one_port(&sa1100_reg, &sa1100_ports[i].port); 861 platform_set_drvdata(dev, &sa1100_ports[i]); 862 break; 863 } 864 } 865 866 return 0; 867 } 868 869 static int sa1100_serial_remove(struct platform_device *pdev) 870 { 871 struct sa1100_port *sport = platform_get_drvdata(pdev); 872 873 if (sport) 874 uart_remove_one_port(&sa1100_reg, &sport->port); 875 876 return 0; 877 } 878 879 static struct platform_driver sa11x0_serial_driver = { 880 .probe = sa1100_serial_probe, 881 .remove = sa1100_serial_remove, 882 .suspend = sa1100_serial_suspend, 883 .resume = sa1100_serial_resume, 884 .driver = { 885 .name = "sa11x0-uart", 886 .owner = THIS_MODULE, 887 }, 888 }; 889 890 static int __init sa1100_serial_init(void) 891 { 892 int ret; 893 894 printk(KERN_INFO "Serial: SA11x0 driver\n"); 895 896 sa1100_init_ports(); 897 898 ret = uart_register_driver(&sa1100_reg); 899 if (ret == 0) { 900 ret = platform_driver_register(&sa11x0_serial_driver); 901 if (ret) 902 uart_unregister_driver(&sa1100_reg); 903 } 904 return ret; 905 } 906 907 static void __exit sa1100_serial_exit(void) 908 { 909 platform_driver_unregister(&sa11x0_serial_driver); 910 uart_unregister_driver(&sa1100_reg); 911 } 912 913 module_init(sa1100_serial_init); 914 module_exit(sa1100_serial_exit); 915 916 MODULE_AUTHOR("Deep Blue Solutions Ltd"); 917 MODULE_DESCRIPTION("SA1100 generic serial port driver"); 918 MODULE_LICENSE("GPL"); 919 MODULE_ALIAS_CHARDEV_MAJOR(SERIAL_SA1100_MAJOR); 920 MODULE_ALIAS("platform:sa11x0-uart"); 921