1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Based on drivers/serial/8250.c by Russell King. 4 * 5 * Author: Nicolas Pitre 6 * Created: Feb 20, 2003 7 * Copyright: (C) 2003 Monta Vista Software, Inc. 8 * 9 * Note 1: This driver is made separate from the already too overloaded 10 * 8250.c because it needs some kirks of its own and that'll make it 11 * easier to add DMA support. 12 * 13 * Note 2: I'm too sick of device allocation policies for serial ports. 14 * If someone else wants to request an "official" allocation of major/minor 15 * for this driver please be my guest. And don't forget that new hardware 16 * to come from Intel might have more than 3 or 4 of those UARTs. Let's 17 * hope for a better port registration and dynamic device allocation scheme 18 * with the serial core maintainer satisfaction to appear soon. 19 */ 20 21 22 #include <linux/ioport.h> 23 #include <linux/init.h> 24 #include <linux/console.h> 25 #include <linux/sysrq.h> 26 #include <linux/serial_reg.h> 27 #include <linux/circ_buf.h> 28 #include <linux/delay.h> 29 #include <linux/interrupt.h> 30 #include <linux/of.h> 31 #include <linux/platform_device.h> 32 #include <linux/tty.h> 33 #include <linux/tty_flip.h> 34 #include <linux/serial_core.h> 35 #include <linux/clk.h> 36 #include <linux/io.h> 37 #include <linux/slab.h> 38 39 #define PXA_NAME_LEN 8 40 41 struct uart_pxa_port { 42 struct uart_port port; 43 unsigned char ier; 44 unsigned char lcr; 45 unsigned char mcr; 46 unsigned int lsr_break_flag; 47 struct clk *clk; 48 char name[PXA_NAME_LEN]; 49 }; 50 51 static inline unsigned int serial_in(struct uart_pxa_port *up, int offset) 52 { 53 offset <<= 2; 54 return readl(up->port.membase + offset); 55 } 56 57 static inline void serial_out(struct uart_pxa_port *up, int offset, int value) 58 { 59 offset <<= 2; 60 writel(value, up->port.membase + offset); 61 } 62 63 static void serial_pxa_enable_ms(struct uart_port *port) 64 { 65 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 66 67 up->ier |= UART_IER_MSI; 68 serial_out(up, UART_IER, up->ier); 69 } 70 71 static void serial_pxa_stop_tx(struct uart_port *port) 72 { 73 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 74 75 if (up->ier & UART_IER_THRI) { 76 up->ier &= ~UART_IER_THRI; 77 serial_out(up, UART_IER, up->ier); 78 } 79 } 80 81 static void serial_pxa_stop_rx(struct uart_port *port) 82 { 83 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 84 85 up->ier &= ~UART_IER_RLSI; 86 up->port.read_status_mask &= ~UART_LSR_DR; 87 serial_out(up, UART_IER, up->ier); 88 } 89 90 static inline void receive_chars(struct uart_pxa_port *up, int *status) 91 { 92 unsigned int ch, flag; 93 int max_count = 256; 94 95 do { 96 /* work around Errata #20 according to 97 * Intel(R) PXA27x Processor Family 98 * Specification Update (May 2005) 99 * 100 * Step 2 101 * Disable the Reciever Time Out Interrupt via IER[RTOEI] 102 */ 103 up->ier &= ~UART_IER_RTOIE; 104 serial_out(up, UART_IER, up->ier); 105 106 ch = serial_in(up, UART_RX); 107 flag = TTY_NORMAL; 108 up->port.icount.rx++; 109 110 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE | 111 UART_LSR_FE | UART_LSR_OE))) { 112 /* 113 * For statistics only 114 */ 115 if (*status & UART_LSR_BI) { 116 *status &= ~(UART_LSR_FE | UART_LSR_PE); 117 up->port.icount.brk++; 118 /* 119 * We do the SysRQ and SAK checking 120 * here because otherwise the break 121 * may get masked by ignore_status_mask 122 * or read_status_mask. 123 */ 124 if (uart_handle_break(&up->port)) 125 goto ignore_char; 126 } else if (*status & UART_LSR_PE) 127 up->port.icount.parity++; 128 else if (*status & UART_LSR_FE) 129 up->port.icount.frame++; 130 if (*status & UART_LSR_OE) 131 up->port.icount.overrun++; 132 133 /* 134 * Mask off conditions which should be ignored. 135 */ 136 *status &= up->port.read_status_mask; 137 138 #ifdef CONFIG_SERIAL_PXA_CONSOLE 139 if (up->port.line == up->port.cons->index) { 140 /* Recover the break flag from console xmit */ 141 *status |= up->lsr_break_flag; 142 up->lsr_break_flag = 0; 143 } 144 #endif 145 if (*status & UART_LSR_BI) { 146 flag = TTY_BREAK; 147 } else if (*status & UART_LSR_PE) 148 flag = TTY_PARITY; 149 else if (*status & UART_LSR_FE) 150 flag = TTY_FRAME; 151 } 152 153 if (uart_handle_sysrq_char(&up->port, ch)) 154 goto ignore_char; 155 156 uart_insert_char(&up->port, *status, UART_LSR_OE, ch, flag); 157 158 ignore_char: 159 *status = serial_in(up, UART_LSR); 160 } while ((*status & UART_LSR_DR) && (max_count-- > 0)); 161 tty_flip_buffer_push(&up->port.state->port); 162 163 /* work around Errata #20 according to 164 * Intel(R) PXA27x Processor Family 165 * Specification Update (May 2005) 166 * 167 * Step 6: 168 * No more data in FIFO: Re-enable RTO interrupt via IER[RTOIE] 169 */ 170 up->ier |= UART_IER_RTOIE; 171 serial_out(up, UART_IER, up->ier); 172 } 173 174 static void transmit_chars(struct uart_pxa_port *up) 175 { 176 struct circ_buf *xmit = &up->port.state->xmit; 177 int count; 178 179 if (up->port.x_char) { 180 serial_out(up, UART_TX, up->port.x_char); 181 up->port.icount.tx++; 182 up->port.x_char = 0; 183 return; 184 } 185 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { 186 serial_pxa_stop_tx(&up->port); 187 return; 188 } 189 190 count = up->port.fifosize / 2; 191 do { 192 serial_out(up, UART_TX, xmit->buf[xmit->tail]); 193 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 194 up->port.icount.tx++; 195 if (uart_circ_empty(xmit)) 196 break; 197 } while (--count > 0); 198 199 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 200 uart_write_wakeup(&up->port); 201 202 203 if (uart_circ_empty(xmit)) 204 serial_pxa_stop_tx(&up->port); 205 } 206 207 static void serial_pxa_start_tx(struct uart_port *port) 208 { 209 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 210 211 if (!(up->ier & UART_IER_THRI)) { 212 up->ier |= UART_IER_THRI; 213 serial_out(up, UART_IER, up->ier); 214 } 215 } 216 217 /* should hold up->port.lock */ 218 static inline void check_modem_status(struct uart_pxa_port *up) 219 { 220 int status; 221 222 status = serial_in(up, UART_MSR); 223 224 if ((status & UART_MSR_ANY_DELTA) == 0) 225 return; 226 227 if (status & UART_MSR_TERI) 228 up->port.icount.rng++; 229 if (status & UART_MSR_DDSR) 230 up->port.icount.dsr++; 231 if (status & UART_MSR_DDCD) 232 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD); 233 if (status & UART_MSR_DCTS) 234 uart_handle_cts_change(&up->port, status & UART_MSR_CTS); 235 236 wake_up_interruptible(&up->port.state->port.delta_msr_wait); 237 } 238 239 /* 240 * This handles the interrupt from one port. 241 */ 242 static inline irqreturn_t serial_pxa_irq(int irq, void *dev_id) 243 { 244 struct uart_pxa_port *up = dev_id; 245 unsigned int iir, lsr; 246 247 iir = serial_in(up, UART_IIR); 248 if (iir & UART_IIR_NO_INT) 249 return IRQ_NONE; 250 spin_lock(&up->port.lock); 251 lsr = serial_in(up, UART_LSR); 252 if (lsr & UART_LSR_DR) 253 receive_chars(up, &lsr); 254 check_modem_status(up); 255 if (lsr & UART_LSR_THRE) 256 transmit_chars(up); 257 spin_unlock(&up->port.lock); 258 return IRQ_HANDLED; 259 } 260 261 static unsigned int serial_pxa_tx_empty(struct uart_port *port) 262 { 263 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 264 unsigned long flags; 265 unsigned int ret; 266 267 spin_lock_irqsave(&up->port.lock, flags); 268 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0; 269 spin_unlock_irqrestore(&up->port.lock, flags); 270 271 return ret; 272 } 273 274 static unsigned int serial_pxa_get_mctrl(struct uart_port *port) 275 { 276 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 277 unsigned char status; 278 unsigned int ret; 279 280 status = serial_in(up, UART_MSR); 281 282 ret = 0; 283 if (status & UART_MSR_DCD) 284 ret |= TIOCM_CAR; 285 if (status & UART_MSR_RI) 286 ret |= TIOCM_RNG; 287 if (status & UART_MSR_DSR) 288 ret |= TIOCM_DSR; 289 if (status & UART_MSR_CTS) 290 ret |= TIOCM_CTS; 291 return ret; 292 } 293 294 static void serial_pxa_set_mctrl(struct uart_port *port, unsigned int mctrl) 295 { 296 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 297 unsigned char mcr = 0; 298 299 if (mctrl & TIOCM_RTS) 300 mcr |= UART_MCR_RTS; 301 if (mctrl & TIOCM_DTR) 302 mcr |= UART_MCR_DTR; 303 if (mctrl & TIOCM_OUT1) 304 mcr |= UART_MCR_OUT1; 305 if (mctrl & TIOCM_OUT2) 306 mcr |= UART_MCR_OUT2; 307 if (mctrl & TIOCM_LOOP) 308 mcr |= UART_MCR_LOOP; 309 310 mcr |= up->mcr; 311 312 serial_out(up, UART_MCR, mcr); 313 } 314 315 static void serial_pxa_break_ctl(struct uart_port *port, int break_state) 316 { 317 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 318 unsigned long flags; 319 320 spin_lock_irqsave(&up->port.lock, flags); 321 if (break_state == -1) 322 up->lcr |= UART_LCR_SBC; 323 else 324 up->lcr &= ~UART_LCR_SBC; 325 serial_out(up, UART_LCR, up->lcr); 326 spin_unlock_irqrestore(&up->port.lock, flags); 327 } 328 329 static int serial_pxa_startup(struct uart_port *port) 330 { 331 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 332 unsigned long flags; 333 int retval; 334 335 if (port->line == 3) /* HWUART */ 336 up->mcr |= UART_MCR_AFE; 337 else 338 up->mcr = 0; 339 340 up->port.uartclk = clk_get_rate(up->clk); 341 342 /* 343 * Allocate the IRQ 344 */ 345 retval = request_irq(up->port.irq, serial_pxa_irq, 0, up->name, up); 346 if (retval) 347 return retval; 348 349 /* 350 * Clear the FIFO buffers and disable them. 351 * (they will be reenabled in set_termios()) 352 */ 353 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO); 354 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | 355 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); 356 serial_out(up, UART_FCR, 0); 357 358 /* 359 * Clear the interrupt registers. 360 */ 361 (void) serial_in(up, UART_LSR); 362 (void) serial_in(up, UART_RX); 363 (void) serial_in(up, UART_IIR); 364 (void) serial_in(up, UART_MSR); 365 366 /* 367 * Now, initialize the UART 368 */ 369 serial_out(up, UART_LCR, UART_LCR_WLEN8); 370 371 spin_lock_irqsave(&up->port.lock, flags); 372 up->port.mctrl |= TIOCM_OUT2; 373 serial_pxa_set_mctrl(&up->port, up->port.mctrl); 374 spin_unlock_irqrestore(&up->port.lock, flags); 375 376 /* 377 * Finally, enable interrupts. Note: Modem status interrupts 378 * are set via set_termios(), which will be occurring imminently 379 * anyway, so we don't enable them here. 380 */ 381 up->ier = UART_IER_RLSI | UART_IER_RDI | UART_IER_RTOIE | UART_IER_UUE; 382 serial_out(up, UART_IER, up->ier); 383 384 /* 385 * And clear the interrupt registers again for luck. 386 */ 387 (void) serial_in(up, UART_LSR); 388 (void) serial_in(up, UART_RX); 389 (void) serial_in(up, UART_IIR); 390 (void) serial_in(up, UART_MSR); 391 392 return 0; 393 } 394 395 static void serial_pxa_shutdown(struct uart_port *port) 396 { 397 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 398 unsigned long flags; 399 400 free_irq(up->port.irq, up); 401 402 /* 403 * Disable interrupts from this port 404 */ 405 up->ier = 0; 406 serial_out(up, UART_IER, 0); 407 408 spin_lock_irqsave(&up->port.lock, flags); 409 up->port.mctrl &= ~TIOCM_OUT2; 410 serial_pxa_set_mctrl(&up->port, up->port.mctrl); 411 spin_unlock_irqrestore(&up->port.lock, flags); 412 413 /* 414 * Disable break condition and FIFOs 415 */ 416 serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC); 417 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | 418 UART_FCR_CLEAR_RCVR | 419 UART_FCR_CLEAR_XMIT); 420 serial_out(up, UART_FCR, 0); 421 } 422 423 static void 424 serial_pxa_set_termios(struct uart_port *port, struct ktermios *termios, 425 struct ktermios *old) 426 { 427 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 428 unsigned char cval, fcr = 0; 429 unsigned long flags; 430 unsigned int baud, quot; 431 unsigned int dll; 432 433 cval = UART_LCR_WLEN(tty_get_char_size(termios->c_cflag)); 434 435 if (termios->c_cflag & CSTOPB) 436 cval |= UART_LCR_STOP; 437 if (termios->c_cflag & PARENB) 438 cval |= UART_LCR_PARITY; 439 if (!(termios->c_cflag & PARODD)) 440 cval |= UART_LCR_EPAR; 441 442 /* 443 * Ask the core to calculate the divisor for us. 444 */ 445 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); 446 quot = uart_get_divisor(port, baud); 447 448 if ((up->port.uartclk / quot) < (2400 * 16)) 449 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR1; 450 else if ((up->port.uartclk / quot) < (230400 * 16)) 451 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR8; 452 else 453 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR32; 454 455 /* 456 * Ok, we're now changing the port state. Do it with 457 * interrupts disabled. 458 */ 459 spin_lock_irqsave(&up->port.lock, flags); 460 461 /* 462 * Ensure the port will be enabled. 463 * This is required especially for serial console. 464 */ 465 up->ier |= UART_IER_UUE; 466 467 /* 468 * Update the per-port timeout. 469 */ 470 uart_update_timeout(port, termios->c_cflag, baud); 471 472 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; 473 if (termios->c_iflag & INPCK) 474 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE; 475 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK)) 476 up->port.read_status_mask |= UART_LSR_BI; 477 478 /* 479 * Characters to ignore 480 */ 481 up->port.ignore_status_mask = 0; 482 if (termios->c_iflag & IGNPAR) 483 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE; 484 if (termios->c_iflag & IGNBRK) { 485 up->port.ignore_status_mask |= UART_LSR_BI; 486 /* 487 * If we're ignoring parity and break indicators, 488 * ignore overruns too (for real raw support). 489 */ 490 if (termios->c_iflag & IGNPAR) 491 up->port.ignore_status_mask |= UART_LSR_OE; 492 } 493 494 /* 495 * ignore all characters if CREAD is not set 496 */ 497 if ((termios->c_cflag & CREAD) == 0) 498 up->port.ignore_status_mask |= UART_LSR_DR; 499 500 /* 501 * CTS flow control flag and modem status interrupts 502 */ 503 up->ier &= ~UART_IER_MSI; 504 if (UART_ENABLE_MS(&up->port, termios->c_cflag)) 505 up->ier |= UART_IER_MSI; 506 507 serial_out(up, UART_IER, up->ier); 508 509 if (termios->c_cflag & CRTSCTS) 510 up->mcr |= UART_MCR_AFE; 511 else 512 up->mcr &= ~UART_MCR_AFE; 513 514 serial_out(up, UART_LCR, cval | UART_LCR_DLAB); /* set DLAB */ 515 serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */ 516 517 /* 518 * work around Errata #75 according to Intel(R) PXA27x Processor Family 519 * Specification Update (Nov 2005) 520 */ 521 dll = serial_in(up, UART_DLL); 522 WARN_ON(dll != (quot & 0xff)); 523 524 serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */ 525 serial_out(up, UART_LCR, cval); /* reset DLAB */ 526 up->lcr = cval; /* Save LCR */ 527 serial_pxa_set_mctrl(&up->port, up->port.mctrl); 528 serial_out(up, UART_FCR, fcr); 529 spin_unlock_irqrestore(&up->port.lock, flags); 530 } 531 532 static void 533 serial_pxa_pm(struct uart_port *port, unsigned int state, 534 unsigned int oldstate) 535 { 536 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 537 538 if (!state) 539 clk_prepare_enable(up->clk); 540 else 541 clk_disable_unprepare(up->clk); 542 } 543 544 static void serial_pxa_release_port(struct uart_port *port) 545 { 546 } 547 548 static int serial_pxa_request_port(struct uart_port *port) 549 { 550 return 0; 551 } 552 553 static void serial_pxa_config_port(struct uart_port *port, int flags) 554 { 555 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 556 up->port.type = PORT_PXA; 557 } 558 559 static int 560 serial_pxa_verify_port(struct uart_port *port, struct serial_struct *ser) 561 { 562 /* we don't want the core code to modify any port params */ 563 return -EINVAL; 564 } 565 566 static const char * 567 serial_pxa_type(struct uart_port *port) 568 { 569 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 570 return up->name; 571 } 572 573 static struct uart_pxa_port *serial_pxa_ports[4]; 574 static struct uart_driver serial_pxa_reg; 575 576 #ifdef CONFIG_SERIAL_PXA_CONSOLE 577 578 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE) 579 580 /* 581 * Wait for transmitter & holding register to empty 582 */ 583 static void wait_for_xmitr(struct uart_pxa_port *up) 584 { 585 unsigned int status, tmout = 10000; 586 587 /* Wait up to 10ms for the character(s) to be sent. */ 588 do { 589 status = serial_in(up, UART_LSR); 590 591 if (status & UART_LSR_BI) 592 up->lsr_break_flag = UART_LSR_BI; 593 594 if (--tmout == 0) 595 break; 596 udelay(1); 597 } while ((status & BOTH_EMPTY) != BOTH_EMPTY); 598 599 /* Wait up to 1s for flow control if necessary */ 600 if (up->port.flags & UPF_CONS_FLOW) { 601 tmout = 1000000; 602 while (--tmout && 603 ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0)) 604 udelay(1); 605 } 606 } 607 608 static void serial_pxa_console_putchar(struct uart_port *port, unsigned char ch) 609 { 610 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 611 612 wait_for_xmitr(up); 613 serial_out(up, UART_TX, ch); 614 } 615 616 /* 617 * Print a string to the serial port trying not to disturb 618 * any possible real use of the port... 619 * 620 * The console_lock must be held when we get here. 621 */ 622 static void 623 serial_pxa_console_write(struct console *co, const char *s, unsigned int count) 624 { 625 struct uart_pxa_port *up = serial_pxa_ports[co->index]; 626 unsigned int ier; 627 unsigned long flags; 628 int locked = 1; 629 630 clk_enable(up->clk); 631 local_irq_save(flags); 632 if (up->port.sysrq) 633 locked = 0; 634 else if (oops_in_progress) 635 locked = spin_trylock(&up->port.lock); 636 else 637 spin_lock(&up->port.lock); 638 639 /* 640 * First save the IER then disable the interrupts 641 */ 642 ier = serial_in(up, UART_IER); 643 serial_out(up, UART_IER, UART_IER_UUE); 644 645 uart_console_write(&up->port, s, count, serial_pxa_console_putchar); 646 647 /* 648 * Finally, wait for transmitter to become empty 649 * and restore the IER 650 */ 651 wait_for_xmitr(up); 652 serial_out(up, UART_IER, ier); 653 654 if (locked) 655 spin_unlock(&up->port.lock); 656 local_irq_restore(flags); 657 clk_disable(up->clk); 658 659 } 660 661 #ifdef CONFIG_CONSOLE_POLL 662 /* 663 * Console polling routines for writing and reading from the uart while 664 * in an interrupt or debug context. 665 */ 666 667 static int serial_pxa_get_poll_char(struct uart_port *port) 668 { 669 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 670 unsigned char lsr = serial_in(up, UART_LSR); 671 672 while (!(lsr & UART_LSR_DR)) 673 lsr = serial_in(up, UART_LSR); 674 675 return serial_in(up, UART_RX); 676 } 677 678 679 static void serial_pxa_put_poll_char(struct uart_port *port, 680 unsigned char c) 681 { 682 unsigned int ier; 683 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 684 685 /* 686 * First save the IER then disable the interrupts 687 */ 688 ier = serial_in(up, UART_IER); 689 serial_out(up, UART_IER, UART_IER_UUE); 690 691 wait_for_xmitr(up); 692 /* 693 * Send the character out. 694 */ 695 serial_out(up, UART_TX, c); 696 697 /* 698 * Finally, wait for transmitter to become empty 699 * and restore the IER 700 */ 701 wait_for_xmitr(up); 702 serial_out(up, UART_IER, ier); 703 } 704 705 #endif /* CONFIG_CONSOLE_POLL */ 706 707 static int __init 708 serial_pxa_console_setup(struct console *co, char *options) 709 { 710 struct uart_pxa_port *up; 711 int baud = 9600; 712 int bits = 8; 713 int parity = 'n'; 714 int flow = 'n'; 715 716 if (co->index == -1 || co->index >= serial_pxa_reg.nr) 717 co->index = 0; 718 up = serial_pxa_ports[co->index]; 719 if (!up) 720 return -ENODEV; 721 722 if (options) 723 uart_parse_options(options, &baud, &parity, &bits, &flow); 724 725 return uart_set_options(&up->port, co, baud, parity, bits, flow); 726 } 727 728 static struct console serial_pxa_console = { 729 .name = "ttyS", 730 .write = serial_pxa_console_write, 731 .device = uart_console_device, 732 .setup = serial_pxa_console_setup, 733 .flags = CON_PRINTBUFFER, 734 .index = -1, 735 .data = &serial_pxa_reg, 736 }; 737 738 #define PXA_CONSOLE &serial_pxa_console 739 #else 740 #define PXA_CONSOLE NULL 741 #endif 742 743 static const struct uart_ops serial_pxa_pops = { 744 .tx_empty = serial_pxa_tx_empty, 745 .set_mctrl = serial_pxa_set_mctrl, 746 .get_mctrl = serial_pxa_get_mctrl, 747 .stop_tx = serial_pxa_stop_tx, 748 .start_tx = serial_pxa_start_tx, 749 .stop_rx = serial_pxa_stop_rx, 750 .enable_ms = serial_pxa_enable_ms, 751 .break_ctl = serial_pxa_break_ctl, 752 .startup = serial_pxa_startup, 753 .shutdown = serial_pxa_shutdown, 754 .set_termios = serial_pxa_set_termios, 755 .pm = serial_pxa_pm, 756 .type = serial_pxa_type, 757 .release_port = serial_pxa_release_port, 758 .request_port = serial_pxa_request_port, 759 .config_port = serial_pxa_config_port, 760 .verify_port = serial_pxa_verify_port, 761 #if defined(CONFIG_CONSOLE_POLL) && defined(CONFIG_SERIAL_PXA_CONSOLE) 762 .poll_get_char = serial_pxa_get_poll_char, 763 .poll_put_char = serial_pxa_put_poll_char, 764 #endif 765 }; 766 767 static struct uart_driver serial_pxa_reg = { 768 .owner = THIS_MODULE, 769 .driver_name = "PXA serial", 770 .dev_name = "ttyS", 771 .major = TTY_MAJOR, 772 .minor = 64, 773 .nr = 4, 774 .cons = PXA_CONSOLE, 775 }; 776 777 #ifdef CONFIG_PM 778 static int serial_pxa_suspend(struct device *dev) 779 { 780 struct uart_pxa_port *sport = dev_get_drvdata(dev); 781 782 if (sport) 783 uart_suspend_port(&serial_pxa_reg, &sport->port); 784 785 return 0; 786 } 787 788 static int serial_pxa_resume(struct device *dev) 789 { 790 struct uart_pxa_port *sport = dev_get_drvdata(dev); 791 792 if (sport) 793 uart_resume_port(&serial_pxa_reg, &sport->port); 794 795 return 0; 796 } 797 798 static const struct dev_pm_ops serial_pxa_pm_ops = { 799 .suspend = serial_pxa_suspend, 800 .resume = serial_pxa_resume, 801 }; 802 #endif 803 804 static const struct of_device_id serial_pxa_dt_ids[] = { 805 { .compatible = "mrvl,pxa-uart", }, 806 { .compatible = "mrvl,mmp-uart", }, 807 {} 808 }; 809 810 static int serial_pxa_probe_dt(struct platform_device *pdev, 811 struct uart_pxa_port *sport) 812 { 813 struct device_node *np = pdev->dev.of_node; 814 int ret; 815 816 if (!np) 817 return 1; 818 819 ret = of_alias_get_id(np, "serial"); 820 if (ret < 0) { 821 dev_err(&pdev->dev, "failed to get alias id, errno %d\n", ret); 822 return ret; 823 } 824 sport->port.line = ret; 825 return 0; 826 } 827 828 static int serial_pxa_probe(struct platform_device *dev) 829 { 830 struct uart_pxa_port *sport; 831 struct resource *mmres; 832 int ret; 833 int irq; 834 835 mmres = platform_get_resource(dev, IORESOURCE_MEM, 0); 836 if (!mmres) 837 return -ENODEV; 838 839 irq = platform_get_irq(dev, 0); 840 if (irq < 0) 841 return irq; 842 843 sport = kzalloc(sizeof(struct uart_pxa_port), GFP_KERNEL); 844 if (!sport) 845 return -ENOMEM; 846 847 sport->clk = clk_get(&dev->dev, NULL); 848 if (IS_ERR(sport->clk)) { 849 ret = PTR_ERR(sport->clk); 850 goto err_free; 851 } 852 853 ret = clk_prepare(sport->clk); 854 if (ret) { 855 clk_put(sport->clk); 856 goto err_free; 857 } 858 859 sport->port.type = PORT_PXA; 860 sport->port.iotype = UPIO_MEM; 861 sport->port.mapbase = mmres->start; 862 sport->port.irq = irq; 863 sport->port.fifosize = 64; 864 sport->port.ops = &serial_pxa_pops; 865 sport->port.dev = &dev->dev; 866 sport->port.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF; 867 sport->port.uartclk = clk_get_rate(sport->clk); 868 sport->port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_PXA_CONSOLE); 869 870 ret = serial_pxa_probe_dt(dev, sport); 871 if (ret > 0) 872 sport->port.line = dev->id; 873 else if (ret < 0) 874 goto err_clk; 875 if (sport->port.line >= ARRAY_SIZE(serial_pxa_ports)) { 876 dev_err(&dev->dev, "serial%d out of range\n", sport->port.line); 877 ret = -EINVAL; 878 goto err_clk; 879 } 880 snprintf(sport->name, PXA_NAME_LEN - 1, "UART%d", sport->port.line + 1); 881 882 sport->port.membase = ioremap(mmres->start, resource_size(mmres)); 883 if (!sport->port.membase) { 884 ret = -ENOMEM; 885 goto err_clk; 886 } 887 888 serial_pxa_ports[sport->port.line] = sport; 889 890 uart_add_one_port(&serial_pxa_reg, &sport->port); 891 platform_set_drvdata(dev, sport); 892 893 return 0; 894 895 err_clk: 896 clk_unprepare(sport->clk); 897 clk_put(sport->clk); 898 err_free: 899 kfree(sport); 900 return ret; 901 } 902 903 static struct platform_driver serial_pxa_driver = { 904 .probe = serial_pxa_probe, 905 906 .driver = { 907 .name = "pxa2xx-uart", 908 #ifdef CONFIG_PM 909 .pm = &serial_pxa_pm_ops, 910 #endif 911 .suppress_bind_attrs = true, 912 .of_match_table = serial_pxa_dt_ids, 913 }, 914 }; 915 916 917 /* 8250 driver for PXA serial ports should be used */ 918 static int __init serial_pxa_init(void) 919 { 920 int ret; 921 922 ret = uart_register_driver(&serial_pxa_reg); 923 if (ret != 0) 924 return ret; 925 926 ret = platform_driver_register(&serial_pxa_driver); 927 if (ret != 0) 928 uart_unregister_driver(&serial_pxa_reg); 929 930 return ret; 931 } 932 device_initcall(serial_pxa_init); 933