1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Based on drivers/serial/8250.c by Russell King. 4 * 5 * Author: Nicolas Pitre 6 * Created: Feb 20, 2003 7 * Copyright: (C) 2003 Monta Vista Software, Inc. 8 * 9 * Note 1: This driver is made separate from the already too overloaded 10 * 8250.c because it needs some kirks of its own and that'll make it 11 * easier to add DMA support. 12 * 13 * Note 2: I'm too sick of device allocation policies for serial ports. 14 * If someone else wants to request an "official" allocation of major/minor 15 * for this driver please be my guest. And don't forget that new hardware 16 * to come from Intel might have more than 3 or 4 of those UARTs. Let's 17 * hope for a better port registration and dynamic device allocation scheme 18 * with the serial core maintainer satisfaction to appear soon. 19 */ 20 21 22 #include <linux/ioport.h> 23 #include <linux/init.h> 24 #include <linux/console.h> 25 #include <linux/sysrq.h> 26 #include <linux/serial.h> 27 #include <linux/serial_reg.h> 28 #include <linux/circ_buf.h> 29 #include <linux/delay.h> 30 #include <linux/interrupt.h> 31 #include <linux/of.h> 32 #include <linux/platform_device.h> 33 #include <linux/tty.h> 34 #include <linux/tty_flip.h> 35 #include <linux/serial_core.h> 36 #include <linux/clk.h> 37 #include <linux/io.h> 38 #include <linux/slab.h> 39 40 #define PXA_NAME_LEN 8 41 42 struct uart_pxa_port { 43 struct uart_port port; 44 unsigned char ier; 45 unsigned char lcr; 46 unsigned char mcr; 47 unsigned int lsr_break_flag; 48 struct clk *clk; 49 char name[PXA_NAME_LEN]; 50 }; 51 52 static inline unsigned int serial_in(struct uart_pxa_port *up, int offset) 53 { 54 offset <<= 2; 55 return readl(up->port.membase + offset); 56 } 57 58 static inline void serial_out(struct uart_pxa_port *up, int offset, int value) 59 { 60 offset <<= 2; 61 writel(value, up->port.membase + offset); 62 } 63 64 static void serial_pxa_enable_ms(struct uart_port *port) 65 { 66 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 67 68 up->ier |= UART_IER_MSI; 69 serial_out(up, UART_IER, up->ier); 70 } 71 72 static void serial_pxa_stop_tx(struct uart_port *port) 73 { 74 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 75 76 if (up->ier & UART_IER_THRI) { 77 up->ier &= ~UART_IER_THRI; 78 serial_out(up, UART_IER, up->ier); 79 } 80 } 81 82 static void serial_pxa_stop_rx(struct uart_port *port) 83 { 84 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 85 86 up->ier &= ~UART_IER_RLSI; 87 up->port.read_status_mask &= ~UART_LSR_DR; 88 serial_out(up, UART_IER, up->ier); 89 } 90 91 static inline void receive_chars(struct uart_pxa_port *up, int *status) 92 { 93 unsigned int ch, flag; 94 int max_count = 256; 95 96 do { 97 /* work around Errata #20 according to 98 * Intel(R) PXA27x Processor Family 99 * Specification Update (May 2005) 100 * 101 * Step 2 102 * Disable the Reciever Time Out Interrupt via IER[RTOEI] 103 */ 104 up->ier &= ~UART_IER_RTOIE; 105 serial_out(up, UART_IER, up->ier); 106 107 ch = serial_in(up, UART_RX); 108 flag = TTY_NORMAL; 109 up->port.icount.rx++; 110 111 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE | 112 UART_LSR_FE | UART_LSR_OE))) { 113 /* 114 * For statistics only 115 */ 116 if (*status & UART_LSR_BI) { 117 *status &= ~(UART_LSR_FE | UART_LSR_PE); 118 up->port.icount.brk++; 119 /* 120 * We do the SysRQ and SAK checking 121 * here because otherwise the break 122 * may get masked by ignore_status_mask 123 * or read_status_mask. 124 */ 125 if (uart_handle_break(&up->port)) 126 goto ignore_char; 127 } else if (*status & UART_LSR_PE) 128 up->port.icount.parity++; 129 else if (*status & UART_LSR_FE) 130 up->port.icount.frame++; 131 if (*status & UART_LSR_OE) 132 up->port.icount.overrun++; 133 134 /* 135 * Mask off conditions which should be ignored. 136 */ 137 *status &= up->port.read_status_mask; 138 139 #ifdef CONFIG_SERIAL_PXA_CONSOLE 140 if (up->port.line == up->port.cons->index) { 141 /* Recover the break flag from console xmit */ 142 *status |= up->lsr_break_flag; 143 up->lsr_break_flag = 0; 144 } 145 #endif 146 if (*status & UART_LSR_BI) { 147 flag = TTY_BREAK; 148 } else if (*status & UART_LSR_PE) 149 flag = TTY_PARITY; 150 else if (*status & UART_LSR_FE) 151 flag = TTY_FRAME; 152 } 153 154 if (uart_handle_sysrq_char(&up->port, ch)) 155 goto ignore_char; 156 157 uart_insert_char(&up->port, *status, UART_LSR_OE, ch, flag); 158 159 ignore_char: 160 *status = serial_in(up, UART_LSR); 161 } while ((*status & UART_LSR_DR) && (max_count-- > 0)); 162 tty_flip_buffer_push(&up->port.state->port); 163 164 /* work around Errata #20 according to 165 * Intel(R) PXA27x Processor Family 166 * Specification Update (May 2005) 167 * 168 * Step 6: 169 * No more data in FIFO: Re-enable RTO interrupt via IER[RTOIE] 170 */ 171 up->ier |= UART_IER_RTOIE; 172 serial_out(up, UART_IER, up->ier); 173 } 174 175 static void transmit_chars(struct uart_pxa_port *up) 176 { 177 struct circ_buf *xmit = &up->port.state->xmit; 178 int count; 179 180 if (up->port.x_char) { 181 serial_out(up, UART_TX, up->port.x_char); 182 up->port.icount.tx++; 183 up->port.x_char = 0; 184 return; 185 } 186 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { 187 serial_pxa_stop_tx(&up->port); 188 return; 189 } 190 191 count = up->port.fifosize / 2; 192 do { 193 serial_out(up, UART_TX, xmit->buf[xmit->tail]); 194 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 195 up->port.icount.tx++; 196 if (uart_circ_empty(xmit)) 197 break; 198 } while (--count > 0); 199 200 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 201 uart_write_wakeup(&up->port); 202 203 204 if (uart_circ_empty(xmit)) 205 serial_pxa_stop_tx(&up->port); 206 } 207 208 static void serial_pxa_start_tx(struct uart_port *port) 209 { 210 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 211 212 if (!(up->ier & UART_IER_THRI)) { 213 up->ier |= UART_IER_THRI; 214 serial_out(up, UART_IER, up->ier); 215 } 216 } 217 218 /* should hold up->port.lock */ 219 static inline void check_modem_status(struct uart_pxa_port *up) 220 { 221 int status; 222 223 status = serial_in(up, UART_MSR); 224 225 if ((status & UART_MSR_ANY_DELTA) == 0) 226 return; 227 228 if (status & UART_MSR_TERI) 229 up->port.icount.rng++; 230 if (status & UART_MSR_DDSR) 231 up->port.icount.dsr++; 232 if (status & UART_MSR_DDCD) 233 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD); 234 if (status & UART_MSR_DCTS) 235 uart_handle_cts_change(&up->port, status & UART_MSR_CTS); 236 237 wake_up_interruptible(&up->port.state->port.delta_msr_wait); 238 } 239 240 /* 241 * This handles the interrupt from one port. 242 */ 243 static inline irqreturn_t serial_pxa_irq(int irq, void *dev_id) 244 { 245 struct uart_pxa_port *up = dev_id; 246 unsigned int iir, lsr; 247 248 iir = serial_in(up, UART_IIR); 249 if (iir & UART_IIR_NO_INT) 250 return IRQ_NONE; 251 spin_lock(&up->port.lock); 252 lsr = serial_in(up, UART_LSR); 253 if (lsr & UART_LSR_DR) 254 receive_chars(up, &lsr); 255 check_modem_status(up); 256 if (lsr & UART_LSR_THRE) 257 transmit_chars(up); 258 spin_unlock(&up->port.lock); 259 return IRQ_HANDLED; 260 } 261 262 static unsigned int serial_pxa_tx_empty(struct uart_port *port) 263 { 264 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 265 unsigned long flags; 266 unsigned int ret; 267 268 spin_lock_irqsave(&up->port.lock, flags); 269 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0; 270 spin_unlock_irqrestore(&up->port.lock, flags); 271 272 return ret; 273 } 274 275 static unsigned int serial_pxa_get_mctrl(struct uart_port *port) 276 { 277 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 278 unsigned char status; 279 unsigned int ret; 280 281 status = serial_in(up, UART_MSR); 282 283 ret = 0; 284 if (status & UART_MSR_DCD) 285 ret |= TIOCM_CAR; 286 if (status & UART_MSR_RI) 287 ret |= TIOCM_RNG; 288 if (status & UART_MSR_DSR) 289 ret |= TIOCM_DSR; 290 if (status & UART_MSR_CTS) 291 ret |= TIOCM_CTS; 292 return ret; 293 } 294 295 static void serial_pxa_set_mctrl(struct uart_port *port, unsigned int mctrl) 296 { 297 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 298 unsigned char mcr = 0; 299 300 if (mctrl & TIOCM_RTS) 301 mcr |= UART_MCR_RTS; 302 if (mctrl & TIOCM_DTR) 303 mcr |= UART_MCR_DTR; 304 if (mctrl & TIOCM_OUT1) 305 mcr |= UART_MCR_OUT1; 306 if (mctrl & TIOCM_OUT2) 307 mcr |= UART_MCR_OUT2; 308 if (mctrl & TIOCM_LOOP) 309 mcr |= UART_MCR_LOOP; 310 311 mcr |= up->mcr; 312 313 serial_out(up, UART_MCR, mcr); 314 } 315 316 static void serial_pxa_break_ctl(struct uart_port *port, int break_state) 317 { 318 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 319 unsigned long flags; 320 321 spin_lock_irqsave(&up->port.lock, flags); 322 if (break_state == -1) 323 up->lcr |= UART_LCR_SBC; 324 else 325 up->lcr &= ~UART_LCR_SBC; 326 serial_out(up, UART_LCR, up->lcr); 327 spin_unlock_irqrestore(&up->port.lock, flags); 328 } 329 330 static int serial_pxa_startup(struct uart_port *port) 331 { 332 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 333 unsigned long flags; 334 int retval; 335 336 if (port->line == 3) /* HWUART */ 337 up->mcr |= UART_MCR_AFE; 338 else 339 up->mcr = 0; 340 341 up->port.uartclk = clk_get_rate(up->clk); 342 343 /* 344 * Allocate the IRQ 345 */ 346 retval = request_irq(up->port.irq, serial_pxa_irq, 0, up->name, up); 347 if (retval) 348 return retval; 349 350 /* 351 * Clear the FIFO buffers and disable them. 352 * (they will be reenabled in set_termios()) 353 */ 354 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO); 355 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | 356 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); 357 serial_out(up, UART_FCR, 0); 358 359 /* 360 * Clear the interrupt registers. 361 */ 362 (void) serial_in(up, UART_LSR); 363 (void) serial_in(up, UART_RX); 364 (void) serial_in(up, UART_IIR); 365 (void) serial_in(up, UART_MSR); 366 367 /* 368 * Now, initialize the UART 369 */ 370 serial_out(up, UART_LCR, UART_LCR_WLEN8); 371 372 spin_lock_irqsave(&up->port.lock, flags); 373 up->port.mctrl |= TIOCM_OUT2; 374 serial_pxa_set_mctrl(&up->port, up->port.mctrl); 375 spin_unlock_irqrestore(&up->port.lock, flags); 376 377 /* 378 * Finally, enable interrupts. Note: Modem status interrupts 379 * are set via set_termios(), which will be occurring imminently 380 * anyway, so we don't enable them here. 381 */ 382 up->ier = UART_IER_RLSI | UART_IER_RDI | UART_IER_RTOIE | UART_IER_UUE; 383 serial_out(up, UART_IER, up->ier); 384 385 /* 386 * And clear the interrupt registers again for luck. 387 */ 388 (void) serial_in(up, UART_LSR); 389 (void) serial_in(up, UART_RX); 390 (void) serial_in(up, UART_IIR); 391 (void) serial_in(up, UART_MSR); 392 393 return 0; 394 } 395 396 static void serial_pxa_shutdown(struct uart_port *port) 397 { 398 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 399 unsigned long flags; 400 401 free_irq(up->port.irq, up); 402 403 /* 404 * Disable interrupts from this port 405 */ 406 up->ier = 0; 407 serial_out(up, UART_IER, 0); 408 409 spin_lock_irqsave(&up->port.lock, flags); 410 up->port.mctrl &= ~TIOCM_OUT2; 411 serial_pxa_set_mctrl(&up->port, up->port.mctrl); 412 spin_unlock_irqrestore(&up->port.lock, flags); 413 414 /* 415 * Disable break condition and FIFOs 416 */ 417 serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC); 418 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | 419 UART_FCR_CLEAR_RCVR | 420 UART_FCR_CLEAR_XMIT); 421 serial_out(up, UART_FCR, 0); 422 } 423 424 static void 425 serial_pxa_set_termios(struct uart_port *port, struct ktermios *termios, 426 const struct ktermios *old) 427 { 428 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 429 unsigned char cval, fcr = 0; 430 unsigned long flags; 431 unsigned int baud, quot; 432 unsigned int dll; 433 434 cval = UART_LCR_WLEN(tty_get_char_size(termios->c_cflag)); 435 436 if (termios->c_cflag & CSTOPB) 437 cval |= UART_LCR_STOP; 438 if (termios->c_cflag & PARENB) 439 cval |= UART_LCR_PARITY; 440 if (!(termios->c_cflag & PARODD)) 441 cval |= UART_LCR_EPAR; 442 443 /* 444 * Ask the core to calculate the divisor for us. 445 */ 446 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); 447 quot = uart_get_divisor(port, baud); 448 449 if ((up->port.uartclk / quot) < (2400 * 16)) 450 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR1; 451 else if ((up->port.uartclk / quot) < (230400 * 16)) 452 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR8; 453 else 454 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR32; 455 456 /* 457 * Ok, we're now changing the port state. Do it with 458 * interrupts disabled. 459 */ 460 spin_lock_irqsave(&up->port.lock, flags); 461 462 /* 463 * Ensure the port will be enabled. 464 * This is required especially for serial console. 465 */ 466 up->ier |= UART_IER_UUE; 467 468 /* 469 * Update the per-port timeout. 470 */ 471 uart_update_timeout(port, termios->c_cflag, baud); 472 473 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; 474 if (termios->c_iflag & INPCK) 475 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE; 476 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK)) 477 up->port.read_status_mask |= UART_LSR_BI; 478 479 /* 480 * Characters to ignore 481 */ 482 up->port.ignore_status_mask = 0; 483 if (termios->c_iflag & IGNPAR) 484 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE; 485 if (termios->c_iflag & IGNBRK) { 486 up->port.ignore_status_mask |= UART_LSR_BI; 487 /* 488 * If we're ignoring parity and break indicators, 489 * ignore overruns too (for real raw support). 490 */ 491 if (termios->c_iflag & IGNPAR) 492 up->port.ignore_status_mask |= UART_LSR_OE; 493 } 494 495 /* 496 * ignore all characters if CREAD is not set 497 */ 498 if ((termios->c_cflag & CREAD) == 0) 499 up->port.ignore_status_mask |= UART_LSR_DR; 500 501 /* 502 * CTS flow control flag and modem status interrupts 503 */ 504 up->ier &= ~UART_IER_MSI; 505 if (UART_ENABLE_MS(&up->port, termios->c_cflag)) 506 up->ier |= UART_IER_MSI; 507 508 serial_out(up, UART_IER, up->ier); 509 510 if (termios->c_cflag & CRTSCTS) 511 up->mcr |= UART_MCR_AFE; 512 else 513 up->mcr &= ~UART_MCR_AFE; 514 515 serial_out(up, UART_LCR, cval | UART_LCR_DLAB); /* set DLAB */ 516 serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */ 517 518 /* 519 * work around Errata #75 according to Intel(R) PXA27x Processor Family 520 * Specification Update (Nov 2005) 521 */ 522 dll = serial_in(up, UART_DLL); 523 WARN_ON(dll != (quot & 0xff)); 524 525 serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */ 526 serial_out(up, UART_LCR, cval); /* reset DLAB */ 527 up->lcr = cval; /* Save LCR */ 528 serial_pxa_set_mctrl(&up->port, up->port.mctrl); 529 serial_out(up, UART_FCR, fcr); 530 spin_unlock_irqrestore(&up->port.lock, flags); 531 } 532 533 static void 534 serial_pxa_pm(struct uart_port *port, unsigned int state, 535 unsigned int oldstate) 536 { 537 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 538 539 if (!state) 540 clk_prepare_enable(up->clk); 541 else 542 clk_disable_unprepare(up->clk); 543 } 544 545 static void serial_pxa_release_port(struct uart_port *port) 546 { 547 } 548 549 static int serial_pxa_request_port(struct uart_port *port) 550 { 551 return 0; 552 } 553 554 static void serial_pxa_config_port(struct uart_port *port, int flags) 555 { 556 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 557 up->port.type = PORT_PXA; 558 } 559 560 static int 561 serial_pxa_verify_port(struct uart_port *port, struct serial_struct *ser) 562 { 563 /* we don't want the core code to modify any port params */ 564 return -EINVAL; 565 } 566 567 static const char * 568 serial_pxa_type(struct uart_port *port) 569 { 570 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 571 return up->name; 572 } 573 574 static struct uart_pxa_port *serial_pxa_ports[4]; 575 static struct uart_driver serial_pxa_reg; 576 577 #ifdef CONFIG_SERIAL_PXA_CONSOLE 578 579 /* 580 * Wait for transmitter & holding register to empty 581 */ 582 static void wait_for_xmitr(struct uart_pxa_port *up) 583 { 584 unsigned int status, tmout = 10000; 585 586 /* Wait up to 10ms for the character(s) to be sent. */ 587 do { 588 status = serial_in(up, UART_LSR); 589 590 if (status & UART_LSR_BI) 591 up->lsr_break_flag = UART_LSR_BI; 592 593 if (--tmout == 0) 594 break; 595 udelay(1); 596 } while (!uart_lsr_tx_empty(status)); 597 598 /* Wait up to 1s for flow control if necessary */ 599 if (up->port.flags & UPF_CONS_FLOW) { 600 tmout = 1000000; 601 while (--tmout && 602 ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0)) 603 udelay(1); 604 } 605 } 606 607 static void serial_pxa_console_putchar(struct uart_port *port, unsigned char ch) 608 { 609 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 610 611 wait_for_xmitr(up); 612 serial_out(up, UART_TX, ch); 613 } 614 615 /* 616 * Print a string to the serial port trying not to disturb 617 * any possible real use of the port... 618 * 619 * The console_lock must be held when we get here. 620 */ 621 static void 622 serial_pxa_console_write(struct console *co, const char *s, unsigned int count) 623 { 624 struct uart_pxa_port *up = serial_pxa_ports[co->index]; 625 unsigned int ier; 626 unsigned long flags; 627 int locked = 1; 628 629 clk_enable(up->clk); 630 local_irq_save(flags); 631 if (up->port.sysrq) 632 locked = 0; 633 else if (oops_in_progress) 634 locked = spin_trylock(&up->port.lock); 635 else 636 spin_lock(&up->port.lock); 637 638 /* 639 * First save the IER then disable the interrupts 640 */ 641 ier = serial_in(up, UART_IER); 642 serial_out(up, UART_IER, UART_IER_UUE); 643 644 uart_console_write(&up->port, s, count, serial_pxa_console_putchar); 645 646 /* 647 * Finally, wait for transmitter to become empty 648 * and restore the IER 649 */ 650 wait_for_xmitr(up); 651 serial_out(up, UART_IER, ier); 652 653 if (locked) 654 spin_unlock(&up->port.lock); 655 local_irq_restore(flags); 656 clk_disable(up->clk); 657 658 } 659 660 #ifdef CONFIG_CONSOLE_POLL 661 /* 662 * Console polling routines for writing and reading from the uart while 663 * in an interrupt or debug context. 664 */ 665 666 static int serial_pxa_get_poll_char(struct uart_port *port) 667 { 668 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 669 unsigned char lsr = serial_in(up, UART_LSR); 670 671 while (!(lsr & UART_LSR_DR)) 672 lsr = serial_in(up, UART_LSR); 673 674 return serial_in(up, UART_RX); 675 } 676 677 678 static void serial_pxa_put_poll_char(struct uart_port *port, 679 unsigned char c) 680 { 681 unsigned int ier; 682 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 683 684 /* 685 * First save the IER then disable the interrupts 686 */ 687 ier = serial_in(up, UART_IER); 688 serial_out(up, UART_IER, UART_IER_UUE); 689 690 wait_for_xmitr(up); 691 /* 692 * Send the character out. 693 */ 694 serial_out(up, UART_TX, c); 695 696 /* 697 * Finally, wait for transmitter to become empty 698 * and restore the IER 699 */ 700 wait_for_xmitr(up); 701 serial_out(up, UART_IER, ier); 702 } 703 704 #endif /* CONFIG_CONSOLE_POLL */ 705 706 static int __init 707 serial_pxa_console_setup(struct console *co, char *options) 708 { 709 struct uart_pxa_port *up; 710 int baud = 9600; 711 int bits = 8; 712 int parity = 'n'; 713 int flow = 'n'; 714 715 if (co->index == -1 || co->index >= serial_pxa_reg.nr) 716 co->index = 0; 717 up = serial_pxa_ports[co->index]; 718 if (!up) 719 return -ENODEV; 720 721 if (options) 722 uart_parse_options(options, &baud, &parity, &bits, &flow); 723 724 return uart_set_options(&up->port, co, baud, parity, bits, flow); 725 } 726 727 static struct console serial_pxa_console = { 728 .name = "ttyS", 729 .write = serial_pxa_console_write, 730 .device = uart_console_device, 731 .setup = serial_pxa_console_setup, 732 .flags = CON_PRINTBUFFER, 733 .index = -1, 734 .data = &serial_pxa_reg, 735 }; 736 737 #define PXA_CONSOLE &serial_pxa_console 738 #else 739 #define PXA_CONSOLE NULL 740 #endif 741 742 static const struct uart_ops serial_pxa_pops = { 743 .tx_empty = serial_pxa_tx_empty, 744 .set_mctrl = serial_pxa_set_mctrl, 745 .get_mctrl = serial_pxa_get_mctrl, 746 .stop_tx = serial_pxa_stop_tx, 747 .start_tx = serial_pxa_start_tx, 748 .stop_rx = serial_pxa_stop_rx, 749 .enable_ms = serial_pxa_enable_ms, 750 .break_ctl = serial_pxa_break_ctl, 751 .startup = serial_pxa_startup, 752 .shutdown = serial_pxa_shutdown, 753 .set_termios = serial_pxa_set_termios, 754 .pm = serial_pxa_pm, 755 .type = serial_pxa_type, 756 .release_port = serial_pxa_release_port, 757 .request_port = serial_pxa_request_port, 758 .config_port = serial_pxa_config_port, 759 .verify_port = serial_pxa_verify_port, 760 #if defined(CONFIG_CONSOLE_POLL) && defined(CONFIG_SERIAL_PXA_CONSOLE) 761 .poll_get_char = serial_pxa_get_poll_char, 762 .poll_put_char = serial_pxa_put_poll_char, 763 #endif 764 }; 765 766 static struct uart_driver serial_pxa_reg = { 767 .owner = THIS_MODULE, 768 .driver_name = "PXA serial", 769 .dev_name = "ttyS", 770 .major = TTY_MAJOR, 771 .minor = 64, 772 .nr = 4, 773 .cons = PXA_CONSOLE, 774 }; 775 776 #ifdef CONFIG_PM 777 static int serial_pxa_suspend(struct device *dev) 778 { 779 struct uart_pxa_port *sport = dev_get_drvdata(dev); 780 781 if (sport) 782 uart_suspend_port(&serial_pxa_reg, &sport->port); 783 784 return 0; 785 } 786 787 static int serial_pxa_resume(struct device *dev) 788 { 789 struct uart_pxa_port *sport = dev_get_drvdata(dev); 790 791 if (sport) 792 uart_resume_port(&serial_pxa_reg, &sport->port); 793 794 return 0; 795 } 796 797 static const struct dev_pm_ops serial_pxa_pm_ops = { 798 .suspend = serial_pxa_suspend, 799 .resume = serial_pxa_resume, 800 }; 801 #endif 802 803 static const struct of_device_id serial_pxa_dt_ids[] = { 804 { .compatible = "mrvl,pxa-uart", }, 805 { .compatible = "mrvl,mmp-uart", }, 806 {} 807 }; 808 809 static int serial_pxa_probe_dt(struct platform_device *pdev, 810 struct uart_pxa_port *sport) 811 { 812 struct device_node *np = pdev->dev.of_node; 813 int ret; 814 815 if (!np) 816 return 1; 817 818 ret = of_alias_get_id(np, "serial"); 819 if (ret < 0) { 820 dev_err(&pdev->dev, "failed to get alias id, errno %d\n", ret); 821 return ret; 822 } 823 sport->port.line = ret; 824 return 0; 825 } 826 827 static int serial_pxa_probe(struct platform_device *dev) 828 { 829 struct uart_pxa_port *sport; 830 struct resource *mmres; 831 int ret; 832 int irq; 833 834 mmres = platform_get_resource(dev, IORESOURCE_MEM, 0); 835 if (!mmres) 836 return -ENODEV; 837 838 irq = platform_get_irq(dev, 0); 839 if (irq < 0) 840 return irq; 841 842 sport = kzalloc(sizeof(struct uart_pxa_port), GFP_KERNEL); 843 if (!sport) 844 return -ENOMEM; 845 846 sport->clk = clk_get(&dev->dev, NULL); 847 if (IS_ERR(sport->clk)) { 848 ret = PTR_ERR(sport->clk); 849 goto err_free; 850 } 851 852 ret = clk_prepare(sport->clk); 853 if (ret) { 854 clk_put(sport->clk); 855 goto err_free; 856 } 857 858 sport->port.type = PORT_PXA; 859 sport->port.iotype = UPIO_MEM; 860 sport->port.mapbase = mmres->start; 861 sport->port.irq = irq; 862 sport->port.fifosize = 64; 863 sport->port.ops = &serial_pxa_pops; 864 sport->port.dev = &dev->dev; 865 sport->port.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF; 866 sport->port.uartclk = clk_get_rate(sport->clk); 867 sport->port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_PXA_CONSOLE); 868 869 ret = serial_pxa_probe_dt(dev, sport); 870 if (ret > 0) 871 sport->port.line = dev->id; 872 else if (ret < 0) 873 goto err_clk; 874 if (sport->port.line >= ARRAY_SIZE(serial_pxa_ports)) { 875 dev_err(&dev->dev, "serial%d out of range\n", sport->port.line); 876 ret = -EINVAL; 877 goto err_clk; 878 } 879 snprintf(sport->name, PXA_NAME_LEN - 1, "UART%d", sport->port.line + 1); 880 881 sport->port.membase = ioremap(mmres->start, resource_size(mmres)); 882 if (!sport->port.membase) { 883 ret = -ENOMEM; 884 goto err_clk; 885 } 886 887 serial_pxa_ports[sport->port.line] = sport; 888 889 uart_add_one_port(&serial_pxa_reg, &sport->port); 890 platform_set_drvdata(dev, sport); 891 892 return 0; 893 894 err_clk: 895 clk_unprepare(sport->clk); 896 clk_put(sport->clk); 897 err_free: 898 kfree(sport); 899 return ret; 900 } 901 902 static struct platform_driver serial_pxa_driver = { 903 .probe = serial_pxa_probe, 904 905 .driver = { 906 .name = "pxa2xx-uart", 907 #ifdef CONFIG_PM 908 .pm = &serial_pxa_pm_ops, 909 #endif 910 .suppress_bind_attrs = true, 911 .of_match_table = serial_pxa_dt_ids, 912 }, 913 }; 914 915 916 /* 8250 driver for PXA serial ports should be used */ 917 static int __init serial_pxa_init(void) 918 { 919 int ret; 920 921 ret = uart_register_driver(&serial_pxa_reg); 922 if (ret != 0) 923 return ret; 924 925 ret = platform_driver_register(&serial_pxa_driver); 926 if (ret != 0) 927 uart_unregister_driver(&serial_pxa_reg); 928 929 return ret; 930 } 931 device_initcall(serial_pxa_init); 932