1e3b3d0f5SGreg Kroah-Hartman // SPDX-License-Identifier: GPL-2.0+ 2ab4382d2SGreg Kroah-Hartman /* 3ab4382d2SGreg Kroah-Hartman * Driver for OMAP-UART controller. 4ab4382d2SGreg Kroah-Hartman * Based on drivers/serial/8250.c 5ab4382d2SGreg Kroah-Hartman * 6ab4382d2SGreg Kroah-Hartman * Copyright (C) 2010 Texas Instruments. 7ab4382d2SGreg Kroah-Hartman * 8ab4382d2SGreg Kroah-Hartman * Authors: 9ab4382d2SGreg Kroah-Hartman * Govindraj R <govindraj.raja@ti.com> 10ab4382d2SGreg Kroah-Hartman * Thara Gopinath <thara@ti.com> 11ab4382d2SGreg Kroah-Hartman * 1225985edcSLucas De Marchi * Note: This driver is made separate from 8250 driver as we cannot 13ab4382d2SGreg Kroah-Hartman * over load 8250 driver with omap platform specific configuration for 14ab4382d2SGreg Kroah-Hartman * features like DMA, it makes easier to implement features like DMA and 15ab4382d2SGreg Kroah-Hartman * hardware flow control and software flow control configuration with 16ab4382d2SGreg Kroah-Hartman * this driver as required for the omap-platform. 17ab4382d2SGreg Kroah-Hartman */ 18ab4382d2SGreg Kroah-Hartman 19364a6eceSThomas Weber #if defined(CONFIG_SERIAL_OMAP_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) 20364a6eceSThomas Weber #define SUPPORT_SYSRQ 21364a6eceSThomas Weber #endif 22364a6eceSThomas Weber 23ab4382d2SGreg Kroah-Hartman #include <linux/module.h> 24ab4382d2SGreg Kroah-Hartman #include <linux/init.h> 25ab4382d2SGreg Kroah-Hartman #include <linux/console.h> 26ab4382d2SGreg Kroah-Hartman #include <linux/serial_reg.h> 27ab4382d2SGreg Kroah-Hartman #include <linux/delay.h> 28ab4382d2SGreg Kroah-Hartman #include <linux/slab.h> 29ab4382d2SGreg Kroah-Hartman #include <linux/tty.h> 30ab4382d2SGreg Kroah-Hartman #include <linux/tty_flip.h> 31d21e4005SFelipe Balbi #include <linux/platform_device.h> 32ab4382d2SGreg Kroah-Hartman #include <linux/io.h> 33ab4382d2SGreg Kroah-Hartman #include <linux/clk.h> 34ab4382d2SGreg Kroah-Hartman #include <linux/serial_core.h> 35ab4382d2SGreg Kroah-Hartman #include <linux/irq.h> 36fcdca757SGovindraj.R #include <linux/pm_runtime.h> 37ee83bd3bSTony Lindgren #include <linux/pm_wakeirq.h> 38d92b0dfcSRajendra Nayak #include <linux/of.h> 392a0b965cSTony Lindgren #include <linux/of_irq.h> 409574f36fSNeilBrown #include <linux/gpio.h> 414a0ac0f5SMark Jackson #include <linux/of_gpio.h> 42d9ba5737STony Lindgren #include <linux/platform_data/serial-omap.h> 43ab4382d2SGreg Kroah-Hartman 444a0ac0f5SMark Jackson #include <dt-bindings/gpio/gpio.h> 454a0ac0f5SMark Jackson 467af0ea5dSNishanth Menon #define OMAP_MAX_HSUART_PORTS 10 47f91b55abSRussell King 487c77c8deSGovindraj.R #define UART_BUILD_REVISION(x, y) (((x) << 8) | (y)) 497c77c8deSGovindraj.R 507c77c8deSGovindraj.R #define OMAP_UART_REV_42 0x0402 517c77c8deSGovindraj.R #define OMAP_UART_REV_46 0x0406 527c77c8deSGovindraj.R #define OMAP_UART_REV_52 0x0502 537c77c8deSGovindraj.R #define OMAP_UART_REV_63 0x0603 547c77c8deSGovindraj.R 55f64ffda6SGovindraj.R #define OMAP_UART_TX_WAKEUP_EN BIT(7) 56f64ffda6SGovindraj.R 57f64ffda6SGovindraj.R /* Feature flags */ 58f64ffda6SGovindraj.R #define OMAP_UART_WER_HAS_TX_WAKEUP BIT(0) 59f64ffda6SGovindraj.R 60f91b55abSRussell King #define UART_ERRATA_i202_MDR1_ACCESS BIT(0) 61f91b55abSRussell King #define UART_ERRATA_i291_DMA_FORCEIDLE BIT(1) 62f91b55abSRussell King 638fe789dcSRajendra Nayak #define DEFAULT_CLK_SPEED 48000000 /* 48Mhz */ 648fe789dcSRajendra Nayak 650ba5f668SPaul Walmsley /* SCR register bitmasks */ 660ba5f668SPaul Walmsley #define OMAP_UART_SCR_RX_TRIG_GRANU1_MASK (1 << 7) 671776fd05SAlexey Pelykh #define OMAP_UART_SCR_TX_TRIG_GRANU1_MASK (1 << 6) 68f91b55abSRussell King #define OMAP_UART_SCR_TX_EMPTY (1 << 3) 690ba5f668SPaul Walmsley 700ba5f668SPaul Walmsley /* FCR register bitmasks */ 710ba5f668SPaul Walmsley #define OMAP_UART_FCR_RX_FIFO_TRIG_MASK (0x3 << 6) 726721ab7fSFelipe Balbi #define OMAP_UART_FCR_TX_FIFO_TRIG_MASK (0x3 << 4) 730ba5f668SPaul Walmsley 747c77c8deSGovindraj.R /* MVR register bitmasks */ 757c77c8deSGovindraj.R #define OMAP_UART_MVR_SCHEME_SHIFT 30 767c77c8deSGovindraj.R 777c77c8deSGovindraj.R #define OMAP_UART_LEGACY_MVR_MAJ_MASK 0xf0 787c77c8deSGovindraj.R #define OMAP_UART_LEGACY_MVR_MAJ_SHIFT 4 797c77c8deSGovindraj.R #define OMAP_UART_LEGACY_MVR_MIN_MASK 0x0f 807c77c8deSGovindraj.R 817c77c8deSGovindraj.R #define OMAP_UART_MVR_MAJ_MASK 0x700 827c77c8deSGovindraj.R #define OMAP_UART_MVR_MAJ_SHIFT 8 837c77c8deSGovindraj.R #define OMAP_UART_MVR_MIN_MASK 0x3f 847c77c8deSGovindraj.R 85f91b55abSRussell King #define OMAP_UART_DMA_CH_FREE -1 86f91b55abSRussell King 87f91b55abSRussell King #define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA 88f91b55abSRussell King #define OMAP_MODE13X_SPEED 230400 89f91b55abSRussell King 90f91b55abSRussell King /* WER = 0x7F 91f91b55abSRussell King * Enable module level wakeup in WER reg 92f91b55abSRussell King */ 93fbf7ebe4SPavel Machek #define OMAP_UART_WER_MOD_WKUP 0x7F 94f91b55abSRussell King 95f91b55abSRussell King /* Enable XON/XOFF flow control on output */ 963af08bd7SRussell King #define OMAP_UART_SW_TX 0x08 97f91b55abSRussell King 98f91b55abSRussell King /* Enable XON/XOFF flow control on input */ 993af08bd7SRussell King #define OMAP_UART_SW_RX 0x02 100f91b55abSRussell King 101f91b55abSRussell King #define OMAP_UART_SW_CLR 0xF0 102f91b55abSRussell King 103f91b55abSRussell King #define OMAP_UART_TCR_TRIG 0x0F 104f91b55abSRussell King 105f91b55abSRussell King struct uart_omap_dma { 106f91b55abSRussell King u8 uart_dma_tx; 107f91b55abSRussell King u8 uart_dma_rx; 108f91b55abSRussell King int rx_dma_channel; 109f91b55abSRussell King int tx_dma_channel; 110f91b55abSRussell King dma_addr_t rx_buf_dma_phys; 111f91b55abSRussell King dma_addr_t tx_buf_dma_phys; 112f91b55abSRussell King unsigned int uart_base; 113f91b55abSRussell King /* 114f91b55abSRussell King * Buffer for rx dma. It is not required for tx because the buffer 115f91b55abSRussell King * comes from port structure. 116f91b55abSRussell King */ 117f91b55abSRussell King unsigned char *rx_buf; 118f91b55abSRussell King unsigned int prev_rx_dma_pos; 119f91b55abSRussell King int tx_buf_size; 120f91b55abSRussell King int tx_dma_used; 121f91b55abSRussell King int rx_dma_used; 122f91b55abSRussell King spinlock_t tx_lock; 123f91b55abSRussell King spinlock_t rx_lock; 124f91b55abSRussell King /* timer to poll activity on rx dma */ 125f91b55abSRussell King struct timer_list rx_timer; 126f91b55abSRussell King unsigned int rx_buf_size; 127f91b55abSRussell King unsigned int rx_poll_rate; 128f91b55abSRussell King unsigned int rx_timeout; 129f91b55abSRussell King }; 130f91b55abSRussell King 131d37c6cebSFelipe Balbi struct uart_omap_port { 132d37c6cebSFelipe Balbi struct uart_port port; 133d37c6cebSFelipe Balbi struct uart_omap_dma uart_dma; 134d37c6cebSFelipe Balbi struct device *dev; 1352a0b965cSTony Lindgren int wakeirq; 136d37c6cebSFelipe Balbi 137d37c6cebSFelipe Balbi unsigned char ier; 138d37c6cebSFelipe Balbi unsigned char lcr; 139d37c6cebSFelipe Balbi unsigned char mcr; 140d37c6cebSFelipe Balbi unsigned char fcr; 141d37c6cebSFelipe Balbi unsigned char efr; 142d37c6cebSFelipe Balbi unsigned char dll; 143d37c6cebSFelipe Balbi unsigned char dlh; 144d37c6cebSFelipe Balbi unsigned char mdr1; 145d37c6cebSFelipe Balbi unsigned char scr; 146f64ffda6SGovindraj.R unsigned char wer; 147d37c6cebSFelipe Balbi 148d37c6cebSFelipe Balbi int use_dma; 149d37c6cebSFelipe Balbi /* 150d37c6cebSFelipe Balbi * Some bits in registers are cleared on a read, so they must 151fbf7ebe4SPavel Machek * be saved whenever the register is read, but the bits will not 152d37c6cebSFelipe Balbi * be immediately processed. 153d37c6cebSFelipe Balbi */ 154d37c6cebSFelipe Balbi unsigned int lsr_break_flag; 155d37c6cebSFelipe Balbi unsigned char msr_saved_flags; 156d37c6cebSFelipe Balbi char name[20]; 157d37c6cebSFelipe Balbi unsigned long port_activity; 15839aee51dSShubhrajyoti D int context_loss_cnt; 159d37c6cebSFelipe Balbi u32 errata; 160f64ffda6SGovindraj.R u32 features; 161d37c6cebSFelipe Balbi 1624a0ac0f5SMark Jackson int rts_gpio; 1634a0ac0f5SMark Jackson 164d37c6cebSFelipe Balbi struct pm_qos_request pm_qos_request; 165d37c6cebSFelipe Balbi u32 latency; 166d37c6cebSFelipe Balbi u32 calc_latency; 167d37c6cebSFelipe Balbi struct work_struct qos_work; 168ddd85e22SSourav Poddar bool is_suspending; 169d37c6cebSFelipe Balbi }; 170d37c6cebSFelipe Balbi 171d37c6cebSFelipe Balbi #define to_uart_omap_port(p) ((container_of((p), struct uart_omap_port, port))) 172d37c6cebSFelipe Balbi 173ab4382d2SGreg Kroah-Hartman static struct uart_omap_port *ui[OMAP_MAX_HSUART_PORTS]; 174ab4382d2SGreg Kroah-Hartman 175ab4382d2SGreg Kroah-Hartman /* Forward declaration of functions */ 17694734749SGovindraj.R static void serial_omap_mdr1_errataset(struct uart_omap_port *up, u8 mdr1); 177ab4382d2SGreg Kroah-Hartman 178ab4382d2SGreg Kroah-Hartman static inline unsigned int serial_in(struct uart_omap_port *up, int offset) 179ab4382d2SGreg Kroah-Hartman { 180ab4382d2SGreg Kroah-Hartman offset <<= up->port.regshift; 181ab4382d2SGreg Kroah-Hartman return readw(up->port.membase + offset); 182ab4382d2SGreg Kroah-Hartman } 183ab4382d2SGreg Kroah-Hartman 184ab4382d2SGreg Kroah-Hartman static inline void serial_out(struct uart_omap_port *up, int offset, int value) 185ab4382d2SGreg Kroah-Hartman { 186ab4382d2SGreg Kroah-Hartman offset <<= up->port.regshift; 187ab4382d2SGreg Kroah-Hartman writew(value, up->port.membase + offset); 188ab4382d2SGreg Kroah-Hartman } 189ab4382d2SGreg Kroah-Hartman 190ab4382d2SGreg Kroah-Hartman static inline void serial_omap_clear_fifos(struct uart_omap_port *up) 191ab4382d2SGreg Kroah-Hartman { 192ab4382d2SGreg Kroah-Hartman serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO); 193ab4382d2SGreg Kroah-Hartman serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | 194ab4382d2SGreg Kroah-Hartman UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); 195ab4382d2SGreg Kroah-Hartman serial_out(up, UART_FCR, 0); 196ab4382d2SGreg Kroah-Hartman } 197ab4382d2SGreg Kroah-Hartman 198adfb9233SEzequiel Garcia #ifdef CONFIG_PM 199e5b57c03SFelipe Balbi static int serial_omap_get_context_loss_count(struct uart_omap_port *up) 200e5b57c03SFelipe Balbi { 201574de559SJingoo Han struct omap_uart_port_info *pdata = dev_get_platdata(up->dev); 202e5b57c03SFelipe Balbi 203ce2f08deSFelipe Balbi if (!pdata || !pdata->get_context_loss_count) 204a630fbfbSTony Lindgren return -EINVAL; 205e5b57c03SFelipe Balbi 206d8ee4ea6SFelipe Balbi return pdata->get_context_loss_count(up->dev); 207e5b57c03SFelipe Balbi } 208e5b57c03SFelipe Balbi 209ee83bd3bSTony Lindgren /* REVISIT: Remove this when omap3 boots in device tree only mode */ 210e5b57c03SFelipe Balbi static void serial_omap_enable_wakeup(struct uart_omap_port *up, bool enable) 211e5b57c03SFelipe Balbi { 212574de559SJingoo Han struct omap_uart_port_info *pdata = dev_get_platdata(up->dev); 213e5b57c03SFelipe Balbi 214ce2f08deSFelipe Balbi if (!pdata || !pdata->enable_wakeup) 215ce2f08deSFelipe Balbi return; 216ce2f08deSFelipe Balbi 217d8ee4ea6SFelipe Balbi pdata->enable_wakeup(up->dev, enable); 218e5b57c03SFelipe Balbi } 219adfb9233SEzequiel Garcia #endif /* CONFIG_PM */ 220e5b57c03SFelipe Balbi 221ab4382d2SGreg Kroah-Hartman /* 22213d6ceb4SFrans Klaver * Calculate the absolute difference between the desired and actual baud 22313d6ceb4SFrans Klaver * rate for the given mode. 22413d6ceb4SFrans Klaver */ 22513d6ceb4SFrans Klaver static inline int calculate_baud_abs_diff(struct uart_port *port, 22613d6ceb4SFrans Klaver unsigned int baud, unsigned int mode) 22713d6ceb4SFrans Klaver { 22813d6ceb4SFrans Klaver unsigned int n = port->uartclk / (mode * baud); 22913d6ceb4SFrans Klaver int abs_diff; 23013d6ceb4SFrans Klaver 23113d6ceb4SFrans Klaver if (n == 0) 23213d6ceb4SFrans Klaver n = 1; 23313d6ceb4SFrans Klaver 23413d6ceb4SFrans Klaver abs_diff = baud - (port->uartclk / (mode * n)); 23513d6ceb4SFrans Klaver if (abs_diff < 0) 23613d6ceb4SFrans Klaver abs_diff = -abs_diff; 23713d6ceb4SFrans Klaver 23813d6ceb4SFrans Klaver return abs_diff; 23913d6ceb4SFrans Klaver } 24013d6ceb4SFrans Klaver 24113d6ceb4SFrans Klaver /* 2425fe21236SAlexey Pelykh * serial_omap_baud_is_mode16 - check if baud rate is MODE16X 2435fe21236SAlexey Pelykh * @port: uart port info 2445fe21236SAlexey Pelykh * @baud: baudrate for which mode needs to be determined 2455fe21236SAlexey Pelykh * 2465fe21236SAlexey Pelykh * Returns true if baud rate is MODE16X and false if MODE13X 2475fe21236SAlexey Pelykh * Original table in OMAP TRM named "UART Mode Baud Rates, Divisor Values, 2485fe21236SAlexey Pelykh * and Error Rates" determines modes not for all common baud rates. 2495fe21236SAlexey Pelykh * E.g. for 1000000 baud rate mode must be 16x, but according to that 2505fe21236SAlexey Pelykh * table it's determined as 13x. 2515fe21236SAlexey Pelykh */ 2525fe21236SAlexey Pelykh static bool 2535fe21236SAlexey Pelykh serial_omap_baud_is_mode16(struct uart_port *port, unsigned int baud) 2545fe21236SAlexey Pelykh { 25513d6ceb4SFrans Klaver int abs_diff_13 = calculate_baud_abs_diff(port, baud, 13); 25613d6ceb4SFrans Klaver int abs_diff_16 = calculate_baud_abs_diff(port, baud, 16); 257dc318756SFrans Klaver 25813d6ceb4SFrans Klaver return (abs_diff_13 >= abs_diff_16); 2595fe21236SAlexey Pelykh } 2605fe21236SAlexey Pelykh 2615fe21236SAlexey Pelykh /* 262ab4382d2SGreg Kroah-Hartman * serial_omap_get_divisor - calculate divisor value 263ab4382d2SGreg Kroah-Hartman * @port: uart port info 264ab4382d2SGreg Kroah-Hartman * @baud: baudrate for which divisor needs to be calculated. 265ab4382d2SGreg Kroah-Hartman */ 266ab4382d2SGreg Kroah-Hartman static unsigned int 267ab4382d2SGreg Kroah-Hartman serial_omap_get_divisor(struct uart_port *port, unsigned int baud) 268ab4382d2SGreg Kroah-Hartman { 2694250b5d9SAlexey Pelykh unsigned int mode; 270ab4382d2SGreg Kroah-Hartman 2715fe21236SAlexey Pelykh if (!serial_omap_baud_is_mode16(port, baud)) 2724250b5d9SAlexey Pelykh mode = 13; 273ab4382d2SGreg Kroah-Hartman else 2744250b5d9SAlexey Pelykh mode = 16; 2754250b5d9SAlexey Pelykh return port->uartclk/(mode * baud); 276ab4382d2SGreg Kroah-Hartman } 277ab4382d2SGreg Kroah-Hartman 278ab4382d2SGreg Kroah-Hartman static void serial_omap_enable_ms(struct uart_port *port) 279ab4382d2SGreg Kroah-Hartman { 280c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 281ab4382d2SGreg Kroah-Hartman 282ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_enable_ms+%d\n", up->port.line); 283fcdca757SGovindraj.R 284d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 285ab4382d2SGreg Kroah-Hartman up->ier |= UART_IER_MSI; 286ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 287660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 288660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 289ab4382d2SGreg Kroah-Hartman } 290ab4382d2SGreg Kroah-Hartman 291ab4382d2SGreg Kroah-Hartman static void serial_omap_stop_tx(struct uart_port *port) 292ab4382d2SGreg Kroah-Hartman { 293c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 2944a0ac0f5SMark Jackson int res; 295ab4382d2SGreg Kroah-Hartman 296d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 2974a0ac0f5SMark Jackson 298018e7448SPhilippe Proulx /* Handle RS-485 */ 299dadd7ecbSRicardo Ribalda Delgado if (port->rs485.flags & SER_RS485_ENABLED) { 300018e7448SPhilippe Proulx if (up->scr & OMAP_UART_SCR_TX_EMPTY) { 301018e7448SPhilippe Proulx /* THR interrupt is fired when both TX FIFO and TX 302018e7448SPhilippe Proulx * shift register are empty. This means there's nothing 303018e7448SPhilippe Proulx * left to transmit now, so make sure the THR interrupt 304018e7448SPhilippe Proulx * is fired when TX FIFO is below the trigger level, 305018e7448SPhilippe Proulx * disable THR interrupts and toggle the RS-485 GPIO 306018e7448SPhilippe Proulx * data direction pin if needed. 307018e7448SPhilippe Proulx */ 308018e7448SPhilippe Proulx up->scr &= ~OMAP_UART_SCR_TX_EMPTY; 309018e7448SPhilippe Proulx serial_out(up, UART_OMAP_SCR, up->scr); 310dadd7ecbSRicardo Ribalda Delgado res = (port->rs485.flags & SER_RS485_RTS_AFTER_SEND) ? 311dadd7ecbSRicardo Ribalda Delgado 1 : 0; 3124a0ac0f5SMark Jackson if (gpio_get_value(up->rts_gpio) != res) { 313dadd7ecbSRicardo Ribalda Delgado if (port->rs485.delay_rts_after_send > 0) 314dadd7ecbSRicardo Ribalda Delgado mdelay( 315dadd7ecbSRicardo Ribalda Delgado port->rs485.delay_rts_after_send); 3164a0ac0f5SMark Jackson gpio_set_value(up->rts_gpio, res); 3174a0ac0f5SMark Jackson } 318018e7448SPhilippe Proulx } else { 319018e7448SPhilippe Proulx /* We're asked to stop, but there's still stuff in the 320018e7448SPhilippe Proulx * UART FIFO, so make sure the THR interrupt is fired 321018e7448SPhilippe Proulx * when both TX FIFO and TX shift register are empty. 322018e7448SPhilippe Proulx * The next THR interrupt (if no transmission is started 323018e7448SPhilippe Proulx * in the meantime) will indicate the end of a 324018e7448SPhilippe Proulx * transmission. Therefore we _don't_ disable THR 325018e7448SPhilippe Proulx * interrupts in this situation. 326018e7448SPhilippe Proulx */ 327018e7448SPhilippe Proulx up->scr |= OMAP_UART_SCR_TX_EMPTY; 328018e7448SPhilippe Proulx serial_out(up, UART_OMAP_SCR, up->scr); 329018e7448SPhilippe Proulx return; 3304a0ac0f5SMark Jackson } 3314a0ac0f5SMark Jackson } 3324a0ac0f5SMark Jackson 333ab4382d2SGreg Kroah-Hartman if (up->ier & UART_IER_THRI) { 334ab4382d2SGreg Kroah-Hartman up->ier &= ~UART_IER_THRI; 335ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 336ab4382d2SGreg Kroah-Hartman } 337fcdca757SGovindraj.R 338dadd7ecbSRicardo Ribalda Delgado if ((port->rs485.flags & SER_RS485_ENABLED) && 339dadd7ecbSRicardo Ribalda Delgado !(port->rs485.flags & SER_RS485_RX_DURING_TX)) { 3403a13884aSDimitris Lampridis /* 3413a13884aSDimitris Lampridis * Empty the RX FIFO, we are not interested in anything 3423a13884aSDimitris Lampridis * received during the half-duplex transmission. 3433a13884aSDimitris Lampridis */ 3443a13884aSDimitris Lampridis serial_out(up, UART_FCR, up->fcr | UART_FCR_CLEAR_RCVR); 3453a13884aSDimitris Lampridis /* Re-enable RX interrupts */ 346cab53dc9SDimitris Lampridis up->ier |= UART_IER_RLSI | UART_IER_RDI; 347cab53dc9SDimitris Lampridis up->port.read_status_mask |= UART_LSR_DR; 3484a0ac0f5SMark Jackson serial_out(up, UART_IER, up->ier); 3494a0ac0f5SMark Jackson } 3504a0ac0f5SMark Jackson 351d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 352d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 353ab4382d2SGreg Kroah-Hartman } 354ab4382d2SGreg Kroah-Hartman 355ab4382d2SGreg Kroah-Hartman static void serial_omap_stop_rx(struct uart_port *port) 356ab4382d2SGreg Kroah-Hartman { 357c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 358ab4382d2SGreg Kroah-Hartman 359d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 360cab53dc9SDimitris Lampridis up->ier &= ~(UART_IER_RLSI | UART_IER_RDI); 361ab4382d2SGreg Kroah-Hartman up->port.read_status_mask &= ~UART_LSR_DR; 362ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 363d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 364d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 365ab4382d2SGreg Kroah-Hartman } 366ab4382d2SGreg Kroah-Hartman 367bf63a086SFelipe Balbi static void transmit_chars(struct uart_omap_port *up, unsigned int lsr) 368ab4382d2SGreg Kroah-Hartman { 369ab4382d2SGreg Kroah-Hartman struct circ_buf *xmit = &up->port.state->xmit; 370ab4382d2SGreg Kroah-Hartman int count; 371ab4382d2SGreg Kroah-Hartman 372ab4382d2SGreg Kroah-Hartman if (up->port.x_char) { 373ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TX, up->port.x_char); 374ab4382d2SGreg Kroah-Hartman up->port.icount.tx++; 375ab4382d2SGreg Kroah-Hartman up->port.x_char = 0; 376ab4382d2SGreg Kroah-Hartman return; 377ab4382d2SGreg Kroah-Hartman } 378ab4382d2SGreg Kroah-Hartman if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { 379ab4382d2SGreg Kroah-Hartman serial_omap_stop_tx(&up->port); 380ab4382d2SGreg Kroah-Hartman return; 381ab4382d2SGreg Kroah-Hartman } 382355fe568SGreg Kroah-Hartman count = up->port.fifosize / 4; 383ab4382d2SGreg Kroah-Hartman do { 384ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TX, xmit->buf[xmit->tail]); 385ab4382d2SGreg Kroah-Hartman xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 386ab4382d2SGreg Kroah-Hartman up->port.icount.tx++; 387ab4382d2SGreg Kroah-Hartman if (uart_circ_empty(xmit)) 388ab4382d2SGreg Kroah-Hartman break; 389ab4382d2SGreg Kroah-Hartman } while (--count > 0); 390ab4382d2SGreg Kroah-Hartman 3916bf78967SFelipe Balbi if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 392ab4382d2SGreg Kroah-Hartman uart_write_wakeup(&up->port); 393ab4382d2SGreg Kroah-Hartman 394ab4382d2SGreg Kroah-Hartman if (uart_circ_empty(xmit)) 395ab4382d2SGreg Kroah-Hartman serial_omap_stop_tx(&up->port); 396ab4382d2SGreg Kroah-Hartman } 397ab4382d2SGreg Kroah-Hartman 398ab4382d2SGreg Kroah-Hartman static inline void serial_omap_enable_ier_thri(struct uart_omap_port *up) 399ab4382d2SGreg Kroah-Hartman { 400ab4382d2SGreg Kroah-Hartman if (!(up->ier & UART_IER_THRI)) { 401ab4382d2SGreg Kroah-Hartman up->ier |= UART_IER_THRI; 402ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 403ab4382d2SGreg Kroah-Hartman } 404ab4382d2SGreg Kroah-Hartman } 405ab4382d2SGreg Kroah-Hartman 406ab4382d2SGreg Kroah-Hartman static void serial_omap_start_tx(struct uart_port *port) 407ab4382d2SGreg Kroah-Hartman { 408c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 4094a0ac0f5SMark Jackson int res; 410ab4382d2SGreg Kroah-Hartman 411d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 4124a0ac0f5SMark Jackson 413018e7448SPhilippe Proulx /* Handle RS-485 */ 414dadd7ecbSRicardo Ribalda Delgado if (port->rs485.flags & SER_RS485_ENABLED) { 415018e7448SPhilippe Proulx /* Fire THR interrupts when FIFO is below trigger level */ 416018e7448SPhilippe Proulx up->scr &= ~OMAP_UART_SCR_TX_EMPTY; 417018e7448SPhilippe Proulx serial_out(up, UART_OMAP_SCR, up->scr); 418018e7448SPhilippe Proulx 4194a0ac0f5SMark Jackson /* if rts not already enabled */ 420dadd7ecbSRicardo Ribalda Delgado res = (port->rs485.flags & SER_RS485_RTS_ON_SEND) ? 1 : 0; 4214a0ac0f5SMark Jackson if (gpio_get_value(up->rts_gpio) != res) { 4224a0ac0f5SMark Jackson gpio_set_value(up->rts_gpio, res); 423dadd7ecbSRicardo Ribalda Delgado if (port->rs485.delay_rts_before_send > 0) 424dadd7ecbSRicardo Ribalda Delgado mdelay(port->rs485.delay_rts_before_send); 4254a0ac0f5SMark Jackson } 4264a0ac0f5SMark Jackson } 4274a0ac0f5SMark Jackson 428dadd7ecbSRicardo Ribalda Delgado if ((port->rs485.flags & SER_RS485_ENABLED) && 429dadd7ecbSRicardo Ribalda Delgado !(port->rs485.flags & SER_RS485_RX_DURING_TX)) 4304a0ac0f5SMark Jackson serial_omap_stop_rx(port); 4314a0ac0f5SMark Jackson 432ab4382d2SGreg Kroah-Hartman serial_omap_enable_ier_thri(up); 433d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 434d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 435ab4382d2SGreg Kroah-Hartman } 436ab4382d2SGreg Kroah-Hartman 4373af08bd7SRussell King static void serial_omap_throttle(struct uart_port *port) 4383af08bd7SRussell King { 4393af08bd7SRussell King struct uart_omap_port *up = to_uart_omap_port(port); 4403af08bd7SRussell King unsigned long flags; 4413af08bd7SRussell King 4423af08bd7SRussell King pm_runtime_get_sync(up->dev); 4433af08bd7SRussell King spin_lock_irqsave(&up->port.lock, flags); 4443af08bd7SRussell King up->ier &= ~(UART_IER_RLSI | UART_IER_RDI); 4453af08bd7SRussell King serial_out(up, UART_IER, up->ier); 4463af08bd7SRussell King spin_unlock_irqrestore(&up->port.lock, flags); 4473af08bd7SRussell King pm_runtime_mark_last_busy(up->dev); 4483af08bd7SRussell King pm_runtime_put_autosuspend(up->dev); 4493af08bd7SRussell King } 4503af08bd7SRussell King 4513af08bd7SRussell King static void serial_omap_unthrottle(struct uart_port *port) 4523af08bd7SRussell King { 4533af08bd7SRussell King struct uart_omap_port *up = to_uart_omap_port(port); 4543af08bd7SRussell King unsigned long flags; 4553af08bd7SRussell King 4563af08bd7SRussell King pm_runtime_get_sync(up->dev); 4573af08bd7SRussell King spin_lock_irqsave(&up->port.lock, flags); 4583af08bd7SRussell King up->ier |= UART_IER_RLSI | UART_IER_RDI; 4593af08bd7SRussell King serial_out(up, UART_IER, up->ier); 4603af08bd7SRussell King spin_unlock_irqrestore(&up->port.lock, flags); 4613af08bd7SRussell King pm_runtime_mark_last_busy(up->dev); 4623af08bd7SRussell King pm_runtime_put_autosuspend(up->dev); 4633af08bd7SRussell King } 4643af08bd7SRussell King 465ab4382d2SGreg Kroah-Hartman static unsigned int check_modem_status(struct uart_omap_port *up) 466ab4382d2SGreg Kroah-Hartman { 467ab4382d2SGreg Kroah-Hartman unsigned int status; 468ab4382d2SGreg Kroah-Hartman 469ab4382d2SGreg Kroah-Hartman status = serial_in(up, UART_MSR); 470ab4382d2SGreg Kroah-Hartman status |= up->msr_saved_flags; 471ab4382d2SGreg Kroah-Hartman up->msr_saved_flags = 0; 472ab4382d2SGreg Kroah-Hartman if ((status & UART_MSR_ANY_DELTA) == 0) 473ab4382d2SGreg Kroah-Hartman return status; 474ab4382d2SGreg Kroah-Hartman 475ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI && 476ab4382d2SGreg Kroah-Hartman up->port.state != NULL) { 477ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_TERI) 478ab4382d2SGreg Kroah-Hartman up->port.icount.rng++; 479ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DDSR) 480ab4382d2SGreg Kroah-Hartman up->port.icount.dsr++; 481ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DDCD) 482ab4382d2SGreg Kroah-Hartman uart_handle_dcd_change 483ab4382d2SGreg Kroah-Hartman (&up->port, status & UART_MSR_DCD); 484ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DCTS) 485ab4382d2SGreg Kroah-Hartman uart_handle_cts_change 486ab4382d2SGreg Kroah-Hartman (&up->port, status & UART_MSR_CTS); 487ab4382d2SGreg Kroah-Hartman wake_up_interruptible(&up->port.state->port.delta_msr_wait); 488ab4382d2SGreg Kroah-Hartman } 489ab4382d2SGreg Kroah-Hartman 490ab4382d2SGreg Kroah-Hartman return status; 491ab4382d2SGreg Kroah-Hartman } 492ab4382d2SGreg Kroah-Hartman 49372256cbdSFelipe Balbi static void serial_omap_rlsi(struct uart_omap_port *up, unsigned int lsr) 49472256cbdSFelipe Balbi { 49572256cbdSFelipe Balbi unsigned int flag; 4969a12fcf8SShubhrajyoti D unsigned char ch = 0; 4979a12fcf8SShubhrajyoti D 4989a12fcf8SShubhrajyoti D if (likely(lsr & UART_LSR_DR)) 4999a12fcf8SShubhrajyoti D ch = serial_in(up, UART_RX); 50072256cbdSFelipe Balbi 50172256cbdSFelipe Balbi up->port.icount.rx++; 50272256cbdSFelipe Balbi flag = TTY_NORMAL; 50372256cbdSFelipe Balbi 50472256cbdSFelipe Balbi if (lsr & UART_LSR_BI) { 50572256cbdSFelipe Balbi flag = TTY_BREAK; 50672256cbdSFelipe Balbi lsr &= ~(UART_LSR_FE | UART_LSR_PE); 50772256cbdSFelipe Balbi up->port.icount.brk++; 50872256cbdSFelipe Balbi /* 50972256cbdSFelipe Balbi * We do the SysRQ and SAK checking 51072256cbdSFelipe Balbi * here because otherwise the break 51172256cbdSFelipe Balbi * may get masked by ignore_status_mask 51272256cbdSFelipe Balbi * or read_status_mask. 51372256cbdSFelipe Balbi */ 51472256cbdSFelipe Balbi if (uart_handle_break(&up->port)) 51572256cbdSFelipe Balbi return; 51672256cbdSFelipe Balbi 51772256cbdSFelipe Balbi } 51872256cbdSFelipe Balbi 51972256cbdSFelipe Balbi if (lsr & UART_LSR_PE) { 52072256cbdSFelipe Balbi flag = TTY_PARITY; 52172256cbdSFelipe Balbi up->port.icount.parity++; 52272256cbdSFelipe Balbi } 52372256cbdSFelipe Balbi 52472256cbdSFelipe Balbi if (lsr & UART_LSR_FE) { 52572256cbdSFelipe Balbi flag = TTY_FRAME; 52672256cbdSFelipe Balbi up->port.icount.frame++; 52772256cbdSFelipe Balbi } 52872256cbdSFelipe Balbi 52972256cbdSFelipe Balbi if (lsr & UART_LSR_OE) 53072256cbdSFelipe Balbi up->port.icount.overrun++; 53172256cbdSFelipe Balbi 53272256cbdSFelipe Balbi #ifdef CONFIG_SERIAL_OMAP_CONSOLE 53372256cbdSFelipe Balbi if (up->port.line == up->port.cons->index) { 53472256cbdSFelipe Balbi /* Recover the break flag from console xmit */ 53572256cbdSFelipe Balbi lsr |= up->lsr_break_flag; 53672256cbdSFelipe Balbi } 53772256cbdSFelipe Balbi #endif 53872256cbdSFelipe Balbi uart_insert_char(&up->port, lsr, UART_LSR_OE, 0, flag); 53972256cbdSFelipe Balbi } 54072256cbdSFelipe Balbi 54172256cbdSFelipe Balbi static void serial_omap_rdi(struct uart_omap_port *up, unsigned int lsr) 54272256cbdSFelipe Balbi { 54372256cbdSFelipe Balbi unsigned char ch = 0; 54472256cbdSFelipe Balbi unsigned int flag; 54572256cbdSFelipe Balbi 54672256cbdSFelipe Balbi if (!(lsr & UART_LSR_DR)) 54772256cbdSFelipe Balbi return; 54872256cbdSFelipe Balbi 54972256cbdSFelipe Balbi ch = serial_in(up, UART_RX); 55072256cbdSFelipe Balbi flag = TTY_NORMAL; 55172256cbdSFelipe Balbi up->port.icount.rx++; 55272256cbdSFelipe Balbi 55372256cbdSFelipe Balbi if (uart_handle_sysrq_char(&up->port, ch)) 55472256cbdSFelipe Balbi return; 55572256cbdSFelipe Balbi 55672256cbdSFelipe Balbi uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag); 55772256cbdSFelipe Balbi } 55872256cbdSFelipe Balbi 559ab4382d2SGreg Kroah-Hartman /** 560ab4382d2SGreg Kroah-Hartman * serial_omap_irq() - This handles the interrupt from one port 561ab4382d2SGreg Kroah-Hartman * @irq: uart port irq number 562ab4382d2SGreg Kroah-Hartman * @dev_id: uart port info 563ab4382d2SGreg Kroah-Hartman */ 56452c5513dSFelipe Balbi static irqreturn_t serial_omap_irq(int irq, void *dev_id) 565ab4382d2SGreg Kroah-Hartman { 566ab4382d2SGreg Kroah-Hartman struct uart_omap_port *up = dev_id; 567ab4382d2SGreg Kroah-Hartman unsigned int iir, lsr; 56881b75aefSFelipe Balbi unsigned int type; 5697b013e44SGreg Kroah-Hartman irqreturn_t ret = IRQ_NONE; 57072256cbdSFelipe Balbi int max_count = 256; 571ab4382d2SGreg Kroah-Hartman 5726c3a30c7SFelipe Balbi spin_lock(&up->port.lock); 57381b75aefSFelipe Balbi pm_runtime_get_sync(up->dev); 57472256cbdSFelipe Balbi 57572256cbdSFelipe Balbi do { 57681b75aefSFelipe Balbi iir = serial_in(up, UART_IIR); 57781b75aefSFelipe Balbi if (iir & UART_IIR_NO_INT) 57872256cbdSFelipe Balbi break; 57981b75aefSFelipe Balbi 5807b013e44SGreg Kroah-Hartman ret = IRQ_HANDLED; 581ab4382d2SGreg Kroah-Hartman lsr = serial_in(up, UART_LSR); 58281b75aefSFelipe Balbi 58381b75aefSFelipe Balbi /* extract IRQ type from IIR register */ 58481b75aefSFelipe Balbi type = iir & 0x3e; 58581b75aefSFelipe Balbi 58681b75aefSFelipe Balbi switch (type) { 58781b75aefSFelipe Balbi case UART_IIR_MSI: 58881b75aefSFelipe Balbi check_modem_status(up); 58981b75aefSFelipe Balbi break; 59081b75aefSFelipe Balbi case UART_IIR_THRI: 591bf63a086SFelipe Balbi transmit_chars(up, lsr); 59281b75aefSFelipe Balbi break; 59372256cbdSFelipe Balbi case UART_IIR_RX_TIMEOUT: 59472256cbdSFelipe Balbi /* FALLTHROUGH */ 59581b75aefSFelipe Balbi case UART_IIR_RDI: 59672256cbdSFelipe Balbi serial_omap_rdi(up, lsr); 59781b75aefSFelipe Balbi break; 59881b75aefSFelipe Balbi case UART_IIR_RLSI: 59972256cbdSFelipe Balbi serial_omap_rlsi(up, lsr); 60081b75aefSFelipe Balbi break; 60181b75aefSFelipe Balbi case UART_IIR_CTS_RTS_DSR: 60272256cbdSFelipe Balbi /* simply try again */ 60372256cbdSFelipe Balbi break; 60481b75aefSFelipe Balbi case UART_IIR_XOFF: 60581b75aefSFelipe Balbi /* FALLTHROUGH */ 60681b75aefSFelipe Balbi default: 60781b75aefSFelipe Balbi break; 608ab4382d2SGreg Kroah-Hartman } 609e60f9fd0SMartin Townsend } while (max_count--); 610ab4382d2SGreg Kroah-Hartman 6116c3a30c7SFelipe Balbi spin_unlock(&up->port.lock); 61272256cbdSFelipe Balbi 6132e124b4aSJiri Slaby tty_flip_buffer_push(&up->port.state->port); 61472256cbdSFelipe Balbi 615d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 616d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 617ab4382d2SGreg Kroah-Hartman up->port_activity = jiffies; 61881b75aefSFelipe Balbi 6197b013e44SGreg Kroah-Hartman return ret; 620ab4382d2SGreg Kroah-Hartman } 621ab4382d2SGreg Kroah-Hartman 622ab4382d2SGreg Kroah-Hartman static unsigned int serial_omap_tx_empty(struct uart_port *port) 623ab4382d2SGreg Kroah-Hartman { 624c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 625ab4382d2SGreg Kroah-Hartman unsigned long flags = 0; 626ab4382d2SGreg Kroah-Hartman unsigned int ret = 0; 627ab4382d2SGreg Kroah-Hartman 628d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 629ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_tx_empty+%d\n", up->port.line); 630ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags); 631ab4382d2SGreg Kroah-Hartman ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0; 632ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags); 633660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 634660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 635ab4382d2SGreg Kroah-Hartman return ret; 636ab4382d2SGreg Kroah-Hartman } 637ab4382d2SGreg Kroah-Hartman 638ab4382d2SGreg Kroah-Hartman static unsigned int serial_omap_get_mctrl(struct uart_port *port) 639ab4382d2SGreg Kroah-Hartman { 640c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 641514f31d1SShubhrajyoti D unsigned int status; 642ab4382d2SGreg Kroah-Hartman unsigned int ret = 0; 643ab4382d2SGreg Kroah-Hartman 644d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 645ab4382d2SGreg Kroah-Hartman status = check_modem_status(up); 646660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 647660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 648fcdca757SGovindraj.R 649ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_get_mctrl+%d\n", up->port.line); 650ab4382d2SGreg Kroah-Hartman 651ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DCD) 652ab4382d2SGreg Kroah-Hartman ret |= TIOCM_CAR; 653ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_RI) 654ab4382d2SGreg Kroah-Hartman ret |= TIOCM_RNG; 655ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DSR) 656ab4382d2SGreg Kroah-Hartman ret |= TIOCM_DSR; 657ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_CTS) 658ab4382d2SGreg Kroah-Hartman ret |= TIOCM_CTS; 659ab4382d2SGreg Kroah-Hartman return ret; 660ab4382d2SGreg Kroah-Hartman } 661ab4382d2SGreg Kroah-Hartman 662ab4382d2SGreg Kroah-Hartman static void serial_omap_set_mctrl(struct uart_port *port, unsigned int mctrl) 663ab4382d2SGreg Kroah-Hartman { 664c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 665348f9bb3SPeter Hurley unsigned char mcr = 0, old_mcr, lcr; 666ab4382d2SGreg Kroah-Hartman 667ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_set_mctrl+%d\n", up->port.line); 668ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_RTS) 669ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_RTS; 670ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_DTR) 671ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_DTR; 672ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_OUT1) 673ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_OUT1; 674ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_OUT2) 675ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_OUT2; 676ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_LOOP) 677ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_LOOP; 678ab4382d2SGreg Kroah-Hartman 679d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 6809363f8faSRussell King old_mcr = serial_in(up, UART_MCR); 6819363f8faSRussell King old_mcr &= ~(UART_MCR_LOOP | UART_MCR_OUT2 | UART_MCR_OUT1 | 6829363f8faSRussell King UART_MCR_DTR | UART_MCR_RTS); 6839363f8faSRussell King up->mcr = old_mcr | mcr; 684c538d20cSGovindraj.R serial_out(up, UART_MCR, up->mcr); 685348f9bb3SPeter Hurley 686348f9bb3SPeter Hurley /* Turn off autoRTS if RTS is lowered; restore autoRTS if RTS raised */ 687348f9bb3SPeter Hurley lcr = serial_in(up, UART_LCR); 688348f9bb3SPeter Hurley serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 689348f9bb3SPeter Hurley if ((mctrl & TIOCM_RTS) && (port->status & UPSTAT_AUTORTS)) 690348f9bb3SPeter Hurley up->efr |= UART_EFR_RTS; 691348f9bb3SPeter Hurley else 6922a71de2fSLukas Wunner up->efr &= ~UART_EFR_RTS; 693348f9bb3SPeter Hurley serial_out(up, UART_EFR, up->efr); 694348f9bb3SPeter Hurley serial_out(up, UART_LCR, lcr); 695348f9bb3SPeter Hurley 696660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 697660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 698ab4382d2SGreg Kroah-Hartman } 699ab4382d2SGreg Kroah-Hartman 700ab4382d2SGreg Kroah-Hartman static void serial_omap_break_ctl(struct uart_port *port, int break_state) 701ab4382d2SGreg Kroah-Hartman { 702c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 703ab4382d2SGreg Kroah-Hartman unsigned long flags = 0; 704ab4382d2SGreg Kroah-Hartman 705ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_break_ctl+%d\n", up->port.line); 706d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 707ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags); 708ab4382d2SGreg Kroah-Hartman if (break_state == -1) 709ab4382d2SGreg Kroah-Hartman up->lcr |= UART_LCR_SBC; 710ab4382d2SGreg Kroah-Hartman else 711ab4382d2SGreg Kroah-Hartman up->lcr &= ~UART_LCR_SBC; 712ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, up->lcr); 713ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags); 714660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 715660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 716ab4382d2SGreg Kroah-Hartman } 717ab4382d2SGreg Kroah-Hartman 718ab4382d2SGreg Kroah-Hartman static int serial_omap_startup(struct uart_port *port) 719ab4382d2SGreg Kroah-Hartman { 720c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 721ab4382d2SGreg Kroah-Hartman unsigned long flags = 0; 722ab4382d2SGreg Kroah-Hartman int retval; 723ab4382d2SGreg Kroah-Hartman 724ab4382d2SGreg Kroah-Hartman /* 725ab4382d2SGreg Kroah-Hartman * Allocate the IRQ 726ab4382d2SGreg Kroah-Hartman */ 727ab4382d2SGreg Kroah-Hartman retval = request_irq(up->port.irq, serial_omap_irq, up->port.irqflags, 728ab4382d2SGreg Kroah-Hartman up->name, up); 729ab4382d2SGreg Kroah-Hartman if (retval) 730ab4382d2SGreg Kroah-Hartman return retval; 731ab4382d2SGreg Kroah-Hartman 7322a0b965cSTony Lindgren /* Optional wake-up IRQ */ 7332a0b965cSTony Lindgren if (up->wakeirq) { 734ee83bd3bSTony Lindgren retval = dev_pm_set_dedicated_wake_irq(up->dev, up->wakeirq); 7352a0b965cSTony Lindgren if (retval) { 7362a0b965cSTony Lindgren free_irq(up->port.irq, up); 7372a0b965cSTony Lindgren return retval; 7382a0b965cSTony Lindgren } 7392a0b965cSTony Lindgren } 7402a0b965cSTony Lindgren 741ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_startup+%d\n", up->port.line); 742ab4382d2SGreg Kroah-Hartman 743d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 744ab4382d2SGreg Kroah-Hartman /* 745ab4382d2SGreg Kroah-Hartman * Clear the FIFO buffers and disable them. 746ab4382d2SGreg Kroah-Hartman * (they will be reenabled in set_termios()) 747ab4382d2SGreg Kroah-Hartman */ 748ab4382d2SGreg Kroah-Hartman serial_omap_clear_fifos(up); 749ab4382d2SGreg Kroah-Hartman 750ab4382d2SGreg Kroah-Hartman /* 751ab4382d2SGreg Kroah-Hartman * Clear the interrupt registers. 752ab4382d2SGreg Kroah-Hartman */ 753ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_LSR); 754ab4382d2SGreg Kroah-Hartman if (serial_in(up, UART_LSR) & UART_LSR_DR) 755ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_RX); 756ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_IIR); 757ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_MSR); 758ab4382d2SGreg Kroah-Hartman 759ab4382d2SGreg Kroah-Hartman /* 760ab4382d2SGreg Kroah-Hartman * Now, initialize the UART 761ab4382d2SGreg Kroah-Hartman */ 762ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_WLEN8); 763ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags); 764ab4382d2SGreg Kroah-Hartman /* 765ab4382d2SGreg Kroah-Hartman * Most PC uarts need OUT2 raised to enable interrupts. 766ab4382d2SGreg Kroah-Hartman */ 767ab4382d2SGreg Kroah-Hartman up->port.mctrl |= TIOCM_OUT2; 768ab4382d2SGreg Kroah-Hartman serial_omap_set_mctrl(&up->port, up->port.mctrl); 769ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags); 770ab4382d2SGreg Kroah-Hartman 771ab4382d2SGreg Kroah-Hartman up->msr_saved_flags = 0; 772ab4382d2SGreg Kroah-Hartman /* 773ab4382d2SGreg Kroah-Hartman * Finally, enable interrupts. Note: Modem status interrupts 774ab4382d2SGreg Kroah-Hartman * are set via set_termios(), which will be occurring imminently 775ab4382d2SGreg Kroah-Hartman * anyway, so we don't enable them here. 776ab4382d2SGreg Kroah-Hartman */ 777ab4382d2SGreg Kroah-Hartman up->ier = UART_IER_RLSI | UART_IER_RDI; 778ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 779ab4382d2SGreg Kroah-Hartman 78078841462SJarkko Nikula /* Enable module level wake up */ 781f64ffda6SGovindraj.R up->wer = OMAP_UART_WER_MOD_WKUP; 782f64ffda6SGovindraj.R if (up->features & OMAP_UART_WER_HAS_TX_WAKEUP) 783f64ffda6SGovindraj.R up->wer |= OMAP_UART_TX_WAKEUP_EN; 784f64ffda6SGovindraj.R 785f64ffda6SGovindraj.R serial_out(up, UART_OMAP_WER, up->wer); 78678841462SJarkko Nikula 787d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 788d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 789ab4382d2SGreg Kroah-Hartman up->port_activity = jiffies; 790ab4382d2SGreg Kroah-Hartman return 0; 791ab4382d2SGreg Kroah-Hartman } 792ab4382d2SGreg Kroah-Hartman 793ab4382d2SGreg Kroah-Hartman static void serial_omap_shutdown(struct uart_port *port) 794ab4382d2SGreg Kroah-Hartman { 795c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 796ab4382d2SGreg Kroah-Hartman unsigned long flags = 0; 797ab4382d2SGreg Kroah-Hartman 798ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_shutdown+%d\n", up->port.line); 799fcdca757SGovindraj.R 800d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 801ab4382d2SGreg Kroah-Hartman /* 802ab4382d2SGreg Kroah-Hartman * Disable interrupts from this port 803ab4382d2SGreg Kroah-Hartman */ 804ab4382d2SGreg Kroah-Hartman up->ier = 0; 805ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, 0); 806ab4382d2SGreg Kroah-Hartman 807ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags); 808ab4382d2SGreg Kroah-Hartman up->port.mctrl &= ~TIOCM_OUT2; 809ab4382d2SGreg Kroah-Hartman serial_omap_set_mctrl(&up->port, up->port.mctrl); 810ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags); 811ab4382d2SGreg Kroah-Hartman 812ab4382d2SGreg Kroah-Hartman /* 813ab4382d2SGreg Kroah-Hartman * Disable break condition and FIFOs 814ab4382d2SGreg Kroah-Hartman */ 815ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC); 816ab4382d2SGreg Kroah-Hartman serial_omap_clear_fifos(up); 817ab4382d2SGreg Kroah-Hartman 818ab4382d2SGreg Kroah-Hartman /* 819ab4382d2SGreg Kroah-Hartman * Read data port to reset things, and then free the irq 820ab4382d2SGreg Kroah-Hartman */ 821ab4382d2SGreg Kroah-Hartman if (serial_in(up, UART_LSR) & UART_LSR_DR) 822ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_RX); 823fcdca757SGovindraj.R 824660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 825660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 826ab4382d2SGreg Kroah-Hartman free_irq(up->port.irq, up); 827ee83bd3bSTony Lindgren dev_pm_clear_wake_irq(up->dev); 828ab4382d2SGreg Kroah-Hartman } 829ab4382d2SGreg Kroah-Hartman 8302fd14964SGovindraj.R static void serial_omap_uart_qos_work(struct work_struct *work) 8312fd14964SGovindraj.R { 8322fd14964SGovindraj.R struct uart_omap_port *up = container_of(work, struct uart_omap_port, 8332fd14964SGovindraj.R qos_work); 8342fd14964SGovindraj.R 8352fd14964SGovindraj.R pm_qos_update_request(&up->pm_qos_request, up->latency); 8362fd14964SGovindraj.R } 8372fd14964SGovindraj.R 838ab4382d2SGreg Kroah-Hartman static void 839ab4382d2SGreg Kroah-Hartman serial_omap_set_termios(struct uart_port *port, struct ktermios *termios, 840ab4382d2SGreg Kroah-Hartman struct ktermios *old) 841ab4382d2SGreg Kroah-Hartman { 842c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 843ab4382d2SGreg Kroah-Hartman unsigned char cval = 0; 844ab4382d2SGreg Kroah-Hartman unsigned long flags = 0; 845ab4382d2SGreg Kroah-Hartman unsigned int baud, quot; 846ab4382d2SGreg Kroah-Hartman 847ab4382d2SGreg Kroah-Hartman switch (termios->c_cflag & CSIZE) { 848ab4382d2SGreg Kroah-Hartman case CS5: 849ab4382d2SGreg Kroah-Hartman cval = UART_LCR_WLEN5; 850ab4382d2SGreg Kroah-Hartman break; 851ab4382d2SGreg Kroah-Hartman case CS6: 852ab4382d2SGreg Kroah-Hartman cval = UART_LCR_WLEN6; 853ab4382d2SGreg Kroah-Hartman break; 854ab4382d2SGreg Kroah-Hartman case CS7: 855ab4382d2SGreg Kroah-Hartman cval = UART_LCR_WLEN7; 856ab4382d2SGreg Kroah-Hartman break; 857ab4382d2SGreg Kroah-Hartman default: 858ab4382d2SGreg Kroah-Hartman case CS8: 859ab4382d2SGreg Kroah-Hartman cval = UART_LCR_WLEN8; 860ab4382d2SGreg Kroah-Hartman break; 861ab4382d2SGreg Kroah-Hartman } 862ab4382d2SGreg Kroah-Hartman 863ab4382d2SGreg Kroah-Hartman if (termios->c_cflag & CSTOPB) 864ab4382d2SGreg Kroah-Hartman cval |= UART_LCR_STOP; 865ab4382d2SGreg Kroah-Hartman if (termios->c_cflag & PARENB) 866ab4382d2SGreg Kroah-Hartman cval |= UART_LCR_PARITY; 867ab4382d2SGreg Kroah-Hartman if (!(termios->c_cflag & PARODD)) 868ab4382d2SGreg Kroah-Hartman cval |= UART_LCR_EPAR; 869fdbc7353SEnric Balletbo i Serra if (termios->c_cflag & CMSPAR) 870fdbc7353SEnric Balletbo i Serra cval |= UART_LCR_SPAR; 871ab4382d2SGreg Kroah-Hartman 872ab4382d2SGreg Kroah-Hartman /* 873ab4382d2SGreg Kroah-Hartman * Ask the core to calculate the divisor for us. 874ab4382d2SGreg Kroah-Hartman */ 875ab4382d2SGreg Kroah-Hartman 876ab4382d2SGreg Kroah-Hartman baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/13); 877ab4382d2SGreg Kroah-Hartman quot = serial_omap_get_divisor(port, baud); 878ab4382d2SGreg Kroah-Hartman 8792fd14964SGovindraj.R /* calculate wakeup latency constraint */ 88019723452SPaul Walmsley up->calc_latency = (USEC_PER_SEC * up->port.fifosize) / (baud / 8); 8812fd14964SGovindraj.R up->latency = up->calc_latency; 8822fd14964SGovindraj.R schedule_work(&up->qos_work); 8832fd14964SGovindraj.R 884c538d20cSGovindraj.R up->dll = quot & 0xff; 885c538d20cSGovindraj.R up->dlh = quot >> 8; 886c538d20cSGovindraj.R up->mdr1 = UART_OMAP_MDR1_DISABLE; 887c538d20cSGovindraj.R 888ab4382d2SGreg Kroah-Hartman up->fcr = UART_FCR_R_TRIG_01 | UART_FCR_T_TRIG_01 | 889ab4382d2SGreg Kroah-Hartman UART_FCR_ENABLE_FIFO; 890ab4382d2SGreg Kroah-Hartman 891ab4382d2SGreg Kroah-Hartman /* 892ab4382d2SGreg Kroah-Hartman * Ok, we're now changing the port state. Do it with 893ab4382d2SGreg Kroah-Hartman * interrupts disabled. 894ab4382d2SGreg Kroah-Hartman */ 895d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 896ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags); 897ab4382d2SGreg Kroah-Hartman 898ab4382d2SGreg Kroah-Hartman /* 899ab4382d2SGreg Kroah-Hartman * Update the per-port timeout. 900ab4382d2SGreg Kroah-Hartman */ 901ab4382d2SGreg Kroah-Hartman uart_update_timeout(port, termios->c_cflag, baud); 902ab4382d2SGreg Kroah-Hartman 903ab4382d2SGreg Kroah-Hartman up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; 904ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & INPCK) 905ab4382d2SGreg Kroah-Hartman up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE; 906ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & (BRKINT | PARMRK)) 907ab4382d2SGreg Kroah-Hartman up->port.read_status_mask |= UART_LSR_BI; 908ab4382d2SGreg Kroah-Hartman 909ab4382d2SGreg Kroah-Hartman /* 910ab4382d2SGreg Kroah-Hartman * Characters to ignore 911ab4382d2SGreg Kroah-Hartman */ 912ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask = 0; 913ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IGNPAR) 914ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE; 915ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IGNBRK) { 916ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask |= UART_LSR_BI; 917ab4382d2SGreg Kroah-Hartman /* 918ab4382d2SGreg Kroah-Hartman * If we're ignoring parity and break indicators, 919ab4382d2SGreg Kroah-Hartman * ignore overruns too (for real raw support). 920ab4382d2SGreg Kroah-Hartman */ 921ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IGNPAR) 922ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask |= UART_LSR_OE; 923ab4382d2SGreg Kroah-Hartman } 924ab4382d2SGreg Kroah-Hartman 925ab4382d2SGreg Kroah-Hartman /* 926ab4382d2SGreg Kroah-Hartman * ignore all characters if CREAD is not set 927ab4382d2SGreg Kroah-Hartman */ 928ab4382d2SGreg Kroah-Hartman if ((termios->c_cflag & CREAD) == 0) 929ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask |= UART_LSR_DR; 930ab4382d2SGreg Kroah-Hartman 931ab4382d2SGreg Kroah-Hartman /* 932ab4382d2SGreg Kroah-Hartman * Modem status interrupts 933ab4382d2SGreg Kroah-Hartman */ 934ab4382d2SGreg Kroah-Hartman up->ier &= ~UART_IER_MSI; 935ab4382d2SGreg Kroah-Hartman if (UART_ENABLE_MS(&up->port, termios->c_cflag)) 936ab4382d2SGreg Kroah-Hartman up->ier |= UART_IER_MSI; 937ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 938ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, cval); /* reset DLAB */ 939c538d20cSGovindraj.R up->lcr = cval; 9401776fd05SAlexey Pelykh up->scr = 0; 941ab4382d2SGreg Kroah-Hartman 942ab4382d2SGreg Kroah-Hartman /* FIFOs and DMA Settings */ 943ab4382d2SGreg Kroah-Hartman 944ab4382d2SGreg Kroah-Hartman /* FCR can be changed only when the 945ab4382d2SGreg Kroah-Hartman * baud clock is not running 946ab4382d2SGreg Kroah-Hartman * DLL_REG and DLH_REG set to 0. 947ab4382d2SGreg Kroah-Hartman */ 948ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 949ab4382d2SGreg Kroah-Hartman serial_out(up, UART_DLL, 0); 950ab4382d2SGreg Kroah-Hartman serial_out(up, UART_DLM, 0); 951ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0); 952ab4382d2SGreg Kroah-Hartman 953ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 954ab4382d2SGreg Kroah-Hartman 95508bd4903SRussell King up->efr = serial_in(up, UART_EFR) & ~UART_EFR_ECB; 956d864c03bSRussell King up->efr &= ~UART_EFR_SCD; 957ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); 958ab4382d2SGreg Kroah-Hartman 959ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 96008bd4903SRussell King up->mcr = serial_in(up, UART_MCR) & ~UART_MCR_TCRTLR; 961ab4382d2SGreg Kroah-Hartman serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR); 962ab4382d2SGreg Kroah-Hartman /* FIFO ENABLE, DMA MODE */ 9630ba5f668SPaul Walmsley 9641f663966SAlexey Pelykh up->scr |= OMAP_UART_SCR_RX_TRIG_GRANU1_MASK; 9651f663966SAlexey Pelykh /* 9661f663966SAlexey Pelykh * NOTE: Setting OMAP_UART_SCR_RX_TRIG_GRANU1_MASK 9671f663966SAlexey Pelykh * sets Enables the granularity of 1 for TRIGGER RX 9681f663966SAlexey Pelykh * level. Along with setting RX FIFO trigger level 9691f663966SAlexey Pelykh * to 1 (as noted below, 16 characters) and TLR[3:0] 9701f663966SAlexey Pelykh * to zero this will result RX FIFO threshold level 9711f663966SAlexey Pelykh * to 1 character, instead of 16 as noted in comment 9721f663966SAlexey Pelykh * below. 9731f663966SAlexey Pelykh */ 9741f663966SAlexey Pelykh 9756721ab7fSFelipe Balbi /* Set receive FIFO threshold to 16 characters and 976018e7448SPhilippe Proulx * transmit FIFO threshold to 32 spaces 9776721ab7fSFelipe Balbi */ 9780ba5f668SPaul Walmsley up->fcr &= ~OMAP_UART_FCR_RX_FIFO_TRIG_MASK; 9796721ab7fSFelipe Balbi up->fcr &= ~OMAP_UART_FCR_TX_FIFO_TRIG_MASK; 9806721ab7fSFelipe Balbi up->fcr |= UART_FCR6_R_TRIGGER_16 | UART_FCR6_T_TRIGGER_24 | 9816721ab7fSFelipe Balbi UART_FCR_ENABLE_FIFO; 9828a74e9ffSGreg Kroah-Hartman 9830ba5f668SPaul Walmsley serial_out(up, UART_FCR, up->fcr); 9840ba5f668SPaul Walmsley serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 9850ba5f668SPaul Walmsley 986c538d20cSGovindraj.R serial_out(up, UART_OMAP_SCR, up->scr); 987c538d20cSGovindraj.R 98808bd4903SRussell King /* Reset UART_MCR_TCRTLR: this must be done with the EFR_ECB bit set */ 989ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 990ab4382d2SGreg Kroah-Hartman serial_out(up, UART_MCR, up->mcr); 99108bd4903SRussell King serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 99208bd4903SRussell King serial_out(up, UART_EFR, up->efr); 99308bd4903SRussell King serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 994ab4382d2SGreg Kroah-Hartman 995ab4382d2SGreg Kroah-Hartman /* Protocol, Baud Rate, and Interrupt Settings */ 996ab4382d2SGreg Kroah-Hartman 99794734749SGovindraj.R if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) 99894734749SGovindraj.R serial_omap_mdr1_errataset(up, up->mdr1); 99994734749SGovindraj.R else 1000c538d20cSGovindraj.R serial_out(up, UART_OMAP_MDR1, up->mdr1); 100194734749SGovindraj.R 1002ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 1003ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); 1004ab4382d2SGreg Kroah-Hartman 1005ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0); 1006ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, 0); 1007ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 1008ab4382d2SGreg Kroah-Hartman 1009c538d20cSGovindraj.R serial_out(up, UART_DLL, up->dll); /* LS of divisor */ 1010c538d20cSGovindraj.R serial_out(up, UART_DLM, up->dlh); /* MS of divisor */ 1011ab4382d2SGreg Kroah-Hartman 1012ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0); 1013ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 1014ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 1015ab4382d2SGreg Kroah-Hartman 1016ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, up->efr); 1017ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, cval); 1018ab4382d2SGreg Kroah-Hartman 10195fe21236SAlexey Pelykh if (!serial_omap_baud_is_mode16(port, baud)) 1020c538d20cSGovindraj.R up->mdr1 = UART_OMAP_MDR1_13X_MODE; 1021ab4382d2SGreg Kroah-Hartman else 1022c538d20cSGovindraj.R up->mdr1 = UART_OMAP_MDR1_16X_MODE; 1023c538d20cSGovindraj.R 102494734749SGovindraj.R if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) 102594734749SGovindraj.R serial_omap_mdr1_errataset(up, up->mdr1); 102694734749SGovindraj.R else 1027c538d20cSGovindraj.R serial_out(up, UART_OMAP_MDR1, up->mdr1); 1028ab4382d2SGreg Kroah-Hartman 1029c533e51bSRussell King /* Configure flow control */ 103008bd4903SRussell King serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 1031ab4382d2SGreg Kroah-Hartman 1032c533e51bSRussell King /* XON1/XOFF1 accessible mode B, TCRTLR=0, ECB=0 */ 1033c533e51bSRussell King serial_out(up, UART_XON1, termios->c_cc[VSTART]); 1034c533e51bSRussell King serial_out(up, UART_XOFF1, termios->c_cc[VSTOP]); 1035c533e51bSRussell King 1036c533e51bSRussell King /* Enable access to TCR/TLR */ 103708bd4903SRussell King serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); 1038ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 1039ab4382d2SGreg Kroah-Hartman serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR); 1040ab4382d2SGreg Kroah-Hartman 1041ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TI752_TCR, OMAP_UART_TCR_TRIG); 104208bd4903SRussell King 1043391f93f2SPeter Hurley up->port.status &= ~(UPSTAT_AUTOCTS | UPSTAT_AUTORTS | UPSTAT_AUTOXOFF); 1044391f93f2SPeter Hurley 1045c7d059caSRussell King if (termios->c_cflag & CRTSCTS && up->port.flags & UPF_HARD_FLOW) { 1046348f9bb3SPeter Hurley /* Enable AUTOCTS (autoRTS is enabled when RTS is raised) */ 1047391f93f2SPeter Hurley up->port.status |= UPSTAT_AUTOCTS | UPSTAT_AUTORTS; 1048348f9bb3SPeter Hurley up->efr |= UART_EFR_CTS; 10490d5b1663SRussell King } else { 10500d5b1663SRussell King /* Disable AUTORTS and AUTOCTS */ 10510d5b1663SRussell King up->efr &= ~(UART_EFR_CTS | UART_EFR_RTS); 1052ab4382d2SGreg Kroah-Hartman } 1053ab4382d2SGreg Kroah-Hartman 105401d70bb3SRussell King if (up->port.flags & UPF_SOFT_FLOW) { 105501d70bb3SRussell King /* clear SW control mode bits */ 105601d70bb3SRussell King up->efr &= OMAP_UART_SW_CLR; 105701d70bb3SRussell King 105801d70bb3SRussell King /* 105901d70bb3SRussell King * IXON Flag: 106001d70bb3SRussell King * Enable XON/XOFF flow control on input. 106101d70bb3SRussell King * Receiver compares XON1, XOFF1. 106201d70bb3SRussell King */ 10633af08bd7SRussell King if (termios->c_iflag & IXON) 106401d70bb3SRussell King up->efr |= OMAP_UART_SW_RX; 106501d70bb3SRussell King 106601d70bb3SRussell King /* 10673af08bd7SRussell King * IXOFF Flag: 10683af08bd7SRussell King * Enable XON/XOFF flow control on output. 10693af08bd7SRussell King * Transmit XON1, XOFF1 10703af08bd7SRussell King */ 1071391f93f2SPeter Hurley if (termios->c_iflag & IXOFF) { 1072391f93f2SPeter Hurley up->port.status |= UPSTAT_AUTOXOFF; 10733af08bd7SRussell King up->efr |= OMAP_UART_SW_TX; 1074391f93f2SPeter Hurley } 10753af08bd7SRussell King 10763af08bd7SRussell King /* 107701d70bb3SRussell King * IXANY Flag: 107801d70bb3SRussell King * Enable any character to restart output. 107901d70bb3SRussell King * Operation resumes after receiving any 108001d70bb3SRussell King * character after recognition of the XOFF character 108101d70bb3SRussell King */ 108201d70bb3SRussell King if (termios->c_iflag & IXANY) 108301d70bb3SRussell King up->mcr |= UART_MCR_XONANY; 108401d70bb3SRussell King else 108501d70bb3SRussell King up->mcr &= ~UART_MCR_XONANY; 108618f360f8SRussell King } 1087c7d059caSRussell King serial_out(up, UART_MCR, up->mcr); 108801d70bb3SRussell King serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 108901d70bb3SRussell King serial_out(up, UART_EFR, up->efr); 109001d70bb3SRussell King serial_out(up, UART_LCR, up->lcr); 1091ab4382d2SGreg Kroah-Hartman 1092ab4382d2SGreg Kroah-Hartman serial_omap_set_mctrl(&up->port, up->port.mctrl); 1093ab4382d2SGreg Kroah-Hartman 1094ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags); 1095660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 1096660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 1097ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_set_termios+%d\n", up->port.line); 1098ab4382d2SGreg Kroah-Hartman } 1099ab4382d2SGreg Kroah-Hartman 1100ab4382d2SGreg Kroah-Hartman static void 1101ab4382d2SGreg Kroah-Hartman serial_omap_pm(struct uart_port *port, unsigned int state, 1102ab4382d2SGreg Kroah-Hartman unsigned int oldstate) 1103ab4382d2SGreg Kroah-Hartman { 1104c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 1105ab4382d2SGreg Kroah-Hartman unsigned char efr; 1106ab4382d2SGreg Kroah-Hartman 1107ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_pm+%d\n", up->port.line); 1108fcdca757SGovindraj.R 1109d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 1110ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 1111ab4382d2SGreg Kroah-Hartman efr = serial_in(up, UART_EFR); 1112ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, efr | UART_EFR_ECB); 1113ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0); 1114ab4382d2SGreg Kroah-Hartman 1115ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, (state != 0) ? UART_IERX_SLEEP : 0); 1116ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 1117ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, efr); 1118ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0); 1119fcdca757SGovindraj.R 1120660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 1121660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 1122ab4382d2SGreg Kroah-Hartman } 1123ab4382d2SGreg Kroah-Hartman 1124ab4382d2SGreg Kroah-Hartman static void serial_omap_release_port(struct uart_port *port) 1125ab4382d2SGreg Kroah-Hartman { 1126ab4382d2SGreg Kroah-Hartman dev_dbg(port->dev, "serial_omap_release_port+\n"); 1127ab4382d2SGreg Kroah-Hartman } 1128ab4382d2SGreg Kroah-Hartman 1129ab4382d2SGreg Kroah-Hartman static int serial_omap_request_port(struct uart_port *port) 1130ab4382d2SGreg Kroah-Hartman { 1131ab4382d2SGreg Kroah-Hartman dev_dbg(port->dev, "serial_omap_request_port+\n"); 1132ab4382d2SGreg Kroah-Hartman return 0; 1133ab4382d2SGreg Kroah-Hartman } 1134ab4382d2SGreg Kroah-Hartman 1135ab4382d2SGreg Kroah-Hartman static void serial_omap_config_port(struct uart_port *port, int flags) 1136ab4382d2SGreg Kroah-Hartman { 1137c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 1138ab4382d2SGreg Kroah-Hartman 1139ab4382d2SGreg Kroah-Hartman dev_dbg(up->port.dev, "serial_omap_config_port+%d\n", 1140ba77433dSRajendra Nayak up->port.line); 1141ab4382d2SGreg Kroah-Hartman up->port.type = PORT_OMAP; 11423af08bd7SRussell King up->port.flags |= UPF_SOFT_FLOW | UPF_HARD_FLOW; 1143ab4382d2SGreg Kroah-Hartman } 1144ab4382d2SGreg Kroah-Hartman 1145ab4382d2SGreg Kroah-Hartman static int 1146ab4382d2SGreg Kroah-Hartman serial_omap_verify_port(struct uart_port *port, struct serial_struct *ser) 1147ab4382d2SGreg Kroah-Hartman { 1148ab4382d2SGreg Kroah-Hartman /* we don't want the core code to modify any port params */ 1149ab4382d2SGreg Kroah-Hartman dev_dbg(port->dev, "serial_omap_verify_port+\n"); 1150ab4382d2SGreg Kroah-Hartman return -EINVAL; 1151ab4382d2SGreg Kroah-Hartman } 1152ab4382d2SGreg Kroah-Hartman 1153ab4382d2SGreg Kroah-Hartman static const char * 1154ab4382d2SGreg Kroah-Hartman serial_omap_type(struct uart_port *port) 1155ab4382d2SGreg Kroah-Hartman { 1156c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 1157ab4382d2SGreg Kroah-Hartman 1158ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_type+%d\n", up->port.line); 1159ab4382d2SGreg Kroah-Hartman return up->name; 1160ab4382d2SGreg Kroah-Hartman } 1161ab4382d2SGreg Kroah-Hartman 1162ab4382d2SGreg Kroah-Hartman #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE) 1163ab4382d2SGreg Kroah-Hartman 1164b4a512b8SArnd Bergmann static void __maybe_unused wait_for_xmitr(struct uart_omap_port *up) 1165ab4382d2SGreg Kroah-Hartman { 1166ab4382d2SGreg Kroah-Hartman unsigned int status, tmout = 10000; 1167ab4382d2SGreg Kroah-Hartman 1168ab4382d2SGreg Kroah-Hartman /* Wait up to 10ms for the character(s) to be sent. */ 1169ab4382d2SGreg Kroah-Hartman do { 1170ab4382d2SGreg Kroah-Hartman status = serial_in(up, UART_LSR); 1171ab4382d2SGreg Kroah-Hartman 1172ab4382d2SGreg Kroah-Hartman if (status & UART_LSR_BI) 1173ab4382d2SGreg Kroah-Hartman up->lsr_break_flag = UART_LSR_BI; 1174ab4382d2SGreg Kroah-Hartman 1175ab4382d2SGreg Kroah-Hartman if (--tmout == 0) 1176ab4382d2SGreg Kroah-Hartman break; 1177ab4382d2SGreg Kroah-Hartman udelay(1); 1178ab4382d2SGreg Kroah-Hartman } while ((status & BOTH_EMPTY) != BOTH_EMPTY); 1179ab4382d2SGreg Kroah-Hartman 1180ab4382d2SGreg Kroah-Hartman /* Wait up to 1s for flow control if necessary */ 1181ab4382d2SGreg Kroah-Hartman if (up->port.flags & UPF_CONS_FLOW) { 1182ab4382d2SGreg Kroah-Hartman tmout = 1000000; 1183ab4382d2SGreg Kroah-Hartman for (tmout = 1000000; tmout; tmout--) { 1184ab4382d2SGreg Kroah-Hartman unsigned int msr = serial_in(up, UART_MSR); 1185ab4382d2SGreg Kroah-Hartman 1186ab4382d2SGreg Kroah-Hartman up->msr_saved_flags |= msr & MSR_SAVE_FLAGS; 1187ab4382d2SGreg Kroah-Hartman if (msr & UART_MSR_CTS) 1188ab4382d2SGreg Kroah-Hartman break; 1189ab4382d2SGreg Kroah-Hartman 1190ab4382d2SGreg Kroah-Hartman udelay(1); 1191ab4382d2SGreg Kroah-Hartman } 1192ab4382d2SGreg Kroah-Hartman } 1193ab4382d2SGreg Kroah-Hartman } 1194ab4382d2SGreg Kroah-Hartman 1195ab4382d2SGreg Kroah-Hartman #ifdef CONFIG_CONSOLE_POLL 1196ab4382d2SGreg Kroah-Hartman 1197ab4382d2SGreg Kroah-Hartman static void serial_omap_poll_put_char(struct uart_port *port, unsigned char ch) 1198ab4382d2SGreg Kroah-Hartman { 1199c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 1200fcdca757SGovindraj.R 1201d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 1202ab4382d2SGreg Kroah-Hartman wait_for_xmitr(up); 1203ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TX, ch); 1204660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 1205660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 1206ab4382d2SGreg Kroah-Hartman } 1207ab4382d2SGreg Kroah-Hartman 1208ab4382d2SGreg Kroah-Hartman static int serial_omap_poll_get_char(struct uart_port *port) 1209ab4382d2SGreg Kroah-Hartman { 1210c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 1211fcdca757SGovindraj.R unsigned int status; 1212ab4382d2SGreg Kroah-Hartman 1213d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 1214fcdca757SGovindraj.R status = serial_in(up, UART_LSR); 1215a6b19c33SFelipe Balbi if (!(status & UART_LSR_DR)) { 1216a6b19c33SFelipe Balbi status = NO_POLL_CHAR; 1217a6b19c33SFelipe Balbi goto out; 1218a6b19c33SFelipe Balbi } 1219ab4382d2SGreg Kroah-Hartman 1220fcdca757SGovindraj.R status = serial_in(up, UART_RX); 1221a6b19c33SFelipe Balbi 1222a6b19c33SFelipe Balbi out: 1223660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 1224660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 1225a6b19c33SFelipe Balbi 1226fcdca757SGovindraj.R return status; 1227ab4382d2SGreg Kroah-Hartman } 1228ab4382d2SGreg Kroah-Hartman 1229ab4382d2SGreg Kroah-Hartman #endif /* CONFIG_CONSOLE_POLL */ 1230ab4382d2SGreg Kroah-Hartman 1231ab4382d2SGreg Kroah-Hartman #ifdef CONFIG_SERIAL_OMAP_CONSOLE 1232ab4382d2SGreg Kroah-Hartman 123328ec9570SLokesh Vutla #ifdef CONFIG_SERIAL_EARLYCON 1234b38dd0e8SJeffy Chen static unsigned int omap_serial_early_in(struct uart_port *port, int offset) 123528ec9570SLokesh Vutla { 123628ec9570SLokesh Vutla offset <<= port->regshift; 123728ec9570SLokesh Vutla return readw(port->membase + offset); 123828ec9570SLokesh Vutla } 123928ec9570SLokesh Vutla 1240b38dd0e8SJeffy Chen static void omap_serial_early_out(struct uart_port *port, int offset, 124128ec9570SLokesh Vutla int value) 124228ec9570SLokesh Vutla { 124328ec9570SLokesh Vutla offset <<= port->regshift; 124428ec9570SLokesh Vutla writew(value, port->membase + offset); 124528ec9570SLokesh Vutla } 124628ec9570SLokesh Vutla 1247b38dd0e8SJeffy Chen static void omap_serial_early_putc(struct uart_port *port, int c) 124828ec9570SLokesh Vutla { 124928ec9570SLokesh Vutla unsigned int status; 125028ec9570SLokesh Vutla 125128ec9570SLokesh Vutla for (;;) { 125228ec9570SLokesh Vutla status = omap_serial_early_in(port, UART_LSR); 125328ec9570SLokesh Vutla if ((status & BOTH_EMPTY) == BOTH_EMPTY) 125428ec9570SLokesh Vutla break; 125528ec9570SLokesh Vutla cpu_relax(); 125628ec9570SLokesh Vutla } 125728ec9570SLokesh Vutla omap_serial_early_out(port, UART_TX, c); 125828ec9570SLokesh Vutla } 125928ec9570SLokesh Vutla 1260b38dd0e8SJeffy Chen static void early_omap_serial_write(struct console *console, const char *s, 1261b38dd0e8SJeffy Chen unsigned int count) 126228ec9570SLokesh Vutla { 126328ec9570SLokesh Vutla struct earlycon_device *device = console->data; 126428ec9570SLokesh Vutla struct uart_port *port = &device->port; 126528ec9570SLokesh Vutla 126628ec9570SLokesh Vutla uart_console_write(port, s, count, omap_serial_early_putc); 126728ec9570SLokesh Vutla } 126828ec9570SLokesh Vutla 126928ec9570SLokesh Vutla static int __init early_omap_serial_setup(struct earlycon_device *device, 127028ec9570SLokesh Vutla const char *options) 127128ec9570SLokesh Vutla { 127228ec9570SLokesh Vutla struct uart_port *port = &device->port; 127328ec9570SLokesh Vutla 127428ec9570SLokesh Vutla if (!(device->port.membase || device->port.iobase)) 127528ec9570SLokesh Vutla return -ENODEV; 127628ec9570SLokesh Vutla 127728ec9570SLokesh Vutla port->regshift = 2; 127828ec9570SLokesh Vutla device->con->write = early_omap_serial_write; 127928ec9570SLokesh Vutla return 0; 128028ec9570SLokesh Vutla } 128128ec9570SLokesh Vutla 128228ec9570SLokesh Vutla OF_EARLYCON_DECLARE(omapserial, "ti,omap2-uart", early_omap_serial_setup); 128328ec9570SLokesh Vutla OF_EARLYCON_DECLARE(omapserial, "ti,omap3-uart", early_omap_serial_setup); 128428ec9570SLokesh Vutla OF_EARLYCON_DECLARE(omapserial, "ti,omap4-uart", early_omap_serial_setup); 128528ec9570SLokesh Vutla #endif /* CONFIG_SERIAL_EARLYCON */ 128628ec9570SLokesh Vutla 128740477d0eSShubhrajyoti D static struct uart_omap_port *serial_omap_console_ports[OMAP_MAX_HSUART_PORTS]; 1288ab4382d2SGreg Kroah-Hartman 1289ab4382d2SGreg Kroah-Hartman static struct uart_driver serial_omap_reg; 1290ab4382d2SGreg Kroah-Hartman 1291ab4382d2SGreg Kroah-Hartman static void serial_omap_console_putchar(struct uart_port *port, int ch) 1292ab4382d2SGreg Kroah-Hartman { 1293c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 1294ab4382d2SGreg Kroah-Hartman 1295ab4382d2SGreg Kroah-Hartman wait_for_xmitr(up); 1296ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TX, ch); 1297ab4382d2SGreg Kroah-Hartman } 1298ab4382d2SGreg Kroah-Hartman 1299ab4382d2SGreg Kroah-Hartman static void 1300ab4382d2SGreg Kroah-Hartman serial_omap_console_write(struct console *co, const char *s, 1301ab4382d2SGreg Kroah-Hartman unsigned int count) 1302ab4382d2SGreg Kroah-Hartman { 1303ab4382d2SGreg Kroah-Hartman struct uart_omap_port *up = serial_omap_console_ports[co->index]; 1304ab4382d2SGreg Kroah-Hartman unsigned long flags; 1305ab4382d2SGreg Kroah-Hartman unsigned int ier; 1306ab4382d2SGreg Kroah-Hartman int locked = 1; 1307ab4382d2SGreg Kroah-Hartman 1308d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 1309fcdca757SGovindraj.R 1310ab4382d2SGreg Kroah-Hartman local_irq_save(flags); 1311ab4382d2SGreg Kroah-Hartman if (up->port.sysrq) 1312ab4382d2SGreg Kroah-Hartman locked = 0; 1313ab4382d2SGreg Kroah-Hartman else if (oops_in_progress) 1314ab4382d2SGreg Kroah-Hartman locked = spin_trylock(&up->port.lock); 1315ab4382d2SGreg Kroah-Hartman else 1316ab4382d2SGreg Kroah-Hartman spin_lock(&up->port.lock); 1317ab4382d2SGreg Kroah-Hartman 1318ab4382d2SGreg Kroah-Hartman /* 1319ab4382d2SGreg Kroah-Hartman * First save the IER then disable the interrupts 1320ab4382d2SGreg Kroah-Hartman */ 1321ab4382d2SGreg Kroah-Hartman ier = serial_in(up, UART_IER); 1322ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, 0); 1323ab4382d2SGreg Kroah-Hartman 1324ab4382d2SGreg Kroah-Hartman uart_console_write(&up->port, s, count, serial_omap_console_putchar); 1325ab4382d2SGreg Kroah-Hartman 1326ab4382d2SGreg Kroah-Hartman /* 1327ab4382d2SGreg Kroah-Hartman * Finally, wait for transmitter to become empty 1328ab4382d2SGreg Kroah-Hartman * and restore the IER 1329ab4382d2SGreg Kroah-Hartman */ 1330ab4382d2SGreg Kroah-Hartman wait_for_xmitr(up); 1331ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, ier); 1332ab4382d2SGreg Kroah-Hartman /* 1333ab4382d2SGreg Kroah-Hartman * The receive handling will happen properly because the 1334ab4382d2SGreg Kroah-Hartman * receive ready bit will still be set; it is not cleared 1335ab4382d2SGreg Kroah-Hartman * on read. However, modem control will not, we must 1336ab4382d2SGreg Kroah-Hartman * call it if we have saved something in the saved flags 1337ab4382d2SGreg Kroah-Hartman * while processing with interrupts off. 1338ab4382d2SGreg Kroah-Hartman */ 1339ab4382d2SGreg Kroah-Hartman if (up->msr_saved_flags) 1340ab4382d2SGreg Kroah-Hartman check_modem_status(up); 1341ab4382d2SGreg Kroah-Hartman 1342d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 1343d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 1344ab4382d2SGreg Kroah-Hartman if (locked) 1345ab4382d2SGreg Kroah-Hartman spin_unlock(&up->port.lock); 1346ab4382d2SGreg Kroah-Hartman local_irq_restore(flags); 1347ab4382d2SGreg Kroah-Hartman } 1348ab4382d2SGreg Kroah-Hartman 1349ab4382d2SGreg Kroah-Hartman static int __init 1350ab4382d2SGreg Kroah-Hartman serial_omap_console_setup(struct console *co, char *options) 1351ab4382d2SGreg Kroah-Hartman { 1352ab4382d2SGreg Kroah-Hartman struct uart_omap_port *up; 1353ab4382d2SGreg Kroah-Hartman int baud = 115200; 1354ab4382d2SGreg Kroah-Hartman int bits = 8; 1355ab4382d2SGreg Kroah-Hartman int parity = 'n'; 1356ab4382d2SGreg Kroah-Hartman int flow = 'n'; 1357ab4382d2SGreg Kroah-Hartman 1358ab4382d2SGreg Kroah-Hartman if (serial_omap_console_ports[co->index] == NULL) 1359ab4382d2SGreg Kroah-Hartman return -ENODEV; 1360ab4382d2SGreg Kroah-Hartman up = serial_omap_console_ports[co->index]; 1361ab4382d2SGreg Kroah-Hartman 1362ab4382d2SGreg Kroah-Hartman if (options) 1363ab4382d2SGreg Kroah-Hartman uart_parse_options(options, &baud, &parity, &bits, &flow); 1364ab4382d2SGreg Kroah-Hartman 1365ab4382d2SGreg Kroah-Hartman return uart_set_options(&up->port, co, baud, parity, bits, flow); 1366ab4382d2SGreg Kroah-Hartman } 1367ab4382d2SGreg Kroah-Hartman 1368ab4382d2SGreg Kroah-Hartman static struct console serial_omap_console = { 1369ab4382d2SGreg Kroah-Hartman .name = OMAP_SERIAL_NAME, 1370ab4382d2SGreg Kroah-Hartman .write = serial_omap_console_write, 1371ab4382d2SGreg Kroah-Hartman .device = uart_console_device, 1372ab4382d2SGreg Kroah-Hartman .setup = serial_omap_console_setup, 1373ab4382d2SGreg Kroah-Hartman .flags = CON_PRINTBUFFER, 1374ab4382d2SGreg Kroah-Hartman .index = -1, 1375ab4382d2SGreg Kroah-Hartman .data = &serial_omap_reg, 1376ab4382d2SGreg Kroah-Hartman }; 1377ab4382d2SGreg Kroah-Hartman 1378ab4382d2SGreg Kroah-Hartman static void serial_omap_add_console_port(struct uart_omap_port *up) 1379ab4382d2SGreg Kroah-Hartman { 1380ba77433dSRajendra Nayak serial_omap_console_ports[up->port.line] = up; 1381ab4382d2SGreg Kroah-Hartman } 1382ab4382d2SGreg Kroah-Hartman 1383ab4382d2SGreg Kroah-Hartman #define OMAP_CONSOLE (&serial_omap_console) 1384ab4382d2SGreg Kroah-Hartman 1385ab4382d2SGreg Kroah-Hartman #else 1386ab4382d2SGreg Kroah-Hartman 1387ab4382d2SGreg Kroah-Hartman #define OMAP_CONSOLE NULL 1388ab4382d2SGreg Kroah-Hartman 1389ab4382d2SGreg Kroah-Hartman static inline void serial_omap_add_console_port(struct uart_omap_port *up) 1390ab4382d2SGreg Kroah-Hartman {} 1391ab4382d2SGreg Kroah-Hartman 1392ab4382d2SGreg Kroah-Hartman #endif 1393ab4382d2SGreg Kroah-Hartman 13944a0ac0f5SMark Jackson /* Enable or disable the rs485 support */ 1395dadd7ecbSRicardo Ribalda Delgado static int 1396308bbc9aSPeter Hurley serial_omap_config_rs485(struct uart_port *port, struct serial_rs485 *rs485) 13974a0ac0f5SMark Jackson { 13984a0ac0f5SMark Jackson struct uart_omap_port *up = to_uart_omap_port(port); 13994a0ac0f5SMark Jackson unsigned int mode; 14004a0ac0f5SMark Jackson int val; 14014a0ac0f5SMark Jackson 14024a0ac0f5SMark Jackson pm_runtime_get_sync(up->dev); 14034a0ac0f5SMark Jackson 14044a0ac0f5SMark Jackson /* Disable interrupts from this port */ 14054a0ac0f5SMark Jackson mode = up->ier; 14064a0ac0f5SMark Jackson up->ier = 0; 14074a0ac0f5SMark Jackson serial_out(up, UART_IER, 0); 14084a0ac0f5SMark Jackson 1409308bbc9aSPeter Hurley /* Clamp the delays to [0, 100ms] */ 1410308bbc9aSPeter Hurley rs485->delay_rts_before_send = min(rs485->delay_rts_before_send, 100U); 1411308bbc9aSPeter Hurley rs485->delay_rts_after_send = min(rs485->delay_rts_after_send, 100U); 1412308bbc9aSPeter Hurley 14134a0ac0f5SMark Jackson /* store new config */ 1414308bbc9aSPeter Hurley port->rs485 = *rs485; 14154a0ac0f5SMark Jackson 14164a0ac0f5SMark Jackson /* 14174a0ac0f5SMark Jackson * Just as a precaution, only allow rs485 14184a0ac0f5SMark Jackson * to be enabled if the gpio pin is valid 14194a0ac0f5SMark Jackson */ 14204a0ac0f5SMark Jackson if (gpio_is_valid(up->rts_gpio)) { 14214a0ac0f5SMark Jackson /* enable / disable rts */ 1422dadd7ecbSRicardo Ribalda Delgado val = (port->rs485.flags & SER_RS485_ENABLED) ? 14234a0ac0f5SMark Jackson SER_RS485_RTS_AFTER_SEND : SER_RS485_RTS_ON_SEND; 1424dadd7ecbSRicardo Ribalda Delgado val = (port->rs485.flags & val) ? 1 : 0; 14254a0ac0f5SMark Jackson gpio_set_value(up->rts_gpio, val); 14264a0ac0f5SMark Jackson } else 1427dadd7ecbSRicardo Ribalda Delgado port->rs485.flags &= ~SER_RS485_ENABLED; 14284a0ac0f5SMark Jackson 14294a0ac0f5SMark Jackson /* Enable interrupts */ 14304a0ac0f5SMark Jackson up->ier = mode; 14314a0ac0f5SMark Jackson serial_out(up, UART_IER, up->ier); 14324a0ac0f5SMark Jackson 1433018e7448SPhilippe Proulx /* If RS-485 is disabled, make sure the THR interrupt is fired when 1434018e7448SPhilippe Proulx * TX FIFO is below the trigger level. 1435018e7448SPhilippe Proulx */ 1436dadd7ecbSRicardo Ribalda Delgado if (!(port->rs485.flags & SER_RS485_ENABLED) && 1437018e7448SPhilippe Proulx (up->scr & OMAP_UART_SCR_TX_EMPTY)) { 1438018e7448SPhilippe Proulx up->scr &= ~OMAP_UART_SCR_TX_EMPTY; 1439018e7448SPhilippe Proulx serial_out(up, UART_OMAP_SCR, up->scr); 1440018e7448SPhilippe Proulx } 1441018e7448SPhilippe Proulx 14424a0ac0f5SMark Jackson pm_runtime_mark_last_busy(up->dev); 14434a0ac0f5SMark Jackson pm_runtime_put_autosuspend(up->dev); 14444a0ac0f5SMark Jackson 14454a0ac0f5SMark Jackson return 0; 14464a0ac0f5SMark Jackson } 14474a0ac0f5SMark Jackson 14482331e068SBhumika Goyal static const struct uart_ops serial_omap_pops = { 1449ab4382d2SGreg Kroah-Hartman .tx_empty = serial_omap_tx_empty, 1450ab4382d2SGreg Kroah-Hartman .set_mctrl = serial_omap_set_mctrl, 1451ab4382d2SGreg Kroah-Hartman .get_mctrl = serial_omap_get_mctrl, 1452ab4382d2SGreg Kroah-Hartman .stop_tx = serial_omap_stop_tx, 1453ab4382d2SGreg Kroah-Hartman .start_tx = serial_omap_start_tx, 14543af08bd7SRussell King .throttle = serial_omap_throttle, 14553af08bd7SRussell King .unthrottle = serial_omap_unthrottle, 1456ab4382d2SGreg Kroah-Hartman .stop_rx = serial_omap_stop_rx, 1457ab4382d2SGreg Kroah-Hartman .enable_ms = serial_omap_enable_ms, 1458ab4382d2SGreg Kroah-Hartman .break_ctl = serial_omap_break_ctl, 1459ab4382d2SGreg Kroah-Hartman .startup = serial_omap_startup, 1460ab4382d2SGreg Kroah-Hartman .shutdown = serial_omap_shutdown, 1461ab4382d2SGreg Kroah-Hartman .set_termios = serial_omap_set_termios, 1462ab4382d2SGreg Kroah-Hartman .pm = serial_omap_pm, 1463ab4382d2SGreg Kroah-Hartman .type = serial_omap_type, 1464ab4382d2SGreg Kroah-Hartman .release_port = serial_omap_release_port, 1465ab4382d2SGreg Kroah-Hartman .request_port = serial_omap_request_port, 1466ab4382d2SGreg Kroah-Hartman .config_port = serial_omap_config_port, 1467ab4382d2SGreg Kroah-Hartman .verify_port = serial_omap_verify_port, 1468ab4382d2SGreg Kroah-Hartman #ifdef CONFIG_CONSOLE_POLL 1469ab4382d2SGreg Kroah-Hartman .poll_put_char = serial_omap_poll_put_char, 1470ab4382d2SGreg Kroah-Hartman .poll_get_char = serial_omap_poll_get_char, 1471ab4382d2SGreg Kroah-Hartman #endif 1472ab4382d2SGreg Kroah-Hartman }; 1473ab4382d2SGreg Kroah-Hartman 1474ab4382d2SGreg Kroah-Hartman static struct uart_driver serial_omap_reg = { 1475ab4382d2SGreg Kroah-Hartman .owner = THIS_MODULE, 1476ab4382d2SGreg Kroah-Hartman .driver_name = "OMAP-SERIAL", 1477ab4382d2SGreg Kroah-Hartman .dev_name = OMAP_SERIAL_NAME, 1478ab4382d2SGreg Kroah-Hartman .nr = OMAP_MAX_HSUART_PORTS, 1479ab4382d2SGreg Kroah-Hartman .cons = OMAP_CONSOLE, 1480ab4382d2SGreg Kroah-Hartman }; 1481ab4382d2SGreg Kroah-Hartman 14823bc4f0d8SShubhrajyoti D #ifdef CONFIG_PM_SLEEP 1483ddd85e22SSourav Poddar static int serial_omap_prepare(struct device *dev) 1484ddd85e22SSourav Poddar { 1485ddd85e22SSourav Poddar struct uart_omap_port *up = dev_get_drvdata(dev); 1486ddd85e22SSourav Poddar 1487ddd85e22SSourav Poddar up->is_suspending = true; 1488ddd85e22SSourav Poddar 1489ddd85e22SSourav Poddar return 0; 1490ddd85e22SSourav Poddar } 1491ddd85e22SSourav Poddar 1492ddd85e22SSourav Poddar static void serial_omap_complete(struct device *dev) 1493ddd85e22SSourav Poddar { 1494ddd85e22SSourav Poddar struct uart_omap_port *up = dev_get_drvdata(dev); 1495ddd85e22SSourav Poddar 1496ddd85e22SSourav Poddar up->is_suspending = false; 1497ddd85e22SSourav Poddar } 1498ddd85e22SSourav Poddar 1499fcdca757SGovindraj.R static int serial_omap_suspend(struct device *dev) 1500ab4382d2SGreg Kroah-Hartman { 1501fcdca757SGovindraj.R struct uart_omap_port *up = dev_get_drvdata(dev); 1502ab4382d2SGreg Kroah-Hartman 1503ab4382d2SGreg Kroah-Hartman uart_suspend_port(&serial_omap_reg, &up->port); 150443829731STejun Heo flush_work(&up->qos_work); 15052fd14964SGovindraj.R 1506d758c9c1STony Lindgren if (device_may_wakeup(dev)) 1507d758c9c1STony Lindgren serial_omap_enable_wakeup(up, true); 1508d758c9c1STony Lindgren else 1509d758c9c1STony Lindgren serial_omap_enable_wakeup(up, false); 1510d758c9c1STony Lindgren 1511ab4382d2SGreg Kroah-Hartman return 0; 1512ab4382d2SGreg Kroah-Hartman } 1513ab4382d2SGreg Kroah-Hartman 1514fcdca757SGovindraj.R static int serial_omap_resume(struct device *dev) 1515ab4382d2SGreg Kroah-Hartman { 1516fcdca757SGovindraj.R struct uart_omap_port *up = dev_get_drvdata(dev); 1517ab4382d2SGreg Kroah-Hartman 1518d758c9c1STony Lindgren if (device_may_wakeup(dev)) 1519d758c9c1STony Lindgren serial_omap_enable_wakeup(up, false); 1520d758c9c1STony Lindgren 1521ab4382d2SGreg Kroah-Hartman uart_resume_port(&serial_omap_reg, &up->port); 1522ac57e7f3SSourav Poddar 1523ab4382d2SGreg Kroah-Hartman return 0; 1524ab4382d2SGreg Kroah-Hartman } 1525ddd85e22SSourav Poddar #else 1526ddd85e22SSourav Poddar #define serial_omap_prepare NULL 15272cb5a2faSArnd Bergmann #define serial_omap_complete NULL 1528ddd85e22SSourav Poddar #endif /* CONFIG_PM_SLEEP */ 1529ab4382d2SGreg Kroah-Hartman 15309671f099SBill Pemberton static void omap_serial_fill_features_erratas(struct uart_omap_port *up) 15317c77c8deSGovindraj.R { 15327c77c8deSGovindraj.R u32 mvr, scheme; 15337c77c8deSGovindraj.R u16 revision, major, minor; 15347c77c8deSGovindraj.R 153576bac198SRuchika Kharwar mvr = readl(up->port.membase + (UART_OMAP_MVER << up->port.regshift)); 15367c77c8deSGovindraj.R 15377c77c8deSGovindraj.R /* Check revision register scheme */ 15387c77c8deSGovindraj.R scheme = mvr >> OMAP_UART_MVR_SCHEME_SHIFT; 15397c77c8deSGovindraj.R 15407c77c8deSGovindraj.R switch (scheme) { 15417c77c8deSGovindraj.R case 0: /* Legacy Scheme: OMAP2/3 */ 15427c77c8deSGovindraj.R /* MINOR_REV[0:4], MAJOR_REV[4:7] */ 15437c77c8deSGovindraj.R major = (mvr & OMAP_UART_LEGACY_MVR_MAJ_MASK) >> 15447c77c8deSGovindraj.R OMAP_UART_LEGACY_MVR_MAJ_SHIFT; 15457c77c8deSGovindraj.R minor = (mvr & OMAP_UART_LEGACY_MVR_MIN_MASK); 15467c77c8deSGovindraj.R break; 15477c77c8deSGovindraj.R case 1: 15487c77c8deSGovindraj.R /* New Scheme: OMAP4+ */ 15497c77c8deSGovindraj.R /* MINOR_REV[0:5], MAJOR_REV[8:10] */ 15507c77c8deSGovindraj.R major = (mvr & OMAP_UART_MVR_MAJ_MASK) >> 15517c77c8deSGovindraj.R OMAP_UART_MVR_MAJ_SHIFT; 15527c77c8deSGovindraj.R minor = (mvr & OMAP_UART_MVR_MIN_MASK); 15537c77c8deSGovindraj.R break; 15547c77c8deSGovindraj.R default: 1555d8ee4ea6SFelipe Balbi dev_warn(up->dev, 15567c77c8deSGovindraj.R "Unknown %s revision, defaulting to highest\n", 15577c77c8deSGovindraj.R up->name); 15587c77c8deSGovindraj.R /* highest possible revision */ 15597c77c8deSGovindraj.R major = 0xff; 15607c77c8deSGovindraj.R minor = 0xff; 15617c77c8deSGovindraj.R } 15627c77c8deSGovindraj.R 15637c77c8deSGovindraj.R /* normalize revision for the driver */ 15647c77c8deSGovindraj.R revision = UART_BUILD_REVISION(major, minor); 15657c77c8deSGovindraj.R 15667c77c8deSGovindraj.R switch (revision) { 15677c77c8deSGovindraj.R case OMAP_UART_REV_46: 15687c77c8deSGovindraj.R up->errata |= (UART_ERRATA_i202_MDR1_ACCESS | 15697c77c8deSGovindraj.R UART_ERRATA_i291_DMA_FORCEIDLE); 15707c77c8deSGovindraj.R break; 15717c77c8deSGovindraj.R case OMAP_UART_REV_52: 15727c77c8deSGovindraj.R up->errata |= (UART_ERRATA_i202_MDR1_ACCESS | 15737c77c8deSGovindraj.R UART_ERRATA_i291_DMA_FORCEIDLE); 1574f64ffda6SGovindraj.R up->features |= OMAP_UART_WER_HAS_TX_WAKEUP; 15757c77c8deSGovindraj.R break; 15767c77c8deSGovindraj.R case OMAP_UART_REV_63: 15777c77c8deSGovindraj.R up->errata |= UART_ERRATA_i202_MDR1_ACCESS; 1578f64ffda6SGovindraj.R up->features |= OMAP_UART_WER_HAS_TX_WAKEUP; 15797c77c8deSGovindraj.R break; 15807c77c8deSGovindraj.R default: 15817c77c8deSGovindraj.R break; 15827c77c8deSGovindraj.R } 15837c77c8deSGovindraj.R } 15847c77c8deSGovindraj.R 15859671f099SBill Pemberton static struct omap_uart_port_info *of_get_uart_port_info(struct device *dev) 1586d92b0dfcSRajendra Nayak { 1587d92b0dfcSRajendra Nayak struct omap_uart_port_info *omap_up_info; 1588d92b0dfcSRajendra Nayak 1589d92b0dfcSRajendra Nayak omap_up_info = devm_kzalloc(dev, sizeof(*omap_up_info), GFP_KERNEL); 1590d92b0dfcSRajendra Nayak if (!omap_up_info) 1591d92b0dfcSRajendra Nayak return NULL; /* out of memory */ 1592d92b0dfcSRajendra Nayak 1593d92b0dfcSRajendra Nayak of_property_read_u32(dev->of_node, "clock-frequency", 1594d92b0dfcSRajendra Nayak &omap_up_info->uartclk); 15951b775de9SSebastian Reichel 15961b775de9SSebastian Reichel omap_up_info->flags = UPF_BOOT_AUTOCONF; 15971b775de9SSebastian Reichel 1598d92b0dfcSRajendra Nayak return omap_up_info; 1599d92b0dfcSRajendra Nayak } 1600d92b0dfcSRajendra Nayak 16014a0ac0f5SMark Jackson static int serial_omap_probe_rs485(struct uart_omap_port *up, 16024a0ac0f5SMark Jackson struct device_node *np) 16034a0ac0f5SMark Jackson { 1604dadd7ecbSRicardo Ribalda Delgado struct serial_rs485 *rs485conf = &up->port.rs485; 16054a0ac0f5SMark Jackson enum of_gpio_flags flags; 16064a0ac0f5SMark Jackson int ret; 16074a0ac0f5SMark Jackson 16084a0ac0f5SMark Jackson rs485conf->flags = 0; 16094a0ac0f5SMark Jackson up->rts_gpio = -EINVAL; 16104a0ac0f5SMark Jackson 16114a0ac0f5SMark Jackson if (!np) 16124a0ac0f5SMark Jackson return 0; 16134a0ac0f5SMark Jackson 1614743f93f8SLukas Wunner uart_get_rs485_mode(up->dev, rs485conf); 1615743f93f8SLukas Wunner 1616f1e5b618SLukas Wunner if (of_property_read_bool(np, "rs485-rts-active-high")) { 16174a0ac0f5SMark Jackson rs485conf->flags |= SER_RS485_RTS_ON_SEND; 1618f1e5b618SLukas Wunner rs485conf->flags &= ~SER_RS485_RTS_AFTER_SEND; 1619f1e5b618SLukas Wunner } else { 1620f1e5b618SLukas Wunner rs485conf->flags &= ~SER_RS485_RTS_ON_SEND; 16214a0ac0f5SMark Jackson rs485conf->flags |= SER_RS485_RTS_AFTER_SEND; 1622f1e5b618SLukas Wunner } 16234a0ac0f5SMark Jackson 16244a0ac0f5SMark Jackson /* check for tx enable gpio */ 16254a0ac0f5SMark Jackson up->rts_gpio = of_get_named_gpio_flags(np, "rts-gpio", 0, &flags); 16264a0ac0f5SMark Jackson if (gpio_is_valid(up->rts_gpio)) { 1627404dc57cSFelipe Balbi ret = devm_gpio_request(up->dev, up->rts_gpio, "omap-serial"); 16284a0ac0f5SMark Jackson if (ret < 0) 16294a0ac0f5SMark Jackson return ret; 16304a0ac0f5SMark Jackson ret = gpio_direction_output(up->rts_gpio, 16314a0ac0f5SMark Jackson flags & SER_RS485_RTS_AFTER_SEND); 16324a0ac0f5SMark Jackson if (ret < 0) 16334a0ac0f5SMark Jackson return ret; 1634a64c1a1cSMichael Grzeschik } else if (up->rts_gpio == -EPROBE_DEFER) { 1635a64c1a1cSMichael Grzeschik return -EPROBE_DEFER; 1636a64c1a1cSMichael Grzeschik } else { 16374a0ac0f5SMark Jackson up->rts_gpio = -EINVAL; 1638a64c1a1cSMichael Grzeschik } 16394a0ac0f5SMark Jackson 16404a0ac0f5SMark Jackson return 0; 16414a0ac0f5SMark Jackson } 16424a0ac0f5SMark Jackson 16439671f099SBill Pemberton static int serial_omap_probe(struct platform_device *pdev) 1644ab4382d2SGreg Kroah-Hartman { 1645574de559SJingoo Han struct omap_uart_port_info *omap_up_info = dev_get_platdata(&pdev->dev); 1646cc51638aSFelipe Balbi struct uart_omap_port *up; 1647cc51638aSFelipe Balbi struct resource *mem; 1648d044d235SFelipe Balbi void __iomem *base; 1649cc51638aSFelipe Balbi int uartirq = 0; 1650cc51638aSFelipe Balbi int wakeirq = 0; 1651cc51638aSFelipe Balbi int ret; 1652ab4382d2SGreg Kroah-Hartman 16532a0b965cSTony Lindgren /* The optional wakeirq may be specified in the board dts file */ 1654a0a490f9SVikram Pandita if (pdev->dev.of_node) { 16552a0b965cSTony Lindgren uartirq = irq_of_parse_and_map(pdev->dev.of_node, 0); 16562a0b965cSTony Lindgren if (!uartirq) 16572a0b965cSTony Lindgren return -EPROBE_DEFER; 16582a0b965cSTony Lindgren wakeirq = irq_of_parse_and_map(pdev->dev.of_node, 1); 1659d92b0dfcSRajendra Nayak omap_up_info = of_get_uart_port_info(&pdev->dev); 1660a0a490f9SVikram Pandita pdev->dev.platform_data = omap_up_info; 16612a0b965cSTony Lindgren } else { 166254af692cSFelipe Balbi uartirq = platform_get_irq(pdev, 0); 166354af692cSFelipe Balbi if (uartirq < 0) 166454af692cSFelipe Balbi return -EPROBE_DEFER; 1665a0a490f9SVikram Pandita } 1666d92b0dfcSRajendra Nayak 1667d044d235SFelipe Balbi up = devm_kzalloc(&pdev->dev, sizeof(*up), GFP_KERNEL); 1668d044d235SFelipe Balbi if (!up) 1669d044d235SFelipe Balbi return -ENOMEM; 1670ab4382d2SGreg Kroah-Hartman 1671d044d235SFelipe Balbi mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1672d044d235SFelipe Balbi base = devm_ioremap_resource(&pdev->dev, mem); 1673d044d235SFelipe Balbi if (IS_ERR(base)) 1674d044d235SFelipe Balbi return PTR_ERR(base); 1675ab4382d2SGreg Kroah-Hartman 1676d8ee4ea6SFelipe Balbi up->dev = &pdev->dev; 1677ab4382d2SGreg Kroah-Hartman up->port.dev = &pdev->dev; 1678ab4382d2SGreg Kroah-Hartman up->port.type = PORT_OMAP; 1679ab4382d2SGreg Kroah-Hartman up->port.iotype = UPIO_MEM; 16802a0b965cSTony Lindgren up->port.irq = uartirq; 1681ab4382d2SGreg Kroah-Hartman up->port.regshift = 2; 1682ab4382d2SGreg Kroah-Hartman up->port.fifosize = 64; 1683ab4382d2SGreg Kroah-Hartman up->port.ops = &serial_omap_pops; 1684ab4382d2SGreg Kroah-Hartman 1685d92b0dfcSRajendra Nayak if (pdev->dev.of_node) 16863c59958dSSebastian Andrzej Siewior ret = of_alias_get_id(pdev->dev.of_node, "serial"); 1687d92b0dfcSRajendra Nayak else 16883c59958dSSebastian Andrzej Siewior ret = pdev->id; 1689ab4382d2SGreg Kroah-Hartman 16903c59958dSSebastian Andrzej Siewior if (ret < 0) { 1691d92b0dfcSRajendra Nayak dev_err(&pdev->dev, "failed to get alias/pdev id, errno %d\n", 16923c59958dSSebastian Andrzej Siewior ret); 1693388bc262SShubhrajyoti D goto err_port_line; 1694d92b0dfcSRajendra Nayak } 16953c59958dSSebastian Andrzej Siewior up->port.line = ret; 1696d92b0dfcSRajendra Nayak 16977af0ea5dSNishanth Menon if (up->port.line >= OMAP_MAX_HSUART_PORTS) { 16987af0ea5dSNishanth Menon dev_err(&pdev->dev, "uart ID %d > MAX %d.\n", up->port.line, 16997af0ea5dSNishanth Menon OMAP_MAX_HSUART_PORTS); 17007af0ea5dSNishanth Menon ret = -ENXIO; 17017af0ea5dSNishanth Menon goto err_port_line; 17027af0ea5dSNishanth Menon } 17037af0ea5dSNishanth Menon 17041cf94d3aSDoug Kehn up->wakeirq = wakeirq; 17051cf94d3aSDoug Kehn if (!up->wakeirq) 17061cf94d3aSDoug Kehn dev_info(up->port.dev, "no wakeirq for uart%d\n", 17071cf94d3aSDoug Kehn up->port.line); 17081cf94d3aSDoug Kehn 17094a0ac0f5SMark Jackson ret = serial_omap_probe_rs485(up, pdev->dev.of_node); 17104a0ac0f5SMark Jackson if (ret < 0) 17114a0ac0f5SMark Jackson goto err_rs485; 17124a0ac0f5SMark Jackson 1713d92b0dfcSRajendra Nayak sprintf(up->name, "OMAP UART%d", up->port.line); 1714edd70ad7SGovindraj.R up->port.mapbase = mem->start; 1715d044d235SFelipe Balbi up->port.membase = base; 1716ab4382d2SGreg Kroah-Hartman up->port.flags = omap_up_info->flags; 1717ab4382d2SGreg Kroah-Hartman up->port.uartclk = omap_up_info->uartclk; 1718dadd7ecbSRicardo Ribalda Delgado up->port.rs485_config = serial_omap_config_rs485; 17198fe789dcSRajendra Nayak if (!up->port.uartclk) { 17208fe789dcSRajendra Nayak up->port.uartclk = DEFAULT_CLK_SPEED; 1721e5f9bf72SPhilippe Proulx dev_warn(&pdev->dev, 172280d8611dSPhilippe Proulx "No clock speed specified: using default: %d\n", 1723e5f9bf72SPhilippe Proulx DEFAULT_CLK_SPEED); 17248fe789dcSRajendra Nayak } 1725ab4382d2SGreg Kroah-Hartman 17262fd14964SGovindraj.R up->latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE; 17272fd14964SGovindraj.R up->calc_latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE; 17282fd14964SGovindraj.R pm_qos_add_request(&up->pm_qos_request, 17292fd14964SGovindraj.R PM_QOS_CPU_DMA_LATENCY, up->latency); 17302fd14964SGovindraj.R INIT_WORK(&up->qos_work, serial_omap_uart_qos_work); 17312fd14964SGovindraj.R 173293220dccSFelipe Balbi platform_set_drvdata(pdev, up); 1733a630fbfbSTony Lindgren if (omap_up_info->autosuspend_timeout == 0) 1734a630fbfbSTony Lindgren omap_up_info->autosuspend_timeout = -1; 17355b6acc79SFelipe Balbi 1736a630fbfbSTony Lindgren device_init_wakeup(up->dev, true); 1737fcdca757SGovindraj.R pm_runtime_use_autosuspend(&pdev->dev); 1738fcdca757SGovindraj.R pm_runtime_set_autosuspend_delay(&pdev->dev, 1739c86845dbSDeepak K omap_up_info->autosuspend_timeout); 1740fcdca757SGovindraj.R 1741fcdca757SGovindraj.R pm_runtime_irq_safe(&pdev->dev); 17423026d14aSGrygorii Strashko pm_runtime_enable(&pdev->dev); 17433026d14aSGrygorii Strashko 1744fcdca757SGovindraj.R pm_runtime_get_sync(&pdev->dev); 1745fcdca757SGovindraj.R 17467c77c8deSGovindraj.R omap_serial_fill_features_erratas(up); 17477c77c8deSGovindraj.R 1748ba77433dSRajendra Nayak ui[up->port.line] = up; 1749ab4382d2SGreg Kroah-Hartman serial_omap_add_console_port(up); 1750ab4382d2SGreg Kroah-Hartman 1751ab4382d2SGreg Kroah-Hartman ret = uart_add_one_port(&serial_omap_reg, &up->port); 1752ab4382d2SGreg Kroah-Hartman if (ret != 0) 1753388bc262SShubhrajyoti D goto err_add_port; 1754ab4382d2SGreg Kroah-Hartman 1755660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 1756660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 1757ab4382d2SGreg Kroah-Hartman return 0; 1758388bc262SShubhrajyoti D 1759388bc262SShubhrajyoti D err_add_port: 176077e6fe7fSJohan Hovold pm_runtime_dont_use_autosuspend(&pdev->dev); 176177e6fe7fSJohan Hovold pm_runtime_put_sync(&pdev->dev); 1762388bc262SShubhrajyoti D pm_runtime_disable(&pdev->dev); 176366cf1d84SSemen Protsenko pm_qos_remove_request(&up->pm_qos_request); 176466cf1d84SSemen Protsenko device_init_wakeup(up->dev, false); 17654a0ac0f5SMark Jackson err_rs485: 1766388bc262SShubhrajyoti D err_port_line: 1767ab4382d2SGreg Kroah-Hartman return ret; 1768ab4382d2SGreg Kroah-Hartman } 1769ab4382d2SGreg Kroah-Hartman 1770ae8d8a14SBill Pemberton static int serial_omap_remove(struct platform_device *dev) 1771ab4382d2SGreg Kroah-Hartman { 1772ab4382d2SGreg Kroah-Hartman struct uart_omap_port *up = platform_get_drvdata(dev); 1773ab4382d2SGreg Kroah-Hartman 1774099bd73dSJohan Hovold pm_runtime_get_sync(up->dev); 1775099bd73dSJohan Hovold 1776099bd73dSJohan Hovold uart_remove_one_port(&serial_omap_reg, &up->port); 1777099bd73dSJohan Hovold 1778099bd73dSJohan Hovold pm_runtime_dont_use_autosuspend(up->dev); 17797e9c8e7dSFelipe Balbi pm_runtime_put_sync(up->dev); 1780d8ee4ea6SFelipe Balbi pm_runtime_disable(up->dev); 17812fd14964SGovindraj.R pm_qos_remove_request(&up->pm_qos_request); 178293a2e470SSanjay Singh Rawat device_init_wakeup(&dev->dev, false); 1783fcdca757SGovindraj.R 1784ab4382d2SGreg Kroah-Hartman return 0; 1785ab4382d2SGreg Kroah-Hartman } 1786ab4382d2SGreg Kroah-Hartman 178794734749SGovindraj.R /* 178894734749SGovindraj.R * Work Around for Errata i202 (2430, 3430, 3630, 4430 and 4460) 178994734749SGovindraj.R * The access to uart register after MDR1 Access 179094734749SGovindraj.R * causes UART to corrupt data. 179194734749SGovindraj.R * 179294734749SGovindraj.R * Need a delay = 179394734749SGovindraj.R * 5 L4 clock cycles + 5 UART functional clock cycle (@48MHz = ~0.2uS) 179494734749SGovindraj.R * give 10 times as much 179594734749SGovindraj.R */ 179694734749SGovindraj.R static void serial_omap_mdr1_errataset(struct uart_omap_port *up, u8 mdr1) 179794734749SGovindraj.R { 179894734749SGovindraj.R u8 timeout = 255; 179994734749SGovindraj.R 180094734749SGovindraj.R serial_out(up, UART_OMAP_MDR1, mdr1); 180194734749SGovindraj.R udelay(2); 180294734749SGovindraj.R serial_out(up, UART_FCR, up->fcr | UART_FCR_CLEAR_XMIT | 180394734749SGovindraj.R UART_FCR_CLEAR_RCVR); 180494734749SGovindraj.R /* 180594734749SGovindraj.R * Wait for FIFO to empty: when empty, RX_FIFO_E bit is 0 and 180694734749SGovindraj.R * TX_FIFO_E bit is 1. 180794734749SGovindraj.R */ 180894734749SGovindraj.R while (UART_LSR_THRE != (serial_in(up, UART_LSR) & 180994734749SGovindraj.R (UART_LSR_THRE | UART_LSR_DR))) { 181094734749SGovindraj.R timeout--; 181194734749SGovindraj.R if (!timeout) { 181294734749SGovindraj.R /* Should *never* happen. we warn and carry on */ 1813d8ee4ea6SFelipe Balbi dev_crit(up->dev, "Errata i202: timedout %x\n", 181494734749SGovindraj.R serial_in(up, UART_LSR)); 181594734749SGovindraj.R break; 181694734749SGovindraj.R } 181794734749SGovindraj.R udelay(1); 181894734749SGovindraj.R } 181994734749SGovindraj.R } 182094734749SGovindraj.R 1821d39fe4e5SRafael J. Wysocki #ifdef CONFIG_PM 18229f9ac1e8SGovindraj.R static void serial_omap_restore_context(struct uart_omap_port *up) 18239f9ac1e8SGovindraj.R { 182494734749SGovindraj.R if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) 182594734749SGovindraj.R serial_omap_mdr1_errataset(up, UART_OMAP_MDR1_DISABLE); 182694734749SGovindraj.R else 18279f9ac1e8SGovindraj.R serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE); 182894734749SGovindraj.R 18299f9ac1e8SGovindraj.R serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */ 18309f9ac1e8SGovindraj.R serial_out(up, UART_EFR, UART_EFR_ECB); 18319f9ac1e8SGovindraj.R serial_out(up, UART_LCR, 0x0); /* Operational mode */ 18329f9ac1e8SGovindraj.R serial_out(up, UART_IER, 0x0); 18339f9ac1e8SGovindraj.R serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */ 1834c538d20cSGovindraj.R serial_out(up, UART_DLL, up->dll); 1835c538d20cSGovindraj.R serial_out(up, UART_DLM, up->dlh); 18369f9ac1e8SGovindraj.R serial_out(up, UART_LCR, 0x0); /* Operational mode */ 18379f9ac1e8SGovindraj.R serial_out(up, UART_IER, up->ier); 18389f9ac1e8SGovindraj.R serial_out(up, UART_FCR, up->fcr); 18399f9ac1e8SGovindraj.R serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 18409f9ac1e8SGovindraj.R serial_out(up, UART_MCR, up->mcr); 18419f9ac1e8SGovindraj.R serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */ 1842c538d20cSGovindraj.R serial_out(up, UART_OMAP_SCR, up->scr); 18439f9ac1e8SGovindraj.R serial_out(up, UART_EFR, up->efr); 18449f9ac1e8SGovindraj.R serial_out(up, UART_LCR, up->lcr); 184594734749SGovindraj.R if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) 184694734749SGovindraj.R serial_omap_mdr1_errataset(up, up->mdr1); 184794734749SGovindraj.R else 1848c538d20cSGovindraj.R serial_out(up, UART_OMAP_MDR1, up->mdr1); 1849f64ffda6SGovindraj.R serial_out(up, UART_OMAP_WER, up->wer); 18509f9ac1e8SGovindraj.R } 18519f9ac1e8SGovindraj.R 1852fcdca757SGovindraj.R static int serial_omap_runtime_suspend(struct device *dev) 1853fcdca757SGovindraj.R { 1854ec3bebc6SGovindraj.R struct uart_omap_port *up = dev_get_drvdata(dev); 1855ec3bebc6SGovindraj.R 18567f25301dSWei Yongjun if (!up) 18577f25301dSWei Yongjun return -EINVAL; 18587f25301dSWei Yongjun 1859ddd85e22SSourav Poddar /* 1860ddd85e22SSourav Poddar * When using 'no_console_suspend', the console UART must not be 1861ddd85e22SSourav Poddar * suspended. Since driver suspend is managed by runtime suspend, 1862ddd85e22SSourav Poddar * preventing runtime suspend (by returning error) will keep device 1863ddd85e22SSourav Poddar * active during suspend. 1864ddd85e22SSourav Poddar */ 1865ddd85e22SSourav Poddar if (up->is_suspending && !console_suspend_enabled && 1866ddd85e22SSourav Poddar uart_console(&up->port)) 1867ddd85e22SSourav Poddar return -EBUSY; 1868ddd85e22SSourav Poddar 1869e5b57c03SFelipe Balbi up->context_loss_cnt = serial_omap_get_context_loss_count(up); 1870ec3bebc6SGovindraj.R 1871e5b57c03SFelipe Balbi serial_omap_enable_wakeup(up, true); 187262f3ec5fSGovindraj.R 18732fd14964SGovindraj.R up->latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE; 18742fd14964SGovindraj.R schedule_work(&up->qos_work); 18752fd14964SGovindraj.R 1876fcdca757SGovindraj.R return 0; 1877fcdca757SGovindraj.R } 1878fcdca757SGovindraj.R 1879fcdca757SGovindraj.R static int serial_omap_runtime_resume(struct device *dev) 1880fcdca757SGovindraj.R { 18819f9ac1e8SGovindraj.R struct uart_omap_port *up = dev_get_drvdata(dev); 18829f9ac1e8SGovindraj.R 188339aee51dSShubhrajyoti D int loss_cnt = serial_omap_get_context_loss_count(up); 1884ec3bebc6SGovindraj.R 1885d758c9c1STony Lindgren serial_omap_enable_wakeup(up, false); 1886d758c9c1STony Lindgren 188739aee51dSShubhrajyoti D if (loss_cnt < 0) { 1888a630fbfbSTony Lindgren dev_dbg(dev, "serial_omap_get_context_loss_count failed : %d\n", 188939aee51dSShubhrajyoti D loss_cnt); 18909f9ac1e8SGovindraj.R serial_omap_restore_context(up); 189139aee51dSShubhrajyoti D } else if (up->context_loss_cnt != loss_cnt) { 189239aee51dSShubhrajyoti D serial_omap_restore_context(up); 189339aee51dSShubhrajyoti D } 18942fd14964SGovindraj.R up->latency = up->calc_latency; 18952fd14964SGovindraj.R schedule_work(&up->qos_work); 18969f9ac1e8SGovindraj.R 1897fcdca757SGovindraj.R return 0; 1898fcdca757SGovindraj.R } 1899fcdca757SGovindraj.R #endif 1900fcdca757SGovindraj.R 1901fcdca757SGovindraj.R static const struct dev_pm_ops serial_omap_dev_pm_ops = { 1902fcdca757SGovindraj.R SET_SYSTEM_SLEEP_PM_OPS(serial_omap_suspend, serial_omap_resume) 1903fcdca757SGovindraj.R SET_RUNTIME_PM_OPS(serial_omap_runtime_suspend, 1904fcdca757SGovindraj.R serial_omap_runtime_resume, NULL) 1905ddd85e22SSourav Poddar .prepare = serial_omap_prepare, 1906ddd85e22SSourav Poddar .complete = serial_omap_complete, 1907fcdca757SGovindraj.R }; 1908fcdca757SGovindraj.R 1909d92b0dfcSRajendra Nayak #if defined(CONFIG_OF) 1910d92b0dfcSRajendra Nayak static const struct of_device_id omap_serial_of_match[] = { 1911d92b0dfcSRajendra Nayak { .compatible = "ti,omap2-uart" }, 1912d92b0dfcSRajendra Nayak { .compatible = "ti,omap3-uart" }, 1913d92b0dfcSRajendra Nayak { .compatible = "ti,omap4-uart" }, 1914d92b0dfcSRajendra Nayak {}, 1915d92b0dfcSRajendra Nayak }; 1916d92b0dfcSRajendra Nayak MODULE_DEVICE_TABLE(of, omap_serial_of_match); 1917d92b0dfcSRajendra Nayak #endif 1918d92b0dfcSRajendra Nayak 1919ab4382d2SGreg Kroah-Hartman static struct platform_driver serial_omap_driver = { 1920ab4382d2SGreg Kroah-Hartman .probe = serial_omap_probe, 19212d47b716SBill Pemberton .remove = serial_omap_remove, 1922ab4382d2SGreg Kroah-Hartman .driver = { 19231349ba02SJean Delvare .name = OMAP_SERIAL_DRIVER_NAME, 1924fcdca757SGovindraj.R .pm = &serial_omap_dev_pm_ops, 1925d92b0dfcSRajendra Nayak .of_match_table = of_match_ptr(omap_serial_of_match), 1926ab4382d2SGreg Kroah-Hartman }, 1927ab4382d2SGreg Kroah-Hartman }; 1928ab4382d2SGreg Kroah-Hartman 1929ab4382d2SGreg Kroah-Hartman static int __init serial_omap_init(void) 1930ab4382d2SGreg Kroah-Hartman { 1931ab4382d2SGreg Kroah-Hartman int ret; 1932ab4382d2SGreg Kroah-Hartman 1933ab4382d2SGreg Kroah-Hartman ret = uart_register_driver(&serial_omap_reg); 1934ab4382d2SGreg Kroah-Hartman if (ret != 0) 1935ab4382d2SGreg Kroah-Hartman return ret; 1936ab4382d2SGreg Kroah-Hartman ret = platform_driver_register(&serial_omap_driver); 1937ab4382d2SGreg Kroah-Hartman if (ret != 0) 1938ab4382d2SGreg Kroah-Hartman uart_unregister_driver(&serial_omap_reg); 1939ab4382d2SGreg Kroah-Hartman return ret; 1940ab4382d2SGreg Kroah-Hartman } 1941ab4382d2SGreg Kroah-Hartman 1942ab4382d2SGreg Kroah-Hartman static void __exit serial_omap_exit(void) 1943ab4382d2SGreg Kroah-Hartman { 1944ab4382d2SGreg Kroah-Hartman platform_driver_unregister(&serial_omap_driver); 1945ab4382d2SGreg Kroah-Hartman uart_unregister_driver(&serial_omap_reg); 1946ab4382d2SGreg Kroah-Hartman } 1947ab4382d2SGreg Kroah-Hartman 1948ab4382d2SGreg Kroah-Hartman module_init(serial_omap_init); 1949ab4382d2SGreg Kroah-Hartman module_exit(serial_omap_exit); 1950ab4382d2SGreg Kroah-Hartman 1951ab4382d2SGreg Kroah-Hartman MODULE_DESCRIPTION("OMAP High Speed UART driver"); 1952ab4382d2SGreg Kroah-Hartman MODULE_LICENSE("GPL"); 1953ab4382d2SGreg Kroah-Hartman MODULE_AUTHOR("Texas Instruments Inc"); 1954