1ab4382d2SGreg Kroah-Hartman /* 2ab4382d2SGreg Kroah-Hartman * Driver for OMAP-UART controller. 3ab4382d2SGreg Kroah-Hartman * Based on drivers/serial/8250.c 4ab4382d2SGreg Kroah-Hartman * 5ab4382d2SGreg Kroah-Hartman * Copyright (C) 2010 Texas Instruments. 6ab4382d2SGreg Kroah-Hartman * 7ab4382d2SGreg Kroah-Hartman * Authors: 8ab4382d2SGreg Kroah-Hartman * Govindraj R <govindraj.raja@ti.com> 9ab4382d2SGreg Kroah-Hartman * Thara Gopinath <thara@ti.com> 10ab4382d2SGreg Kroah-Hartman * 11ab4382d2SGreg Kroah-Hartman * This program is free software; you can redistribute it and/or modify 12ab4382d2SGreg Kroah-Hartman * it under the terms of the GNU General Public License as published by 13ab4382d2SGreg Kroah-Hartman * the Free Software Foundation; either version 2 of the License, or 14ab4382d2SGreg Kroah-Hartman * (at your option) any later version. 15ab4382d2SGreg Kroah-Hartman * 1625985edcSLucas De Marchi * Note: This driver is made separate from 8250 driver as we cannot 17ab4382d2SGreg Kroah-Hartman * over load 8250 driver with omap platform specific configuration for 18ab4382d2SGreg Kroah-Hartman * features like DMA, it makes easier to implement features like DMA and 19ab4382d2SGreg Kroah-Hartman * hardware flow control and software flow control configuration with 20ab4382d2SGreg Kroah-Hartman * this driver as required for the omap-platform. 21ab4382d2SGreg Kroah-Hartman */ 22ab4382d2SGreg Kroah-Hartman 23364a6eceSThomas Weber #if defined(CONFIG_SERIAL_OMAP_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) 24364a6eceSThomas Weber #define SUPPORT_SYSRQ 25364a6eceSThomas Weber #endif 26364a6eceSThomas Weber 27ab4382d2SGreg Kroah-Hartman #include <linux/module.h> 28ab4382d2SGreg Kroah-Hartman #include <linux/init.h> 29ab4382d2SGreg Kroah-Hartman #include <linux/console.h> 30ab4382d2SGreg Kroah-Hartman #include <linux/serial_reg.h> 31ab4382d2SGreg Kroah-Hartman #include <linux/delay.h> 32ab4382d2SGreg Kroah-Hartman #include <linux/slab.h> 33ab4382d2SGreg Kroah-Hartman #include <linux/tty.h> 34ab4382d2SGreg Kroah-Hartman #include <linux/tty_flip.h> 35d21e4005SFelipe Balbi #include <linux/platform_device.h> 36ab4382d2SGreg Kroah-Hartman #include <linux/io.h> 37ab4382d2SGreg Kroah-Hartman #include <linux/clk.h> 38ab4382d2SGreg Kroah-Hartman #include <linux/serial_core.h> 39ab4382d2SGreg Kroah-Hartman #include <linux/irq.h> 40fcdca757SGovindraj.R #include <linux/pm_runtime.h> 41d92b0dfcSRajendra Nayak #include <linux/of.h> 422a0b965cSTony Lindgren #include <linux/of_irq.h> 439574f36fSNeilBrown #include <linux/gpio.h> 444a0ac0f5SMark Jackson #include <linux/of_gpio.h> 45d9ba5737STony Lindgren #include <linux/platform_data/serial-omap.h> 46ab4382d2SGreg Kroah-Hartman 474a0ac0f5SMark Jackson #include <dt-bindings/gpio/gpio.h> 484a0ac0f5SMark Jackson 49f91b55abSRussell King #define OMAP_MAX_HSUART_PORTS 6 50f91b55abSRussell King 517c77c8deSGovindraj.R #define UART_BUILD_REVISION(x, y) (((x) << 8) | (y)) 527c77c8deSGovindraj.R 537c77c8deSGovindraj.R #define OMAP_UART_REV_42 0x0402 547c77c8deSGovindraj.R #define OMAP_UART_REV_46 0x0406 557c77c8deSGovindraj.R #define OMAP_UART_REV_52 0x0502 567c77c8deSGovindraj.R #define OMAP_UART_REV_63 0x0603 577c77c8deSGovindraj.R 58f64ffda6SGovindraj.R #define OMAP_UART_TX_WAKEUP_EN BIT(7) 59f64ffda6SGovindraj.R 60f64ffda6SGovindraj.R /* Feature flags */ 61f64ffda6SGovindraj.R #define OMAP_UART_WER_HAS_TX_WAKEUP BIT(0) 62f64ffda6SGovindraj.R 63f91b55abSRussell King #define UART_ERRATA_i202_MDR1_ACCESS BIT(0) 64f91b55abSRussell King #define UART_ERRATA_i291_DMA_FORCEIDLE BIT(1) 65f91b55abSRussell King 668fe789dcSRajendra Nayak #define DEFAULT_CLK_SPEED 48000000 /* 48Mhz*/ 678fe789dcSRajendra Nayak 680ba5f668SPaul Walmsley /* SCR register bitmasks */ 690ba5f668SPaul Walmsley #define OMAP_UART_SCR_RX_TRIG_GRANU1_MASK (1 << 7) 701776fd05SAlexey Pelykh #define OMAP_UART_SCR_TX_TRIG_GRANU1_MASK (1 << 6) 71f91b55abSRussell King #define OMAP_UART_SCR_TX_EMPTY (1 << 3) 720ba5f668SPaul Walmsley 730ba5f668SPaul Walmsley /* FCR register bitmasks */ 740ba5f668SPaul Walmsley #define OMAP_UART_FCR_RX_FIFO_TRIG_MASK (0x3 << 6) 756721ab7fSFelipe Balbi #define OMAP_UART_FCR_TX_FIFO_TRIG_MASK (0x3 << 4) 760ba5f668SPaul Walmsley 777c77c8deSGovindraj.R /* MVR register bitmasks */ 787c77c8deSGovindraj.R #define OMAP_UART_MVR_SCHEME_SHIFT 30 797c77c8deSGovindraj.R 807c77c8deSGovindraj.R #define OMAP_UART_LEGACY_MVR_MAJ_MASK 0xf0 817c77c8deSGovindraj.R #define OMAP_UART_LEGACY_MVR_MAJ_SHIFT 4 827c77c8deSGovindraj.R #define OMAP_UART_LEGACY_MVR_MIN_MASK 0x0f 837c77c8deSGovindraj.R 847c77c8deSGovindraj.R #define OMAP_UART_MVR_MAJ_MASK 0x700 857c77c8deSGovindraj.R #define OMAP_UART_MVR_MAJ_SHIFT 8 867c77c8deSGovindraj.R #define OMAP_UART_MVR_MIN_MASK 0x3f 877c77c8deSGovindraj.R 88f91b55abSRussell King #define OMAP_UART_DMA_CH_FREE -1 89f91b55abSRussell King 90f91b55abSRussell King #define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA 91f91b55abSRussell King #define OMAP_MODE13X_SPEED 230400 92f91b55abSRussell King 93f91b55abSRussell King /* WER = 0x7F 94f91b55abSRussell King * Enable module level wakeup in WER reg 95f91b55abSRussell King */ 96f91b55abSRussell King #define OMAP_UART_WER_MOD_WKUP 0X7F 97f91b55abSRussell King 98f91b55abSRussell King /* Enable XON/XOFF flow control on output */ 993af08bd7SRussell King #define OMAP_UART_SW_TX 0x08 100f91b55abSRussell King 101f91b55abSRussell King /* Enable XON/XOFF flow control on input */ 1023af08bd7SRussell King #define OMAP_UART_SW_RX 0x02 103f91b55abSRussell King 104f91b55abSRussell King #define OMAP_UART_SW_CLR 0xF0 105f91b55abSRussell King 106f91b55abSRussell King #define OMAP_UART_TCR_TRIG 0x0F 107f91b55abSRussell King 108f91b55abSRussell King struct uart_omap_dma { 109f91b55abSRussell King u8 uart_dma_tx; 110f91b55abSRussell King u8 uart_dma_rx; 111f91b55abSRussell King int rx_dma_channel; 112f91b55abSRussell King int tx_dma_channel; 113f91b55abSRussell King dma_addr_t rx_buf_dma_phys; 114f91b55abSRussell King dma_addr_t tx_buf_dma_phys; 115f91b55abSRussell King unsigned int uart_base; 116f91b55abSRussell King /* 117f91b55abSRussell King * Buffer for rx dma.It is not required for tx because the buffer 118f91b55abSRussell King * comes from port structure. 119f91b55abSRussell King */ 120f91b55abSRussell King unsigned char *rx_buf; 121f91b55abSRussell King unsigned int prev_rx_dma_pos; 122f91b55abSRussell King int tx_buf_size; 123f91b55abSRussell King int tx_dma_used; 124f91b55abSRussell King int rx_dma_used; 125f91b55abSRussell King spinlock_t tx_lock; 126f91b55abSRussell King spinlock_t rx_lock; 127f91b55abSRussell King /* timer to poll activity on rx dma */ 128f91b55abSRussell King struct timer_list rx_timer; 129f91b55abSRussell King unsigned int rx_buf_size; 130f91b55abSRussell King unsigned int rx_poll_rate; 131f91b55abSRussell King unsigned int rx_timeout; 132f91b55abSRussell King }; 133f91b55abSRussell King 134d37c6cebSFelipe Balbi struct uart_omap_port { 135d37c6cebSFelipe Balbi struct uart_port port; 136d37c6cebSFelipe Balbi struct uart_omap_dma uart_dma; 137d37c6cebSFelipe Balbi struct device *dev; 1382a0b965cSTony Lindgren int wakeirq; 139d37c6cebSFelipe Balbi 140d37c6cebSFelipe Balbi unsigned char ier; 141d37c6cebSFelipe Balbi unsigned char lcr; 142d37c6cebSFelipe Balbi unsigned char mcr; 143d37c6cebSFelipe Balbi unsigned char fcr; 144d37c6cebSFelipe Balbi unsigned char efr; 145d37c6cebSFelipe Balbi unsigned char dll; 146d37c6cebSFelipe Balbi unsigned char dlh; 147d37c6cebSFelipe Balbi unsigned char mdr1; 148d37c6cebSFelipe Balbi unsigned char scr; 149f64ffda6SGovindraj.R unsigned char wer; 150d37c6cebSFelipe Balbi 151d37c6cebSFelipe Balbi int use_dma; 152d37c6cebSFelipe Balbi /* 153d37c6cebSFelipe Balbi * Some bits in registers are cleared on a read, so they must 154d37c6cebSFelipe Balbi * be saved whenever the register is read but the bits will not 155d37c6cebSFelipe Balbi * be immediately processed. 156d37c6cebSFelipe Balbi */ 157d37c6cebSFelipe Balbi unsigned int lsr_break_flag; 158d37c6cebSFelipe Balbi unsigned char msr_saved_flags; 159d37c6cebSFelipe Balbi char name[20]; 160d37c6cebSFelipe Balbi unsigned long port_activity; 16139aee51dSShubhrajyoti D int context_loss_cnt; 162d37c6cebSFelipe Balbi u32 errata; 163d37c6cebSFelipe Balbi u8 wakeups_enabled; 164f64ffda6SGovindraj.R u32 features; 165d37c6cebSFelipe Balbi 166e36851d0SFelipe Balbi int DTR_gpio; 167e36851d0SFelipe Balbi int DTR_inverted; 168e36851d0SFelipe Balbi int DTR_active; 169e36851d0SFelipe Balbi 1704a0ac0f5SMark Jackson struct serial_rs485 rs485; 1714a0ac0f5SMark Jackson int rts_gpio; 1724a0ac0f5SMark Jackson 173d37c6cebSFelipe Balbi struct pm_qos_request pm_qos_request; 174d37c6cebSFelipe Balbi u32 latency; 175d37c6cebSFelipe Balbi u32 calc_latency; 176d37c6cebSFelipe Balbi struct work_struct qos_work; 177ddd85e22SSourav Poddar bool is_suspending; 178d37c6cebSFelipe Balbi }; 179d37c6cebSFelipe Balbi 180d37c6cebSFelipe Balbi #define to_uart_omap_port(p) ((container_of((p), struct uart_omap_port, port))) 181d37c6cebSFelipe Balbi 182ab4382d2SGreg Kroah-Hartman static struct uart_omap_port *ui[OMAP_MAX_HSUART_PORTS]; 183ab4382d2SGreg Kroah-Hartman 184ab4382d2SGreg Kroah-Hartman /* Forward declaration of functions */ 18594734749SGovindraj.R static void serial_omap_mdr1_errataset(struct uart_omap_port *up, u8 mdr1); 186ab4382d2SGreg Kroah-Hartman 1872fd14964SGovindraj.R static struct workqueue_struct *serial_omap_uart_wq; 188ab4382d2SGreg Kroah-Hartman 189ab4382d2SGreg Kroah-Hartman static inline unsigned int serial_in(struct uart_omap_port *up, int offset) 190ab4382d2SGreg Kroah-Hartman { 191ab4382d2SGreg Kroah-Hartman offset <<= up->port.regshift; 192ab4382d2SGreg Kroah-Hartman return readw(up->port.membase + offset); 193ab4382d2SGreg Kroah-Hartman } 194ab4382d2SGreg Kroah-Hartman 195ab4382d2SGreg Kroah-Hartman static inline void serial_out(struct uart_omap_port *up, int offset, int value) 196ab4382d2SGreg Kroah-Hartman { 197ab4382d2SGreg Kroah-Hartman offset <<= up->port.regshift; 198ab4382d2SGreg Kroah-Hartman writew(value, up->port.membase + offset); 199ab4382d2SGreg Kroah-Hartman } 200ab4382d2SGreg Kroah-Hartman 201ab4382d2SGreg Kroah-Hartman static inline void serial_omap_clear_fifos(struct uart_omap_port *up) 202ab4382d2SGreg Kroah-Hartman { 203ab4382d2SGreg Kroah-Hartman serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO); 204ab4382d2SGreg Kroah-Hartman serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | 205ab4382d2SGreg Kroah-Hartman UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); 206ab4382d2SGreg Kroah-Hartman serial_out(up, UART_FCR, 0); 207ab4382d2SGreg Kroah-Hartman } 208ab4382d2SGreg Kroah-Hartman 209e5b57c03SFelipe Balbi static int serial_omap_get_context_loss_count(struct uart_omap_port *up) 210e5b57c03SFelipe Balbi { 211574de559SJingoo Han struct omap_uart_port_info *pdata = dev_get_platdata(up->dev); 212e5b57c03SFelipe Balbi 213ce2f08deSFelipe Balbi if (!pdata || !pdata->get_context_loss_count) 214a630fbfbSTony Lindgren return -EINVAL; 215e5b57c03SFelipe Balbi 216d8ee4ea6SFelipe Balbi return pdata->get_context_loss_count(up->dev); 217e5b57c03SFelipe Balbi } 218e5b57c03SFelipe Balbi 2192a0b965cSTony Lindgren static inline void serial_omap_enable_wakeirq(struct uart_omap_port *up, 2202a0b965cSTony Lindgren bool enable) 2212a0b965cSTony Lindgren { 2222a0b965cSTony Lindgren if (!up->wakeirq) 2232a0b965cSTony Lindgren return; 2242a0b965cSTony Lindgren 2252a0b965cSTony Lindgren if (enable) 2262a0b965cSTony Lindgren enable_irq(up->wakeirq); 2272a0b965cSTony Lindgren else 228d758c9c1STony Lindgren disable_irq_nosync(up->wakeirq); 2292a0b965cSTony Lindgren } 2302a0b965cSTony Lindgren 231e5b57c03SFelipe Balbi static void serial_omap_enable_wakeup(struct uart_omap_port *up, bool enable) 232e5b57c03SFelipe Balbi { 233574de559SJingoo Han struct omap_uart_port_info *pdata = dev_get_platdata(up->dev); 234e5b57c03SFelipe Balbi 235d758c9c1STony Lindgren if (enable == up->wakeups_enabled) 236d758c9c1STony Lindgren return; 237d758c9c1STony Lindgren 2382a0b965cSTony Lindgren serial_omap_enable_wakeirq(up, enable); 239d758c9c1STony Lindgren up->wakeups_enabled = enable; 240d758c9c1STony Lindgren 241ce2f08deSFelipe Balbi if (!pdata || !pdata->enable_wakeup) 242ce2f08deSFelipe Balbi return; 243ce2f08deSFelipe Balbi 244d8ee4ea6SFelipe Balbi pdata->enable_wakeup(up->dev, enable); 245e5b57c03SFelipe Balbi } 246e5b57c03SFelipe Balbi 247ab4382d2SGreg Kroah-Hartman /* 2485fe21236SAlexey Pelykh * serial_omap_baud_is_mode16 - check if baud rate is MODE16X 2495fe21236SAlexey Pelykh * @port: uart port info 2505fe21236SAlexey Pelykh * @baud: baudrate for which mode needs to be determined 2515fe21236SAlexey Pelykh * 2525fe21236SAlexey Pelykh * Returns true if baud rate is MODE16X and false if MODE13X 2535fe21236SAlexey Pelykh * Original table in OMAP TRM named "UART Mode Baud Rates, Divisor Values, 2545fe21236SAlexey Pelykh * and Error Rates" determines modes not for all common baud rates. 2555fe21236SAlexey Pelykh * E.g. for 1000000 baud rate mode must be 16x, but according to that 2565fe21236SAlexey Pelykh * table it's determined as 13x. 2575fe21236SAlexey Pelykh */ 2585fe21236SAlexey Pelykh static bool 2595fe21236SAlexey Pelykh serial_omap_baud_is_mode16(struct uart_port *port, unsigned int baud) 2605fe21236SAlexey Pelykh { 2615fe21236SAlexey Pelykh unsigned int n13 = port->uartclk / (13 * baud); 2625fe21236SAlexey Pelykh unsigned int n16 = port->uartclk / (16 * baud); 2635fe21236SAlexey Pelykh int baudAbsDiff13 = baud - (port->uartclk / (13 * n13)); 2645fe21236SAlexey Pelykh int baudAbsDiff16 = baud - (port->uartclk / (16 * n16)); 2655fe21236SAlexey Pelykh if (baudAbsDiff13 < 0) 2665fe21236SAlexey Pelykh baudAbsDiff13 = -baudAbsDiff13; 2675fe21236SAlexey Pelykh if (baudAbsDiff16 < 0) 2685fe21236SAlexey Pelykh baudAbsDiff16 = -baudAbsDiff16; 2695fe21236SAlexey Pelykh 27018d8519dSAlexey Pelykh return (baudAbsDiff13 >= baudAbsDiff16); 2715fe21236SAlexey Pelykh } 2725fe21236SAlexey Pelykh 2735fe21236SAlexey Pelykh /* 274ab4382d2SGreg Kroah-Hartman * serial_omap_get_divisor - calculate divisor value 275ab4382d2SGreg Kroah-Hartman * @port: uart port info 276ab4382d2SGreg Kroah-Hartman * @baud: baudrate for which divisor needs to be calculated. 277ab4382d2SGreg Kroah-Hartman */ 278ab4382d2SGreg Kroah-Hartman static unsigned int 279ab4382d2SGreg Kroah-Hartman serial_omap_get_divisor(struct uart_port *port, unsigned int baud) 280ab4382d2SGreg Kroah-Hartman { 2814250b5d9SAlexey Pelykh unsigned int mode; 282ab4382d2SGreg Kroah-Hartman 2835fe21236SAlexey Pelykh if (!serial_omap_baud_is_mode16(port, baud)) 2844250b5d9SAlexey Pelykh mode = 13; 285ab4382d2SGreg Kroah-Hartman else 2864250b5d9SAlexey Pelykh mode = 16; 2874250b5d9SAlexey Pelykh return port->uartclk/(mode * baud); 288ab4382d2SGreg Kroah-Hartman } 289ab4382d2SGreg Kroah-Hartman 290ab4382d2SGreg Kroah-Hartman static void serial_omap_enable_ms(struct uart_port *port) 291ab4382d2SGreg Kroah-Hartman { 292c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 293ab4382d2SGreg Kroah-Hartman 294ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_enable_ms+%d\n", up->port.line); 295fcdca757SGovindraj.R 296d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 297ab4382d2SGreg Kroah-Hartman up->ier |= UART_IER_MSI; 298ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 299660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 300660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 301ab4382d2SGreg Kroah-Hartman } 302ab4382d2SGreg Kroah-Hartman 303ab4382d2SGreg Kroah-Hartman static void serial_omap_stop_tx(struct uart_port *port) 304ab4382d2SGreg Kroah-Hartman { 305c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 3064a0ac0f5SMark Jackson int res; 307ab4382d2SGreg Kroah-Hartman 308d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 3094a0ac0f5SMark Jackson 310018e7448SPhilippe Proulx /* Handle RS-485 */ 3114a0ac0f5SMark Jackson if (up->rs485.flags & SER_RS485_ENABLED) { 312018e7448SPhilippe Proulx if (up->scr & OMAP_UART_SCR_TX_EMPTY) { 313018e7448SPhilippe Proulx /* THR interrupt is fired when both TX FIFO and TX 314018e7448SPhilippe Proulx * shift register are empty. This means there's nothing 315018e7448SPhilippe Proulx * left to transmit now, so make sure the THR interrupt 316018e7448SPhilippe Proulx * is fired when TX FIFO is below the trigger level, 317018e7448SPhilippe Proulx * disable THR interrupts and toggle the RS-485 GPIO 318018e7448SPhilippe Proulx * data direction pin if needed. 319018e7448SPhilippe Proulx */ 320018e7448SPhilippe Proulx up->scr &= ~OMAP_UART_SCR_TX_EMPTY; 321018e7448SPhilippe Proulx serial_out(up, UART_OMAP_SCR, up->scr); 3224a0ac0f5SMark Jackson res = (up->rs485.flags & SER_RS485_RTS_AFTER_SEND) ? 1 : 0; 3234a0ac0f5SMark Jackson if (gpio_get_value(up->rts_gpio) != res) { 324e5f9bf72SPhilippe Proulx if (up->rs485.delay_rts_after_send > 0) 3254a0ac0f5SMark Jackson mdelay(up->rs485.delay_rts_after_send); 3264a0ac0f5SMark Jackson gpio_set_value(up->rts_gpio, res); 3274a0ac0f5SMark Jackson } 328018e7448SPhilippe Proulx } else { 329018e7448SPhilippe Proulx /* We're asked to stop, but there's still stuff in the 330018e7448SPhilippe Proulx * UART FIFO, so make sure the THR interrupt is fired 331018e7448SPhilippe Proulx * when both TX FIFO and TX shift register are empty. 332018e7448SPhilippe Proulx * The next THR interrupt (if no transmission is started 333018e7448SPhilippe Proulx * in the meantime) will indicate the end of a 334018e7448SPhilippe Proulx * transmission. Therefore we _don't_ disable THR 335018e7448SPhilippe Proulx * interrupts in this situation. 336018e7448SPhilippe Proulx */ 337018e7448SPhilippe Proulx up->scr |= OMAP_UART_SCR_TX_EMPTY; 338018e7448SPhilippe Proulx serial_out(up, UART_OMAP_SCR, up->scr); 339018e7448SPhilippe Proulx return; 3404a0ac0f5SMark Jackson } 3414a0ac0f5SMark Jackson } 3424a0ac0f5SMark Jackson 343ab4382d2SGreg Kroah-Hartman if (up->ier & UART_IER_THRI) { 344ab4382d2SGreg Kroah-Hartman up->ier &= ~UART_IER_THRI; 345ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 346ab4382d2SGreg Kroah-Hartman } 347fcdca757SGovindraj.R 3484a0ac0f5SMark Jackson if ((up->rs485.flags & SER_RS485_ENABLED) && 3494a0ac0f5SMark Jackson !(up->rs485.flags & SER_RS485_RX_DURING_TX)) { 3503a13884aSDimitris Lampridis /* 3513a13884aSDimitris Lampridis * Empty the RX FIFO, we are not interested in anything 3523a13884aSDimitris Lampridis * received during the half-duplex transmission. 3533a13884aSDimitris Lampridis */ 3543a13884aSDimitris Lampridis serial_out(up, UART_FCR, up->fcr | UART_FCR_CLEAR_RCVR); 3553a13884aSDimitris Lampridis /* Re-enable RX interrupts */ 356cab53dc9SDimitris Lampridis up->ier |= UART_IER_RLSI | UART_IER_RDI; 357cab53dc9SDimitris Lampridis up->port.read_status_mask |= UART_LSR_DR; 3584a0ac0f5SMark Jackson serial_out(up, UART_IER, up->ier); 3594a0ac0f5SMark Jackson } 3604a0ac0f5SMark Jackson 361d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 362d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 363ab4382d2SGreg Kroah-Hartman } 364ab4382d2SGreg Kroah-Hartman 365ab4382d2SGreg Kroah-Hartman static void serial_omap_stop_rx(struct uart_port *port) 366ab4382d2SGreg Kroah-Hartman { 367c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 368ab4382d2SGreg Kroah-Hartman 369d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 370cab53dc9SDimitris Lampridis up->ier &= ~(UART_IER_RLSI | UART_IER_RDI); 371ab4382d2SGreg Kroah-Hartman up->port.read_status_mask &= ~UART_LSR_DR; 372ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 373d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 374d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 375ab4382d2SGreg Kroah-Hartman } 376ab4382d2SGreg Kroah-Hartman 377bf63a086SFelipe Balbi static void transmit_chars(struct uart_omap_port *up, unsigned int lsr) 378ab4382d2SGreg Kroah-Hartman { 379ab4382d2SGreg Kroah-Hartman struct circ_buf *xmit = &up->port.state->xmit; 380ab4382d2SGreg Kroah-Hartman int count; 381ab4382d2SGreg Kroah-Hartman 382ab4382d2SGreg Kroah-Hartman if (up->port.x_char) { 383ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TX, up->port.x_char); 384ab4382d2SGreg Kroah-Hartman up->port.icount.tx++; 385ab4382d2SGreg Kroah-Hartman up->port.x_char = 0; 386ab4382d2SGreg Kroah-Hartman return; 387ab4382d2SGreg Kroah-Hartman } 388ab4382d2SGreg Kroah-Hartman if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { 389ab4382d2SGreg Kroah-Hartman serial_omap_stop_tx(&up->port); 390ab4382d2SGreg Kroah-Hartman return; 391ab4382d2SGreg Kroah-Hartman } 392355fe568SGreg Kroah-Hartman count = up->port.fifosize / 4; 393ab4382d2SGreg Kroah-Hartman do { 394ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TX, xmit->buf[xmit->tail]); 395ab4382d2SGreg Kroah-Hartman xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 396ab4382d2SGreg Kroah-Hartman up->port.icount.tx++; 397ab4382d2SGreg Kroah-Hartman if (uart_circ_empty(xmit)) 398ab4382d2SGreg Kroah-Hartman break; 399ab4382d2SGreg Kroah-Hartman } while (--count > 0); 400ab4382d2SGreg Kroah-Hartman 4016bf78967SFelipe Balbi if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 402ab4382d2SGreg Kroah-Hartman uart_write_wakeup(&up->port); 403ab4382d2SGreg Kroah-Hartman 404ab4382d2SGreg Kroah-Hartman if (uart_circ_empty(xmit)) 405ab4382d2SGreg Kroah-Hartman serial_omap_stop_tx(&up->port); 406ab4382d2SGreg Kroah-Hartman } 407ab4382d2SGreg Kroah-Hartman 408ab4382d2SGreg Kroah-Hartman static inline void serial_omap_enable_ier_thri(struct uart_omap_port *up) 409ab4382d2SGreg Kroah-Hartman { 410ab4382d2SGreg Kroah-Hartman if (!(up->ier & UART_IER_THRI)) { 411ab4382d2SGreg Kroah-Hartman up->ier |= UART_IER_THRI; 412ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 413ab4382d2SGreg Kroah-Hartman } 414ab4382d2SGreg Kroah-Hartman } 415ab4382d2SGreg Kroah-Hartman 416ab4382d2SGreg Kroah-Hartman static void serial_omap_start_tx(struct uart_port *port) 417ab4382d2SGreg Kroah-Hartman { 418c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 4194a0ac0f5SMark Jackson int res; 420ab4382d2SGreg Kroah-Hartman 421d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 4224a0ac0f5SMark Jackson 423018e7448SPhilippe Proulx /* Handle RS-485 */ 4244a0ac0f5SMark Jackson if (up->rs485.flags & SER_RS485_ENABLED) { 425018e7448SPhilippe Proulx /* Fire THR interrupts when FIFO is below trigger level */ 426018e7448SPhilippe Proulx up->scr &= ~OMAP_UART_SCR_TX_EMPTY; 427018e7448SPhilippe Proulx serial_out(up, UART_OMAP_SCR, up->scr); 428018e7448SPhilippe Proulx 4294a0ac0f5SMark Jackson /* if rts not already enabled */ 4304a0ac0f5SMark Jackson res = (up->rs485.flags & SER_RS485_RTS_ON_SEND) ? 1 : 0; 4314a0ac0f5SMark Jackson if (gpio_get_value(up->rts_gpio) != res) { 4324a0ac0f5SMark Jackson gpio_set_value(up->rts_gpio, res); 433e5f9bf72SPhilippe Proulx if (up->rs485.delay_rts_before_send > 0) 4344a0ac0f5SMark Jackson mdelay(up->rs485.delay_rts_before_send); 4354a0ac0f5SMark Jackson } 4364a0ac0f5SMark Jackson } 4374a0ac0f5SMark Jackson 4384a0ac0f5SMark Jackson if ((up->rs485.flags & SER_RS485_ENABLED) && 4394a0ac0f5SMark Jackson !(up->rs485.flags & SER_RS485_RX_DURING_TX)) 4404a0ac0f5SMark Jackson serial_omap_stop_rx(port); 4414a0ac0f5SMark Jackson 442ab4382d2SGreg Kroah-Hartman serial_omap_enable_ier_thri(up); 443d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 444d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 445ab4382d2SGreg Kroah-Hartman } 446ab4382d2SGreg Kroah-Hartman 4473af08bd7SRussell King static void serial_omap_throttle(struct uart_port *port) 4483af08bd7SRussell King { 4493af08bd7SRussell King struct uart_omap_port *up = to_uart_omap_port(port); 4503af08bd7SRussell King unsigned long flags; 4513af08bd7SRussell King 4523af08bd7SRussell King pm_runtime_get_sync(up->dev); 4533af08bd7SRussell King spin_lock_irqsave(&up->port.lock, flags); 4543af08bd7SRussell King up->ier &= ~(UART_IER_RLSI | UART_IER_RDI); 4553af08bd7SRussell King serial_out(up, UART_IER, up->ier); 4563af08bd7SRussell King spin_unlock_irqrestore(&up->port.lock, flags); 4573af08bd7SRussell King pm_runtime_mark_last_busy(up->dev); 4583af08bd7SRussell King pm_runtime_put_autosuspend(up->dev); 4593af08bd7SRussell King } 4603af08bd7SRussell King 4613af08bd7SRussell King static void serial_omap_unthrottle(struct uart_port *port) 4623af08bd7SRussell King { 4633af08bd7SRussell King struct uart_omap_port *up = to_uart_omap_port(port); 4643af08bd7SRussell King unsigned long flags; 4653af08bd7SRussell King 4663af08bd7SRussell King pm_runtime_get_sync(up->dev); 4673af08bd7SRussell King spin_lock_irqsave(&up->port.lock, flags); 4683af08bd7SRussell King up->ier |= UART_IER_RLSI | UART_IER_RDI; 4693af08bd7SRussell King serial_out(up, UART_IER, up->ier); 4703af08bd7SRussell King spin_unlock_irqrestore(&up->port.lock, flags); 4713af08bd7SRussell King pm_runtime_mark_last_busy(up->dev); 4723af08bd7SRussell King pm_runtime_put_autosuspend(up->dev); 4733af08bd7SRussell King } 4743af08bd7SRussell King 475ab4382d2SGreg Kroah-Hartman static unsigned int check_modem_status(struct uart_omap_port *up) 476ab4382d2SGreg Kroah-Hartman { 477ab4382d2SGreg Kroah-Hartman unsigned int status; 478ab4382d2SGreg Kroah-Hartman 479ab4382d2SGreg Kroah-Hartman status = serial_in(up, UART_MSR); 480ab4382d2SGreg Kroah-Hartman status |= up->msr_saved_flags; 481ab4382d2SGreg Kroah-Hartman up->msr_saved_flags = 0; 482ab4382d2SGreg Kroah-Hartman if ((status & UART_MSR_ANY_DELTA) == 0) 483ab4382d2SGreg Kroah-Hartman return status; 484ab4382d2SGreg Kroah-Hartman 485ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI && 486ab4382d2SGreg Kroah-Hartman up->port.state != NULL) { 487ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_TERI) 488ab4382d2SGreg Kroah-Hartman up->port.icount.rng++; 489ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DDSR) 490ab4382d2SGreg Kroah-Hartman up->port.icount.dsr++; 491ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DDCD) 492ab4382d2SGreg Kroah-Hartman uart_handle_dcd_change 493ab4382d2SGreg Kroah-Hartman (&up->port, status & UART_MSR_DCD); 494ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DCTS) 495ab4382d2SGreg Kroah-Hartman uart_handle_cts_change 496ab4382d2SGreg Kroah-Hartman (&up->port, status & UART_MSR_CTS); 497ab4382d2SGreg Kroah-Hartman wake_up_interruptible(&up->port.state->port.delta_msr_wait); 498ab4382d2SGreg Kroah-Hartman } 499ab4382d2SGreg Kroah-Hartman 500ab4382d2SGreg Kroah-Hartman return status; 501ab4382d2SGreg Kroah-Hartman } 502ab4382d2SGreg Kroah-Hartman 50372256cbdSFelipe Balbi static void serial_omap_rlsi(struct uart_omap_port *up, unsigned int lsr) 50472256cbdSFelipe Balbi { 50572256cbdSFelipe Balbi unsigned int flag; 5069a12fcf8SShubhrajyoti D unsigned char ch = 0; 5079a12fcf8SShubhrajyoti D 5089a12fcf8SShubhrajyoti D if (likely(lsr & UART_LSR_DR)) 5099a12fcf8SShubhrajyoti D ch = serial_in(up, UART_RX); 51072256cbdSFelipe Balbi 51172256cbdSFelipe Balbi up->port.icount.rx++; 51272256cbdSFelipe Balbi flag = TTY_NORMAL; 51372256cbdSFelipe Balbi 51472256cbdSFelipe Balbi if (lsr & UART_LSR_BI) { 51572256cbdSFelipe Balbi flag = TTY_BREAK; 51672256cbdSFelipe Balbi lsr &= ~(UART_LSR_FE | UART_LSR_PE); 51772256cbdSFelipe Balbi up->port.icount.brk++; 51872256cbdSFelipe Balbi /* 51972256cbdSFelipe Balbi * We do the SysRQ and SAK checking 52072256cbdSFelipe Balbi * here because otherwise the break 52172256cbdSFelipe Balbi * may get masked by ignore_status_mask 52272256cbdSFelipe Balbi * or read_status_mask. 52372256cbdSFelipe Balbi */ 52472256cbdSFelipe Balbi if (uart_handle_break(&up->port)) 52572256cbdSFelipe Balbi return; 52672256cbdSFelipe Balbi 52772256cbdSFelipe Balbi } 52872256cbdSFelipe Balbi 52972256cbdSFelipe Balbi if (lsr & UART_LSR_PE) { 53072256cbdSFelipe Balbi flag = TTY_PARITY; 53172256cbdSFelipe Balbi up->port.icount.parity++; 53272256cbdSFelipe Balbi } 53372256cbdSFelipe Balbi 53472256cbdSFelipe Balbi if (lsr & UART_LSR_FE) { 53572256cbdSFelipe Balbi flag = TTY_FRAME; 53672256cbdSFelipe Balbi up->port.icount.frame++; 53772256cbdSFelipe Balbi } 53872256cbdSFelipe Balbi 53972256cbdSFelipe Balbi if (lsr & UART_LSR_OE) 54072256cbdSFelipe Balbi up->port.icount.overrun++; 54172256cbdSFelipe Balbi 54272256cbdSFelipe Balbi #ifdef CONFIG_SERIAL_OMAP_CONSOLE 54372256cbdSFelipe Balbi if (up->port.line == up->port.cons->index) { 54472256cbdSFelipe Balbi /* Recover the break flag from console xmit */ 54572256cbdSFelipe Balbi lsr |= up->lsr_break_flag; 54672256cbdSFelipe Balbi } 54772256cbdSFelipe Balbi #endif 54872256cbdSFelipe Balbi uart_insert_char(&up->port, lsr, UART_LSR_OE, 0, flag); 54972256cbdSFelipe Balbi } 55072256cbdSFelipe Balbi 55172256cbdSFelipe Balbi static void serial_omap_rdi(struct uart_omap_port *up, unsigned int lsr) 55272256cbdSFelipe Balbi { 55372256cbdSFelipe Balbi unsigned char ch = 0; 55472256cbdSFelipe Balbi unsigned int flag; 55572256cbdSFelipe Balbi 55672256cbdSFelipe Balbi if (!(lsr & UART_LSR_DR)) 55772256cbdSFelipe Balbi return; 55872256cbdSFelipe Balbi 55972256cbdSFelipe Balbi ch = serial_in(up, UART_RX); 56072256cbdSFelipe Balbi flag = TTY_NORMAL; 56172256cbdSFelipe Balbi up->port.icount.rx++; 56272256cbdSFelipe Balbi 56372256cbdSFelipe Balbi if (uart_handle_sysrq_char(&up->port, ch)) 56472256cbdSFelipe Balbi return; 56572256cbdSFelipe Balbi 56672256cbdSFelipe Balbi uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag); 56772256cbdSFelipe Balbi } 56872256cbdSFelipe Balbi 569ab4382d2SGreg Kroah-Hartman /** 570ab4382d2SGreg Kroah-Hartman * serial_omap_irq() - This handles the interrupt from one port 571ab4382d2SGreg Kroah-Hartman * @irq: uart port irq number 572ab4382d2SGreg Kroah-Hartman * @dev_id: uart port info 573ab4382d2SGreg Kroah-Hartman */ 57452c5513dSFelipe Balbi static irqreturn_t serial_omap_irq(int irq, void *dev_id) 575ab4382d2SGreg Kroah-Hartman { 576ab4382d2SGreg Kroah-Hartman struct uart_omap_port *up = dev_id; 577ab4382d2SGreg Kroah-Hartman unsigned int iir, lsr; 57881b75aefSFelipe Balbi unsigned int type; 5797b013e44SGreg Kroah-Hartman irqreturn_t ret = IRQ_NONE; 58072256cbdSFelipe Balbi int max_count = 256; 581ab4382d2SGreg Kroah-Hartman 5826c3a30c7SFelipe Balbi spin_lock(&up->port.lock); 58381b75aefSFelipe Balbi pm_runtime_get_sync(up->dev); 58472256cbdSFelipe Balbi 58572256cbdSFelipe Balbi do { 58681b75aefSFelipe Balbi iir = serial_in(up, UART_IIR); 58781b75aefSFelipe Balbi if (iir & UART_IIR_NO_INT) 58872256cbdSFelipe Balbi break; 58981b75aefSFelipe Balbi 5907b013e44SGreg Kroah-Hartman ret = IRQ_HANDLED; 591ab4382d2SGreg Kroah-Hartman lsr = serial_in(up, UART_LSR); 59281b75aefSFelipe Balbi 59381b75aefSFelipe Balbi /* extract IRQ type from IIR register */ 59481b75aefSFelipe Balbi type = iir & 0x3e; 59581b75aefSFelipe Balbi 59681b75aefSFelipe Balbi switch (type) { 59781b75aefSFelipe Balbi case UART_IIR_MSI: 59881b75aefSFelipe Balbi check_modem_status(up); 59981b75aefSFelipe Balbi break; 60081b75aefSFelipe Balbi case UART_IIR_THRI: 601bf63a086SFelipe Balbi transmit_chars(up, lsr); 60281b75aefSFelipe Balbi break; 60372256cbdSFelipe Balbi case UART_IIR_RX_TIMEOUT: 60472256cbdSFelipe Balbi /* FALLTHROUGH */ 60581b75aefSFelipe Balbi case UART_IIR_RDI: 60672256cbdSFelipe Balbi serial_omap_rdi(up, lsr); 60781b75aefSFelipe Balbi break; 60881b75aefSFelipe Balbi case UART_IIR_RLSI: 60972256cbdSFelipe Balbi serial_omap_rlsi(up, lsr); 61081b75aefSFelipe Balbi break; 61181b75aefSFelipe Balbi case UART_IIR_CTS_RTS_DSR: 61272256cbdSFelipe Balbi /* simply try again */ 61372256cbdSFelipe Balbi break; 61481b75aefSFelipe Balbi case UART_IIR_XOFF: 61581b75aefSFelipe Balbi /* FALLTHROUGH */ 61681b75aefSFelipe Balbi default: 61781b75aefSFelipe Balbi break; 618ab4382d2SGreg Kroah-Hartman } 61972256cbdSFelipe Balbi } while (!(iir & UART_IIR_NO_INT) && max_count--); 620ab4382d2SGreg Kroah-Hartman 6216c3a30c7SFelipe Balbi spin_unlock(&up->port.lock); 62272256cbdSFelipe Balbi 6232e124b4aSJiri Slaby tty_flip_buffer_push(&up->port.state->port); 62472256cbdSFelipe Balbi 625d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 626d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 627ab4382d2SGreg Kroah-Hartman up->port_activity = jiffies; 62881b75aefSFelipe Balbi 6297b013e44SGreg Kroah-Hartman return ret; 630ab4382d2SGreg Kroah-Hartman } 631ab4382d2SGreg Kroah-Hartman 632ab4382d2SGreg Kroah-Hartman static unsigned int serial_omap_tx_empty(struct uart_port *port) 633ab4382d2SGreg Kroah-Hartman { 634c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 635ab4382d2SGreg Kroah-Hartman unsigned long flags = 0; 636ab4382d2SGreg Kroah-Hartman unsigned int ret = 0; 637ab4382d2SGreg Kroah-Hartman 638d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 639ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_tx_empty+%d\n", up->port.line); 640ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags); 641ab4382d2SGreg Kroah-Hartman ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0; 642ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags); 643660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 644660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 645ab4382d2SGreg Kroah-Hartman return ret; 646ab4382d2SGreg Kroah-Hartman } 647ab4382d2SGreg Kroah-Hartman 648ab4382d2SGreg Kroah-Hartman static unsigned int serial_omap_get_mctrl(struct uart_port *port) 649ab4382d2SGreg Kroah-Hartman { 650c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 651514f31d1SShubhrajyoti D unsigned int status; 652ab4382d2SGreg Kroah-Hartman unsigned int ret = 0; 653ab4382d2SGreg Kroah-Hartman 654d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 655ab4382d2SGreg Kroah-Hartman status = check_modem_status(up); 656660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 657660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 658fcdca757SGovindraj.R 659ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_get_mctrl+%d\n", up->port.line); 660ab4382d2SGreg Kroah-Hartman 661ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DCD) 662ab4382d2SGreg Kroah-Hartman ret |= TIOCM_CAR; 663ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_RI) 664ab4382d2SGreg Kroah-Hartman ret |= TIOCM_RNG; 665ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DSR) 666ab4382d2SGreg Kroah-Hartman ret |= TIOCM_DSR; 667ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_CTS) 668ab4382d2SGreg Kroah-Hartman ret |= TIOCM_CTS; 669ab4382d2SGreg Kroah-Hartman return ret; 670ab4382d2SGreg Kroah-Hartman } 671ab4382d2SGreg Kroah-Hartman 672ab4382d2SGreg Kroah-Hartman static void serial_omap_set_mctrl(struct uart_port *port, unsigned int mctrl) 673ab4382d2SGreg Kroah-Hartman { 674c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 6759363f8faSRussell King unsigned char mcr = 0, old_mcr; 676ab4382d2SGreg Kroah-Hartman 677ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_set_mctrl+%d\n", up->port.line); 678ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_RTS) 679ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_RTS; 680ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_DTR) 681ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_DTR; 682ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_OUT1) 683ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_OUT1; 684ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_OUT2) 685ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_OUT2; 686ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_LOOP) 687ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_LOOP; 688ab4382d2SGreg Kroah-Hartman 689d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 6909363f8faSRussell King old_mcr = serial_in(up, UART_MCR); 6919363f8faSRussell King old_mcr &= ~(UART_MCR_LOOP | UART_MCR_OUT2 | UART_MCR_OUT1 | 6929363f8faSRussell King UART_MCR_DTR | UART_MCR_RTS); 6939363f8faSRussell King up->mcr = old_mcr | mcr; 694c538d20cSGovindraj.R serial_out(up, UART_MCR, up->mcr); 695660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 696660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 6979574f36fSNeilBrown 6989574f36fSNeilBrown if (gpio_is_valid(up->DTR_gpio) && 6999574f36fSNeilBrown !!(mctrl & TIOCM_DTR) != up->DTR_active) { 7009574f36fSNeilBrown up->DTR_active = !up->DTR_active; 7019574f36fSNeilBrown if (gpio_cansleep(up->DTR_gpio)) 7029574f36fSNeilBrown schedule_work(&up->qos_work); 7039574f36fSNeilBrown else 7049574f36fSNeilBrown gpio_set_value(up->DTR_gpio, 7059574f36fSNeilBrown up->DTR_active != up->DTR_inverted); 7069574f36fSNeilBrown } 707ab4382d2SGreg Kroah-Hartman } 708ab4382d2SGreg Kroah-Hartman 709ab4382d2SGreg Kroah-Hartman static void serial_omap_break_ctl(struct uart_port *port, int break_state) 710ab4382d2SGreg Kroah-Hartman { 711c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 712ab4382d2SGreg Kroah-Hartman unsigned long flags = 0; 713ab4382d2SGreg Kroah-Hartman 714ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_break_ctl+%d\n", up->port.line); 715d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 716ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags); 717ab4382d2SGreg Kroah-Hartman if (break_state == -1) 718ab4382d2SGreg Kroah-Hartman up->lcr |= UART_LCR_SBC; 719ab4382d2SGreg Kroah-Hartman else 720ab4382d2SGreg Kroah-Hartman up->lcr &= ~UART_LCR_SBC; 721ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, up->lcr); 722ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags); 723660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 724660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 725ab4382d2SGreg Kroah-Hartman } 726ab4382d2SGreg Kroah-Hartman 727ab4382d2SGreg Kroah-Hartman static int serial_omap_startup(struct uart_port *port) 728ab4382d2SGreg Kroah-Hartman { 729c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 730ab4382d2SGreg Kroah-Hartman unsigned long flags = 0; 731ab4382d2SGreg Kroah-Hartman int retval; 732ab4382d2SGreg Kroah-Hartman 733ab4382d2SGreg Kroah-Hartman /* 734ab4382d2SGreg Kroah-Hartman * Allocate the IRQ 735ab4382d2SGreg Kroah-Hartman */ 736ab4382d2SGreg Kroah-Hartman retval = request_irq(up->port.irq, serial_omap_irq, up->port.irqflags, 737ab4382d2SGreg Kroah-Hartman up->name, up); 738ab4382d2SGreg Kroah-Hartman if (retval) 739ab4382d2SGreg Kroah-Hartman return retval; 740ab4382d2SGreg Kroah-Hartman 7412a0b965cSTony Lindgren /* Optional wake-up IRQ */ 7422a0b965cSTony Lindgren if (up->wakeirq) { 7432a0b965cSTony Lindgren retval = request_irq(up->wakeirq, serial_omap_irq, 7442a0b965cSTony Lindgren up->port.irqflags, up->name, up); 7452a0b965cSTony Lindgren if (retval) { 7462a0b965cSTony Lindgren free_irq(up->port.irq, up); 7472a0b965cSTony Lindgren return retval; 7482a0b965cSTony Lindgren } 7492a0b965cSTony Lindgren disable_irq(up->wakeirq); 7502a0b965cSTony Lindgren } 7512a0b965cSTony Lindgren 752ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_startup+%d\n", up->port.line); 753ab4382d2SGreg Kroah-Hartman 754d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 755ab4382d2SGreg Kroah-Hartman /* 756ab4382d2SGreg Kroah-Hartman * Clear the FIFO buffers and disable them. 757ab4382d2SGreg Kroah-Hartman * (they will be reenabled in set_termios()) 758ab4382d2SGreg Kroah-Hartman */ 759ab4382d2SGreg Kroah-Hartman serial_omap_clear_fifos(up); 760ab4382d2SGreg Kroah-Hartman /* For Hardware flow control */ 761ab4382d2SGreg Kroah-Hartman serial_out(up, UART_MCR, UART_MCR_RTS); 762ab4382d2SGreg Kroah-Hartman 763ab4382d2SGreg Kroah-Hartman /* 764ab4382d2SGreg Kroah-Hartman * Clear the interrupt registers. 765ab4382d2SGreg Kroah-Hartman */ 766ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_LSR); 767ab4382d2SGreg Kroah-Hartman if (serial_in(up, UART_LSR) & UART_LSR_DR) 768ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_RX); 769ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_IIR); 770ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_MSR); 771ab4382d2SGreg Kroah-Hartman 772ab4382d2SGreg Kroah-Hartman /* 773ab4382d2SGreg Kroah-Hartman * Now, initialize the UART 774ab4382d2SGreg Kroah-Hartman */ 775ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_WLEN8); 776ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags); 777ab4382d2SGreg Kroah-Hartman /* 778ab4382d2SGreg Kroah-Hartman * Most PC uarts need OUT2 raised to enable interrupts. 779ab4382d2SGreg Kroah-Hartman */ 780ab4382d2SGreg Kroah-Hartman up->port.mctrl |= TIOCM_OUT2; 781ab4382d2SGreg Kroah-Hartman serial_omap_set_mctrl(&up->port, up->port.mctrl); 782ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags); 783ab4382d2SGreg Kroah-Hartman 784ab4382d2SGreg Kroah-Hartman up->msr_saved_flags = 0; 785ab4382d2SGreg Kroah-Hartman /* 786ab4382d2SGreg Kroah-Hartman * Finally, enable interrupts. Note: Modem status interrupts 787ab4382d2SGreg Kroah-Hartman * are set via set_termios(), which will be occurring imminently 788ab4382d2SGreg Kroah-Hartman * anyway, so we don't enable them here. 789ab4382d2SGreg Kroah-Hartman */ 790ab4382d2SGreg Kroah-Hartman up->ier = UART_IER_RLSI | UART_IER_RDI; 791ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 792ab4382d2SGreg Kroah-Hartman 79378841462SJarkko Nikula /* Enable module level wake up */ 794f64ffda6SGovindraj.R up->wer = OMAP_UART_WER_MOD_WKUP; 795f64ffda6SGovindraj.R if (up->features & OMAP_UART_WER_HAS_TX_WAKEUP) 796f64ffda6SGovindraj.R up->wer |= OMAP_UART_TX_WAKEUP_EN; 797f64ffda6SGovindraj.R 798f64ffda6SGovindraj.R serial_out(up, UART_OMAP_WER, up->wer); 79978841462SJarkko Nikula 800d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 801d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 802ab4382d2SGreg Kroah-Hartman up->port_activity = jiffies; 803ab4382d2SGreg Kroah-Hartman return 0; 804ab4382d2SGreg Kroah-Hartman } 805ab4382d2SGreg Kroah-Hartman 806ab4382d2SGreg Kroah-Hartman static void serial_omap_shutdown(struct uart_port *port) 807ab4382d2SGreg Kroah-Hartman { 808c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 809ab4382d2SGreg Kroah-Hartman unsigned long flags = 0; 810ab4382d2SGreg Kroah-Hartman 811ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_shutdown+%d\n", up->port.line); 812fcdca757SGovindraj.R 813d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 814ab4382d2SGreg Kroah-Hartman /* 815ab4382d2SGreg Kroah-Hartman * Disable interrupts from this port 816ab4382d2SGreg Kroah-Hartman */ 817ab4382d2SGreg Kroah-Hartman up->ier = 0; 818ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, 0); 819ab4382d2SGreg Kroah-Hartman 820ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags); 821ab4382d2SGreg Kroah-Hartman up->port.mctrl &= ~TIOCM_OUT2; 822ab4382d2SGreg Kroah-Hartman serial_omap_set_mctrl(&up->port, up->port.mctrl); 823ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags); 824ab4382d2SGreg Kroah-Hartman 825ab4382d2SGreg Kroah-Hartman /* 826ab4382d2SGreg Kroah-Hartman * Disable break condition and FIFOs 827ab4382d2SGreg Kroah-Hartman */ 828ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC); 829ab4382d2SGreg Kroah-Hartman serial_omap_clear_fifos(up); 830ab4382d2SGreg Kroah-Hartman 831ab4382d2SGreg Kroah-Hartman /* 832ab4382d2SGreg Kroah-Hartman * Read data port to reset things, and then free the irq 833ab4382d2SGreg Kroah-Hartman */ 834ab4382d2SGreg Kroah-Hartman if (serial_in(up, UART_LSR) & UART_LSR_DR) 835ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_RX); 836fcdca757SGovindraj.R 837660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 838660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 839ab4382d2SGreg Kroah-Hartman free_irq(up->port.irq, up); 8402a0b965cSTony Lindgren if (up->wakeirq) 8412a0b965cSTony Lindgren free_irq(up->wakeirq, up); 842ab4382d2SGreg Kroah-Hartman } 843ab4382d2SGreg Kroah-Hartman 8442fd14964SGovindraj.R static void serial_omap_uart_qos_work(struct work_struct *work) 8452fd14964SGovindraj.R { 8462fd14964SGovindraj.R struct uart_omap_port *up = container_of(work, struct uart_omap_port, 8472fd14964SGovindraj.R qos_work); 8482fd14964SGovindraj.R 8492fd14964SGovindraj.R pm_qos_update_request(&up->pm_qos_request, up->latency); 8509574f36fSNeilBrown if (gpio_is_valid(up->DTR_gpio)) 8519574f36fSNeilBrown gpio_set_value_cansleep(up->DTR_gpio, 8529574f36fSNeilBrown up->DTR_active != up->DTR_inverted); 8532fd14964SGovindraj.R } 8542fd14964SGovindraj.R 855ab4382d2SGreg Kroah-Hartman static void 856ab4382d2SGreg Kroah-Hartman serial_omap_set_termios(struct uart_port *port, struct ktermios *termios, 857ab4382d2SGreg Kroah-Hartman struct ktermios *old) 858ab4382d2SGreg Kroah-Hartman { 859c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 860ab4382d2SGreg Kroah-Hartman unsigned char cval = 0; 861ab4382d2SGreg Kroah-Hartman unsigned long flags = 0; 862ab4382d2SGreg Kroah-Hartman unsigned int baud, quot; 863ab4382d2SGreg Kroah-Hartman 864ab4382d2SGreg Kroah-Hartman switch (termios->c_cflag & CSIZE) { 865ab4382d2SGreg Kroah-Hartman case CS5: 866ab4382d2SGreg Kroah-Hartman cval = UART_LCR_WLEN5; 867ab4382d2SGreg Kroah-Hartman break; 868ab4382d2SGreg Kroah-Hartman case CS6: 869ab4382d2SGreg Kroah-Hartman cval = UART_LCR_WLEN6; 870ab4382d2SGreg Kroah-Hartman break; 871ab4382d2SGreg Kroah-Hartman case CS7: 872ab4382d2SGreg Kroah-Hartman cval = UART_LCR_WLEN7; 873ab4382d2SGreg Kroah-Hartman break; 874ab4382d2SGreg Kroah-Hartman default: 875ab4382d2SGreg Kroah-Hartman case CS8: 876ab4382d2SGreg Kroah-Hartman cval = UART_LCR_WLEN8; 877ab4382d2SGreg Kroah-Hartman break; 878ab4382d2SGreg Kroah-Hartman } 879ab4382d2SGreg Kroah-Hartman 880ab4382d2SGreg Kroah-Hartman if (termios->c_cflag & CSTOPB) 881ab4382d2SGreg Kroah-Hartman cval |= UART_LCR_STOP; 882ab4382d2SGreg Kroah-Hartman if (termios->c_cflag & PARENB) 883ab4382d2SGreg Kroah-Hartman cval |= UART_LCR_PARITY; 884ab4382d2SGreg Kroah-Hartman if (!(termios->c_cflag & PARODD)) 885ab4382d2SGreg Kroah-Hartman cval |= UART_LCR_EPAR; 886fdbc7353SEnric Balletbo i Serra if (termios->c_cflag & CMSPAR) 887fdbc7353SEnric Balletbo i Serra cval |= UART_LCR_SPAR; 888ab4382d2SGreg Kroah-Hartman 889ab4382d2SGreg Kroah-Hartman /* 890ab4382d2SGreg Kroah-Hartman * Ask the core to calculate the divisor for us. 891ab4382d2SGreg Kroah-Hartman */ 892ab4382d2SGreg Kroah-Hartman 893ab4382d2SGreg Kroah-Hartman baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/13); 894ab4382d2SGreg Kroah-Hartman quot = serial_omap_get_divisor(port, baud); 895ab4382d2SGreg Kroah-Hartman 8962fd14964SGovindraj.R /* calculate wakeup latency constraint */ 89719723452SPaul Walmsley up->calc_latency = (USEC_PER_SEC * up->port.fifosize) / (baud / 8); 8982fd14964SGovindraj.R up->latency = up->calc_latency; 8992fd14964SGovindraj.R schedule_work(&up->qos_work); 9002fd14964SGovindraj.R 901c538d20cSGovindraj.R up->dll = quot & 0xff; 902c538d20cSGovindraj.R up->dlh = quot >> 8; 903c538d20cSGovindraj.R up->mdr1 = UART_OMAP_MDR1_DISABLE; 904c538d20cSGovindraj.R 905ab4382d2SGreg Kroah-Hartman up->fcr = UART_FCR_R_TRIG_01 | UART_FCR_T_TRIG_01 | 906ab4382d2SGreg Kroah-Hartman UART_FCR_ENABLE_FIFO; 907ab4382d2SGreg Kroah-Hartman 908ab4382d2SGreg Kroah-Hartman /* 909ab4382d2SGreg Kroah-Hartman * Ok, we're now changing the port state. Do it with 910ab4382d2SGreg Kroah-Hartman * interrupts disabled. 911ab4382d2SGreg Kroah-Hartman */ 912d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 913ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags); 914ab4382d2SGreg Kroah-Hartman 915ab4382d2SGreg Kroah-Hartman /* 916ab4382d2SGreg Kroah-Hartman * Update the per-port timeout. 917ab4382d2SGreg Kroah-Hartman */ 918ab4382d2SGreg Kroah-Hartman uart_update_timeout(port, termios->c_cflag, baud); 919ab4382d2SGreg Kroah-Hartman 920ab4382d2SGreg Kroah-Hartman up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; 921ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & INPCK) 922ab4382d2SGreg Kroah-Hartman up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE; 923ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & (BRKINT | PARMRK)) 924ab4382d2SGreg Kroah-Hartman up->port.read_status_mask |= UART_LSR_BI; 925ab4382d2SGreg Kroah-Hartman 926ab4382d2SGreg Kroah-Hartman /* 927ab4382d2SGreg Kroah-Hartman * Characters to ignore 928ab4382d2SGreg Kroah-Hartman */ 929ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask = 0; 930ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IGNPAR) 931ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE; 932ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IGNBRK) { 933ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask |= UART_LSR_BI; 934ab4382d2SGreg Kroah-Hartman /* 935ab4382d2SGreg Kroah-Hartman * If we're ignoring parity and break indicators, 936ab4382d2SGreg Kroah-Hartman * ignore overruns too (for real raw support). 937ab4382d2SGreg Kroah-Hartman */ 938ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IGNPAR) 939ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask |= UART_LSR_OE; 940ab4382d2SGreg Kroah-Hartman } 941ab4382d2SGreg Kroah-Hartman 942ab4382d2SGreg Kroah-Hartman /* 943ab4382d2SGreg Kroah-Hartman * ignore all characters if CREAD is not set 944ab4382d2SGreg Kroah-Hartman */ 945ab4382d2SGreg Kroah-Hartman if ((termios->c_cflag & CREAD) == 0) 946ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask |= UART_LSR_DR; 947ab4382d2SGreg Kroah-Hartman 948ab4382d2SGreg Kroah-Hartman /* 949ab4382d2SGreg Kroah-Hartman * Modem status interrupts 950ab4382d2SGreg Kroah-Hartman */ 951ab4382d2SGreg Kroah-Hartman up->ier &= ~UART_IER_MSI; 952ab4382d2SGreg Kroah-Hartman if (UART_ENABLE_MS(&up->port, termios->c_cflag)) 953ab4382d2SGreg Kroah-Hartman up->ier |= UART_IER_MSI; 954ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 955ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, cval); /* reset DLAB */ 956c538d20cSGovindraj.R up->lcr = cval; 9571776fd05SAlexey Pelykh up->scr = 0; 958ab4382d2SGreg Kroah-Hartman 959ab4382d2SGreg Kroah-Hartman /* FIFOs and DMA Settings */ 960ab4382d2SGreg Kroah-Hartman 961ab4382d2SGreg Kroah-Hartman /* FCR can be changed only when the 962ab4382d2SGreg Kroah-Hartman * baud clock is not running 963ab4382d2SGreg Kroah-Hartman * DLL_REG and DLH_REG set to 0. 964ab4382d2SGreg Kroah-Hartman */ 965ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 966ab4382d2SGreg Kroah-Hartman serial_out(up, UART_DLL, 0); 967ab4382d2SGreg Kroah-Hartman serial_out(up, UART_DLM, 0); 968ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0); 969ab4382d2SGreg Kroah-Hartman 970ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 971ab4382d2SGreg Kroah-Hartman 97208bd4903SRussell King up->efr = serial_in(up, UART_EFR) & ~UART_EFR_ECB; 973d864c03bSRussell King up->efr &= ~UART_EFR_SCD; 974ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); 975ab4382d2SGreg Kroah-Hartman 976ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 97708bd4903SRussell King up->mcr = serial_in(up, UART_MCR) & ~UART_MCR_TCRTLR; 978ab4382d2SGreg Kroah-Hartman serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR); 979ab4382d2SGreg Kroah-Hartman /* FIFO ENABLE, DMA MODE */ 9800ba5f668SPaul Walmsley 9811f663966SAlexey Pelykh up->scr |= OMAP_UART_SCR_RX_TRIG_GRANU1_MASK; 9821f663966SAlexey Pelykh /* 9831f663966SAlexey Pelykh * NOTE: Setting OMAP_UART_SCR_RX_TRIG_GRANU1_MASK 9841f663966SAlexey Pelykh * sets Enables the granularity of 1 for TRIGGER RX 9851f663966SAlexey Pelykh * level. Along with setting RX FIFO trigger level 9861f663966SAlexey Pelykh * to 1 (as noted below, 16 characters) and TLR[3:0] 9871f663966SAlexey Pelykh * to zero this will result RX FIFO threshold level 9881f663966SAlexey Pelykh * to 1 character, instead of 16 as noted in comment 9891f663966SAlexey Pelykh * below. 9901f663966SAlexey Pelykh */ 9911f663966SAlexey Pelykh 9926721ab7fSFelipe Balbi /* Set receive FIFO threshold to 16 characters and 993018e7448SPhilippe Proulx * transmit FIFO threshold to 32 spaces 9946721ab7fSFelipe Balbi */ 9950ba5f668SPaul Walmsley up->fcr &= ~OMAP_UART_FCR_RX_FIFO_TRIG_MASK; 9966721ab7fSFelipe Balbi up->fcr &= ~OMAP_UART_FCR_TX_FIFO_TRIG_MASK; 9976721ab7fSFelipe Balbi up->fcr |= UART_FCR6_R_TRIGGER_16 | UART_FCR6_T_TRIGGER_24 | 9986721ab7fSFelipe Balbi UART_FCR_ENABLE_FIFO; 9998a74e9ffSGreg Kroah-Hartman 10000ba5f668SPaul Walmsley serial_out(up, UART_FCR, up->fcr); 10010ba5f668SPaul Walmsley serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 10020ba5f668SPaul Walmsley 1003c538d20cSGovindraj.R serial_out(up, UART_OMAP_SCR, up->scr); 1004c538d20cSGovindraj.R 100508bd4903SRussell King /* Reset UART_MCR_TCRTLR: this must be done with the EFR_ECB bit set */ 1006ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 1007ab4382d2SGreg Kroah-Hartman serial_out(up, UART_MCR, up->mcr); 100808bd4903SRussell King serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 100908bd4903SRussell King serial_out(up, UART_EFR, up->efr); 101008bd4903SRussell King serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 1011ab4382d2SGreg Kroah-Hartman 1012ab4382d2SGreg Kroah-Hartman /* Protocol, Baud Rate, and Interrupt Settings */ 1013ab4382d2SGreg Kroah-Hartman 101494734749SGovindraj.R if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) 101594734749SGovindraj.R serial_omap_mdr1_errataset(up, up->mdr1); 101694734749SGovindraj.R else 1017c538d20cSGovindraj.R serial_out(up, UART_OMAP_MDR1, up->mdr1); 101894734749SGovindraj.R 1019ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 1020ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); 1021ab4382d2SGreg Kroah-Hartman 1022ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0); 1023ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, 0); 1024ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 1025ab4382d2SGreg Kroah-Hartman 1026c538d20cSGovindraj.R serial_out(up, UART_DLL, up->dll); /* LS of divisor */ 1027c538d20cSGovindraj.R serial_out(up, UART_DLM, up->dlh); /* MS of divisor */ 1028ab4382d2SGreg Kroah-Hartman 1029ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0); 1030ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 1031ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 1032ab4382d2SGreg Kroah-Hartman 1033ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, up->efr); 1034ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, cval); 1035ab4382d2SGreg Kroah-Hartman 10365fe21236SAlexey Pelykh if (!serial_omap_baud_is_mode16(port, baud)) 1037c538d20cSGovindraj.R up->mdr1 = UART_OMAP_MDR1_13X_MODE; 1038ab4382d2SGreg Kroah-Hartman else 1039c538d20cSGovindraj.R up->mdr1 = UART_OMAP_MDR1_16X_MODE; 1040c538d20cSGovindraj.R 104194734749SGovindraj.R if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) 104294734749SGovindraj.R serial_omap_mdr1_errataset(up, up->mdr1); 104394734749SGovindraj.R else 1044c538d20cSGovindraj.R serial_out(up, UART_OMAP_MDR1, up->mdr1); 1045ab4382d2SGreg Kroah-Hartman 1046c533e51bSRussell King /* Configure flow control */ 104708bd4903SRussell King serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 1048ab4382d2SGreg Kroah-Hartman 1049c533e51bSRussell King /* XON1/XOFF1 accessible mode B, TCRTLR=0, ECB=0 */ 1050c533e51bSRussell King serial_out(up, UART_XON1, termios->c_cc[VSTART]); 1051c533e51bSRussell King serial_out(up, UART_XOFF1, termios->c_cc[VSTOP]); 1052c533e51bSRussell King 1053c533e51bSRussell King /* Enable access to TCR/TLR */ 105408bd4903SRussell King serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); 1055ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 1056ab4382d2SGreg Kroah-Hartman serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR); 1057ab4382d2SGreg Kroah-Hartman 1058ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TI752_TCR, OMAP_UART_TCR_TRIG); 105908bd4903SRussell King 1060c7d059caSRussell King if (termios->c_cflag & CRTSCTS && up->port.flags & UPF_HARD_FLOW) { 106108bd4903SRussell King /* Enable AUTORTS and AUTOCTS */ 106208bd4903SRussell King up->efr |= UART_EFR_CTS | UART_EFR_RTS; 106308bd4903SRussell King 10641fe8aa88SRussell King /* Ensure MCR RTS is asserted */ 10651fe8aa88SRussell King up->mcr |= UART_MCR_RTS; 10660d5b1663SRussell King } else { 10670d5b1663SRussell King /* Disable AUTORTS and AUTOCTS */ 10680d5b1663SRussell King up->efr &= ~(UART_EFR_CTS | UART_EFR_RTS); 1069ab4382d2SGreg Kroah-Hartman } 1070ab4382d2SGreg Kroah-Hartman 107101d70bb3SRussell King if (up->port.flags & UPF_SOFT_FLOW) { 107201d70bb3SRussell King /* clear SW control mode bits */ 107301d70bb3SRussell King up->efr &= OMAP_UART_SW_CLR; 107401d70bb3SRussell King 107501d70bb3SRussell King /* 107601d70bb3SRussell King * IXON Flag: 107701d70bb3SRussell King * Enable XON/XOFF flow control on input. 107801d70bb3SRussell King * Receiver compares XON1, XOFF1. 107901d70bb3SRussell King */ 10803af08bd7SRussell King if (termios->c_iflag & IXON) 108101d70bb3SRussell King up->efr |= OMAP_UART_SW_RX; 108201d70bb3SRussell King 108301d70bb3SRussell King /* 10843af08bd7SRussell King * IXOFF Flag: 10853af08bd7SRussell King * Enable XON/XOFF flow control on output. 10863af08bd7SRussell King * Transmit XON1, XOFF1 10873af08bd7SRussell King */ 10883af08bd7SRussell King if (termios->c_iflag & IXOFF) 10893af08bd7SRussell King up->efr |= OMAP_UART_SW_TX; 10903af08bd7SRussell King 10913af08bd7SRussell King /* 109201d70bb3SRussell King * IXANY Flag: 109301d70bb3SRussell King * Enable any character to restart output. 109401d70bb3SRussell King * Operation resumes after receiving any 109501d70bb3SRussell King * character after recognition of the XOFF character 109601d70bb3SRussell King */ 109701d70bb3SRussell King if (termios->c_iflag & IXANY) 109801d70bb3SRussell King up->mcr |= UART_MCR_XONANY; 109901d70bb3SRussell King else 110001d70bb3SRussell King up->mcr &= ~UART_MCR_XONANY; 110118f360f8SRussell King } 1102c7d059caSRussell King serial_out(up, UART_MCR, up->mcr); 110301d70bb3SRussell King serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 110401d70bb3SRussell King serial_out(up, UART_EFR, up->efr); 110501d70bb3SRussell King serial_out(up, UART_LCR, up->lcr); 1106ab4382d2SGreg Kroah-Hartman 1107ab4382d2SGreg Kroah-Hartman serial_omap_set_mctrl(&up->port, up->port.mctrl); 1108ab4382d2SGreg Kroah-Hartman 1109ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags); 1110660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 1111660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 1112ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_set_termios+%d\n", up->port.line); 1113ab4382d2SGreg Kroah-Hartman } 1114ab4382d2SGreg Kroah-Hartman 1115ab4382d2SGreg Kroah-Hartman static void 1116ab4382d2SGreg Kroah-Hartman serial_omap_pm(struct uart_port *port, unsigned int state, 1117ab4382d2SGreg Kroah-Hartman unsigned int oldstate) 1118ab4382d2SGreg Kroah-Hartman { 1119c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 1120ab4382d2SGreg Kroah-Hartman unsigned char efr; 1121ab4382d2SGreg Kroah-Hartman 1122ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_pm+%d\n", up->port.line); 1123fcdca757SGovindraj.R 1124d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 1125ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 1126ab4382d2SGreg Kroah-Hartman efr = serial_in(up, UART_EFR); 1127ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, efr | UART_EFR_ECB); 1128ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0); 1129ab4382d2SGreg Kroah-Hartman 1130ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, (state != 0) ? UART_IERX_SLEEP : 0); 1131ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 1132ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, efr); 1133ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0); 1134fcdca757SGovindraj.R 1135d8ee4ea6SFelipe Balbi if (!device_may_wakeup(up->dev)) { 1136fcdca757SGovindraj.R if (!state) 1137d8ee4ea6SFelipe Balbi pm_runtime_forbid(up->dev); 1138fcdca757SGovindraj.R else 1139d8ee4ea6SFelipe Balbi pm_runtime_allow(up->dev); 1140fcdca757SGovindraj.R } 1141fcdca757SGovindraj.R 1142660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 1143660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 1144ab4382d2SGreg Kroah-Hartman } 1145ab4382d2SGreg Kroah-Hartman 1146ab4382d2SGreg Kroah-Hartman static void serial_omap_release_port(struct uart_port *port) 1147ab4382d2SGreg Kroah-Hartman { 1148ab4382d2SGreg Kroah-Hartman dev_dbg(port->dev, "serial_omap_release_port+\n"); 1149ab4382d2SGreg Kroah-Hartman } 1150ab4382d2SGreg Kroah-Hartman 1151ab4382d2SGreg Kroah-Hartman static int serial_omap_request_port(struct uart_port *port) 1152ab4382d2SGreg Kroah-Hartman { 1153ab4382d2SGreg Kroah-Hartman dev_dbg(port->dev, "serial_omap_request_port+\n"); 1154ab4382d2SGreg Kroah-Hartman return 0; 1155ab4382d2SGreg Kroah-Hartman } 1156ab4382d2SGreg Kroah-Hartman 1157ab4382d2SGreg Kroah-Hartman static void serial_omap_config_port(struct uart_port *port, int flags) 1158ab4382d2SGreg Kroah-Hartman { 1159c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 1160ab4382d2SGreg Kroah-Hartman 1161ab4382d2SGreg Kroah-Hartman dev_dbg(up->port.dev, "serial_omap_config_port+%d\n", 1162ba77433dSRajendra Nayak up->port.line); 1163ab4382d2SGreg Kroah-Hartman up->port.type = PORT_OMAP; 11643af08bd7SRussell King up->port.flags |= UPF_SOFT_FLOW | UPF_HARD_FLOW; 1165ab4382d2SGreg Kroah-Hartman } 1166ab4382d2SGreg Kroah-Hartman 1167ab4382d2SGreg Kroah-Hartman static int 1168ab4382d2SGreg Kroah-Hartman serial_omap_verify_port(struct uart_port *port, struct serial_struct *ser) 1169ab4382d2SGreg Kroah-Hartman { 1170ab4382d2SGreg Kroah-Hartman /* we don't want the core code to modify any port params */ 1171ab4382d2SGreg Kroah-Hartman dev_dbg(port->dev, "serial_omap_verify_port+\n"); 1172ab4382d2SGreg Kroah-Hartman return -EINVAL; 1173ab4382d2SGreg Kroah-Hartman } 1174ab4382d2SGreg Kroah-Hartman 1175ab4382d2SGreg Kroah-Hartman static const char * 1176ab4382d2SGreg Kroah-Hartman serial_omap_type(struct uart_port *port) 1177ab4382d2SGreg Kroah-Hartman { 1178c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 1179ab4382d2SGreg Kroah-Hartman 1180ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_type+%d\n", up->port.line); 1181ab4382d2SGreg Kroah-Hartman return up->name; 1182ab4382d2SGreg Kroah-Hartman } 1183ab4382d2SGreg Kroah-Hartman 1184ab4382d2SGreg Kroah-Hartman #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE) 1185ab4382d2SGreg Kroah-Hartman 1186ab4382d2SGreg Kroah-Hartman static inline void wait_for_xmitr(struct uart_omap_port *up) 1187ab4382d2SGreg Kroah-Hartman { 1188ab4382d2SGreg Kroah-Hartman unsigned int status, tmout = 10000; 1189ab4382d2SGreg Kroah-Hartman 1190ab4382d2SGreg Kroah-Hartman /* Wait up to 10ms for the character(s) to be sent. */ 1191ab4382d2SGreg Kroah-Hartman do { 1192ab4382d2SGreg Kroah-Hartman status = serial_in(up, UART_LSR); 1193ab4382d2SGreg Kroah-Hartman 1194ab4382d2SGreg Kroah-Hartman if (status & UART_LSR_BI) 1195ab4382d2SGreg Kroah-Hartman up->lsr_break_flag = UART_LSR_BI; 1196ab4382d2SGreg Kroah-Hartman 1197ab4382d2SGreg Kroah-Hartman if (--tmout == 0) 1198ab4382d2SGreg Kroah-Hartman break; 1199ab4382d2SGreg Kroah-Hartman udelay(1); 1200ab4382d2SGreg Kroah-Hartman } while ((status & BOTH_EMPTY) != BOTH_EMPTY); 1201ab4382d2SGreg Kroah-Hartman 1202ab4382d2SGreg Kroah-Hartman /* Wait up to 1s for flow control if necessary */ 1203ab4382d2SGreg Kroah-Hartman if (up->port.flags & UPF_CONS_FLOW) { 1204ab4382d2SGreg Kroah-Hartman tmout = 1000000; 1205ab4382d2SGreg Kroah-Hartman for (tmout = 1000000; tmout; tmout--) { 1206ab4382d2SGreg Kroah-Hartman unsigned int msr = serial_in(up, UART_MSR); 1207ab4382d2SGreg Kroah-Hartman 1208ab4382d2SGreg Kroah-Hartman up->msr_saved_flags |= msr & MSR_SAVE_FLAGS; 1209ab4382d2SGreg Kroah-Hartman if (msr & UART_MSR_CTS) 1210ab4382d2SGreg Kroah-Hartman break; 1211ab4382d2SGreg Kroah-Hartman 1212ab4382d2SGreg Kroah-Hartman udelay(1); 1213ab4382d2SGreg Kroah-Hartman } 1214ab4382d2SGreg Kroah-Hartman } 1215ab4382d2SGreg Kroah-Hartman } 1216ab4382d2SGreg Kroah-Hartman 1217ab4382d2SGreg Kroah-Hartman #ifdef CONFIG_CONSOLE_POLL 1218ab4382d2SGreg Kroah-Hartman 1219ab4382d2SGreg Kroah-Hartman static void serial_omap_poll_put_char(struct uart_port *port, unsigned char ch) 1220ab4382d2SGreg Kroah-Hartman { 1221c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 1222fcdca757SGovindraj.R 1223d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 1224ab4382d2SGreg Kroah-Hartman wait_for_xmitr(up); 1225ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TX, ch); 1226660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 1227660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 1228ab4382d2SGreg Kroah-Hartman } 1229ab4382d2SGreg Kroah-Hartman 1230ab4382d2SGreg Kroah-Hartman static int serial_omap_poll_get_char(struct uart_port *port) 1231ab4382d2SGreg Kroah-Hartman { 1232c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 1233fcdca757SGovindraj.R unsigned int status; 1234ab4382d2SGreg Kroah-Hartman 1235d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 1236fcdca757SGovindraj.R status = serial_in(up, UART_LSR); 1237a6b19c33SFelipe Balbi if (!(status & UART_LSR_DR)) { 1238a6b19c33SFelipe Balbi status = NO_POLL_CHAR; 1239a6b19c33SFelipe Balbi goto out; 1240a6b19c33SFelipe Balbi } 1241ab4382d2SGreg Kroah-Hartman 1242fcdca757SGovindraj.R status = serial_in(up, UART_RX); 1243a6b19c33SFelipe Balbi 1244a6b19c33SFelipe Balbi out: 1245660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 1246660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 1247a6b19c33SFelipe Balbi 1248fcdca757SGovindraj.R return status; 1249ab4382d2SGreg Kroah-Hartman } 1250ab4382d2SGreg Kroah-Hartman 1251ab4382d2SGreg Kroah-Hartman #endif /* CONFIG_CONSOLE_POLL */ 1252ab4382d2SGreg Kroah-Hartman 1253ab4382d2SGreg Kroah-Hartman #ifdef CONFIG_SERIAL_OMAP_CONSOLE 1254ab4382d2SGreg Kroah-Hartman 125540477d0eSShubhrajyoti D static struct uart_omap_port *serial_omap_console_ports[OMAP_MAX_HSUART_PORTS]; 1256ab4382d2SGreg Kroah-Hartman 1257ab4382d2SGreg Kroah-Hartman static struct uart_driver serial_omap_reg; 1258ab4382d2SGreg Kroah-Hartman 1259ab4382d2SGreg Kroah-Hartman static void serial_omap_console_putchar(struct uart_port *port, int ch) 1260ab4382d2SGreg Kroah-Hartman { 1261c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 1262ab4382d2SGreg Kroah-Hartman 1263ab4382d2SGreg Kroah-Hartman wait_for_xmitr(up); 1264ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TX, ch); 1265ab4382d2SGreg Kroah-Hartman } 1266ab4382d2SGreg Kroah-Hartman 1267ab4382d2SGreg Kroah-Hartman static void 1268ab4382d2SGreg Kroah-Hartman serial_omap_console_write(struct console *co, const char *s, 1269ab4382d2SGreg Kroah-Hartman unsigned int count) 1270ab4382d2SGreg Kroah-Hartman { 1271ab4382d2SGreg Kroah-Hartman struct uart_omap_port *up = serial_omap_console_ports[co->index]; 1272ab4382d2SGreg Kroah-Hartman unsigned long flags; 1273ab4382d2SGreg Kroah-Hartman unsigned int ier; 1274ab4382d2SGreg Kroah-Hartman int locked = 1; 1275ab4382d2SGreg Kroah-Hartman 1276d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 1277fcdca757SGovindraj.R 1278ab4382d2SGreg Kroah-Hartman local_irq_save(flags); 1279ab4382d2SGreg Kroah-Hartman if (up->port.sysrq) 1280ab4382d2SGreg Kroah-Hartman locked = 0; 1281ab4382d2SGreg Kroah-Hartman else if (oops_in_progress) 1282ab4382d2SGreg Kroah-Hartman locked = spin_trylock(&up->port.lock); 1283ab4382d2SGreg Kroah-Hartman else 1284ab4382d2SGreg Kroah-Hartman spin_lock(&up->port.lock); 1285ab4382d2SGreg Kroah-Hartman 1286ab4382d2SGreg Kroah-Hartman /* 1287ab4382d2SGreg Kroah-Hartman * First save the IER then disable the interrupts 1288ab4382d2SGreg Kroah-Hartman */ 1289ab4382d2SGreg Kroah-Hartman ier = serial_in(up, UART_IER); 1290ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, 0); 1291ab4382d2SGreg Kroah-Hartman 1292ab4382d2SGreg Kroah-Hartman uart_console_write(&up->port, s, count, serial_omap_console_putchar); 1293ab4382d2SGreg Kroah-Hartman 1294ab4382d2SGreg Kroah-Hartman /* 1295ab4382d2SGreg Kroah-Hartman * Finally, wait for transmitter to become empty 1296ab4382d2SGreg Kroah-Hartman * and restore the IER 1297ab4382d2SGreg Kroah-Hartman */ 1298ab4382d2SGreg Kroah-Hartman wait_for_xmitr(up); 1299ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, ier); 1300ab4382d2SGreg Kroah-Hartman /* 1301ab4382d2SGreg Kroah-Hartman * The receive handling will happen properly because the 1302ab4382d2SGreg Kroah-Hartman * receive ready bit will still be set; it is not cleared 1303ab4382d2SGreg Kroah-Hartman * on read. However, modem control will not, we must 1304ab4382d2SGreg Kroah-Hartman * call it if we have saved something in the saved flags 1305ab4382d2SGreg Kroah-Hartman * while processing with interrupts off. 1306ab4382d2SGreg Kroah-Hartman */ 1307ab4382d2SGreg Kroah-Hartman if (up->msr_saved_flags) 1308ab4382d2SGreg Kroah-Hartman check_modem_status(up); 1309ab4382d2SGreg Kroah-Hartman 1310d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 1311d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 1312ab4382d2SGreg Kroah-Hartman if (locked) 1313ab4382d2SGreg Kroah-Hartman spin_unlock(&up->port.lock); 1314ab4382d2SGreg Kroah-Hartman local_irq_restore(flags); 1315ab4382d2SGreg Kroah-Hartman } 1316ab4382d2SGreg Kroah-Hartman 1317ab4382d2SGreg Kroah-Hartman static int __init 1318ab4382d2SGreg Kroah-Hartman serial_omap_console_setup(struct console *co, char *options) 1319ab4382d2SGreg Kroah-Hartman { 1320ab4382d2SGreg Kroah-Hartman struct uart_omap_port *up; 1321ab4382d2SGreg Kroah-Hartman int baud = 115200; 1322ab4382d2SGreg Kroah-Hartman int bits = 8; 1323ab4382d2SGreg Kroah-Hartman int parity = 'n'; 1324ab4382d2SGreg Kroah-Hartman int flow = 'n'; 1325ab4382d2SGreg Kroah-Hartman 1326ab4382d2SGreg Kroah-Hartman if (serial_omap_console_ports[co->index] == NULL) 1327ab4382d2SGreg Kroah-Hartman return -ENODEV; 1328ab4382d2SGreg Kroah-Hartman up = serial_omap_console_ports[co->index]; 1329ab4382d2SGreg Kroah-Hartman 1330ab4382d2SGreg Kroah-Hartman if (options) 1331ab4382d2SGreg Kroah-Hartman uart_parse_options(options, &baud, &parity, &bits, &flow); 1332ab4382d2SGreg Kroah-Hartman 1333ab4382d2SGreg Kroah-Hartman return uart_set_options(&up->port, co, baud, parity, bits, flow); 1334ab4382d2SGreg Kroah-Hartman } 1335ab4382d2SGreg Kroah-Hartman 1336ab4382d2SGreg Kroah-Hartman static struct console serial_omap_console = { 1337ab4382d2SGreg Kroah-Hartman .name = OMAP_SERIAL_NAME, 1338ab4382d2SGreg Kroah-Hartman .write = serial_omap_console_write, 1339ab4382d2SGreg Kroah-Hartman .device = uart_console_device, 1340ab4382d2SGreg Kroah-Hartman .setup = serial_omap_console_setup, 1341ab4382d2SGreg Kroah-Hartman .flags = CON_PRINTBUFFER, 1342ab4382d2SGreg Kroah-Hartman .index = -1, 1343ab4382d2SGreg Kroah-Hartman .data = &serial_omap_reg, 1344ab4382d2SGreg Kroah-Hartman }; 1345ab4382d2SGreg Kroah-Hartman 1346ab4382d2SGreg Kroah-Hartman static void serial_omap_add_console_port(struct uart_omap_port *up) 1347ab4382d2SGreg Kroah-Hartman { 1348ba77433dSRajendra Nayak serial_omap_console_ports[up->port.line] = up; 1349ab4382d2SGreg Kroah-Hartman } 1350ab4382d2SGreg Kroah-Hartman 1351ab4382d2SGreg Kroah-Hartman #define OMAP_CONSOLE (&serial_omap_console) 1352ab4382d2SGreg Kroah-Hartman 1353ab4382d2SGreg Kroah-Hartman #else 1354ab4382d2SGreg Kroah-Hartman 1355ab4382d2SGreg Kroah-Hartman #define OMAP_CONSOLE NULL 1356ab4382d2SGreg Kroah-Hartman 1357ab4382d2SGreg Kroah-Hartman static inline void serial_omap_add_console_port(struct uart_omap_port *up) 1358ab4382d2SGreg Kroah-Hartman {} 1359ab4382d2SGreg Kroah-Hartman 1360ab4382d2SGreg Kroah-Hartman #endif 1361ab4382d2SGreg Kroah-Hartman 13624a0ac0f5SMark Jackson /* Enable or disable the rs485 support */ 13634a0ac0f5SMark Jackson static void 13644a0ac0f5SMark Jackson serial_omap_config_rs485(struct uart_port *port, struct serial_rs485 *rs485conf) 13654a0ac0f5SMark Jackson { 13664a0ac0f5SMark Jackson struct uart_omap_port *up = to_uart_omap_port(port); 13674a0ac0f5SMark Jackson unsigned long flags; 13684a0ac0f5SMark Jackson unsigned int mode; 13694a0ac0f5SMark Jackson int val; 13704a0ac0f5SMark Jackson 13714a0ac0f5SMark Jackson pm_runtime_get_sync(up->dev); 13724a0ac0f5SMark Jackson spin_lock_irqsave(&up->port.lock, flags); 13734a0ac0f5SMark Jackson 13744a0ac0f5SMark Jackson /* Disable interrupts from this port */ 13754a0ac0f5SMark Jackson mode = up->ier; 13764a0ac0f5SMark Jackson up->ier = 0; 13774a0ac0f5SMark Jackson serial_out(up, UART_IER, 0); 13784a0ac0f5SMark Jackson 13794a0ac0f5SMark Jackson /* store new config */ 13804a0ac0f5SMark Jackson up->rs485 = *rs485conf; 13814a0ac0f5SMark Jackson 13824a0ac0f5SMark Jackson /* 13834a0ac0f5SMark Jackson * Just as a precaution, only allow rs485 13844a0ac0f5SMark Jackson * to be enabled if the gpio pin is valid 13854a0ac0f5SMark Jackson */ 13864a0ac0f5SMark Jackson if (gpio_is_valid(up->rts_gpio)) { 13874a0ac0f5SMark Jackson /* enable / disable rts */ 13884a0ac0f5SMark Jackson val = (up->rs485.flags & SER_RS485_ENABLED) ? 13894a0ac0f5SMark Jackson SER_RS485_RTS_AFTER_SEND : SER_RS485_RTS_ON_SEND; 13904a0ac0f5SMark Jackson val = (up->rs485.flags & val) ? 1 : 0; 13914a0ac0f5SMark Jackson gpio_set_value(up->rts_gpio, val); 13924a0ac0f5SMark Jackson } else 13934a0ac0f5SMark Jackson up->rs485.flags &= ~SER_RS485_ENABLED; 13944a0ac0f5SMark Jackson 13954a0ac0f5SMark Jackson /* Enable interrupts */ 13964a0ac0f5SMark Jackson up->ier = mode; 13974a0ac0f5SMark Jackson serial_out(up, UART_IER, up->ier); 13984a0ac0f5SMark Jackson 1399018e7448SPhilippe Proulx /* If RS-485 is disabled, make sure the THR interrupt is fired when 1400018e7448SPhilippe Proulx * TX FIFO is below the trigger level. 1401018e7448SPhilippe Proulx */ 1402018e7448SPhilippe Proulx if (!(up->rs485.flags & SER_RS485_ENABLED) && 1403018e7448SPhilippe Proulx (up->scr & OMAP_UART_SCR_TX_EMPTY)) { 1404018e7448SPhilippe Proulx up->scr &= ~OMAP_UART_SCR_TX_EMPTY; 1405018e7448SPhilippe Proulx serial_out(up, UART_OMAP_SCR, up->scr); 1406018e7448SPhilippe Proulx } 1407018e7448SPhilippe Proulx 14084a0ac0f5SMark Jackson spin_unlock_irqrestore(&up->port.lock, flags); 14094a0ac0f5SMark Jackson pm_runtime_mark_last_busy(up->dev); 14104a0ac0f5SMark Jackson pm_runtime_put_autosuspend(up->dev); 14114a0ac0f5SMark Jackson } 14124a0ac0f5SMark Jackson 14134a0ac0f5SMark Jackson static int 14144a0ac0f5SMark Jackson serial_omap_ioctl(struct uart_port *port, unsigned int cmd, unsigned long arg) 14154a0ac0f5SMark Jackson { 14164a0ac0f5SMark Jackson struct serial_rs485 rs485conf; 14174a0ac0f5SMark Jackson 14184a0ac0f5SMark Jackson switch (cmd) { 14194a0ac0f5SMark Jackson case TIOCSRS485: 14204a0ac0f5SMark Jackson if (copy_from_user(&rs485conf, (struct serial_rs485 *) arg, 14214a0ac0f5SMark Jackson sizeof(rs485conf))) 14224a0ac0f5SMark Jackson return -EFAULT; 14234a0ac0f5SMark Jackson 14244a0ac0f5SMark Jackson serial_omap_config_rs485(port, &rs485conf); 14254a0ac0f5SMark Jackson break; 14264a0ac0f5SMark Jackson 14274a0ac0f5SMark Jackson case TIOCGRS485: 14284a0ac0f5SMark Jackson if (copy_to_user((struct serial_rs485 *) arg, 14294a0ac0f5SMark Jackson &(to_uart_omap_port(port)->rs485), 14304a0ac0f5SMark Jackson sizeof(rs485conf))) 14314a0ac0f5SMark Jackson return -EFAULT; 14324a0ac0f5SMark Jackson break; 14334a0ac0f5SMark Jackson 14344a0ac0f5SMark Jackson default: 14354a0ac0f5SMark Jackson return -ENOIOCTLCMD; 14364a0ac0f5SMark Jackson } 14374a0ac0f5SMark Jackson return 0; 14384a0ac0f5SMark Jackson } 14394a0ac0f5SMark Jackson 14404a0ac0f5SMark Jackson 1441ab4382d2SGreg Kroah-Hartman static struct uart_ops serial_omap_pops = { 1442ab4382d2SGreg Kroah-Hartman .tx_empty = serial_omap_tx_empty, 1443ab4382d2SGreg Kroah-Hartman .set_mctrl = serial_omap_set_mctrl, 1444ab4382d2SGreg Kroah-Hartman .get_mctrl = serial_omap_get_mctrl, 1445ab4382d2SGreg Kroah-Hartman .stop_tx = serial_omap_stop_tx, 1446ab4382d2SGreg Kroah-Hartman .start_tx = serial_omap_start_tx, 14473af08bd7SRussell King .throttle = serial_omap_throttle, 14483af08bd7SRussell King .unthrottle = serial_omap_unthrottle, 1449ab4382d2SGreg Kroah-Hartman .stop_rx = serial_omap_stop_rx, 1450ab4382d2SGreg Kroah-Hartman .enable_ms = serial_omap_enable_ms, 1451ab4382d2SGreg Kroah-Hartman .break_ctl = serial_omap_break_ctl, 1452ab4382d2SGreg Kroah-Hartman .startup = serial_omap_startup, 1453ab4382d2SGreg Kroah-Hartman .shutdown = serial_omap_shutdown, 1454ab4382d2SGreg Kroah-Hartman .set_termios = serial_omap_set_termios, 1455ab4382d2SGreg Kroah-Hartman .pm = serial_omap_pm, 1456ab4382d2SGreg Kroah-Hartman .type = serial_omap_type, 1457ab4382d2SGreg Kroah-Hartman .release_port = serial_omap_release_port, 1458ab4382d2SGreg Kroah-Hartman .request_port = serial_omap_request_port, 1459ab4382d2SGreg Kroah-Hartman .config_port = serial_omap_config_port, 1460ab4382d2SGreg Kroah-Hartman .verify_port = serial_omap_verify_port, 14614a0ac0f5SMark Jackson .ioctl = serial_omap_ioctl, 1462ab4382d2SGreg Kroah-Hartman #ifdef CONFIG_CONSOLE_POLL 1463ab4382d2SGreg Kroah-Hartman .poll_put_char = serial_omap_poll_put_char, 1464ab4382d2SGreg Kroah-Hartman .poll_get_char = serial_omap_poll_get_char, 1465ab4382d2SGreg Kroah-Hartman #endif 1466ab4382d2SGreg Kroah-Hartman }; 1467ab4382d2SGreg Kroah-Hartman 1468ab4382d2SGreg Kroah-Hartman static struct uart_driver serial_omap_reg = { 1469ab4382d2SGreg Kroah-Hartman .owner = THIS_MODULE, 1470ab4382d2SGreg Kroah-Hartman .driver_name = "OMAP-SERIAL", 1471ab4382d2SGreg Kroah-Hartman .dev_name = OMAP_SERIAL_NAME, 1472ab4382d2SGreg Kroah-Hartman .nr = OMAP_MAX_HSUART_PORTS, 1473ab4382d2SGreg Kroah-Hartman .cons = OMAP_CONSOLE, 1474ab4382d2SGreg Kroah-Hartman }; 1475ab4382d2SGreg Kroah-Hartman 14763bc4f0d8SShubhrajyoti D #ifdef CONFIG_PM_SLEEP 1477ddd85e22SSourav Poddar static int serial_omap_prepare(struct device *dev) 1478ddd85e22SSourav Poddar { 1479ddd85e22SSourav Poddar struct uart_omap_port *up = dev_get_drvdata(dev); 1480ddd85e22SSourav Poddar 1481ddd85e22SSourav Poddar up->is_suspending = true; 1482ddd85e22SSourav Poddar 1483ddd85e22SSourav Poddar return 0; 1484ddd85e22SSourav Poddar } 1485ddd85e22SSourav Poddar 1486ddd85e22SSourav Poddar static void serial_omap_complete(struct device *dev) 1487ddd85e22SSourav Poddar { 1488ddd85e22SSourav Poddar struct uart_omap_port *up = dev_get_drvdata(dev); 1489ddd85e22SSourav Poddar 1490ddd85e22SSourav Poddar up->is_suspending = false; 1491ddd85e22SSourav Poddar } 1492ddd85e22SSourav Poddar 1493fcdca757SGovindraj.R static int serial_omap_suspend(struct device *dev) 1494ab4382d2SGreg Kroah-Hartman { 1495fcdca757SGovindraj.R struct uart_omap_port *up = dev_get_drvdata(dev); 1496ab4382d2SGreg Kroah-Hartman 1497ab4382d2SGreg Kroah-Hartman uart_suspend_port(&serial_omap_reg, &up->port); 149843829731STejun Heo flush_work(&up->qos_work); 14992fd14964SGovindraj.R 1500d758c9c1STony Lindgren if (device_may_wakeup(dev)) 1501d758c9c1STony Lindgren serial_omap_enable_wakeup(up, true); 1502d758c9c1STony Lindgren else 1503d758c9c1STony Lindgren serial_omap_enable_wakeup(up, false); 1504d758c9c1STony Lindgren 1505ab4382d2SGreg Kroah-Hartman return 0; 1506ab4382d2SGreg Kroah-Hartman } 1507ab4382d2SGreg Kroah-Hartman 1508fcdca757SGovindraj.R static int serial_omap_resume(struct device *dev) 1509ab4382d2SGreg Kroah-Hartman { 1510fcdca757SGovindraj.R struct uart_omap_port *up = dev_get_drvdata(dev); 1511ab4382d2SGreg Kroah-Hartman 1512d758c9c1STony Lindgren if (device_may_wakeup(dev)) 1513d758c9c1STony Lindgren serial_omap_enable_wakeup(up, false); 1514d758c9c1STony Lindgren 1515ab4382d2SGreg Kroah-Hartman uart_resume_port(&serial_omap_reg, &up->port); 1516ac57e7f3SSourav Poddar 1517ab4382d2SGreg Kroah-Hartman return 0; 1518ab4382d2SGreg Kroah-Hartman } 1519ddd85e22SSourav Poddar #else 1520ddd85e22SSourav Poddar #define serial_omap_prepare NULL 15212cb5a2faSArnd Bergmann #define serial_omap_complete NULL 1522ddd85e22SSourav Poddar #endif /* CONFIG_PM_SLEEP */ 1523ab4382d2SGreg Kroah-Hartman 15249671f099SBill Pemberton static void omap_serial_fill_features_erratas(struct uart_omap_port *up) 15257c77c8deSGovindraj.R { 15267c77c8deSGovindraj.R u32 mvr, scheme; 15277c77c8deSGovindraj.R u16 revision, major, minor; 15287c77c8deSGovindraj.R 152976bac198SRuchika Kharwar mvr = readl(up->port.membase + (UART_OMAP_MVER << up->port.regshift)); 15307c77c8deSGovindraj.R 15317c77c8deSGovindraj.R /* Check revision register scheme */ 15327c77c8deSGovindraj.R scheme = mvr >> OMAP_UART_MVR_SCHEME_SHIFT; 15337c77c8deSGovindraj.R 15347c77c8deSGovindraj.R switch (scheme) { 15357c77c8deSGovindraj.R case 0: /* Legacy Scheme: OMAP2/3 */ 15367c77c8deSGovindraj.R /* MINOR_REV[0:4], MAJOR_REV[4:7] */ 15377c77c8deSGovindraj.R major = (mvr & OMAP_UART_LEGACY_MVR_MAJ_MASK) >> 15387c77c8deSGovindraj.R OMAP_UART_LEGACY_MVR_MAJ_SHIFT; 15397c77c8deSGovindraj.R minor = (mvr & OMAP_UART_LEGACY_MVR_MIN_MASK); 15407c77c8deSGovindraj.R break; 15417c77c8deSGovindraj.R case 1: 15427c77c8deSGovindraj.R /* New Scheme: OMAP4+ */ 15437c77c8deSGovindraj.R /* MINOR_REV[0:5], MAJOR_REV[8:10] */ 15447c77c8deSGovindraj.R major = (mvr & OMAP_UART_MVR_MAJ_MASK) >> 15457c77c8deSGovindraj.R OMAP_UART_MVR_MAJ_SHIFT; 15467c77c8deSGovindraj.R minor = (mvr & OMAP_UART_MVR_MIN_MASK); 15477c77c8deSGovindraj.R break; 15487c77c8deSGovindraj.R default: 1549d8ee4ea6SFelipe Balbi dev_warn(up->dev, 15507c77c8deSGovindraj.R "Unknown %s revision, defaulting to highest\n", 15517c77c8deSGovindraj.R up->name); 15527c77c8deSGovindraj.R /* highest possible revision */ 15537c77c8deSGovindraj.R major = 0xff; 15547c77c8deSGovindraj.R minor = 0xff; 15557c77c8deSGovindraj.R } 15567c77c8deSGovindraj.R 15577c77c8deSGovindraj.R /* normalize revision for the driver */ 15587c77c8deSGovindraj.R revision = UART_BUILD_REVISION(major, minor); 15597c77c8deSGovindraj.R 15607c77c8deSGovindraj.R switch (revision) { 15617c77c8deSGovindraj.R case OMAP_UART_REV_46: 15627c77c8deSGovindraj.R up->errata |= (UART_ERRATA_i202_MDR1_ACCESS | 15637c77c8deSGovindraj.R UART_ERRATA_i291_DMA_FORCEIDLE); 15647c77c8deSGovindraj.R break; 15657c77c8deSGovindraj.R case OMAP_UART_REV_52: 15667c77c8deSGovindraj.R up->errata |= (UART_ERRATA_i202_MDR1_ACCESS | 15677c77c8deSGovindraj.R UART_ERRATA_i291_DMA_FORCEIDLE); 1568f64ffda6SGovindraj.R up->features |= OMAP_UART_WER_HAS_TX_WAKEUP; 15697c77c8deSGovindraj.R break; 15707c77c8deSGovindraj.R case OMAP_UART_REV_63: 15717c77c8deSGovindraj.R up->errata |= UART_ERRATA_i202_MDR1_ACCESS; 1572f64ffda6SGovindraj.R up->features |= OMAP_UART_WER_HAS_TX_WAKEUP; 15737c77c8deSGovindraj.R break; 15747c77c8deSGovindraj.R default: 15757c77c8deSGovindraj.R break; 15767c77c8deSGovindraj.R } 15777c77c8deSGovindraj.R } 15787c77c8deSGovindraj.R 15799671f099SBill Pemberton static struct omap_uart_port_info *of_get_uart_port_info(struct device *dev) 1580d92b0dfcSRajendra Nayak { 1581d92b0dfcSRajendra Nayak struct omap_uart_port_info *omap_up_info; 1582d92b0dfcSRajendra Nayak 1583d92b0dfcSRajendra Nayak omap_up_info = devm_kzalloc(dev, sizeof(*omap_up_info), GFP_KERNEL); 1584d92b0dfcSRajendra Nayak if (!omap_up_info) 1585d92b0dfcSRajendra Nayak return NULL; /* out of memory */ 1586d92b0dfcSRajendra Nayak 1587d92b0dfcSRajendra Nayak of_property_read_u32(dev->of_node, "clock-frequency", 1588d92b0dfcSRajendra Nayak &omap_up_info->uartclk); 1589d92b0dfcSRajendra Nayak return omap_up_info; 1590d92b0dfcSRajendra Nayak } 1591d92b0dfcSRajendra Nayak 15924a0ac0f5SMark Jackson static int serial_omap_probe_rs485(struct uart_omap_port *up, 15934a0ac0f5SMark Jackson struct device_node *np) 15944a0ac0f5SMark Jackson { 15954a0ac0f5SMark Jackson struct serial_rs485 *rs485conf = &up->rs485; 15964a0ac0f5SMark Jackson u32 rs485_delay[2]; 15974a0ac0f5SMark Jackson enum of_gpio_flags flags; 15984a0ac0f5SMark Jackson int ret; 15994a0ac0f5SMark Jackson 16004a0ac0f5SMark Jackson rs485conf->flags = 0; 16014a0ac0f5SMark Jackson up->rts_gpio = -EINVAL; 16024a0ac0f5SMark Jackson 16034a0ac0f5SMark Jackson if (!np) 16044a0ac0f5SMark Jackson return 0; 16054a0ac0f5SMark Jackson 16064a0ac0f5SMark Jackson if (of_property_read_bool(np, "rs485-rts-active-high")) 16074a0ac0f5SMark Jackson rs485conf->flags |= SER_RS485_RTS_ON_SEND; 16084a0ac0f5SMark Jackson else 16094a0ac0f5SMark Jackson rs485conf->flags |= SER_RS485_RTS_AFTER_SEND; 16104a0ac0f5SMark Jackson 16114a0ac0f5SMark Jackson /* check for tx enable gpio */ 16124a0ac0f5SMark Jackson up->rts_gpio = of_get_named_gpio_flags(np, "rts-gpio", 0, &flags); 16134a0ac0f5SMark Jackson if (gpio_is_valid(up->rts_gpio)) { 1614404dc57cSFelipe Balbi ret = devm_gpio_request(up->dev, up->rts_gpio, "omap-serial"); 16154a0ac0f5SMark Jackson if (ret < 0) 16164a0ac0f5SMark Jackson return ret; 16174a0ac0f5SMark Jackson ret = gpio_direction_output(up->rts_gpio, 16184a0ac0f5SMark Jackson flags & SER_RS485_RTS_AFTER_SEND); 16194a0ac0f5SMark Jackson if (ret < 0) 16204a0ac0f5SMark Jackson return ret; 1621a64c1a1cSMichael Grzeschik } else if (up->rts_gpio == -EPROBE_DEFER) { 1622a64c1a1cSMichael Grzeschik return -EPROBE_DEFER; 1623a64c1a1cSMichael Grzeschik } else { 16244a0ac0f5SMark Jackson up->rts_gpio = -EINVAL; 1625a64c1a1cSMichael Grzeschik } 16264a0ac0f5SMark Jackson 16274a0ac0f5SMark Jackson if (of_property_read_u32_array(np, "rs485-rts-delay", 16284a0ac0f5SMark Jackson rs485_delay, 2) == 0) { 16294a0ac0f5SMark Jackson rs485conf->delay_rts_before_send = rs485_delay[0]; 16304a0ac0f5SMark Jackson rs485conf->delay_rts_after_send = rs485_delay[1]; 16314a0ac0f5SMark Jackson } 16324a0ac0f5SMark Jackson 16334a0ac0f5SMark Jackson if (of_property_read_bool(np, "rs485-rx-during-tx")) 16344a0ac0f5SMark Jackson rs485conf->flags |= SER_RS485_RX_DURING_TX; 16354a0ac0f5SMark Jackson 16364a0ac0f5SMark Jackson if (of_property_read_bool(np, "linux,rs485-enabled-at-boot-time")) 16374a0ac0f5SMark Jackson rs485conf->flags |= SER_RS485_ENABLED; 16384a0ac0f5SMark Jackson 16394a0ac0f5SMark Jackson return 0; 16404a0ac0f5SMark Jackson } 16414a0ac0f5SMark Jackson 16429671f099SBill Pemberton static int serial_omap_probe(struct platform_device *pdev) 1643ab4382d2SGreg Kroah-Hartman { 1644574de559SJingoo Han struct omap_uart_port_info *omap_up_info = dev_get_platdata(&pdev->dev); 1645cc51638aSFelipe Balbi struct uart_omap_port *up; 1646cc51638aSFelipe Balbi struct resource *mem; 1647d044d235SFelipe Balbi void __iomem *base; 1648cc51638aSFelipe Balbi int uartirq = 0; 1649cc51638aSFelipe Balbi int wakeirq = 0; 1650cc51638aSFelipe Balbi int ret; 1651ab4382d2SGreg Kroah-Hartman 16522a0b965cSTony Lindgren /* The optional wakeirq may be specified in the board dts file */ 1653a0a490f9SVikram Pandita if (pdev->dev.of_node) { 16542a0b965cSTony Lindgren uartirq = irq_of_parse_and_map(pdev->dev.of_node, 0); 16552a0b965cSTony Lindgren if (!uartirq) 16562a0b965cSTony Lindgren return -EPROBE_DEFER; 16572a0b965cSTony Lindgren wakeirq = irq_of_parse_and_map(pdev->dev.of_node, 1); 1658d92b0dfcSRajendra Nayak omap_up_info = of_get_uart_port_info(&pdev->dev); 1659a0a490f9SVikram Pandita pdev->dev.platform_data = omap_up_info; 16602a0b965cSTony Lindgren } else { 166154af692cSFelipe Balbi uartirq = platform_get_irq(pdev, 0); 166254af692cSFelipe Balbi if (uartirq < 0) 166354af692cSFelipe Balbi return -EPROBE_DEFER; 1664a0a490f9SVikram Pandita } 1665d92b0dfcSRajendra Nayak 1666d044d235SFelipe Balbi up = devm_kzalloc(&pdev->dev, sizeof(*up), GFP_KERNEL); 1667d044d235SFelipe Balbi if (!up) 1668d044d235SFelipe Balbi return -ENOMEM; 1669ab4382d2SGreg Kroah-Hartman 1670d044d235SFelipe Balbi mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1671d044d235SFelipe Balbi base = devm_ioremap_resource(&pdev->dev, mem); 1672d044d235SFelipe Balbi if (IS_ERR(base)) 1673d044d235SFelipe Balbi return PTR_ERR(base); 1674ab4382d2SGreg Kroah-Hartman 16759574f36fSNeilBrown if (gpio_is_valid(omap_up_info->DTR_gpio) && 16769574f36fSNeilBrown omap_up_info->DTR_present) { 1677404dc57cSFelipe Balbi ret = devm_gpio_request(&pdev->dev, omap_up_info->DTR_gpio, 1678404dc57cSFelipe Balbi "omap-serial"); 16799574f36fSNeilBrown if (ret < 0) 16809574f36fSNeilBrown return ret; 16819574f36fSNeilBrown ret = gpio_direction_output(omap_up_info->DTR_gpio, 16829574f36fSNeilBrown omap_up_info->DTR_inverted); 16839574f36fSNeilBrown if (ret < 0) 16849574f36fSNeilBrown return ret; 16859574f36fSNeilBrown } 16869574f36fSNeilBrown 16879574f36fSNeilBrown if (gpio_is_valid(omap_up_info->DTR_gpio) && 16889574f36fSNeilBrown omap_up_info->DTR_present) { 16899574f36fSNeilBrown up->DTR_gpio = omap_up_info->DTR_gpio; 16909574f36fSNeilBrown up->DTR_inverted = omap_up_info->DTR_inverted; 16915b6acc79SFelipe Balbi } else { 16929574f36fSNeilBrown up->DTR_gpio = -EINVAL; 16935b6acc79SFelipe Balbi } 16945b6acc79SFelipe Balbi 16959574f36fSNeilBrown up->DTR_active = 0; 16969574f36fSNeilBrown 1697d8ee4ea6SFelipe Balbi up->dev = &pdev->dev; 1698ab4382d2SGreg Kroah-Hartman up->port.dev = &pdev->dev; 1699ab4382d2SGreg Kroah-Hartman up->port.type = PORT_OMAP; 1700ab4382d2SGreg Kroah-Hartman up->port.iotype = UPIO_MEM; 17012a0b965cSTony Lindgren up->port.irq = uartirq; 17022a0b965cSTony Lindgren up->wakeirq = wakeirq; 1703ce6acca6SMarkus Pargmann if (!up->wakeirq) 1704ce6acca6SMarkus Pargmann dev_info(up->port.dev, "no wakeirq for uart%d\n", 1705ce6acca6SMarkus Pargmann up->port.line); 1706ab4382d2SGreg Kroah-Hartman 1707ab4382d2SGreg Kroah-Hartman up->port.regshift = 2; 1708ab4382d2SGreg Kroah-Hartman up->port.fifosize = 64; 1709ab4382d2SGreg Kroah-Hartman up->port.ops = &serial_omap_pops; 1710ab4382d2SGreg Kroah-Hartman 1711d92b0dfcSRajendra Nayak if (pdev->dev.of_node) 1712d92b0dfcSRajendra Nayak up->port.line = of_alias_get_id(pdev->dev.of_node, "serial"); 1713d92b0dfcSRajendra Nayak else 1714ab4382d2SGreg Kroah-Hartman up->port.line = pdev->id; 1715ab4382d2SGreg Kroah-Hartman 1716d92b0dfcSRajendra Nayak if (up->port.line < 0) { 1717d92b0dfcSRajendra Nayak dev_err(&pdev->dev, "failed to get alias/pdev id, errno %d\n", 1718d92b0dfcSRajendra Nayak up->port.line); 1719d92b0dfcSRajendra Nayak ret = -ENODEV; 1720388bc262SShubhrajyoti D goto err_port_line; 1721d92b0dfcSRajendra Nayak } 1722d92b0dfcSRajendra Nayak 17234a0ac0f5SMark Jackson ret = serial_omap_probe_rs485(up, pdev->dev.of_node); 17244a0ac0f5SMark Jackson if (ret < 0) 17254a0ac0f5SMark Jackson goto err_rs485; 17264a0ac0f5SMark Jackson 1727d92b0dfcSRajendra Nayak sprintf(up->name, "OMAP UART%d", up->port.line); 1728edd70ad7SGovindraj.R up->port.mapbase = mem->start; 1729d044d235SFelipe Balbi up->port.membase = base; 1730ab4382d2SGreg Kroah-Hartman up->port.flags = omap_up_info->flags; 1731ab4382d2SGreg Kroah-Hartman up->port.uartclk = omap_up_info->uartclk; 17328fe789dcSRajendra Nayak if (!up->port.uartclk) { 17338fe789dcSRajendra Nayak up->port.uartclk = DEFAULT_CLK_SPEED; 1734e5f9bf72SPhilippe Proulx dev_warn(&pdev->dev, 173580d8611dSPhilippe Proulx "No clock speed specified: using default: %d\n", 1736e5f9bf72SPhilippe Proulx DEFAULT_CLK_SPEED); 17378fe789dcSRajendra Nayak } 1738ab4382d2SGreg Kroah-Hartman 17392fd14964SGovindraj.R up->latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE; 17402fd14964SGovindraj.R up->calc_latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE; 17412fd14964SGovindraj.R pm_qos_add_request(&up->pm_qos_request, 17422fd14964SGovindraj.R PM_QOS_CPU_DMA_LATENCY, up->latency); 17432fd14964SGovindraj.R serial_omap_uart_wq = create_singlethread_workqueue(up->name); 17442fd14964SGovindraj.R INIT_WORK(&up->qos_work, serial_omap_uart_qos_work); 17452fd14964SGovindraj.R 174693220dccSFelipe Balbi platform_set_drvdata(pdev, up); 1747a630fbfbSTony Lindgren if (omap_up_info->autosuspend_timeout == 0) 1748a630fbfbSTony Lindgren omap_up_info->autosuspend_timeout = -1; 17495b6acc79SFelipe Balbi 1750a630fbfbSTony Lindgren device_init_wakeup(up->dev, true); 1751fcdca757SGovindraj.R pm_runtime_use_autosuspend(&pdev->dev); 1752fcdca757SGovindraj.R pm_runtime_set_autosuspend_delay(&pdev->dev, 1753c86845dbSDeepak K omap_up_info->autosuspend_timeout); 1754fcdca757SGovindraj.R 1755fcdca757SGovindraj.R pm_runtime_irq_safe(&pdev->dev); 17563026d14aSGrygorii Strashko pm_runtime_enable(&pdev->dev); 17573026d14aSGrygorii Strashko 1758fcdca757SGovindraj.R pm_runtime_get_sync(&pdev->dev); 1759fcdca757SGovindraj.R 17607c77c8deSGovindraj.R omap_serial_fill_features_erratas(up); 17617c77c8deSGovindraj.R 1762ba77433dSRajendra Nayak ui[up->port.line] = up; 1763ab4382d2SGreg Kroah-Hartman serial_omap_add_console_port(up); 1764ab4382d2SGreg Kroah-Hartman 1765ab4382d2SGreg Kroah-Hartman ret = uart_add_one_port(&serial_omap_reg, &up->port); 1766ab4382d2SGreg Kroah-Hartman if (ret != 0) 1767388bc262SShubhrajyoti D goto err_add_port; 1768ab4382d2SGreg Kroah-Hartman 1769660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 1770660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 1771ab4382d2SGreg Kroah-Hartman return 0; 1772388bc262SShubhrajyoti D 1773388bc262SShubhrajyoti D err_add_port: 1774388bc262SShubhrajyoti D pm_runtime_put(&pdev->dev); 1775388bc262SShubhrajyoti D pm_runtime_disable(&pdev->dev); 17764a0ac0f5SMark Jackson err_rs485: 1777388bc262SShubhrajyoti D err_port_line: 1778ab4382d2SGreg Kroah-Hartman dev_err(&pdev->dev, "[UART%d]: failure [%s]: %d\n", 1779ab4382d2SGreg Kroah-Hartman pdev->id, __func__, ret); 1780ab4382d2SGreg Kroah-Hartman return ret; 1781ab4382d2SGreg Kroah-Hartman } 1782ab4382d2SGreg Kroah-Hartman 1783ae8d8a14SBill Pemberton static int serial_omap_remove(struct platform_device *dev) 1784ab4382d2SGreg Kroah-Hartman { 1785ab4382d2SGreg Kroah-Hartman struct uart_omap_port *up = platform_get_drvdata(dev); 1786ab4382d2SGreg Kroah-Hartman 17877e9c8e7dSFelipe Balbi pm_runtime_put_sync(up->dev); 1788d8ee4ea6SFelipe Balbi pm_runtime_disable(up->dev); 1789ab4382d2SGreg Kroah-Hartman uart_remove_one_port(&serial_omap_reg, &up->port); 17902fd14964SGovindraj.R pm_qos_remove_request(&up->pm_qos_request); 179193a2e470SSanjay Singh Rawat device_init_wakeup(&dev->dev, false); 1792fcdca757SGovindraj.R 1793ab4382d2SGreg Kroah-Hartman return 0; 1794ab4382d2SGreg Kroah-Hartman } 1795ab4382d2SGreg Kroah-Hartman 179694734749SGovindraj.R /* 179794734749SGovindraj.R * Work Around for Errata i202 (2430, 3430, 3630, 4430 and 4460) 179894734749SGovindraj.R * The access to uart register after MDR1 Access 179994734749SGovindraj.R * causes UART to corrupt data. 180094734749SGovindraj.R * 180194734749SGovindraj.R * Need a delay = 180294734749SGovindraj.R * 5 L4 clock cycles + 5 UART functional clock cycle (@48MHz = ~0.2uS) 180394734749SGovindraj.R * give 10 times as much 180494734749SGovindraj.R */ 180594734749SGovindraj.R static void serial_omap_mdr1_errataset(struct uart_omap_port *up, u8 mdr1) 180694734749SGovindraj.R { 180794734749SGovindraj.R u8 timeout = 255; 180894734749SGovindraj.R 180994734749SGovindraj.R serial_out(up, UART_OMAP_MDR1, mdr1); 181094734749SGovindraj.R udelay(2); 181194734749SGovindraj.R serial_out(up, UART_FCR, up->fcr | UART_FCR_CLEAR_XMIT | 181294734749SGovindraj.R UART_FCR_CLEAR_RCVR); 181394734749SGovindraj.R /* 181494734749SGovindraj.R * Wait for FIFO to empty: when empty, RX_FIFO_E bit is 0 and 181594734749SGovindraj.R * TX_FIFO_E bit is 1. 181694734749SGovindraj.R */ 181794734749SGovindraj.R while (UART_LSR_THRE != (serial_in(up, UART_LSR) & 181894734749SGovindraj.R (UART_LSR_THRE | UART_LSR_DR))) { 181994734749SGovindraj.R timeout--; 182094734749SGovindraj.R if (!timeout) { 182194734749SGovindraj.R /* Should *never* happen. we warn and carry on */ 1822d8ee4ea6SFelipe Balbi dev_crit(up->dev, "Errata i202: timedout %x\n", 182394734749SGovindraj.R serial_in(up, UART_LSR)); 182494734749SGovindraj.R break; 182594734749SGovindraj.R } 182694734749SGovindraj.R udelay(1); 182794734749SGovindraj.R } 182894734749SGovindraj.R } 182994734749SGovindraj.R 1830b5148856SShubhrajyoti D #ifdef CONFIG_PM_RUNTIME 18319f9ac1e8SGovindraj.R static void serial_omap_restore_context(struct uart_omap_port *up) 18329f9ac1e8SGovindraj.R { 183394734749SGovindraj.R if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) 183494734749SGovindraj.R serial_omap_mdr1_errataset(up, UART_OMAP_MDR1_DISABLE); 183594734749SGovindraj.R else 18369f9ac1e8SGovindraj.R serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE); 183794734749SGovindraj.R 18389f9ac1e8SGovindraj.R serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */ 18399f9ac1e8SGovindraj.R serial_out(up, UART_EFR, UART_EFR_ECB); 18409f9ac1e8SGovindraj.R serial_out(up, UART_LCR, 0x0); /* Operational mode */ 18419f9ac1e8SGovindraj.R serial_out(up, UART_IER, 0x0); 18429f9ac1e8SGovindraj.R serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */ 1843c538d20cSGovindraj.R serial_out(up, UART_DLL, up->dll); 1844c538d20cSGovindraj.R serial_out(up, UART_DLM, up->dlh); 18459f9ac1e8SGovindraj.R serial_out(up, UART_LCR, 0x0); /* Operational mode */ 18469f9ac1e8SGovindraj.R serial_out(up, UART_IER, up->ier); 18479f9ac1e8SGovindraj.R serial_out(up, UART_FCR, up->fcr); 18489f9ac1e8SGovindraj.R serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 18499f9ac1e8SGovindraj.R serial_out(up, UART_MCR, up->mcr); 18509f9ac1e8SGovindraj.R serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */ 1851c538d20cSGovindraj.R serial_out(up, UART_OMAP_SCR, up->scr); 18529f9ac1e8SGovindraj.R serial_out(up, UART_EFR, up->efr); 18539f9ac1e8SGovindraj.R serial_out(up, UART_LCR, up->lcr); 185494734749SGovindraj.R if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) 185594734749SGovindraj.R serial_omap_mdr1_errataset(up, up->mdr1); 185694734749SGovindraj.R else 1857c538d20cSGovindraj.R serial_out(up, UART_OMAP_MDR1, up->mdr1); 1858f64ffda6SGovindraj.R serial_out(up, UART_OMAP_WER, up->wer); 18599f9ac1e8SGovindraj.R } 18609f9ac1e8SGovindraj.R 1861fcdca757SGovindraj.R static int serial_omap_runtime_suspend(struct device *dev) 1862fcdca757SGovindraj.R { 1863ec3bebc6SGovindraj.R struct uart_omap_port *up = dev_get_drvdata(dev); 1864ec3bebc6SGovindraj.R 18657f25301dSWei Yongjun if (!up) 18667f25301dSWei Yongjun return -EINVAL; 18677f25301dSWei Yongjun 1868ddd85e22SSourav Poddar /* 1869ddd85e22SSourav Poddar * When using 'no_console_suspend', the console UART must not be 1870ddd85e22SSourav Poddar * suspended. Since driver suspend is managed by runtime suspend, 1871ddd85e22SSourav Poddar * preventing runtime suspend (by returning error) will keep device 1872ddd85e22SSourav Poddar * active during suspend. 1873ddd85e22SSourav Poddar */ 1874ddd85e22SSourav Poddar if (up->is_suspending && !console_suspend_enabled && 1875ddd85e22SSourav Poddar uart_console(&up->port)) 1876ddd85e22SSourav Poddar return -EBUSY; 1877ddd85e22SSourav Poddar 1878e5b57c03SFelipe Balbi up->context_loss_cnt = serial_omap_get_context_loss_count(up); 1879ec3bebc6SGovindraj.R 1880e5b57c03SFelipe Balbi serial_omap_enable_wakeup(up, true); 188162f3ec5fSGovindraj.R 18822fd14964SGovindraj.R up->latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE; 18832fd14964SGovindraj.R schedule_work(&up->qos_work); 18842fd14964SGovindraj.R 1885fcdca757SGovindraj.R return 0; 1886fcdca757SGovindraj.R } 1887fcdca757SGovindraj.R 1888fcdca757SGovindraj.R static int serial_omap_runtime_resume(struct device *dev) 1889fcdca757SGovindraj.R { 18909f9ac1e8SGovindraj.R struct uart_omap_port *up = dev_get_drvdata(dev); 18919f9ac1e8SGovindraj.R 189239aee51dSShubhrajyoti D int loss_cnt = serial_omap_get_context_loss_count(up); 1893ec3bebc6SGovindraj.R 1894d758c9c1STony Lindgren serial_omap_enable_wakeup(up, false); 1895d758c9c1STony Lindgren 189639aee51dSShubhrajyoti D if (loss_cnt < 0) { 1897a630fbfbSTony Lindgren dev_dbg(dev, "serial_omap_get_context_loss_count failed : %d\n", 189839aee51dSShubhrajyoti D loss_cnt); 18999f9ac1e8SGovindraj.R serial_omap_restore_context(up); 190039aee51dSShubhrajyoti D } else if (up->context_loss_cnt != loss_cnt) { 190139aee51dSShubhrajyoti D serial_omap_restore_context(up); 190239aee51dSShubhrajyoti D } 19032fd14964SGovindraj.R up->latency = up->calc_latency; 19042fd14964SGovindraj.R schedule_work(&up->qos_work); 19059f9ac1e8SGovindraj.R 1906fcdca757SGovindraj.R return 0; 1907fcdca757SGovindraj.R } 1908fcdca757SGovindraj.R #endif 1909fcdca757SGovindraj.R 1910fcdca757SGovindraj.R static const struct dev_pm_ops serial_omap_dev_pm_ops = { 1911fcdca757SGovindraj.R SET_SYSTEM_SLEEP_PM_OPS(serial_omap_suspend, serial_omap_resume) 1912fcdca757SGovindraj.R SET_RUNTIME_PM_OPS(serial_omap_runtime_suspend, 1913fcdca757SGovindraj.R serial_omap_runtime_resume, NULL) 1914ddd85e22SSourav Poddar .prepare = serial_omap_prepare, 1915ddd85e22SSourav Poddar .complete = serial_omap_complete, 1916fcdca757SGovindraj.R }; 1917fcdca757SGovindraj.R 1918d92b0dfcSRajendra Nayak #if defined(CONFIG_OF) 1919d92b0dfcSRajendra Nayak static const struct of_device_id omap_serial_of_match[] = { 1920d92b0dfcSRajendra Nayak { .compatible = "ti,omap2-uart" }, 1921d92b0dfcSRajendra Nayak { .compatible = "ti,omap3-uart" }, 1922d92b0dfcSRajendra Nayak { .compatible = "ti,omap4-uart" }, 1923d92b0dfcSRajendra Nayak {}, 1924d92b0dfcSRajendra Nayak }; 1925d92b0dfcSRajendra Nayak MODULE_DEVICE_TABLE(of, omap_serial_of_match); 1926d92b0dfcSRajendra Nayak #endif 1927d92b0dfcSRajendra Nayak 1928ab4382d2SGreg Kroah-Hartman static struct platform_driver serial_omap_driver = { 1929ab4382d2SGreg Kroah-Hartman .probe = serial_omap_probe, 19302d47b716SBill Pemberton .remove = serial_omap_remove, 1931ab4382d2SGreg Kroah-Hartman .driver = { 1932ab4382d2SGreg Kroah-Hartman .name = DRIVER_NAME, 1933fcdca757SGovindraj.R .pm = &serial_omap_dev_pm_ops, 1934d92b0dfcSRajendra Nayak .of_match_table = of_match_ptr(omap_serial_of_match), 1935ab4382d2SGreg Kroah-Hartman }, 1936ab4382d2SGreg Kroah-Hartman }; 1937ab4382d2SGreg Kroah-Hartman 1938ab4382d2SGreg Kroah-Hartman static int __init serial_omap_init(void) 1939ab4382d2SGreg Kroah-Hartman { 1940ab4382d2SGreg Kroah-Hartman int ret; 1941ab4382d2SGreg Kroah-Hartman 1942ab4382d2SGreg Kroah-Hartman ret = uart_register_driver(&serial_omap_reg); 1943ab4382d2SGreg Kroah-Hartman if (ret != 0) 1944ab4382d2SGreg Kroah-Hartman return ret; 1945ab4382d2SGreg Kroah-Hartman ret = platform_driver_register(&serial_omap_driver); 1946ab4382d2SGreg Kroah-Hartman if (ret != 0) 1947ab4382d2SGreg Kroah-Hartman uart_unregister_driver(&serial_omap_reg); 1948ab4382d2SGreg Kroah-Hartman return ret; 1949ab4382d2SGreg Kroah-Hartman } 1950ab4382d2SGreg Kroah-Hartman 1951ab4382d2SGreg Kroah-Hartman static void __exit serial_omap_exit(void) 1952ab4382d2SGreg Kroah-Hartman { 1953ab4382d2SGreg Kroah-Hartman platform_driver_unregister(&serial_omap_driver); 1954ab4382d2SGreg Kroah-Hartman uart_unregister_driver(&serial_omap_reg); 1955ab4382d2SGreg Kroah-Hartman } 1956ab4382d2SGreg Kroah-Hartman 1957ab4382d2SGreg Kroah-Hartman module_init(serial_omap_init); 1958ab4382d2SGreg Kroah-Hartman module_exit(serial_omap_exit); 1959ab4382d2SGreg Kroah-Hartman 1960ab4382d2SGreg Kroah-Hartman MODULE_DESCRIPTION("OMAP High Speed UART driver"); 1961ab4382d2SGreg Kroah-Hartman MODULE_LICENSE("GPL"); 1962ab4382d2SGreg Kroah-Hartman MODULE_AUTHOR("Texas Instruments Inc"); 1963