1ab4382d2SGreg Kroah-Hartman /* 2ab4382d2SGreg Kroah-Hartman * Driver for OMAP-UART controller. 3ab4382d2SGreg Kroah-Hartman * Based on drivers/serial/8250.c 4ab4382d2SGreg Kroah-Hartman * 5ab4382d2SGreg Kroah-Hartman * Copyright (C) 2010 Texas Instruments. 6ab4382d2SGreg Kroah-Hartman * 7ab4382d2SGreg Kroah-Hartman * Authors: 8ab4382d2SGreg Kroah-Hartman * Govindraj R <govindraj.raja@ti.com> 9ab4382d2SGreg Kroah-Hartman * Thara Gopinath <thara@ti.com> 10ab4382d2SGreg Kroah-Hartman * 11ab4382d2SGreg Kroah-Hartman * This program is free software; you can redistribute it and/or modify 12ab4382d2SGreg Kroah-Hartman * it under the terms of the GNU General Public License as published by 13ab4382d2SGreg Kroah-Hartman * the Free Software Foundation; either version 2 of the License, or 14ab4382d2SGreg Kroah-Hartman * (at your option) any later version. 15ab4382d2SGreg Kroah-Hartman * 1625985edcSLucas De Marchi * Note: This driver is made separate from 8250 driver as we cannot 17ab4382d2SGreg Kroah-Hartman * over load 8250 driver with omap platform specific configuration for 18ab4382d2SGreg Kroah-Hartman * features like DMA, it makes easier to implement features like DMA and 19ab4382d2SGreg Kroah-Hartman * hardware flow control and software flow control configuration with 20ab4382d2SGreg Kroah-Hartman * this driver as required for the omap-platform. 21ab4382d2SGreg Kroah-Hartman */ 22ab4382d2SGreg Kroah-Hartman 23364a6eceSThomas Weber #if defined(CONFIG_SERIAL_OMAP_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) 24364a6eceSThomas Weber #define SUPPORT_SYSRQ 25364a6eceSThomas Weber #endif 26364a6eceSThomas Weber 27ab4382d2SGreg Kroah-Hartman #include <linux/module.h> 28ab4382d2SGreg Kroah-Hartman #include <linux/init.h> 29ab4382d2SGreg Kroah-Hartman #include <linux/console.h> 30ab4382d2SGreg Kroah-Hartman #include <linux/serial_reg.h> 31ab4382d2SGreg Kroah-Hartman #include <linux/delay.h> 32ab4382d2SGreg Kroah-Hartman #include <linux/slab.h> 33ab4382d2SGreg Kroah-Hartman #include <linux/tty.h> 34ab4382d2SGreg Kroah-Hartman #include <linux/tty_flip.h> 35ab4382d2SGreg Kroah-Hartman #include <linux/io.h> 36ab4382d2SGreg Kroah-Hartman #include <linux/clk.h> 37ab4382d2SGreg Kroah-Hartman #include <linux/serial_core.h> 38ab4382d2SGreg Kroah-Hartman #include <linux/irq.h> 39fcdca757SGovindraj.R #include <linux/pm_runtime.h> 40d92b0dfcSRajendra Nayak #include <linux/of.h> 419574f36fSNeilBrown #include <linux/gpio.h> 42ab4382d2SGreg Kroah-Hartman 43ab4382d2SGreg Kroah-Hartman #include <plat/dmtimer.h> 44ab4382d2SGreg Kroah-Hartman #include <plat/omap-serial.h> 45ab4382d2SGreg Kroah-Hartman 467c77c8deSGovindraj.R #define UART_BUILD_REVISION(x, y) (((x) << 8) | (y)) 477c77c8deSGovindraj.R 487c77c8deSGovindraj.R #define OMAP_UART_REV_42 0x0402 497c77c8deSGovindraj.R #define OMAP_UART_REV_46 0x0406 507c77c8deSGovindraj.R #define OMAP_UART_REV_52 0x0502 517c77c8deSGovindraj.R #define OMAP_UART_REV_63 0x0603 527c77c8deSGovindraj.R 538fe789dcSRajendra Nayak #define DEFAULT_CLK_SPEED 48000000 /* 48Mhz*/ 548fe789dcSRajendra Nayak 550ba5f668SPaul Walmsley /* SCR register bitmasks */ 560ba5f668SPaul Walmsley #define OMAP_UART_SCR_RX_TRIG_GRANU1_MASK (1 << 7) 570ba5f668SPaul Walmsley 580ba5f668SPaul Walmsley /* FCR register bitmasks */ 590ba5f668SPaul Walmsley #define OMAP_UART_FCR_RX_FIFO_TRIG_SHIFT 6 600ba5f668SPaul Walmsley #define OMAP_UART_FCR_RX_FIFO_TRIG_MASK (0x3 << 6) 610ba5f668SPaul Walmsley 627c77c8deSGovindraj.R /* MVR register bitmasks */ 637c77c8deSGovindraj.R #define OMAP_UART_MVR_SCHEME_SHIFT 30 647c77c8deSGovindraj.R 657c77c8deSGovindraj.R #define OMAP_UART_LEGACY_MVR_MAJ_MASK 0xf0 667c77c8deSGovindraj.R #define OMAP_UART_LEGACY_MVR_MAJ_SHIFT 4 677c77c8deSGovindraj.R #define OMAP_UART_LEGACY_MVR_MIN_MASK 0x0f 687c77c8deSGovindraj.R 697c77c8deSGovindraj.R #define OMAP_UART_MVR_MAJ_MASK 0x700 707c77c8deSGovindraj.R #define OMAP_UART_MVR_MAJ_SHIFT 8 717c77c8deSGovindraj.R #define OMAP_UART_MVR_MIN_MASK 0x3f 727c77c8deSGovindraj.R 73ab4382d2SGreg Kroah-Hartman static struct uart_omap_port *ui[OMAP_MAX_HSUART_PORTS]; 74ab4382d2SGreg Kroah-Hartman 75ab4382d2SGreg Kroah-Hartman /* Forward declaration of functions */ 7694734749SGovindraj.R static void serial_omap_mdr1_errataset(struct uart_omap_port *up, u8 mdr1); 77ab4382d2SGreg Kroah-Hartman 782fd14964SGovindraj.R static struct workqueue_struct *serial_omap_uart_wq; 79ab4382d2SGreg Kroah-Hartman 80ab4382d2SGreg Kroah-Hartman static inline unsigned int serial_in(struct uart_omap_port *up, int offset) 81ab4382d2SGreg Kroah-Hartman { 82ab4382d2SGreg Kroah-Hartman offset <<= up->port.regshift; 83ab4382d2SGreg Kroah-Hartman return readw(up->port.membase + offset); 84ab4382d2SGreg Kroah-Hartman } 85ab4382d2SGreg Kroah-Hartman 86ab4382d2SGreg Kroah-Hartman static inline void serial_out(struct uart_omap_port *up, int offset, int value) 87ab4382d2SGreg Kroah-Hartman { 88ab4382d2SGreg Kroah-Hartman offset <<= up->port.regshift; 89ab4382d2SGreg Kroah-Hartman writew(value, up->port.membase + offset); 90ab4382d2SGreg Kroah-Hartman } 91ab4382d2SGreg Kroah-Hartman 92ab4382d2SGreg Kroah-Hartman static inline void serial_omap_clear_fifos(struct uart_omap_port *up) 93ab4382d2SGreg Kroah-Hartman { 94ab4382d2SGreg Kroah-Hartman serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO); 95ab4382d2SGreg Kroah-Hartman serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | 96ab4382d2SGreg Kroah-Hartman UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); 97ab4382d2SGreg Kroah-Hartman serial_out(up, UART_FCR, 0); 98ab4382d2SGreg Kroah-Hartman } 99ab4382d2SGreg Kroah-Hartman 100e5b57c03SFelipe Balbi static int serial_omap_get_context_loss_count(struct uart_omap_port *up) 101e5b57c03SFelipe Balbi { 102d8ee4ea6SFelipe Balbi struct omap_uart_port_info *pdata = up->dev->platform_data; 103e5b57c03SFelipe Balbi 104e5b57c03SFelipe Balbi if (!pdata->get_context_loss_count) 105e5b57c03SFelipe Balbi return 0; 106e5b57c03SFelipe Balbi 107d8ee4ea6SFelipe Balbi return pdata->get_context_loss_count(up->dev); 108e5b57c03SFelipe Balbi } 109e5b57c03SFelipe Balbi 110e5b57c03SFelipe Balbi static void serial_omap_set_forceidle(struct uart_omap_port *up) 111e5b57c03SFelipe Balbi { 112d8ee4ea6SFelipe Balbi struct omap_uart_port_info *pdata = up->dev->platform_data; 113e5b57c03SFelipe Balbi 114e5b57c03SFelipe Balbi if (pdata->set_forceidle) 115d8ee4ea6SFelipe Balbi pdata->set_forceidle(up->dev); 116e5b57c03SFelipe Balbi } 117e5b57c03SFelipe Balbi 118e5b57c03SFelipe Balbi static void serial_omap_set_noidle(struct uart_omap_port *up) 119e5b57c03SFelipe Balbi { 120d8ee4ea6SFelipe Balbi struct omap_uart_port_info *pdata = up->dev->platform_data; 121e5b57c03SFelipe Balbi 122e5b57c03SFelipe Balbi if (pdata->set_noidle) 123d8ee4ea6SFelipe Balbi pdata->set_noidle(up->dev); 124e5b57c03SFelipe Balbi } 125e5b57c03SFelipe Balbi 126e5b57c03SFelipe Balbi static void serial_omap_enable_wakeup(struct uart_omap_port *up, bool enable) 127e5b57c03SFelipe Balbi { 128d8ee4ea6SFelipe Balbi struct omap_uart_port_info *pdata = up->dev->platform_data; 129e5b57c03SFelipe Balbi 130e5b57c03SFelipe Balbi if (pdata->enable_wakeup) 131d8ee4ea6SFelipe Balbi pdata->enable_wakeup(up->dev, enable); 132e5b57c03SFelipe Balbi } 133e5b57c03SFelipe Balbi 134ab4382d2SGreg Kroah-Hartman /* 135ab4382d2SGreg Kroah-Hartman * serial_omap_get_divisor - calculate divisor value 136ab4382d2SGreg Kroah-Hartman * @port: uart port info 137ab4382d2SGreg Kroah-Hartman * @baud: baudrate for which divisor needs to be calculated. 138ab4382d2SGreg Kroah-Hartman * 139ab4382d2SGreg Kroah-Hartman * We have written our own function to get the divisor so as to support 140ab4382d2SGreg Kroah-Hartman * 13x mode. 3Mbps Baudrate as an different divisor. 141ab4382d2SGreg Kroah-Hartman * Reference OMAP TRM Chapter 17: 142ab4382d2SGreg Kroah-Hartman * Table 17-1. UART Mode Baud Rates, Divisor Values, and Error Rates 143ab4382d2SGreg Kroah-Hartman * referring to oversampling - divisor value 144ab4382d2SGreg Kroah-Hartman * baudrate 460,800 to 3,686,400 all have divisor 13 145ab4382d2SGreg Kroah-Hartman * except 3,000,000 which has divisor value 16 146ab4382d2SGreg Kroah-Hartman */ 147ab4382d2SGreg Kroah-Hartman static unsigned int 148ab4382d2SGreg Kroah-Hartman serial_omap_get_divisor(struct uart_port *port, unsigned int baud) 149ab4382d2SGreg Kroah-Hartman { 150ab4382d2SGreg Kroah-Hartman unsigned int divisor; 151ab4382d2SGreg Kroah-Hartman 152ab4382d2SGreg Kroah-Hartman if (baud > OMAP_MODE13X_SPEED && baud != 3000000) 153ab4382d2SGreg Kroah-Hartman divisor = 13; 154ab4382d2SGreg Kroah-Hartman else 155ab4382d2SGreg Kroah-Hartman divisor = 16; 156ab4382d2SGreg Kroah-Hartman return port->uartclk/(baud * divisor); 157ab4382d2SGreg Kroah-Hartman } 158ab4382d2SGreg Kroah-Hartman 159ab4382d2SGreg Kroah-Hartman static void serial_omap_enable_ms(struct uart_port *port) 160ab4382d2SGreg Kroah-Hartman { 161c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 162ab4382d2SGreg Kroah-Hartman 163ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_enable_ms+%d\n", up->port.line); 164fcdca757SGovindraj.R 165d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 166ab4382d2SGreg Kroah-Hartman up->ier |= UART_IER_MSI; 167ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 168660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 169660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 170ab4382d2SGreg Kroah-Hartman } 171ab4382d2SGreg Kroah-Hartman 172ab4382d2SGreg Kroah-Hartman static void serial_omap_stop_tx(struct uart_port *port) 173ab4382d2SGreg Kroah-Hartman { 174c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 175ab4382d2SGreg Kroah-Hartman 176d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 177ab4382d2SGreg Kroah-Hartman if (up->ier & UART_IER_THRI) { 178ab4382d2SGreg Kroah-Hartman up->ier &= ~UART_IER_THRI; 179ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 180ab4382d2SGreg Kroah-Hartman } 181fcdca757SGovindraj.R 182e5b57c03SFelipe Balbi serial_omap_set_forceidle(up); 183be4b0281SPaul Walmsley 184d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 185d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 186ab4382d2SGreg Kroah-Hartman } 187ab4382d2SGreg Kroah-Hartman 188ab4382d2SGreg Kroah-Hartman static void serial_omap_stop_rx(struct uart_port *port) 189ab4382d2SGreg Kroah-Hartman { 190c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 191ab4382d2SGreg Kroah-Hartman 192d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 193ab4382d2SGreg Kroah-Hartman up->ier &= ~UART_IER_RLSI; 194ab4382d2SGreg Kroah-Hartman up->port.read_status_mask &= ~UART_LSR_DR; 195ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 196d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 197d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 198ab4382d2SGreg Kroah-Hartman } 199ab4382d2SGreg Kroah-Hartman 200bf63a086SFelipe Balbi static void transmit_chars(struct uart_omap_port *up, unsigned int lsr) 201ab4382d2SGreg Kroah-Hartman { 202ab4382d2SGreg Kroah-Hartman struct circ_buf *xmit = &up->port.state->xmit; 203ab4382d2SGreg Kroah-Hartman int count; 204ab4382d2SGreg Kroah-Hartman 205bf63a086SFelipe Balbi if (!(lsr & UART_LSR_THRE)) 206bf63a086SFelipe Balbi return; 207bf63a086SFelipe Balbi 208ab4382d2SGreg Kroah-Hartman if (up->port.x_char) { 209ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TX, up->port.x_char); 210ab4382d2SGreg Kroah-Hartman up->port.icount.tx++; 211ab4382d2SGreg Kroah-Hartman up->port.x_char = 0; 212ab4382d2SGreg Kroah-Hartman return; 213ab4382d2SGreg Kroah-Hartman } 214ab4382d2SGreg Kroah-Hartman if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { 215ab4382d2SGreg Kroah-Hartman serial_omap_stop_tx(&up->port); 216ab4382d2SGreg Kroah-Hartman return; 217ab4382d2SGreg Kroah-Hartman } 218af681cadSGreg Kroah-Hartman count = up->port.fifosize / 4; 219ab4382d2SGreg Kroah-Hartman do { 220ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TX, xmit->buf[xmit->tail]); 221ab4382d2SGreg Kroah-Hartman xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 222ab4382d2SGreg Kroah-Hartman up->port.icount.tx++; 223ab4382d2SGreg Kroah-Hartman if (uart_circ_empty(xmit)) 224ab4382d2SGreg Kroah-Hartman break; 225ab4382d2SGreg Kroah-Hartman } while (--count > 0); 226ab4382d2SGreg Kroah-Hartman 2270324a821SRuchika Kharwar if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) { 2280324a821SRuchika Kharwar spin_unlock(&up->port.lock); 229ab4382d2SGreg Kroah-Hartman uart_write_wakeup(&up->port); 2300324a821SRuchika Kharwar spin_lock(&up->port.lock); 2310324a821SRuchika Kharwar } 232ab4382d2SGreg Kroah-Hartman 233ab4382d2SGreg Kroah-Hartman if (uart_circ_empty(xmit)) 234ab4382d2SGreg Kroah-Hartman serial_omap_stop_tx(&up->port); 235ab4382d2SGreg Kroah-Hartman } 236ab4382d2SGreg Kroah-Hartman 237ab4382d2SGreg Kroah-Hartman static inline void serial_omap_enable_ier_thri(struct uart_omap_port *up) 238ab4382d2SGreg Kroah-Hartman { 239ab4382d2SGreg Kroah-Hartman if (!(up->ier & UART_IER_THRI)) { 240ab4382d2SGreg Kroah-Hartman up->ier |= UART_IER_THRI; 241ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 242ab4382d2SGreg Kroah-Hartman } 243ab4382d2SGreg Kroah-Hartman } 244ab4382d2SGreg Kroah-Hartman 245ab4382d2SGreg Kroah-Hartman static void serial_omap_start_tx(struct uart_port *port) 246ab4382d2SGreg Kroah-Hartman { 247c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 248ab4382d2SGreg Kroah-Hartman 249d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 250ab4382d2SGreg Kroah-Hartman serial_omap_enable_ier_thri(up); 251e5b57c03SFelipe Balbi serial_omap_set_noidle(up); 252d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 253d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 254ab4382d2SGreg Kroah-Hartman } 255ab4382d2SGreg Kroah-Hartman 256ab4382d2SGreg Kroah-Hartman static unsigned int check_modem_status(struct uart_omap_port *up) 257ab4382d2SGreg Kroah-Hartman { 258ab4382d2SGreg Kroah-Hartman unsigned int status; 259ab4382d2SGreg Kroah-Hartman 260ab4382d2SGreg Kroah-Hartman status = serial_in(up, UART_MSR); 261ab4382d2SGreg Kroah-Hartman status |= up->msr_saved_flags; 262ab4382d2SGreg Kroah-Hartman up->msr_saved_flags = 0; 263ab4382d2SGreg Kroah-Hartman if ((status & UART_MSR_ANY_DELTA) == 0) 264ab4382d2SGreg Kroah-Hartman return status; 265ab4382d2SGreg Kroah-Hartman 266ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI && 267ab4382d2SGreg Kroah-Hartman up->port.state != NULL) { 268ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_TERI) 269ab4382d2SGreg Kroah-Hartman up->port.icount.rng++; 270ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DDSR) 271ab4382d2SGreg Kroah-Hartman up->port.icount.dsr++; 272ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DDCD) 273ab4382d2SGreg Kroah-Hartman uart_handle_dcd_change 274ab4382d2SGreg Kroah-Hartman (&up->port, status & UART_MSR_DCD); 275ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DCTS) 276ab4382d2SGreg Kroah-Hartman uart_handle_cts_change 277ab4382d2SGreg Kroah-Hartman (&up->port, status & UART_MSR_CTS); 278ab4382d2SGreg Kroah-Hartman wake_up_interruptible(&up->port.state->port.delta_msr_wait); 279ab4382d2SGreg Kroah-Hartman } 280ab4382d2SGreg Kroah-Hartman 281ab4382d2SGreg Kroah-Hartman return status; 282ab4382d2SGreg Kroah-Hartman } 283ab4382d2SGreg Kroah-Hartman 28472256cbdSFelipe Balbi static void serial_omap_rlsi(struct uart_omap_port *up, unsigned int lsr) 28572256cbdSFelipe Balbi { 28672256cbdSFelipe Balbi unsigned int flag; 28772256cbdSFelipe Balbi 28872256cbdSFelipe Balbi up->port.icount.rx++; 28972256cbdSFelipe Balbi flag = TTY_NORMAL; 29072256cbdSFelipe Balbi 29172256cbdSFelipe Balbi if (lsr & UART_LSR_BI) { 29272256cbdSFelipe Balbi flag = TTY_BREAK; 29372256cbdSFelipe Balbi lsr &= ~(UART_LSR_FE | UART_LSR_PE); 29472256cbdSFelipe Balbi up->port.icount.brk++; 29572256cbdSFelipe Balbi /* 29672256cbdSFelipe Balbi * We do the SysRQ and SAK checking 29772256cbdSFelipe Balbi * here because otherwise the break 29872256cbdSFelipe Balbi * may get masked by ignore_status_mask 29972256cbdSFelipe Balbi * or read_status_mask. 30072256cbdSFelipe Balbi */ 30172256cbdSFelipe Balbi if (uart_handle_break(&up->port)) 30272256cbdSFelipe Balbi return; 30372256cbdSFelipe Balbi 30472256cbdSFelipe Balbi } 30572256cbdSFelipe Balbi 30672256cbdSFelipe Balbi if (lsr & UART_LSR_PE) { 30772256cbdSFelipe Balbi flag = TTY_PARITY; 30872256cbdSFelipe Balbi up->port.icount.parity++; 30972256cbdSFelipe Balbi } 31072256cbdSFelipe Balbi 31172256cbdSFelipe Balbi if (lsr & UART_LSR_FE) { 31272256cbdSFelipe Balbi flag = TTY_FRAME; 31372256cbdSFelipe Balbi up->port.icount.frame++; 31472256cbdSFelipe Balbi } 31572256cbdSFelipe Balbi 31672256cbdSFelipe Balbi if (lsr & UART_LSR_OE) 31772256cbdSFelipe Balbi up->port.icount.overrun++; 31872256cbdSFelipe Balbi 31972256cbdSFelipe Balbi #ifdef CONFIG_SERIAL_OMAP_CONSOLE 32072256cbdSFelipe Balbi if (up->port.line == up->port.cons->index) { 32172256cbdSFelipe Balbi /* Recover the break flag from console xmit */ 32272256cbdSFelipe Balbi lsr |= up->lsr_break_flag; 32372256cbdSFelipe Balbi } 32472256cbdSFelipe Balbi #endif 32572256cbdSFelipe Balbi uart_insert_char(&up->port, lsr, UART_LSR_OE, 0, flag); 32672256cbdSFelipe Balbi } 32772256cbdSFelipe Balbi 32872256cbdSFelipe Balbi static void serial_omap_rdi(struct uart_omap_port *up, unsigned int lsr) 32972256cbdSFelipe Balbi { 33072256cbdSFelipe Balbi unsigned char ch = 0; 33172256cbdSFelipe Balbi unsigned int flag; 33272256cbdSFelipe Balbi 33372256cbdSFelipe Balbi if (!(lsr & UART_LSR_DR)) 33472256cbdSFelipe Balbi return; 33572256cbdSFelipe Balbi 33672256cbdSFelipe Balbi ch = serial_in(up, UART_RX); 33772256cbdSFelipe Balbi flag = TTY_NORMAL; 33872256cbdSFelipe Balbi up->port.icount.rx++; 33972256cbdSFelipe Balbi 34072256cbdSFelipe Balbi if (uart_handle_sysrq_char(&up->port, ch)) 34172256cbdSFelipe Balbi return; 34272256cbdSFelipe Balbi 34372256cbdSFelipe Balbi uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag); 34472256cbdSFelipe Balbi } 34572256cbdSFelipe Balbi 346ab4382d2SGreg Kroah-Hartman /** 347ab4382d2SGreg Kroah-Hartman * serial_omap_irq() - This handles the interrupt from one port 348ab4382d2SGreg Kroah-Hartman * @irq: uart port irq number 349ab4382d2SGreg Kroah-Hartman * @dev_id: uart port info 350ab4382d2SGreg Kroah-Hartman */ 35152c5513dSFelipe Balbi static irqreturn_t serial_omap_irq(int irq, void *dev_id) 352ab4382d2SGreg Kroah-Hartman { 353ab4382d2SGreg Kroah-Hartman struct uart_omap_port *up = dev_id; 35472256cbdSFelipe Balbi struct tty_struct *tty = up->port.state->port.tty; 355ab4382d2SGreg Kroah-Hartman unsigned int iir, lsr; 35681b75aefSFelipe Balbi unsigned int type; 35781b75aefSFelipe Balbi irqreturn_t ret = IRQ_NONE; 35872256cbdSFelipe Balbi int max_count = 256; 359ab4382d2SGreg Kroah-Hartman 3606c3a30c7SFelipe Balbi spin_lock(&up->port.lock); 36181b75aefSFelipe Balbi pm_runtime_get_sync(up->dev); 36272256cbdSFelipe Balbi 36372256cbdSFelipe Balbi do { 36481b75aefSFelipe Balbi iir = serial_in(up, UART_IIR); 36581b75aefSFelipe Balbi if (iir & UART_IIR_NO_INT) 36672256cbdSFelipe Balbi break; 36781b75aefSFelipe Balbi 36881b75aefSFelipe Balbi ret = IRQ_HANDLED; 369ab4382d2SGreg Kroah-Hartman lsr = serial_in(up, UART_LSR); 37081b75aefSFelipe Balbi 37181b75aefSFelipe Balbi /* extract IRQ type from IIR register */ 37281b75aefSFelipe Balbi type = iir & 0x3e; 37381b75aefSFelipe Balbi 37481b75aefSFelipe Balbi switch (type) { 37581b75aefSFelipe Balbi case UART_IIR_MSI: 37681b75aefSFelipe Balbi check_modem_status(up); 37781b75aefSFelipe Balbi break; 37881b75aefSFelipe Balbi case UART_IIR_THRI: 379bf63a086SFelipe Balbi transmit_chars(up, lsr); 38081b75aefSFelipe Balbi break; 38172256cbdSFelipe Balbi case UART_IIR_RX_TIMEOUT: 38272256cbdSFelipe Balbi /* FALLTHROUGH */ 38381b75aefSFelipe Balbi case UART_IIR_RDI: 38472256cbdSFelipe Balbi serial_omap_rdi(up, lsr); 38581b75aefSFelipe Balbi break; 38681b75aefSFelipe Balbi case UART_IIR_RLSI: 38772256cbdSFelipe Balbi serial_omap_rlsi(up, lsr); 38881b75aefSFelipe Balbi break; 38981b75aefSFelipe Balbi case UART_IIR_CTS_RTS_DSR: 39072256cbdSFelipe Balbi /* simply try again */ 39172256cbdSFelipe Balbi break; 39281b75aefSFelipe Balbi case UART_IIR_XOFF: 39381b75aefSFelipe Balbi /* FALLTHROUGH */ 39481b75aefSFelipe Balbi default: 39581b75aefSFelipe Balbi break; 396ab4382d2SGreg Kroah-Hartman } 39772256cbdSFelipe Balbi } while (!(iir & UART_IIR_NO_INT) && max_count--); 398ab4382d2SGreg Kroah-Hartman 3996c3a30c7SFelipe Balbi spin_unlock(&up->port.lock); 40072256cbdSFelipe Balbi 40172256cbdSFelipe Balbi tty_flip_buffer_push(tty); 40272256cbdSFelipe Balbi 403d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 404d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 405ab4382d2SGreg Kroah-Hartman up->port_activity = jiffies; 40681b75aefSFelipe Balbi 40781b75aefSFelipe Balbi return ret; 408ab4382d2SGreg Kroah-Hartman } 409ab4382d2SGreg Kroah-Hartman 410ab4382d2SGreg Kroah-Hartman static unsigned int serial_omap_tx_empty(struct uart_port *port) 411ab4382d2SGreg Kroah-Hartman { 412c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 413ab4382d2SGreg Kroah-Hartman unsigned long flags = 0; 414ab4382d2SGreg Kroah-Hartman unsigned int ret = 0; 415ab4382d2SGreg Kroah-Hartman 416d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 417ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_tx_empty+%d\n", up->port.line); 418ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags); 419ab4382d2SGreg Kroah-Hartman ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0; 420ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags); 421660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 422660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 423ab4382d2SGreg Kroah-Hartman return ret; 424ab4382d2SGreg Kroah-Hartman } 425ab4382d2SGreg Kroah-Hartman 426ab4382d2SGreg Kroah-Hartman static unsigned int serial_omap_get_mctrl(struct uart_port *port) 427ab4382d2SGreg Kroah-Hartman { 428c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 429514f31d1SShubhrajyoti D unsigned int status; 430ab4382d2SGreg Kroah-Hartman unsigned int ret = 0; 431ab4382d2SGreg Kroah-Hartman 432d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 433ab4382d2SGreg Kroah-Hartman status = check_modem_status(up); 434660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 435660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 436fcdca757SGovindraj.R 437ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_get_mctrl+%d\n", up->port.line); 438ab4382d2SGreg Kroah-Hartman 439ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DCD) 440ab4382d2SGreg Kroah-Hartman ret |= TIOCM_CAR; 441ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_RI) 442ab4382d2SGreg Kroah-Hartman ret |= TIOCM_RNG; 443ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DSR) 444ab4382d2SGreg Kroah-Hartman ret |= TIOCM_DSR; 445ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_CTS) 446ab4382d2SGreg Kroah-Hartman ret |= TIOCM_CTS; 447ab4382d2SGreg Kroah-Hartman return ret; 448ab4382d2SGreg Kroah-Hartman } 449ab4382d2SGreg Kroah-Hartman 450ab4382d2SGreg Kroah-Hartman static void serial_omap_set_mctrl(struct uart_port *port, unsigned int mctrl) 451ab4382d2SGreg Kroah-Hartman { 452c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 453ab4382d2SGreg Kroah-Hartman unsigned char mcr = 0; 454ab4382d2SGreg Kroah-Hartman 455ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_set_mctrl+%d\n", up->port.line); 456ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_RTS) 457ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_RTS; 458ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_DTR) 459ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_DTR; 460ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_OUT1) 461ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_OUT1; 462ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_OUT2) 463ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_OUT2; 464ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_LOOP) 465ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_LOOP; 466ab4382d2SGreg Kroah-Hartman 467d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 468c538d20cSGovindraj.R up->mcr = serial_in(up, UART_MCR); 469c538d20cSGovindraj.R up->mcr |= mcr; 470c538d20cSGovindraj.R serial_out(up, UART_MCR, up->mcr); 471660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 472660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 4739574f36fSNeilBrown 4749574f36fSNeilBrown if (gpio_is_valid(up->DTR_gpio) && 4759574f36fSNeilBrown !!(mctrl & TIOCM_DTR) != up->DTR_active) { 4769574f36fSNeilBrown up->DTR_active = !up->DTR_active; 4779574f36fSNeilBrown if (gpio_cansleep(up->DTR_gpio)) 4789574f36fSNeilBrown schedule_work(&up->qos_work); 4799574f36fSNeilBrown else 4809574f36fSNeilBrown gpio_set_value(up->DTR_gpio, 4819574f36fSNeilBrown up->DTR_active != up->DTR_inverted); 4829574f36fSNeilBrown } 483ab4382d2SGreg Kroah-Hartman } 484ab4382d2SGreg Kroah-Hartman 485ab4382d2SGreg Kroah-Hartman static void serial_omap_break_ctl(struct uart_port *port, int break_state) 486ab4382d2SGreg Kroah-Hartman { 487c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 488ab4382d2SGreg Kroah-Hartman unsigned long flags = 0; 489ab4382d2SGreg Kroah-Hartman 490ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_break_ctl+%d\n", up->port.line); 491d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 492ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags); 493ab4382d2SGreg Kroah-Hartman if (break_state == -1) 494ab4382d2SGreg Kroah-Hartman up->lcr |= UART_LCR_SBC; 495ab4382d2SGreg Kroah-Hartman else 496ab4382d2SGreg Kroah-Hartman up->lcr &= ~UART_LCR_SBC; 497ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, up->lcr); 498ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags); 499660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 500660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 501ab4382d2SGreg Kroah-Hartman } 502ab4382d2SGreg Kroah-Hartman 503ab4382d2SGreg Kroah-Hartman static int serial_omap_startup(struct uart_port *port) 504ab4382d2SGreg Kroah-Hartman { 505c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 506ab4382d2SGreg Kroah-Hartman unsigned long flags = 0; 507ab4382d2SGreg Kroah-Hartman int retval; 508ab4382d2SGreg Kroah-Hartman 509ab4382d2SGreg Kroah-Hartman /* 510ab4382d2SGreg Kroah-Hartman * Allocate the IRQ 511ab4382d2SGreg Kroah-Hartman */ 512ab4382d2SGreg Kroah-Hartman retval = request_irq(up->port.irq, serial_omap_irq, up->port.irqflags, 513ab4382d2SGreg Kroah-Hartman up->name, up); 514ab4382d2SGreg Kroah-Hartman if (retval) 515ab4382d2SGreg Kroah-Hartman return retval; 516ab4382d2SGreg Kroah-Hartman 517ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_startup+%d\n", up->port.line); 518ab4382d2SGreg Kroah-Hartman 519d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 520ab4382d2SGreg Kroah-Hartman /* 521ab4382d2SGreg Kroah-Hartman * Clear the FIFO buffers and disable them. 522ab4382d2SGreg Kroah-Hartman * (they will be reenabled in set_termios()) 523ab4382d2SGreg Kroah-Hartman */ 524ab4382d2SGreg Kroah-Hartman serial_omap_clear_fifos(up); 525ab4382d2SGreg Kroah-Hartman /* For Hardware flow control */ 526ab4382d2SGreg Kroah-Hartman serial_out(up, UART_MCR, UART_MCR_RTS); 527ab4382d2SGreg Kroah-Hartman 528ab4382d2SGreg Kroah-Hartman /* 529ab4382d2SGreg Kroah-Hartman * Clear the interrupt registers. 530ab4382d2SGreg Kroah-Hartman */ 531ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_LSR); 532ab4382d2SGreg Kroah-Hartman if (serial_in(up, UART_LSR) & UART_LSR_DR) 533ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_RX); 534ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_IIR); 535ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_MSR); 536ab4382d2SGreg Kroah-Hartman 537ab4382d2SGreg Kroah-Hartman /* 538ab4382d2SGreg Kroah-Hartman * Now, initialize the UART 539ab4382d2SGreg Kroah-Hartman */ 540ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_WLEN8); 541ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags); 542ab4382d2SGreg Kroah-Hartman /* 543ab4382d2SGreg Kroah-Hartman * Most PC uarts need OUT2 raised to enable interrupts. 544ab4382d2SGreg Kroah-Hartman */ 545ab4382d2SGreg Kroah-Hartman up->port.mctrl |= TIOCM_OUT2; 546ab4382d2SGreg Kroah-Hartman serial_omap_set_mctrl(&up->port, up->port.mctrl); 547ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags); 548ab4382d2SGreg Kroah-Hartman 549ab4382d2SGreg Kroah-Hartman up->msr_saved_flags = 0; 550ab4382d2SGreg Kroah-Hartman /* 551ab4382d2SGreg Kroah-Hartman * Finally, enable interrupts. Note: Modem status interrupts 552ab4382d2SGreg Kroah-Hartman * are set via set_termios(), which will be occurring imminently 553ab4382d2SGreg Kroah-Hartman * anyway, so we don't enable them here. 554ab4382d2SGreg Kroah-Hartman */ 555ab4382d2SGreg Kroah-Hartman up->ier = UART_IER_RLSI | UART_IER_RDI; 556ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 557ab4382d2SGreg Kroah-Hartman 55878841462SJarkko Nikula /* Enable module level wake up */ 55978841462SJarkko Nikula serial_out(up, UART_OMAP_WER, OMAP_UART_WER_MOD_WKUP); 56078841462SJarkko Nikula 561d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 562d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 563ab4382d2SGreg Kroah-Hartman up->port_activity = jiffies; 564ab4382d2SGreg Kroah-Hartman return 0; 565ab4382d2SGreg Kroah-Hartman } 566ab4382d2SGreg Kroah-Hartman 567ab4382d2SGreg Kroah-Hartman static void serial_omap_shutdown(struct uart_port *port) 568ab4382d2SGreg Kroah-Hartman { 569c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 570ab4382d2SGreg Kroah-Hartman unsigned long flags = 0; 571ab4382d2SGreg Kroah-Hartman 572ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_shutdown+%d\n", up->port.line); 573fcdca757SGovindraj.R 574d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 575ab4382d2SGreg Kroah-Hartman /* 576ab4382d2SGreg Kroah-Hartman * Disable interrupts from this port 577ab4382d2SGreg Kroah-Hartman */ 578ab4382d2SGreg Kroah-Hartman up->ier = 0; 579ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, 0); 580ab4382d2SGreg Kroah-Hartman 581ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags); 582ab4382d2SGreg Kroah-Hartman up->port.mctrl &= ~TIOCM_OUT2; 583ab4382d2SGreg Kroah-Hartman serial_omap_set_mctrl(&up->port, up->port.mctrl); 584ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags); 585ab4382d2SGreg Kroah-Hartman 586ab4382d2SGreg Kroah-Hartman /* 587ab4382d2SGreg Kroah-Hartman * Disable break condition and FIFOs 588ab4382d2SGreg Kroah-Hartman */ 589ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC); 590ab4382d2SGreg Kroah-Hartman serial_omap_clear_fifos(up); 591ab4382d2SGreg Kroah-Hartman 592ab4382d2SGreg Kroah-Hartman /* 593ab4382d2SGreg Kroah-Hartman * Read data port to reset things, and then free the irq 594ab4382d2SGreg Kroah-Hartman */ 595ab4382d2SGreg Kroah-Hartman if (serial_in(up, UART_LSR) & UART_LSR_DR) 596ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_RX); 597fcdca757SGovindraj.R 598660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 599660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 600ab4382d2SGreg Kroah-Hartman free_irq(up->port.irq, up); 601ab4382d2SGreg Kroah-Hartman } 602ab4382d2SGreg Kroah-Hartman 603ab4382d2SGreg Kroah-Hartman static inline void 604ab4382d2SGreg Kroah-Hartman serial_omap_configure_xonxoff 605ab4382d2SGreg Kroah-Hartman (struct uart_omap_port *up, struct ktermios *termios) 606ab4382d2SGreg Kroah-Hartman { 607ab4382d2SGreg Kroah-Hartman up->lcr = serial_in(up, UART_LCR); 608ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 609ab4382d2SGreg Kroah-Hartman up->efr = serial_in(up, UART_EFR); 610ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, up->efr & ~UART_EFR_ECB); 611ab4382d2SGreg Kroah-Hartman 612ab4382d2SGreg Kroah-Hartman serial_out(up, UART_XON1, termios->c_cc[VSTART]); 613ab4382d2SGreg Kroah-Hartman serial_out(up, UART_XOFF1, termios->c_cc[VSTOP]); 614ab4382d2SGreg Kroah-Hartman 615ab4382d2SGreg Kroah-Hartman /* clear SW control mode bits */ 616c538d20cSGovindraj.R up->efr &= OMAP_UART_SW_CLR; 617ab4382d2SGreg Kroah-Hartman 618ab4382d2SGreg Kroah-Hartman /* 619ab4382d2SGreg Kroah-Hartman * IXON Flag: 620957ee727SVikram Pandita * Flow control for OMAP.TX 621957ee727SVikram Pandita * OMAP.RX should listen for XON/XOFF 622ab4382d2SGreg Kroah-Hartman */ 623ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IXON) 624957ee727SVikram Pandita up->efr |= OMAP_UART_SW_RX; 625ab4382d2SGreg Kroah-Hartman 626ab4382d2SGreg Kroah-Hartman /* 627ab4382d2SGreg Kroah-Hartman * IXOFF Flag: 628957ee727SVikram Pandita * Flow control for OMAP.RX 629957ee727SVikram Pandita * OMAP.TX should send XON/XOFF 630ab4382d2SGreg Kroah-Hartman */ 631ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IXOFF) 632957ee727SVikram Pandita up->efr |= OMAP_UART_SW_TX; 633ab4382d2SGreg Kroah-Hartman 634ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); 635ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 636ab4382d2SGreg Kroah-Hartman 637ab4382d2SGreg Kroah-Hartman up->mcr = serial_in(up, UART_MCR); 638ab4382d2SGreg Kroah-Hartman 639ab4382d2SGreg Kroah-Hartman /* 640ab4382d2SGreg Kroah-Hartman * IXANY Flag: 641ab4382d2SGreg Kroah-Hartman * Enable any character to restart output. 642ab4382d2SGreg Kroah-Hartman * Operation resumes after receiving any 643ab4382d2SGreg Kroah-Hartman * character after recognition of the XOFF character 644ab4382d2SGreg Kroah-Hartman */ 645ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IXANY) 646ab4382d2SGreg Kroah-Hartman up->mcr |= UART_MCR_XONANY; 647ab4382d2SGreg Kroah-Hartman 648ab4382d2SGreg Kroah-Hartman serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR); 649ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 650ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TI752_TCR, OMAP_UART_TCR_TRIG); 651ab4382d2SGreg Kroah-Hartman /* Enable special char function UARTi.EFR_REG[5] and 652ab4382d2SGreg Kroah-Hartman * load the new software flow control mode IXON or IXOFF 653ab4382d2SGreg Kroah-Hartman * and restore the UARTi.EFR_REG[4] ENHANCED_EN value. 654ab4382d2SGreg Kroah-Hartman */ 655c538d20cSGovindraj.R serial_out(up, UART_EFR, up->efr | UART_EFR_SCD); 656ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 657ab4382d2SGreg Kroah-Hartman 658ab4382d2SGreg Kroah-Hartman serial_out(up, UART_MCR, up->mcr & ~UART_MCR_TCRTLR); 659ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, up->lcr); 660ab4382d2SGreg Kroah-Hartman } 661ab4382d2SGreg Kroah-Hartman 6622fd14964SGovindraj.R static void serial_omap_uart_qos_work(struct work_struct *work) 6632fd14964SGovindraj.R { 6642fd14964SGovindraj.R struct uart_omap_port *up = container_of(work, struct uart_omap_port, 6652fd14964SGovindraj.R qos_work); 6662fd14964SGovindraj.R 6672fd14964SGovindraj.R pm_qos_update_request(&up->pm_qos_request, up->latency); 6689574f36fSNeilBrown if (gpio_is_valid(up->DTR_gpio)) 6699574f36fSNeilBrown gpio_set_value_cansleep(up->DTR_gpio, 6709574f36fSNeilBrown up->DTR_active != up->DTR_inverted); 6712fd14964SGovindraj.R } 6722fd14964SGovindraj.R 673ab4382d2SGreg Kroah-Hartman static void 674ab4382d2SGreg Kroah-Hartman serial_omap_set_termios(struct uart_port *port, struct ktermios *termios, 675ab4382d2SGreg Kroah-Hartman struct ktermios *old) 676ab4382d2SGreg Kroah-Hartman { 677c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 678ab4382d2SGreg Kroah-Hartman unsigned char cval = 0; 679ab4382d2SGreg Kroah-Hartman unsigned char efr = 0; 680ab4382d2SGreg Kroah-Hartman unsigned long flags = 0; 681ab4382d2SGreg Kroah-Hartman unsigned int baud, quot; 682ab4382d2SGreg Kroah-Hartman 683ab4382d2SGreg Kroah-Hartman switch (termios->c_cflag & CSIZE) { 684ab4382d2SGreg Kroah-Hartman case CS5: 685ab4382d2SGreg Kroah-Hartman cval = UART_LCR_WLEN5; 686ab4382d2SGreg Kroah-Hartman break; 687ab4382d2SGreg Kroah-Hartman case CS6: 688ab4382d2SGreg Kroah-Hartman cval = UART_LCR_WLEN6; 689ab4382d2SGreg Kroah-Hartman break; 690ab4382d2SGreg Kroah-Hartman case CS7: 691ab4382d2SGreg Kroah-Hartman cval = UART_LCR_WLEN7; 692ab4382d2SGreg Kroah-Hartman break; 693ab4382d2SGreg Kroah-Hartman default: 694ab4382d2SGreg Kroah-Hartman case CS8: 695ab4382d2SGreg Kroah-Hartman cval = UART_LCR_WLEN8; 696ab4382d2SGreg Kroah-Hartman break; 697ab4382d2SGreg Kroah-Hartman } 698ab4382d2SGreg Kroah-Hartman 699ab4382d2SGreg Kroah-Hartman if (termios->c_cflag & CSTOPB) 700ab4382d2SGreg Kroah-Hartman cval |= UART_LCR_STOP; 701ab4382d2SGreg Kroah-Hartman if (termios->c_cflag & PARENB) 702ab4382d2SGreg Kroah-Hartman cval |= UART_LCR_PARITY; 703ab4382d2SGreg Kroah-Hartman if (!(termios->c_cflag & PARODD)) 704ab4382d2SGreg Kroah-Hartman cval |= UART_LCR_EPAR; 705ab4382d2SGreg Kroah-Hartman 706ab4382d2SGreg Kroah-Hartman /* 707ab4382d2SGreg Kroah-Hartman * Ask the core to calculate the divisor for us. 708ab4382d2SGreg Kroah-Hartman */ 709ab4382d2SGreg Kroah-Hartman 710ab4382d2SGreg Kroah-Hartman baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/13); 711ab4382d2SGreg Kroah-Hartman quot = serial_omap_get_divisor(port, baud); 712ab4382d2SGreg Kroah-Hartman 7132fd14964SGovindraj.R /* calculate wakeup latency constraint */ 71419723452SPaul Walmsley up->calc_latency = (USEC_PER_SEC * up->port.fifosize) / (baud / 8); 7152fd14964SGovindraj.R up->latency = up->calc_latency; 7162fd14964SGovindraj.R schedule_work(&up->qos_work); 7172fd14964SGovindraj.R 718c538d20cSGovindraj.R up->dll = quot & 0xff; 719c538d20cSGovindraj.R up->dlh = quot >> 8; 720c538d20cSGovindraj.R up->mdr1 = UART_OMAP_MDR1_DISABLE; 721c538d20cSGovindraj.R 722ab4382d2SGreg Kroah-Hartman up->fcr = UART_FCR_R_TRIG_01 | UART_FCR_T_TRIG_01 | 723ab4382d2SGreg Kroah-Hartman UART_FCR_ENABLE_FIFO; 724ab4382d2SGreg Kroah-Hartman 725ab4382d2SGreg Kroah-Hartman /* 726ab4382d2SGreg Kroah-Hartman * Ok, we're now changing the port state. Do it with 727ab4382d2SGreg Kroah-Hartman * interrupts disabled. 728ab4382d2SGreg Kroah-Hartman */ 729d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 730ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags); 731ab4382d2SGreg Kroah-Hartman 732ab4382d2SGreg Kroah-Hartman /* 733ab4382d2SGreg Kroah-Hartman * Update the per-port timeout. 734ab4382d2SGreg Kroah-Hartman */ 735ab4382d2SGreg Kroah-Hartman uart_update_timeout(port, termios->c_cflag, baud); 736ab4382d2SGreg Kroah-Hartman 737ab4382d2SGreg Kroah-Hartman up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; 738ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & INPCK) 739ab4382d2SGreg Kroah-Hartman up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE; 740ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & (BRKINT | PARMRK)) 741ab4382d2SGreg Kroah-Hartman up->port.read_status_mask |= UART_LSR_BI; 742ab4382d2SGreg Kroah-Hartman 743ab4382d2SGreg Kroah-Hartman /* 744ab4382d2SGreg Kroah-Hartman * Characters to ignore 745ab4382d2SGreg Kroah-Hartman */ 746ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask = 0; 747ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IGNPAR) 748ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE; 749ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IGNBRK) { 750ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask |= UART_LSR_BI; 751ab4382d2SGreg Kroah-Hartman /* 752ab4382d2SGreg Kroah-Hartman * If we're ignoring parity and break indicators, 753ab4382d2SGreg Kroah-Hartman * ignore overruns too (for real raw support). 754ab4382d2SGreg Kroah-Hartman */ 755ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IGNPAR) 756ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask |= UART_LSR_OE; 757ab4382d2SGreg Kroah-Hartman } 758ab4382d2SGreg Kroah-Hartman 759ab4382d2SGreg Kroah-Hartman /* 760ab4382d2SGreg Kroah-Hartman * ignore all characters if CREAD is not set 761ab4382d2SGreg Kroah-Hartman */ 762ab4382d2SGreg Kroah-Hartman if ((termios->c_cflag & CREAD) == 0) 763ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask |= UART_LSR_DR; 764ab4382d2SGreg Kroah-Hartman 765ab4382d2SGreg Kroah-Hartman /* 766ab4382d2SGreg Kroah-Hartman * Modem status interrupts 767ab4382d2SGreg Kroah-Hartman */ 768ab4382d2SGreg Kroah-Hartman up->ier &= ~UART_IER_MSI; 769ab4382d2SGreg Kroah-Hartman if (UART_ENABLE_MS(&up->port, termios->c_cflag)) 770ab4382d2SGreg Kroah-Hartman up->ier |= UART_IER_MSI; 771ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 772ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, cval); /* reset DLAB */ 773c538d20cSGovindraj.R up->lcr = cval; 77432212897SGovindraj.R up->scr = OMAP_UART_SCR_TX_EMPTY; 775ab4382d2SGreg Kroah-Hartman 776ab4382d2SGreg Kroah-Hartman /* FIFOs and DMA Settings */ 777ab4382d2SGreg Kroah-Hartman 778ab4382d2SGreg Kroah-Hartman /* FCR can be changed only when the 779ab4382d2SGreg Kroah-Hartman * baud clock is not running 780ab4382d2SGreg Kroah-Hartman * DLL_REG and DLH_REG set to 0. 781ab4382d2SGreg Kroah-Hartman */ 782ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 783ab4382d2SGreg Kroah-Hartman serial_out(up, UART_DLL, 0); 784ab4382d2SGreg Kroah-Hartman serial_out(up, UART_DLM, 0); 785ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0); 786ab4382d2SGreg Kroah-Hartman 787ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 788ab4382d2SGreg Kroah-Hartman 789ab4382d2SGreg Kroah-Hartman up->efr = serial_in(up, UART_EFR); 790ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); 791ab4382d2SGreg Kroah-Hartman 792ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 793ab4382d2SGreg Kroah-Hartman up->mcr = serial_in(up, UART_MCR); 794ab4382d2SGreg Kroah-Hartman serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR); 795ab4382d2SGreg Kroah-Hartman /* FIFO ENABLE, DMA MODE */ 7960ba5f668SPaul Walmsley 7970ba5f668SPaul Walmsley up->scr |= OMAP_UART_SCR_RX_TRIG_GRANU1_MASK; 7980a697b22SPaul Walmsley 7990ba5f668SPaul Walmsley /* Set receive FIFO threshold to 1 byte */ 8000ba5f668SPaul Walmsley up->fcr &= ~OMAP_UART_FCR_RX_FIFO_TRIG_MASK; 8010ba5f668SPaul Walmsley up->fcr |= (0x1 << OMAP_UART_FCR_RX_FIFO_TRIG_SHIFT); 8028a74e9ffSGreg Kroah-Hartman 8030ba5f668SPaul Walmsley serial_out(up, UART_FCR, up->fcr); 8040ba5f668SPaul Walmsley serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 8050ba5f668SPaul Walmsley 806c538d20cSGovindraj.R serial_out(up, UART_OMAP_SCR, up->scr); 807c538d20cSGovindraj.R 808ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, up->efr); 809ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 810ab4382d2SGreg Kroah-Hartman serial_out(up, UART_MCR, up->mcr); 811ab4382d2SGreg Kroah-Hartman 812ab4382d2SGreg Kroah-Hartman /* Protocol, Baud Rate, and Interrupt Settings */ 813ab4382d2SGreg Kroah-Hartman 81494734749SGovindraj.R if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) 81594734749SGovindraj.R serial_omap_mdr1_errataset(up, up->mdr1); 81694734749SGovindraj.R else 817c538d20cSGovindraj.R serial_out(up, UART_OMAP_MDR1, up->mdr1); 81894734749SGovindraj.R 819ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 820ab4382d2SGreg Kroah-Hartman 821ab4382d2SGreg Kroah-Hartman up->efr = serial_in(up, UART_EFR); 822ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); 823ab4382d2SGreg Kroah-Hartman 824ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0); 825ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, 0); 826ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 827ab4382d2SGreg Kroah-Hartman 828c538d20cSGovindraj.R serial_out(up, UART_DLL, up->dll); /* LS of divisor */ 829c538d20cSGovindraj.R serial_out(up, UART_DLM, up->dlh); /* MS of divisor */ 830ab4382d2SGreg Kroah-Hartman 831ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0); 832ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 833ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 834ab4382d2SGreg Kroah-Hartman 835ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, up->efr); 836ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, cval); 837ab4382d2SGreg Kroah-Hartman 838ab4382d2SGreg Kroah-Hartman if (baud > 230400 && baud != 3000000) 839c538d20cSGovindraj.R up->mdr1 = UART_OMAP_MDR1_13X_MODE; 840ab4382d2SGreg Kroah-Hartman else 841c538d20cSGovindraj.R up->mdr1 = UART_OMAP_MDR1_16X_MODE; 842c538d20cSGovindraj.R 84394734749SGovindraj.R if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) 84494734749SGovindraj.R serial_omap_mdr1_errataset(up, up->mdr1); 84594734749SGovindraj.R else 846c538d20cSGovindraj.R serial_out(up, UART_OMAP_MDR1, up->mdr1); 847ab4382d2SGreg Kroah-Hartman 848ab4382d2SGreg Kroah-Hartman /* Hardware Flow Control Configuration */ 849ab4382d2SGreg Kroah-Hartman 850ab4382d2SGreg Kroah-Hartman if (termios->c_cflag & CRTSCTS) { 851ab4382d2SGreg Kroah-Hartman efr |= (UART_EFR_CTS | UART_EFR_RTS); 852ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 853ab4382d2SGreg Kroah-Hartman 854ab4382d2SGreg Kroah-Hartman up->mcr = serial_in(up, UART_MCR); 855ab4382d2SGreg Kroah-Hartman serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR); 856ab4382d2SGreg Kroah-Hartman 857ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 858ab4382d2SGreg Kroah-Hartman up->efr = serial_in(up, UART_EFR); 859ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); 860ab4382d2SGreg Kroah-Hartman 861ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TI752_TCR, OMAP_UART_TCR_TRIG); 862ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, efr); /* Enable AUTORTS and AUTOCTS */ 863ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 864ab4382d2SGreg Kroah-Hartman serial_out(up, UART_MCR, up->mcr | UART_MCR_RTS); 865ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, cval); 866ab4382d2SGreg Kroah-Hartman } 867ab4382d2SGreg Kroah-Hartman 868ab4382d2SGreg Kroah-Hartman serial_omap_set_mctrl(&up->port, up->port.mctrl); 869ab4382d2SGreg Kroah-Hartman /* Software Flow Control Configuration */ 870ab4382d2SGreg Kroah-Hartman serial_omap_configure_xonxoff(up, termios); 871ab4382d2SGreg Kroah-Hartman 872ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags); 873660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 874660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 875ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_set_termios+%d\n", up->port.line); 876ab4382d2SGreg Kroah-Hartman } 877ab4382d2SGreg Kroah-Hartman 8789727faf4SFelipe Balbi static int serial_omap_set_wake(struct uart_port *port, unsigned int state) 8799727faf4SFelipe Balbi { 8809727faf4SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 8819727faf4SFelipe Balbi 8829727faf4SFelipe Balbi serial_omap_enable_wakeup(up, state); 8839727faf4SFelipe Balbi 8849727faf4SFelipe Balbi return 0; 8859727faf4SFelipe Balbi } 8869727faf4SFelipe Balbi 887ab4382d2SGreg Kroah-Hartman static void 888ab4382d2SGreg Kroah-Hartman serial_omap_pm(struct uart_port *port, unsigned int state, 889ab4382d2SGreg Kroah-Hartman unsigned int oldstate) 890ab4382d2SGreg Kroah-Hartman { 891c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 892ab4382d2SGreg Kroah-Hartman unsigned char efr; 893ab4382d2SGreg Kroah-Hartman 894ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_pm+%d\n", up->port.line); 895fcdca757SGovindraj.R 896d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 897ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 898ab4382d2SGreg Kroah-Hartman efr = serial_in(up, UART_EFR); 899ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, efr | UART_EFR_ECB); 900ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0); 901ab4382d2SGreg Kroah-Hartman 902ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, (state != 0) ? UART_IERX_SLEEP : 0); 903ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 904ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, efr); 905ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0); 906fcdca757SGovindraj.R 907d8ee4ea6SFelipe Balbi if (!device_may_wakeup(up->dev)) { 908fcdca757SGovindraj.R if (!state) 909d8ee4ea6SFelipe Balbi pm_runtime_forbid(up->dev); 910fcdca757SGovindraj.R else 911d8ee4ea6SFelipe Balbi pm_runtime_allow(up->dev); 912fcdca757SGovindraj.R } 913fcdca757SGovindraj.R 914660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 915660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 916ab4382d2SGreg Kroah-Hartman } 917ab4382d2SGreg Kroah-Hartman 918ab4382d2SGreg Kroah-Hartman static void serial_omap_release_port(struct uart_port *port) 919ab4382d2SGreg Kroah-Hartman { 920ab4382d2SGreg Kroah-Hartman dev_dbg(port->dev, "serial_omap_release_port+\n"); 921ab4382d2SGreg Kroah-Hartman } 922ab4382d2SGreg Kroah-Hartman 923ab4382d2SGreg Kroah-Hartman static int serial_omap_request_port(struct uart_port *port) 924ab4382d2SGreg Kroah-Hartman { 925ab4382d2SGreg Kroah-Hartman dev_dbg(port->dev, "serial_omap_request_port+\n"); 926ab4382d2SGreg Kroah-Hartman return 0; 927ab4382d2SGreg Kroah-Hartman } 928ab4382d2SGreg Kroah-Hartman 929ab4382d2SGreg Kroah-Hartman static void serial_omap_config_port(struct uart_port *port, int flags) 930ab4382d2SGreg Kroah-Hartman { 931c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 932ab4382d2SGreg Kroah-Hartman 933ab4382d2SGreg Kroah-Hartman dev_dbg(up->port.dev, "serial_omap_config_port+%d\n", 934ba77433dSRajendra Nayak up->port.line); 935ab4382d2SGreg Kroah-Hartman up->port.type = PORT_OMAP; 936ab4382d2SGreg Kroah-Hartman } 937ab4382d2SGreg Kroah-Hartman 938ab4382d2SGreg Kroah-Hartman static int 939ab4382d2SGreg Kroah-Hartman serial_omap_verify_port(struct uart_port *port, struct serial_struct *ser) 940ab4382d2SGreg Kroah-Hartman { 941ab4382d2SGreg Kroah-Hartman /* we don't want the core code to modify any port params */ 942ab4382d2SGreg Kroah-Hartman dev_dbg(port->dev, "serial_omap_verify_port+\n"); 943ab4382d2SGreg Kroah-Hartman return -EINVAL; 944ab4382d2SGreg Kroah-Hartman } 945ab4382d2SGreg Kroah-Hartman 946ab4382d2SGreg Kroah-Hartman static const char * 947ab4382d2SGreg Kroah-Hartman serial_omap_type(struct uart_port *port) 948ab4382d2SGreg Kroah-Hartman { 949c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 950ab4382d2SGreg Kroah-Hartman 951ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_type+%d\n", up->port.line); 952ab4382d2SGreg Kroah-Hartman return up->name; 953ab4382d2SGreg Kroah-Hartman } 954ab4382d2SGreg Kroah-Hartman 955ab4382d2SGreg Kroah-Hartman #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE) 956ab4382d2SGreg Kroah-Hartman 957ab4382d2SGreg Kroah-Hartman static inline void wait_for_xmitr(struct uart_omap_port *up) 958ab4382d2SGreg Kroah-Hartman { 959ab4382d2SGreg Kroah-Hartman unsigned int status, tmout = 10000; 960ab4382d2SGreg Kroah-Hartman 961ab4382d2SGreg Kroah-Hartman /* Wait up to 10ms for the character(s) to be sent. */ 962ab4382d2SGreg Kroah-Hartman do { 963ab4382d2SGreg Kroah-Hartman status = serial_in(up, UART_LSR); 964ab4382d2SGreg Kroah-Hartman 965ab4382d2SGreg Kroah-Hartman if (status & UART_LSR_BI) 966ab4382d2SGreg Kroah-Hartman up->lsr_break_flag = UART_LSR_BI; 967ab4382d2SGreg Kroah-Hartman 968ab4382d2SGreg Kroah-Hartman if (--tmout == 0) 969ab4382d2SGreg Kroah-Hartman break; 970ab4382d2SGreg Kroah-Hartman udelay(1); 971ab4382d2SGreg Kroah-Hartman } while ((status & BOTH_EMPTY) != BOTH_EMPTY); 972ab4382d2SGreg Kroah-Hartman 973ab4382d2SGreg Kroah-Hartman /* Wait up to 1s for flow control if necessary */ 974ab4382d2SGreg Kroah-Hartman if (up->port.flags & UPF_CONS_FLOW) { 975ab4382d2SGreg Kroah-Hartman tmout = 1000000; 976ab4382d2SGreg Kroah-Hartman for (tmout = 1000000; tmout; tmout--) { 977ab4382d2SGreg Kroah-Hartman unsigned int msr = serial_in(up, UART_MSR); 978ab4382d2SGreg Kroah-Hartman 979ab4382d2SGreg Kroah-Hartman up->msr_saved_flags |= msr & MSR_SAVE_FLAGS; 980ab4382d2SGreg Kroah-Hartman if (msr & UART_MSR_CTS) 981ab4382d2SGreg Kroah-Hartman break; 982ab4382d2SGreg Kroah-Hartman 983ab4382d2SGreg Kroah-Hartman udelay(1); 984ab4382d2SGreg Kroah-Hartman } 985ab4382d2SGreg Kroah-Hartman } 986ab4382d2SGreg Kroah-Hartman } 987ab4382d2SGreg Kroah-Hartman 988ab4382d2SGreg Kroah-Hartman #ifdef CONFIG_CONSOLE_POLL 989ab4382d2SGreg Kroah-Hartman 990ab4382d2SGreg Kroah-Hartman static void serial_omap_poll_put_char(struct uart_port *port, unsigned char ch) 991ab4382d2SGreg Kroah-Hartman { 992c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 993fcdca757SGovindraj.R 994d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 995ab4382d2SGreg Kroah-Hartman wait_for_xmitr(up); 996ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TX, ch); 997660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 998660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 999ab4382d2SGreg Kroah-Hartman } 1000ab4382d2SGreg Kroah-Hartman 1001ab4382d2SGreg Kroah-Hartman static int serial_omap_poll_get_char(struct uart_port *port) 1002ab4382d2SGreg Kroah-Hartman { 1003c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 1004fcdca757SGovindraj.R unsigned int status; 1005ab4382d2SGreg Kroah-Hartman 1006d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 1007fcdca757SGovindraj.R status = serial_in(up, UART_LSR); 1008a6b19c33SFelipe Balbi if (!(status & UART_LSR_DR)) { 1009a6b19c33SFelipe Balbi status = NO_POLL_CHAR; 1010a6b19c33SFelipe Balbi goto out; 1011a6b19c33SFelipe Balbi } 1012ab4382d2SGreg Kroah-Hartman 1013fcdca757SGovindraj.R status = serial_in(up, UART_RX); 1014a6b19c33SFelipe Balbi 1015a6b19c33SFelipe Balbi out: 1016660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 1017660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 1018a6b19c33SFelipe Balbi 1019fcdca757SGovindraj.R return status; 1020ab4382d2SGreg Kroah-Hartman } 1021ab4382d2SGreg Kroah-Hartman 1022ab4382d2SGreg Kroah-Hartman #endif /* CONFIG_CONSOLE_POLL */ 1023ab4382d2SGreg Kroah-Hartman 1024ab4382d2SGreg Kroah-Hartman #ifdef CONFIG_SERIAL_OMAP_CONSOLE 1025ab4382d2SGreg Kroah-Hartman 1026ab4382d2SGreg Kroah-Hartman static struct uart_omap_port *serial_omap_console_ports[4]; 1027ab4382d2SGreg Kroah-Hartman 1028ab4382d2SGreg Kroah-Hartman static struct uart_driver serial_omap_reg; 1029ab4382d2SGreg Kroah-Hartman 1030ab4382d2SGreg Kroah-Hartman static void serial_omap_console_putchar(struct uart_port *port, int ch) 1031ab4382d2SGreg Kroah-Hartman { 1032c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 1033ab4382d2SGreg Kroah-Hartman 1034ab4382d2SGreg Kroah-Hartman wait_for_xmitr(up); 1035ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TX, ch); 1036ab4382d2SGreg Kroah-Hartman } 1037ab4382d2SGreg Kroah-Hartman 1038ab4382d2SGreg Kroah-Hartman static void 1039ab4382d2SGreg Kroah-Hartman serial_omap_console_write(struct console *co, const char *s, 1040ab4382d2SGreg Kroah-Hartman unsigned int count) 1041ab4382d2SGreg Kroah-Hartman { 1042ab4382d2SGreg Kroah-Hartman struct uart_omap_port *up = serial_omap_console_ports[co->index]; 1043ab4382d2SGreg Kroah-Hartman unsigned long flags; 1044ab4382d2SGreg Kroah-Hartman unsigned int ier; 1045ab4382d2SGreg Kroah-Hartman int locked = 1; 1046ab4382d2SGreg Kroah-Hartman 1047d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 1048fcdca757SGovindraj.R 1049ab4382d2SGreg Kroah-Hartman local_irq_save(flags); 1050ab4382d2SGreg Kroah-Hartman if (up->port.sysrq) 1051ab4382d2SGreg Kroah-Hartman locked = 0; 1052ab4382d2SGreg Kroah-Hartman else if (oops_in_progress) 1053ab4382d2SGreg Kroah-Hartman locked = spin_trylock(&up->port.lock); 1054ab4382d2SGreg Kroah-Hartman else 1055ab4382d2SGreg Kroah-Hartman spin_lock(&up->port.lock); 1056ab4382d2SGreg Kroah-Hartman 1057ab4382d2SGreg Kroah-Hartman /* 1058ab4382d2SGreg Kroah-Hartman * First save the IER then disable the interrupts 1059ab4382d2SGreg Kroah-Hartman */ 1060ab4382d2SGreg Kroah-Hartman ier = serial_in(up, UART_IER); 1061ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, 0); 1062ab4382d2SGreg Kroah-Hartman 1063ab4382d2SGreg Kroah-Hartman uart_console_write(&up->port, s, count, serial_omap_console_putchar); 1064ab4382d2SGreg Kroah-Hartman 1065ab4382d2SGreg Kroah-Hartman /* 1066ab4382d2SGreg Kroah-Hartman * Finally, wait for transmitter to become empty 1067ab4382d2SGreg Kroah-Hartman * and restore the IER 1068ab4382d2SGreg Kroah-Hartman */ 1069ab4382d2SGreg Kroah-Hartman wait_for_xmitr(up); 1070ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, ier); 1071ab4382d2SGreg Kroah-Hartman /* 1072ab4382d2SGreg Kroah-Hartman * The receive handling will happen properly because the 1073ab4382d2SGreg Kroah-Hartman * receive ready bit will still be set; it is not cleared 1074ab4382d2SGreg Kroah-Hartman * on read. However, modem control will not, we must 1075ab4382d2SGreg Kroah-Hartman * call it if we have saved something in the saved flags 1076ab4382d2SGreg Kroah-Hartman * while processing with interrupts off. 1077ab4382d2SGreg Kroah-Hartman */ 1078ab4382d2SGreg Kroah-Hartman if (up->msr_saved_flags) 1079ab4382d2SGreg Kroah-Hartman check_modem_status(up); 1080ab4382d2SGreg Kroah-Hartman 1081d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 1082d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 1083ab4382d2SGreg Kroah-Hartman if (locked) 1084ab4382d2SGreg Kroah-Hartman spin_unlock(&up->port.lock); 1085ab4382d2SGreg Kroah-Hartman local_irq_restore(flags); 1086ab4382d2SGreg Kroah-Hartman } 1087ab4382d2SGreg Kroah-Hartman 1088ab4382d2SGreg Kroah-Hartman static int __init 1089ab4382d2SGreg Kroah-Hartman serial_omap_console_setup(struct console *co, char *options) 1090ab4382d2SGreg Kroah-Hartman { 1091ab4382d2SGreg Kroah-Hartman struct uart_omap_port *up; 1092ab4382d2SGreg Kroah-Hartman int baud = 115200; 1093ab4382d2SGreg Kroah-Hartman int bits = 8; 1094ab4382d2SGreg Kroah-Hartman int parity = 'n'; 1095ab4382d2SGreg Kroah-Hartman int flow = 'n'; 1096ab4382d2SGreg Kroah-Hartman 1097ab4382d2SGreg Kroah-Hartman if (serial_omap_console_ports[co->index] == NULL) 1098ab4382d2SGreg Kroah-Hartman return -ENODEV; 1099ab4382d2SGreg Kroah-Hartman up = serial_omap_console_ports[co->index]; 1100ab4382d2SGreg Kroah-Hartman 1101ab4382d2SGreg Kroah-Hartman if (options) 1102ab4382d2SGreg Kroah-Hartman uart_parse_options(options, &baud, &parity, &bits, &flow); 1103ab4382d2SGreg Kroah-Hartman 1104ab4382d2SGreg Kroah-Hartman return uart_set_options(&up->port, co, baud, parity, bits, flow); 1105ab4382d2SGreg Kroah-Hartman } 1106ab4382d2SGreg Kroah-Hartman 1107ab4382d2SGreg Kroah-Hartman static struct console serial_omap_console = { 1108ab4382d2SGreg Kroah-Hartman .name = OMAP_SERIAL_NAME, 1109ab4382d2SGreg Kroah-Hartman .write = serial_omap_console_write, 1110ab4382d2SGreg Kroah-Hartman .device = uart_console_device, 1111ab4382d2SGreg Kroah-Hartman .setup = serial_omap_console_setup, 1112ab4382d2SGreg Kroah-Hartman .flags = CON_PRINTBUFFER, 1113ab4382d2SGreg Kroah-Hartman .index = -1, 1114ab4382d2SGreg Kroah-Hartman .data = &serial_omap_reg, 1115ab4382d2SGreg Kroah-Hartman }; 1116ab4382d2SGreg Kroah-Hartman 1117ab4382d2SGreg Kroah-Hartman static void serial_omap_add_console_port(struct uart_omap_port *up) 1118ab4382d2SGreg Kroah-Hartman { 1119ba77433dSRajendra Nayak serial_omap_console_ports[up->port.line] = up; 1120ab4382d2SGreg Kroah-Hartman } 1121ab4382d2SGreg Kroah-Hartman 1122ab4382d2SGreg Kroah-Hartman #define OMAP_CONSOLE (&serial_omap_console) 1123ab4382d2SGreg Kroah-Hartman 1124ab4382d2SGreg Kroah-Hartman #else 1125ab4382d2SGreg Kroah-Hartman 1126ab4382d2SGreg Kroah-Hartman #define OMAP_CONSOLE NULL 1127ab4382d2SGreg Kroah-Hartman 1128ab4382d2SGreg Kroah-Hartman static inline void serial_omap_add_console_port(struct uart_omap_port *up) 1129ab4382d2SGreg Kroah-Hartman {} 1130ab4382d2SGreg Kroah-Hartman 1131ab4382d2SGreg Kroah-Hartman #endif 1132ab4382d2SGreg Kroah-Hartman 1133ab4382d2SGreg Kroah-Hartman static struct uart_ops serial_omap_pops = { 1134ab4382d2SGreg Kroah-Hartman .tx_empty = serial_omap_tx_empty, 1135ab4382d2SGreg Kroah-Hartman .set_mctrl = serial_omap_set_mctrl, 1136ab4382d2SGreg Kroah-Hartman .get_mctrl = serial_omap_get_mctrl, 1137ab4382d2SGreg Kroah-Hartman .stop_tx = serial_omap_stop_tx, 1138ab4382d2SGreg Kroah-Hartman .start_tx = serial_omap_start_tx, 1139ab4382d2SGreg Kroah-Hartman .stop_rx = serial_omap_stop_rx, 1140ab4382d2SGreg Kroah-Hartman .enable_ms = serial_omap_enable_ms, 1141ab4382d2SGreg Kroah-Hartman .break_ctl = serial_omap_break_ctl, 1142ab4382d2SGreg Kroah-Hartman .startup = serial_omap_startup, 1143ab4382d2SGreg Kroah-Hartman .shutdown = serial_omap_shutdown, 1144ab4382d2SGreg Kroah-Hartman .set_termios = serial_omap_set_termios, 1145ab4382d2SGreg Kroah-Hartman .pm = serial_omap_pm, 11469727faf4SFelipe Balbi .set_wake = serial_omap_set_wake, 1147ab4382d2SGreg Kroah-Hartman .type = serial_omap_type, 1148ab4382d2SGreg Kroah-Hartman .release_port = serial_omap_release_port, 1149ab4382d2SGreg Kroah-Hartman .request_port = serial_omap_request_port, 1150ab4382d2SGreg Kroah-Hartman .config_port = serial_omap_config_port, 1151ab4382d2SGreg Kroah-Hartman .verify_port = serial_omap_verify_port, 1152ab4382d2SGreg Kroah-Hartman #ifdef CONFIG_CONSOLE_POLL 1153ab4382d2SGreg Kroah-Hartman .poll_put_char = serial_omap_poll_put_char, 1154ab4382d2SGreg Kroah-Hartman .poll_get_char = serial_omap_poll_get_char, 1155ab4382d2SGreg Kroah-Hartman #endif 1156ab4382d2SGreg Kroah-Hartman }; 1157ab4382d2SGreg Kroah-Hartman 1158ab4382d2SGreg Kroah-Hartman static struct uart_driver serial_omap_reg = { 1159ab4382d2SGreg Kroah-Hartman .owner = THIS_MODULE, 1160ab4382d2SGreg Kroah-Hartman .driver_name = "OMAP-SERIAL", 1161ab4382d2SGreg Kroah-Hartman .dev_name = OMAP_SERIAL_NAME, 1162ab4382d2SGreg Kroah-Hartman .nr = OMAP_MAX_HSUART_PORTS, 1163ab4382d2SGreg Kroah-Hartman .cons = OMAP_CONSOLE, 1164ab4382d2SGreg Kroah-Hartman }; 1165ab4382d2SGreg Kroah-Hartman 11663bc4f0d8SShubhrajyoti D #ifdef CONFIG_PM_SLEEP 1167fcdca757SGovindraj.R static int serial_omap_suspend(struct device *dev) 1168ab4382d2SGreg Kroah-Hartman { 1169fcdca757SGovindraj.R struct uart_omap_port *up = dev_get_drvdata(dev); 1170ab4382d2SGreg Kroah-Hartman 11712fd14964SGovindraj.R if (up) { 1172ab4382d2SGreg Kroah-Hartman uart_suspend_port(&serial_omap_reg, &up->port); 11732fd14964SGovindraj.R flush_work_sync(&up->qos_work); 11742fd14964SGovindraj.R } 11752fd14964SGovindraj.R 1176ab4382d2SGreg Kroah-Hartman return 0; 1177ab4382d2SGreg Kroah-Hartman } 1178ab4382d2SGreg Kroah-Hartman 1179fcdca757SGovindraj.R static int serial_omap_resume(struct device *dev) 1180ab4382d2SGreg Kroah-Hartman { 1181fcdca757SGovindraj.R struct uart_omap_port *up = dev_get_drvdata(dev); 1182ab4382d2SGreg Kroah-Hartman 1183ab4382d2SGreg Kroah-Hartman if (up) 1184ab4382d2SGreg Kroah-Hartman uart_resume_port(&serial_omap_reg, &up->port); 1185ab4382d2SGreg Kroah-Hartman return 0; 1186ab4382d2SGreg Kroah-Hartman } 1187fcdca757SGovindraj.R #endif 1188ab4382d2SGreg Kroah-Hartman 11896d608ef3SFelipe Balbi static void __devinit omap_serial_fill_features_erratas(struct uart_omap_port *up) 11907c77c8deSGovindraj.R { 11917c77c8deSGovindraj.R u32 mvr, scheme; 11927c77c8deSGovindraj.R u16 revision, major, minor; 11937c77c8deSGovindraj.R 11947c77c8deSGovindraj.R mvr = serial_in(up, UART_OMAP_MVER); 11957c77c8deSGovindraj.R 11967c77c8deSGovindraj.R /* Check revision register scheme */ 11977c77c8deSGovindraj.R scheme = mvr >> OMAP_UART_MVR_SCHEME_SHIFT; 11987c77c8deSGovindraj.R 11997c77c8deSGovindraj.R switch (scheme) { 12007c77c8deSGovindraj.R case 0: /* Legacy Scheme: OMAP2/3 */ 12017c77c8deSGovindraj.R /* MINOR_REV[0:4], MAJOR_REV[4:7] */ 12027c77c8deSGovindraj.R major = (mvr & OMAP_UART_LEGACY_MVR_MAJ_MASK) >> 12037c77c8deSGovindraj.R OMAP_UART_LEGACY_MVR_MAJ_SHIFT; 12047c77c8deSGovindraj.R minor = (mvr & OMAP_UART_LEGACY_MVR_MIN_MASK); 12057c77c8deSGovindraj.R break; 12067c77c8deSGovindraj.R case 1: 12077c77c8deSGovindraj.R /* New Scheme: OMAP4+ */ 12087c77c8deSGovindraj.R /* MINOR_REV[0:5], MAJOR_REV[8:10] */ 12097c77c8deSGovindraj.R major = (mvr & OMAP_UART_MVR_MAJ_MASK) >> 12107c77c8deSGovindraj.R OMAP_UART_MVR_MAJ_SHIFT; 12117c77c8deSGovindraj.R minor = (mvr & OMAP_UART_MVR_MIN_MASK); 12127c77c8deSGovindraj.R break; 12137c77c8deSGovindraj.R default: 1214d8ee4ea6SFelipe Balbi dev_warn(up->dev, 12157c77c8deSGovindraj.R "Unknown %s revision, defaulting to highest\n", 12167c77c8deSGovindraj.R up->name); 12177c77c8deSGovindraj.R /* highest possible revision */ 12187c77c8deSGovindraj.R major = 0xff; 12197c77c8deSGovindraj.R minor = 0xff; 12207c77c8deSGovindraj.R } 12217c77c8deSGovindraj.R 12227c77c8deSGovindraj.R /* normalize revision for the driver */ 12237c77c8deSGovindraj.R revision = UART_BUILD_REVISION(major, minor); 12247c77c8deSGovindraj.R 12257c77c8deSGovindraj.R switch (revision) { 12267c77c8deSGovindraj.R case OMAP_UART_REV_46: 12277c77c8deSGovindraj.R up->errata |= (UART_ERRATA_i202_MDR1_ACCESS | 12287c77c8deSGovindraj.R UART_ERRATA_i291_DMA_FORCEIDLE); 12297c77c8deSGovindraj.R break; 12307c77c8deSGovindraj.R case OMAP_UART_REV_52: 12317c77c8deSGovindraj.R up->errata |= (UART_ERRATA_i202_MDR1_ACCESS | 12327c77c8deSGovindraj.R UART_ERRATA_i291_DMA_FORCEIDLE); 12337c77c8deSGovindraj.R break; 12347c77c8deSGovindraj.R case OMAP_UART_REV_63: 12357c77c8deSGovindraj.R up->errata |= UART_ERRATA_i202_MDR1_ACCESS; 12367c77c8deSGovindraj.R break; 12377c77c8deSGovindraj.R default: 12387c77c8deSGovindraj.R break; 12397c77c8deSGovindraj.R } 12407c77c8deSGovindraj.R } 12417c77c8deSGovindraj.R 12426d608ef3SFelipe Balbi static __devinit struct omap_uart_port_info *of_get_uart_port_info(struct device *dev) 1243d92b0dfcSRajendra Nayak { 1244d92b0dfcSRajendra Nayak struct omap_uart_port_info *omap_up_info; 1245d92b0dfcSRajendra Nayak 1246d92b0dfcSRajendra Nayak omap_up_info = devm_kzalloc(dev, sizeof(*omap_up_info), GFP_KERNEL); 1247d92b0dfcSRajendra Nayak if (!omap_up_info) 1248d92b0dfcSRajendra Nayak return NULL; /* out of memory */ 1249d92b0dfcSRajendra Nayak 1250d92b0dfcSRajendra Nayak of_property_read_u32(dev->of_node, "clock-frequency", 1251d92b0dfcSRajendra Nayak &omap_up_info->uartclk); 1252d92b0dfcSRajendra Nayak return omap_up_info; 1253d92b0dfcSRajendra Nayak } 1254d92b0dfcSRajendra Nayak 12556d608ef3SFelipe Balbi static int __devinit serial_omap_probe(struct platform_device *pdev) 1256ab4382d2SGreg Kroah-Hartman { 1257ab4382d2SGreg Kroah-Hartman struct uart_omap_port *up; 125849457430SFelipe Balbi struct resource *mem, *irq; 1259ab4382d2SGreg Kroah-Hartman struct omap_uart_port_info *omap_up_info = pdev->dev.platform_data; 12609574f36fSNeilBrown int ret; 1261ab4382d2SGreg Kroah-Hartman 1262d92b0dfcSRajendra Nayak if (pdev->dev.of_node) 1263d92b0dfcSRajendra Nayak omap_up_info = of_get_uart_port_info(&pdev->dev); 1264d92b0dfcSRajendra Nayak 1265ab4382d2SGreg Kroah-Hartman mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1266ab4382d2SGreg Kroah-Hartman if (!mem) { 1267ab4382d2SGreg Kroah-Hartman dev_err(&pdev->dev, "no mem resource?\n"); 1268ab4382d2SGreg Kroah-Hartman return -ENODEV; 1269ab4382d2SGreg Kroah-Hartman } 1270ab4382d2SGreg Kroah-Hartman 1271ab4382d2SGreg Kroah-Hartman irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 1272ab4382d2SGreg Kroah-Hartman if (!irq) { 1273ab4382d2SGreg Kroah-Hartman dev_err(&pdev->dev, "no irq resource?\n"); 1274ab4382d2SGreg Kroah-Hartman return -ENODEV; 1275ab4382d2SGreg Kroah-Hartman } 1276ab4382d2SGreg Kroah-Hartman 1277388bc262SShubhrajyoti D if (!devm_request_mem_region(&pdev->dev, mem->start, resource_size(mem), 1278ab4382d2SGreg Kroah-Hartman pdev->dev.driver->name)) { 1279ab4382d2SGreg Kroah-Hartman dev_err(&pdev->dev, "memory region already claimed\n"); 1280ab4382d2SGreg Kroah-Hartman return -EBUSY; 1281ab4382d2SGreg Kroah-Hartman } 1282ab4382d2SGreg Kroah-Hartman 12839574f36fSNeilBrown if (gpio_is_valid(omap_up_info->DTR_gpio) && 12849574f36fSNeilBrown omap_up_info->DTR_present) { 12859574f36fSNeilBrown ret = gpio_request(omap_up_info->DTR_gpio, "omap-serial"); 12869574f36fSNeilBrown if (ret < 0) 12879574f36fSNeilBrown return ret; 12889574f36fSNeilBrown ret = gpio_direction_output(omap_up_info->DTR_gpio, 12899574f36fSNeilBrown omap_up_info->DTR_inverted); 12909574f36fSNeilBrown if (ret < 0) 12919574f36fSNeilBrown return ret; 12929574f36fSNeilBrown } 12939574f36fSNeilBrown 1294388bc262SShubhrajyoti D up = devm_kzalloc(&pdev->dev, sizeof(*up), GFP_KERNEL); 1295388bc262SShubhrajyoti D if (!up) 1296388bc262SShubhrajyoti D return -ENOMEM; 1297388bc262SShubhrajyoti D 12989574f36fSNeilBrown if (gpio_is_valid(omap_up_info->DTR_gpio) && 12999574f36fSNeilBrown omap_up_info->DTR_present) { 13009574f36fSNeilBrown up->DTR_gpio = omap_up_info->DTR_gpio; 13019574f36fSNeilBrown up->DTR_inverted = omap_up_info->DTR_inverted; 13029574f36fSNeilBrown } else 13039574f36fSNeilBrown up->DTR_gpio = -EINVAL; 13049574f36fSNeilBrown up->DTR_active = 0; 13059574f36fSNeilBrown 1306d8ee4ea6SFelipe Balbi up->dev = &pdev->dev; 1307ab4382d2SGreg Kroah-Hartman up->port.dev = &pdev->dev; 1308ab4382d2SGreg Kroah-Hartman up->port.type = PORT_OMAP; 1309ab4382d2SGreg Kroah-Hartman up->port.iotype = UPIO_MEM; 1310ab4382d2SGreg Kroah-Hartman up->port.irq = irq->start; 1311ab4382d2SGreg Kroah-Hartman 1312ab4382d2SGreg Kroah-Hartman up->port.regshift = 2; 1313ab4382d2SGreg Kroah-Hartman up->port.fifosize = 64; 1314ab4382d2SGreg Kroah-Hartman up->port.ops = &serial_omap_pops; 1315ab4382d2SGreg Kroah-Hartman 1316d92b0dfcSRajendra Nayak if (pdev->dev.of_node) 1317d92b0dfcSRajendra Nayak up->port.line = of_alias_get_id(pdev->dev.of_node, "serial"); 1318d92b0dfcSRajendra Nayak else 1319ab4382d2SGreg Kroah-Hartman up->port.line = pdev->id; 1320ab4382d2SGreg Kroah-Hartman 1321d92b0dfcSRajendra Nayak if (up->port.line < 0) { 1322d92b0dfcSRajendra Nayak dev_err(&pdev->dev, "failed to get alias/pdev id, errno %d\n", 1323d92b0dfcSRajendra Nayak up->port.line); 1324d92b0dfcSRajendra Nayak ret = -ENODEV; 1325388bc262SShubhrajyoti D goto err_port_line; 1326d92b0dfcSRajendra Nayak } 1327d92b0dfcSRajendra Nayak 1328d92b0dfcSRajendra Nayak sprintf(up->name, "OMAP UART%d", up->port.line); 1329edd70ad7SGovindraj.R up->port.mapbase = mem->start; 1330388bc262SShubhrajyoti D up->port.membase = devm_ioremap(&pdev->dev, mem->start, 1331388bc262SShubhrajyoti D resource_size(mem)); 1332edd70ad7SGovindraj.R if (!up->port.membase) { 1333edd70ad7SGovindraj.R dev_err(&pdev->dev, "can't ioremap UART\n"); 1334edd70ad7SGovindraj.R ret = -ENOMEM; 1335388bc262SShubhrajyoti D goto err_ioremap; 1336edd70ad7SGovindraj.R } 1337edd70ad7SGovindraj.R 1338ab4382d2SGreg Kroah-Hartman up->port.flags = omap_up_info->flags; 1339ab4382d2SGreg Kroah-Hartman up->port.uartclk = omap_up_info->uartclk; 13408fe789dcSRajendra Nayak if (!up->port.uartclk) { 13418fe789dcSRajendra Nayak up->port.uartclk = DEFAULT_CLK_SPEED; 13428fe789dcSRajendra Nayak dev_warn(&pdev->dev, "No clock speed specified: using default:" 13438fe789dcSRajendra Nayak "%d\n", DEFAULT_CLK_SPEED); 13448fe789dcSRajendra Nayak } 1345ab4382d2SGreg Kroah-Hartman 13462fd14964SGovindraj.R up->latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE; 13472fd14964SGovindraj.R up->calc_latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE; 13482fd14964SGovindraj.R pm_qos_add_request(&up->pm_qos_request, 13492fd14964SGovindraj.R PM_QOS_CPU_DMA_LATENCY, up->latency); 13502fd14964SGovindraj.R serial_omap_uart_wq = create_singlethread_workqueue(up->name); 13512fd14964SGovindraj.R INIT_WORK(&up->qos_work, serial_omap_uart_qos_work); 13522fd14964SGovindraj.R 135393220dccSFelipe Balbi platform_set_drvdata(pdev, up); 1354856e35bfSRuchika Kharwar pm_runtime_enable(&pdev->dev); 1355fcdca757SGovindraj.R pm_runtime_use_autosuspend(&pdev->dev); 1356fcdca757SGovindraj.R pm_runtime_set_autosuspend_delay(&pdev->dev, 1357c86845dbSDeepak K omap_up_info->autosuspend_timeout); 1358fcdca757SGovindraj.R 1359fcdca757SGovindraj.R pm_runtime_irq_safe(&pdev->dev); 1360fcdca757SGovindraj.R pm_runtime_get_sync(&pdev->dev); 1361fcdca757SGovindraj.R 13627c77c8deSGovindraj.R omap_serial_fill_features_erratas(up); 13637c77c8deSGovindraj.R 1364ba77433dSRajendra Nayak ui[up->port.line] = up; 1365ab4382d2SGreg Kroah-Hartman serial_omap_add_console_port(up); 1366ab4382d2SGreg Kroah-Hartman 1367ab4382d2SGreg Kroah-Hartman ret = uart_add_one_port(&serial_omap_reg, &up->port); 1368ab4382d2SGreg Kroah-Hartman if (ret != 0) 1369388bc262SShubhrajyoti D goto err_add_port; 1370ab4382d2SGreg Kroah-Hartman 1371660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 1372660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 1373ab4382d2SGreg Kroah-Hartman return 0; 1374388bc262SShubhrajyoti D 1375388bc262SShubhrajyoti D err_add_port: 1376388bc262SShubhrajyoti D pm_runtime_put(&pdev->dev); 1377388bc262SShubhrajyoti D pm_runtime_disable(&pdev->dev); 1378388bc262SShubhrajyoti D err_ioremap: 1379388bc262SShubhrajyoti D err_port_line: 1380ab4382d2SGreg Kroah-Hartman dev_err(&pdev->dev, "[UART%d]: failure [%s]: %d\n", 1381ab4382d2SGreg Kroah-Hartman pdev->id, __func__, ret); 1382ab4382d2SGreg Kroah-Hartman return ret; 1383ab4382d2SGreg Kroah-Hartman } 1384ab4382d2SGreg Kroah-Hartman 13856d608ef3SFelipe Balbi static int __devexit serial_omap_remove(struct platform_device *dev) 1386ab4382d2SGreg Kroah-Hartman { 1387ab4382d2SGreg Kroah-Hartman struct uart_omap_port *up = platform_get_drvdata(dev); 1388ab4382d2SGreg Kroah-Hartman 13897e9c8e7dSFelipe Balbi pm_runtime_put_sync(up->dev); 1390d8ee4ea6SFelipe Balbi pm_runtime_disable(up->dev); 1391ab4382d2SGreg Kroah-Hartman uart_remove_one_port(&serial_omap_reg, &up->port); 13922fd14964SGovindraj.R pm_qos_remove_request(&up->pm_qos_request); 1393fcdca757SGovindraj.R 1394ab4382d2SGreg Kroah-Hartman return 0; 1395ab4382d2SGreg Kroah-Hartman } 1396ab4382d2SGreg Kroah-Hartman 139794734749SGovindraj.R /* 139894734749SGovindraj.R * Work Around for Errata i202 (2430, 3430, 3630, 4430 and 4460) 139994734749SGovindraj.R * The access to uart register after MDR1 Access 140094734749SGovindraj.R * causes UART to corrupt data. 140194734749SGovindraj.R * 140294734749SGovindraj.R * Need a delay = 140394734749SGovindraj.R * 5 L4 clock cycles + 5 UART functional clock cycle (@48MHz = ~0.2uS) 140494734749SGovindraj.R * give 10 times as much 140594734749SGovindraj.R */ 140694734749SGovindraj.R static void serial_omap_mdr1_errataset(struct uart_omap_port *up, u8 mdr1) 140794734749SGovindraj.R { 140894734749SGovindraj.R u8 timeout = 255; 140994734749SGovindraj.R 141094734749SGovindraj.R serial_out(up, UART_OMAP_MDR1, mdr1); 141194734749SGovindraj.R udelay(2); 141294734749SGovindraj.R serial_out(up, UART_FCR, up->fcr | UART_FCR_CLEAR_XMIT | 141394734749SGovindraj.R UART_FCR_CLEAR_RCVR); 141494734749SGovindraj.R /* 141594734749SGovindraj.R * Wait for FIFO to empty: when empty, RX_FIFO_E bit is 0 and 141694734749SGovindraj.R * TX_FIFO_E bit is 1. 141794734749SGovindraj.R */ 141894734749SGovindraj.R while (UART_LSR_THRE != (serial_in(up, UART_LSR) & 141994734749SGovindraj.R (UART_LSR_THRE | UART_LSR_DR))) { 142094734749SGovindraj.R timeout--; 142194734749SGovindraj.R if (!timeout) { 142294734749SGovindraj.R /* Should *never* happen. we warn and carry on */ 1423d8ee4ea6SFelipe Balbi dev_crit(up->dev, "Errata i202: timedout %x\n", 142494734749SGovindraj.R serial_in(up, UART_LSR)); 142594734749SGovindraj.R break; 142694734749SGovindraj.R } 142794734749SGovindraj.R udelay(1); 142894734749SGovindraj.R } 142994734749SGovindraj.R } 143094734749SGovindraj.R 1431b5148856SShubhrajyoti D #ifdef CONFIG_PM_RUNTIME 14329f9ac1e8SGovindraj.R static void serial_omap_restore_context(struct uart_omap_port *up) 14339f9ac1e8SGovindraj.R { 143494734749SGovindraj.R if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) 143594734749SGovindraj.R serial_omap_mdr1_errataset(up, UART_OMAP_MDR1_DISABLE); 143694734749SGovindraj.R else 14379f9ac1e8SGovindraj.R serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE); 143894734749SGovindraj.R 14399f9ac1e8SGovindraj.R serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */ 14409f9ac1e8SGovindraj.R serial_out(up, UART_EFR, UART_EFR_ECB); 14419f9ac1e8SGovindraj.R serial_out(up, UART_LCR, 0x0); /* Operational mode */ 14429f9ac1e8SGovindraj.R serial_out(up, UART_IER, 0x0); 14439f9ac1e8SGovindraj.R serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */ 1444c538d20cSGovindraj.R serial_out(up, UART_DLL, up->dll); 1445c538d20cSGovindraj.R serial_out(up, UART_DLM, up->dlh); 14469f9ac1e8SGovindraj.R serial_out(up, UART_LCR, 0x0); /* Operational mode */ 14479f9ac1e8SGovindraj.R serial_out(up, UART_IER, up->ier); 14489f9ac1e8SGovindraj.R serial_out(up, UART_FCR, up->fcr); 14499f9ac1e8SGovindraj.R serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 14509f9ac1e8SGovindraj.R serial_out(up, UART_MCR, up->mcr); 14519f9ac1e8SGovindraj.R serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */ 1452c538d20cSGovindraj.R serial_out(up, UART_OMAP_SCR, up->scr); 14539f9ac1e8SGovindraj.R serial_out(up, UART_EFR, up->efr); 14549f9ac1e8SGovindraj.R serial_out(up, UART_LCR, up->lcr); 145594734749SGovindraj.R if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) 145694734749SGovindraj.R serial_omap_mdr1_errataset(up, up->mdr1); 145794734749SGovindraj.R else 1458c538d20cSGovindraj.R serial_out(up, UART_OMAP_MDR1, up->mdr1); 14599f9ac1e8SGovindraj.R } 14609f9ac1e8SGovindraj.R 1461fcdca757SGovindraj.R static int serial_omap_runtime_suspend(struct device *dev) 1462fcdca757SGovindraj.R { 1463ec3bebc6SGovindraj.R struct uart_omap_port *up = dev_get_drvdata(dev); 1464ec3bebc6SGovindraj.R struct omap_uart_port_info *pdata = dev->platform_data; 1465ec3bebc6SGovindraj.R 1466ec3bebc6SGovindraj.R if (!up) 1467ec3bebc6SGovindraj.R return -EINVAL; 1468ec3bebc6SGovindraj.R 1469e5b57c03SFelipe Balbi if (!pdata) 147062f3ec5fSGovindraj.R return 0; 147162f3ec5fSGovindraj.R 1472e5b57c03SFelipe Balbi up->context_loss_cnt = serial_omap_get_context_loss_count(up); 1473ec3bebc6SGovindraj.R 147462f3ec5fSGovindraj.R if (device_may_wakeup(dev)) { 147562f3ec5fSGovindraj.R if (!up->wakeups_enabled) { 1476e5b57c03SFelipe Balbi serial_omap_enable_wakeup(up, true); 147762f3ec5fSGovindraj.R up->wakeups_enabled = true; 147862f3ec5fSGovindraj.R } 147962f3ec5fSGovindraj.R } else { 148062f3ec5fSGovindraj.R if (up->wakeups_enabled) { 1481e5b57c03SFelipe Balbi serial_omap_enable_wakeup(up, false); 148262f3ec5fSGovindraj.R up->wakeups_enabled = false; 148362f3ec5fSGovindraj.R } 148462f3ec5fSGovindraj.R } 148562f3ec5fSGovindraj.R 14862fd14964SGovindraj.R up->latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE; 14872fd14964SGovindraj.R schedule_work(&up->qos_work); 14882fd14964SGovindraj.R 1489fcdca757SGovindraj.R return 0; 1490fcdca757SGovindraj.R } 1491fcdca757SGovindraj.R 1492fcdca757SGovindraj.R static int serial_omap_runtime_resume(struct device *dev) 1493fcdca757SGovindraj.R { 14949f9ac1e8SGovindraj.R struct uart_omap_port *up = dev_get_drvdata(dev); 1495ec3bebc6SGovindraj.R struct omap_uart_port_info *pdata = dev->platform_data; 14969f9ac1e8SGovindraj.R 1497a5f43138SCousson, Benoit if (up && pdata) { 1498e5b57c03SFelipe Balbi u32 loss_cnt = serial_omap_get_context_loss_count(up); 1499ec3bebc6SGovindraj.R 1500ec3bebc6SGovindraj.R if (up->context_loss_cnt != loss_cnt) 15019f9ac1e8SGovindraj.R serial_omap_restore_context(up); 150294734749SGovindraj.R 15032fd14964SGovindraj.R up->latency = up->calc_latency; 15042fd14964SGovindraj.R schedule_work(&up->qos_work); 1505ec3bebc6SGovindraj.R } 15069f9ac1e8SGovindraj.R 1507fcdca757SGovindraj.R return 0; 1508fcdca757SGovindraj.R } 1509fcdca757SGovindraj.R #endif 1510fcdca757SGovindraj.R 1511fcdca757SGovindraj.R static const struct dev_pm_ops serial_omap_dev_pm_ops = { 1512fcdca757SGovindraj.R SET_SYSTEM_SLEEP_PM_OPS(serial_omap_suspend, serial_omap_resume) 1513fcdca757SGovindraj.R SET_RUNTIME_PM_OPS(serial_omap_runtime_suspend, 1514fcdca757SGovindraj.R serial_omap_runtime_resume, NULL) 1515fcdca757SGovindraj.R }; 1516fcdca757SGovindraj.R 1517d92b0dfcSRajendra Nayak #if defined(CONFIG_OF) 1518d92b0dfcSRajendra Nayak static const struct of_device_id omap_serial_of_match[] = { 1519d92b0dfcSRajendra Nayak { .compatible = "ti,omap2-uart" }, 1520d92b0dfcSRajendra Nayak { .compatible = "ti,omap3-uart" }, 1521d92b0dfcSRajendra Nayak { .compatible = "ti,omap4-uart" }, 1522d92b0dfcSRajendra Nayak {}, 1523d92b0dfcSRajendra Nayak }; 1524d92b0dfcSRajendra Nayak MODULE_DEVICE_TABLE(of, omap_serial_of_match); 1525d92b0dfcSRajendra Nayak #endif 1526d92b0dfcSRajendra Nayak 1527ab4382d2SGreg Kroah-Hartman static struct platform_driver serial_omap_driver = { 1528ab4382d2SGreg Kroah-Hartman .probe = serial_omap_probe, 15296d608ef3SFelipe Balbi .remove = __devexit_p(serial_omap_remove), 1530ab4382d2SGreg Kroah-Hartman .driver = { 1531ab4382d2SGreg Kroah-Hartman .name = DRIVER_NAME, 1532fcdca757SGovindraj.R .pm = &serial_omap_dev_pm_ops, 1533d92b0dfcSRajendra Nayak .of_match_table = of_match_ptr(omap_serial_of_match), 1534ab4382d2SGreg Kroah-Hartman }, 1535ab4382d2SGreg Kroah-Hartman }; 1536ab4382d2SGreg Kroah-Hartman 1537ab4382d2SGreg Kroah-Hartman static int __init serial_omap_init(void) 1538ab4382d2SGreg Kroah-Hartman { 1539ab4382d2SGreg Kroah-Hartman int ret; 1540ab4382d2SGreg Kroah-Hartman 1541ab4382d2SGreg Kroah-Hartman ret = uart_register_driver(&serial_omap_reg); 1542ab4382d2SGreg Kroah-Hartman if (ret != 0) 1543ab4382d2SGreg Kroah-Hartman return ret; 1544ab4382d2SGreg Kroah-Hartman ret = platform_driver_register(&serial_omap_driver); 1545ab4382d2SGreg Kroah-Hartman if (ret != 0) 1546ab4382d2SGreg Kroah-Hartman uart_unregister_driver(&serial_omap_reg); 1547ab4382d2SGreg Kroah-Hartman return ret; 1548ab4382d2SGreg Kroah-Hartman } 1549ab4382d2SGreg Kroah-Hartman 1550ab4382d2SGreg Kroah-Hartman static void __exit serial_omap_exit(void) 1551ab4382d2SGreg Kroah-Hartman { 1552ab4382d2SGreg Kroah-Hartman platform_driver_unregister(&serial_omap_driver); 1553ab4382d2SGreg Kroah-Hartman uart_unregister_driver(&serial_omap_reg); 1554ab4382d2SGreg Kroah-Hartman } 1555ab4382d2SGreg Kroah-Hartman 1556ab4382d2SGreg Kroah-Hartman module_init(serial_omap_init); 1557ab4382d2SGreg Kroah-Hartman module_exit(serial_omap_exit); 1558ab4382d2SGreg Kroah-Hartman 1559ab4382d2SGreg Kroah-Hartman MODULE_DESCRIPTION("OMAP High Speed UART driver"); 1560ab4382d2SGreg Kroah-Hartman MODULE_LICENSE("GPL"); 1561ab4382d2SGreg Kroah-Hartman MODULE_AUTHOR("Texas Instruments Inc"); 1562