1ab4382d2SGreg Kroah-Hartman /* 2ab4382d2SGreg Kroah-Hartman * Driver for OMAP-UART controller. 3ab4382d2SGreg Kroah-Hartman * Based on drivers/serial/8250.c 4ab4382d2SGreg Kroah-Hartman * 5ab4382d2SGreg Kroah-Hartman * Copyright (C) 2010 Texas Instruments. 6ab4382d2SGreg Kroah-Hartman * 7ab4382d2SGreg Kroah-Hartman * Authors: 8ab4382d2SGreg Kroah-Hartman * Govindraj R <govindraj.raja@ti.com> 9ab4382d2SGreg Kroah-Hartman * Thara Gopinath <thara@ti.com> 10ab4382d2SGreg Kroah-Hartman * 11ab4382d2SGreg Kroah-Hartman * This program is free software; you can redistribute it and/or modify 12ab4382d2SGreg Kroah-Hartman * it under the terms of the GNU General Public License as published by 13ab4382d2SGreg Kroah-Hartman * the Free Software Foundation; either version 2 of the License, or 14ab4382d2SGreg Kroah-Hartman * (at your option) any later version. 15ab4382d2SGreg Kroah-Hartman * 1625985edcSLucas De Marchi * Note: This driver is made separate from 8250 driver as we cannot 17ab4382d2SGreg Kroah-Hartman * over load 8250 driver with omap platform specific configuration for 18ab4382d2SGreg Kroah-Hartman * features like DMA, it makes easier to implement features like DMA and 19ab4382d2SGreg Kroah-Hartman * hardware flow control and software flow control configuration with 20ab4382d2SGreg Kroah-Hartman * this driver as required for the omap-platform. 21ab4382d2SGreg Kroah-Hartman */ 22ab4382d2SGreg Kroah-Hartman 23364a6eceSThomas Weber #if defined(CONFIG_SERIAL_OMAP_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) 24364a6eceSThomas Weber #define SUPPORT_SYSRQ 25364a6eceSThomas Weber #endif 26364a6eceSThomas Weber 27ab4382d2SGreg Kroah-Hartman #include <linux/module.h> 28ab4382d2SGreg Kroah-Hartman #include <linux/init.h> 29ab4382d2SGreg Kroah-Hartman #include <linux/console.h> 30ab4382d2SGreg Kroah-Hartman #include <linux/serial_reg.h> 31ab4382d2SGreg Kroah-Hartman #include <linux/delay.h> 32ab4382d2SGreg Kroah-Hartman #include <linux/slab.h> 33ab4382d2SGreg Kroah-Hartman #include <linux/tty.h> 34ab4382d2SGreg Kroah-Hartman #include <linux/tty_flip.h> 35d21e4005SFelipe Balbi #include <linux/platform_device.h> 36ab4382d2SGreg Kroah-Hartman #include <linux/io.h> 37ab4382d2SGreg Kroah-Hartman #include <linux/clk.h> 38ab4382d2SGreg Kroah-Hartman #include <linux/serial_core.h> 39ab4382d2SGreg Kroah-Hartman #include <linux/irq.h> 40fcdca757SGovindraj.R #include <linux/pm_runtime.h> 41d92b0dfcSRajendra Nayak #include <linux/of.h> 429574f36fSNeilBrown #include <linux/gpio.h> 433dbc5ce2STony Lindgren #include <linux/pinctrl/consumer.h> 44d9ba5737STony Lindgren #include <linux/platform_data/serial-omap.h> 45ab4382d2SGreg Kroah-Hartman 46f91b55abSRussell King #define OMAP_MAX_HSUART_PORTS 6 47f91b55abSRussell King 487c77c8deSGovindraj.R #define UART_BUILD_REVISION(x, y) (((x) << 8) | (y)) 497c77c8deSGovindraj.R 507c77c8deSGovindraj.R #define OMAP_UART_REV_42 0x0402 517c77c8deSGovindraj.R #define OMAP_UART_REV_46 0x0406 527c77c8deSGovindraj.R #define OMAP_UART_REV_52 0x0502 537c77c8deSGovindraj.R #define OMAP_UART_REV_63 0x0603 547c77c8deSGovindraj.R 55f91b55abSRussell King #define UART_ERRATA_i202_MDR1_ACCESS BIT(0) 56f91b55abSRussell King #define UART_ERRATA_i291_DMA_FORCEIDLE BIT(1) 57f91b55abSRussell King 588fe789dcSRajendra Nayak #define DEFAULT_CLK_SPEED 48000000 /* 48Mhz*/ 598fe789dcSRajendra Nayak 600ba5f668SPaul Walmsley /* SCR register bitmasks */ 610ba5f668SPaul Walmsley #define OMAP_UART_SCR_RX_TRIG_GRANU1_MASK (1 << 7) 621776fd05SAlexey Pelykh #define OMAP_UART_SCR_TX_TRIG_GRANU1_MASK (1 << 6) 63f91b55abSRussell King #define OMAP_UART_SCR_TX_EMPTY (1 << 3) 640ba5f668SPaul Walmsley 650ba5f668SPaul Walmsley /* FCR register bitmasks */ 660ba5f668SPaul Walmsley #define OMAP_UART_FCR_RX_FIFO_TRIG_MASK (0x3 << 6) 676721ab7fSFelipe Balbi #define OMAP_UART_FCR_TX_FIFO_TRIG_MASK (0x3 << 4) 680ba5f668SPaul Walmsley 697c77c8deSGovindraj.R /* MVR register bitmasks */ 707c77c8deSGovindraj.R #define OMAP_UART_MVR_SCHEME_SHIFT 30 717c77c8deSGovindraj.R 727c77c8deSGovindraj.R #define OMAP_UART_LEGACY_MVR_MAJ_MASK 0xf0 737c77c8deSGovindraj.R #define OMAP_UART_LEGACY_MVR_MAJ_SHIFT 4 747c77c8deSGovindraj.R #define OMAP_UART_LEGACY_MVR_MIN_MASK 0x0f 757c77c8deSGovindraj.R 767c77c8deSGovindraj.R #define OMAP_UART_MVR_MAJ_MASK 0x700 777c77c8deSGovindraj.R #define OMAP_UART_MVR_MAJ_SHIFT 8 787c77c8deSGovindraj.R #define OMAP_UART_MVR_MIN_MASK 0x3f 797c77c8deSGovindraj.R 80f91b55abSRussell King #define OMAP_UART_DMA_CH_FREE -1 81f91b55abSRussell King 82f91b55abSRussell King #define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA 83f91b55abSRussell King #define OMAP_MODE13X_SPEED 230400 84f91b55abSRussell King 85f91b55abSRussell King /* WER = 0x7F 86f91b55abSRussell King * Enable module level wakeup in WER reg 87f91b55abSRussell King */ 88f91b55abSRussell King #define OMAP_UART_WER_MOD_WKUP 0X7F 89f91b55abSRussell King 90f91b55abSRussell King /* Enable XON/XOFF flow control on output */ 913af08bd7SRussell King #define OMAP_UART_SW_TX 0x08 92f91b55abSRussell King 93f91b55abSRussell King /* Enable XON/XOFF flow control on input */ 943af08bd7SRussell King #define OMAP_UART_SW_RX 0x02 95f91b55abSRussell King 96f91b55abSRussell King #define OMAP_UART_SW_CLR 0xF0 97f91b55abSRussell King 98f91b55abSRussell King #define OMAP_UART_TCR_TRIG 0x0F 99f91b55abSRussell King 100f91b55abSRussell King struct uart_omap_dma { 101f91b55abSRussell King u8 uart_dma_tx; 102f91b55abSRussell King u8 uart_dma_rx; 103f91b55abSRussell King int rx_dma_channel; 104f91b55abSRussell King int tx_dma_channel; 105f91b55abSRussell King dma_addr_t rx_buf_dma_phys; 106f91b55abSRussell King dma_addr_t tx_buf_dma_phys; 107f91b55abSRussell King unsigned int uart_base; 108f91b55abSRussell King /* 109f91b55abSRussell King * Buffer for rx dma.It is not required for tx because the buffer 110f91b55abSRussell King * comes from port structure. 111f91b55abSRussell King */ 112f91b55abSRussell King unsigned char *rx_buf; 113f91b55abSRussell King unsigned int prev_rx_dma_pos; 114f91b55abSRussell King int tx_buf_size; 115f91b55abSRussell King int tx_dma_used; 116f91b55abSRussell King int rx_dma_used; 117f91b55abSRussell King spinlock_t tx_lock; 118f91b55abSRussell King spinlock_t rx_lock; 119f91b55abSRussell King /* timer to poll activity on rx dma */ 120f91b55abSRussell King struct timer_list rx_timer; 121f91b55abSRussell King unsigned int rx_buf_size; 122f91b55abSRussell King unsigned int rx_poll_rate; 123f91b55abSRussell King unsigned int rx_timeout; 124f91b55abSRussell King }; 125f91b55abSRussell King 126d37c6cebSFelipe Balbi struct uart_omap_port { 127d37c6cebSFelipe Balbi struct uart_port port; 128d37c6cebSFelipe Balbi struct uart_omap_dma uart_dma; 129d37c6cebSFelipe Balbi struct device *dev; 130d37c6cebSFelipe Balbi 131d37c6cebSFelipe Balbi unsigned char ier; 132d37c6cebSFelipe Balbi unsigned char lcr; 133d37c6cebSFelipe Balbi unsigned char mcr; 134d37c6cebSFelipe Balbi unsigned char fcr; 135d37c6cebSFelipe Balbi unsigned char efr; 136d37c6cebSFelipe Balbi unsigned char dll; 137d37c6cebSFelipe Balbi unsigned char dlh; 138d37c6cebSFelipe Balbi unsigned char mdr1; 139d37c6cebSFelipe Balbi unsigned char scr; 140d37c6cebSFelipe Balbi 141d37c6cebSFelipe Balbi int use_dma; 142d37c6cebSFelipe Balbi /* 143d37c6cebSFelipe Balbi * Some bits in registers are cleared on a read, so they must 144d37c6cebSFelipe Balbi * be saved whenever the register is read but the bits will not 145d37c6cebSFelipe Balbi * be immediately processed. 146d37c6cebSFelipe Balbi */ 147d37c6cebSFelipe Balbi unsigned int lsr_break_flag; 148d37c6cebSFelipe Balbi unsigned char msr_saved_flags; 149d37c6cebSFelipe Balbi char name[20]; 150d37c6cebSFelipe Balbi unsigned long port_activity; 15139aee51dSShubhrajyoti D int context_loss_cnt; 152d37c6cebSFelipe Balbi u32 errata; 153d37c6cebSFelipe Balbi u8 wakeups_enabled; 154d37c6cebSFelipe Balbi 155e36851d0SFelipe Balbi int DTR_gpio; 156e36851d0SFelipe Balbi int DTR_inverted; 157e36851d0SFelipe Balbi int DTR_active; 158e36851d0SFelipe Balbi 159d37c6cebSFelipe Balbi struct pm_qos_request pm_qos_request; 160d37c6cebSFelipe Balbi u32 latency; 161d37c6cebSFelipe Balbi u32 calc_latency; 162d37c6cebSFelipe Balbi struct work_struct qos_work; 1633dbc5ce2STony Lindgren struct pinctrl *pins; 164ddd85e22SSourav Poddar bool is_suspending; 165d37c6cebSFelipe Balbi }; 166d37c6cebSFelipe Balbi 167d37c6cebSFelipe Balbi #define to_uart_omap_port(p) ((container_of((p), struct uart_omap_port, port))) 168d37c6cebSFelipe Balbi 169ab4382d2SGreg Kroah-Hartman static struct uart_omap_port *ui[OMAP_MAX_HSUART_PORTS]; 170ab4382d2SGreg Kroah-Hartman 171ab4382d2SGreg Kroah-Hartman /* Forward declaration of functions */ 17294734749SGovindraj.R static void serial_omap_mdr1_errataset(struct uart_omap_port *up, u8 mdr1); 173ab4382d2SGreg Kroah-Hartman 1742fd14964SGovindraj.R static struct workqueue_struct *serial_omap_uart_wq; 175ab4382d2SGreg Kroah-Hartman 176ab4382d2SGreg Kroah-Hartman static inline unsigned int serial_in(struct uart_omap_port *up, int offset) 177ab4382d2SGreg Kroah-Hartman { 178ab4382d2SGreg Kroah-Hartman offset <<= up->port.regshift; 179ab4382d2SGreg Kroah-Hartman return readw(up->port.membase + offset); 180ab4382d2SGreg Kroah-Hartman } 181ab4382d2SGreg Kroah-Hartman 182ab4382d2SGreg Kroah-Hartman static inline void serial_out(struct uart_omap_port *up, int offset, int value) 183ab4382d2SGreg Kroah-Hartman { 184ab4382d2SGreg Kroah-Hartman offset <<= up->port.regshift; 185ab4382d2SGreg Kroah-Hartman writew(value, up->port.membase + offset); 186ab4382d2SGreg Kroah-Hartman } 187ab4382d2SGreg Kroah-Hartman 188ab4382d2SGreg Kroah-Hartman static inline void serial_omap_clear_fifos(struct uart_omap_port *up) 189ab4382d2SGreg Kroah-Hartman { 190ab4382d2SGreg Kroah-Hartman serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO); 191ab4382d2SGreg Kroah-Hartman serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | 192ab4382d2SGreg Kroah-Hartman UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); 193ab4382d2SGreg Kroah-Hartman serial_out(up, UART_FCR, 0); 194ab4382d2SGreg Kroah-Hartman } 195ab4382d2SGreg Kroah-Hartman 196e5b57c03SFelipe Balbi static int serial_omap_get_context_loss_count(struct uart_omap_port *up) 197e5b57c03SFelipe Balbi { 198d8ee4ea6SFelipe Balbi struct omap_uart_port_info *pdata = up->dev->platform_data; 199e5b57c03SFelipe Balbi 200ce2f08deSFelipe Balbi if (!pdata || !pdata->get_context_loss_count) 201e5b57c03SFelipe Balbi return 0; 202e5b57c03SFelipe Balbi 203d8ee4ea6SFelipe Balbi return pdata->get_context_loss_count(up->dev); 204e5b57c03SFelipe Balbi } 205e5b57c03SFelipe Balbi 206e5b57c03SFelipe Balbi static void serial_omap_enable_wakeup(struct uart_omap_port *up, bool enable) 207e5b57c03SFelipe Balbi { 208d8ee4ea6SFelipe Balbi struct omap_uart_port_info *pdata = up->dev->platform_data; 209e5b57c03SFelipe Balbi 210ce2f08deSFelipe Balbi if (!pdata || !pdata->enable_wakeup) 211ce2f08deSFelipe Balbi return; 212ce2f08deSFelipe Balbi 213d8ee4ea6SFelipe Balbi pdata->enable_wakeup(up->dev, enable); 214e5b57c03SFelipe Balbi } 215e5b57c03SFelipe Balbi 216ab4382d2SGreg Kroah-Hartman /* 2175fe21236SAlexey Pelykh * serial_omap_baud_is_mode16 - check if baud rate is MODE16X 2185fe21236SAlexey Pelykh * @port: uart port info 2195fe21236SAlexey Pelykh * @baud: baudrate for which mode needs to be determined 2205fe21236SAlexey Pelykh * 2215fe21236SAlexey Pelykh * Returns true if baud rate is MODE16X and false if MODE13X 2225fe21236SAlexey Pelykh * Original table in OMAP TRM named "UART Mode Baud Rates, Divisor Values, 2235fe21236SAlexey Pelykh * and Error Rates" determines modes not for all common baud rates. 2245fe21236SAlexey Pelykh * E.g. for 1000000 baud rate mode must be 16x, but according to that 2255fe21236SAlexey Pelykh * table it's determined as 13x. 2265fe21236SAlexey Pelykh */ 2275fe21236SAlexey Pelykh static bool 2285fe21236SAlexey Pelykh serial_omap_baud_is_mode16(struct uart_port *port, unsigned int baud) 2295fe21236SAlexey Pelykh { 2305fe21236SAlexey Pelykh unsigned int n13 = port->uartclk / (13 * baud); 2315fe21236SAlexey Pelykh unsigned int n16 = port->uartclk / (16 * baud); 2325fe21236SAlexey Pelykh int baudAbsDiff13 = baud - (port->uartclk / (13 * n13)); 2335fe21236SAlexey Pelykh int baudAbsDiff16 = baud - (port->uartclk / (16 * n16)); 2345fe21236SAlexey Pelykh if(baudAbsDiff13 < 0) 2355fe21236SAlexey Pelykh baudAbsDiff13 = -baudAbsDiff13; 2365fe21236SAlexey Pelykh if(baudAbsDiff16 < 0) 2375fe21236SAlexey Pelykh baudAbsDiff16 = -baudAbsDiff16; 2385fe21236SAlexey Pelykh 2395fe21236SAlexey Pelykh return (baudAbsDiff13 > baudAbsDiff16); 2405fe21236SAlexey Pelykh } 2415fe21236SAlexey Pelykh 2425fe21236SAlexey Pelykh /* 243ab4382d2SGreg Kroah-Hartman * serial_omap_get_divisor - calculate divisor value 244ab4382d2SGreg Kroah-Hartman * @port: uart port info 245ab4382d2SGreg Kroah-Hartman * @baud: baudrate for which divisor needs to be calculated. 246ab4382d2SGreg Kroah-Hartman */ 247ab4382d2SGreg Kroah-Hartman static unsigned int 248ab4382d2SGreg Kroah-Hartman serial_omap_get_divisor(struct uart_port *port, unsigned int baud) 249ab4382d2SGreg Kroah-Hartman { 250ab4382d2SGreg Kroah-Hartman unsigned int divisor; 251ab4382d2SGreg Kroah-Hartman 2525fe21236SAlexey Pelykh if (!serial_omap_baud_is_mode16(port, baud)) 253ab4382d2SGreg Kroah-Hartman divisor = 13; 254ab4382d2SGreg Kroah-Hartman else 255ab4382d2SGreg Kroah-Hartman divisor = 16; 256ab4382d2SGreg Kroah-Hartman return port->uartclk/(baud * divisor); 257ab4382d2SGreg Kroah-Hartman } 258ab4382d2SGreg Kroah-Hartman 259ab4382d2SGreg Kroah-Hartman static void serial_omap_enable_ms(struct uart_port *port) 260ab4382d2SGreg Kroah-Hartman { 261c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 262ab4382d2SGreg Kroah-Hartman 263ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_enable_ms+%d\n", up->port.line); 264fcdca757SGovindraj.R 265d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 266ab4382d2SGreg Kroah-Hartman up->ier |= UART_IER_MSI; 267ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 268660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 269660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 270ab4382d2SGreg Kroah-Hartman } 271ab4382d2SGreg Kroah-Hartman 272ab4382d2SGreg Kroah-Hartman static void serial_omap_stop_tx(struct uart_port *port) 273ab4382d2SGreg Kroah-Hartman { 274c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 275ab4382d2SGreg Kroah-Hartman 276d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 277ab4382d2SGreg Kroah-Hartman if (up->ier & UART_IER_THRI) { 278ab4382d2SGreg Kroah-Hartman up->ier &= ~UART_IER_THRI; 279ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 280ab4382d2SGreg Kroah-Hartman } 281fcdca757SGovindraj.R 282d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 283d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 284ab4382d2SGreg Kroah-Hartman } 285ab4382d2SGreg Kroah-Hartman 286ab4382d2SGreg Kroah-Hartman static void serial_omap_stop_rx(struct uart_port *port) 287ab4382d2SGreg Kroah-Hartman { 288c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 289ab4382d2SGreg Kroah-Hartman 290d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 291ab4382d2SGreg Kroah-Hartman up->ier &= ~UART_IER_RLSI; 292ab4382d2SGreg Kroah-Hartman up->port.read_status_mask &= ~UART_LSR_DR; 293ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 294d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 295d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 296ab4382d2SGreg Kroah-Hartman } 297ab4382d2SGreg Kroah-Hartman 298bf63a086SFelipe Balbi static void transmit_chars(struct uart_omap_port *up, unsigned int lsr) 299ab4382d2SGreg Kroah-Hartman { 300ab4382d2SGreg Kroah-Hartman struct circ_buf *xmit = &up->port.state->xmit; 301ab4382d2SGreg Kroah-Hartman int count; 302ab4382d2SGreg Kroah-Hartman 303ab4382d2SGreg Kroah-Hartman if (up->port.x_char) { 304ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TX, up->port.x_char); 305ab4382d2SGreg Kroah-Hartman up->port.icount.tx++; 306ab4382d2SGreg Kroah-Hartman up->port.x_char = 0; 307ab4382d2SGreg Kroah-Hartman return; 308ab4382d2SGreg Kroah-Hartman } 309ab4382d2SGreg Kroah-Hartman if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { 310ab4382d2SGreg Kroah-Hartman serial_omap_stop_tx(&up->port); 311ab4382d2SGreg Kroah-Hartman return; 312ab4382d2SGreg Kroah-Hartman } 313af681cadSGreg Kroah-Hartman count = up->port.fifosize / 4; 314ab4382d2SGreg Kroah-Hartman do { 315ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TX, xmit->buf[xmit->tail]); 316ab4382d2SGreg Kroah-Hartman xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 317ab4382d2SGreg Kroah-Hartman up->port.icount.tx++; 318ab4382d2SGreg Kroah-Hartman if (uart_circ_empty(xmit)) 319ab4382d2SGreg Kroah-Hartman break; 320ab4382d2SGreg Kroah-Hartman } while (--count > 0); 321ab4382d2SGreg Kroah-Hartman 3220324a821SRuchika Kharwar if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) { 3230324a821SRuchika Kharwar spin_unlock(&up->port.lock); 324ab4382d2SGreg Kroah-Hartman uart_write_wakeup(&up->port); 3250324a821SRuchika Kharwar spin_lock(&up->port.lock); 3260324a821SRuchika Kharwar } 327ab4382d2SGreg Kroah-Hartman 328ab4382d2SGreg Kroah-Hartman if (uart_circ_empty(xmit)) 329ab4382d2SGreg Kroah-Hartman serial_omap_stop_tx(&up->port); 330ab4382d2SGreg Kroah-Hartman } 331ab4382d2SGreg Kroah-Hartman 332ab4382d2SGreg Kroah-Hartman static inline void serial_omap_enable_ier_thri(struct uart_omap_port *up) 333ab4382d2SGreg Kroah-Hartman { 334ab4382d2SGreg Kroah-Hartman if (!(up->ier & UART_IER_THRI)) { 335ab4382d2SGreg Kroah-Hartman up->ier |= UART_IER_THRI; 336ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 337ab4382d2SGreg Kroah-Hartman } 338ab4382d2SGreg Kroah-Hartman } 339ab4382d2SGreg Kroah-Hartman 340ab4382d2SGreg Kroah-Hartman static void serial_omap_start_tx(struct uart_port *port) 341ab4382d2SGreg Kroah-Hartman { 342c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 343ab4382d2SGreg Kroah-Hartman 344d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 345ab4382d2SGreg Kroah-Hartman serial_omap_enable_ier_thri(up); 346d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 347d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 348ab4382d2SGreg Kroah-Hartman } 349ab4382d2SGreg Kroah-Hartman 3503af08bd7SRussell King static void serial_omap_throttle(struct uart_port *port) 3513af08bd7SRussell King { 3523af08bd7SRussell King struct uart_omap_port *up = to_uart_omap_port(port); 3533af08bd7SRussell King unsigned long flags; 3543af08bd7SRussell King 3553af08bd7SRussell King pm_runtime_get_sync(up->dev); 3563af08bd7SRussell King spin_lock_irqsave(&up->port.lock, flags); 3573af08bd7SRussell King up->ier &= ~(UART_IER_RLSI | UART_IER_RDI); 3583af08bd7SRussell King serial_out(up, UART_IER, up->ier); 3593af08bd7SRussell King spin_unlock_irqrestore(&up->port.lock, flags); 3603af08bd7SRussell King pm_runtime_mark_last_busy(up->dev); 3613af08bd7SRussell King pm_runtime_put_autosuspend(up->dev); 3623af08bd7SRussell King } 3633af08bd7SRussell King 3643af08bd7SRussell King static void serial_omap_unthrottle(struct uart_port *port) 3653af08bd7SRussell King { 3663af08bd7SRussell King struct uart_omap_port *up = to_uart_omap_port(port); 3673af08bd7SRussell King unsigned long flags; 3683af08bd7SRussell King 3693af08bd7SRussell King pm_runtime_get_sync(up->dev); 3703af08bd7SRussell King spin_lock_irqsave(&up->port.lock, flags); 3713af08bd7SRussell King up->ier |= UART_IER_RLSI | UART_IER_RDI; 3723af08bd7SRussell King serial_out(up, UART_IER, up->ier); 3733af08bd7SRussell King spin_unlock_irqrestore(&up->port.lock, flags); 3743af08bd7SRussell King pm_runtime_mark_last_busy(up->dev); 3753af08bd7SRussell King pm_runtime_put_autosuspend(up->dev); 3763af08bd7SRussell King } 3773af08bd7SRussell King 378ab4382d2SGreg Kroah-Hartman static unsigned int check_modem_status(struct uart_omap_port *up) 379ab4382d2SGreg Kroah-Hartman { 380ab4382d2SGreg Kroah-Hartman unsigned int status; 381ab4382d2SGreg Kroah-Hartman 382ab4382d2SGreg Kroah-Hartman status = serial_in(up, UART_MSR); 383ab4382d2SGreg Kroah-Hartman status |= up->msr_saved_flags; 384ab4382d2SGreg Kroah-Hartman up->msr_saved_flags = 0; 385ab4382d2SGreg Kroah-Hartman if ((status & UART_MSR_ANY_DELTA) == 0) 386ab4382d2SGreg Kroah-Hartman return status; 387ab4382d2SGreg Kroah-Hartman 388ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI && 389ab4382d2SGreg Kroah-Hartman up->port.state != NULL) { 390ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_TERI) 391ab4382d2SGreg Kroah-Hartman up->port.icount.rng++; 392ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DDSR) 393ab4382d2SGreg Kroah-Hartman up->port.icount.dsr++; 394ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DDCD) 395ab4382d2SGreg Kroah-Hartman uart_handle_dcd_change 396ab4382d2SGreg Kroah-Hartman (&up->port, status & UART_MSR_DCD); 397ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DCTS) 398ab4382d2SGreg Kroah-Hartman uart_handle_cts_change 399ab4382d2SGreg Kroah-Hartman (&up->port, status & UART_MSR_CTS); 400ab4382d2SGreg Kroah-Hartman wake_up_interruptible(&up->port.state->port.delta_msr_wait); 401ab4382d2SGreg Kroah-Hartman } 402ab4382d2SGreg Kroah-Hartman 403ab4382d2SGreg Kroah-Hartman return status; 404ab4382d2SGreg Kroah-Hartman } 405ab4382d2SGreg Kroah-Hartman 40672256cbdSFelipe Balbi static void serial_omap_rlsi(struct uart_omap_port *up, unsigned int lsr) 40772256cbdSFelipe Balbi { 40872256cbdSFelipe Balbi unsigned int flag; 4099a12fcf8SShubhrajyoti D unsigned char ch = 0; 4109a12fcf8SShubhrajyoti D 4119a12fcf8SShubhrajyoti D if (likely(lsr & UART_LSR_DR)) 4129a12fcf8SShubhrajyoti D ch = serial_in(up, UART_RX); 41372256cbdSFelipe Balbi 41472256cbdSFelipe Balbi up->port.icount.rx++; 41572256cbdSFelipe Balbi flag = TTY_NORMAL; 41672256cbdSFelipe Balbi 41772256cbdSFelipe Balbi if (lsr & UART_LSR_BI) { 41872256cbdSFelipe Balbi flag = TTY_BREAK; 41972256cbdSFelipe Balbi lsr &= ~(UART_LSR_FE | UART_LSR_PE); 42072256cbdSFelipe Balbi up->port.icount.brk++; 42172256cbdSFelipe Balbi /* 42272256cbdSFelipe Balbi * We do the SysRQ and SAK checking 42372256cbdSFelipe Balbi * here because otherwise the break 42472256cbdSFelipe Balbi * may get masked by ignore_status_mask 42572256cbdSFelipe Balbi * or read_status_mask. 42672256cbdSFelipe Balbi */ 42772256cbdSFelipe Balbi if (uart_handle_break(&up->port)) 42872256cbdSFelipe Balbi return; 42972256cbdSFelipe Balbi 43072256cbdSFelipe Balbi } 43172256cbdSFelipe Balbi 43272256cbdSFelipe Balbi if (lsr & UART_LSR_PE) { 43372256cbdSFelipe Balbi flag = TTY_PARITY; 43472256cbdSFelipe Balbi up->port.icount.parity++; 43572256cbdSFelipe Balbi } 43672256cbdSFelipe Balbi 43772256cbdSFelipe Balbi if (lsr & UART_LSR_FE) { 43872256cbdSFelipe Balbi flag = TTY_FRAME; 43972256cbdSFelipe Balbi up->port.icount.frame++; 44072256cbdSFelipe Balbi } 44172256cbdSFelipe Balbi 44272256cbdSFelipe Balbi if (lsr & UART_LSR_OE) 44372256cbdSFelipe Balbi up->port.icount.overrun++; 44472256cbdSFelipe Balbi 44572256cbdSFelipe Balbi #ifdef CONFIG_SERIAL_OMAP_CONSOLE 44672256cbdSFelipe Balbi if (up->port.line == up->port.cons->index) { 44772256cbdSFelipe Balbi /* Recover the break flag from console xmit */ 44872256cbdSFelipe Balbi lsr |= up->lsr_break_flag; 44972256cbdSFelipe Balbi } 45072256cbdSFelipe Balbi #endif 45172256cbdSFelipe Balbi uart_insert_char(&up->port, lsr, UART_LSR_OE, 0, flag); 45272256cbdSFelipe Balbi } 45372256cbdSFelipe Balbi 45472256cbdSFelipe Balbi static void serial_omap_rdi(struct uart_omap_port *up, unsigned int lsr) 45572256cbdSFelipe Balbi { 45672256cbdSFelipe Balbi unsigned char ch = 0; 45772256cbdSFelipe Balbi unsigned int flag; 45872256cbdSFelipe Balbi 45972256cbdSFelipe Balbi if (!(lsr & UART_LSR_DR)) 46072256cbdSFelipe Balbi return; 46172256cbdSFelipe Balbi 46272256cbdSFelipe Balbi ch = serial_in(up, UART_RX); 46372256cbdSFelipe Balbi flag = TTY_NORMAL; 46472256cbdSFelipe Balbi up->port.icount.rx++; 46572256cbdSFelipe Balbi 46672256cbdSFelipe Balbi if (uart_handle_sysrq_char(&up->port, ch)) 46772256cbdSFelipe Balbi return; 46872256cbdSFelipe Balbi 46972256cbdSFelipe Balbi uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag); 47072256cbdSFelipe Balbi } 47172256cbdSFelipe Balbi 472ab4382d2SGreg Kroah-Hartman /** 473ab4382d2SGreg Kroah-Hartman * serial_omap_irq() - This handles the interrupt from one port 474ab4382d2SGreg Kroah-Hartman * @irq: uart port irq number 475ab4382d2SGreg Kroah-Hartman * @dev_id: uart port info 476ab4382d2SGreg Kroah-Hartman */ 47752c5513dSFelipe Balbi static irqreturn_t serial_omap_irq(int irq, void *dev_id) 478ab4382d2SGreg Kroah-Hartman { 479ab4382d2SGreg Kroah-Hartman struct uart_omap_port *up = dev_id; 480ab4382d2SGreg Kroah-Hartman unsigned int iir, lsr; 48181b75aefSFelipe Balbi unsigned int type; 48281b75aefSFelipe Balbi irqreturn_t ret = IRQ_NONE; 48372256cbdSFelipe Balbi int max_count = 256; 484ab4382d2SGreg Kroah-Hartman 4856c3a30c7SFelipe Balbi spin_lock(&up->port.lock); 48681b75aefSFelipe Balbi pm_runtime_get_sync(up->dev); 48772256cbdSFelipe Balbi 48872256cbdSFelipe Balbi do { 48981b75aefSFelipe Balbi iir = serial_in(up, UART_IIR); 49081b75aefSFelipe Balbi if (iir & UART_IIR_NO_INT) 49172256cbdSFelipe Balbi break; 49281b75aefSFelipe Balbi 49381b75aefSFelipe Balbi ret = IRQ_HANDLED; 494ab4382d2SGreg Kroah-Hartman lsr = serial_in(up, UART_LSR); 49581b75aefSFelipe Balbi 49681b75aefSFelipe Balbi /* extract IRQ type from IIR register */ 49781b75aefSFelipe Balbi type = iir & 0x3e; 49881b75aefSFelipe Balbi 49981b75aefSFelipe Balbi switch (type) { 50081b75aefSFelipe Balbi case UART_IIR_MSI: 50181b75aefSFelipe Balbi check_modem_status(up); 50281b75aefSFelipe Balbi break; 50381b75aefSFelipe Balbi case UART_IIR_THRI: 504bf63a086SFelipe Balbi transmit_chars(up, lsr); 50581b75aefSFelipe Balbi break; 50672256cbdSFelipe Balbi case UART_IIR_RX_TIMEOUT: 50772256cbdSFelipe Balbi /* FALLTHROUGH */ 50881b75aefSFelipe Balbi case UART_IIR_RDI: 50972256cbdSFelipe Balbi serial_omap_rdi(up, lsr); 51081b75aefSFelipe Balbi break; 51181b75aefSFelipe Balbi case UART_IIR_RLSI: 51272256cbdSFelipe Balbi serial_omap_rlsi(up, lsr); 51381b75aefSFelipe Balbi break; 51481b75aefSFelipe Balbi case UART_IIR_CTS_RTS_DSR: 51572256cbdSFelipe Balbi /* simply try again */ 51672256cbdSFelipe Balbi break; 51781b75aefSFelipe Balbi case UART_IIR_XOFF: 51881b75aefSFelipe Balbi /* FALLTHROUGH */ 51981b75aefSFelipe Balbi default: 52081b75aefSFelipe Balbi break; 521ab4382d2SGreg Kroah-Hartman } 52272256cbdSFelipe Balbi } while (!(iir & UART_IIR_NO_INT) && max_count--); 523ab4382d2SGreg Kroah-Hartman 5246c3a30c7SFelipe Balbi spin_unlock(&up->port.lock); 52572256cbdSFelipe Balbi 5262e124b4aSJiri Slaby tty_flip_buffer_push(&up->port.state->port); 52772256cbdSFelipe Balbi 528d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 529d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 530ab4382d2SGreg Kroah-Hartman up->port_activity = jiffies; 53181b75aefSFelipe Balbi 53281b75aefSFelipe Balbi return ret; 533ab4382d2SGreg Kroah-Hartman } 534ab4382d2SGreg Kroah-Hartman 535ab4382d2SGreg Kroah-Hartman static unsigned int serial_omap_tx_empty(struct uart_port *port) 536ab4382d2SGreg Kroah-Hartman { 537c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 538ab4382d2SGreg Kroah-Hartman unsigned long flags = 0; 539ab4382d2SGreg Kroah-Hartman unsigned int ret = 0; 540ab4382d2SGreg Kroah-Hartman 541d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 542ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_tx_empty+%d\n", up->port.line); 543ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags); 544ab4382d2SGreg Kroah-Hartman ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0; 545ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags); 546660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 547660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 548ab4382d2SGreg Kroah-Hartman return ret; 549ab4382d2SGreg Kroah-Hartman } 550ab4382d2SGreg Kroah-Hartman 551ab4382d2SGreg Kroah-Hartman static unsigned int serial_omap_get_mctrl(struct uart_port *port) 552ab4382d2SGreg Kroah-Hartman { 553c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 554514f31d1SShubhrajyoti D unsigned int status; 555ab4382d2SGreg Kroah-Hartman unsigned int ret = 0; 556ab4382d2SGreg Kroah-Hartman 557d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 558ab4382d2SGreg Kroah-Hartman status = check_modem_status(up); 559660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 560660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 561fcdca757SGovindraj.R 562ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_get_mctrl+%d\n", up->port.line); 563ab4382d2SGreg Kroah-Hartman 564ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DCD) 565ab4382d2SGreg Kroah-Hartman ret |= TIOCM_CAR; 566ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_RI) 567ab4382d2SGreg Kroah-Hartman ret |= TIOCM_RNG; 568ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DSR) 569ab4382d2SGreg Kroah-Hartman ret |= TIOCM_DSR; 570ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_CTS) 571ab4382d2SGreg Kroah-Hartman ret |= TIOCM_CTS; 572ab4382d2SGreg Kroah-Hartman return ret; 573ab4382d2SGreg Kroah-Hartman } 574ab4382d2SGreg Kroah-Hartman 575ab4382d2SGreg Kroah-Hartman static void serial_omap_set_mctrl(struct uart_port *port, unsigned int mctrl) 576ab4382d2SGreg Kroah-Hartman { 577c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 5789363f8faSRussell King unsigned char mcr = 0, old_mcr; 579ab4382d2SGreg Kroah-Hartman 580ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_set_mctrl+%d\n", up->port.line); 581ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_RTS) 582ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_RTS; 583ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_DTR) 584ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_DTR; 585ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_OUT1) 586ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_OUT1; 587ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_OUT2) 588ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_OUT2; 589ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_LOOP) 590ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_LOOP; 591ab4382d2SGreg Kroah-Hartman 592d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 5939363f8faSRussell King old_mcr = serial_in(up, UART_MCR); 5949363f8faSRussell King old_mcr &= ~(UART_MCR_LOOP | UART_MCR_OUT2 | UART_MCR_OUT1 | 5959363f8faSRussell King UART_MCR_DTR | UART_MCR_RTS); 5969363f8faSRussell King up->mcr = old_mcr | mcr; 597c538d20cSGovindraj.R serial_out(up, UART_MCR, up->mcr); 598660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 599660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 6009574f36fSNeilBrown 6019574f36fSNeilBrown if (gpio_is_valid(up->DTR_gpio) && 6029574f36fSNeilBrown !!(mctrl & TIOCM_DTR) != up->DTR_active) { 6039574f36fSNeilBrown up->DTR_active = !up->DTR_active; 6049574f36fSNeilBrown if (gpio_cansleep(up->DTR_gpio)) 6059574f36fSNeilBrown schedule_work(&up->qos_work); 6069574f36fSNeilBrown else 6079574f36fSNeilBrown gpio_set_value(up->DTR_gpio, 6089574f36fSNeilBrown up->DTR_active != up->DTR_inverted); 6099574f36fSNeilBrown } 610ab4382d2SGreg Kroah-Hartman } 611ab4382d2SGreg Kroah-Hartman 612ab4382d2SGreg Kroah-Hartman static void serial_omap_break_ctl(struct uart_port *port, int break_state) 613ab4382d2SGreg Kroah-Hartman { 614c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 615ab4382d2SGreg Kroah-Hartman unsigned long flags = 0; 616ab4382d2SGreg Kroah-Hartman 617ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_break_ctl+%d\n", up->port.line); 618d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 619ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags); 620ab4382d2SGreg Kroah-Hartman if (break_state == -1) 621ab4382d2SGreg Kroah-Hartman up->lcr |= UART_LCR_SBC; 622ab4382d2SGreg Kroah-Hartman else 623ab4382d2SGreg Kroah-Hartman up->lcr &= ~UART_LCR_SBC; 624ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, up->lcr); 625ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags); 626660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 627660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 628ab4382d2SGreg Kroah-Hartman } 629ab4382d2SGreg Kroah-Hartman 630ab4382d2SGreg Kroah-Hartman static int serial_omap_startup(struct uart_port *port) 631ab4382d2SGreg Kroah-Hartman { 632c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 633ab4382d2SGreg Kroah-Hartman unsigned long flags = 0; 634ab4382d2SGreg Kroah-Hartman int retval; 635ab4382d2SGreg Kroah-Hartman 636ab4382d2SGreg Kroah-Hartman /* 637ab4382d2SGreg Kroah-Hartman * Allocate the IRQ 638ab4382d2SGreg Kroah-Hartman */ 639ab4382d2SGreg Kroah-Hartman retval = request_irq(up->port.irq, serial_omap_irq, up->port.irqflags, 640ab4382d2SGreg Kroah-Hartman up->name, up); 641ab4382d2SGreg Kroah-Hartman if (retval) 642ab4382d2SGreg Kroah-Hartman return retval; 643ab4382d2SGreg Kroah-Hartman 644ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_startup+%d\n", up->port.line); 645ab4382d2SGreg Kroah-Hartman 646d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 647ab4382d2SGreg Kroah-Hartman /* 648ab4382d2SGreg Kroah-Hartman * Clear the FIFO buffers and disable them. 649ab4382d2SGreg Kroah-Hartman * (they will be reenabled in set_termios()) 650ab4382d2SGreg Kroah-Hartman */ 651ab4382d2SGreg Kroah-Hartman serial_omap_clear_fifos(up); 652ab4382d2SGreg Kroah-Hartman /* For Hardware flow control */ 653ab4382d2SGreg Kroah-Hartman serial_out(up, UART_MCR, UART_MCR_RTS); 654ab4382d2SGreg Kroah-Hartman 655ab4382d2SGreg Kroah-Hartman /* 656ab4382d2SGreg Kroah-Hartman * Clear the interrupt registers. 657ab4382d2SGreg Kroah-Hartman */ 658ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_LSR); 659ab4382d2SGreg Kroah-Hartman if (serial_in(up, UART_LSR) & UART_LSR_DR) 660ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_RX); 661ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_IIR); 662ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_MSR); 663ab4382d2SGreg Kroah-Hartman 664ab4382d2SGreg Kroah-Hartman /* 665ab4382d2SGreg Kroah-Hartman * Now, initialize the UART 666ab4382d2SGreg Kroah-Hartman */ 667ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_WLEN8); 668ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags); 669ab4382d2SGreg Kroah-Hartman /* 670ab4382d2SGreg Kroah-Hartman * Most PC uarts need OUT2 raised to enable interrupts. 671ab4382d2SGreg Kroah-Hartman */ 672ab4382d2SGreg Kroah-Hartman up->port.mctrl |= TIOCM_OUT2; 673ab4382d2SGreg Kroah-Hartman serial_omap_set_mctrl(&up->port, up->port.mctrl); 674ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags); 675ab4382d2SGreg Kroah-Hartman 676ab4382d2SGreg Kroah-Hartman up->msr_saved_flags = 0; 677ab4382d2SGreg Kroah-Hartman /* 678ab4382d2SGreg Kroah-Hartman * Finally, enable interrupts. Note: Modem status interrupts 679ab4382d2SGreg Kroah-Hartman * are set via set_termios(), which will be occurring imminently 680ab4382d2SGreg Kroah-Hartman * anyway, so we don't enable them here. 681ab4382d2SGreg Kroah-Hartman */ 682ab4382d2SGreg Kroah-Hartman up->ier = UART_IER_RLSI | UART_IER_RDI; 683ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 684ab4382d2SGreg Kroah-Hartman 68578841462SJarkko Nikula /* Enable module level wake up */ 68678841462SJarkko Nikula serial_out(up, UART_OMAP_WER, OMAP_UART_WER_MOD_WKUP); 68778841462SJarkko Nikula 688d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 689d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 690ab4382d2SGreg Kroah-Hartman up->port_activity = jiffies; 691ab4382d2SGreg Kroah-Hartman return 0; 692ab4382d2SGreg Kroah-Hartman } 693ab4382d2SGreg Kroah-Hartman 694ab4382d2SGreg Kroah-Hartman static void serial_omap_shutdown(struct uart_port *port) 695ab4382d2SGreg Kroah-Hartman { 696c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 697ab4382d2SGreg Kroah-Hartman unsigned long flags = 0; 698ab4382d2SGreg Kroah-Hartman 699ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_shutdown+%d\n", up->port.line); 700fcdca757SGovindraj.R 701d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 702ab4382d2SGreg Kroah-Hartman /* 703ab4382d2SGreg Kroah-Hartman * Disable interrupts from this port 704ab4382d2SGreg Kroah-Hartman */ 705ab4382d2SGreg Kroah-Hartman up->ier = 0; 706ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, 0); 707ab4382d2SGreg Kroah-Hartman 708ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags); 709ab4382d2SGreg Kroah-Hartman up->port.mctrl &= ~TIOCM_OUT2; 710ab4382d2SGreg Kroah-Hartman serial_omap_set_mctrl(&up->port, up->port.mctrl); 711ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags); 712ab4382d2SGreg Kroah-Hartman 713ab4382d2SGreg Kroah-Hartman /* 714ab4382d2SGreg Kroah-Hartman * Disable break condition and FIFOs 715ab4382d2SGreg Kroah-Hartman */ 716ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC); 717ab4382d2SGreg Kroah-Hartman serial_omap_clear_fifos(up); 718ab4382d2SGreg Kroah-Hartman 719ab4382d2SGreg Kroah-Hartman /* 720ab4382d2SGreg Kroah-Hartman * Read data port to reset things, and then free the irq 721ab4382d2SGreg Kroah-Hartman */ 722ab4382d2SGreg Kroah-Hartman if (serial_in(up, UART_LSR) & UART_LSR_DR) 723ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_RX); 724fcdca757SGovindraj.R 725660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 726660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 727ab4382d2SGreg Kroah-Hartman free_irq(up->port.irq, up); 728ab4382d2SGreg Kroah-Hartman } 729ab4382d2SGreg Kroah-Hartman 7302fd14964SGovindraj.R static void serial_omap_uart_qos_work(struct work_struct *work) 7312fd14964SGovindraj.R { 7322fd14964SGovindraj.R struct uart_omap_port *up = container_of(work, struct uart_omap_port, 7332fd14964SGovindraj.R qos_work); 7342fd14964SGovindraj.R 7352fd14964SGovindraj.R pm_qos_update_request(&up->pm_qos_request, up->latency); 7369574f36fSNeilBrown if (gpio_is_valid(up->DTR_gpio)) 7379574f36fSNeilBrown gpio_set_value_cansleep(up->DTR_gpio, 7389574f36fSNeilBrown up->DTR_active != up->DTR_inverted); 7392fd14964SGovindraj.R } 7402fd14964SGovindraj.R 741ab4382d2SGreg Kroah-Hartman static void 742ab4382d2SGreg Kroah-Hartman serial_omap_set_termios(struct uart_port *port, struct ktermios *termios, 743ab4382d2SGreg Kroah-Hartman struct ktermios *old) 744ab4382d2SGreg Kroah-Hartman { 745c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 746ab4382d2SGreg Kroah-Hartman unsigned char cval = 0; 747ab4382d2SGreg Kroah-Hartman unsigned long flags = 0; 748ab4382d2SGreg Kroah-Hartman unsigned int baud, quot; 749ab4382d2SGreg Kroah-Hartman 750ab4382d2SGreg Kroah-Hartman switch (termios->c_cflag & CSIZE) { 751ab4382d2SGreg Kroah-Hartman case CS5: 752ab4382d2SGreg Kroah-Hartman cval = UART_LCR_WLEN5; 753ab4382d2SGreg Kroah-Hartman break; 754ab4382d2SGreg Kroah-Hartman case CS6: 755ab4382d2SGreg Kroah-Hartman cval = UART_LCR_WLEN6; 756ab4382d2SGreg Kroah-Hartman break; 757ab4382d2SGreg Kroah-Hartman case CS7: 758ab4382d2SGreg Kroah-Hartman cval = UART_LCR_WLEN7; 759ab4382d2SGreg Kroah-Hartman break; 760ab4382d2SGreg Kroah-Hartman default: 761ab4382d2SGreg Kroah-Hartman case CS8: 762ab4382d2SGreg Kroah-Hartman cval = UART_LCR_WLEN8; 763ab4382d2SGreg Kroah-Hartman break; 764ab4382d2SGreg Kroah-Hartman } 765ab4382d2SGreg Kroah-Hartman 766ab4382d2SGreg Kroah-Hartman if (termios->c_cflag & CSTOPB) 767ab4382d2SGreg Kroah-Hartman cval |= UART_LCR_STOP; 768ab4382d2SGreg Kroah-Hartman if (termios->c_cflag & PARENB) 769ab4382d2SGreg Kroah-Hartman cval |= UART_LCR_PARITY; 770ab4382d2SGreg Kroah-Hartman if (!(termios->c_cflag & PARODD)) 771ab4382d2SGreg Kroah-Hartman cval |= UART_LCR_EPAR; 772fdbc7353SEnric Balletbo i Serra if (termios->c_cflag & CMSPAR) 773fdbc7353SEnric Balletbo i Serra cval |= UART_LCR_SPAR; 774ab4382d2SGreg Kroah-Hartman 775ab4382d2SGreg Kroah-Hartman /* 776ab4382d2SGreg Kroah-Hartman * Ask the core to calculate the divisor for us. 777ab4382d2SGreg Kroah-Hartman */ 778ab4382d2SGreg Kroah-Hartman 779ab4382d2SGreg Kroah-Hartman baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/13); 780ab4382d2SGreg Kroah-Hartman quot = serial_omap_get_divisor(port, baud); 781ab4382d2SGreg Kroah-Hartman 7822fd14964SGovindraj.R /* calculate wakeup latency constraint */ 78319723452SPaul Walmsley up->calc_latency = (USEC_PER_SEC * up->port.fifosize) / (baud / 8); 7842fd14964SGovindraj.R up->latency = up->calc_latency; 7852fd14964SGovindraj.R schedule_work(&up->qos_work); 7862fd14964SGovindraj.R 787c538d20cSGovindraj.R up->dll = quot & 0xff; 788c538d20cSGovindraj.R up->dlh = quot >> 8; 789c538d20cSGovindraj.R up->mdr1 = UART_OMAP_MDR1_DISABLE; 790c538d20cSGovindraj.R 791ab4382d2SGreg Kroah-Hartman up->fcr = UART_FCR_R_TRIG_01 | UART_FCR_T_TRIG_01 | 792ab4382d2SGreg Kroah-Hartman UART_FCR_ENABLE_FIFO; 793ab4382d2SGreg Kroah-Hartman 794ab4382d2SGreg Kroah-Hartman /* 795ab4382d2SGreg Kroah-Hartman * Ok, we're now changing the port state. Do it with 796ab4382d2SGreg Kroah-Hartman * interrupts disabled. 797ab4382d2SGreg Kroah-Hartman */ 798d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 799ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags); 800ab4382d2SGreg Kroah-Hartman 801ab4382d2SGreg Kroah-Hartman /* 802ab4382d2SGreg Kroah-Hartman * Update the per-port timeout. 803ab4382d2SGreg Kroah-Hartman */ 804ab4382d2SGreg Kroah-Hartman uart_update_timeout(port, termios->c_cflag, baud); 805ab4382d2SGreg Kroah-Hartman 806ab4382d2SGreg Kroah-Hartman up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; 807ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & INPCK) 808ab4382d2SGreg Kroah-Hartman up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE; 809ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & (BRKINT | PARMRK)) 810ab4382d2SGreg Kroah-Hartman up->port.read_status_mask |= UART_LSR_BI; 811ab4382d2SGreg Kroah-Hartman 812ab4382d2SGreg Kroah-Hartman /* 813ab4382d2SGreg Kroah-Hartman * Characters to ignore 814ab4382d2SGreg Kroah-Hartman */ 815ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask = 0; 816ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IGNPAR) 817ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE; 818ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IGNBRK) { 819ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask |= UART_LSR_BI; 820ab4382d2SGreg Kroah-Hartman /* 821ab4382d2SGreg Kroah-Hartman * If we're ignoring parity and break indicators, 822ab4382d2SGreg Kroah-Hartman * ignore overruns too (for real raw support). 823ab4382d2SGreg Kroah-Hartman */ 824ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IGNPAR) 825ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask |= UART_LSR_OE; 826ab4382d2SGreg Kroah-Hartman } 827ab4382d2SGreg Kroah-Hartman 828ab4382d2SGreg Kroah-Hartman /* 829ab4382d2SGreg Kroah-Hartman * ignore all characters if CREAD is not set 830ab4382d2SGreg Kroah-Hartman */ 831ab4382d2SGreg Kroah-Hartman if ((termios->c_cflag & CREAD) == 0) 832ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask |= UART_LSR_DR; 833ab4382d2SGreg Kroah-Hartman 834ab4382d2SGreg Kroah-Hartman /* 835ab4382d2SGreg Kroah-Hartman * Modem status interrupts 836ab4382d2SGreg Kroah-Hartman */ 837ab4382d2SGreg Kroah-Hartman up->ier &= ~UART_IER_MSI; 838ab4382d2SGreg Kroah-Hartman if (UART_ENABLE_MS(&up->port, termios->c_cflag)) 839ab4382d2SGreg Kroah-Hartman up->ier |= UART_IER_MSI; 840ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 841ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, cval); /* reset DLAB */ 842c538d20cSGovindraj.R up->lcr = cval; 8431776fd05SAlexey Pelykh up->scr = 0; 844ab4382d2SGreg Kroah-Hartman 845ab4382d2SGreg Kroah-Hartman /* FIFOs and DMA Settings */ 846ab4382d2SGreg Kroah-Hartman 847ab4382d2SGreg Kroah-Hartman /* FCR can be changed only when the 848ab4382d2SGreg Kroah-Hartman * baud clock is not running 849ab4382d2SGreg Kroah-Hartman * DLL_REG and DLH_REG set to 0. 850ab4382d2SGreg Kroah-Hartman */ 851ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 852ab4382d2SGreg Kroah-Hartman serial_out(up, UART_DLL, 0); 853ab4382d2SGreg Kroah-Hartman serial_out(up, UART_DLM, 0); 854ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0); 855ab4382d2SGreg Kroah-Hartman 856ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 857ab4382d2SGreg Kroah-Hartman 85808bd4903SRussell King up->efr = serial_in(up, UART_EFR) & ~UART_EFR_ECB; 859d864c03bSRussell King up->efr &= ~UART_EFR_SCD; 860ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); 861ab4382d2SGreg Kroah-Hartman 862ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 86308bd4903SRussell King up->mcr = serial_in(up, UART_MCR) & ~UART_MCR_TCRTLR; 864ab4382d2SGreg Kroah-Hartman serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR); 865ab4382d2SGreg Kroah-Hartman /* FIFO ENABLE, DMA MODE */ 8660ba5f668SPaul Walmsley 8671f663966SAlexey Pelykh up->scr |= OMAP_UART_SCR_RX_TRIG_GRANU1_MASK; 8681f663966SAlexey Pelykh /* 8691f663966SAlexey Pelykh * NOTE: Setting OMAP_UART_SCR_RX_TRIG_GRANU1_MASK 8701f663966SAlexey Pelykh * sets Enables the granularity of 1 for TRIGGER RX 8711f663966SAlexey Pelykh * level. Along with setting RX FIFO trigger level 8721f663966SAlexey Pelykh * to 1 (as noted below, 16 characters) and TLR[3:0] 8731f663966SAlexey Pelykh * to zero this will result RX FIFO threshold level 8741f663966SAlexey Pelykh * to 1 character, instead of 16 as noted in comment 8751f663966SAlexey Pelykh * below. 8761f663966SAlexey Pelykh */ 8771f663966SAlexey Pelykh 8786721ab7fSFelipe Balbi /* Set receive FIFO threshold to 16 characters and 8796721ab7fSFelipe Balbi * transmit FIFO threshold to 16 spaces 8806721ab7fSFelipe Balbi */ 8810ba5f668SPaul Walmsley up->fcr &= ~OMAP_UART_FCR_RX_FIFO_TRIG_MASK; 8826721ab7fSFelipe Balbi up->fcr &= ~OMAP_UART_FCR_TX_FIFO_TRIG_MASK; 8836721ab7fSFelipe Balbi up->fcr |= UART_FCR6_R_TRIGGER_16 | UART_FCR6_T_TRIGGER_24 | 8846721ab7fSFelipe Balbi UART_FCR_ENABLE_FIFO; 8858a74e9ffSGreg Kroah-Hartman 8860ba5f668SPaul Walmsley serial_out(up, UART_FCR, up->fcr); 8870ba5f668SPaul Walmsley serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 8880ba5f668SPaul Walmsley 889c538d20cSGovindraj.R serial_out(up, UART_OMAP_SCR, up->scr); 890c538d20cSGovindraj.R 89108bd4903SRussell King /* Reset UART_MCR_TCRTLR: this must be done with the EFR_ECB bit set */ 892ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 893ab4382d2SGreg Kroah-Hartman serial_out(up, UART_MCR, up->mcr); 89408bd4903SRussell King serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 89508bd4903SRussell King serial_out(up, UART_EFR, up->efr); 89608bd4903SRussell King serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 897ab4382d2SGreg Kroah-Hartman 898ab4382d2SGreg Kroah-Hartman /* Protocol, Baud Rate, and Interrupt Settings */ 899ab4382d2SGreg Kroah-Hartman 90094734749SGovindraj.R if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) 90194734749SGovindraj.R serial_omap_mdr1_errataset(up, up->mdr1); 90294734749SGovindraj.R else 903c538d20cSGovindraj.R serial_out(up, UART_OMAP_MDR1, up->mdr1); 90494734749SGovindraj.R 905ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 906ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); 907ab4382d2SGreg Kroah-Hartman 908ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0); 909ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, 0); 910ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 911ab4382d2SGreg Kroah-Hartman 912c538d20cSGovindraj.R serial_out(up, UART_DLL, up->dll); /* LS of divisor */ 913c538d20cSGovindraj.R serial_out(up, UART_DLM, up->dlh); /* MS of divisor */ 914ab4382d2SGreg Kroah-Hartman 915ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0); 916ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 917ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 918ab4382d2SGreg Kroah-Hartman 919ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, up->efr); 920ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, cval); 921ab4382d2SGreg Kroah-Hartman 9225fe21236SAlexey Pelykh if (!serial_omap_baud_is_mode16(port, baud)) 923c538d20cSGovindraj.R up->mdr1 = UART_OMAP_MDR1_13X_MODE; 924ab4382d2SGreg Kroah-Hartman else 925c538d20cSGovindraj.R up->mdr1 = UART_OMAP_MDR1_16X_MODE; 926c538d20cSGovindraj.R 92794734749SGovindraj.R if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) 92894734749SGovindraj.R serial_omap_mdr1_errataset(up, up->mdr1); 92994734749SGovindraj.R else 930c538d20cSGovindraj.R serial_out(up, UART_OMAP_MDR1, up->mdr1); 931ab4382d2SGreg Kroah-Hartman 932c533e51bSRussell King /* Configure flow control */ 93308bd4903SRussell King serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 934ab4382d2SGreg Kroah-Hartman 935c533e51bSRussell King /* XON1/XOFF1 accessible mode B, TCRTLR=0, ECB=0 */ 936c533e51bSRussell King serial_out(up, UART_XON1, termios->c_cc[VSTART]); 937c533e51bSRussell King serial_out(up, UART_XOFF1, termios->c_cc[VSTOP]); 938c533e51bSRussell King 939c533e51bSRussell King /* Enable access to TCR/TLR */ 94008bd4903SRussell King serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); 941ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 942ab4382d2SGreg Kroah-Hartman serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR); 943ab4382d2SGreg Kroah-Hartman 944ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TI752_TCR, OMAP_UART_TCR_TRIG); 94508bd4903SRussell King 946c7d059caSRussell King if (termios->c_cflag & CRTSCTS && up->port.flags & UPF_HARD_FLOW) { 94708bd4903SRussell King /* Enable AUTORTS and AUTOCTS */ 94808bd4903SRussell King up->efr |= UART_EFR_CTS | UART_EFR_RTS; 94908bd4903SRussell King 9501fe8aa88SRussell King /* Ensure MCR RTS is asserted */ 9511fe8aa88SRussell King up->mcr |= UART_MCR_RTS; 9520d5b1663SRussell King } else { 9530d5b1663SRussell King /* Disable AUTORTS and AUTOCTS */ 9540d5b1663SRussell King up->efr &= ~(UART_EFR_CTS | UART_EFR_RTS); 955ab4382d2SGreg Kroah-Hartman } 956ab4382d2SGreg Kroah-Hartman 95701d70bb3SRussell King if (up->port.flags & UPF_SOFT_FLOW) { 95801d70bb3SRussell King /* clear SW control mode bits */ 95901d70bb3SRussell King up->efr &= OMAP_UART_SW_CLR; 96001d70bb3SRussell King 96101d70bb3SRussell King /* 96201d70bb3SRussell King * IXON Flag: 96301d70bb3SRussell King * Enable XON/XOFF flow control on input. 96401d70bb3SRussell King * Receiver compares XON1, XOFF1. 96501d70bb3SRussell King */ 9663af08bd7SRussell King if (termios->c_iflag & IXON) 96701d70bb3SRussell King up->efr |= OMAP_UART_SW_RX; 96801d70bb3SRussell King 96901d70bb3SRussell King /* 9703af08bd7SRussell King * IXOFF Flag: 9713af08bd7SRussell King * Enable XON/XOFF flow control on output. 9723af08bd7SRussell King * Transmit XON1, XOFF1 9733af08bd7SRussell King */ 9743af08bd7SRussell King if (termios->c_iflag & IXOFF) 9753af08bd7SRussell King up->efr |= OMAP_UART_SW_TX; 9763af08bd7SRussell King 9773af08bd7SRussell King /* 97801d70bb3SRussell King * IXANY Flag: 97901d70bb3SRussell King * Enable any character to restart output. 98001d70bb3SRussell King * Operation resumes after receiving any 98101d70bb3SRussell King * character after recognition of the XOFF character 98201d70bb3SRussell King */ 98301d70bb3SRussell King if (termios->c_iflag & IXANY) 98401d70bb3SRussell King up->mcr |= UART_MCR_XONANY; 98501d70bb3SRussell King else 98601d70bb3SRussell King up->mcr &= ~UART_MCR_XONANY; 98718f360f8SRussell King } 988c7d059caSRussell King serial_out(up, UART_MCR, up->mcr); 98901d70bb3SRussell King serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 99001d70bb3SRussell King serial_out(up, UART_EFR, up->efr); 99101d70bb3SRussell King serial_out(up, UART_LCR, up->lcr); 992ab4382d2SGreg Kroah-Hartman 993ab4382d2SGreg Kroah-Hartman serial_omap_set_mctrl(&up->port, up->port.mctrl); 994ab4382d2SGreg Kroah-Hartman 995ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags); 996660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 997660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 998ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_set_termios+%d\n", up->port.line); 999ab4382d2SGreg Kroah-Hartman } 1000ab4382d2SGreg Kroah-Hartman 10019727faf4SFelipe Balbi static int serial_omap_set_wake(struct uart_port *port, unsigned int state) 10029727faf4SFelipe Balbi { 10039727faf4SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 10049727faf4SFelipe Balbi 10059727faf4SFelipe Balbi serial_omap_enable_wakeup(up, state); 10069727faf4SFelipe Balbi 10079727faf4SFelipe Balbi return 0; 10089727faf4SFelipe Balbi } 10099727faf4SFelipe Balbi 1010ab4382d2SGreg Kroah-Hartman static void 1011ab4382d2SGreg Kroah-Hartman serial_omap_pm(struct uart_port *port, unsigned int state, 1012ab4382d2SGreg Kroah-Hartman unsigned int oldstate) 1013ab4382d2SGreg Kroah-Hartman { 1014c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 1015ab4382d2SGreg Kroah-Hartman unsigned char efr; 1016ab4382d2SGreg Kroah-Hartman 1017ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_pm+%d\n", up->port.line); 1018fcdca757SGovindraj.R 1019d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 1020ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 1021ab4382d2SGreg Kroah-Hartman efr = serial_in(up, UART_EFR); 1022ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, efr | UART_EFR_ECB); 1023ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0); 1024ab4382d2SGreg Kroah-Hartman 1025ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, (state != 0) ? UART_IERX_SLEEP : 0); 1026ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 1027ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, efr); 1028ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0); 1029fcdca757SGovindraj.R 1030d8ee4ea6SFelipe Balbi if (!device_may_wakeup(up->dev)) { 1031fcdca757SGovindraj.R if (!state) 1032d8ee4ea6SFelipe Balbi pm_runtime_forbid(up->dev); 1033fcdca757SGovindraj.R else 1034d8ee4ea6SFelipe Balbi pm_runtime_allow(up->dev); 1035fcdca757SGovindraj.R } 1036fcdca757SGovindraj.R 1037660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 1038660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 1039ab4382d2SGreg Kroah-Hartman } 1040ab4382d2SGreg Kroah-Hartman 1041ab4382d2SGreg Kroah-Hartman static void serial_omap_release_port(struct uart_port *port) 1042ab4382d2SGreg Kroah-Hartman { 1043ab4382d2SGreg Kroah-Hartman dev_dbg(port->dev, "serial_omap_release_port+\n"); 1044ab4382d2SGreg Kroah-Hartman } 1045ab4382d2SGreg Kroah-Hartman 1046ab4382d2SGreg Kroah-Hartman static int serial_omap_request_port(struct uart_port *port) 1047ab4382d2SGreg Kroah-Hartman { 1048ab4382d2SGreg Kroah-Hartman dev_dbg(port->dev, "serial_omap_request_port+\n"); 1049ab4382d2SGreg Kroah-Hartman return 0; 1050ab4382d2SGreg Kroah-Hartman } 1051ab4382d2SGreg Kroah-Hartman 1052ab4382d2SGreg Kroah-Hartman static void serial_omap_config_port(struct uart_port *port, int flags) 1053ab4382d2SGreg Kroah-Hartman { 1054c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 1055ab4382d2SGreg Kroah-Hartman 1056ab4382d2SGreg Kroah-Hartman dev_dbg(up->port.dev, "serial_omap_config_port+%d\n", 1057ba77433dSRajendra Nayak up->port.line); 1058ab4382d2SGreg Kroah-Hartman up->port.type = PORT_OMAP; 10593af08bd7SRussell King up->port.flags |= UPF_SOFT_FLOW | UPF_HARD_FLOW; 1060ab4382d2SGreg Kroah-Hartman } 1061ab4382d2SGreg Kroah-Hartman 1062ab4382d2SGreg Kroah-Hartman static int 1063ab4382d2SGreg Kroah-Hartman serial_omap_verify_port(struct uart_port *port, struct serial_struct *ser) 1064ab4382d2SGreg Kroah-Hartman { 1065ab4382d2SGreg Kroah-Hartman /* we don't want the core code to modify any port params */ 1066ab4382d2SGreg Kroah-Hartman dev_dbg(port->dev, "serial_omap_verify_port+\n"); 1067ab4382d2SGreg Kroah-Hartman return -EINVAL; 1068ab4382d2SGreg Kroah-Hartman } 1069ab4382d2SGreg Kroah-Hartman 1070ab4382d2SGreg Kroah-Hartman static const char * 1071ab4382d2SGreg Kroah-Hartman serial_omap_type(struct uart_port *port) 1072ab4382d2SGreg Kroah-Hartman { 1073c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 1074ab4382d2SGreg Kroah-Hartman 1075ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_type+%d\n", up->port.line); 1076ab4382d2SGreg Kroah-Hartman return up->name; 1077ab4382d2SGreg Kroah-Hartman } 1078ab4382d2SGreg Kroah-Hartman 1079ab4382d2SGreg Kroah-Hartman #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE) 1080ab4382d2SGreg Kroah-Hartman 1081ab4382d2SGreg Kroah-Hartman static inline void wait_for_xmitr(struct uart_omap_port *up) 1082ab4382d2SGreg Kroah-Hartman { 1083ab4382d2SGreg Kroah-Hartman unsigned int status, tmout = 10000; 1084ab4382d2SGreg Kroah-Hartman 1085ab4382d2SGreg Kroah-Hartman /* Wait up to 10ms for the character(s) to be sent. */ 1086ab4382d2SGreg Kroah-Hartman do { 1087ab4382d2SGreg Kroah-Hartman status = serial_in(up, UART_LSR); 1088ab4382d2SGreg Kroah-Hartman 1089ab4382d2SGreg Kroah-Hartman if (status & UART_LSR_BI) 1090ab4382d2SGreg Kroah-Hartman up->lsr_break_flag = UART_LSR_BI; 1091ab4382d2SGreg Kroah-Hartman 1092ab4382d2SGreg Kroah-Hartman if (--tmout == 0) 1093ab4382d2SGreg Kroah-Hartman break; 1094ab4382d2SGreg Kroah-Hartman udelay(1); 1095ab4382d2SGreg Kroah-Hartman } while ((status & BOTH_EMPTY) != BOTH_EMPTY); 1096ab4382d2SGreg Kroah-Hartman 1097ab4382d2SGreg Kroah-Hartman /* Wait up to 1s for flow control if necessary */ 1098ab4382d2SGreg Kroah-Hartman if (up->port.flags & UPF_CONS_FLOW) { 1099ab4382d2SGreg Kroah-Hartman tmout = 1000000; 1100ab4382d2SGreg Kroah-Hartman for (tmout = 1000000; tmout; tmout--) { 1101ab4382d2SGreg Kroah-Hartman unsigned int msr = serial_in(up, UART_MSR); 1102ab4382d2SGreg Kroah-Hartman 1103ab4382d2SGreg Kroah-Hartman up->msr_saved_flags |= msr & MSR_SAVE_FLAGS; 1104ab4382d2SGreg Kroah-Hartman if (msr & UART_MSR_CTS) 1105ab4382d2SGreg Kroah-Hartman break; 1106ab4382d2SGreg Kroah-Hartman 1107ab4382d2SGreg Kroah-Hartman udelay(1); 1108ab4382d2SGreg Kroah-Hartman } 1109ab4382d2SGreg Kroah-Hartman } 1110ab4382d2SGreg Kroah-Hartman } 1111ab4382d2SGreg Kroah-Hartman 1112ab4382d2SGreg Kroah-Hartman #ifdef CONFIG_CONSOLE_POLL 1113ab4382d2SGreg Kroah-Hartman 1114ab4382d2SGreg Kroah-Hartman static void serial_omap_poll_put_char(struct uart_port *port, unsigned char ch) 1115ab4382d2SGreg Kroah-Hartman { 1116c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 1117fcdca757SGovindraj.R 1118d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 1119ab4382d2SGreg Kroah-Hartman wait_for_xmitr(up); 1120ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TX, ch); 1121660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 1122660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 1123ab4382d2SGreg Kroah-Hartman } 1124ab4382d2SGreg Kroah-Hartman 1125ab4382d2SGreg Kroah-Hartman static int serial_omap_poll_get_char(struct uart_port *port) 1126ab4382d2SGreg Kroah-Hartman { 1127c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 1128fcdca757SGovindraj.R unsigned int status; 1129ab4382d2SGreg Kroah-Hartman 1130d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 1131fcdca757SGovindraj.R status = serial_in(up, UART_LSR); 1132a6b19c33SFelipe Balbi if (!(status & UART_LSR_DR)) { 1133a6b19c33SFelipe Balbi status = NO_POLL_CHAR; 1134a6b19c33SFelipe Balbi goto out; 1135a6b19c33SFelipe Balbi } 1136ab4382d2SGreg Kroah-Hartman 1137fcdca757SGovindraj.R status = serial_in(up, UART_RX); 1138a6b19c33SFelipe Balbi 1139a6b19c33SFelipe Balbi out: 1140660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 1141660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 1142a6b19c33SFelipe Balbi 1143fcdca757SGovindraj.R return status; 1144ab4382d2SGreg Kroah-Hartman } 1145ab4382d2SGreg Kroah-Hartman 1146ab4382d2SGreg Kroah-Hartman #endif /* CONFIG_CONSOLE_POLL */ 1147ab4382d2SGreg Kroah-Hartman 1148ab4382d2SGreg Kroah-Hartman #ifdef CONFIG_SERIAL_OMAP_CONSOLE 1149ab4382d2SGreg Kroah-Hartman 115040477d0eSShubhrajyoti D static struct uart_omap_port *serial_omap_console_ports[OMAP_MAX_HSUART_PORTS]; 1151ab4382d2SGreg Kroah-Hartman 1152ab4382d2SGreg Kroah-Hartman static struct uart_driver serial_omap_reg; 1153ab4382d2SGreg Kroah-Hartman 1154ab4382d2SGreg Kroah-Hartman static void serial_omap_console_putchar(struct uart_port *port, int ch) 1155ab4382d2SGreg Kroah-Hartman { 1156c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 1157ab4382d2SGreg Kroah-Hartman 1158ab4382d2SGreg Kroah-Hartman wait_for_xmitr(up); 1159ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TX, ch); 1160ab4382d2SGreg Kroah-Hartman } 1161ab4382d2SGreg Kroah-Hartman 1162ab4382d2SGreg Kroah-Hartman static void 1163ab4382d2SGreg Kroah-Hartman serial_omap_console_write(struct console *co, const char *s, 1164ab4382d2SGreg Kroah-Hartman unsigned int count) 1165ab4382d2SGreg Kroah-Hartman { 1166ab4382d2SGreg Kroah-Hartman struct uart_omap_port *up = serial_omap_console_ports[co->index]; 1167ab4382d2SGreg Kroah-Hartman unsigned long flags; 1168ab4382d2SGreg Kroah-Hartman unsigned int ier; 1169ab4382d2SGreg Kroah-Hartman int locked = 1; 1170ab4382d2SGreg Kroah-Hartman 1171d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 1172fcdca757SGovindraj.R 1173ab4382d2SGreg Kroah-Hartman local_irq_save(flags); 1174ab4382d2SGreg Kroah-Hartman if (up->port.sysrq) 1175ab4382d2SGreg Kroah-Hartman locked = 0; 1176ab4382d2SGreg Kroah-Hartman else if (oops_in_progress) 1177ab4382d2SGreg Kroah-Hartman locked = spin_trylock(&up->port.lock); 1178ab4382d2SGreg Kroah-Hartman else 1179ab4382d2SGreg Kroah-Hartman spin_lock(&up->port.lock); 1180ab4382d2SGreg Kroah-Hartman 1181ab4382d2SGreg Kroah-Hartman /* 1182ab4382d2SGreg Kroah-Hartman * First save the IER then disable the interrupts 1183ab4382d2SGreg Kroah-Hartman */ 1184ab4382d2SGreg Kroah-Hartman ier = serial_in(up, UART_IER); 1185ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, 0); 1186ab4382d2SGreg Kroah-Hartman 1187ab4382d2SGreg Kroah-Hartman uart_console_write(&up->port, s, count, serial_omap_console_putchar); 1188ab4382d2SGreg Kroah-Hartman 1189ab4382d2SGreg Kroah-Hartman /* 1190ab4382d2SGreg Kroah-Hartman * Finally, wait for transmitter to become empty 1191ab4382d2SGreg Kroah-Hartman * and restore the IER 1192ab4382d2SGreg Kroah-Hartman */ 1193ab4382d2SGreg Kroah-Hartman wait_for_xmitr(up); 1194ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, ier); 1195ab4382d2SGreg Kroah-Hartman /* 1196ab4382d2SGreg Kroah-Hartman * The receive handling will happen properly because the 1197ab4382d2SGreg Kroah-Hartman * receive ready bit will still be set; it is not cleared 1198ab4382d2SGreg Kroah-Hartman * on read. However, modem control will not, we must 1199ab4382d2SGreg Kroah-Hartman * call it if we have saved something in the saved flags 1200ab4382d2SGreg Kroah-Hartman * while processing with interrupts off. 1201ab4382d2SGreg Kroah-Hartman */ 1202ab4382d2SGreg Kroah-Hartman if (up->msr_saved_flags) 1203ab4382d2SGreg Kroah-Hartman check_modem_status(up); 1204ab4382d2SGreg Kroah-Hartman 1205d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 1206d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 1207ab4382d2SGreg Kroah-Hartman if (locked) 1208ab4382d2SGreg Kroah-Hartman spin_unlock(&up->port.lock); 1209ab4382d2SGreg Kroah-Hartman local_irq_restore(flags); 1210ab4382d2SGreg Kroah-Hartman } 1211ab4382d2SGreg Kroah-Hartman 1212ab4382d2SGreg Kroah-Hartman static int __init 1213ab4382d2SGreg Kroah-Hartman serial_omap_console_setup(struct console *co, char *options) 1214ab4382d2SGreg Kroah-Hartman { 1215ab4382d2SGreg Kroah-Hartman struct uart_omap_port *up; 1216ab4382d2SGreg Kroah-Hartman int baud = 115200; 1217ab4382d2SGreg Kroah-Hartman int bits = 8; 1218ab4382d2SGreg Kroah-Hartman int parity = 'n'; 1219ab4382d2SGreg Kroah-Hartman int flow = 'n'; 1220ab4382d2SGreg Kroah-Hartman 1221ab4382d2SGreg Kroah-Hartman if (serial_omap_console_ports[co->index] == NULL) 1222ab4382d2SGreg Kroah-Hartman return -ENODEV; 1223ab4382d2SGreg Kroah-Hartman up = serial_omap_console_ports[co->index]; 1224ab4382d2SGreg Kroah-Hartman 1225ab4382d2SGreg Kroah-Hartman if (options) 1226ab4382d2SGreg Kroah-Hartman uart_parse_options(options, &baud, &parity, &bits, &flow); 1227ab4382d2SGreg Kroah-Hartman 1228ab4382d2SGreg Kroah-Hartman return uart_set_options(&up->port, co, baud, parity, bits, flow); 1229ab4382d2SGreg Kroah-Hartman } 1230ab4382d2SGreg Kroah-Hartman 1231ab4382d2SGreg Kroah-Hartman static struct console serial_omap_console = { 1232ab4382d2SGreg Kroah-Hartman .name = OMAP_SERIAL_NAME, 1233ab4382d2SGreg Kroah-Hartman .write = serial_omap_console_write, 1234ab4382d2SGreg Kroah-Hartman .device = uart_console_device, 1235ab4382d2SGreg Kroah-Hartman .setup = serial_omap_console_setup, 1236ab4382d2SGreg Kroah-Hartman .flags = CON_PRINTBUFFER, 1237ab4382d2SGreg Kroah-Hartman .index = -1, 1238ab4382d2SGreg Kroah-Hartman .data = &serial_omap_reg, 1239ab4382d2SGreg Kroah-Hartman }; 1240ab4382d2SGreg Kroah-Hartman 1241ab4382d2SGreg Kroah-Hartman static void serial_omap_add_console_port(struct uart_omap_port *up) 1242ab4382d2SGreg Kroah-Hartman { 1243ba77433dSRajendra Nayak serial_omap_console_ports[up->port.line] = up; 1244ab4382d2SGreg Kroah-Hartman } 1245ab4382d2SGreg Kroah-Hartman 1246ab4382d2SGreg Kroah-Hartman #define OMAP_CONSOLE (&serial_omap_console) 1247ab4382d2SGreg Kroah-Hartman 1248ab4382d2SGreg Kroah-Hartman #else 1249ab4382d2SGreg Kroah-Hartman 1250ab4382d2SGreg Kroah-Hartman #define OMAP_CONSOLE NULL 1251ab4382d2SGreg Kroah-Hartman 1252ab4382d2SGreg Kroah-Hartman static inline void serial_omap_add_console_port(struct uart_omap_port *up) 1253ab4382d2SGreg Kroah-Hartman {} 1254ab4382d2SGreg Kroah-Hartman 1255ab4382d2SGreg Kroah-Hartman #endif 1256ab4382d2SGreg Kroah-Hartman 1257ab4382d2SGreg Kroah-Hartman static struct uart_ops serial_omap_pops = { 1258ab4382d2SGreg Kroah-Hartman .tx_empty = serial_omap_tx_empty, 1259ab4382d2SGreg Kroah-Hartman .set_mctrl = serial_omap_set_mctrl, 1260ab4382d2SGreg Kroah-Hartman .get_mctrl = serial_omap_get_mctrl, 1261ab4382d2SGreg Kroah-Hartman .stop_tx = serial_omap_stop_tx, 1262ab4382d2SGreg Kroah-Hartman .start_tx = serial_omap_start_tx, 12633af08bd7SRussell King .throttle = serial_omap_throttle, 12643af08bd7SRussell King .unthrottle = serial_omap_unthrottle, 1265ab4382d2SGreg Kroah-Hartman .stop_rx = serial_omap_stop_rx, 1266ab4382d2SGreg Kroah-Hartman .enable_ms = serial_omap_enable_ms, 1267ab4382d2SGreg Kroah-Hartman .break_ctl = serial_omap_break_ctl, 1268ab4382d2SGreg Kroah-Hartman .startup = serial_omap_startup, 1269ab4382d2SGreg Kroah-Hartman .shutdown = serial_omap_shutdown, 1270ab4382d2SGreg Kroah-Hartman .set_termios = serial_omap_set_termios, 1271ab4382d2SGreg Kroah-Hartman .pm = serial_omap_pm, 12729727faf4SFelipe Balbi .set_wake = serial_omap_set_wake, 1273ab4382d2SGreg Kroah-Hartman .type = serial_omap_type, 1274ab4382d2SGreg Kroah-Hartman .release_port = serial_omap_release_port, 1275ab4382d2SGreg Kroah-Hartman .request_port = serial_omap_request_port, 1276ab4382d2SGreg Kroah-Hartman .config_port = serial_omap_config_port, 1277ab4382d2SGreg Kroah-Hartman .verify_port = serial_omap_verify_port, 1278ab4382d2SGreg Kroah-Hartman #ifdef CONFIG_CONSOLE_POLL 1279ab4382d2SGreg Kroah-Hartman .poll_put_char = serial_omap_poll_put_char, 1280ab4382d2SGreg Kroah-Hartman .poll_get_char = serial_omap_poll_get_char, 1281ab4382d2SGreg Kroah-Hartman #endif 1282ab4382d2SGreg Kroah-Hartman }; 1283ab4382d2SGreg Kroah-Hartman 1284ab4382d2SGreg Kroah-Hartman static struct uart_driver serial_omap_reg = { 1285ab4382d2SGreg Kroah-Hartman .owner = THIS_MODULE, 1286ab4382d2SGreg Kroah-Hartman .driver_name = "OMAP-SERIAL", 1287ab4382d2SGreg Kroah-Hartman .dev_name = OMAP_SERIAL_NAME, 1288ab4382d2SGreg Kroah-Hartman .nr = OMAP_MAX_HSUART_PORTS, 1289ab4382d2SGreg Kroah-Hartman .cons = OMAP_CONSOLE, 1290ab4382d2SGreg Kroah-Hartman }; 1291ab4382d2SGreg Kroah-Hartman 12923bc4f0d8SShubhrajyoti D #ifdef CONFIG_PM_SLEEP 1293ddd85e22SSourav Poddar static int serial_omap_prepare(struct device *dev) 1294ddd85e22SSourav Poddar { 1295ddd85e22SSourav Poddar struct uart_omap_port *up = dev_get_drvdata(dev); 1296ddd85e22SSourav Poddar 1297ddd85e22SSourav Poddar up->is_suspending = true; 1298ddd85e22SSourav Poddar 1299ddd85e22SSourav Poddar return 0; 1300ddd85e22SSourav Poddar } 1301ddd85e22SSourav Poddar 1302ddd85e22SSourav Poddar static void serial_omap_complete(struct device *dev) 1303ddd85e22SSourav Poddar { 1304ddd85e22SSourav Poddar struct uart_omap_port *up = dev_get_drvdata(dev); 1305ddd85e22SSourav Poddar 1306ddd85e22SSourav Poddar up->is_suspending = false; 1307ddd85e22SSourav Poddar } 1308ddd85e22SSourav Poddar 1309fcdca757SGovindraj.R static int serial_omap_suspend(struct device *dev) 1310ab4382d2SGreg Kroah-Hartman { 1311fcdca757SGovindraj.R struct uart_omap_port *up = dev_get_drvdata(dev); 1312ab4382d2SGreg Kroah-Hartman 1313ab4382d2SGreg Kroah-Hartman uart_suspend_port(&serial_omap_reg, &up->port); 131443829731STejun Heo flush_work(&up->qos_work); 13152fd14964SGovindraj.R 1316ab4382d2SGreg Kroah-Hartman return 0; 1317ab4382d2SGreg Kroah-Hartman } 1318ab4382d2SGreg Kroah-Hartman 1319fcdca757SGovindraj.R static int serial_omap_resume(struct device *dev) 1320ab4382d2SGreg Kroah-Hartman { 1321fcdca757SGovindraj.R struct uart_omap_port *up = dev_get_drvdata(dev); 1322ab4382d2SGreg Kroah-Hartman 1323ab4382d2SGreg Kroah-Hartman uart_resume_port(&serial_omap_reg, &up->port); 1324ac57e7f3SSourav Poddar 1325ab4382d2SGreg Kroah-Hartman return 0; 1326ab4382d2SGreg Kroah-Hartman } 1327ddd85e22SSourav Poddar #else 1328ddd85e22SSourav Poddar #define serial_omap_prepare NULL 13292cb5a2faSArnd Bergmann #define serial_omap_complete NULL 1330ddd85e22SSourav Poddar #endif /* CONFIG_PM_SLEEP */ 1331ab4382d2SGreg Kroah-Hartman 13329671f099SBill Pemberton static void omap_serial_fill_features_erratas(struct uart_omap_port *up) 13337c77c8deSGovindraj.R { 13347c77c8deSGovindraj.R u32 mvr, scheme; 13357c77c8deSGovindraj.R u16 revision, major, minor; 13367c77c8deSGovindraj.R 13377c77c8deSGovindraj.R mvr = serial_in(up, UART_OMAP_MVER); 13387c77c8deSGovindraj.R 13397c77c8deSGovindraj.R /* Check revision register scheme */ 13407c77c8deSGovindraj.R scheme = mvr >> OMAP_UART_MVR_SCHEME_SHIFT; 13417c77c8deSGovindraj.R 13427c77c8deSGovindraj.R switch (scheme) { 13437c77c8deSGovindraj.R case 0: /* Legacy Scheme: OMAP2/3 */ 13447c77c8deSGovindraj.R /* MINOR_REV[0:4], MAJOR_REV[4:7] */ 13457c77c8deSGovindraj.R major = (mvr & OMAP_UART_LEGACY_MVR_MAJ_MASK) >> 13467c77c8deSGovindraj.R OMAP_UART_LEGACY_MVR_MAJ_SHIFT; 13477c77c8deSGovindraj.R minor = (mvr & OMAP_UART_LEGACY_MVR_MIN_MASK); 13487c77c8deSGovindraj.R break; 13497c77c8deSGovindraj.R case 1: 13507c77c8deSGovindraj.R /* New Scheme: OMAP4+ */ 13517c77c8deSGovindraj.R /* MINOR_REV[0:5], MAJOR_REV[8:10] */ 13527c77c8deSGovindraj.R major = (mvr & OMAP_UART_MVR_MAJ_MASK) >> 13537c77c8deSGovindraj.R OMAP_UART_MVR_MAJ_SHIFT; 13547c77c8deSGovindraj.R minor = (mvr & OMAP_UART_MVR_MIN_MASK); 13557c77c8deSGovindraj.R break; 13567c77c8deSGovindraj.R default: 1357d8ee4ea6SFelipe Balbi dev_warn(up->dev, 13587c77c8deSGovindraj.R "Unknown %s revision, defaulting to highest\n", 13597c77c8deSGovindraj.R up->name); 13607c77c8deSGovindraj.R /* highest possible revision */ 13617c77c8deSGovindraj.R major = 0xff; 13627c77c8deSGovindraj.R minor = 0xff; 13637c77c8deSGovindraj.R } 13647c77c8deSGovindraj.R 13657c77c8deSGovindraj.R /* normalize revision for the driver */ 13667c77c8deSGovindraj.R revision = UART_BUILD_REVISION(major, minor); 13677c77c8deSGovindraj.R 13687c77c8deSGovindraj.R switch (revision) { 13697c77c8deSGovindraj.R case OMAP_UART_REV_46: 13707c77c8deSGovindraj.R up->errata |= (UART_ERRATA_i202_MDR1_ACCESS | 13717c77c8deSGovindraj.R UART_ERRATA_i291_DMA_FORCEIDLE); 13727c77c8deSGovindraj.R break; 13737c77c8deSGovindraj.R case OMAP_UART_REV_52: 13747c77c8deSGovindraj.R up->errata |= (UART_ERRATA_i202_MDR1_ACCESS | 13757c77c8deSGovindraj.R UART_ERRATA_i291_DMA_FORCEIDLE); 13767c77c8deSGovindraj.R break; 13777c77c8deSGovindraj.R case OMAP_UART_REV_63: 13787c77c8deSGovindraj.R up->errata |= UART_ERRATA_i202_MDR1_ACCESS; 13797c77c8deSGovindraj.R break; 13807c77c8deSGovindraj.R default: 13817c77c8deSGovindraj.R break; 13827c77c8deSGovindraj.R } 13837c77c8deSGovindraj.R } 13847c77c8deSGovindraj.R 13859671f099SBill Pemberton static struct omap_uart_port_info *of_get_uart_port_info(struct device *dev) 1386d92b0dfcSRajendra Nayak { 1387d92b0dfcSRajendra Nayak struct omap_uart_port_info *omap_up_info; 1388d92b0dfcSRajendra Nayak 1389d92b0dfcSRajendra Nayak omap_up_info = devm_kzalloc(dev, sizeof(*omap_up_info), GFP_KERNEL); 1390d92b0dfcSRajendra Nayak if (!omap_up_info) 1391d92b0dfcSRajendra Nayak return NULL; /* out of memory */ 1392d92b0dfcSRajendra Nayak 1393d92b0dfcSRajendra Nayak of_property_read_u32(dev->of_node, "clock-frequency", 1394d92b0dfcSRajendra Nayak &omap_up_info->uartclk); 1395d92b0dfcSRajendra Nayak return omap_up_info; 1396d92b0dfcSRajendra Nayak } 1397d92b0dfcSRajendra Nayak 13989671f099SBill Pemberton static int serial_omap_probe(struct platform_device *pdev) 1399ab4382d2SGreg Kroah-Hartman { 1400ab4382d2SGreg Kroah-Hartman struct uart_omap_port *up; 140149457430SFelipe Balbi struct resource *mem, *irq; 1402ab4382d2SGreg Kroah-Hartman struct omap_uart_port_info *omap_up_info = pdev->dev.platform_data; 14039574f36fSNeilBrown int ret; 1404ab4382d2SGreg Kroah-Hartman 1405d92b0dfcSRajendra Nayak if (pdev->dev.of_node) 1406d92b0dfcSRajendra Nayak omap_up_info = of_get_uart_port_info(&pdev->dev); 1407d92b0dfcSRajendra Nayak 1408ab4382d2SGreg Kroah-Hartman mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1409ab4382d2SGreg Kroah-Hartman if (!mem) { 1410ab4382d2SGreg Kroah-Hartman dev_err(&pdev->dev, "no mem resource?\n"); 1411ab4382d2SGreg Kroah-Hartman return -ENODEV; 1412ab4382d2SGreg Kroah-Hartman } 1413ab4382d2SGreg Kroah-Hartman 1414ab4382d2SGreg Kroah-Hartman irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 1415ab4382d2SGreg Kroah-Hartman if (!irq) { 1416ab4382d2SGreg Kroah-Hartman dev_err(&pdev->dev, "no irq resource?\n"); 1417ab4382d2SGreg Kroah-Hartman return -ENODEV; 1418ab4382d2SGreg Kroah-Hartman } 1419ab4382d2SGreg Kroah-Hartman 1420388bc262SShubhrajyoti D if (!devm_request_mem_region(&pdev->dev, mem->start, resource_size(mem), 1421ab4382d2SGreg Kroah-Hartman pdev->dev.driver->name)) { 1422ab4382d2SGreg Kroah-Hartman dev_err(&pdev->dev, "memory region already claimed\n"); 1423ab4382d2SGreg Kroah-Hartman return -EBUSY; 1424ab4382d2SGreg Kroah-Hartman } 1425ab4382d2SGreg Kroah-Hartman 14269574f36fSNeilBrown if (gpio_is_valid(omap_up_info->DTR_gpio) && 14279574f36fSNeilBrown omap_up_info->DTR_present) { 14289574f36fSNeilBrown ret = gpio_request(omap_up_info->DTR_gpio, "omap-serial"); 14299574f36fSNeilBrown if (ret < 0) 14309574f36fSNeilBrown return ret; 14319574f36fSNeilBrown ret = gpio_direction_output(omap_up_info->DTR_gpio, 14329574f36fSNeilBrown omap_up_info->DTR_inverted); 14339574f36fSNeilBrown if (ret < 0) 14349574f36fSNeilBrown return ret; 14359574f36fSNeilBrown } 14369574f36fSNeilBrown 1437388bc262SShubhrajyoti D up = devm_kzalloc(&pdev->dev, sizeof(*up), GFP_KERNEL); 1438388bc262SShubhrajyoti D if (!up) 1439388bc262SShubhrajyoti D return -ENOMEM; 1440388bc262SShubhrajyoti D 14419574f36fSNeilBrown if (gpio_is_valid(omap_up_info->DTR_gpio) && 14429574f36fSNeilBrown omap_up_info->DTR_present) { 14439574f36fSNeilBrown up->DTR_gpio = omap_up_info->DTR_gpio; 14449574f36fSNeilBrown up->DTR_inverted = omap_up_info->DTR_inverted; 14459574f36fSNeilBrown } else 14469574f36fSNeilBrown up->DTR_gpio = -EINVAL; 14479574f36fSNeilBrown up->DTR_active = 0; 14489574f36fSNeilBrown 1449d8ee4ea6SFelipe Balbi up->dev = &pdev->dev; 1450ab4382d2SGreg Kroah-Hartman up->port.dev = &pdev->dev; 1451ab4382d2SGreg Kroah-Hartman up->port.type = PORT_OMAP; 1452ab4382d2SGreg Kroah-Hartman up->port.iotype = UPIO_MEM; 1453ab4382d2SGreg Kroah-Hartman up->port.irq = irq->start; 1454ab4382d2SGreg Kroah-Hartman 1455ab4382d2SGreg Kroah-Hartman up->port.regshift = 2; 1456ab4382d2SGreg Kroah-Hartman up->port.fifosize = 64; 1457ab4382d2SGreg Kroah-Hartman up->port.ops = &serial_omap_pops; 1458ab4382d2SGreg Kroah-Hartman 1459d92b0dfcSRajendra Nayak if (pdev->dev.of_node) 1460d92b0dfcSRajendra Nayak up->port.line = of_alias_get_id(pdev->dev.of_node, "serial"); 1461d92b0dfcSRajendra Nayak else 1462ab4382d2SGreg Kroah-Hartman up->port.line = pdev->id; 1463ab4382d2SGreg Kroah-Hartman 1464d92b0dfcSRajendra Nayak if (up->port.line < 0) { 1465d92b0dfcSRajendra Nayak dev_err(&pdev->dev, "failed to get alias/pdev id, errno %d\n", 1466d92b0dfcSRajendra Nayak up->port.line); 1467d92b0dfcSRajendra Nayak ret = -ENODEV; 1468388bc262SShubhrajyoti D goto err_port_line; 1469d92b0dfcSRajendra Nayak } 1470d92b0dfcSRajendra Nayak 14713dbc5ce2STony Lindgren up->pins = devm_pinctrl_get_select_default(&pdev->dev); 14723dbc5ce2STony Lindgren if (IS_ERR(up->pins)) { 14733dbc5ce2STony Lindgren dev_warn(&pdev->dev, "did not get pins for uart%i error: %li\n", 14743dbc5ce2STony Lindgren up->port.line, PTR_ERR(up->pins)); 14753dbc5ce2STony Lindgren up->pins = NULL; 14763dbc5ce2STony Lindgren } 14773dbc5ce2STony Lindgren 1478d92b0dfcSRajendra Nayak sprintf(up->name, "OMAP UART%d", up->port.line); 1479edd70ad7SGovindraj.R up->port.mapbase = mem->start; 1480388bc262SShubhrajyoti D up->port.membase = devm_ioremap(&pdev->dev, mem->start, 1481388bc262SShubhrajyoti D resource_size(mem)); 1482edd70ad7SGovindraj.R if (!up->port.membase) { 1483edd70ad7SGovindraj.R dev_err(&pdev->dev, "can't ioremap UART\n"); 1484edd70ad7SGovindraj.R ret = -ENOMEM; 1485388bc262SShubhrajyoti D goto err_ioremap; 1486edd70ad7SGovindraj.R } 1487edd70ad7SGovindraj.R 1488ab4382d2SGreg Kroah-Hartman up->port.flags = omap_up_info->flags; 1489ab4382d2SGreg Kroah-Hartman up->port.uartclk = omap_up_info->uartclk; 14908fe789dcSRajendra Nayak if (!up->port.uartclk) { 14918fe789dcSRajendra Nayak up->port.uartclk = DEFAULT_CLK_SPEED; 14928fe789dcSRajendra Nayak dev_warn(&pdev->dev, "No clock speed specified: using default:" 14938fe789dcSRajendra Nayak "%d\n", DEFAULT_CLK_SPEED); 14948fe789dcSRajendra Nayak } 1495ab4382d2SGreg Kroah-Hartman 14962fd14964SGovindraj.R up->latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE; 14972fd14964SGovindraj.R up->calc_latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE; 14982fd14964SGovindraj.R pm_qos_add_request(&up->pm_qos_request, 14992fd14964SGovindraj.R PM_QOS_CPU_DMA_LATENCY, up->latency); 15002fd14964SGovindraj.R serial_omap_uart_wq = create_singlethread_workqueue(up->name); 15012fd14964SGovindraj.R INIT_WORK(&up->qos_work, serial_omap_uart_qos_work); 15022fd14964SGovindraj.R 150393220dccSFelipe Balbi platform_set_drvdata(pdev, up); 1504856e35bfSRuchika Kharwar pm_runtime_enable(&pdev->dev); 1505fcdca757SGovindraj.R pm_runtime_use_autosuspend(&pdev->dev); 1506fcdca757SGovindraj.R pm_runtime_set_autosuspend_delay(&pdev->dev, 1507c86845dbSDeepak K omap_up_info->autosuspend_timeout); 1508fcdca757SGovindraj.R 1509fcdca757SGovindraj.R pm_runtime_irq_safe(&pdev->dev); 1510fcdca757SGovindraj.R pm_runtime_get_sync(&pdev->dev); 1511fcdca757SGovindraj.R 15127c77c8deSGovindraj.R omap_serial_fill_features_erratas(up); 15137c77c8deSGovindraj.R 1514ba77433dSRajendra Nayak ui[up->port.line] = up; 1515ab4382d2SGreg Kroah-Hartman serial_omap_add_console_port(up); 1516ab4382d2SGreg Kroah-Hartman 1517ab4382d2SGreg Kroah-Hartman ret = uart_add_one_port(&serial_omap_reg, &up->port); 1518ab4382d2SGreg Kroah-Hartman if (ret != 0) 1519388bc262SShubhrajyoti D goto err_add_port; 1520ab4382d2SGreg Kroah-Hartman 1521660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 1522660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 1523ab4382d2SGreg Kroah-Hartman return 0; 1524388bc262SShubhrajyoti D 1525388bc262SShubhrajyoti D err_add_port: 1526388bc262SShubhrajyoti D pm_runtime_put(&pdev->dev); 1527388bc262SShubhrajyoti D pm_runtime_disable(&pdev->dev); 1528388bc262SShubhrajyoti D err_ioremap: 1529388bc262SShubhrajyoti D err_port_line: 1530ab4382d2SGreg Kroah-Hartman dev_err(&pdev->dev, "[UART%d]: failure [%s]: %d\n", 1531ab4382d2SGreg Kroah-Hartman pdev->id, __func__, ret); 1532ab4382d2SGreg Kroah-Hartman return ret; 1533ab4382d2SGreg Kroah-Hartman } 1534ab4382d2SGreg Kroah-Hartman 1535ae8d8a14SBill Pemberton static int serial_omap_remove(struct platform_device *dev) 1536ab4382d2SGreg Kroah-Hartman { 1537ab4382d2SGreg Kroah-Hartman struct uart_omap_port *up = platform_get_drvdata(dev); 1538ab4382d2SGreg Kroah-Hartman 15397e9c8e7dSFelipe Balbi pm_runtime_put_sync(up->dev); 1540d8ee4ea6SFelipe Balbi pm_runtime_disable(up->dev); 1541ab4382d2SGreg Kroah-Hartman uart_remove_one_port(&serial_omap_reg, &up->port); 15422fd14964SGovindraj.R pm_qos_remove_request(&up->pm_qos_request); 1543fcdca757SGovindraj.R 1544ab4382d2SGreg Kroah-Hartman return 0; 1545ab4382d2SGreg Kroah-Hartman } 1546ab4382d2SGreg Kroah-Hartman 154794734749SGovindraj.R /* 154894734749SGovindraj.R * Work Around for Errata i202 (2430, 3430, 3630, 4430 and 4460) 154994734749SGovindraj.R * The access to uart register after MDR1 Access 155094734749SGovindraj.R * causes UART to corrupt data. 155194734749SGovindraj.R * 155294734749SGovindraj.R * Need a delay = 155394734749SGovindraj.R * 5 L4 clock cycles + 5 UART functional clock cycle (@48MHz = ~0.2uS) 155494734749SGovindraj.R * give 10 times as much 155594734749SGovindraj.R */ 155694734749SGovindraj.R static void serial_omap_mdr1_errataset(struct uart_omap_port *up, u8 mdr1) 155794734749SGovindraj.R { 155894734749SGovindraj.R u8 timeout = 255; 155994734749SGovindraj.R 156094734749SGovindraj.R serial_out(up, UART_OMAP_MDR1, mdr1); 156194734749SGovindraj.R udelay(2); 156294734749SGovindraj.R serial_out(up, UART_FCR, up->fcr | UART_FCR_CLEAR_XMIT | 156394734749SGovindraj.R UART_FCR_CLEAR_RCVR); 156494734749SGovindraj.R /* 156594734749SGovindraj.R * Wait for FIFO to empty: when empty, RX_FIFO_E bit is 0 and 156694734749SGovindraj.R * TX_FIFO_E bit is 1. 156794734749SGovindraj.R */ 156894734749SGovindraj.R while (UART_LSR_THRE != (serial_in(up, UART_LSR) & 156994734749SGovindraj.R (UART_LSR_THRE | UART_LSR_DR))) { 157094734749SGovindraj.R timeout--; 157194734749SGovindraj.R if (!timeout) { 157294734749SGovindraj.R /* Should *never* happen. we warn and carry on */ 1573d8ee4ea6SFelipe Balbi dev_crit(up->dev, "Errata i202: timedout %x\n", 157494734749SGovindraj.R serial_in(up, UART_LSR)); 157594734749SGovindraj.R break; 157694734749SGovindraj.R } 157794734749SGovindraj.R udelay(1); 157894734749SGovindraj.R } 157994734749SGovindraj.R } 158094734749SGovindraj.R 1581b5148856SShubhrajyoti D #ifdef CONFIG_PM_RUNTIME 15829f9ac1e8SGovindraj.R static void serial_omap_restore_context(struct uart_omap_port *up) 15839f9ac1e8SGovindraj.R { 158494734749SGovindraj.R if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) 158594734749SGovindraj.R serial_omap_mdr1_errataset(up, UART_OMAP_MDR1_DISABLE); 158694734749SGovindraj.R else 15879f9ac1e8SGovindraj.R serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE); 158894734749SGovindraj.R 15899f9ac1e8SGovindraj.R serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */ 15909f9ac1e8SGovindraj.R serial_out(up, UART_EFR, UART_EFR_ECB); 15919f9ac1e8SGovindraj.R serial_out(up, UART_LCR, 0x0); /* Operational mode */ 15929f9ac1e8SGovindraj.R serial_out(up, UART_IER, 0x0); 15939f9ac1e8SGovindraj.R serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */ 1594c538d20cSGovindraj.R serial_out(up, UART_DLL, up->dll); 1595c538d20cSGovindraj.R serial_out(up, UART_DLM, up->dlh); 15969f9ac1e8SGovindraj.R serial_out(up, UART_LCR, 0x0); /* Operational mode */ 15979f9ac1e8SGovindraj.R serial_out(up, UART_IER, up->ier); 15989f9ac1e8SGovindraj.R serial_out(up, UART_FCR, up->fcr); 15999f9ac1e8SGovindraj.R serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 16009f9ac1e8SGovindraj.R serial_out(up, UART_MCR, up->mcr); 16019f9ac1e8SGovindraj.R serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */ 1602c538d20cSGovindraj.R serial_out(up, UART_OMAP_SCR, up->scr); 16039f9ac1e8SGovindraj.R serial_out(up, UART_EFR, up->efr); 16049f9ac1e8SGovindraj.R serial_out(up, UART_LCR, up->lcr); 160594734749SGovindraj.R if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) 160694734749SGovindraj.R serial_omap_mdr1_errataset(up, up->mdr1); 160794734749SGovindraj.R else 1608c538d20cSGovindraj.R serial_out(up, UART_OMAP_MDR1, up->mdr1); 16099f9ac1e8SGovindraj.R } 16109f9ac1e8SGovindraj.R 1611fcdca757SGovindraj.R static int serial_omap_runtime_suspend(struct device *dev) 1612fcdca757SGovindraj.R { 1613ec3bebc6SGovindraj.R struct uart_omap_port *up = dev_get_drvdata(dev); 1614ec3bebc6SGovindraj.R struct omap_uart_port_info *pdata = dev->platform_data; 1615ec3bebc6SGovindraj.R 16167f25301dSWei Yongjun if (!up) 16177f25301dSWei Yongjun return -EINVAL; 16187f25301dSWei Yongjun 1619ddd85e22SSourav Poddar /* 1620ddd85e22SSourav Poddar * When using 'no_console_suspend', the console UART must not be 1621ddd85e22SSourav Poddar * suspended. Since driver suspend is managed by runtime suspend, 1622ddd85e22SSourav Poddar * preventing runtime suspend (by returning error) will keep device 1623ddd85e22SSourav Poddar * active during suspend. 1624ddd85e22SSourav Poddar */ 1625ddd85e22SSourav Poddar if (up->is_suspending && !console_suspend_enabled && 1626ddd85e22SSourav Poddar uart_console(&up->port)) 1627ddd85e22SSourav Poddar return -EBUSY; 1628ddd85e22SSourav Poddar 1629e5b57c03SFelipe Balbi if (!pdata) 163062f3ec5fSGovindraj.R return 0; 163162f3ec5fSGovindraj.R 1632e5b57c03SFelipe Balbi up->context_loss_cnt = serial_omap_get_context_loss_count(up); 1633ec3bebc6SGovindraj.R 163462f3ec5fSGovindraj.R if (device_may_wakeup(dev)) { 163562f3ec5fSGovindraj.R if (!up->wakeups_enabled) { 1636e5b57c03SFelipe Balbi serial_omap_enable_wakeup(up, true); 163762f3ec5fSGovindraj.R up->wakeups_enabled = true; 163862f3ec5fSGovindraj.R } 163962f3ec5fSGovindraj.R } else { 164062f3ec5fSGovindraj.R if (up->wakeups_enabled) { 1641e5b57c03SFelipe Balbi serial_omap_enable_wakeup(up, false); 164262f3ec5fSGovindraj.R up->wakeups_enabled = false; 164362f3ec5fSGovindraj.R } 164462f3ec5fSGovindraj.R } 164562f3ec5fSGovindraj.R 16462fd14964SGovindraj.R up->latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE; 16472fd14964SGovindraj.R schedule_work(&up->qos_work); 16482fd14964SGovindraj.R 1649fcdca757SGovindraj.R return 0; 1650fcdca757SGovindraj.R } 1651fcdca757SGovindraj.R 1652fcdca757SGovindraj.R static int serial_omap_runtime_resume(struct device *dev) 1653fcdca757SGovindraj.R { 16549f9ac1e8SGovindraj.R struct uart_omap_port *up = dev_get_drvdata(dev); 16559f9ac1e8SGovindraj.R 165639aee51dSShubhrajyoti D int loss_cnt = serial_omap_get_context_loss_count(up); 1657ec3bebc6SGovindraj.R 165839aee51dSShubhrajyoti D if (loss_cnt < 0) { 165939aee51dSShubhrajyoti D dev_err(dev, "serial_omap_get_context_loss_count failed : %d\n", 166039aee51dSShubhrajyoti D loss_cnt); 16619f9ac1e8SGovindraj.R serial_omap_restore_context(up); 166239aee51dSShubhrajyoti D } else if (up->context_loss_cnt != loss_cnt) { 166339aee51dSShubhrajyoti D serial_omap_restore_context(up); 166439aee51dSShubhrajyoti D } 16652fd14964SGovindraj.R up->latency = up->calc_latency; 16662fd14964SGovindraj.R schedule_work(&up->qos_work); 16679f9ac1e8SGovindraj.R 1668fcdca757SGovindraj.R return 0; 1669fcdca757SGovindraj.R } 1670fcdca757SGovindraj.R #endif 1671fcdca757SGovindraj.R 1672fcdca757SGovindraj.R static const struct dev_pm_ops serial_omap_dev_pm_ops = { 1673fcdca757SGovindraj.R SET_SYSTEM_SLEEP_PM_OPS(serial_omap_suspend, serial_omap_resume) 1674fcdca757SGovindraj.R SET_RUNTIME_PM_OPS(serial_omap_runtime_suspend, 1675fcdca757SGovindraj.R serial_omap_runtime_resume, NULL) 1676ddd85e22SSourav Poddar .prepare = serial_omap_prepare, 1677ddd85e22SSourav Poddar .complete = serial_omap_complete, 1678fcdca757SGovindraj.R }; 1679fcdca757SGovindraj.R 1680d92b0dfcSRajendra Nayak #if defined(CONFIG_OF) 1681d92b0dfcSRajendra Nayak static const struct of_device_id omap_serial_of_match[] = { 1682d92b0dfcSRajendra Nayak { .compatible = "ti,omap2-uart" }, 1683d92b0dfcSRajendra Nayak { .compatible = "ti,omap3-uart" }, 1684d92b0dfcSRajendra Nayak { .compatible = "ti,omap4-uart" }, 1685d92b0dfcSRajendra Nayak {}, 1686d92b0dfcSRajendra Nayak }; 1687d92b0dfcSRajendra Nayak MODULE_DEVICE_TABLE(of, omap_serial_of_match); 1688d92b0dfcSRajendra Nayak #endif 1689d92b0dfcSRajendra Nayak 1690ab4382d2SGreg Kroah-Hartman static struct platform_driver serial_omap_driver = { 1691ab4382d2SGreg Kroah-Hartman .probe = serial_omap_probe, 16922d47b716SBill Pemberton .remove = serial_omap_remove, 1693ab4382d2SGreg Kroah-Hartman .driver = { 1694ab4382d2SGreg Kroah-Hartman .name = DRIVER_NAME, 1695fcdca757SGovindraj.R .pm = &serial_omap_dev_pm_ops, 1696d92b0dfcSRajendra Nayak .of_match_table = of_match_ptr(omap_serial_of_match), 1697ab4382d2SGreg Kroah-Hartman }, 1698ab4382d2SGreg Kroah-Hartman }; 1699ab4382d2SGreg Kroah-Hartman 1700ab4382d2SGreg Kroah-Hartman static int __init serial_omap_init(void) 1701ab4382d2SGreg Kroah-Hartman { 1702ab4382d2SGreg Kroah-Hartman int ret; 1703ab4382d2SGreg Kroah-Hartman 1704ab4382d2SGreg Kroah-Hartman ret = uart_register_driver(&serial_omap_reg); 1705ab4382d2SGreg Kroah-Hartman if (ret != 0) 1706ab4382d2SGreg Kroah-Hartman return ret; 1707ab4382d2SGreg Kroah-Hartman ret = platform_driver_register(&serial_omap_driver); 1708ab4382d2SGreg Kroah-Hartman if (ret != 0) 1709ab4382d2SGreg Kroah-Hartman uart_unregister_driver(&serial_omap_reg); 1710ab4382d2SGreg Kroah-Hartman return ret; 1711ab4382d2SGreg Kroah-Hartman } 1712ab4382d2SGreg Kroah-Hartman 1713ab4382d2SGreg Kroah-Hartman static void __exit serial_omap_exit(void) 1714ab4382d2SGreg Kroah-Hartman { 1715ab4382d2SGreg Kroah-Hartman platform_driver_unregister(&serial_omap_driver); 1716ab4382d2SGreg Kroah-Hartman uart_unregister_driver(&serial_omap_reg); 1717ab4382d2SGreg Kroah-Hartman } 1718ab4382d2SGreg Kroah-Hartman 1719ab4382d2SGreg Kroah-Hartman module_init(serial_omap_init); 1720ab4382d2SGreg Kroah-Hartman module_exit(serial_omap_exit); 1721ab4382d2SGreg Kroah-Hartman 1722ab4382d2SGreg Kroah-Hartman MODULE_DESCRIPTION("OMAP High Speed UART driver"); 1723ab4382d2SGreg Kroah-Hartman MODULE_LICENSE("GPL"); 1724ab4382d2SGreg Kroah-Hartman MODULE_AUTHOR("Texas Instruments Inc"); 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