1ab4382d2SGreg Kroah-Hartman /* 2ab4382d2SGreg Kroah-Hartman * Driver for OMAP-UART controller. 3ab4382d2SGreg Kroah-Hartman * Based on drivers/serial/8250.c 4ab4382d2SGreg Kroah-Hartman * 5ab4382d2SGreg Kroah-Hartman * Copyright (C) 2010 Texas Instruments. 6ab4382d2SGreg Kroah-Hartman * 7ab4382d2SGreg Kroah-Hartman * Authors: 8ab4382d2SGreg Kroah-Hartman * Govindraj R <govindraj.raja@ti.com> 9ab4382d2SGreg Kroah-Hartman * Thara Gopinath <thara@ti.com> 10ab4382d2SGreg Kroah-Hartman * 11ab4382d2SGreg Kroah-Hartman * This program is free software; you can redistribute it and/or modify 12ab4382d2SGreg Kroah-Hartman * it under the terms of the GNU General Public License as published by 13ab4382d2SGreg Kroah-Hartman * the Free Software Foundation; either version 2 of the License, or 14ab4382d2SGreg Kroah-Hartman * (at your option) any later version. 15ab4382d2SGreg Kroah-Hartman * 1625985edcSLucas De Marchi * Note: This driver is made separate from 8250 driver as we cannot 17ab4382d2SGreg Kroah-Hartman * over load 8250 driver with omap platform specific configuration for 18ab4382d2SGreg Kroah-Hartman * features like DMA, it makes easier to implement features like DMA and 19ab4382d2SGreg Kroah-Hartman * hardware flow control and software flow control configuration with 20ab4382d2SGreg Kroah-Hartman * this driver as required for the omap-platform. 21ab4382d2SGreg Kroah-Hartman */ 22ab4382d2SGreg Kroah-Hartman 23364a6eceSThomas Weber #if defined(CONFIG_SERIAL_OMAP_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) 24364a6eceSThomas Weber #define SUPPORT_SYSRQ 25364a6eceSThomas Weber #endif 26364a6eceSThomas Weber 27ab4382d2SGreg Kroah-Hartman #include <linux/module.h> 28ab4382d2SGreg Kroah-Hartman #include <linux/init.h> 29ab4382d2SGreg Kroah-Hartman #include <linux/console.h> 30ab4382d2SGreg Kroah-Hartman #include <linux/serial_reg.h> 31ab4382d2SGreg Kroah-Hartman #include <linux/delay.h> 32ab4382d2SGreg Kroah-Hartman #include <linux/slab.h> 33ab4382d2SGreg Kroah-Hartman #include <linux/tty.h> 34ab4382d2SGreg Kroah-Hartman #include <linux/tty_flip.h> 35d21e4005SFelipe Balbi #include <linux/platform_device.h> 36ab4382d2SGreg Kroah-Hartman #include <linux/io.h> 37ab4382d2SGreg Kroah-Hartman #include <linux/clk.h> 38ab4382d2SGreg Kroah-Hartman #include <linux/serial_core.h> 39ab4382d2SGreg Kroah-Hartman #include <linux/irq.h> 40fcdca757SGovindraj.R #include <linux/pm_runtime.h> 41ee83bd3bSTony Lindgren #include <linux/pm_wakeirq.h> 42d92b0dfcSRajendra Nayak #include <linux/of.h> 432a0b965cSTony Lindgren #include <linux/of_irq.h> 449574f36fSNeilBrown #include <linux/gpio.h> 454a0ac0f5SMark Jackson #include <linux/of_gpio.h> 46d9ba5737STony Lindgren #include <linux/platform_data/serial-omap.h> 47ab4382d2SGreg Kroah-Hartman 484a0ac0f5SMark Jackson #include <dt-bindings/gpio/gpio.h> 494a0ac0f5SMark Jackson 507af0ea5dSNishanth Menon #define OMAP_MAX_HSUART_PORTS 10 51f91b55abSRussell King 527c77c8deSGovindraj.R #define UART_BUILD_REVISION(x, y) (((x) << 8) | (y)) 537c77c8deSGovindraj.R 547c77c8deSGovindraj.R #define OMAP_UART_REV_42 0x0402 557c77c8deSGovindraj.R #define OMAP_UART_REV_46 0x0406 567c77c8deSGovindraj.R #define OMAP_UART_REV_52 0x0502 577c77c8deSGovindraj.R #define OMAP_UART_REV_63 0x0603 587c77c8deSGovindraj.R 59f64ffda6SGovindraj.R #define OMAP_UART_TX_WAKEUP_EN BIT(7) 60f64ffda6SGovindraj.R 61f64ffda6SGovindraj.R /* Feature flags */ 62f64ffda6SGovindraj.R #define OMAP_UART_WER_HAS_TX_WAKEUP BIT(0) 63f64ffda6SGovindraj.R 64f91b55abSRussell King #define UART_ERRATA_i202_MDR1_ACCESS BIT(0) 65f91b55abSRussell King #define UART_ERRATA_i291_DMA_FORCEIDLE BIT(1) 66f91b55abSRussell King 678fe789dcSRajendra Nayak #define DEFAULT_CLK_SPEED 48000000 /* 48Mhz */ 688fe789dcSRajendra Nayak 690ba5f668SPaul Walmsley /* SCR register bitmasks */ 700ba5f668SPaul Walmsley #define OMAP_UART_SCR_RX_TRIG_GRANU1_MASK (1 << 7) 711776fd05SAlexey Pelykh #define OMAP_UART_SCR_TX_TRIG_GRANU1_MASK (1 << 6) 72f91b55abSRussell King #define OMAP_UART_SCR_TX_EMPTY (1 << 3) 730ba5f668SPaul Walmsley 740ba5f668SPaul Walmsley /* FCR register bitmasks */ 750ba5f668SPaul Walmsley #define OMAP_UART_FCR_RX_FIFO_TRIG_MASK (0x3 << 6) 766721ab7fSFelipe Balbi #define OMAP_UART_FCR_TX_FIFO_TRIG_MASK (0x3 << 4) 770ba5f668SPaul Walmsley 787c77c8deSGovindraj.R /* MVR register bitmasks */ 797c77c8deSGovindraj.R #define OMAP_UART_MVR_SCHEME_SHIFT 30 807c77c8deSGovindraj.R 817c77c8deSGovindraj.R #define OMAP_UART_LEGACY_MVR_MAJ_MASK 0xf0 827c77c8deSGovindraj.R #define OMAP_UART_LEGACY_MVR_MAJ_SHIFT 4 837c77c8deSGovindraj.R #define OMAP_UART_LEGACY_MVR_MIN_MASK 0x0f 847c77c8deSGovindraj.R 857c77c8deSGovindraj.R #define OMAP_UART_MVR_MAJ_MASK 0x700 867c77c8deSGovindraj.R #define OMAP_UART_MVR_MAJ_SHIFT 8 877c77c8deSGovindraj.R #define OMAP_UART_MVR_MIN_MASK 0x3f 887c77c8deSGovindraj.R 89f91b55abSRussell King #define OMAP_UART_DMA_CH_FREE -1 90f91b55abSRussell King 91f91b55abSRussell King #define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA 92f91b55abSRussell King #define OMAP_MODE13X_SPEED 230400 93f91b55abSRussell King 94f91b55abSRussell King /* WER = 0x7F 95f91b55abSRussell King * Enable module level wakeup in WER reg 96f91b55abSRussell King */ 97fbf7ebe4SPavel Machek #define OMAP_UART_WER_MOD_WKUP 0x7F 98f91b55abSRussell King 99f91b55abSRussell King /* Enable XON/XOFF flow control on output */ 1003af08bd7SRussell King #define OMAP_UART_SW_TX 0x08 101f91b55abSRussell King 102f91b55abSRussell King /* Enable XON/XOFF flow control on input */ 1033af08bd7SRussell King #define OMAP_UART_SW_RX 0x02 104f91b55abSRussell King 105f91b55abSRussell King #define OMAP_UART_SW_CLR 0xF0 106f91b55abSRussell King 107f91b55abSRussell King #define OMAP_UART_TCR_TRIG 0x0F 108f91b55abSRussell King 109f91b55abSRussell King struct uart_omap_dma { 110f91b55abSRussell King u8 uart_dma_tx; 111f91b55abSRussell King u8 uart_dma_rx; 112f91b55abSRussell King int rx_dma_channel; 113f91b55abSRussell King int tx_dma_channel; 114f91b55abSRussell King dma_addr_t rx_buf_dma_phys; 115f91b55abSRussell King dma_addr_t tx_buf_dma_phys; 116f91b55abSRussell King unsigned int uart_base; 117f91b55abSRussell King /* 118f91b55abSRussell King * Buffer for rx dma. It is not required for tx because the buffer 119f91b55abSRussell King * comes from port structure. 120f91b55abSRussell King */ 121f91b55abSRussell King unsigned char *rx_buf; 122f91b55abSRussell King unsigned int prev_rx_dma_pos; 123f91b55abSRussell King int tx_buf_size; 124f91b55abSRussell King int tx_dma_used; 125f91b55abSRussell King int rx_dma_used; 126f91b55abSRussell King spinlock_t tx_lock; 127f91b55abSRussell King spinlock_t rx_lock; 128f91b55abSRussell King /* timer to poll activity on rx dma */ 129f91b55abSRussell King struct timer_list rx_timer; 130f91b55abSRussell King unsigned int rx_buf_size; 131f91b55abSRussell King unsigned int rx_poll_rate; 132f91b55abSRussell King unsigned int rx_timeout; 133f91b55abSRussell King }; 134f91b55abSRussell King 135d37c6cebSFelipe Balbi struct uart_omap_port { 136d37c6cebSFelipe Balbi struct uart_port port; 137d37c6cebSFelipe Balbi struct uart_omap_dma uart_dma; 138d37c6cebSFelipe Balbi struct device *dev; 1392a0b965cSTony Lindgren int wakeirq; 140d37c6cebSFelipe Balbi 141d37c6cebSFelipe Balbi unsigned char ier; 142d37c6cebSFelipe Balbi unsigned char lcr; 143d37c6cebSFelipe Balbi unsigned char mcr; 144d37c6cebSFelipe Balbi unsigned char fcr; 145d37c6cebSFelipe Balbi unsigned char efr; 146d37c6cebSFelipe Balbi unsigned char dll; 147d37c6cebSFelipe Balbi unsigned char dlh; 148d37c6cebSFelipe Balbi unsigned char mdr1; 149d37c6cebSFelipe Balbi unsigned char scr; 150f64ffda6SGovindraj.R unsigned char wer; 151d37c6cebSFelipe Balbi 152d37c6cebSFelipe Balbi int use_dma; 153d37c6cebSFelipe Balbi /* 154d37c6cebSFelipe Balbi * Some bits in registers are cleared on a read, so they must 155fbf7ebe4SPavel Machek * be saved whenever the register is read, but the bits will not 156d37c6cebSFelipe Balbi * be immediately processed. 157d37c6cebSFelipe Balbi */ 158d37c6cebSFelipe Balbi unsigned int lsr_break_flag; 159d37c6cebSFelipe Balbi unsigned char msr_saved_flags; 160d37c6cebSFelipe Balbi char name[20]; 161d37c6cebSFelipe Balbi unsigned long port_activity; 16239aee51dSShubhrajyoti D int context_loss_cnt; 163d37c6cebSFelipe Balbi u32 errata; 164f64ffda6SGovindraj.R u32 features; 165d37c6cebSFelipe Balbi 1664a0ac0f5SMark Jackson int rts_gpio; 1674a0ac0f5SMark Jackson 168d37c6cebSFelipe Balbi struct pm_qos_request pm_qos_request; 169d37c6cebSFelipe Balbi u32 latency; 170d37c6cebSFelipe Balbi u32 calc_latency; 171d37c6cebSFelipe Balbi struct work_struct qos_work; 172ddd85e22SSourav Poddar bool is_suspending; 173d37c6cebSFelipe Balbi }; 174d37c6cebSFelipe Balbi 175d37c6cebSFelipe Balbi #define to_uart_omap_port(p) ((container_of((p), struct uart_omap_port, port))) 176d37c6cebSFelipe Balbi 177ab4382d2SGreg Kroah-Hartman static struct uart_omap_port *ui[OMAP_MAX_HSUART_PORTS]; 178ab4382d2SGreg Kroah-Hartman 179ab4382d2SGreg Kroah-Hartman /* Forward declaration of functions */ 18094734749SGovindraj.R static void serial_omap_mdr1_errataset(struct uart_omap_port *up, u8 mdr1); 181ab4382d2SGreg Kroah-Hartman 182ab4382d2SGreg Kroah-Hartman static inline unsigned int serial_in(struct uart_omap_port *up, int offset) 183ab4382d2SGreg Kroah-Hartman { 184ab4382d2SGreg Kroah-Hartman offset <<= up->port.regshift; 185ab4382d2SGreg Kroah-Hartman return readw(up->port.membase + offset); 186ab4382d2SGreg Kroah-Hartman } 187ab4382d2SGreg Kroah-Hartman 188ab4382d2SGreg Kroah-Hartman static inline void serial_out(struct uart_omap_port *up, int offset, int value) 189ab4382d2SGreg Kroah-Hartman { 190ab4382d2SGreg Kroah-Hartman offset <<= up->port.regshift; 191ab4382d2SGreg Kroah-Hartman writew(value, up->port.membase + offset); 192ab4382d2SGreg Kroah-Hartman } 193ab4382d2SGreg Kroah-Hartman 194ab4382d2SGreg Kroah-Hartman static inline void serial_omap_clear_fifos(struct uart_omap_port *up) 195ab4382d2SGreg Kroah-Hartman { 196ab4382d2SGreg Kroah-Hartman serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO); 197ab4382d2SGreg Kroah-Hartman serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | 198ab4382d2SGreg Kroah-Hartman UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); 199ab4382d2SGreg Kroah-Hartman serial_out(up, UART_FCR, 0); 200ab4382d2SGreg Kroah-Hartman } 201ab4382d2SGreg Kroah-Hartman 202adfb9233SEzequiel Garcia #ifdef CONFIG_PM 203e5b57c03SFelipe Balbi static int serial_omap_get_context_loss_count(struct uart_omap_port *up) 204e5b57c03SFelipe Balbi { 205574de559SJingoo Han struct omap_uart_port_info *pdata = dev_get_platdata(up->dev); 206e5b57c03SFelipe Balbi 207ce2f08deSFelipe Balbi if (!pdata || !pdata->get_context_loss_count) 208a630fbfbSTony Lindgren return -EINVAL; 209e5b57c03SFelipe Balbi 210d8ee4ea6SFelipe Balbi return pdata->get_context_loss_count(up->dev); 211e5b57c03SFelipe Balbi } 212e5b57c03SFelipe Balbi 213ee83bd3bSTony Lindgren /* REVISIT: Remove this when omap3 boots in device tree only mode */ 214e5b57c03SFelipe Balbi static void serial_omap_enable_wakeup(struct uart_omap_port *up, bool enable) 215e5b57c03SFelipe Balbi { 216574de559SJingoo Han struct omap_uart_port_info *pdata = dev_get_platdata(up->dev); 217e5b57c03SFelipe Balbi 218ce2f08deSFelipe Balbi if (!pdata || !pdata->enable_wakeup) 219ce2f08deSFelipe Balbi return; 220ce2f08deSFelipe Balbi 221d8ee4ea6SFelipe Balbi pdata->enable_wakeup(up->dev, enable); 222e5b57c03SFelipe Balbi } 223adfb9233SEzequiel Garcia #endif /* CONFIG_PM */ 224e5b57c03SFelipe Balbi 225ab4382d2SGreg Kroah-Hartman /* 22613d6ceb4SFrans Klaver * Calculate the absolute difference between the desired and actual baud 22713d6ceb4SFrans Klaver * rate for the given mode. 22813d6ceb4SFrans Klaver */ 22913d6ceb4SFrans Klaver static inline int calculate_baud_abs_diff(struct uart_port *port, 23013d6ceb4SFrans Klaver unsigned int baud, unsigned int mode) 23113d6ceb4SFrans Klaver { 23213d6ceb4SFrans Klaver unsigned int n = port->uartclk / (mode * baud); 23313d6ceb4SFrans Klaver int abs_diff; 23413d6ceb4SFrans Klaver 23513d6ceb4SFrans Klaver if (n == 0) 23613d6ceb4SFrans Klaver n = 1; 23713d6ceb4SFrans Klaver 23813d6ceb4SFrans Klaver abs_diff = baud - (port->uartclk / (mode * n)); 23913d6ceb4SFrans Klaver if (abs_diff < 0) 24013d6ceb4SFrans Klaver abs_diff = -abs_diff; 24113d6ceb4SFrans Klaver 24213d6ceb4SFrans Klaver return abs_diff; 24313d6ceb4SFrans Klaver } 24413d6ceb4SFrans Klaver 24513d6ceb4SFrans Klaver /* 2465fe21236SAlexey Pelykh * serial_omap_baud_is_mode16 - check if baud rate is MODE16X 2475fe21236SAlexey Pelykh * @port: uart port info 2485fe21236SAlexey Pelykh * @baud: baudrate for which mode needs to be determined 2495fe21236SAlexey Pelykh * 2505fe21236SAlexey Pelykh * Returns true if baud rate is MODE16X and false if MODE13X 2515fe21236SAlexey Pelykh * Original table in OMAP TRM named "UART Mode Baud Rates, Divisor Values, 2525fe21236SAlexey Pelykh * and Error Rates" determines modes not for all common baud rates. 2535fe21236SAlexey Pelykh * E.g. for 1000000 baud rate mode must be 16x, but according to that 2545fe21236SAlexey Pelykh * table it's determined as 13x. 2555fe21236SAlexey Pelykh */ 2565fe21236SAlexey Pelykh static bool 2575fe21236SAlexey Pelykh serial_omap_baud_is_mode16(struct uart_port *port, unsigned int baud) 2585fe21236SAlexey Pelykh { 25913d6ceb4SFrans Klaver int abs_diff_13 = calculate_baud_abs_diff(port, baud, 13); 26013d6ceb4SFrans Klaver int abs_diff_16 = calculate_baud_abs_diff(port, baud, 16); 261dc318756SFrans Klaver 26213d6ceb4SFrans Klaver return (abs_diff_13 >= abs_diff_16); 2635fe21236SAlexey Pelykh } 2645fe21236SAlexey Pelykh 2655fe21236SAlexey Pelykh /* 266ab4382d2SGreg Kroah-Hartman * serial_omap_get_divisor - calculate divisor value 267ab4382d2SGreg Kroah-Hartman * @port: uart port info 268ab4382d2SGreg Kroah-Hartman * @baud: baudrate for which divisor needs to be calculated. 269ab4382d2SGreg Kroah-Hartman */ 270ab4382d2SGreg Kroah-Hartman static unsigned int 271ab4382d2SGreg Kroah-Hartman serial_omap_get_divisor(struct uart_port *port, unsigned int baud) 272ab4382d2SGreg Kroah-Hartman { 2734250b5d9SAlexey Pelykh unsigned int mode; 274ab4382d2SGreg Kroah-Hartman 2755fe21236SAlexey Pelykh if (!serial_omap_baud_is_mode16(port, baud)) 2764250b5d9SAlexey Pelykh mode = 13; 277ab4382d2SGreg Kroah-Hartman else 2784250b5d9SAlexey Pelykh mode = 16; 2794250b5d9SAlexey Pelykh return port->uartclk/(mode * baud); 280ab4382d2SGreg Kroah-Hartman } 281ab4382d2SGreg Kroah-Hartman 282ab4382d2SGreg Kroah-Hartman static void serial_omap_enable_ms(struct uart_port *port) 283ab4382d2SGreg Kroah-Hartman { 284c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 285ab4382d2SGreg Kroah-Hartman 286ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_enable_ms+%d\n", up->port.line); 287fcdca757SGovindraj.R 288d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 289ab4382d2SGreg Kroah-Hartman up->ier |= UART_IER_MSI; 290ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 291660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 292660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 293ab4382d2SGreg Kroah-Hartman } 294ab4382d2SGreg Kroah-Hartman 295ab4382d2SGreg Kroah-Hartman static void serial_omap_stop_tx(struct uart_port *port) 296ab4382d2SGreg Kroah-Hartman { 297c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 2984a0ac0f5SMark Jackson int res; 299ab4382d2SGreg Kroah-Hartman 300d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 3014a0ac0f5SMark Jackson 302018e7448SPhilippe Proulx /* Handle RS-485 */ 303dadd7ecbSRicardo Ribalda Delgado if (port->rs485.flags & SER_RS485_ENABLED) { 304018e7448SPhilippe Proulx if (up->scr & OMAP_UART_SCR_TX_EMPTY) { 305018e7448SPhilippe Proulx /* THR interrupt is fired when both TX FIFO and TX 306018e7448SPhilippe Proulx * shift register are empty. This means there's nothing 307018e7448SPhilippe Proulx * left to transmit now, so make sure the THR interrupt 308018e7448SPhilippe Proulx * is fired when TX FIFO is below the trigger level, 309018e7448SPhilippe Proulx * disable THR interrupts and toggle the RS-485 GPIO 310018e7448SPhilippe Proulx * data direction pin if needed. 311018e7448SPhilippe Proulx */ 312018e7448SPhilippe Proulx up->scr &= ~OMAP_UART_SCR_TX_EMPTY; 313018e7448SPhilippe Proulx serial_out(up, UART_OMAP_SCR, up->scr); 314dadd7ecbSRicardo Ribalda Delgado res = (port->rs485.flags & SER_RS485_RTS_AFTER_SEND) ? 315dadd7ecbSRicardo Ribalda Delgado 1 : 0; 3164a0ac0f5SMark Jackson if (gpio_get_value(up->rts_gpio) != res) { 317dadd7ecbSRicardo Ribalda Delgado if (port->rs485.delay_rts_after_send > 0) 318dadd7ecbSRicardo Ribalda Delgado mdelay( 319dadd7ecbSRicardo Ribalda Delgado port->rs485.delay_rts_after_send); 3204a0ac0f5SMark Jackson gpio_set_value(up->rts_gpio, res); 3214a0ac0f5SMark Jackson } 322018e7448SPhilippe Proulx } else { 323018e7448SPhilippe Proulx /* We're asked to stop, but there's still stuff in the 324018e7448SPhilippe Proulx * UART FIFO, so make sure the THR interrupt is fired 325018e7448SPhilippe Proulx * when both TX FIFO and TX shift register are empty. 326018e7448SPhilippe Proulx * The next THR interrupt (if no transmission is started 327018e7448SPhilippe Proulx * in the meantime) will indicate the end of a 328018e7448SPhilippe Proulx * transmission. Therefore we _don't_ disable THR 329018e7448SPhilippe Proulx * interrupts in this situation. 330018e7448SPhilippe Proulx */ 331018e7448SPhilippe Proulx up->scr |= OMAP_UART_SCR_TX_EMPTY; 332018e7448SPhilippe Proulx serial_out(up, UART_OMAP_SCR, up->scr); 333018e7448SPhilippe Proulx return; 3344a0ac0f5SMark Jackson } 3354a0ac0f5SMark Jackson } 3364a0ac0f5SMark Jackson 337ab4382d2SGreg Kroah-Hartman if (up->ier & UART_IER_THRI) { 338ab4382d2SGreg Kroah-Hartman up->ier &= ~UART_IER_THRI; 339ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 340ab4382d2SGreg Kroah-Hartman } 341fcdca757SGovindraj.R 342dadd7ecbSRicardo Ribalda Delgado if ((port->rs485.flags & SER_RS485_ENABLED) && 343dadd7ecbSRicardo Ribalda Delgado !(port->rs485.flags & SER_RS485_RX_DURING_TX)) { 3443a13884aSDimitris Lampridis /* 3453a13884aSDimitris Lampridis * Empty the RX FIFO, we are not interested in anything 3463a13884aSDimitris Lampridis * received during the half-duplex transmission. 3473a13884aSDimitris Lampridis */ 3483a13884aSDimitris Lampridis serial_out(up, UART_FCR, up->fcr | UART_FCR_CLEAR_RCVR); 3493a13884aSDimitris Lampridis /* Re-enable RX interrupts */ 350cab53dc9SDimitris Lampridis up->ier |= UART_IER_RLSI | UART_IER_RDI; 351cab53dc9SDimitris Lampridis up->port.read_status_mask |= UART_LSR_DR; 3524a0ac0f5SMark Jackson serial_out(up, UART_IER, up->ier); 3534a0ac0f5SMark Jackson } 3544a0ac0f5SMark Jackson 355d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 356d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 357ab4382d2SGreg Kroah-Hartman } 358ab4382d2SGreg Kroah-Hartman 359ab4382d2SGreg Kroah-Hartman static void serial_omap_stop_rx(struct uart_port *port) 360ab4382d2SGreg Kroah-Hartman { 361c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 362ab4382d2SGreg Kroah-Hartman 363d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 364cab53dc9SDimitris Lampridis up->ier &= ~(UART_IER_RLSI | UART_IER_RDI); 365ab4382d2SGreg Kroah-Hartman up->port.read_status_mask &= ~UART_LSR_DR; 366ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 367d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 368d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 369ab4382d2SGreg Kroah-Hartman } 370ab4382d2SGreg Kroah-Hartman 371bf63a086SFelipe Balbi static void transmit_chars(struct uart_omap_port *up, unsigned int lsr) 372ab4382d2SGreg Kroah-Hartman { 373ab4382d2SGreg Kroah-Hartman struct circ_buf *xmit = &up->port.state->xmit; 374ab4382d2SGreg Kroah-Hartman int count; 375ab4382d2SGreg Kroah-Hartman 376ab4382d2SGreg Kroah-Hartman if (up->port.x_char) { 377ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TX, up->port.x_char); 378ab4382d2SGreg Kroah-Hartman up->port.icount.tx++; 379ab4382d2SGreg Kroah-Hartman up->port.x_char = 0; 380ab4382d2SGreg Kroah-Hartman return; 381ab4382d2SGreg Kroah-Hartman } 382ab4382d2SGreg Kroah-Hartman if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { 383ab4382d2SGreg Kroah-Hartman serial_omap_stop_tx(&up->port); 384ab4382d2SGreg Kroah-Hartman return; 385ab4382d2SGreg Kroah-Hartman } 386355fe568SGreg Kroah-Hartman count = up->port.fifosize / 4; 387ab4382d2SGreg Kroah-Hartman do { 388ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TX, xmit->buf[xmit->tail]); 389ab4382d2SGreg Kroah-Hartman xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 390ab4382d2SGreg Kroah-Hartman up->port.icount.tx++; 391ab4382d2SGreg Kroah-Hartman if (uart_circ_empty(xmit)) 392ab4382d2SGreg Kroah-Hartman break; 393ab4382d2SGreg Kroah-Hartman } while (--count > 0); 394ab4382d2SGreg Kroah-Hartman 3956bf78967SFelipe Balbi if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 396ab4382d2SGreg Kroah-Hartman uart_write_wakeup(&up->port); 397ab4382d2SGreg Kroah-Hartman 398ab4382d2SGreg Kroah-Hartman if (uart_circ_empty(xmit)) 399ab4382d2SGreg Kroah-Hartman serial_omap_stop_tx(&up->port); 400ab4382d2SGreg Kroah-Hartman } 401ab4382d2SGreg Kroah-Hartman 402ab4382d2SGreg Kroah-Hartman static inline void serial_omap_enable_ier_thri(struct uart_omap_port *up) 403ab4382d2SGreg Kroah-Hartman { 404ab4382d2SGreg Kroah-Hartman if (!(up->ier & UART_IER_THRI)) { 405ab4382d2SGreg Kroah-Hartman up->ier |= UART_IER_THRI; 406ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 407ab4382d2SGreg Kroah-Hartman } 408ab4382d2SGreg Kroah-Hartman } 409ab4382d2SGreg Kroah-Hartman 410ab4382d2SGreg Kroah-Hartman static void serial_omap_start_tx(struct uart_port *port) 411ab4382d2SGreg Kroah-Hartman { 412c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 4134a0ac0f5SMark Jackson int res; 414ab4382d2SGreg Kroah-Hartman 415d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 4164a0ac0f5SMark Jackson 417018e7448SPhilippe Proulx /* Handle RS-485 */ 418dadd7ecbSRicardo Ribalda Delgado if (port->rs485.flags & SER_RS485_ENABLED) { 419018e7448SPhilippe Proulx /* Fire THR interrupts when FIFO is below trigger level */ 420018e7448SPhilippe Proulx up->scr &= ~OMAP_UART_SCR_TX_EMPTY; 421018e7448SPhilippe Proulx serial_out(up, UART_OMAP_SCR, up->scr); 422018e7448SPhilippe Proulx 4234a0ac0f5SMark Jackson /* if rts not already enabled */ 424dadd7ecbSRicardo Ribalda Delgado res = (port->rs485.flags & SER_RS485_RTS_ON_SEND) ? 1 : 0; 4254a0ac0f5SMark Jackson if (gpio_get_value(up->rts_gpio) != res) { 4264a0ac0f5SMark Jackson gpio_set_value(up->rts_gpio, res); 427dadd7ecbSRicardo Ribalda Delgado if (port->rs485.delay_rts_before_send > 0) 428dadd7ecbSRicardo Ribalda Delgado mdelay(port->rs485.delay_rts_before_send); 4294a0ac0f5SMark Jackson } 4304a0ac0f5SMark Jackson } 4314a0ac0f5SMark Jackson 432dadd7ecbSRicardo Ribalda Delgado if ((port->rs485.flags & SER_RS485_ENABLED) && 433dadd7ecbSRicardo Ribalda Delgado !(port->rs485.flags & SER_RS485_RX_DURING_TX)) 4344a0ac0f5SMark Jackson serial_omap_stop_rx(port); 4354a0ac0f5SMark Jackson 436ab4382d2SGreg Kroah-Hartman serial_omap_enable_ier_thri(up); 437d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 438d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 439ab4382d2SGreg Kroah-Hartman } 440ab4382d2SGreg Kroah-Hartman 4413af08bd7SRussell King static void serial_omap_throttle(struct uart_port *port) 4423af08bd7SRussell King { 4433af08bd7SRussell King struct uart_omap_port *up = to_uart_omap_port(port); 4443af08bd7SRussell King unsigned long flags; 4453af08bd7SRussell King 4463af08bd7SRussell King pm_runtime_get_sync(up->dev); 4473af08bd7SRussell King spin_lock_irqsave(&up->port.lock, flags); 4483af08bd7SRussell King up->ier &= ~(UART_IER_RLSI | UART_IER_RDI); 4493af08bd7SRussell King serial_out(up, UART_IER, up->ier); 4503af08bd7SRussell King spin_unlock_irqrestore(&up->port.lock, flags); 4513af08bd7SRussell King pm_runtime_mark_last_busy(up->dev); 4523af08bd7SRussell King pm_runtime_put_autosuspend(up->dev); 4533af08bd7SRussell King } 4543af08bd7SRussell King 4553af08bd7SRussell King static void serial_omap_unthrottle(struct uart_port *port) 4563af08bd7SRussell King { 4573af08bd7SRussell King struct uart_omap_port *up = to_uart_omap_port(port); 4583af08bd7SRussell King unsigned long flags; 4593af08bd7SRussell King 4603af08bd7SRussell King pm_runtime_get_sync(up->dev); 4613af08bd7SRussell King spin_lock_irqsave(&up->port.lock, flags); 4623af08bd7SRussell King up->ier |= UART_IER_RLSI | UART_IER_RDI; 4633af08bd7SRussell King serial_out(up, UART_IER, up->ier); 4643af08bd7SRussell King spin_unlock_irqrestore(&up->port.lock, flags); 4653af08bd7SRussell King pm_runtime_mark_last_busy(up->dev); 4663af08bd7SRussell King pm_runtime_put_autosuspend(up->dev); 4673af08bd7SRussell King } 4683af08bd7SRussell King 469ab4382d2SGreg Kroah-Hartman static unsigned int check_modem_status(struct uart_omap_port *up) 470ab4382d2SGreg Kroah-Hartman { 471ab4382d2SGreg Kroah-Hartman unsigned int status; 472ab4382d2SGreg Kroah-Hartman 473ab4382d2SGreg Kroah-Hartman status = serial_in(up, UART_MSR); 474ab4382d2SGreg Kroah-Hartman status |= up->msr_saved_flags; 475ab4382d2SGreg Kroah-Hartman up->msr_saved_flags = 0; 476ab4382d2SGreg Kroah-Hartman if ((status & UART_MSR_ANY_DELTA) == 0) 477ab4382d2SGreg Kroah-Hartman return status; 478ab4382d2SGreg Kroah-Hartman 479ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI && 480ab4382d2SGreg Kroah-Hartman up->port.state != NULL) { 481ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_TERI) 482ab4382d2SGreg Kroah-Hartman up->port.icount.rng++; 483ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DDSR) 484ab4382d2SGreg Kroah-Hartman up->port.icount.dsr++; 485ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DDCD) 486ab4382d2SGreg Kroah-Hartman uart_handle_dcd_change 487ab4382d2SGreg Kroah-Hartman (&up->port, status & UART_MSR_DCD); 488ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DCTS) 489ab4382d2SGreg Kroah-Hartman uart_handle_cts_change 490ab4382d2SGreg Kroah-Hartman (&up->port, status & UART_MSR_CTS); 491ab4382d2SGreg Kroah-Hartman wake_up_interruptible(&up->port.state->port.delta_msr_wait); 492ab4382d2SGreg Kroah-Hartman } 493ab4382d2SGreg Kroah-Hartman 494ab4382d2SGreg Kroah-Hartman return status; 495ab4382d2SGreg Kroah-Hartman } 496ab4382d2SGreg Kroah-Hartman 49772256cbdSFelipe Balbi static void serial_omap_rlsi(struct uart_omap_port *up, unsigned int lsr) 49872256cbdSFelipe Balbi { 49972256cbdSFelipe Balbi unsigned int flag; 5009a12fcf8SShubhrajyoti D unsigned char ch = 0; 5019a12fcf8SShubhrajyoti D 5029a12fcf8SShubhrajyoti D if (likely(lsr & UART_LSR_DR)) 5039a12fcf8SShubhrajyoti D ch = serial_in(up, UART_RX); 50472256cbdSFelipe Balbi 50572256cbdSFelipe Balbi up->port.icount.rx++; 50672256cbdSFelipe Balbi flag = TTY_NORMAL; 50772256cbdSFelipe Balbi 50872256cbdSFelipe Balbi if (lsr & UART_LSR_BI) { 50972256cbdSFelipe Balbi flag = TTY_BREAK; 51072256cbdSFelipe Balbi lsr &= ~(UART_LSR_FE | UART_LSR_PE); 51172256cbdSFelipe Balbi up->port.icount.brk++; 51272256cbdSFelipe Balbi /* 51372256cbdSFelipe Balbi * We do the SysRQ and SAK checking 51472256cbdSFelipe Balbi * here because otherwise the break 51572256cbdSFelipe Balbi * may get masked by ignore_status_mask 51672256cbdSFelipe Balbi * or read_status_mask. 51772256cbdSFelipe Balbi */ 51872256cbdSFelipe Balbi if (uart_handle_break(&up->port)) 51972256cbdSFelipe Balbi return; 52072256cbdSFelipe Balbi 52172256cbdSFelipe Balbi } 52272256cbdSFelipe Balbi 52372256cbdSFelipe Balbi if (lsr & UART_LSR_PE) { 52472256cbdSFelipe Balbi flag = TTY_PARITY; 52572256cbdSFelipe Balbi up->port.icount.parity++; 52672256cbdSFelipe Balbi } 52772256cbdSFelipe Balbi 52872256cbdSFelipe Balbi if (lsr & UART_LSR_FE) { 52972256cbdSFelipe Balbi flag = TTY_FRAME; 53072256cbdSFelipe Balbi up->port.icount.frame++; 53172256cbdSFelipe Balbi } 53272256cbdSFelipe Balbi 53372256cbdSFelipe Balbi if (lsr & UART_LSR_OE) 53472256cbdSFelipe Balbi up->port.icount.overrun++; 53572256cbdSFelipe Balbi 53672256cbdSFelipe Balbi #ifdef CONFIG_SERIAL_OMAP_CONSOLE 53772256cbdSFelipe Balbi if (up->port.line == up->port.cons->index) { 53872256cbdSFelipe Balbi /* Recover the break flag from console xmit */ 53972256cbdSFelipe Balbi lsr |= up->lsr_break_flag; 54072256cbdSFelipe Balbi } 54172256cbdSFelipe Balbi #endif 54272256cbdSFelipe Balbi uart_insert_char(&up->port, lsr, UART_LSR_OE, 0, flag); 54372256cbdSFelipe Balbi } 54472256cbdSFelipe Balbi 54572256cbdSFelipe Balbi static void serial_omap_rdi(struct uart_omap_port *up, unsigned int lsr) 54672256cbdSFelipe Balbi { 54772256cbdSFelipe Balbi unsigned char ch = 0; 54872256cbdSFelipe Balbi unsigned int flag; 54972256cbdSFelipe Balbi 55072256cbdSFelipe Balbi if (!(lsr & UART_LSR_DR)) 55172256cbdSFelipe Balbi return; 55272256cbdSFelipe Balbi 55372256cbdSFelipe Balbi ch = serial_in(up, UART_RX); 55472256cbdSFelipe Balbi flag = TTY_NORMAL; 55572256cbdSFelipe Balbi up->port.icount.rx++; 55672256cbdSFelipe Balbi 55772256cbdSFelipe Balbi if (uart_handle_sysrq_char(&up->port, ch)) 55872256cbdSFelipe Balbi return; 55972256cbdSFelipe Balbi 56072256cbdSFelipe Balbi uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag); 56172256cbdSFelipe Balbi } 56272256cbdSFelipe Balbi 563ab4382d2SGreg Kroah-Hartman /** 564ab4382d2SGreg Kroah-Hartman * serial_omap_irq() - This handles the interrupt from one port 565ab4382d2SGreg Kroah-Hartman * @irq: uart port irq number 566ab4382d2SGreg Kroah-Hartman * @dev_id: uart port info 567ab4382d2SGreg Kroah-Hartman */ 56852c5513dSFelipe Balbi static irqreturn_t serial_omap_irq(int irq, void *dev_id) 569ab4382d2SGreg Kroah-Hartman { 570ab4382d2SGreg Kroah-Hartman struct uart_omap_port *up = dev_id; 571ab4382d2SGreg Kroah-Hartman unsigned int iir, lsr; 57281b75aefSFelipe Balbi unsigned int type; 5737b013e44SGreg Kroah-Hartman irqreturn_t ret = IRQ_NONE; 57472256cbdSFelipe Balbi int max_count = 256; 575ab4382d2SGreg Kroah-Hartman 5766c3a30c7SFelipe Balbi spin_lock(&up->port.lock); 57781b75aefSFelipe Balbi pm_runtime_get_sync(up->dev); 57872256cbdSFelipe Balbi 57972256cbdSFelipe Balbi do { 58081b75aefSFelipe Balbi iir = serial_in(up, UART_IIR); 58181b75aefSFelipe Balbi if (iir & UART_IIR_NO_INT) 58272256cbdSFelipe Balbi break; 58381b75aefSFelipe Balbi 5847b013e44SGreg Kroah-Hartman ret = IRQ_HANDLED; 585ab4382d2SGreg Kroah-Hartman lsr = serial_in(up, UART_LSR); 58681b75aefSFelipe Balbi 58781b75aefSFelipe Balbi /* extract IRQ type from IIR register */ 58881b75aefSFelipe Balbi type = iir & 0x3e; 58981b75aefSFelipe Balbi 59081b75aefSFelipe Balbi switch (type) { 59181b75aefSFelipe Balbi case UART_IIR_MSI: 59281b75aefSFelipe Balbi check_modem_status(up); 59381b75aefSFelipe Balbi break; 59481b75aefSFelipe Balbi case UART_IIR_THRI: 595bf63a086SFelipe Balbi transmit_chars(up, lsr); 59681b75aefSFelipe Balbi break; 59772256cbdSFelipe Balbi case UART_IIR_RX_TIMEOUT: 59872256cbdSFelipe Balbi /* FALLTHROUGH */ 59981b75aefSFelipe Balbi case UART_IIR_RDI: 60072256cbdSFelipe Balbi serial_omap_rdi(up, lsr); 60181b75aefSFelipe Balbi break; 60281b75aefSFelipe Balbi case UART_IIR_RLSI: 60372256cbdSFelipe Balbi serial_omap_rlsi(up, lsr); 60481b75aefSFelipe Balbi break; 60581b75aefSFelipe Balbi case UART_IIR_CTS_RTS_DSR: 60672256cbdSFelipe Balbi /* simply try again */ 60772256cbdSFelipe Balbi break; 60881b75aefSFelipe Balbi case UART_IIR_XOFF: 60981b75aefSFelipe Balbi /* FALLTHROUGH */ 61081b75aefSFelipe Balbi default: 61181b75aefSFelipe Balbi break; 612ab4382d2SGreg Kroah-Hartman } 61372256cbdSFelipe Balbi } while (!(iir & UART_IIR_NO_INT) && max_count--); 614ab4382d2SGreg Kroah-Hartman 6156c3a30c7SFelipe Balbi spin_unlock(&up->port.lock); 61672256cbdSFelipe Balbi 6172e124b4aSJiri Slaby tty_flip_buffer_push(&up->port.state->port); 61872256cbdSFelipe Balbi 619d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 620d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 621ab4382d2SGreg Kroah-Hartman up->port_activity = jiffies; 62281b75aefSFelipe Balbi 6237b013e44SGreg Kroah-Hartman return ret; 624ab4382d2SGreg Kroah-Hartman } 625ab4382d2SGreg Kroah-Hartman 626ab4382d2SGreg Kroah-Hartman static unsigned int serial_omap_tx_empty(struct uart_port *port) 627ab4382d2SGreg Kroah-Hartman { 628c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 629ab4382d2SGreg Kroah-Hartman unsigned long flags = 0; 630ab4382d2SGreg Kroah-Hartman unsigned int ret = 0; 631ab4382d2SGreg Kroah-Hartman 632d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 633ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_tx_empty+%d\n", up->port.line); 634ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags); 635ab4382d2SGreg Kroah-Hartman ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0; 636ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags); 637660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 638660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 639ab4382d2SGreg Kroah-Hartman return ret; 640ab4382d2SGreg Kroah-Hartman } 641ab4382d2SGreg Kroah-Hartman 642ab4382d2SGreg Kroah-Hartman static unsigned int serial_omap_get_mctrl(struct uart_port *port) 643ab4382d2SGreg Kroah-Hartman { 644c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 645514f31d1SShubhrajyoti D unsigned int status; 646ab4382d2SGreg Kroah-Hartman unsigned int ret = 0; 647ab4382d2SGreg Kroah-Hartman 648d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 649ab4382d2SGreg Kroah-Hartman status = check_modem_status(up); 650660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 651660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 652fcdca757SGovindraj.R 653ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_get_mctrl+%d\n", up->port.line); 654ab4382d2SGreg Kroah-Hartman 655ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DCD) 656ab4382d2SGreg Kroah-Hartman ret |= TIOCM_CAR; 657ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_RI) 658ab4382d2SGreg Kroah-Hartman ret |= TIOCM_RNG; 659ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DSR) 660ab4382d2SGreg Kroah-Hartman ret |= TIOCM_DSR; 661ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_CTS) 662ab4382d2SGreg Kroah-Hartman ret |= TIOCM_CTS; 663ab4382d2SGreg Kroah-Hartman return ret; 664ab4382d2SGreg Kroah-Hartman } 665ab4382d2SGreg Kroah-Hartman 666ab4382d2SGreg Kroah-Hartman static void serial_omap_set_mctrl(struct uart_port *port, unsigned int mctrl) 667ab4382d2SGreg Kroah-Hartman { 668c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 669348f9bb3SPeter Hurley unsigned char mcr = 0, old_mcr, lcr; 670ab4382d2SGreg Kroah-Hartman 671ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_set_mctrl+%d\n", up->port.line); 672ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_RTS) 673ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_RTS; 674ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_DTR) 675ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_DTR; 676ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_OUT1) 677ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_OUT1; 678ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_OUT2) 679ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_OUT2; 680ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_LOOP) 681ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_LOOP; 682ab4382d2SGreg Kroah-Hartman 683d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 6849363f8faSRussell King old_mcr = serial_in(up, UART_MCR); 6859363f8faSRussell King old_mcr &= ~(UART_MCR_LOOP | UART_MCR_OUT2 | UART_MCR_OUT1 | 6869363f8faSRussell King UART_MCR_DTR | UART_MCR_RTS); 6879363f8faSRussell King up->mcr = old_mcr | mcr; 688c538d20cSGovindraj.R serial_out(up, UART_MCR, up->mcr); 689348f9bb3SPeter Hurley 690348f9bb3SPeter Hurley /* Turn off autoRTS if RTS is lowered; restore autoRTS if RTS raised */ 691348f9bb3SPeter Hurley lcr = serial_in(up, UART_LCR); 692348f9bb3SPeter Hurley serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 693348f9bb3SPeter Hurley if ((mctrl & TIOCM_RTS) && (port->status & UPSTAT_AUTORTS)) 694348f9bb3SPeter Hurley up->efr |= UART_EFR_RTS; 695348f9bb3SPeter Hurley else 696348f9bb3SPeter Hurley up->efr &= UART_EFR_RTS; 697348f9bb3SPeter Hurley serial_out(up, UART_EFR, up->efr); 698348f9bb3SPeter Hurley serial_out(up, UART_LCR, lcr); 699348f9bb3SPeter Hurley 700660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 701660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 702ab4382d2SGreg Kroah-Hartman } 703ab4382d2SGreg Kroah-Hartman 704ab4382d2SGreg Kroah-Hartman static void serial_omap_break_ctl(struct uart_port *port, int break_state) 705ab4382d2SGreg Kroah-Hartman { 706c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 707ab4382d2SGreg Kroah-Hartman unsigned long flags = 0; 708ab4382d2SGreg Kroah-Hartman 709ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_break_ctl+%d\n", up->port.line); 710d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 711ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags); 712ab4382d2SGreg Kroah-Hartman if (break_state == -1) 713ab4382d2SGreg Kroah-Hartman up->lcr |= UART_LCR_SBC; 714ab4382d2SGreg Kroah-Hartman else 715ab4382d2SGreg Kroah-Hartman up->lcr &= ~UART_LCR_SBC; 716ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, up->lcr); 717ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags); 718660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 719660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 720ab4382d2SGreg Kroah-Hartman } 721ab4382d2SGreg Kroah-Hartman 722ab4382d2SGreg Kroah-Hartman static int serial_omap_startup(struct uart_port *port) 723ab4382d2SGreg Kroah-Hartman { 724c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 725ab4382d2SGreg Kroah-Hartman unsigned long flags = 0; 726ab4382d2SGreg Kroah-Hartman int retval; 727ab4382d2SGreg Kroah-Hartman 728ab4382d2SGreg Kroah-Hartman /* 729ab4382d2SGreg Kroah-Hartman * Allocate the IRQ 730ab4382d2SGreg Kroah-Hartman */ 731ab4382d2SGreg Kroah-Hartman retval = request_irq(up->port.irq, serial_omap_irq, up->port.irqflags, 732ab4382d2SGreg Kroah-Hartman up->name, up); 733ab4382d2SGreg Kroah-Hartman if (retval) 734ab4382d2SGreg Kroah-Hartman return retval; 735ab4382d2SGreg Kroah-Hartman 7362a0b965cSTony Lindgren /* Optional wake-up IRQ */ 7372a0b965cSTony Lindgren if (up->wakeirq) { 738ee83bd3bSTony Lindgren retval = dev_pm_set_dedicated_wake_irq(up->dev, up->wakeirq); 7392a0b965cSTony Lindgren if (retval) { 7402a0b965cSTony Lindgren free_irq(up->port.irq, up); 7412a0b965cSTony Lindgren return retval; 7422a0b965cSTony Lindgren } 7432a0b965cSTony Lindgren } 7442a0b965cSTony Lindgren 745ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_startup+%d\n", up->port.line); 746ab4382d2SGreg Kroah-Hartman 747d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 748ab4382d2SGreg Kroah-Hartman /* 749ab4382d2SGreg Kroah-Hartman * Clear the FIFO buffers and disable them. 750ab4382d2SGreg Kroah-Hartman * (they will be reenabled in set_termios()) 751ab4382d2SGreg Kroah-Hartman */ 752ab4382d2SGreg Kroah-Hartman serial_omap_clear_fifos(up); 753ab4382d2SGreg Kroah-Hartman 754ab4382d2SGreg Kroah-Hartman /* 755ab4382d2SGreg Kroah-Hartman * Clear the interrupt registers. 756ab4382d2SGreg Kroah-Hartman */ 757ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_LSR); 758ab4382d2SGreg Kroah-Hartman if (serial_in(up, UART_LSR) & UART_LSR_DR) 759ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_RX); 760ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_IIR); 761ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_MSR); 762ab4382d2SGreg Kroah-Hartman 763ab4382d2SGreg Kroah-Hartman /* 764ab4382d2SGreg Kroah-Hartman * Now, initialize the UART 765ab4382d2SGreg Kroah-Hartman */ 766ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_WLEN8); 767ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags); 768ab4382d2SGreg Kroah-Hartman /* 769ab4382d2SGreg Kroah-Hartman * Most PC uarts need OUT2 raised to enable interrupts. 770ab4382d2SGreg Kroah-Hartman */ 771ab4382d2SGreg Kroah-Hartman up->port.mctrl |= TIOCM_OUT2; 772ab4382d2SGreg Kroah-Hartman serial_omap_set_mctrl(&up->port, up->port.mctrl); 773ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags); 774ab4382d2SGreg Kroah-Hartman 775ab4382d2SGreg Kroah-Hartman up->msr_saved_flags = 0; 776ab4382d2SGreg Kroah-Hartman /* 777ab4382d2SGreg Kroah-Hartman * Finally, enable interrupts. Note: Modem status interrupts 778ab4382d2SGreg Kroah-Hartman * are set via set_termios(), which will be occurring imminently 779ab4382d2SGreg Kroah-Hartman * anyway, so we don't enable them here. 780ab4382d2SGreg Kroah-Hartman */ 781ab4382d2SGreg Kroah-Hartman up->ier = UART_IER_RLSI | UART_IER_RDI; 782ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 783ab4382d2SGreg Kroah-Hartman 78478841462SJarkko Nikula /* Enable module level wake up */ 785f64ffda6SGovindraj.R up->wer = OMAP_UART_WER_MOD_WKUP; 786f64ffda6SGovindraj.R if (up->features & OMAP_UART_WER_HAS_TX_WAKEUP) 787f64ffda6SGovindraj.R up->wer |= OMAP_UART_TX_WAKEUP_EN; 788f64ffda6SGovindraj.R 789f64ffda6SGovindraj.R serial_out(up, UART_OMAP_WER, up->wer); 79078841462SJarkko Nikula 791d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 792d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 793ab4382d2SGreg Kroah-Hartman up->port_activity = jiffies; 794ab4382d2SGreg Kroah-Hartman return 0; 795ab4382d2SGreg Kroah-Hartman } 796ab4382d2SGreg Kroah-Hartman 797ab4382d2SGreg Kroah-Hartman static void serial_omap_shutdown(struct uart_port *port) 798ab4382d2SGreg Kroah-Hartman { 799c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 800ab4382d2SGreg Kroah-Hartman unsigned long flags = 0; 801ab4382d2SGreg Kroah-Hartman 802ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_shutdown+%d\n", up->port.line); 803fcdca757SGovindraj.R 804d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 805ab4382d2SGreg Kroah-Hartman /* 806ab4382d2SGreg Kroah-Hartman * Disable interrupts from this port 807ab4382d2SGreg Kroah-Hartman */ 808ab4382d2SGreg Kroah-Hartman up->ier = 0; 809ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, 0); 810ab4382d2SGreg Kroah-Hartman 811ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags); 812ab4382d2SGreg Kroah-Hartman up->port.mctrl &= ~TIOCM_OUT2; 813ab4382d2SGreg Kroah-Hartman serial_omap_set_mctrl(&up->port, up->port.mctrl); 814ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags); 815ab4382d2SGreg Kroah-Hartman 816ab4382d2SGreg Kroah-Hartman /* 817ab4382d2SGreg Kroah-Hartman * Disable break condition and FIFOs 818ab4382d2SGreg Kroah-Hartman */ 819ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC); 820ab4382d2SGreg Kroah-Hartman serial_omap_clear_fifos(up); 821ab4382d2SGreg Kroah-Hartman 822ab4382d2SGreg Kroah-Hartman /* 823ab4382d2SGreg Kroah-Hartman * Read data port to reset things, and then free the irq 824ab4382d2SGreg Kroah-Hartman */ 825ab4382d2SGreg Kroah-Hartman if (serial_in(up, UART_LSR) & UART_LSR_DR) 826ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_RX); 827fcdca757SGovindraj.R 828660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 829660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 830ab4382d2SGreg Kroah-Hartman free_irq(up->port.irq, up); 831ee83bd3bSTony Lindgren dev_pm_clear_wake_irq(up->dev); 832ab4382d2SGreg Kroah-Hartman } 833ab4382d2SGreg Kroah-Hartman 8342fd14964SGovindraj.R static void serial_omap_uart_qos_work(struct work_struct *work) 8352fd14964SGovindraj.R { 8362fd14964SGovindraj.R struct uart_omap_port *up = container_of(work, struct uart_omap_port, 8372fd14964SGovindraj.R qos_work); 8382fd14964SGovindraj.R 8392fd14964SGovindraj.R pm_qos_update_request(&up->pm_qos_request, up->latency); 8402fd14964SGovindraj.R } 8412fd14964SGovindraj.R 842ab4382d2SGreg Kroah-Hartman static void 843ab4382d2SGreg Kroah-Hartman serial_omap_set_termios(struct uart_port *port, struct ktermios *termios, 844ab4382d2SGreg Kroah-Hartman struct ktermios *old) 845ab4382d2SGreg Kroah-Hartman { 846c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 847ab4382d2SGreg Kroah-Hartman unsigned char cval = 0; 848ab4382d2SGreg Kroah-Hartman unsigned long flags = 0; 849ab4382d2SGreg Kroah-Hartman unsigned int baud, quot; 850ab4382d2SGreg Kroah-Hartman 851ab4382d2SGreg Kroah-Hartman switch (termios->c_cflag & CSIZE) { 852ab4382d2SGreg Kroah-Hartman case CS5: 853ab4382d2SGreg Kroah-Hartman cval = UART_LCR_WLEN5; 854ab4382d2SGreg Kroah-Hartman break; 855ab4382d2SGreg Kroah-Hartman case CS6: 856ab4382d2SGreg Kroah-Hartman cval = UART_LCR_WLEN6; 857ab4382d2SGreg Kroah-Hartman break; 858ab4382d2SGreg Kroah-Hartman case CS7: 859ab4382d2SGreg Kroah-Hartman cval = UART_LCR_WLEN7; 860ab4382d2SGreg Kroah-Hartman break; 861ab4382d2SGreg Kroah-Hartman default: 862ab4382d2SGreg Kroah-Hartman case CS8: 863ab4382d2SGreg Kroah-Hartman cval = UART_LCR_WLEN8; 864ab4382d2SGreg Kroah-Hartman break; 865ab4382d2SGreg Kroah-Hartman } 866ab4382d2SGreg Kroah-Hartman 867ab4382d2SGreg Kroah-Hartman if (termios->c_cflag & CSTOPB) 868ab4382d2SGreg Kroah-Hartman cval |= UART_LCR_STOP; 869ab4382d2SGreg Kroah-Hartman if (termios->c_cflag & PARENB) 870ab4382d2SGreg Kroah-Hartman cval |= UART_LCR_PARITY; 871ab4382d2SGreg Kroah-Hartman if (!(termios->c_cflag & PARODD)) 872ab4382d2SGreg Kroah-Hartman cval |= UART_LCR_EPAR; 873fdbc7353SEnric Balletbo i Serra if (termios->c_cflag & CMSPAR) 874fdbc7353SEnric Balletbo i Serra cval |= UART_LCR_SPAR; 875ab4382d2SGreg Kroah-Hartman 876ab4382d2SGreg Kroah-Hartman /* 877ab4382d2SGreg Kroah-Hartman * Ask the core to calculate the divisor for us. 878ab4382d2SGreg Kroah-Hartman */ 879ab4382d2SGreg Kroah-Hartman 880ab4382d2SGreg Kroah-Hartman baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/13); 881ab4382d2SGreg Kroah-Hartman quot = serial_omap_get_divisor(port, baud); 882ab4382d2SGreg Kroah-Hartman 8832fd14964SGovindraj.R /* calculate wakeup latency constraint */ 88419723452SPaul Walmsley up->calc_latency = (USEC_PER_SEC * up->port.fifosize) / (baud / 8); 8852fd14964SGovindraj.R up->latency = up->calc_latency; 8862fd14964SGovindraj.R schedule_work(&up->qos_work); 8872fd14964SGovindraj.R 888c538d20cSGovindraj.R up->dll = quot & 0xff; 889c538d20cSGovindraj.R up->dlh = quot >> 8; 890c538d20cSGovindraj.R up->mdr1 = UART_OMAP_MDR1_DISABLE; 891c538d20cSGovindraj.R 892ab4382d2SGreg Kroah-Hartman up->fcr = UART_FCR_R_TRIG_01 | UART_FCR_T_TRIG_01 | 893ab4382d2SGreg Kroah-Hartman UART_FCR_ENABLE_FIFO; 894ab4382d2SGreg Kroah-Hartman 895ab4382d2SGreg Kroah-Hartman /* 896ab4382d2SGreg Kroah-Hartman * Ok, we're now changing the port state. Do it with 897ab4382d2SGreg Kroah-Hartman * interrupts disabled. 898ab4382d2SGreg Kroah-Hartman */ 899d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 900ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags); 901ab4382d2SGreg Kroah-Hartman 902ab4382d2SGreg Kroah-Hartman /* 903ab4382d2SGreg Kroah-Hartman * Update the per-port timeout. 904ab4382d2SGreg Kroah-Hartman */ 905ab4382d2SGreg Kroah-Hartman uart_update_timeout(port, termios->c_cflag, baud); 906ab4382d2SGreg Kroah-Hartman 907ab4382d2SGreg Kroah-Hartman up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; 908ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & INPCK) 909ab4382d2SGreg Kroah-Hartman up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE; 910ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & (BRKINT | PARMRK)) 911ab4382d2SGreg Kroah-Hartman up->port.read_status_mask |= UART_LSR_BI; 912ab4382d2SGreg Kroah-Hartman 913ab4382d2SGreg Kroah-Hartman /* 914ab4382d2SGreg Kroah-Hartman * Characters to ignore 915ab4382d2SGreg Kroah-Hartman */ 916ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask = 0; 917ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IGNPAR) 918ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE; 919ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IGNBRK) { 920ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask |= UART_LSR_BI; 921ab4382d2SGreg Kroah-Hartman /* 922ab4382d2SGreg Kroah-Hartman * If we're ignoring parity and break indicators, 923ab4382d2SGreg Kroah-Hartman * ignore overruns too (for real raw support). 924ab4382d2SGreg Kroah-Hartman */ 925ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IGNPAR) 926ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask |= UART_LSR_OE; 927ab4382d2SGreg Kroah-Hartman } 928ab4382d2SGreg Kroah-Hartman 929ab4382d2SGreg Kroah-Hartman /* 930ab4382d2SGreg Kroah-Hartman * ignore all characters if CREAD is not set 931ab4382d2SGreg Kroah-Hartman */ 932ab4382d2SGreg Kroah-Hartman if ((termios->c_cflag & CREAD) == 0) 933ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask |= UART_LSR_DR; 934ab4382d2SGreg Kroah-Hartman 935ab4382d2SGreg Kroah-Hartman /* 936ab4382d2SGreg Kroah-Hartman * Modem status interrupts 937ab4382d2SGreg Kroah-Hartman */ 938ab4382d2SGreg Kroah-Hartman up->ier &= ~UART_IER_MSI; 939ab4382d2SGreg Kroah-Hartman if (UART_ENABLE_MS(&up->port, termios->c_cflag)) 940ab4382d2SGreg Kroah-Hartman up->ier |= UART_IER_MSI; 941ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 942ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, cval); /* reset DLAB */ 943c538d20cSGovindraj.R up->lcr = cval; 9441776fd05SAlexey Pelykh up->scr = 0; 945ab4382d2SGreg Kroah-Hartman 946ab4382d2SGreg Kroah-Hartman /* FIFOs and DMA Settings */ 947ab4382d2SGreg Kroah-Hartman 948ab4382d2SGreg Kroah-Hartman /* FCR can be changed only when the 949ab4382d2SGreg Kroah-Hartman * baud clock is not running 950ab4382d2SGreg Kroah-Hartman * DLL_REG and DLH_REG set to 0. 951ab4382d2SGreg Kroah-Hartman */ 952ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 953ab4382d2SGreg Kroah-Hartman serial_out(up, UART_DLL, 0); 954ab4382d2SGreg Kroah-Hartman serial_out(up, UART_DLM, 0); 955ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0); 956ab4382d2SGreg Kroah-Hartman 957ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 958ab4382d2SGreg Kroah-Hartman 95908bd4903SRussell King up->efr = serial_in(up, UART_EFR) & ~UART_EFR_ECB; 960d864c03bSRussell King up->efr &= ~UART_EFR_SCD; 961ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); 962ab4382d2SGreg Kroah-Hartman 963ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 96408bd4903SRussell King up->mcr = serial_in(up, UART_MCR) & ~UART_MCR_TCRTLR; 965ab4382d2SGreg Kroah-Hartman serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR); 966ab4382d2SGreg Kroah-Hartman /* FIFO ENABLE, DMA MODE */ 9670ba5f668SPaul Walmsley 9681f663966SAlexey Pelykh up->scr |= OMAP_UART_SCR_RX_TRIG_GRANU1_MASK; 9691f663966SAlexey Pelykh /* 9701f663966SAlexey Pelykh * NOTE: Setting OMAP_UART_SCR_RX_TRIG_GRANU1_MASK 9711f663966SAlexey Pelykh * sets Enables the granularity of 1 for TRIGGER RX 9721f663966SAlexey Pelykh * level. Along with setting RX FIFO trigger level 9731f663966SAlexey Pelykh * to 1 (as noted below, 16 characters) and TLR[3:0] 9741f663966SAlexey Pelykh * to zero this will result RX FIFO threshold level 9751f663966SAlexey Pelykh * to 1 character, instead of 16 as noted in comment 9761f663966SAlexey Pelykh * below. 9771f663966SAlexey Pelykh */ 9781f663966SAlexey Pelykh 9796721ab7fSFelipe Balbi /* Set receive FIFO threshold to 16 characters and 980018e7448SPhilippe Proulx * transmit FIFO threshold to 32 spaces 9816721ab7fSFelipe Balbi */ 9820ba5f668SPaul Walmsley up->fcr &= ~OMAP_UART_FCR_RX_FIFO_TRIG_MASK; 9836721ab7fSFelipe Balbi up->fcr &= ~OMAP_UART_FCR_TX_FIFO_TRIG_MASK; 9846721ab7fSFelipe Balbi up->fcr |= UART_FCR6_R_TRIGGER_16 | UART_FCR6_T_TRIGGER_24 | 9856721ab7fSFelipe Balbi UART_FCR_ENABLE_FIFO; 9868a74e9ffSGreg Kroah-Hartman 9870ba5f668SPaul Walmsley serial_out(up, UART_FCR, up->fcr); 9880ba5f668SPaul Walmsley serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 9890ba5f668SPaul Walmsley 990c538d20cSGovindraj.R serial_out(up, UART_OMAP_SCR, up->scr); 991c538d20cSGovindraj.R 99208bd4903SRussell King /* Reset UART_MCR_TCRTLR: this must be done with the EFR_ECB bit set */ 993ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 994ab4382d2SGreg Kroah-Hartman serial_out(up, UART_MCR, up->mcr); 99508bd4903SRussell King serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 99608bd4903SRussell King serial_out(up, UART_EFR, up->efr); 99708bd4903SRussell King serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 998ab4382d2SGreg Kroah-Hartman 999ab4382d2SGreg Kroah-Hartman /* Protocol, Baud Rate, and Interrupt Settings */ 1000ab4382d2SGreg Kroah-Hartman 100194734749SGovindraj.R if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) 100294734749SGovindraj.R serial_omap_mdr1_errataset(up, up->mdr1); 100394734749SGovindraj.R else 1004c538d20cSGovindraj.R serial_out(up, UART_OMAP_MDR1, up->mdr1); 100594734749SGovindraj.R 1006ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 1007ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); 1008ab4382d2SGreg Kroah-Hartman 1009ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0); 1010ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, 0); 1011ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 1012ab4382d2SGreg Kroah-Hartman 1013c538d20cSGovindraj.R serial_out(up, UART_DLL, up->dll); /* LS of divisor */ 1014c538d20cSGovindraj.R serial_out(up, UART_DLM, up->dlh); /* MS of divisor */ 1015ab4382d2SGreg Kroah-Hartman 1016ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0); 1017ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 1018ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 1019ab4382d2SGreg Kroah-Hartman 1020ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, up->efr); 1021ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, cval); 1022ab4382d2SGreg Kroah-Hartman 10235fe21236SAlexey Pelykh if (!serial_omap_baud_is_mode16(port, baud)) 1024c538d20cSGovindraj.R up->mdr1 = UART_OMAP_MDR1_13X_MODE; 1025ab4382d2SGreg Kroah-Hartman else 1026c538d20cSGovindraj.R up->mdr1 = UART_OMAP_MDR1_16X_MODE; 1027c538d20cSGovindraj.R 102894734749SGovindraj.R if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) 102994734749SGovindraj.R serial_omap_mdr1_errataset(up, up->mdr1); 103094734749SGovindraj.R else 1031c538d20cSGovindraj.R serial_out(up, UART_OMAP_MDR1, up->mdr1); 1032ab4382d2SGreg Kroah-Hartman 1033c533e51bSRussell King /* Configure flow control */ 103408bd4903SRussell King serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 1035ab4382d2SGreg Kroah-Hartman 1036c533e51bSRussell King /* XON1/XOFF1 accessible mode B, TCRTLR=0, ECB=0 */ 1037c533e51bSRussell King serial_out(up, UART_XON1, termios->c_cc[VSTART]); 1038c533e51bSRussell King serial_out(up, UART_XOFF1, termios->c_cc[VSTOP]); 1039c533e51bSRussell King 1040c533e51bSRussell King /* Enable access to TCR/TLR */ 104108bd4903SRussell King serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); 1042ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 1043ab4382d2SGreg Kroah-Hartman serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR); 1044ab4382d2SGreg Kroah-Hartman 1045ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TI752_TCR, OMAP_UART_TCR_TRIG); 104608bd4903SRussell King 1047391f93f2SPeter Hurley up->port.status &= ~(UPSTAT_AUTOCTS | UPSTAT_AUTORTS | UPSTAT_AUTOXOFF); 1048391f93f2SPeter Hurley 1049c7d059caSRussell King if (termios->c_cflag & CRTSCTS && up->port.flags & UPF_HARD_FLOW) { 1050348f9bb3SPeter Hurley /* Enable AUTOCTS (autoRTS is enabled when RTS is raised) */ 1051391f93f2SPeter Hurley up->port.status |= UPSTAT_AUTOCTS | UPSTAT_AUTORTS; 1052348f9bb3SPeter Hurley up->efr |= UART_EFR_CTS; 10530d5b1663SRussell King } else { 10540d5b1663SRussell King /* Disable AUTORTS and AUTOCTS */ 10550d5b1663SRussell King up->efr &= ~(UART_EFR_CTS | UART_EFR_RTS); 1056ab4382d2SGreg Kroah-Hartman } 1057ab4382d2SGreg Kroah-Hartman 105801d70bb3SRussell King if (up->port.flags & UPF_SOFT_FLOW) { 105901d70bb3SRussell King /* clear SW control mode bits */ 106001d70bb3SRussell King up->efr &= OMAP_UART_SW_CLR; 106101d70bb3SRussell King 106201d70bb3SRussell King /* 106301d70bb3SRussell King * IXON Flag: 106401d70bb3SRussell King * Enable XON/XOFF flow control on input. 106501d70bb3SRussell King * Receiver compares XON1, XOFF1. 106601d70bb3SRussell King */ 10673af08bd7SRussell King if (termios->c_iflag & IXON) 106801d70bb3SRussell King up->efr |= OMAP_UART_SW_RX; 106901d70bb3SRussell King 107001d70bb3SRussell King /* 10713af08bd7SRussell King * IXOFF Flag: 10723af08bd7SRussell King * Enable XON/XOFF flow control on output. 10733af08bd7SRussell King * Transmit XON1, XOFF1 10743af08bd7SRussell King */ 1075391f93f2SPeter Hurley if (termios->c_iflag & IXOFF) { 1076391f93f2SPeter Hurley up->port.status |= UPSTAT_AUTOXOFF; 10773af08bd7SRussell King up->efr |= OMAP_UART_SW_TX; 1078391f93f2SPeter Hurley } 10793af08bd7SRussell King 10803af08bd7SRussell King /* 108101d70bb3SRussell King * IXANY Flag: 108201d70bb3SRussell King * Enable any character to restart output. 108301d70bb3SRussell King * Operation resumes after receiving any 108401d70bb3SRussell King * character after recognition of the XOFF character 108501d70bb3SRussell King */ 108601d70bb3SRussell King if (termios->c_iflag & IXANY) 108701d70bb3SRussell King up->mcr |= UART_MCR_XONANY; 108801d70bb3SRussell King else 108901d70bb3SRussell King up->mcr &= ~UART_MCR_XONANY; 109018f360f8SRussell King } 1091c7d059caSRussell King serial_out(up, UART_MCR, up->mcr); 109201d70bb3SRussell King serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 109301d70bb3SRussell King serial_out(up, UART_EFR, up->efr); 109401d70bb3SRussell King serial_out(up, UART_LCR, up->lcr); 1095ab4382d2SGreg Kroah-Hartman 1096ab4382d2SGreg Kroah-Hartman serial_omap_set_mctrl(&up->port, up->port.mctrl); 1097ab4382d2SGreg Kroah-Hartman 1098ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags); 1099660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 1100660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 1101ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_set_termios+%d\n", up->port.line); 1102ab4382d2SGreg Kroah-Hartman } 1103ab4382d2SGreg Kroah-Hartman 1104ab4382d2SGreg Kroah-Hartman static void 1105ab4382d2SGreg Kroah-Hartman serial_omap_pm(struct uart_port *port, unsigned int state, 1106ab4382d2SGreg Kroah-Hartman unsigned int oldstate) 1107ab4382d2SGreg Kroah-Hartman { 1108c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 1109ab4382d2SGreg Kroah-Hartman unsigned char efr; 1110ab4382d2SGreg Kroah-Hartman 1111ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_pm+%d\n", up->port.line); 1112fcdca757SGovindraj.R 1113d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 1114ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 1115ab4382d2SGreg Kroah-Hartman efr = serial_in(up, UART_EFR); 1116ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, efr | UART_EFR_ECB); 1117ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0); 1118ab4382d2SGreg Kroah-Hartman 1119ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, (state != 0) ? UART_IERX_SLEEP : 0); 1120ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 1121ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, efr); 1122ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0); 1123fcdca757SGovindraj.R 1124660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 1125660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 1126ab4382d2SGreg Kroah-Hartman } 1127ab4382d2SGreg Kroah-Hartman 1128ab4382d2SGreg Kroah-Hartman static void serial_omap_release_port(struct uart_port *port) 1129ab4382d2SGreg Kroah-Hartman { 1130ab4382d2SGreg Kroah-Hartman dev_dbg(port->dev, "serial_omap_release_port+\n"); 1131ab4382d2SGreg Kroah-Hartman } 1132ab4382d2SGreg Kroah-Hartman 1133ab4382d2SGreg Kroah-Hartman static int serial_omap_request_port(struct uart_port *port) 1134ab4382d2SGreg Kroah-Hartman { 1135ab4382d2SGreg Kroah-Hartman dev_dbg(port->dev, "serial_omap_request_port+\n"); 1136ab4382d2SGreg Kroah-Hartman return 0; 1137ab4382d2SGreg Kroah-Hartman } 1138ab4382d2SGreg Kroah-Hartman 1139ab4382d2SGreg Kroah-Hartman static void serial_omap_config_port(struct uart_port *port, int flags) 1140ab4382d2SGreg Kroah-Hartman { 1141c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 1142ab4382d2SGreg Kroah-Hartman 1143ab4382d2SGreg Kroah-Hartman dev_dbg(up->port.dev, "serial_omap_config_port+%d\n", 1144ba77433dSRajendra Nayak up->port.line); 1145ab4382d2SGreg Kroah-Hartman up->port.type = PORT_OMAP; 11463af08bd7SRussell King up->port.flags |= UPF_SOFT_FLOW | UPF_HARD_FLOW; 1147ab4382d2SGreg Kroah-Hartman } 1148ab4382d2SGreg Kroah-Hartman 1149ab4382d2SGreg Kroah-Hartman static int 1150ab4382d2SGreg Kroah-Hartman serial_omap_verify_port(struct uart_port *port, struct serial_struct *ser) 1151ab4382d2SGreg Kroah-Hartman { 1152ab4382d2SGreg Kroah-Hartman /* we don't want the core code to modify any port params */ 1153ab4382d2SGreg Kroah-Hartman dev_dbg(port->dev, "serial_omap_verify_port+\n"); 1154ab4382d2SGreg Kroah-Hartman return -EINVAL; 1155ab4382d2SGreg Kroah-Hartman } 1156ab4382d2SGreg Kroah-Hartman 1157ab4382d2SGreg Kroah-Hartman static const char * 1158ab4382d2SGreg Kroah-Hartman serial_omap_type(struct uart_port *port) 1159ab4382d2SGreg Kroah-Hartman { 1160c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 1161ab4382d2SGreg Kroah-Hartman 1162ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_type+%d\n", up->port.line); 1163ab4382d2SGreg Kroah-Hartman return up->name; 1164ab4382d2SGreg Kroah-Hartman } 1165ab4382d2SGreg Kroah-Hartman 1166ab4382d2SGreg Kroah-Hartman #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE) 1167ab4382d2SGreg Kroah-Hartman 1168b4a512b8SArnd Bergmann static void __maybe_unused wait_for_xmitr(struct uart_omap_port *up) 1169ab4382d2SGreg Kroah-Hartman { 1170ab4382d2SGreg Kroah-Hartman unsigned int status, tmout = 10000; 1171ab4382d2SGreg Kroah-Hartman 1172ab4382d2SGreg Kroah-Hartman /* Wait up to 10ms for the character(s) to be sent. */ 1173ab4382d2SGreg Kroah-Hartman do { 1174ab4382d2SGreg Kroah-Hartman status = serial_in(up, UART_LSR); 1175ab4382d2SGreg Kroah-Hartman 1176ab4382d2SGreg Kroah-Hartman if (status & UART_LSR_BI) 1177ab4382d2SGreg Kroah-Hartman up->lsr_break_flag = UART_LSR_BI; 1178ab4382d2SGreg Kroah-Hartman 1179ab4382d2SGreg Kroah-Hartman if (--tmout == 0) 1180ab4382d2SGreg Kroah-Hartman break; 1181ab4382d2SGreg Kroah-Hartman udelay(1); 1182ab4382d2SGreg Kroah-Hartman } while ((status & BOTH_EMPTY) != BOTH_EMPTY); 1183ab4382d2SGreg Kroah-Hartman 1184ab4382d2SGreg Kroah-Hartman /* Wait up to 1s for flow control if necessary */ 1185ab4382d2SGreg Kroah-Hartman if (up->port.flags & UPF_CONS_FLOW) { 1186ab4382d2SGreg Kroah-Hartman tmout = 1000000; 1187ab4382d2SGreg Kroah-Hartman for (tmout = 1000000; tmout; tmout--) { 1188ab4382d2SGreg Kroah-Hartman unsigned int msr = serial_in(up, UART_MSR); 1189ab4382d2SGreg Kroah-Hartman 1190ab4382d2SGreg Kroah-Hartman up->msr_saved_flags |= msr & MSR_SAVE_FLAGS; 1191ab4382d2SGreg Kroah-Hartman if (msr & UART_MSR_CTS) 1192ab4382d2SGreg Kroah-Hartman break; 1193ab4382d2SGreg Kroah-Hartman 1194ab4382d2SGreg Kroah-Hartman udelay(1); 1195ab4382d2SGreg Kroah-Hartman } 1196ab4382d2SGreg Kroah-Hartman } 1197ab4382d2SGreg Kroah-Hartman } 1198ab4382d2SGreg Kroah-Hartman 1199ab4382d2SGreg Kroah-Hartman #ifdef CONFIG_CONSOLE_POLL 1200ab4382d2SGreg Kroah-Hartman 1201ab4382d2SGreg Kroah-Hartman static void serial_omap_poll_put_char(struct uart_port *port, unsigned char ch) 1202ab4382d2SGreg Kroah-Hartman { 1203c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 1204fcdca757SGovindraj.R 1205d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 1206ab4382d2SGreg Kroah-Hartman wait_for_xmitr(up); 1207ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TX, ch); 1208660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 1209660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 1210ab4382d2SGreg Kroah-Hartman } 1211ab4382d2SGreg Kroah-Hartman 1212ab4382d2SGreg Kroah-Hartman static int serial_omap_poll_get_char(struct uart_port *port) 1213ab4382d2SGreg Kroah-Hartman { 1214c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 1215fcdca757SGovindraj.R unsigned int status; 1216ab4382d2SGreg Kroah-Hartman 1217d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 1218fcdca757SGovindraj.R status = serial_in(up, UART_LSR); 1219a6b19c33SFelipe Balbi if (!(status & UART_LSR_DR)) { 1220a6b19c33SFelipe Balbi status = NO_POLL_CHAR; 1221a6b19c33SFelipe Balbi goto out; 1222a6b19c33SFelipe Balbi } 1223ab4382d2SGreg Kroah-Hartman 1224fcdca757SGovindraj.R status = serial_in(up, UART_RX); 1225a6b19c33SFelipe Balbi 1226a6b19c33SFelipe Balbi out: 1227660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 1228660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 1229a6b19c33SFelipe Balbi 1230fcdca757SGovindraj.R return status; 1231ab4382d2SGreg Kroah-Hartman } 1232ab4382d2SGreg Kroah-Hartman 1233ab4382d2SGreg Kroah-Hartman #endif /* CONFIG_CONSOLE_POLL */ 1234ab4382d2SGreg Kroah-Hartman 1235ab4382d2SGreg Kroah-Hartman #ifdef CONFIG_SERIAL_OMAP_CONSOLE 1236ab4382d2SGreg Kroah-Hartman 123728ec9570SLokesh Vutla #ifdef CONFIG_SERIAL_EARLYCON 123828ec9570SLokesh Vutla static unsigned int __init omap_serial_early_in(struct uart_port *port, 123928ec9570SLokesh Vutla int offset) 124028ec9570SLokesh Vutla { 124128ec9570SLokesh Vutla offset <<= port->regshift; 124228ec9570SLokesh Vutla return readw(port->membase + offset); 124328ec9570SLokesh Vutla } 124428ec9570SLokesh Vutla 124528ec9570SLokesh Vutla static void __init omap_serial_early_out(struct uart_port *port, int offset, 124628ec9570SLokesh Vutla int value) 124728ec9570SLokesh Vutla { 124828ec9570SLokesh Vutla offset <<= port->regshift; 124928ec9570SLokesh Vutla writew(value, port->membase + offset); 125028ec9570SLokesh Vutla } 125128ec9570SLokesh Vutla 125228ec9570SLokesh Vutla static void __init omap_serial_early_putc(struct uart_port *port, int c) 125328ec9570SLokesh Vutla { 125428ec9570SLokesh Vutla unsigned int status; 125528ec9570SLokesh Vutla 125628ec9570SLokesh Vutla for (;;) { 125728ec9570SLokesh Vutla status = omap_serial_early_in(port, UART_LSR); 125828ec9570SLokesh Vutla if ((status & BOTH_EMPTY) == BOTH_EMPTY) 125928ec9570SLokesh Vutla break; 126028ec9570SLokesh Vutla cpu_relax(); 126128ec9570SLokesh Vutla } 126228ec9570SLokesh Vutla omap_serial_early_out(port, UART_TX, c); 126328ec9570SLokesh Vutla } 126428ec9570SLokesh Vutla 126528ec9570SLokesh Vutla static void __init early_omap_serial_write(struct console *console, 126628ec9570SLokesh Vutla const char *s, unsigned int count) 126728ec9570SLokesh Vutla { 126828ec9570SLokesh Vutla struct earlycon_device *device = console->data; 126928ec9570SLokesh Vutla struct uart_port *port = &device->port; 127028ec9570SLokesh Vutla 127128ec9570SLokesh Vutla uart_console_write(port, s, count, omap_serial_early_putc); 127228ec9570SLokesh Vutla } 127328ec9570SLokesh Vutla 127428ec9570SLokesh Vutla static int __init early_omap_serial_setup(struct earlycon_device *device, 127528ec9570SLokesh Vutla const char *options) 127628ec9570SLokesh Vutla { 127728ec9570SLokesh Vutla struct uart_port *port = &device->port; 127828ec9570SLokesh Vutla 127928ec9570SLokesh Vutla if (!(device->port.membase || device->port.iobase)) 128028ec9570SLokesh Vutla return -ENODEV; 128128ec9570SLokesh Vutla 128228ec9570SLokesh Vutla port->regshift = 2; 128328ec9570SLokesh Vutla device->con->write = early_omap_serial_write; 128428ec9570SLokesh Vutla return 0; 128528ec9570SLokesh Vutla } 128628ec9570SLokesh Vutla 128728ec9570SLokesh Vutla OF_EARLYCON_DECLARE(omapserial, "ti,omap2-uart", early_omap_serial_setup); 128828ec9570SLokesh Vutla OF_EARLYCON_DECLARE(omapserial, "ti,omap3-uart", early_omap_serial_setup); 128928ec9570SLokesh Vutla OF_EARLYCON_DECLARE(omapserial, "ti,omap4-uart", early_omap_serial_setup); 129028ec9570SLokesh Vutla #endif /* CONFIG_SERIAL_EARLYCON */ 129128ec9570SLokesh Vutla 129240477d0eSShubhrajyoti D static struct uart_omap_port *serial_omap_console_ports[OMAP_MAX_HSUART_PORTS]; 1293ab4382d2SGreg Kroah-Hartman 1294ab4382d2SGreg Kroah-Hartman static struct uart_driver serial_omap_reg; 1295ab4382d2SGreg Kroah-Hartman 1296ab4382d2SGreg Kroah-Hartman static void serial_omap_console_putchar(struct uart_port *port, int ch) 1297ab4382d2SGreg Kroah-Hartman { 1298c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 1299ab4382d2SGreg Kroah-Hartman 1300ab4382d2SGreg Kroah-Hartman wait_for_xmitr(up); 1301ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TX, ch); 1302ab4382d2SGreg Kroah-Hartman } 1303ab4382d2SGreg Kroah-Hartman 1304ab4382d2SGreg Kroah-Hartman static void 1305ab4382d2SGreg Kroah-Hartman serial_omap_console_write(struct console *co, const char *s, 1306ab4382d2SGreg Kroah-Hartman unsigned int count) 1307ab4382d2SGreg Kroah-Hartman { 1308ab4382d2SGreg Kroah-Hartman struct uart_omap_port *up = serial_omap_console_ports[co->index]; 1309ab4382d2SGreg Kroah-Hartman unsigned long flags; 1310ab4382d2SGreg Kroah-Hartman unsigned int ier; 1311ab4382d2SGreg Kroah-Hartman int locked = 1; 1312ab4382d2SGreg Kroah-Hartman 1313d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 1314fcdca757SGovindraj.R 1315ab4382d2SGreg Kroah-Hartman local_irq_save(flags); 1316ab4382d2SGreg Kroah-Hartman if (up->port.sysrq) 1317ab4382d2SGreg Kroah-Hartman locked = 0; 1318ab4382d2SGreg Kroah-Hartman else if (oops_in_progress) 1319ab4382d2SGreg Kroah-Hartman locked = spin_trylock(&up->port.lock); 1320ab4382d2SGreg Kroah-Hartman else 1321ab4382d2SGreg Kroah-Hartman spin_lock(&up->port.lock); 1322ab4382d2SGreg Kroah-Hartman 1323ab4382d2SGreg Kroah-Hartman /* 1324ab4382d2SGreg Kroah-Hartman * First save the IER then disable the interrupts 1325ab4382d2SGreg Kroah-Hartman */ 1326ab4382d2SGreg Kroah-Hartman ier = serial_in(up, UART_IER); 1327ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, 0); 1328ab4382d2SGreg Kroah-Hartman 1329ab4382d2SGreg Kroah-Hartman uart_console_write(&up->port, s, count, serial_omap_console_putchar); 1330ab4382d2SGreg Kroah-Hartman 1331ab4382d2SGreg Kroah-Hartman /* 1332ab4382d2SGreg Kroah-Hartman * Finally, wait for transmitter to become empty 1333ab4382d2SGreg Kroah-Hartman * and restore the IER 1334ab4382d2SGreg Kroah-Hartman */ 1335ab4382d2SGreg Kroah-Hartman wait_for_xmitr(up); 1336ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, ier); 1337ab4382d2SGreg Kroah-Hartman /* 1338ab4382d2SGreg Kroah-Hartman * The receive handling will happen properly because the 1339ab4382d2SGreg Kroah-Hartman * receive ready bit will still be set; it is not cleared 1340ab4382d2SGreg Kroah-Hartman * on read. However, modem control will not, we must 1341ab4382d2SGreg Kroah-Hartman * call it if we have saved something in the saved flags 1342ab4382d2SGreg Kroah-Hartman * while processing with interrupts off. 1343ab4382d2SGreg Kroah-Hartman */ 1344ab4382d2SGreg Kroah-Hartman if (up->msr_saved_flags) 1345ab4382d2SGreg Kroah-Hartman check_modem_status(up); 1346ab4382d2SGreg Kroah-Hartman 1347d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 1348d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 1349ab4382d2SGreg Kroah-Hartman if (locked) 1350ab4382d2SGreg Kroah-Hartman spin_unlock(&up->port.lock); 1351ab4382d2SGreg Kroah-Hartman local_irq_restore(flags); 1352ab4382d2SGreg Kroah-Hartman } 1353ab4382d2SGreg Kroah-Hartman 1354ab4382d2SGreg Kroah-Hartman static int __init 1355ab4382d2SGreg Kroah-Hartman serial_omap_console_setup(struct console *co, char *options) 1356ab4382d2SGreg Kroah-Hartman { 1357ab4382d2SGreg Kroah-Hartman struct uart_omap_port *up; 1358ab4382d2SGreg Kroah-Hartman int baud = 115200; 1359ab4382d2SGreg Kroah-Hartman int bits = 8; 1360ab4382d2SGreg Kroah-Hartman int parity = 'n'; 1361ab4382d2SGreg Kroah-Hartman int flow = 'n'; 1362ab4382d2SGreg Kroah-Hartman 1363ab4382d2SGreg Kroah-Hartman if (serial_omap_console_ports[co->index] == NULL) 1364ab4382d2SGreg Kroah-Hartman return -ENODEV; 1365ab4382d2SGreg Kroah-Hartman up = serial_omap_console_ports[co->index]; 1366ab4382d2SGreg Kroah-Hartman 1367ab4382d2SGreg Kroah-Hartman if (options) 1368ab4382d2SGreg Kroah-Hartman uart_parse_options(options, &baud, &parity, &bits, &flow); 1369ab4382d2SGreg Kroah-Hartman 1370ab4382d2SGreg Kroah-Hartman return uart_set_options(&up->port, co, baud, parity, bits, flow); 1371ab4382d2SGreg Kroah-Hartman } 1372ab4382d2SGreg Kroah-Hartman 1373ab4382d2SGreg Kroah-Hartman static struct console serial_omap_console = { 1374ab4382d2SGreg Kroah-Hartman .name = OMAP_SERIAL_NAME, 1375ab4382d2SGreg Kroah-Hartman .write = serial_omap_console_write, 1376ab4382d2SGreg Kroah-Hartman .device = uart_console_device, 1377ab4382d2SGreg Kroah-Hartman .setup = serial_omap_console_setup, 1378ab4382d2SGreg Kroah-Hartman .flags = CON_PRINTBUFFER, 1379ab4382d2SGreg Kroah-Hartman .index = -1, 1380ab4382d2SGreg Kroah-Hartman .data = &serial_omap_reg, 1381ab4382d2SGreg Kroah-Hartman }; 1382ab4382d2SGreg Kroah-Hartman 1383ab4382d2SGreg Kroah-Hartman static void serial_omap_add_console_port(struct uart_omap_port *up) 1384ab4382d2SGreg Kroah-Hartman { 1385ba77433dSRajendra Nayak serial_omap_console_ports[up->port.line] = up; 1386ab4382d2SGreg Kroah-Hartman } 1387ab4382d2SGreg Kroah-Hartman 1388ab4382d2SGreg Kroah-Hartman #define OMAP_CONSOLE (&serial_omap_console) 1389ab4382d2SGreg Kroah-Hartman 1390ab4382d2SGreg Kroah-Hartman #else 1391ab4382d2SGreg Kroah-Hartman 1392ab4382d2SGreg Kroah-Hartman #define OMAP_CONSOLE NULL 1393ab4382d2SGreg Kroah-Hartman 1394ab4382d2SGreg Kroah-Hartman static inline void serial_omap_add_console_port(struct uart_omap_port *up) 1395ab4382d2SGreg Kroah-Hartman {} 1396ab4382d2SGreg Kroah-Hartman 1397ab4382d2SGreg Kroah-Hartman #endif 1398ab4382d2SGreg Kroah-Hartman 13994a0ac0f5SMark Jackson /* Enable or disable the rs485 support */ 1400dadd7ecbSRicardo Ribalda Delgado static int 1401308bbc9aSPeter Hurley serial_omap_config_rs485(struct uart_port *port, struct serial_rs485 *rs485) 14024a0ac0f5SMark Jackson { 14034a0ac0f5SMark Jackson struct uart_omap_port *up = to_uart_omap_port(port); 14044a0ac0f5SMark Jackson unsigned int mode; 14054a0ac0f5SMark Jackson int val; 14064a0ac0f5SMark Jackson 14074a0ac0f5SMark Jackson pm_runtime_get_sync(up->dev); 14084a0ac0f5SMark Jackson 14094a0ac0f5SMark Jackson /* Disable interrupts from this port */ 14104a0ac0f5SMark Jackson mode = up->ier; 14114a0ac0f5SMark Jackson up->ier = 0; 14124a0ac0f5SMark Jackson serial_out(up, UART_IER, 0); 14134a0ac0f5SMark Jackson 1414308bbc9aSPeter Hurley /* Clamp the delays to [0, 100ms] */ 1415308bbc9aSPeter Hurley rs485->delay_rts_before_send = min(rs485->delay_rts_before_send, 100U); 1416308bbc9aSPeter Hurley rs485->delay_rts_after_send = min(rs485->delay_rts_after_send, 100U); 1417308bbc9aSPeter Hurley 14184a0ac0f5SMark Jackson /* store new config */ 1419308bbc9aSPeter Hurley port->rs485 = *rs485; 14204a0ac0f5SMark Jackson 14214a0ac0f5SMark Jackson /* 14224a0ac0f5SMark Jackson * Just as a precaution, only allow rs485 14234a0ac0f5SMark Jackson * to be enabled if the gpio pin is valid 14244a0ac0f5SMark Jackson */ 14254a0ac0f5SMark Jackson if (gpio_is_valid(up->rts_gpio)) { 14264a0ac0f5SMark Jackson /* enable / disable rts */ 1427dadd7ecbSRicardo Ribalda Delgado val = (port->rs485.flags & SER_RS485_ENABLED) ? 14284a0ac0f5SMark Jackson SER_RS485_RTS_AFTER_SEND : SER_RS485_RTS_ON_SEND; 1429dadd7ecbSRicardo Ribalda Delgado val = (port->rs485.flags & val) ? 1 : 0; 14304a0ac0f5SMark Jackson gpio_set_value(up->rts_gpio, val); 14314a0ac0f5SMark Jackson } else 1432dadd7ecbSRicardo Ribalda Delgado port->rs485.flags &= ~SER_RS485_ENABLED; 14334a0ac0f5SMark Jackson 14344a0ac0f5SMark Jackson /* Enable interrupts */ 14354a0ac0f5SMark Jackson up->ier = mode; 14364a0ac0f5SMark Jackson serial_out(up, UART_IER, up->ier); 14374a0ac0f5SMark Jackson 1438018e7448SPhilippe Proulx /* If RS-485 is disabled, make sure the THR interrupt is fired when 1439018e7448SPhilippe Proulx * TX FIFO is below the trigger level. 1440018e7448SPhilippe Proulx */ 1441dadd7ecbSRicardo Ribalda Delgado if (!(port->rs485.flags & SER_RS485_ENABLED) && 1442018e7448SPhilippe Proulx (up->scr & OMAP_UART_SCR_TX_EMPTY)) { 1443018e7448SPhilippe Proulx up->scr &= ~OMAP_UART_SCR_TX_EMPTY; 1444018e7448SPhilippe Proulx serial_out(up, UART_OMAP_SCR, up->scr); 1445018e7448SPhilippe Proulx } 1446018e7448SPhilippe Proulx 14474a0ac0f5SMark Jackson pm_runtime_mark_last_busy(up->dev); 14484a0ac0f5SMark Jackson pm_runtime_put_autosuspend(up->dev); 14494a0ac0f5SMark Jackson 14504a0ac0f5SMark Jackson return 0; 14514a0ac0f5SMark Jackson } 14524a0ac0f5SMark Jackson 14532331e068SBhumika Goyal static const struct uart_ops serial_omap_pops = { 1454ab4382d2SGreg Kroah-Hartman .tx_empty = serial_omap_tx_empty, 1455ab4382d2SGreg Kroah-Hartman .set_mctrl = serial_omap_set_mctrl, 1456ab4382d2SGreg Kroah-Hartman .get_mctrl = serial_omap_get_mctrl, 1457ab4382d2SGreg Kroah-Hartman .stop_tx = serial_omap_stop_tx, 1458ab4382d2SGreg Kroah-Hartman .start_tx = serial_omap_start_tx, 14593af08bd7SRussell King .throttle = serial_omap_throttle, 14603af08bd7SRussell King .unthrottle = serial_omap_unthrottle, 1461ab4382d2SGreg Kroah-Hartman .stop_rx = serial_omap_stop_rx, 1462ab4382d2SGreg Kroah-Hartman .enable_ms = serial_omap_enable_ms, 1463ab4382d2SGreg Kroah-Hartman .break_ctl = serial_omap_break_ctl, 1464ab4382d2SGreg Kroah-Hartman .startup = serial_omap_startup, 1465ab4382d2SGreg Kroah-Hartman .shutdown = serial_omap_shutdown, 1466ab4382d2SGreg Kroah-Hartman .set_termios = serial_omap_set_termios, 1467ab4382d2SGreg Kroah-Hartman .pm = serial_omap_pm, 1468ab4382d2SGreg Kroah-Hartman .type = serial_omap_type, 1469ab4382d2SGreg Kroah-Hartman .release_port = serial_omap_release_port, 1470ab4382d2SGreg Kroah-Hartman .request_port = serial_omap_request_port, 1471ab4382d2SGreg Kroah-Hartman .config_port = serial_omap_config_port, 1472ab4382d2SGreg Kroah-Hartman .verify_port = serial_omap_verify_port, 1473ab4382d2SGreg Kroah-Hartman #ifdef CONFIG_CONSOLE_POLL 1474ab4382d2SGreg Kroah-Hartman .poll_put_char = serial_omap_poll_put_char, 1475ab4382d2SGreg Kroah-Hartman .poll_get_char = serial_omap_poll_get_char, 1476ab4382d2SGreg Kroah-Hartman #endif 1477ab4382d2SGreg Kroah-Hartman }; 1478ab4382d2SGreg Kroah-Hartman 1479ab4382d2SGreg Kroah-Hartman static struct uart_driver serial_omap_reg = { 1480ab4382d2SGreg Kroah-Hartman .owner = THIS_MODULE, 1481ab4382d2SGreg Kroah-Hartman .driver_name = "OMAP-SERIAL", 1482ab4382d2SGreg Kroah-Hartman .dev_name = OMAP_SERIAL_NAME, 1483ab4382d2SGreg Kroah-Hartman .nr = OMAP_MAX_HSUART_PORTS, 1484ab4382d2SGreg Kroah-Hartman .cons = OMAP_CONSOLE, 1485ab4382d2SGreg Kroah-Hartman }; 1486ab4382d2SGreg Kroah-Hartman 14873bc4f0d8SShubhrajyoti D #ifdef CONFIG_PM_SLEEP 1488ddd85e22SSourav Poddar static int serial_omap_prepare(struct device *dev) 1489ddd85e22SSourav Poddar { 1490ddd85e22SSourav Poddar struct uart_omap_port *up = dev_get_drvdata(dev); 1491ddd85e22SSourav Poddar 1492ddd85e22SSourav Poddar up->is_suspending = true; 1493ddd85e22SSourav Poddar 1494ddd85e22SSourav Poddar return 0; 1495ddd85e22SSourav Poddar } 1496ddd85e22SSourav Poddar 1497ddd85e22SSourav Poddar static void serial_omap_complete(struct device *dev) 1498ddd85e22SSourav Poddar { 1499ddd85e22SSourav Poddar struct uart_omap_port *up = dev_get_drvdata(dev); 1500ddd85e22SSourav Poddar 1501ddd85e22SSourav Poddar up->is_suspending = false; 1502ddd85e22SSourav Poddar } 1503ddd85e22SSourav Poddar 1504fcdca757SGovindraj.R static int serial_omap_suspend(struct device *dev) 1505ab4382d2SGreg Kroah-Hartman { 1506fcdca757SGovindraj.R struct uart_omap_port *up = dev_get_drvdata(dev); 1507ab4382d2SGreg Kroah-Hartman 1508ab4382d2SGreg Kroah-Hartman uart_suspend_port(&serial_omap_reg, &up->port); 150943829731STejun Heo flush_work(&up->qos_work); 15102fd14964SGovindraj.R 1511d758c9c1STony Lindgren if (device_may_wakeup(dev)) 1512d758c9c1STony Lindgren serial_omap_enable_wakeup(up, true); 1513d758c9c1STony Lindgren else 1514d758c9c1STony Lindgren serial_omap_enable_wakeup(up, false); 1515d758c9c1STony Lindgren 1516ab4382d2SGreg Kroah-Hartman return 0; 1517ab4382d2SGreg Kroah-Hartman } 1518ab4382d2SGreg Kroah-Hartman 1519fcdca757SGovindraj.R static int serial_omap_resume(struct device *dev) 1520ab4382d2SGreg Kroah-Hartman { 1521fcdca757SGovindraj.R struct uart_omap_port *up = dev_get_drvdata(dev); 1522ab4382d2SGreg Kroah-Hartman 1523d758c9c1STony Lindgren if (device_may_wakeup(dev)) 1524d758c9c1STony Lindgren serial_omap_enable_wakeup(up, false); 1525d758c9c1STony Lindgren 1526ab4382d2SGreg Kroah-Hartman uart_resume_port(&serial_omap_reg, &up->port); 1527ac57e7f3SSourav Poddar 1528ab4382d2SGreg Kroah-Hartman return 0; 1529ab4382d2SGreg Kroah-Hartman } 1530ddd85e22SSourav Poddar #else 1531ddd85e22SSourav Poddar #define serial_omap_prepare NULL 15322cb5a2faSArnd Bergmann #define serial_omap_complete NULL 1533ddd85e22SSourav Poddar #endif /* CONFIG_PM_SLEEP */ 1534ab4382d2SGreg Kroah-Hartman 15359671f099SBill Pemberton static void omap_serial_fill_features_erratas(struct uart_omap_port *up) 15367c77c8deSGovindraj.R { 15377c77c8deSGovindraj.R u32 mvr, scheme; 15387c77c8deSGovindraj.R u16 revision, major, minor; 15397c77c8deSGovindraj.R 154076bac198SRuchika Kharwar mvr = readl(up->port.membase + (UART_OMAP_MVER << up->port.regshift)); 15417c77c8deSGovindraj.R 15427c77c8deSGovindraj.R /* Check revision register scheme */ 15437c77c8deSGovindraj.R scheme = mvr >> OMAP_UART_MVR_SCHEME_SHIFT; 15447c77c8deSGovindraj.R 15457c77c8deSGovindraj.R switch (scheme) { 15467c77c8deSGovindraj.R case 0: /* Legacy Scheme: OMAP2/3 */ 15477c77c8deSGovindraj.R /* MINOR_REV[0:4], MAJOR_REV[4:7] */ 15487c77c8deSGovindraj.R major = (mvr & OMAP_UART_LEGACY_MVR_MAJ_MASK) >> 15497c77c8deSGovindraj.R OMAP_UART_LEGACY_MVR_MAJ_SHIFT; 15507c77c8deSGovindraj.R minor = (mvr & OMAP_UART_LEGACY_MVR_MIN_MASK); 15517c77c8deSGovindraj.R break; 15527c77c8deSGovindraj.R case 1: 15537c77c8deSGovindraj.R /* New Scheme: OMAP4+ */ 15547c77c8deSGovindraj.R /* MINOR_REV[0:5], MAJOR_REV[8:10] */ 15557c77c8deSGovindraj.R major = (mvr & OMAP_UART_MVR_MAJ_MASK) >> 15567c77c8deSGovindraj.R OMAP_UART_MVR_MAJ_SHIFT; 15577c77c8deSGovindraj.R minor = (mvr & OMAP_UART_MVR_MIN_MASK); 15587c77c8deSGovindraj.R break; 15597c77c8deSGovindraj.R default: 1560d8ee4ea6SFelipe Balbi dev_warn(up->dev, 15617c77c8deSGovindraj.R "Unknown %s revision, defaulting to highest\n", 15627c77c8deSGovindraj.R up->name); 15637c77c8deSGovindraj.R /* highest possible revision */ 15647c77c8deSGovindraj.R major = 0xff; 15657c77c8deSGovindraj.R minor = 0xff; 15667c77c8deSGovindraj.R } 15677c77c8deSGovindraj.R 15687c77c8deSGovindraj.R /* normalize revision for the driver */ 15697c77c8deSGovindraj.R revision = UART_BUILD_REVISION(major, minor); 15707c77c8deSGovindraj.R 15717c77c8deSGovindraj.R switch (revision) { 15727c77c8deSGovindraj.R case OMAP_UART_REV_46: 15737c77c8deSGovindraj.R up->errata |= (UART_ERRATA_i202_MDR1_ACCESS | 15747c77c8deSGovindraj.R UART_ERRATA_i291_DMA_FORCEIDLE); 15757c77c8deSGovindraj.R break; 15767c77c8deSGovindraj.R case OMAP_UART_REV_52: 15777c77c8deSGovindraj.R up->errata |= (UART_ERRATA_i202_MDR1_ACCESS | 15787c77c8deSGovindraj.R UART_ERRATA_i291_DMA_FORCEIDLE); 1579f64ffda6SGovindraj.R up->features |= OMAP_UART_WER_HAS_TX_WAKEUP; 15807c77c8deSGovindraj.R break; 15817c77c8deSGovindraj.R case OMAP_UART_REV_63: 15827c77c8deSGovindraj.R up->errata |= UART_ERRATA_i202_MDR1_ACCESS; 1583f64ffda6SGovindraj.R up->features |= OMAP_UART_WER_HAS_TX_WAKEUP; 15847c77c8deSGovindraj.R break; 15857c77c8deSGovindraj.R default: 15867c77c8deSGovindraj.R break; 15877c77c8deSGovindraj.R } 15887c77c8deSGovindraj.R } 15897c77c8deSGovindraj.R 15909671f099SBill Pemberton static struct omap_uart_port_info *of_get_uart_port_info(struct device *dev) 1591d92b0dfcSRajendra Nayak { 1592d92b0dfcSRajendra Nayak struct omap_uart_port_info *omap_up_info; 1593d92b0dfcSRajendra Nayak 1594d92b0dfcSRajendra Nayak omap_up_info = devm_kzalloc(dev, sizeof(*omap_up_info), GFP_KERNEL); 1595d92b0dfcSRajendra Nayak if (!omap_up_info) 1596d92b0dfcSRajendra Nayak return NULL; /* out of memory */ 1597d92b0dfcSRajendra Nayak 1598d92b0dfcSRajendra Nayak of_property_read_u32(dev->of_node, "clock-frequency", 1599d92b0dfcSRajendra Nayak &omap_up_info->uartclk); 16001b775de9SSebastian Reichel 16011b775de9SSebastian Reichel omap_up_info->flags = UPF_BOOT_AUTOCONF; 16021b775de9SSebastian Reichel 1603d92b0dfcSRajendra Nayak return omap_up_info; 1604d92b0dfcSRajendra Nayak } 1605d92b0dfcSRajendra Nayak 16064a0ac0f5SMark Jackson static int serial_omap_probe_rs485(struct uart_omap_port *up, 16074a0ac0f5SMark Jackson struct device_node *np) 16084a0ac0f5SMark Jackson { 1609dadd7ecbSRicardo Ribalda Delgado struct serial_rs485 *rs485conf = &up->port.rs485; 16104a0ac0f5SMark Jackson u32 rs485_delay[2]; 16114a0ac0f5SMark Jackson enum of_gpio_flags flags; 16124a0ac0f5SMark Jackson int ret; 16134a0ac0f5SMark Jackson 16144a0ac0f5SMark Jackson rs485conf->flags = 0; 16154a0ac0f5SMark Jackson up->rts_gpio = -EINVAL; 16164a0ac0f5SMark Jackson 16174a0ac0f5SMark Jackson if (!np) 16184a0ac0f5SMark Jackson return 0; 16194a0ac0f5SMark Jackson 16204a0ac0f5SMark Jackson if (of_property_read_bool(np, "rs485-rts-active-high")) 16214a0ac0f5SMark Jackson rs485conf->flags |= SER_RS485_RTS_ON_SEND; 16224a0ac0f5SMark Jackson else 16234a0ac0f5SMark Jackson rs485conf->flags |= SER_RS485_RTS_AFTER_SEND; 16244a0ac0f5SMark Jackson 16254a0ac0f5SMark Jackson /* check for tx enable gpio */ 16264a0ac0f5SMark Jackson up->rts_gpio = of_get_named_gpio_flags(np, "rts-gpio", 0, &flags); 16274a0ac0f5SMark Jackson if (gpio_is_valid(up->rts_gpio)) { 1628404dc57cSFelipe Balbi ret = devm_gpio_request(up->dev, up->rts_gpio, "omap-serial"); 16294a0ac0f5SMark Jackson if (ret < 0) 16304a0ac0f5SMark Jackson return ret; 16314a0ac0f5SMark Jackson ret = gpio_direction_output(up->rts_gpio, 16324a0ac0f5SMark Jackson flags & SER_RS485_RTS_AFTER_SEND); 16334a0ac0f5SMark Jackson if (ret < 0) 16344a0ac0f5SMark Jackson return ret; 1635a64c1a1cSMichael Grzeschik } else if (up->rts_gpio == -EPROBE_DEFER) { 1636a64c1a1cSMichael Grzeschik return -EPROBE_DEFER; 1637a64c1a1cSMichael Grzeschik } else { 16384a0ac0f5SMark Jackson up->rts_gpio = -EINVAL; 1639a64c1a1cSMichael Grzeschik } 16404a0ac0f5SMark Jackson 16414a0ac0f5SMark Jackson if (of_property_read_u32_array(np, "rs485-rts-delay", 16424a0ac0f5SMark Jackson rs485_delay, 2) == 0) { 16434a0ac0f5SMark Jackson rs485conf->delay_rts_before_send = rs485_delay[0]; 16444a0ac0f5SMark Jackson rs485conf->delay_rts_after_send = rs485_delay[1]; 16454a0ac0f5SMark Jackson } 16464a0ac0f5SMark Jackson 16474a0ac0f5SMark Jackson if (of_property_read_bool(np, "rs485-rx-during-tx")) 16484a0ac0f5SMark Jackson rs485conf->flags |= SER_RS485_RX_DURING_TX; 16494a0ac0f5SMark Jackson 16504a0ac0f5SMark Jackson if (of_property_read_bool(np, "linux,rs485-enabled-at-boot-time")) 16514a0ac0f5SMark Jackson rs485conf->flags |= SER_RS485_ENABLED; 16524a0ac0f5SMark Jackson 16534a0ac0f5SMark Jackson return 0; 16544a0ac0f5SMark Jackson } 16554a0ac0f5SMark Jackson 16569671f099SBill Pemberton static int serial_omap_probe(struct platform_device *pdev) 1657ab4382d2SGreg Kroah-Hartman { 1658574de559SJingoo Han struct omap_uart_port_info *omap_up_info = dev_get_platdata(&pdev->dev); 1659cc51638aSFelipe Balbi struct uart_omap_port *up; 1660cc51638aSFelipe Balbi struct resource *mem; 1661d044d235SFelipe Balbi void __iomem *base; 1662cc51638aSFelipe Balbi int uartirq = 0; 1663cc51638aSFelipe Balbi int wakeirq = 0; 1664cc51638aSFelipe Balbi int ret; 1665ab4382d2SGreg Kroah-Hartman 16662a0b965cSTony Lindgren /* The optional wakeirq may be specified in the board dts file */ 1667a0a490f9SVikram Pandita if (pdev->dev.of_node) { 16682a0b965cSTony Lindgren uartirq = irq_of_parse_and_map(pdev->dev.of_node, 0); 16692a0b965cSTony Lindgren if (!uartirq) 16702a0b965cSTony Lindgren return -EPROBE_DEFER; 16712a0b965cSTony Lindgren wakeirq = irq_of_parse_and_map(pdev->dev.of_node, 1); 1672d92b0dfcSRajendra Nayak omap_up_info = of_get_uart_port_info(&pdev->dev); 1673a0a490f9SVikram Pandita pdev->dev.platform_data = omap_up_info; 16742a0b965cSTony Lindgren } else { 167554af692cSFelipe Balbi uartirq = platform_get_irq(pdev, 0); 167654af692cSFelipe Balbi if (uartirq < 0) 167754af692cSFelipe Balbi return -EPROBE_DEFER; 1678a0a490f9SVikram Pandita } 1679d92b0dfcSRajendra Nayak 1680d044d235SFelipe Balbi up = devm_kzalloc(&pdev->dev, sizeof(*up), GFP_KERNEL); 1681d044d235SFelipe Balbi if (!up) 1682d044d235SFelipe Balbi return -ENOMEM; 1683ab4382d2SGreg Kroah-Hartman 1684d044d235SFelipe Balbi mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1685d044d235SFelipe Balbi base = devm_ioremap_resource(&pdev->dev, mem); 1686d044d235SFelipe Balbi if (IS_ERR(base)) 1687d044d235SFelipe Balbi return PTR_ERR(base); 1688ab4382d2SGreg Kroah-Hartman 1689d8ee4ea6SFelipe Balbi up->dev = &pdev->dev; 1690ab4382d2SGreg Kroah-Hartman up->port.dev = &pdev->dev; 1691ab4382d2SGreg Kroah-Hartman up->port.type = PORT_OMAP; 1692ab4382d2SGreg Kroah-Hartman up->port.iotype = UPIO_MEM; 16932a0b965cSTony Lindgren up->port.irq = uartirq; 1694ab4382d2SGreg Kroah-Hartman up->port.regshift = 2; 1695ab4382d2SGreg Kroah-Hartman up->port.fifosize = 64; 1696ab4382d2SGreg Kroah-Hartman up->port.ops = &serial_omap_pops; 1697ab4382d2SGreg Kroah-Hartman 1698d92b0dfcSRajendra Nayak if (pdev->dev.of_node) 16993c59958dSSebastian Andrzej Siewior ret = of_alias_get_id(pdev->dev.of_node, "serial"); 1700d92b0dfcSRajendra Nayak else 17013c59958dSSebastian Andrzej Siewior ret = pdev->id; 1702ab4382d2SGreg Kroah-Hartman 17033c59958dSSebastian Andrzej Siewior if (ret < 0) { 1704d92b0dfcSRajendra Nayak dev_err(&pdev->dev, "failed to get alias/pdev id, errno %d\n", 17053c59958dSSebastian Andrzej Siewior ret); 1706388bc262SShubhrajyoti D goto err_port_line; 1707d92b0dfcSRajendra Nayak } 17083c59958dSSebastian Andrzej Siewior up->port.line = ret; 1709d92b0dfcSRajendra Nayak 17107af0ea5dSNishanth Menon if (up->port.line >= OMAP_MAX_HSUART_PORTS) { 17117af0ea5dSNishanth Menon dev_err(&pdev->dev, "uart ID %d > MAX %d.\n", up->port.line, 17127af0ea5dSNishanth Menon OMAP_MAX_HSUART_PORTS); 17137af0ea5dSNishanth Menon ret = -ENXIO; 17147af0ea5dSNishanth Menon goto err_port_line; 17157af0ea5dSNishanth Menon } 17167af0ea5dSNishanth Menon 17171cf94d3aSDoug Kehn up->wakeirq = wakeirq; 17181cf94d3aSDoug Kehn if (!up->wakeirq) 17191cf94d3aSDoug Kehn dev_info(up->port.dev, "no wakeirq for uart%d\n", 17201cf94d3aSDoug Kehn up->port.line); 17211cf94d3aSDoug Kehn 17224a0ac0f5SMark Jackson ret = serial_omap_probe_rs485(up, pdev->dev.of_node); 17234a0ac0f5SMark Jackson if (ret < 0) 17244a0ac0f5SMark Jackson goto err_rs485; 17254a0ac0f5SMark Jackson 1726d92b0dfcSRajendra Nayak sprintf(up->name, "OMAP UART%d", up->port.line); 1727edd70ad7SGovindraj.R up->port.mapbase = mem->start; 1728d044d235SFelipe Balbi up->port.membase = base; 1729ab4382d2SGreg Kroah-Hartman up->port.flags = omap_up_info->flags; 1730ab4382d2SGreg Kroah-Hartman up->port.uartclk = omap_up_info->uartclk; 1731dadd7ecbSRicardo Ribalda Delgado up->port.rs485_config = serial_omap_config_rs485; 17328fe789dcSRajendra Nayak if (!up->port.uartclk) { 17338fe789dcSRajendra Nayak up->port.uartclk = DEFAULT_CLK_SPEED; 1734e5f9bf72SPhilippe Proulx dev_warn(&pdev->dev, 173580d8611dSPhilippe Proulx "No clock speed specified: using default: %d\n", 1736e5f9bf72SPhilippe Proulx DEFAULT_CLK_SPEED); 17378fe789dcSRajendra Nayak } 1738ab4382d2SGreg Kroah-Hartman 17392fd14964SGovindraj.R up->latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE; 17402fd14964SGovindraj.R up->calc_latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE; 17412fd14964SGovindraj.R pm_qos_add_request(&up->pm_qos_request, 17422fd14964SGovindraj.R PM_QOS_CPU_DMA_LATENCY, up->latency); 17432fd14964SGovindraj.R INIT_WORK(&up->qos_work, serial_omap_uart_qos_work); 17442fd14964SGovindraj.R 174593220dccSFelipe Balbi platform_set_drvdata(pdev, up); 1746a630fbfbSTony Lindgren if (omap_up_info->autosuspend_timeout == 0) 1747a630fbfbSTony Lindgren omap_up_info->autosuspend_timeout = -1; 17485b6acc79SFelipe Balbi 1749a630fbfbSTony Lindgren device_init_wakeup(up->dev, true); 1750fcdca757SGovindraj.R pm_runtime_use_autosuspend(&pdev->dev); 1751fcdca757SGovindraj.R pm_runtime_set_autosuspend_delay(&pdev->dev, 1752c86845dbSDeepak K omap_up_info->autosuspend_timeout); 1753fcdca757SGovindraj.R 1754fcdca757SGovindraj.R pm_runtime_irq_safe(&pdev->dev); 17553026d14aSGrygorii Strashko pm_runtime_enable(&pdev->dev); 17563026d14aSGrygorii Strashko 1757fcdca757SGovindraj.R pm_runtime_get_sync(&pdev->dev); 1758fcdca757SGovindraj.R 17597c77c8deSGovindraj.R omap_serial_fill_features_erratas(up); 17607c77c8deSGovindraj.R 1761ba77433dSRajendra Nayak ui[up->port.line] = up; 1762ab4382d2SGreg Kroah-Hartman serial_omap_add_console_port(up); 1763ab4382d2SGreg Kroah-Hartman 1764ab4382d2SGreg Kroah-Hartman ret = uart_add_one_port(&serial_omap_reg, &up->port); 1765ab4382d2SGreg Kroah-Hartman if (ret != 0) 1766388bc262SShubhrajyoti D goto err_add_port; 1767ab4382d2SGreg Kroah-Hartman 1768660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 1769660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 1770ab4382d2SGreg Kroah-Hartman return 0; 1771388bc262SShubhrajyoti D 1772388bc262SShubhrajyoti D err_add_port: 177377e6fe7fSJohan Hovold pm_runtime_dont_use_autosuspend(&pdev->dev); 177477e6fe7fSJohan Hovold pm_runtime_put_sync(&pdev->dev); 1775388bc262SShubhrajyoti D pm_runtime_disable(&pdev->dev); 177666cf1d84SSemen Protsenko pm_qos_remove_request(&up->pm_qos_request); 177766cf1d84SSemen Protsenko device_init_wakeup(up->dev, false); 17784a0ac0f5SMark Jackson err_rs485: 1779388bc262SShubhrajyoti D err_port_line: 1780ab4382d2SGreg Kroah-Hartman return ret; 1781ab4382d2SGreg Kroah-Hartman } 1782ab4382d2SGreg Kroah-Hartman 1783ae8d8a14SBill Pemberton static int serial_omap_remove(struct platform_device *dev) 1784ab4382d2SGreg Kroah-Hartman { 1785ab4382d2SGreg Kroah-Hartman struct uart_omap_port *up = platform_get_drvdata(dev); 1786ab4382d2SGreg Kroah-Hartman 1787099bd73dSJohan Hovold pm_runtime_get_sync(up->dev); 1788099bd73dSJohan Hovold 1789099bd73dSJohan Hovold uart_remove_one_port(&serial_omap_reg, &up->port); 1790099bd73dSJohan Hovold 1791099bd73dSJohan Hovold pm_runtime_dont_use_autosuspend(up->dev); 17927e9c8e7dSFelipe Balbi pm_runtime_put_sync(up->dev); 1793d8ee4ea6SFelipe Balbi pm_runtime_disable(up->dev); 17942fd14964SGovindraj.R pm_qos_remove_request(&up->pm_qos_request); 179593a2e470SSanjay Singh Rawat device_init_wakeup(&dev->dev, false); 1796fcdca757SGovindraj.R 1797ab4382d2SGreg Kroah-Hartman return 0; 1798ab4382d2SGreg Kroah-Hartman } 1799ab4382d2SGreg Kroah-Hartman 180094734749SGovindraj.R /* 180194734749SGovindraj.R * Work Around for Errata i202 (2430, 3430, 3630, 4430 and 4460) 180294734749SGovindraj.R * The access to uart register after MDR1 Access 180394734749SGovindraj.R * causes UART to corrupt data. 180494734749SGovindraj.R * 180594734749SGovindraj.R * Need a delay = 180694734749SGovindraj.R * 5 L4 clock cycles + 5 UART functional clock cycle (@48MHz = ~0.2uS) 180794734749SGovindraj.R * give 10 times as much 180894734749SGovindraj.R */ 180994734749SGovindraj.R static void serial_omap_mdr1_errataset(struct uart_omap_port *up, u8 mdr1) 181094734749SGovindraj.R { 181194734749SGovindraj.R u8 timeout = 255; 181294734749SGovindraj.R 181394734749SGovindraj.R serial_out(up, UART_OMAP_MDR1, mdr1); 181494734749SGovindraj.R udelay(2); 181594734749SGovindraj.R serial_out(up, UART_FCR, up->fcr | UART_FCR_CLEAR_XMIT | 181694734749SGovindraj.R UART_FCR_CLEAR_RCVR); 181794734749SGovindraj.R /* 181894734749SGovindraj.R * Wait for FIFO to empty: when empty, RX_FIFO_E bit is 0 and 181994734749SGovindraj.R * TX_FIFO_E bit is 1. 182094734749SGovindraj.R */ 182194734749SGovindraj.R while (UART_LSR_THRE != (serial_in(up, UART_LSR) & 182294734749SGovindraj.R (UART_LSR_THRE | UART_LSR_DR))) { 182394734749SGovindraj.R timeout--; 182494734749SGovindraj.R if (!timeout) { 182594734749SGovindraj.R /* Should *never* happen. we warn and carry on */ 1826d8ee4ea6SFelipe Balbi dev_crit(up->dev, "Errata i202: timedout %x\n", 182794734749SGovindraj.R serial_in(up, UART_LSR)); 182894734749SGovindraj.R break; 182994734749SGovindraj.R } 183094734749SGovindraj.R udelay(1); 183194734749SGovindraj.R } 183294734749SGovindraj.R } 183394734749SGovindraj.R 1834d39fe4e5SRafael J. Wysocki #ifdef CONFIG_PM 18359f9ac1e8SGovindraj.R static void serial_omap_restore_context(struct uart_omap_port *up) 18369f9ac1e8SGovindraj.R { 183794734749SGovindraj.R if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) 183894734749SGovindraj.R serial_omap_mdr1_errataset(up, UART_OMAP_MDR1_DISABLE); 183994734749SGovindraj.R else 18409f9ac1e8SGovindraj.R serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE); 184194734749SGovindraj.R 18429f9ac1e8SGovindraj.R serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */ 18439f9ac1e8SGovindraj.R serial_out(up, UART_EFR, UART_EFR_ECB); 18449f9ac1e8SGovindraj.R serial_out(up, UART_LCR, 0x0); /* Operational mode */ 18459f9ac1e8SGovindraj.R serial_out(up, UART_IER, 0x0); 18469f9ac1e8SGovindraj.R serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */ 1847c538d20cSGovindraj.R serial_out(up, UART_DLL, up->dll); 1848c538d20cSGovindraj.R serial_out(up, UART_DLM, up->dlh); 18499f9ac1e8SGovindraj.R serial_out(up, UART_LCR, 0x0); /* Operational mode */ 18509f9ac1e8SGovindraj.R serial_out(up, UART_IER, up->ier); 18519f9ac1e8SGovindraj.R serial_out(up, UART_FCR, up->fcr); 18529f9ac1e8SGovindraj.R serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 18539f9ac1e8SGovindraj.R serial_out(up, UART_MCR, up->mcr); 18549f9ac1e8SGovindraj.R serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */ 1855c538d20cSGovindraj.R serial_out(up, UART_OMAP_SCR, up->scr); 18569f9ac1e8SGovindraj.R serial_out(up, UART_EFR, up->efr); 18579f9ac1e8SGovindraj.R serial_out(up, UART_LCR, up->lcr); 185894734749SGovindraj.R if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) 185994734749SGovindraj.R serial_omap_mdr1_errataset(up, up->mdr1); 186094734749SGovindraj.R else 1861c538d20cSGovindraj.R serial_out(up, UART_OMAP_MDR1, up->mdr1); 1862f64ffda6SGovindraj.R serial_out(up, UART_OMAP_WER, up->wer); 18639f9ac1e8SGovindraj.R } 18649f9ac1e8SGovindraj.R 1865fcdca757SGovindraj.R static int serial_omap_runtime_suspend(struct device *dev) 1866fcdca757SGovindraj.R { 1867ec3bebc6SGovindraj.R struct uart_omap_port *up = dev_get_drvdata(dev); 1868ec3bebc6SGovindraj.R 18697f25301dSWei Yongjun if (!up) 18707f25301dSWei Yongjun return -EINVAL; 18717f25301dSWei Yongjun 1872ddd85e22SSourav Poddar /* 1873ddd85e22SSourav Poddar * When using 'no_console_suspend', the console UART must not be 1874ddd85e22SSourav Poddar * suspended. Since driver suspend is managed by runtime suspend, 1875ddd85e22SSourav Poddar * preventing runtime suspend (by returning error) will keep device 1876ddd85e22SSourav Poddar * active during suspend. 1877ddd85e22SSourav Poddar */ 1878ddd85e22SSourav Poddar if (up->is_suspending && !console_suspend_enabled && 1879ddd85e22SSourav Poddar uart_console(&up->port)) 1880ddd85e22SSourav Poddar return -EBUSY; 1881ddd85e22SSourav Poddar 1882e5b57c03SFelipe Balbi up->context_loss_cnt = serial_omap_get_context_loss_count(up); 1883ec3bebc6SGovindraj.R 1884e5b57c03SFelipe Balbi serial_omap_enable_wakeup(up, true); 188562f3ec5fSGovindraj.R 18862fd14964SGovindraj.R up->latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE; 18872fd14964SGovindraj.R schedule_work(&up->qos_work); 18882fd14964SGovindraj.R 1889fcdca757SGovindraj.R return 0; 1890fcdca757SGovindraj.R } 1891fcdca757SGovindraj.R 1892fcdca757SGovindraj.R static int serial_omap_runtime_resume(struct device *dev) 1893fcdca757SGovindraj.R { 18949f9ac1e8SGovindraj.R struct uart_omap_port *up = dev_get_drvdata(dev); 18959f9ac1e8SGovindraj.R 189639aee51dSShubhrajyoti D int loss_cnt = serial_omap_get_context_loss_count(up); 1897ec3bebc6SGovindraj.R 1898d758c9c1STony Lindgren serial_omap_enable_wakeup(up, false); 1899d758c9c1STony Lindgren 190039aee51dSShubhrajyoti D if (loss_cnt < 0) { 1901a630fbfbSTony Lindgren dev_dbg(dev, "serial_omap_get_context_loss_count failed : %d\n", 190239aee51dSShubhrajyoti D loss_cnt); 19039f9ac1e8SGovindraj.R serial_omap_restore_context(up); 190439aee51dSShubhrajyoti D } else if (up->context_loss_cnt != loss_cnt) { 190539aee51dSShubhrajyoti D serial_omap_restore_context(up); 190639aee51dSShubhrajyoti D } 19072fd14964SGovindraj.R up->latency = up->calc_latency; 19082fd14964SGovindraj.R schedule_work(&up->qos_work); 19099f9ac1e8SGovindraj.R 1910fcdca757SGovindraj.R return 0; 1911fcdca757SGovindraj.R } 1912fcdca757SGovindraj.R #endif 1913fcdca757SGovindraj.R 1914fcdca757SGovindraj.R static const struct dev_pm_ops serial_omap_dev_pm_ops = { 1915fcdca757SGovindraj.R SET_SYSTEM_SLEEP_PM_OPS(serial_omap_suspend, serial_omap_resume) 1916fcdca757SGovindraj.R SET_RUNTIME_PM_OPS(serial_omap_runtime_suspend, 1917fcdca757SGovindraj.R serial_omap_runtime_resume, NULL) 1918ddd85e22SSourav Poddar .prepare = serial_omap_prepare, 1919ddd85e22SSourav Poddar .complete = serial_omap_complete, 1920fcdca757SGovindraj.R }; 1921fcdca757SGovindraj.R 1922d92b0dfcSRajendra Nayak #if defined(CONFIG_OF) 1923d92b0dfcSRajendra Nayak static const struct of_device_id omap_serial_of_match[] = { 1924d92b0dfcSRajendra Nayak { .compatible = "ti,omap2-uart" }, 1925d92b0dfcSRajendra Nayak { .compatible = "ti,omap3-uart" }, 1926d92b0dfcSRajendra Nayak { .compatible = "ti,omap4-uart" }, 1927d92b0dfcSRajendra Nayak {}, 1928d92b0dfcSRajendra Nayak }; 1929d92b0dfcSRajendra Nayak MODULE_DEVICE_TABLE(of, omap_serial_of_match); 1930d92b0dfcSRajendra Nayak #endif 1931d92b0dfcSRajendra Nayak 1932ab4382d2SGreg Kroah-Hartman static struct platform_driver serial_omap_driver = { 1933ab4382d2SGreg Kroah-Hartman .probe = serial_omap_probe, 19342d47b716SBill Pemberton .remove = serial_omap_remove, 1935ab4382d2SGreg Kroah-Hartman .driver = { 19361349ba02SJean Delvare .name = OMAP_SERIAL_DRIVER_NAME, 1937fcdca757SGovindraj.R .pm = &serial_omap_dev_pm_ops, 1938d92b0dfcSRajendra Nayak .of_match_table = of_match_ptr(omap_serial_of_match), 1939ab4382d2SGreg Kroah-Hartman }, 1940ab4382d2SGreg Kroah-Hartman }; 1941ab4382d2SGreg Kroah-Hartman 1942ab4382d2SGreg Kroah-Hartman static int __init serial_omap_init(void) 1943ab4382d2SGreg Kroah-Hartman { 1944ab4382d2SGreg Kroah-Hartman int ret; 1945ab4382d2SGreg Kroah-Hartman 1946ab4382d2SGreg Kroah-Hartman ret = uart_register_driver(&serial_omap_reg); 1947ab4382d2SGreg Kroah-Hartman if (ret != 0) 1948ab4382d2SGreg Kroah-Hartman return ret; 1949ab4382d2SGreg Kroah-Hartman ret = platform_driver_register(&serial_omap_driver); 1950ab4382d2SGreg Kroah-Hartman if (ret != 0) 1951ab4382d2SGreg Kroah-Hartman uart_unregister_driver(&serial_omap_reg); 1952ab4382d2SGreg Kroah-Hartman return ret; 1953ab4382d2SGreg Kroah-Hartman } 1954ab4382d2SGreg Kroah-Hartman 1955ab4382d2SGreg Kroah-Hartman static void __exit serial_omap_exit(void) 1956ab4382d2SGreg Kroah-Hartman { 1957ab4382d2SGreg Kroah-Hartman platform_driver_unregister(&serial_omap_driver); 1958ab4382d2SGreg Kroah-Hartman uart_unregister_driver(&serial_omap_reg); 1959ab4382d2SGreg Kroah-Hartman } 1960ab4382d2SGreg Kroah-Hartman 1961ab4382d2SGreg Kroah-Hartman module_init(serial_omap_init); 1962ab4382d2SGreg Kroah-Hartman module_exit(serial_omap_exit); 1963ab4382d2SGreg Kroah-Hartman 1964ab4382d2SGreg Kroah-Hartman MODULE_DESCRIPTION("OMAP High Speed UART driver"); 1965ab4382d2SGreg Kroah-Hartman MODULE_LICENSE("GPL"); 1966ab4382d2SGreg Kroah-Hartman MODULE_AUTHOR("Texas Instruments Inc"); 1967