1ab4382d2SGreg Kroah-Hartman /* 2ab4382d2SGreg Kroah-Hartman * Driver for OMAP-UART controller. 3ab4382d2SGreg Kroah-Hartman * Based on drivers/serial/8250.c 4ab4382d2SGreg Kroah-Hartman * 5ab4382d2SGreg Kroah-Hartman * Copyright (C) 2010 Texas Instruments. 6ab4382d2SGreg Kroah-Hartman * 7ab4382d2SGreg Kroah-Hartman * Authors: 8ab4382d2SGreg Kroah-Hartman * Govindraj R <govindraj.raja@ti.com> 9ab4382d2SGreg Kroah-Hartman * Thara Gopinath <thara@ti.com> 10ab4382d2SGreg Kroah-Hartman * 11ab4382d2SGreg Kroah-Hartman * This program is free software; you can redistribute it and/or modify 12ab4382d2SGreg Kroah-Hartman * it under the terms of the GNU General Public License as published by 13ab4382d2SGreg Kroah-Hartman * the Free Software Foundation; either version 2 of the License, or 14ab4382d2SGreg Kroah-Hartman * (at your option) any later version. 15ab4382d2SGreg Kroah-Hartman * 1625985edcSLucas De Marchi * Note: This driver is made separate from 8250 driver as we cannot 17ab4382d2SGreg Kroah-Hartman * over load 8250 driver with omap platform specific configuration for 18ab4382d2SGreg Kroah-Hartman * features like DMA, it makes easier to implement features like DMA and 19ab4382d2SGreg Kroah-Hartman * hardware flow control and software flow control configuration with 20ab4382d2SGreg Kroah-Hartman * this driver as required for the omap-platform. 21ab4382d2SGreg Kroah-Hartman */ 22ab4382d2SGreg Kroah-Hartman 23364a6eceSThomas Weber #if defined(CONFIG_SERIAL_OMAP_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) 24364a6eceSThomas Weber #define SUPPORT_SYSRQ 25364a6eceSThomas Weber #endif 26364a6eceSThomas Weber 27ab4382d2SGreg Kroah-Hartman #include <linux/module.h> 28ab4382d2SGreg Kroah-Hartman #include <linux/init.h> 29ab4382d2SGreg Kroah-Hartman #include <linux/console.h> 30ab4382d2SGreg Kroah-Hartman #include <linux/serial_reg.h> 31ab4382d2SGreg Kroah-Hartman #include <linux/delay.h> 32ab4382d2SGreg Kroah-Hartman #include <linux/slab.h> 33ab4382d2SGreg Kroah-Hartman #include <linux/tty.h> 34ab4382d2SGreg Kroah-Hartman #include <linux/tty_flip.h> 35ab4382d2SGreg Kroah-Hartman #include <linux/io.h> 36ab4382d2SGreg Kroah-Hartman #include <linux/clk.h> 37ab4382d2SGreg Kroah-Hartman #include <linux/serial_core.h> 38ab4382d2SGreg Kroah-Hartman #include <linux/irq.h> 39fcdca757SGovindraj.R #include <linux/pm_runtime.h> 40d92b0dfcSRajendra Nayak #include <linux/of.h> 419574f36fSNeilBrown #include <linux/gpio.h> 42ab4382d2SGreg Kroah-Hartman 43ab4382d2SGreg Kroah-Hartman #include <plat/dmtimer.h> 44ab4382d2SGreg Kroah-Hartman #include <plat/omap-serial.h> 45ab4382d2SGreg Kroah-Hartman 467c77c8deSGovindraj.R #define UART_BUILD_REVISION(x, y) (((x) << 8) | (y)) 477c77c8deSGovindraj.R 487c77c8deSGovindraj.R #define OMAP_UART_REV_42 0x0402 497c77c8deSGovindraj.R #define OMAP_UART_REV_46 0x0406 507c77c8deSGovindraj.R #define OMAP_UART_REV_52 0x0502 517c77c8deSGovindraj.R #define OMAP_UART_REV_63 0x0603 527c77c8deSGovindraj.R 538fe789dcSRajendra Nayak #define DEFAULT_CLK_SPEED 48000000 /* 48Mhz*/ 548fe789dcSRajendra Nayak 550ba5f668SPaul Walmsley /* SCR register bitmasks */ 560ba5f668SPaul Walmsley #define OMAP_UART_SCR_RX_TRIG_GRANU1_MASK (1 << 7) 570ba5f668SPaul Walmsley 580ba5f668SPaul Walmsley /* FCR register bitmasks */ 590ba5f668SPaul Walmsley #define OMAP_UART_FCR_RX_FIFO_TRIG_SHIFT 6 600ba5f668SPaul Walmsley #define OMAP_UART_FCR_RX_FIFO_TRIG_MASK (0x3 << 6) 610ba5f668SPaul Walmsley 627c77c8deSGovindraj.R /* MVR register bitmasks */ 637c77c8deSGovindraj.R #define OMAP_UART_MVR_SCHEME_SHIFT 30 647c77c8deSGovindraj.R 657c77c8deSGovindraj.R #define OMAP_UART_LEGACY_MVR_MAJ_MASK 0xf0 667c77c8deSGovindraj.R #define OMAP_UART_LEGACY_MVR_MAJ_SHIFT 4 677c77c8deSGovindraj.R #define OMAP_UART_LEGACY_MVR_MIN_MASK 0x0f 687c77c8deSGovindraj.R 697c77c8deSGovindraj.R #define OMAP_UART_MVR_MAJ_MASK 0x700 707c77c8deSGovindraj.R #define OMAP_UART_MVR_MAJ_SHIFT 8 717c77c8deSGovindraj.R #define OMAP_UART_MVR_MIN_MASK 0x3f 727c77c8deSGovindraj.R 73ab4382d2SGreg Kroah-Hartman static struct uart_omap_port *ui[OMAP_MAX_HSUART_PORTS]; 74ab4382d2SGreg Kroah-Hartman 75ab4382d2SGreg Kroah-Hartman /* Forward declaration of functions */ 7694734749SGovindraj.R static void serial_omap_mdr1_errataset(struct uart_omap_port *up, u8 mdr1); 77ab4382d2SGreg Kroah-Hartman 782fd14964SGovindraj.R static struct workqueue_struct *serial_omap_uart_wq; 79ab4382d2SGreg Kroah-Hartman 80ab4382d2SGreg Kroah-Hartman static inline unsigned int serial_in(struct uart_omap_port *up, int offset) 81ab4382d2SGreg Kroah-Hartman { 82ab4382d2SGreg Kroah-Hartman offset <<= up->port.regshift; 83ab4382d2SGreg Kroah-Hartman return readw(up->port.membase + offset); 84ab4382d2SGreg Kroah-Hartman } 85ab4382d2SGreg Kroah-Hartman 86ab4382d2SGreg Kroah-Hartman static inline void serial_out(struct uart_omap_port *up, int offset, int value) 87ab4382d2SGreg Kroah-Hartman { 88ab4382d2SGreg Kroah-Hartman offset <<= up->port.regshift; 89ab4382d2SGreg Kroah-Hartman writew(value, up->port.membase + offset); 90ab4382d2SGreg Kroah-Hartman } 91ab4382d2SGreg Kroah-Hartman 92ab4382d2SGreg Kroah-Hartman static inline void serial_omap_clear_fifos(struct uart_omap_port *up) 93ab4382d2SGreg Kroah-Hartman { 94ab4382d2SGreg Kroah-Hartman serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO); 95ab4382d2SGreg Kroah-Hartman serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | 96ab4382d2SGreg Kroah-Hartman UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); 97ab4382d2SGreg Kroah-Hartman serial_out(up, UART_FCR, 0); 98ab4382d2SGreg Kroah-Hartman } 99ab4382d2SGreg Kroah-Hartman 100e5b57c03SFelipe Balbi static int serial_omap_get_context_loss_count(struct uart_omap_port *up) 101e5b57c03SFelipe Balbi { 102d8ee4ea6SFelipe Balbi struct omap_uart_port_info *pdata = up->dev->platform_data; 103e5b57c03SFelipe Balbi 104e5b57c03SFelipe Balbi if (!pdata->get_context_loss_count) 105e5b57c03SFelipe Balbi return 0; 106e5b57c03SFelipe Balbi 107d8ee4ea6SFelipe Balbi return pdata->get_context_loss_count(up->dev); 108e5b57c03SFelipe Balbi } 109e5b57c03SFelipe Balbi 110e5b57c03SFelipe Balbi static void serial_omap_set_forceidle(struct uart_omap_port *up) 111e5b57c03SFelipe Balbi { 112d8ee4ea6SFelipe Balbi struct omap_uart_port_info *pdata = up->dev->platform_data; 113e5b57c03SFelipe Balbi 114e5b57c03SFelipe Balbi if (pdata->set_forceidle) 115d8ee4ea6SFelipe Balbi pdata->set_forceidle(up->dev); 116e5b57c03SFelipe Balbi } 117e5b57c03SFelipe Balbi 118e5b57c03SFelipe Balbi static void serial_omap_set_noidle(struct uart_omap_port *up) 119e5b57c03SFelipe Balbi { 120d8ee4ea6SFelipe Balbi struct omap_uart_port_info *pdata = up->dev->platform_data; 121e5b57c03SFelipe Balbi 122e5b57c03SFelipe Balbi if (pdata->set_noidle) 123d8ee4ea6SFelipe Balbi pdata->set_noidle(up->dev); 124e5b57c03SFelipe Balbi } 125e5b57c03SFelipe Balbi 126e5b57c03SFelipe Balbi static void serial_omap_enable_wakeup(struct uart_omap_port *up, bool enable) 127e5b57c03SFelipe Balbi { 128d8ee4ea6SFelipe Balbi struct omap_uart_port_info *pdata = up->dev->platform_data; 129e5b57c03SFelipe Balbi 130e5b57c03SFelipe Balbi if (pdata->enable_wakeup) 131d8ee4ea6SFelipe Balbi pdata->enable_wakeup(up->dev, enable); 132e5b57c03SFelipe Balbi } 133e5b57c03SFelipe Balbi 134ab4382d2SGreg Kroah-Hartman /* 135ab4382d2SGreg Kroah-Hartman * serial_omap_get_divisor - calculate divisor value 136ab4382d2SGreg Kroah-Hartman * @port: uart port info 137ab4382d2SGreg Kroah-Hartman * @baud: baudrate for which divisor needs to be calculated. 138ab4382d2SGreg Kroah-Hartman * 139ab4382d2SGreg Kroah-Hartman * We have written our own function to get the divisor so as to support 140ab4382d2SGreg Kroah-Hartman * 13x mode. 3Mbps Baudrate as an different divisor. 141ab4382d2SGreg Kroah-Hartman * Reference OMAP TRM Chapter 17: 142ab4382d2SGreg Kroah-Hartman * Table 17-1. UART Mode Baud Rates, Divisor Values, and Error Rates 143ab4382d2SGreg Kroah-Hartman * referring to oversampling - divisor value 144ab4382d2SGreg Kroah-Hartman * baudrate 460,800 to 3,686,400 all have divisor 13 145ab4382d2SGreg Kroah-Hartman * except 3,000,000 which has divisor value 16 146ab4382d2SGreg Kroah-Hartman */ 147ab4382d2SGreg Kroah-Hartman static unsigned int 148ab4382d2SGreg Kroah-Hartman serial_omap_get_divisor(struct uart_port *port, unsigned int baud) 149ab4382d2SGreg Kroah-Hartman { 150ab4382d2SGreg Kroah-Hartman unsigned int divisor; 151ab4382d2SGreg Kroah-Hartman 152ab4382d2SGreg Kroah-Hartman if (baud > OMAP_MODE13X_SPEED && baud != 3000000) 153ab4382d2SGreg Kroah-Hartman divisor = 13; 154ab4382d2SGreg Kroah-Hartman else 155ab4382d2SGreg Kroah-Hartman divisor = 16; 156ab4382d2SGreg Kroah-Hartman return port->uartclk/(baud * divisor); 157ab4382d2SGreg Kroah-Hartman } 158ab4382d2SGreg Kroah-Hartman 159ab4382d2SGreg Kroah-Hartman static void serial_omap_enable_ms(struct uart_port *port) 160ab4382d2SGreg Kroah-Hartman { 161c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 162ab4382d2SGreg Kroah-Hartman 163ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_enable_ms+%d\n", up->port.line); 164fcdca757SGovindraj.R 165d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 166ab4382d2SGreg Kroah-Hartman up->ier |= UART_IER_MSI; 167ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 168660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 169660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 170ab4382d2SGreg Kroah-Hartman } 171ab4382d2SGreg Kroah-Hartman 172ab4382d2SGreg Kroah-Hartman static void serial_omap_stop_tx(struct uart_port *port) 173ab4382d2SGreg Kroah-Hartman { 174c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 175ab4382d2SGreg Kroah-Hartman 176d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 177ab4382d2SGreg Kroah-Hartman if (up->ier & UART_IER_THRI) { 178ab4382d2SGreg Kroah-Hartman up->ier &= ~UART_IER_THRI; 179ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 180ab4382d2SGreg Kroah-Hartman } 181fcdca757SGovindraj.R 182e5b57c03SFelipe Balbi serial_omap_set_forceidle(up); 183be4b0281SPaul Walmsley 184d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 185d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 186ab4382d2SGreg Kroah-Hartman } 187ab4382d2SGreg Kroah-Hartman 188ab4382d2SGreg Kroah-Hartman static void serial_omap_stop_rx(struct uart_port *port) 189ab4382d2SGreg Kroah-Hartman { 190c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 191ab4382d2SGreg Kroah-Hartman 192d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 193ab4382d2SGreg Kroah-Hartman up->ier &= ~UART_IER_RLSI; 194ab4382d2SGreg Kroah-Hartman up->port.read_status_mask &= ~UART_LSR_DR; 195ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 196d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 197d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 198ab4382d2SGreg Kroah-Hartman } 199ab4382d2SGreg Kroah-Hartman 200bf63a086SFelipe Balbi static void transmit_chars(struct uart_omap_port *up, unsigned int lsr) 201ab4382d2SGreg Kroah-Hartman { 202ab4382d2SGreg Kroah-Hartman struct circ_buf *xmit = &up->port.state->xmit; 203ab4382d2SGreg Kroah-Hartman int count; 204ab4382d2SGreg Kroah-Hartman 205bf63a086SFelipe Balbi if (!(lsr & UART_LSR_THRE)) 206bf63a086SFelipe Balbi return; 207bf63a086SFelipe Balbi 208ab4382d2SGreg Kroah-Hartman if (up->port.x_char) { 209ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TX, up->port.x_char); 210ab4382d2SGreg Kroah-Hartman up->port.icount.tx++; 211ab4382d2SGreg Kroah-Hartman up->port.x_char = 0; 212ab4382d2SGreg Kroah-Hartman return; 213ab4382d2SGreg Kroah-Hartman } 214ab4382d2SGreg Kroah-Hartman if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { 215ab4382d2SGreg Kroah-Hartman serial_omap_stop_tx(&up->port); 216ab4382d2SGreg Kroah-Hartman return; 217ab4382d2SGreg Kroah-Hartman } 218af681cadSGreg Kroah-Hartman count = up->port.fifosize / 4; 219ab4382d2SGreg Kroah-Hartman do { 220ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TX, xmit->buf[xmit->tail]); 221ab4382d2SGreg Kroah-Hartman xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 222ab4382d2SGreg Kroah-Hartman up->port.icount.tx++; 223ab4382d2SGreg Kroah-Hartman if (uart_circ_empty(xmit)) 224ab4382d2SGreg Kroah-Hartman break; 225ab4382d2SGreg Kroah-Hartman } while (--count > 0); 226ab4382d2SGreg Kroah-Hartman 227ab4382d2SGreg Kroah-Hartman if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 228ab4382d2SGreg Kroah-Hartman uart_write_wakeup(&up->port); 229ab4382d2SGreg Kroah-Hartman 230ab4382d2SGreg Kroah-Hartman if (uart_circ_empty(xmit)) 231ab4382d2SGreg Kroah-Hartman serial_omap_stop_tx(&up->port); 232ab4382d2SGreg Kroah-Hartman } 233ab4382d2SGreg Kroah-Hartman 234ab4382d2SGreg Kroah-Hartman static inline void serial_omap_enable_ier_thri(struct uart_omap_port *up) 235ab4382d2SGreg Kroah-Hartman { 236ab4382d2SGreg Kroah-Hartman if (!(up->ier & UART_IER_THRI)) { 237ab4382d2SGreg Kroah-Hartman up->ier |= UART_IER_THRI; 238ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 239ab4382d2SGreg Kroah-Hartman } 240ab4382d2SGreg Kroah-Hartman } 241ab4382d2SGreg Kroah-Hartman 242ab4382d2SGreg Kroah-Hartman static void serial_omap_start_tx(struct uart_port *port) 243ab4382d2SGreg Kroah-Hartman { 244c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 245ab4382d2SGreg Kroah-Hartman 246d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 247ab4382d2SGreg Kroah-Hartman serial_omap_enable_ier_thri(up); 248e5b57c03SFelipe Balbi serial_omap_set_noidle(up); 249d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 250d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 251ab4382d2SGreg Kroah-Hartman } 252ab4382d2SGreg Kroah-Hartman 253ab4382d2SGreg Kroah-Hartman static unsigned int check_modem_status(struct uart_omap_port *up) 254ab4382d2SGreg Kroah-Hartman { 255ab4382d2SGreg Kroah-Hartman unsigned int status; 256ab4382d2SGreg Kroah-Hartman 257ab4382d2SGreg Kroah-Hartman status = serial_in(up, UART_MSR); 258ab4382d2SGreg Kroah-Hartman status |= up->msr_saved_flags; 259ab4382d2SGreg Kroah-Hartman up->msr_saved_flags = 0; 260ab4382d2SGreg Kroah-Hartman if ((status & UART_MSR_ANY_DELTA) == 0) 261ab4382d2SGreg Kroah-Hartman return status; 262ab4382d2SGreg Kroah-Hartman 263ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI && 264ab4382d2SGreg Kroah-Hartman up->port.state != NULL) { 265ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_TERI) 266ab4382d2SGreg Kroah-Hartman up->port.icount.rng++; 267ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DDSR) 268ab4382d2SGreg Kroah-Hartman up->port.icount.dsr++; 269ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DDCD) 270ab4382d2SGreg Kroah-Hartman uart_handle_dcd_change 271ab4382d2SGreg Kroah-Hartman (&up->port, status & UART_MSR_DCD); 272ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DCTS) 273ab4382d2SGreg Kroah-Hartman uart_handle_cts_change 274ab4382d2SGreg Kroah-Hartman (&up->port, status & UART_MSR_CTS); 275ab4382d2SGreg Kroah-Hartman wake_up_interruptible(&up->port.state->port.delta_msr_wait); 276ab4382d2SGreg Kroah-Hartman } 277ab4382d2SGreg Kroah-Hartman 278ab4382d2SGreg Kroah-Hartman return status; 279ab4382d2SGreg Kroah-Hartman } 280ab4382d2SGreg Kroah-Hartman 28172256cbdSFelipe Balbi static void serial_omap_rlsi(struct uart_omap_port *up, unsigned int lsr) 28272256cbdSFelipe Balbi { 28372256cbdSFelipe Balbi unsigned int flag; 28472256cbdSFelipe Balbi 28572256cbdSFelipe Balbi up->port.icount.rx++; 28672256cbdSFelipe Balbi flag = TTY_NORMAL; 28772256cbdSFelipe Balbi 28872256cbdSFelipe Balbi if (lsr & UART_LSR_BI) { 28972256cbdSFelipe Balbi flag = TTY_BREAK; 29072256cbdSFelipe Balbi lsr &= ~(UART_LSR_FE | UART_LSR_PE); 29172256cbdSFelipe Balbi up->port.icount.brk++; 29272256cbdSFelipe Balbi /* 29372256cbdSFelipe Balbi * We do the SysRQ and SAK checking 29472256cbdSFelipe Balbi * here because otherwise the break 29572256cbdSFelipe Balbi * may get masked by ignore_status_mask 29672256cbdSFelipe Balbi * or read_status_mask. 29772256cbdSFelipe Balbi */ 29872256cbdSFelipe Balbi if (uart_handle_break(&up->port)) 29972256cbdSFelipe Balbi return; 30072256cbdSFelipe Balbi 30172256cbdSFelipe Balbi } 30272256cbdSFelipe Balbi 30372256cbdSFelipe Balbi if (lsr & UART_LSR_PE) { 30472256cbdSFelipe Balbi flag = TTY_PARITY; 30572256cbdSFelipe Balbi up->port.icount.parity++; 30672256cbdSFelipe Balbi } 30772256cbdSFelipe Balbi 30872256cbdSFelipe Balbi if (lsr & UART_LSR_FE) { 30972256cbdSFelipe Balbi flag = TTY_FRAME; 31072256cbdSFelipe Balbi up->port.icount.frame++; 31172256cbdSFelipe Balbi } 31272256cbdSFelipe Balbi 31372256cbdSFelipe Balbi if (lsr & UART_LSR_OE) 31472256cbdSFelipe Balbi up->port.icount.overrun++; 31572256cbdSFelipe Balbi 31672256cbdSFelipe Balbi #ifdef CONFIG_SERIAL_OMAP_CONSOLE 31772256cbdSFelipe Balbi if (up->port.line == up->port.cons->index) { 31872256cbdSFelipe Balbi /* Recover the break flag from console xmit */ 31972256cbdSFelipe Balbi lsr |= up->lsr_break_flag; 32072256cbdSFelipe Balbi } 32172256cbdSFelipe Balbi #endif 32272256cbdSFelipe Balbi uart_insert_char(&up->port, lsr, UART_LSR_OE, 0, flag); 32372256cbdSFelipe Balbi } 32472256cbdSFelipe Balbi 32572256cbdSFelipe Balbi static void serial_omap_rdi(struct uart_omap_port *up, unsigned int lsr) 32672256cbdSFelipe Balbi { 32772256cbdSFelipe Balbi unsigned char ch = 0; 32872256cbdSFelipe Balbi unsigned int flag; 32972256cbdSFelipe Balbi 33072256cbdSFelipe Balbi if (!(lsr & UART_LSR_DR)) 33172256cbdSFelipe Balbi return; 33272256cbdSFelipe Balbi 33372256cbdSFelipe Balbi ch = serial_in(up, UART_RX); 33472256cbdSFelipe Balbi flag = TTY_NORMAL; 33572256cbdSFelipe Balbi up->port.icount.rx++; 33672256cbdSFelipe Balbi 33772256cbdSFelipe Balbi if (uart_handle_sysrq_char(&up->port, ch)) 33872256cbdSFelipe Balbi return; 33972256cbdSFelipe Balbi 34072256cbdSFelipe Balbi uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag); 34172256cbdSFelipe Balbi } 34272256cbdSFelipe Balbi 343ab4382d2SGreg Kroah-Hartman /** 344ab4382d2SGreg Kroah-Hartman * serial_omap_irq() - This handles the interrupt from one port 345ab4382d2SGreg Kroah-Hartman * @irq: uart port irq number 346ab4382d2SGreg Kroah-Hartman * @dev_id: uart port info 347ab4382d2SGreg Kroah-Hartman */ 348ab4382d2SGreg Kroah-Hartman static inline irqreturn_t serial_omap_irq(int irq, void *dev_id) 349ab4382d2SGreg Kroah-Hartman { 350ab4382d2SGreg Kroah-Hartman struct uart_omap_port *up = dev_id; 35172256cbdSFelipe Balbi struct tty_struct *tty = up->port.state->port.tty; 352ab4382d2SGreg Kroah-Hartman unsigned int iir, lsr; 35381b75aefSFelipe Balbi unsigned int type; 35481b75aefSFelipe Balbi irqreturn_t ret = IRQ_NONE; 35572256cbdSFelipe Balbi int max_count = 256; 356ab4382d2SGreg Kroah-Hartman 3576c3a30c7SFelipe Balbi spin_lock(&up->port.lock); 35881b75aefSFelipe Balbi pm_runtime_get_sync(up->dev); 35972256cbdSFelipe Balbi 36072256cbdSFelipe Balbi do { 36181b75aefSFelipe Balbi iir = serial_in(up, UART_IIR); 36281b75aefSFelipe Balbi if (iir & UART_IIR_NO_INT) 36372256cbdSFelipe Balbi break; 36481b75aefSFelipe Balbi 36581b75aefSFelipe Balbi ret = IRQ_HANDLED; 366ab4382d2SGreg Kroah-Hartman lsr = serial_in(up, UART_LSR); 36781b75aefSFelipe Balbi 36881b75aefSFelipe Balbi /* extract IRQ type from IIR register */ 36981b75aefSFelipe Balbi type = iir & 0x3e; 37081b75aefSFelipe Balbi 37181b75aefSFelipe Balbi switch (type) { 37281b75aefSFelipe Balbi case UART_IIR_MSI: 37381b75aefSFelipe Balbi check_modem_status(up); 37481b75aefSFelipe Balbi break; 37581b75aefSFelipe Balbi case UART_IIR_THRI: 376bf63a086SFelipe Balbi transmit_chars(up, lsr); 37781b75aefSFelipe Balbi break; 37872256cbdSFelipe Balbi case UART_IIR_RX_TIMEOUT: 37972256cbdSFelipe Balbi /* FALLTHROUGH */ 38081b75aefSFelipe Balbi case UART_IIR_RDI: 38172256cbdSFelipe Balbi serial_omap_rdi(up, lsr); 38281b75aefSFelipe Balbi break; 38381b75aefSFelipe Balbi case UART_IIR_RLSI: 38472256cbdSFelipe Balbi serial_omap_rlsi(up, lsr); 38581b75aefSFelipe Balbi break; 38681b75aefSFelipe Balbi case UART_IIR_CTS_RTS_DSR: 38772256cbdSFelipe Balbi /* simply try again */ 38872256cbdSFelipe Balbi break; 38981b75aefSFelipe Balbi case UART_IIR_XOFF: 39081b75aefSFelipe Balbi /* FALLTHROUGH */ 39181b75aefSFelipe Balbi default: 39281b75aefSFelipe Balbi break; 393ab4382d2SGreg Kroah-Hartman } 39472256cbdSFelipe Balbi } while (!(iir & UART_IIR_NO_INT) && max_count--); 395ab4382d2SGreg Kroah-Hartman 3966c3a30c7SFelipe Balbi spin_unlock(&up->port.lock); 39772256cbdSFelipe Balbi 39872256cbdSFelipe Balbi tty_flip_buffer_push(tty); 39972256cbdSFelipe Balbi 400d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 401d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 402ab4382d2SGreg Kroah-Hartman up->port_activity = jiffies; 40381b75aefSFelipe Balbi 40481b75aefSFelipe Balbi return ret; 405ab4382d2SGreg Kroah-Hartman } 406ab4382d2SGreg Kroah-Hartman 407ab4382d2SGreg Kroah-Hartman static unsigned int serial_omap_tx_empty(struct uart_port *port) 408ab4382d2SGreg Kroah-Hartman { 409c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 410ab4382d2SGreg Kroah-Hartman unsigned long flags = 0; 411ab4382d2SGreg Kroah-Hartman unsigned int ret = 0; 412ab4382d2SGreg Kroah-Hartman 413d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 414ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_tx_empty+%d\n", up->port.line); 415ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags); 416ab4382d2SGreg Kroah-Hartman ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0; 417ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags); 418660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 419660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 420ab4382d2SGreg Kroah-Hartman return ret; 421ab4382d2SGreg Kroah-Hartman } 422ab4382d2SGreg Kroah-Hartman 423ab4382d2SGreg Kroah-Hartman static unsigned int serial_omap_get_mctrl(struct uart_port *port) 424ab4382d2SGreg Kroah-Hartman { 425c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 426514f31d1SShubhrajyoti D unsigned int status; 427ab4382d2SGreg Kroah-Hartman unsigned int ret = 0; 428ab4382d2SGreg Kroah-Hartman 429d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 430ab4382d2SGreg Kroah-Hartman status = check_modem_status(up); 431660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 432660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 433fcdca757SGovindraj.R 434ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_get_mctrl+%d\n", up->port.line); 435ab4382d2SGreg Kroah-Hartman 436ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DCD) 437ab4382d2SGreg Kroah-Hartman ret |= TIOCM_CAR; 438ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_RI) 439ab4382d2SGreg Kroah-Hartman ret |= TIOCM_RNG; 440ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DSR) 441ab4382d2SGreg Kroah-Hartman ret |= TIOCM_DSR; 442ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_CTS) 443ab4382d2SGreg Kroah-Hartman ret |= TIOCM_CTS; 444ab4382d2SGreg Kroah-Hartman return ret; 445ab4382d2SGreg Kroah-Hartman } 446ab4382d2SGreg Kroah-Hartman 447ab4382d2SGreg Kroah-Hartman static void serial_omap_set_mctrl(struct uart_port *port, unsigned int mctrl) 448ab4382d2SGreg Kroah-Hartman { 449c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 450ab4382d2SGreg Kroah-Hartman unsigned char mcr = 0; 451ab4382d2SGreg Kroah-Hartman 452ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_set_mctrl+%d\n", up->port.line); 453ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_RTS) 454ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_RTS; 455ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_DTR) 456ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_DTR; 457ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_OUT1) 458ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_OUT1; 459ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_OUT2) 460ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_OUT2; 461ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_LOOP) 462ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_LOOP; 463ab4382d2SGreg Kroah-Hartman 464d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 465c538d20cSGovindraj.R up->mcr = serial_in(up, UART_MCR); 466c538d20cSGovindraj.R up->mcr |= mcr; 467c538d20cSGovindraj.R serial_out(up, UART_MCR, up->mcr); 468660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 469660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 4709574f36fSNeilBrown 4719574f36fSNeilBrown if (gpio_is_valid(up->DTR_gpio) && 4729574f36fSNeilBrown !!(mctrl & TIOCM_DTR) != up->DTR_active) { 4739574f36fSNeilBrown up->DTR_active = !up->DTR_active; 4749574f36fSNeilBrown if (gpio_cansleep(up->DTR_gpio)) 4759574f36fSNeilBrown schedule_work(&up->qos_work); 4769574f36fSNeilBrown else 4779574f36fSNeilBrown gpio_set_value(up->DTR_gpio, 4789574f36fSNeilBrown up->DTR_active != up->DTR_inverted); 4799574f36fSNeilBrown } 480ab4382d2SGreg Kroah-Hartman } 481ab4382d2SGreg Kroah-Hartman 482ab4382d2SGreg Kroah-Hartman static void serial_omap_break_ctl(struct uart_port *port, int break_state) 483ab4382d2SGreg Kroah-Hartman { 484c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 485ab4382d2SGreg Kroah-Hartman unsigned long flags = 0; 486ab4382d2SGreg Kroah-Hartman 487ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_break_ctl+%d\n", up->port.line); 488d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 489ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags); 490ab4382d2SGreg Kroah-Hartman if (break_state == -1) 491ab4382d2SGreg Kroah-Hartman up->lcr |= UART_LCR_SBC; 492ab4382d2SGreg Kroah-Hartman else 493ab4382d2SGreg Kroah-Hartman up->lcr &= ~UART_LCR_SBC; 494ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, up->lcr); 495ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags); 496660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 497660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 498ab4382d2SGreg Kroah-Hartman } 499ab4382d2SGreg Kroah-Hartman 500ab4382d2SGreg Kroah-Hartman static int serial_omap_startup(struct uart_port *port) 501ab4382d2SGreg Kroah-Hartman { 502c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 503ab4382d2SGreg Kroah-Hartman unsigned long flags = 0; 504ab4382d2SGreg Kroah-Hartman int retval; 505ab4382d2SGreg Kroah-Hartman 506ab4382d2SGreg Kroah-Hartman /* 507ab4382d2SGreg Kroah-Hartman * Allocate the IRQ 508ab4382d2SGreg Kroah-Hartman */ 509ab4382d2SGreg Kroah-Hartman retval = request_irq(up->port.irq, serial_omap_irq, up->port.irqflags, 510ab4382d2SGreg Kroah-Hartman up->name, up); 511ab4382d2SGreg Kroah-Hartman if (retval) 512ab4382d2SGreg Kroah-Hartman return retval; 513ab4382d2SGreg Kroah-Hartman 514ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_startup+%d\n", up->port.line); 515ab4382d2SGreg Kroah-Hartman 516d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 517ab4382d2SGreg Kroah-Hartman /* 518ab4382d2SGreg Kroah-Hartman * Clear the FIFO buffers and disable them. 519ab4382d2SGreg Kroah-Hartman * (they will be reenabled in set_termios()) 520ab4382d2SGreg Kroah-Hartman */ 521ab4382d2SGreg Kroah-Hartman serial_omap_clear_fifos(up); 522ab4382d2SGreg Kroah-Hartman /* For Hardware flow control */ 523ab4382d2SGreg Kroah-Hartman serial_out(up, UART_MCR, UART_MCR_RTS); 524ab4382d2SGreg Kroah-Hartman 525ab4382d2SGreg Kroah-Hartman /* 526ab4382d2SGreg Kroah-Hartman * Clear the interrupt registers. 527ab4382d2SGreg Kroah-Hartman */ 528ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_LSR); 529ab4382d2SGreg Kroah-Hartman if (serial_in(up, UART_LSR) & UART_LSR_DR) 530ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_RX); 531ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_IIR); 532ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_MSR); 533ab4382d2SGreg Kroah-Hartman 534ab4382d2SGreg Kroah-Hartman /* 535ab4382d2SGreg Kroah-Hartman * Now, initialize the UART 536ab4382d2SGreg Kroah-Hartman */ 537ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_WLEN8); 538ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags); 539ab4382d2SGreg Kroah-Hartman /* 540ab4382d2SGreg Kroah-Hartman * Most PC uarts need OUT2 raised to enable interrupts. 541ab4382d2SGreg Kroah-Hartman */ 542ab4382d2SGreg Kroah-Hartman up->port.mctrl |= TIOCM_OUT2; 543ab4382d2SGreg Kroah-Hartman serial_omap_set_mctrl(&up->port, up->port.mctrl); 544ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags); 545ab4382d2SGreg Kroah-Hartman 546ab4382d2SGreg Kroah-Hartman up->msr_saved_flags = 0; 547ab4382d2SGreg Kroah-Hartman /* 548ab4382d2SGreg Kroah-Hartman * Finally, enable interrupts. Note: Modem status interrupts 549ab4382d2SGreg Kroah-Hartman * are set via set_termios(), which will be occurring imminently 550ab4382d2SGreg Kroah-Hartman * anyway, so we don't enable them here. 551ab4382d2SGreg Kroah-Hartman */ 552ab4382d2SGreg Kroah-Hartman up->ier = UART_IER_RLSI | UART_IER_RDI; 553ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 554ab4382d2SGreg Kroah-Hartman 55578841462SJarkko Nikula /* Enable module level wake up */ 55678841462SJarkko Nikula serial_out(up, UART_OMAP_WER, OMAP_UART_WER_MOD_WKUP); 55778841462SJarkko Nikula 558d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 559d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 560ab4382d2SGreg Kroah-Hartman up->port_activity = jiffies; 561ab4382d2SGreg Kroah-Hartman return 0; 562ab4382d2SGreg Kroah-Hartman } 563ab4382d2SGreg Kroah-Hartman 564ab4382d2SGreg Kroah-Hartman static void serial_omap_shutdown(struct uart_port *port) 565ab4382d2SGreg Kroah-Hartman { 566c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 567ab4382d2SGreg Kroah-Hartman unsigned long flags = 0; 568ab4382d2SGreg Kroah-Hartman 569ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_shutdown+%d\n", up->port.line); 570fcdca757SGovindraj.R 571d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 572ab4382d2SGreg Kroah-Hartman /* 573ab4382d2SGreg Kroah-Hartman * Disable interrupts from this port 574ab4382d2SGreg Kroah-Hartman */ 575ab4382d2SGreg Kroah-Hartman up->ier = 0; 576ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, 0); 577ab4382d2SGreg Kroah-Hartman 578ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags); 579ab4382d2SGreg Kroah-Hartman up->port.mctrl &= ~TIOCM_OUT2; 580ab4382d2SGreg Kroah-Hartman serial_omap_set_mctrl(&up->port, up->port.mctrl); 581ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags); 582ab4382d2SGreg Kroah-Hartman 583ab4382d2SGreg Kroah-Hartman /* 584ab4382d2SGreg Kroah-Hartman * Disable break condition and FIFOs 585ab4382d2SGreg Kroah-Hartman */ 586ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC); 587ab4382d2SGreg Kroah-Hartman serial_omap_clear_fifos(up); 588ab4382d2SGreg Kroah-Hartman 589ab4382d2SGreg Kroah-Hartman /* 590ab4382d2SGreg Kroah-Hartman * Read data port to reset things, and then free the irq 591ab4382d2SGreg Kroah-Hartman */ 592ab4382d2SGreg Kroah-Hartman if (serial_in(up, UART_LSR) & UART_LSR_DR) 593ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_RX); 594fcdca757SGovindraj.R 595660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 596660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 597ab4382d2SGreg Kroah-Hartman free_irq(up->port.irq, up); 598ab4382d2SGreg Kroah-Hartman } 599ab4382d2SGreg Kroah-Hartman 600ab4382d2SGreg Kroah-Hartman static inline void 601ab4382d2SGreg Kroah-Hartman serial_omap_configure_xonxoff 602ab4382d2SGreg Kroah-Hartman (struct uart_omap_port *up, struct ktermios *termios) 603ab4382d2SGreg Kroah-Hartman { 604ab4382d2SGreg Kroah-Hartman up->lcr = serial_in(up, UART_LCR); 605ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 606ab4382d2SGreg Kroah-Hartman up->efr = serial_in(up, UART_EFR); 607ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, up->efr & ~UART_EFR_ECB); 608ab4382d2SGreg Kroah-Hartman 609ab4382d2SGreg Kroah-Hartman serial_out(up, UART_XON1, termios->c_cc[VSTART]); 610ab4382d2SGreg Kroah-Hartman serial_out(up, UART_XOFF1, termios->c_cc[VSTOP]); 611ab4382d2SGreg Kroah-Hartman 612ab4382d2SGreg Kroah-Hartman /* clear SW control mode bits */ 613c538d20cSGovindraj.R up->efr &= OMAP_UART_SW_CLR; 614ab4382d2SGreg Kroah-Hartman 615ab4382d2SGreg Kroah-Hartman /* 616ab4382d2SGreg Kroah-Hartman * IXON Flag: 617ab4382d2SGreg Kroah-Hartman * Enable XON/XOFF flow control on output. 618ab4382d2SGreg Kroah-Hartman * Transmit XON1, XOFF1 619ab4382d2SGreg Kroah-Hartman */ 620ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IXON) 621c538d20cSGovindraj.R up->efr |= OMAP_UART_SW_TX; 622ab4382d2SGreg Kroah-Hartman 623ab4382d2SGreg Kroah-Hartman /* 624ab4382d2SGreg Kroah-Hartman * IXOFF Flag: 625ab4382d2SGreg Kroah-Hartman * Enable XON/XOFF flow control on input. 626ab4382d2SGreg Kroah-Hartman * Receiver compares XON1, XOFF1. 627ab4382d2SGreg Kroah-Hartman */ 628ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IXOFF) 629c538d20cSGovindraj.R up->efr |= OMAP_UART_SW_RX; 630ab4382d2SGreg Kroah-Hartman 631ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); 632ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 633ab4382d2SGreg Kroah-Hartman 634ab4382d2SGreg Kroah-Hartman up->mcr = serial_in(up, UART_MCR); 635ab4382d2SGreg Kroah-Hartman 636ab4382d2SGreg Kroah-Hartman /* 637ab4382d2SGreg Kroah-Hartman * IXANY Flag: 638ab4382d2SGreg Kroah-Hartman * Enable any character to restart output. 639ab4382d2SGreg Kroah-Hartman * Operation resumes after receiving any 640ab4382d2SGreg Kroah-Hartman * character after recognition of the XOFF character 641ab4382d2SGreg Kroah-Hartman */ 642ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IXANY) 643ab4382d2SGreg Kroah-Hartman up->mcr |= UART_MCR_XONANY; 644ab4382d2SGreg Kroah-Hartman 645ab4382d2SGreg Kroah-Hartman serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR); 646ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 647ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TI752_TCR, OMAP_UART_TCR_TRIG); 648ab4382d2SGreg Kroah-Hartman /* Enable special char function UARTi.EFR_REG[5] and 649ab4382d2SGreg Kroah-Hartman * load the new software flow control mode IXON or IXOFF 650ab4382d2SGreg Kroah-Hartman * and restore the UARTi.EFR_REG[4] ENHANCED_EN value. 651ab4382d2SGreg Kroah-Hartman */ 652c538d20cSGovindraj.R serial_out(up, UART_EFR, up->efr | UART_EFR_SCD); 653ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 654ab4382d2SGreg Kroah-Hartman 655ab4382d2SGreg Kroah-Hartman serial_out(up, UART_MCR, up->mcr & ~UART_MCR_TCRTLR); 656ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, up->lcr); 657ab4382d2SGreg Kroah-Hartman } 658ab4382d2SGreg Kroah-Hartman 6592fd14964SGovindraj.R static void serial_omap_uart_qos_work(struct work_struct *work) 6602fd14964SGovindraj.R { 6612fd14964SGovindraj.R struct uart_omap_port *up = container_of(work, struct uart_omap_port, 6622fd14964SGovindraj.R qos_work); 6632fd14964SGovindraj.R 6642fd14964SGovindraj.R pm_qos_update_request(&up->pm_qos_request, up->latency); 6659574f36fSNeilBrown if (gpio_is_valid(up->DTR_gpio)) 6669574f36fSNeilBrown gpio_set_value_cansleep(up->DTR_gpio, 6679574f36fSNeilBrown up->DTR_active != up->DTR_inverted); 6682fd14964SGovindraj.R } 6692fd14964SGovindraj.R 670ab4382d2SGreg Kroah-Hartman static void 671ab4382d2SGreg Kroah-Hartman serial_omap_set_termios(struct uart_port *port, struct ktermios *termios, 672ab4382d2SGreg Kroah-Hartman struct ktermios *old) 673ab4382d2SGreg Kroah-Hartman { 674c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 675ab4382d2SGreg Kroah-Hartman unsigned char cval = 0; 676ab4382d2SGreg Kroah-Hartman unsigned char efr = 0; 677ab4382d2SGreg Kroah-Hartman unsigned long flags = 0; 678ab4382d2SGreg Kroah-Hartman unsigned int baud, quot; 679ab4382d2SGreg Kroah-Hartman 680ab4382d2SGreg Kroah-Hartman switch (termios->c_cflag & CSIZE) { 681ab4382d2SGreg Kroah-Hartman case CS5: 682ab4382d2SGreg Kroah-Hartman cval = UART_LCR_WLEN5; 683ab4382d2SGreg Kroah-Hartman break; 684ab4382d2SGreg Kroah-Hartman case CS6: 685ab4382d2SGreg Kroah-Hartman cval = UART_LCR_WLEN6; 686ab4382d2SGreg Kroah-Hartman break; 687ab4382d2SGreg Kroah-Hartman case CS7: 688ab4382d2SGreg Kroah-Hartman cval = UART_LCR_WLEN7; 689ab4382d2SGreg Kroah-Hartman break; 690ab4382d2SGreg Kroah-Hartman default: 691ab4382d2SGreg Kroah-Hartman case CS8: 692ab4382d2SGreg Kroah-Hartman cval = UART_LCR_WLEN8; 693ab4382d2SGreg Kroah-Hartman break; 694ab4382d2SGreg Kroah-Hartman } 695ab4382d2SGreg Kroah-Hartman 696ab4382d2SGreg Kroah-Hartman if (termios->c_cflag & CSTOPB) 697ab4382d2SGreg Kroah-Hartman cval |= UART_LCR_STOP; 698ab4382d2SGreg Kroah-Hartman if (termios->c_cflag & PARENB) 699ab4382d2SGreg Kroah-Hartman cval |= UART_LCR_PARITY; 700ab4382d2SGreg Kroah-Hartman if (!(termios->c_cflag & PARODD)) 701ab4382d2SGreg Kroah-Hartman cval |= UART_LCR_EPAR; 702ab4382d2SGreg Kroah-Hartman 703ab4382d2SGreg Kroah-Hartman /* 704ab4382d2SGreg Kroah-Hartman * Ask the core to calculate the divisor for us. 705ab4382d2SGreg Kroah-Hartman */ 706ab4382d2SGreg Kroah-Hartman 707ab4382d2SGreg Kroah-Hartman baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/13); 708ab4382d2SGreg Kroah-Hartman quot = serial_omap_get_divisor(port, baud); 709ab4382d2SGreg Kroah-Hartman 7102fd14964SGovindraj.R /* calculate wakeup latency constraint */ 71119723452SPaul Walmsley up->calc_latency = (USEC_PER_SEC * up->port.fifosize) / (baud / 8); 7122fd14964SGovindraj.R up->latency = up->calc_latency; 7132fd14964SGovindraj.R schedule_work(&up->qos_work); 7142fd14964SGovindraj.R 715c538d20cSGovindraj.R up->dll = quot & 0xff; 716c538d20cSGovindraj.R up->dlh = quot >> 8; 717c538d20cSGovindraj.R up->mdr1 = UART_OMAP_MDR1_DISABLE; 718c538d20cSGovindraj.R 719ab4382d2SGreg Kroah-Hartman up->fcr = UART_FCR_R_TRIG_01 | UART_FCR_T_TRIG_01 | 720ab4382d2SGreg Kroah-Hartman UART_FCR_ENABLE_FIFO; 721ab4382d2SGreg Kroah-Hartman 722ab4382d2SGreg Kroah-Hartman /* 723ab4382d2SGreg Kroah-Hartman * Ok, we're now changing the port state. Do it with 724ab4382d2SGreg Kroah-Hartman * interrupts disabled. 725ab4382d2SGreg Kroah-Hartman */ 726d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 727ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags); 728ab4382d2SGreg Kroah-Hartman 729ab4382d2SGreg Kroah-Hartman /* 730ab4382d2SGreg Kroah-Hartman * Update the per-port timeout. 731ab4382d2SGreg Kroah-Hartman */ 732ab4382d2SGreg Kroah-Hartman uart_update_timeout(port, termios->c_cflag, baud); 733ab4382d2SGreg Kroah-Hartman 734ab4382d2SGreg Kroah-Hartman up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; 735ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & INPCK) 736ab4382d2SGreg Kroah-Hartman up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE; 737ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & (BRKINT | PARMRK)) 738ab4382d2SGreg Kroah-Hartman up->port.read_status_mask |= UART_LSR_BI; 739ab4382d2SGreg Kroah-Hartman 740ab4382d2SGreg Kroah-Hartman /* 741ab4382d2SGreg Kroah-Hartman * Characters to ignore 742ab4382d2SGreg Kroah-Hartman */ 743ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask = 0; 744ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IGNPAR) 745ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE; 746ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IGNBRK) { 747ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask |= UART_LSR_BI; 748ab4382d2SGreg Kroah-Hartman /* 749ab4382d2SGreg Kroah-Hartman * If we're ignoring parity and break indicators, 750ab4382d2SGreg Kroah-Hartman * ignore overruns too (for real raw support). 751ab4382d2SGreg Kroah-Hartman */ 752ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IGNPAR) 753ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask |= UART_LSR_OE; 754ab4382d2SGreg Kroah-Hartman } 755ab4382d2SGreg Kroah-Hartman 756ab4382d2SGreg Kroah-Hartman /* 757ab4382d2SGreg Kroah-Hartman * ignore all characters if CREAD is not set 758ab4382d2SGreg Kroah-Hartman */ 759ab4382d2SGreg Kroah-Hartman if ((termios->c_cflag & CREAD) == 0) 760ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask |= UART_LSR_DR; 761ab4382d2SGreg Kroah-Hartman 762ab4382d2SGreg Kroah-Hartman /* 763ab4382d2SGreg Kroah-Hartman * Modem status interrupts 764ab4382d2SGreg Kroah-Hartman */ 765ab4382d2SGreg Kroah-Hartman up->ier &= ~UART_IER_MSI; 766ab4382d2SGreg Kroah-Hartman if (UART_ENABLE_MS(&up->port, termios->c_cflag)) 767ab4382d2SGreg Kroah-Hartman up->ier |= UART_IER_MSI; 768ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 769ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, cval); /* reset DLAB */ 770c538d20cSGovindraj.R up->lcr = cval; 77132212897SGovindraj.R up->scr = OMAP_UART_SCR_TX_EMPTY; 772ab4382d2SGreg Kroah-Hartman 773ab4382d2SGreg Kroah-Hartman /* FIFOs and DMA Settings */ 774ab4382d2SGreg Kroah-Hartman 775ab4382d2SGreg Kroah-Hartman /* FCR can be changed only when the 776ab4382d2SGreg Kroah-Hartman * baud clock is not running 777ab4382d2SGreg Kroah-Hartman * DLL_REG and DLH_REG set to 0. 778ab4382d2SGreg Kroah-Hartman */ 779ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 780ab4382d2SGreg Kroah-Hartman serial_out(up, UART_DLL, 0); 781ab4382d2SGreg Kroah-Hartman serial_out(up, UART_DLM, 0); 782ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0); 783ab4382d2SGreg Kroah-Hartman 784ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 785ab4382d2SGreg Kroah-Hartman 786ab4382d2SGreg Kroah-Hartman up->efr = serial_in(up, UART_EFR); 787ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); 788ab4382d2SGreg Kroah-Hartman 789ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 790ab4382d2SGreg Kroah-Hartman up->mcr = serial_in(up, UART_MCR); 791ab4382d2SGreg Kroah-Hartman serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR); 792ab4382d2SGreg Kroah-Hartman /* FIFO ENABLE, DMA MODE */ 7930ba5f668SPaul Walmsley 7940ba5f668SPaul Walmsley up->scr |= OMAP_UART_SCR_RX_TRIG_GRANU1_MASK; 7950a697b22SPaul Walmsley 7960ba5f668SPaul Walmsley /* Set receive FIFO threshold to 1 byte */ 7970ba5f668SPaul Walmsley up->fcr &= ~OMAP_UART_FCR_RX_FIFO_TRIG_MASK; 7980ba5f668SPaul Walmsley up->fcr |= (0x1 << OMAP_UART_FCR_RX_FIFO_TRIG_SHIFT); 7998a74e9ffSGreg Kroah-Hartman 8000ba5f668SPaul Walmsley serial_out(up, UART_FCR, up->fcr); 8010ba5f668SPaul Walmsley serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 8020ba5f668SPaul Walmsley 803c538d20cSGovindraj.R serial_out(up, UART_OMAP_SCR, up->scr); 804c538d20cSGovindraj.R 805ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, up->efr); 806ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 807ab4382d2SGreg Kroah-Hartman serial_out(up, UART_MCR, up->mcr); 808ab4382d2SGreg Kroah-Hartman 809ab4382d2SGreg Kroah-Hartman /* Protocol, Baud Rate, and Interrupt Settings */ 810ab4382d2SGreg Kroah-Hartman 81194734749SGovindraj.R if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) 81294734749SGovindraj.R serial_omap_mdr1_errataset(up, up->mdr1); 81394734749SGovindraj.R else 814c538d20cSGovindraj.R serial_out(up, UART_OMAP_MDR1, up->mdr1); 81594734749SGovindraj.R 816ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 817ab4382d2SGreg Kroah-Hartman 818ab4382d2SGreg Kroah-Hartman up->efr = serial_in(up, UART_EFR); 819ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); 820ab4382d2SGreg Kroah-Hartman 821ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0); 822ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, 0); 823ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 824ab4382d2SGreg Kroah-Hartman 825c538d20cSGovindraj.R serial_out(up, UART_DLL, up->dll); /* LS of divisor */ 826c538d20cSGovindraj.R serial_out(up, UART_DLM, up->dlh); /* MS of divisor */ 827ab4382d2SGreg Kroah-Hartman 828ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0); 829ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 830ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 831ab4382d2SGreg Kroah-Hartman 832ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, up->efr); 833ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, cval); 834ab4382d2SGreg Kroah-Hartman 835ab4382d2SGreg Kroah-Hartman if (baud > 230400 && baud != 3000000) 836c538d20cSGovindraj.R up->mdr1 = UART_OMAP_MDR1_13X_MODE; 837ab4382d2SGreg Kroah-Hartman else 838c538d20cSGovindraj.R up->mdr1 = UART_OMAP_MDR1_16X_MODE; 839c538d20cSGovindraj.R 84094734749SGovindraj.R if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) 84194734749SGovindraj.R serial_omap_mdr1_errataset(up, up->mdr1); 84294734749SGovindraj.R else 843c538d20cSGovindraj.R serial_out(up, UART_OMAP_MDR1, up->mdr1); 844ab4382d2SGreg Kroah-Hartman 845ab4382d2SGreg Kroah-Hartman /* Hardware Flow Control Configuration */ 846ab4382d2SGreg Kroah-Hartman 847ab4382d2SGreg Kroah-Hartman if (termios->c_cflag & CRTSCTS) { 848ab4382d2SGreg Kroah-Hartman efr |= (UART_EFR_CTS | UART_EFR_RTS); 849ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 850ab4382d2SGreg Kroah-Hartman 851ab4382d2SGreg Kroah-Hartman up->mcr = serial_in(up, UART_MCR); 852ab4382d2SGreg Kroah-Hartman serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR); 853ab4382d2SGreg Kroah-Hartman 854ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 855ab4382d2SGreg Kroah-Hartman up->efr = serial_in(up, UART_EFR); 856ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); 857ab4382d2SGreg Kroah-Hartman 858ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TI752_TCR, OMAP_UART_TCR_TRIG); 859ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, efr); /* Enable AUTORTS and AUTOCTS */ 860ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 861ab4382d2SGreg Kroah-Hartman serial_out(up, UART_MCR, up->mcr | UART_MCR_RTS); 862ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, cval); 863ab4382d2SGreg Kroah-Hartman } 864ab4382d2SGreg Kroah-Hartman 865ab4382d2SGreg Kroah-Hartman serial_omap_set_mctrl(&up->port, up->port.mctrl); 866ab4382d2SGreg Kroah-Hartman /* Software Flow Control Configuration */ 867ab4382d2SGreg Kroah-Hartman serial_omap_configure_xonxoff(up, termios); 868ab4382d2SGreg Kroah-Hartman 869ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags); 870660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 871660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 872ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_set_termios+%d\n", up->port.line); 873ab4382d2SGreg Kroah-Hartman } 874ab4382d2SGreg Kroah-Hartman 875ab4382d2SGreg Kroah-Hartman static void 876ab4382d2SGreg Kroah-Hartman serial_omap_pm(struct uart_port *port, unsigned int state, 877ab4382d2SGreg Kroah-Hartman unsigned int oldstate) 878ab4382d2SGreg Kroah-Hartman { 879c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 880ab4382d2SGreg Kroah-Hartman unsigned char efr; 881ab4382d2SGreg Kroah-Hartman 882ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_pm+%d\n", up->port.line); 883fcdca757SGovindraj.R 884d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 885ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 886ab4382d2SGreg Kroah-Hartman efr = serial_in(up, UART_EFR); 887ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, efr | UART_EFR_ECB); 888ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0); 889ab4382d2SGreg Kroah-Hartman 890ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, (state != 0) ? UART_IERX_SLEEP : 0); 891ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 892ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, efr); 893ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0); 894fcdca757SGovindraj.R 895d8ee4ea6SFelipe Balbi if (!device_may_wakeup(up->dev)) { 896fcdca757SGovindraj.R if (!state) 897d8ee4ea6SFelipe Balbi pm_runtime_forbid(up->dev); 898fcdca757SGovindraj.R else 899d8ee4ea6SFelipe Balbi pm_runtime_allow(up->dev); 900fcdca757SGovindraj.R } 901fcdca757SGovindraj.R 902660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 903660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 904ab4382d2SGreg Kroah-Hartman } 905ab4382d2SGreg Kroah-Hartman 906ab4382d2SGreg Kroah-Hartman static void serial_omap_release_port(struct uart_port *port) 907ab4382d2SGreg Kroah-Hartman { 908ab4382d2SGreg Kroah-Hartman dev_dbg(port->dev, "serial_omap_release_port+\n"); 909ab4382d2SGreg Kroah-Hartman } 910ab4382d2SGreg Kroah-Hartman 911ab4382d2SGreg Kroah-Hartman static int serial_omap_request_port(struct uart_port *port) 912ab4382d2SGreg Kroah-Hartman { 913ab4382d2SGreg Kroah-Hartman dev_dbg(port->dev, "serial_omap_request_port+\n"); 914ab4382d2SGreg Kroah-Hartman return 0; 915ab4382d2SGreg Kroah-Hartman } 916ab4382d2SGreg Kroah-Hartman 917ab4382d2SGreg Kroah-Hartman static void serial_omap_config_port(struct uart_port *port, int flags) 918ab4382d2SGreg Kroah-Hartman { 919c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 920ab4382d2SGreg Kroah-Hartman 921ab4382d2SGreg Kroah-Hartman dev_dbg(up->port.dev, "serial_omap_config_port+%d\n", 922ba77433dSRajendra Nayak up->port.line); 923ab4382d2SGreg Kroah-Hartman up->port.type = PORT_OMAP; 924ab4382d2SGreg Kroah-Hartman } 925ab4382d2SGreg Kroah-Hartman 926ab4382d2SGreg Kroah-Hartman static int 927ab4382d2SGreg Kroah-Hartman serial_omap_verify_port(struct uart_port *port, struct serial_struct *ser) 928ab4382d2SGreg Kroah-Hartman { 929ab4382d2SGreg Kroah-Hartman /* we don't want the core code to modify any port params */ 930ab4382d2SGreg Kroah-Hartman dev_dbg(port->dev, "serial_omap_verify_port+\n"); 931ab4382d2SGreg Kroah-Hartman return -EINVAL; 932ab4382d2SGreg Kroah-Hartman } 933ab4382d2SGreg Kroah-Hartman 934ab4382d2SGreg Kroah-Hartman static const char * 935ab4382d2SGreg Kroah-Hartman serial_omap_type(struct uart_port *port) 936ab4382d2SGreg Kroah-Hartman { 937c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 938ab4382d2SGreg Kroah-Hartman 939ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_type+%d\n", up->port.line); 940ab4382d2SGreg Kroah-Hartman return up->name; 941ab4382d2SGreg Kroah-Hartman } 942ab4382d2SGreg Kroah-Hartman 943ab4382d2SGreg Kroah-Hartman #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE) 944ab4382d2SGreg Kroah-Hartman 945ab4382d2SGreg Kroah-Hartman static inline void wait_for_xmitr(struct uart_omap_port *up) 946ab4382d2SGreg Kroah-Hartman { 947ab4382d2SGreg Kroah-Hartman unsigned int status, tmout = 10000; 948ab4382d2SGreg Kroah-Hartman 949ab4382d2SGreg Kroah-Hartman /* Wait up to 10ms for the character(s) to be sent. */ 950ab4382d2SGreg Kroah-Hartman do { 951ab4382d2SGreg Kroah-Hartman status = serial_in(up, UART_LSR); 952ab4382d2SGreg Kroah-Hartman 953ab4382d2SGreg Kroah-Hartman if (status & UART_LSR_BI) 954ab4382d2SGreg Kroah-Hartman up->lsr_break_flag = UART_LSR_BI; 955ab4382d2SGreg Kroah-Hartman 956ab4382d2SGreg Kroah-Hartman if (--tmout == 0) 957ab4382d2SGreg Kroah-Hartman break; 958ab4382d2SGreg Kroah-Hartman udelay(1); 959ab4382d2SGreg Kroah-Hartman } while ((status & BOTH_EMPTY) != BOTH_EMPTY); 960ab4382d2SGreg Kroah-Hartman 961ab4382d2SGreg Kroah-Hartman /* Wait up to 1s for flow control if necessary */ 962ab4382d2SGreg Kroah-Hartman if (up->port.flags & UPF_CONS_FLOW) { 963ab4382d2SGreg Kroah-Hartman tmout = 1000000; 964ab4382d2SGreg Kroah-Hartman for (tmout = 1000000; tmout; tmout--) { 965ab4382d2SGreg Kroah-Hartman unsigned int msr = serial_in(up, UART_MSR); 966ab4382d2SGreg Kroah-Hartman 967ab4382d2SGreg Kroah-Hartman up->msr_saved_flags |= msr & MSR_SAVE_FLAGS; 968ab4382d2SGreg Kroah-Hartman if (msr & UART_MSR_CTS) 969ab4382d2SGreg Kroah-Hartman break; 970ab4382d2SGreg Kroah-Hartman 971ab4382d2SGreg Kroah-Hartman udelay(1); 972ab4382d2SGreg Kroah-Hartman } 973ab4382d2SGreg Kroah-Hartman } 974ab4382d2SGreg Kroah-Hartman } 975ab4382d2SGreg Kroah-Hartman 976ab4382d2SGreg Kroah-Hartman #ifdef CONFIG_CONSOLE_POLL 977ab4382d2SGreg Kroah-Hartman 978ab4382d2SGreg Kroah-Hartman static void serial_omap_poll_put_char(struct uart_port *port, unsigned char ch) 979ab4382d2SGreg Kroah-Hartman { 980c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 981fcdca757SGovindraj.R 982d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 983ab4382d2SGreg Kroah-Hartman wait_for_xmitr(up); 984ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TX, ch); 985660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 986660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 987ab4382d2SGreg Kroah-Hartman } 988ab4382d2SGreg Kroah-Hartman 989ab4382d2SGreg Kroah-Hartman static int serial_omap_poll_get_char(struct uart_port *port) 990ab4382d2SGreg Kroah-Hartman { 991c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 992fcdca757SGovindraj.R unsigned int status; 993ab4382d2SGreg Kroah-Hartman 994d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 995fcdca757SGovindraj.R status = serial_in(up, UART_LSR); 996ab4382d2SGreg Kroah-Hartman if (!(status & UART_LSR_DR)) 997ab4382d2SGreg Kroah-Hartman return NO_POLL_CHAR; 998ab4382d2SGreg Kroah-Hartman 999fcdca757SGovindraj.R status = serial_in(up, UART_RX); 1000660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 1001660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 1002fcdca757SGovindraj.R return status; 1003ab4382d2SGreg Kroah-Hartman } 1004ab4382d2SGreg Kroah-Hartman 1005ab4382d2SGreg Kroah-Hartman #endif /* CONFIG_CONSOLE_POLL */ 1006ab4382d2SGreg Kroah-Hartman 1007ab4382d2SGreg Kroah-Hartman #ifdef CONFIG_SERIAL_OMAP_CONSOLE 1008ab4382d2SGreg Kroah-Hartman 1009ab4382d2SGreg Kroah-Hartman static struct uart_omap_port *serial_omap_console_ports[4]; 1010ab4382d2SGreg Kroah-Hartman 1011ab4382d2SGreg Kroah-Hartman static struct uart_driver serial_omap_reg; 1012ab4382d2SGreg Kroah-Hartman 1013ab4382d2SGreg Kroah-Hartman static void serial_omap_console_putchar(struct uart_port *port, int ch) 1014ab4382d2SGreg Kroah-Hartman { 1015c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 1016ab4382d2SGreg Kroah-Hartman 1017ab4382d2SGreg Kroah-Hartman wait_for_xmitr(up); 1018ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TX, ch); 1019ab4382d2SGreg Kroah-Hartman } 1020ab4382d2SGreg Kroah-Hartman 1021ab4382d2SGreg Kroah-Hartman static void 1022ab4382d2SGreg Kroah-Hartman serial_omap_console_write(struct console *co, const char *s, 1023ab4382d2SGreg Kroah-Hartman unsigned int count) 1024ab4382d2SGreg Kroah-Hartman { 1025ab4382d2SGreg Kroah-Hartman struct uart_omap_port *up = serial_omap_console_ports[co->index]; 1026ab4382d2SGreg Kroah-Hartman unsigned long flags; 1027ab4382d2SGreg Kroah-Hartman unsigned int ier; 1028ab4382d2SGreg Kroah-Hartman int locked = 1; 1029ab4382d2SGreg Kroah-Hartman 1030d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 1031fcdca757SGovindraj.R 1032ab4382d2SGreg Kroah-Hartman local_irq_save(flags); 1033ab4382d2SGreg Kroah-Hartman if (up->port.sysrq) 1034ab4382d2SGreg Kroah-Hartman locked = 0; 1035ab4382d2SGreg Kroah-Hartman else if (oops_in_progress) 1036ab4382d2SGreg Kroah-Hartman locked = spin_trylock(&up->port.lock); 1037ab4382d2SGreg Kroah-Hartman else 1038ab4382d2SGreg Kroah-Hartman spin_lock(&up->port.lock); 1039ab4382d2SGreg Kroah-Hartman 1040ab4382d2SGreg Kroah-Hartman /* 1041ab4382d2SGreg Kroah-Hartman * First save the IER then disable the interrupts 1042ab4382d2SGreg Kroah-Hartman */ 1043ab4382d2SGreg Kroah-Hartman ier = serial_in(up, UART_IER); 1044ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, 0); 1045ab4382d2SGreg Kroah-Hartman 1046ab4382d2SGreg Kroah-Hartman uart_console_write(&up->port, s, count, serial_omap_console_putchar); 1047ab4382d2SGreg Kroah-Hartman 1048ab4382d2SGreg Kroah-Hartman /* 1049ab4382d2SGreg Kroah-Hartman * Finally, wait for transmitter to become empty 1050ab4382d2SGreg Kroah-Hartman * and restore the IER 1051ab4382d2SGreg Kroah-Hartman */ 1052ab4382d2SGreg Kroah-Hartman wait_for_xmitr(up); 1053ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, ier); 1054ab4382d2SGreg Kroah-Hartman /* 1055ab4382d2SGreg Kroah-Hartman * The receive handling will happen properly because the 1056ab4382d2SGreg Kroah-Hartman * receive ready bit will still be set; it is not cleared 1057ab4382d2SGreg Kroah-Hartman * on read. However, modem control will not, we must 1058ab4382d2SGreg Kroah-Hartman * call it if we have saved something in the saved flags 1059ab4382d2SGreg Kroah-Hartman * while processing with interrupts off. 1060ab4382d2SGreg Kroah-Hartman */ 1061ab4382d2SGreg Kroah-Hartman if (up->msr_saved_flags) 1062ab4382d2SGreg Kroah-Hartman check_modem_status(up); 1063ab4382d2SGreg Kroah-Hartman 1064d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 1065d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 1066ab4382d2SGreg Kroah-Hartman if (locked) 1067ab4382d2SGreg Kroah-Hartman spin_unlock(&up->port.lock); 1068ab4382d2SGreg Kroah-Hartman local_irq_restore(flags); 1069ab4382d2SGreg Kroah-Hartman } 1070ab4382d2SGreg Kroah-Hartman 1071ab4382d2SGreg Kroah-Hartman static int __init 1072ab4382d2SGreg Kroah-Hartman serial_omap_console_setup(struct console *co, char *options) 1073ab4382d2SGreg Kroah-Hartman { 1074ab4382d2SGreg Kroah-Hartman struct uart_omap_port *up; 1075ab4382d2SGreg Kroah-Hartman int baud = 115200; 1076ab4382d2SGreg Kroah-Hartman int bits = 8; 1077ab4382d2SGreg Kroah-Hartman int parity = 'n'; 1078ab4382d2SGreg Kroah-Hartman int flow = 'n'; 1079ab4382d2SGreg Kroah-Hartman 1080ab4382d2SGreg Kroah-Hartman if (serial_omap_console_ports[co->index] == NULL) 1081ab4382d2SGreg Kroah-Hartman return -ENODEV; 1082ab4382d2SGreg Kroah-Hartman up = serial_omap_console_ports[co->index]; 1083ab4382d2SGreg Kroah-Hartman 1084ab4382d2SGreg Kroah-Hartman if (options) 1085ab4382d2SGreg Kroah-Hartman uart_parse_options(options, &baud, &parity, &bits, &flow); 1086ab4382d2SGreg Kroah-Hartman 1087ab4382d2SGreg Kroah-Hartman return uart_set_options(&up->port, co, baud, parity, bits, flow); 1088ab4382d2SGreg Kroah-Hartman } 1089ab4382d2SGreg Kroah-Hartman 1090ab4382d2SGreg Kroah-Hartman static struct console serial_omap_console = { 1091ab4382d2SGreg Kroah-Hartman .name = OMAP_SERIAL_NAME, 1092ab4382d2SGreg Kroah-Hartman .write = serial_omap_console_write, 1093ab4382d2SGreg Kroah-Hartman .device = uart_console_device, 1094ab4382d2SGreg Kroah-Hartman .setup = serial_omap_console_setup, 1095ab4382d2SGreg Kroah-Hartman .flags = CON_PRINTBUFFER, 1096ab4382d2SGreg Kroah-Hartman .index = -1, 1097ab4382d2SGreg Kroah-Hartman .data = &serial_omap_reg, 1098ab4382d2SGreg Kroah-Hartman }; 1099ab4382d2SGreg Kroah-Hartman 1100ab4382d2SGreg Kroah-Hartman static void serial_omap_add_console_port(struct uart_omap_port *up) 1101ab4382d2SGreg Kroah-Hartman { 1102ba77433dSRajendra Nayak serial_omap_console_ports[up->port.line] = up; 1103ab4382d2SGreg Kroah-Hartman } 1104ab4382d2SGreg Kroah-Hartman 1105ab4382d2SGreg Kroah-Hartman #define OMAP_CONSOLE (&serial_omap_console) 1106ab4382d2SGreg Kroah-Hartman 1107ab4382d2SGreg Kroah-Hartman #else 1108ab4382d2SGreg Kroah-Hartman 1109ab4382d2SGreg Kroah-Hartman #define OMAP_CONSOLE NULL 1110ab4382d2SGreg Kroah-Hartman 1111ab4382d2SGreg Kroah-Hartman static inline void serial_omap_add_console_port(struct uart_omap_port *up) 1112ab4382d2SGreg Kroah-Hartman {} 1113ab4382d2SGreg Kroah-Hartman 1114ab4382d2SGreg Kroah-Hartman #endif 1115ab4382d2SGreg Kroah-Hartman 1116ab4382d2SGreg Kroah-Hartman static struct uart_ops serial_omap_pops = { 1117ab4382d2SGreg Kroah-Hartman .tx_empty = serial_omap_tx_empty, 1118ab4382d2SGreg Kroah-Hartman .set_mctrl = serial_omap_set_mctrl, 1119ab4382d2SGreg Kroah-Hartman .get_mctrl = serial_omap_get_mctrl, 1120ab4382d2SGreg Kroah-Hartman .stop_tx = serial_omap_stop_tx, 1121ab4382d2SGreg Kroah-Hartman .start_tx = serial_omap_start_tx, 1122ab4382d2SGreg Kroah-Hartman .stop_rx = serial_omap_stop_rx, 1123ab4382d2SGreg Kroah-Hartman .enable_ms = serial_omap_enable_ms, 1124ab4382d2SGreg Kroah-Hartman .break_ctl = serial_omap_break_ctl, 1125ab4382d2SGreg Kroah-Hartman .startup = serial_omap_startup, 1126ab4382d2SGreg Kroah-Hartman .shutdown = serial_omap_shutdown, 1127ab4382d2SGreg Kroah-Hartman .set_termios = serial_omap_set_termios, 1128ab4382d2SGreg Kroah-Hartman .pm = serial_omap_pm, 1129ab4382d2SGreg Kroah-Hartman .type = serial_omap_type, 1130ab4382d2SGreg Kroah-Hartman .release_port = serial_omap_release_port, 1131ab4382d2SGreg Kroah-Hartman .request_port = serial_omap_request_port, 1132ab4382d2SGreg Kroah-Hartman .config_port = serial_omap_config_port, 1133ab4382d2SGreg Kroah-Hartman .verify_port = serial_omap_verify_port, 1134ab4382d2SGreg Kroah-Hartman #ifdef CONFIG_CONSOLE_POLL 1135ab4382d2SGreg Kroah-Hartman .poll_put_char = serial_omap_poll_put_char, 1136ab4382d2SGreg Kroah-Hartman .poll_get_char = serial_omap_poll_get_char, 1137ab4382d2SGreg Kroah-Hartman #endif 1138ab4382d2SGreg Kroah-Hartman }; 1139ab4382d2SGreg Kroah-Hartman 1140ab4382d2SGreg Kroah-Hartman static struct uart_driver serial_omap_reg = { 1141ab4382d2SGreg Kroah-Hartman .owner = THIS_MODULE, 1142ab4382d2SGreg Kroah-Hartman .driver_name = "OMAP-SERIAL", 1143ab4382d2SGreg Kroah-Hartman .dev_name = OMAP_SERIAL_NAME, 1144ab4382d2SGreg Kroah-Hartman .nr = OMAP_MAX_HSUART_PORTS, 1145ab4382d2SGreg Kroah-Hartman .cons = OMAP_CONSOLE, 1146ab4382d2SGreg Kroah-Hartman }; 1147ab4382d2SGreg Kroah-Hartman 11483bc4f0d8SShubhrajyoti D #ifdef CONFIG_PM_SLEEP 1149fcdca757SGovindraj.R static int serial_omap_suspend(struct device *dev) 1150ab4382d2SGreg Kroah-Hartman { 1151fcdca757SGovindraj.R struct uart_omap_port *up = dev_get_drvdata(dev); 1152ab4382d2SGreg Kroah-Hartman 11532fd14964SGovindraj.R if (up) { 1154ab4382d2SGreg Kroah-Hartman uart_suspend_port(&serial_omap_reg, &up->port); 11552fd14964SGovindraj.R flush_work_sync(&up->qos_work); 11562fd14964SGovindraj.R } 11572fd14964SGovindraj.R 1158ab4382d2SGreg Kroah-Hartman return 0; 1159ab4382d2SGreg Kroah-Hartman } 1160ab4382d2SGreg Kroah-Hartman 1161fcdca757SGovindraj.R static int serial_omap_resume(struct device *dev) 1162ab4382d2SGreg Kroah-Hartman { 1163fcdca757SGovindraj.R struct uart_omap_port *up = dev_get_drvdata(dev); 1164ab4382d2SGreg Kroah-Hartman 1165ab4382d2SGreg Kroah-Hartman if (up) 1166ab4382d2SGreg Kroah-Hartman uart_resume_port(&serial_omap_reg, &up->port); 1167ab4382d2SGreg Kroah-Hartman return 0; 1168ab4382d2SGreg Kroah-Hartman } 1169fcdca757SGovindraj.R #endif 1170ab4382d2SGreg Kroah-Hartman 11716d608ef3SFelipe Balbi static void __devinit omap_serial_fill_features_erratas(struct uart_omap_port *up) 11727c77c8deSGovindraj.R { 11737c77c8deSGovindraj.R u32 mvr, scheme; 11747c77c8deSGovindraj.R u16 revision, major, minor; 11757c77c8deSGovindraj.R 11767c77c8deSGovindraj.R mvr = serial_in(up, UART_OMAP_MVER); 11777c77c8deSGovindraj.R 11787c77c8deSGovindraj.R /* Check revision register scheme */ 11797c77c8deSGovindraj.R scheme = mvr >> OMAP_UART_MVR_SCHEME_SHIFT; 11807c77c8deSGovindraj.R 11817c77c8deSGovindraj.R switch (scheme) { 11827c77c8deSGovindraj.R case 0: /* Legacy Scheme: OMAP2/3 */ 11837c77c8deSGovindraj.R /* MINOR_REV[0:4], MAJOR_REV[4:7] */ 11847c77c8deSGovindraj.R major = (mvr & OMAP_UART_LEGACY_MVR_MAJ_MASK) >> 11857c77c8deSGovindraj.R OMAP_UART_LEGACY_MVR_MAJ_SHIFT; 11867c77c8deSGovindraj.R minor = (mvr & OMAP_UART_LEGACY_MVR_MIN_MASK); 11877c77c8deSGovindraj.R break; 11887c77c8deSGovindraj.R case 1: 11897c77c8deSGovindraj.R /* New Scheme: OMAP4+ */ 11907c77c8deSGovindraj.R /* MINOR_REV[0:5], MAJOR_REV[8:10] */ 11917c77c8deSGovindraj.R major = (mvr & OMAP_UART_MVR_MAJ_MASK) >> 11927c77c8deSGovindraj.R OMAP_UART_MVR_MAJ_SHIFT; 11937c77c8deSGovindraj.R minor = (mvr & OMAP_UART_MVR_MIN_MASK); 11947c77c8deSGovindraj.R break; 11957c77c8deSGovindraj.R default: 1196d8ee4ea6SFelipe Balbi dev_warn(up->dev, 11977c77c8deSGovindraj.R "Unknown %s revision, defaulting to highest\n", 11987c77c8deSGovindraj.R up->name); 11997c77c8deSGovindraj.R /* highest possible revision */ 12007c77c8deSGovindraj.R major = 0xff; 12017c77c8deSGovindraj.R minor = 0xff; 12027c77c8deSGovindraj.R } 12037c77c8deSGovindraj.R 12047c77c8deSGovindraj.R /* normalize revision for the driver */ 12057c77c8deSGovindraj.R revision = UART_BUILD_REVISION(major, minor); 12067c77c8deSGovindraj.R 12077c77c8deSGovindraj.R switch (revision) { 12087c77c8deSGovindraj.R case OMAP_UART_REV_46: 12097c77c8deSGovindraj.R up->errata |= (UART_ERRATA_i202_MDR1_ACCESS | 12107c77c8deSGovindraj.R UART_ERRATA_i291_DMA_FORCEIDLE); 12117c77c8deSGovindraj.R break; 12127c77c8deSGovindraj.R case OMAP_UART_REV_52: 12137c77c8deSGovindraj.R up->errata |= (UART_ERRATA_i202_MDR1_ACCESS | 12147c77c8deSGovindraj.R UART_ERRATA_i291_DMA_FORCEIDLE); 12157c77c8deSGovindraj.R break; 12167c77c8deSGovindraj.R case OMAP_UART_REV_63: 12177c77c8deSGovindraj.R up->errata |= UART_ERRATA_i202_MDR1_ACCESS; 12187c77c8deSGovindraj.R break; 12197c77c8deSGovindraj.R default: 12207c77c8deSGovindraj.R break; 12217c77c8deSGovindraj.R } 12227c77c8deSGovindraj.R } 12237c77c8deSGovindraj.R 12246d608ef3SFelipe Balbi static __devinit struct omap_uart_port_info *of_get_uart_port_info(struct device *dev) 1225d92b0dfcSRajendra Nayak { 1226d92b0dfcSRajendra Nayak struct omap_uart_port_info *omap_up_info; 1227d92b0dfcSRajendra Nayak 1228d92b0dfcSRajendra Nayak omap_up_info = devm_kzalloc(dev, sizeof(*omap_up_info), GFP_KERNEL); 1229d92b0dfcSRajendra Nayak if (!omap_up_info) 1230d92b0dfcSRajendra Nayak return NULL; /* out of memory */ 1231d92b0dfcSRajendra Nayak 1232d92b0dfcSRajendra Nayak of_property_read_u32(dev->of_node, "clock-frequency", 1233d92b0dfcSRajendra Nayak &omap_up_info->uartclk); 1234d92b0dfcSRajendra Nayak return omap_up_info; 1235d92b0dfcSRajendra Nayak } 1236d92b0dfcSRajendra Nayak 12376d608ef3SFelipe Balbi static int __devinit serial_omap_probe(struct platform_device *pdev) 1238ab4382d2SGreg Kroah-Hartman { 1239ab4382d2SGreg Kroah-Hartman struct uart_omap_port *up; 124049457430SFelipe Balbi struct resource *mem, *irq; 1241ab4382d2SGreg Kroah-Hartman struct omap_uart_port_info *omap_up_info = pdev->dev.platform_data; 12429574f36fSNeilBrown int ret; 1243ab4382d2SGreg Kroah-Hartman 1244d92b0dfcSRajendra Nayak if (pdev->dev.of_node) 1245d92b0dfcSRajendra Nayak omap_up_info = of_get_uart_port_info(&pdev->dev); 1246d92b0dfcSRajendra Nayak 1247ab4382d2SGreg Kroah-Hartman mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1248ab4382d2SGreg Kroah-Hartman if (!mem) { 1249ab4382d2SGreg Kroah-Hartman dev_err(&pdev->dev, "no mem resource?\n"); 1250ab4382d2SGreg Kroah-Hartman return -ENODEV; 1251ab4382d2SGreg Kroah-Hartman } 1252ab4382d2SGreg Kroah-Hartman 1253ab4382d2SGreg Kroah-Hartman irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 1254ab4382d2SGreg Kroah-Hartman if (!irq) { 1255ab4382d2SGreg Kroah-Hartman dev_err(&pdev->dev, "no irq resource?\n"); 1256ab4382d2SGreg Kroah-Hartman return -ENODEV; 1257ab4382d2SGreg Kroah-Hartman } 1258ab4382d2SGreg Kroah-Hartman 1259388bc262SShubhrajyoti D if (!devm_request_mem_region(&pdev->dev, mem->start, resource_size(mem), 1260ab4382d2SGreg Kroah-Hartman pdev->dev.driver->name)) { 1261ab4382d2SGreg Kroah-Hartman dev_err(&pdev->dev, "memory region already claimed\n"); 1262ab4382d2SGreg Kroah-Hartman return -EBUSY; 1263ab4382d2SGreg Kroah-Hartman } 1264ab4382d2SGreg Kroah-Hartman 12659574f36fSNeilBrown if (gpio_is_valid(omap_up_info->DTR_gpio) && 12669574f36fSNeilBrown omap_up_info->DTR_present) { 12679574f36fSNeilBrown ret = gpio_request(omap_up_info->DTR_gpio, "omap-serial"); 12689574f36fSNeilBrown if (ret < 0) 12699574f36fSNeilBrown return ret; 12709574f36fSNeilBrown ret = gpio_direction_output(omap_up_info->DTR_gpio, 12719574f36fSNeilBrown omap_up_info->DTR_inverted); 12729574f36fSNeilBrown if (ret < 0) 12739574f36fSNeilBrown return ret; 12749574f36fSNeilBrown } 12759574f36fSNeilBrown 1276388bc262SShubhrajyoti D up = devm_kzalloc(&pdev->dev, sizeof(*up), GFP_KERNEL); 1277388bc262SShubhrajyoti D if (!up) 1278388bc262SShubhrajyoti D return -ENOMEM; 1279388bc262SShubhrajyoti D 12809574f36fSNeilBrown if (gpio_is_valid(omap_up_info->DTR_gpio) && 12819574f36fSNeilBrown omap_up_info->DTR_present) { 12829574f36fSNeilBrown up->DTR_gpio = omap_up_info->DTR_gpio; 12839574f36fSNeilBrown up->DTR_inverted = omap_up_info->DTR_inverted; 12849574f36fSNeilBrown } else 12859574f36fSNeilBrown up->DTR_gpio = -EINVAL; 12869574f36fSNeilBrown up->DTR_active = 0; 12879574f36fSNeilBrown 1288d8ee4ea6SFelipe Balbi up->dev = &pdev->dev; 1289ab4382d2SGreg Kroah-Hartman up->port.dev = &pdev->dev; 1290ab4382d2SGreg Kroah-Hartman up->port.type = PORT_OMAP; 1291ab4382d2SGreg Kroah-Hartman up->port.iotype = UPIO_MEM; 1292ab4382d2SGreg Kroah-Hartman up->port.irq = irq->start; 1293ab4382d2SGreg Kroah-Hartman 1294ab4382d2SGreg Kroah-Hartman up->port.regshift = 2; 1295ab4382d2SGreg Kroah-Hartman up->port.fifosize = 64; 1296ab4382d2SGreg Kroah-Hartman up->port.ops = &serial_omap_pops; 1297ab4382d2SGreg Kroah-Hartman 1298d92b0dfcSRajendra Nayak if (pdev->dev.of_node) 1299d92b0dfcSRajendra Nayak up->port.line = of_alias_get_id(pdev->dev.of_node, "serial"); 1300d92b0dfcSRajendra Nayak else 1301ab4382d2SGreg Kroah-Hartman up->port.line = pdev->id; 1302ab4382d2SGreg Kroah-Hartman 1303d92b0dfcSRajendra Nayak if (up->port.line < 0) { 1304d92b0dfcSRajendra Nayak dev_err(&pdev->dev, "failed to get alias/pdev id, errno %d\n", 1305d92b0dfcSRajendra Nayak up->port.line); 1306d92b0dfcSRajendra Nayak ret = -ENODEV; 1307388bc262SShubhrajyoti D goto err_port_line; 1308d92b0dfcSRajendra Nayak } 1309d92b0dfcSRajendra Nayak 1310d92b0dfcSRajendra Nayak sprintf(up->name, "OMAP UART%d", up->port.line); 1311edd70ad7SGovindraj.R up->port.mapbase = mem->start; 1312388bc262SShubhrajyoti D up->port.membase = devm_ioremap(&pdev->dev, mem->start, 1313388bc262SShubhrajyoti D resource_size(mem)); 1314edd70ad7SGovindraj.R if (!up->port.membase) { 1315edd70ad7SGovindraj.R dev_err(&pdev->dev, "can't ioremap UART\n"); 1316edd70ad7SGovindraj.R ret = -ENOMEM; 1317388bc262SShubhrajyoti D goto err_ioremap; 1318edd70ad7SGovindraj.R } 1319edd70ad7SGovindraj.R 1320ab4382d2SGreg Kroah-Hartman up->port.flags = omap_up_info->flags; 1321ab4382d2SGreg Kroah-Hartman up->port.uartclk = omap_up_info->uartclk; 13228fe789dcSRajendra Nayak if (!up->port.uartclk) { 13238fe789dcSRajendra Nayak up->port.uartclk = DEFAULT_CLK_SPEED; 13248fe789dcSRajendra Nayak dev_warn(&pdev->dev, "No clock speed specified: using default:" 13258fe789dcSRajendra Nayak "%d\n", DEFAULT_CLK_SPEED); 13268fe789dcSRajendra Nayak } 1327ab4382d2SGreg Kroah-Hartman 13282fd14964SGovindraj.R up->latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE; 13292fd14964SGovindraj.R up->calc_latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE; 13302fd14964SGovindraj.R pm_qos_add_request(&up->pm_qos_request, 13312fd14964SGovindraj.R PM_QOS_CPU_DMA_LATENCY, up->latency); 13322fd14964SGovindraj.R serial_omap_uart_wq = create_singlethread_workqueue(up->name); 13332fd14964SGovindraj.R INIT_WORK(&up->qos_work, serial_omap_uart_qos_work); 13342fd14964SGovindraj.R 133593220dccSFelipe Balbi platform_set_drvdata(pdev, up); 1336856e35bfSRuchika Kharwar pm_runtime_enable(&pdev->dev); 1337fcdca757SGovindraj.R pm_runtime_use_autosuspend(&pdev->dev); 1338fcdca757SGovindraj.R pm_runtime_set_autosuspend_delay(&pdev->dev, 1339c86845dbSDeepak K omap_up_info->autosuspend_timeout); 1340fcdca757SGovindraj.R 1341fcdca757SGovindraj.R pm_runtime_irq_safe(&pdev->dev); 1342fcdca757SGovindraj.R pm_runtime_get_sync(&pdev->dev); 1343fcdca757SGovindraj.R 13447c77c8deSGovindraj.R omap_serial_fill_features_erratas(up); 13457c77c8deSGovindraj.R 1346ba77433dSRajendra Nayak ui[up->port.line] = up; 1347ab4382d2SGreg Kroah-Hartman serial_omap_add_console_port(up); 1348ab4382d2SGreg Kroah-Hartman 1349ab4382d2SGreg Kroah-Hartman ret = uart_add_one_port(&serial_omap_reg, &up->port); 1350ab4382d2SGreg Kroah-Hartman if (ret != 0) 1351388bc262SShubhrajyoti D goto err_add_port; 1352ab4382d2SGreg Kroah-Hartman 1353660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 1354660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 1355ab4382d2SGreg Kroah-Hartman return 0; 1356388bc262SShubhrajyoti D 1357388bc262SShubhrajyoti D err_add_port: 1358388bc262SShubhrajyoti D pm_runtime_put(&pdev->dev); 1359388bc262SShubhrajyoti D pm_runtime_disable(&pdev->dev); 1360388bc262SShubhrajyoti D err_ioremap: 1361388bc262SShubhrajyoti D err_port_line: 1362ab4382d2SGreg Kroah-Hartman dev_err(&pdev->dev, "[UART%d]: failure [%s]: %d\n", 1363ab4382d2SGreg Kroah-Hartman pdev->id, __func__, ret); 1364ab4382d2SGreg Kroah-Hartman return ret; 1365ab4382d2SGreg Kroah-Hartman } 1366ab4382d2SGreg Kroah-Hartman 13676d608ef3SFelipe Balbi static int __devexit serial_omap_remove(struct platform_device *dev) 1368ab4382d2SGreg Kroah-Hartman { 1369ab4382d2SGreg Kroah-Hartman struct uart_omap_port *up = platform_get_drvdata(dev); 1370ab4382d2SGreg Kroah-Hartman 13717e9c8e7dSFelipe Balbi pm_runtime_put_sync(up->dev); 1372d8ee4ea6SFelipe Balbi pm_runtime_disable(up->dev); 1373ab4382d2SGreg Kroah-Hartman uart_remove_one_port(&serial_omap_reg, &up->port); 13742fd14964SGovindraj.R pm_qos_remove_request(&up->pm_qos_request); 1375fcdca757SGovindraj.R 1376ab4382d2SGreg Kroah-Hartman return 0; 1377ab4382d2SGreg Kroah-Hartman } 1378ab4382d2SGreg Kroah-Hartman 137994734749SGovindraj.R /* 138094734749SGovindraj.R * Work Around for Errata i202 (2430, 3430, 3630, 4430 and 4460) 138194734749SGovindraj.R * The access to uart register after MDR1 Access 138294734749SGovindraj.R * causes UART to corrupt data. 138394734749SGovindraj.R * 138494734749SGovindraj.R * Need a delay = 138594734749SGovindraj.R * 5 L4 clock cycles + 5 UART functional clock cycle (@48MHz = ~0.2uS) 138694734749SGovindraj.R * give 10 times as much 138794734749SGovindraj.R */ 138894734749SGovindraj.R static void serial_omap_mdr1_errataset(struct uart_omap_port *up, u8 mdr1) 138994734749SGovindraj.R { 139094734749SGovindraj.R u8 timeout = 255; 139194734749SGovindraj.R 139294734749SGovindraj.R serial_out(up, UART_OMAP_MDR1, mdr1); 139394734749SGovindraj.R udelay(2); 139494734749SGovindraj.R serial_out(up, UART_FCR, up->fcr | UART_FCR_CLEAR_XMIT | 139594734749SGovindraj.R UART_FCR_CLEAR_RCVR); 139694734749SGovindraj.R /* 139794734749SGovindraj.R * Wait for FIFO to empty: when empty, RX_FIFO_E bit is 0 and 139894734749SGovindraj.R * TX_FIFO_E bit is 1. 139994734749SGovindraj.R */ 140094734749SGovindraj.R while (UART_LSR_THRE != (serial_in(up, UART_LSR) & 140194734749SGovindraj.R (UART_LSR_THRE | UART_LSR_DR))) { 140294734749SGovindraj.R timeout--; 140394734749SGovindraj.R if (!timeout) { 140494734749SGovindraj.R /* Should *never* happen. we warn and carry on */ 1405d8ee4ea6SFelipe Balbi dev_crit(up->dev, "Errata i202: timedout %x\n", 140694734749SGovindraj.R serial_in(up, UART_LSR)); 140794734749SGovindraj.R break; 140894734749SGovindraj.R } 140994734749SGovindraj.R udelay(1); 141094734749SGovindraj.R } 141194734749SGovindraj.R } 141294734749SGovindraj.R 1413b5148856SShubhrajyoti D #ifdef CONFIG_PM_RUNTIME 14149f9ac1e8SGovindraj.R static void serial_omap_restore_context(struct uart_omap_port *up) 14159f9ac1e8SGovindraj.R { 141694734749SGovindraj.R if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) 141794734749SGovindraj.R serial_omap_mdr1_errataset(up, UART_OMAP_MDR1_DISABLE); 141894734749SGovindraj.R else 14199f9ac1e8SGovindraj.R serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE); 142094734749SGovindraj.R 14219f9ac1e8SGovindraj.R serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */ 14229f9ac1e8SGovindraj.R serial_out(up, UART_EFR, UART_EFR_ECB); 14239f9ac1e8SGovindraj.R serial_out(up, UART_LCR, 0x0); /* Operational mode */ 14249f9ac1e8SGovindraj.R serial_out(up, UART_IER, 0x0); 14259f9ac1e8SGovindraj.R serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */ 1426c538d20cSGovindraj.R serial_out(up, UART_DLL, up->dll); 1427c538d20cSGovindraj.R serial_out(up, UART_DLM, up->dlh); 14289f9ac1e8SGovindraj.R serial_out(up, UART_LCR, 0x0); /* Operational mode */ 14299f9ac1e8SGovindraj.R serial_out(up, UART_IER, up->ier); 14309f9ac1e8SGovindraj.R serial_out(up, UART_FCR, up->fcr); 14319f9ac1e8SGovindraj.R serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 14329f9ac1e8SGovindraj.R serial_out(up, UART_MCR, up->mcr); 14339f9ac1e8SGovindraj.R serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */ 1434c538d20cSGovindraj.R serial_out(up, UART_OMAP_SCR, up->scr); 14359f9ac1e8SGovindraj.R serial_out(up, UART_EFR, up->efr); 14369f9ac1e8SGovindraj.R serial_out(up, UART_LCR, up->lcr); 143794734749SGovindraj.R if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) 143894734749SGovindraj.R serial_omap_mdr1_errataset(up, up->mdr1); 143994734749SGovindraj.R else 1440c538d20cSGovindraj.R serial_out(up, UART_OMAP_MDR1, up->mdr1); 14419f9ac1e8SGovindraj.R } 14429f9ac1e8SGovindraj.R 1443fcdca757SGovindraj.R static int serial_omap_runtime_suspend(struct device *dev) 1444fcdca757SGovindraj.R { 1445ec3bebc6SGovindraj.R struct uart_omap_port *up = dev_get_drvdata(dev); 1446ec3bebc6SGovindraj.R struct omap_uart_port_info *pdata = dev->platform_data; 1447ec3bebc6SGovindraj.R 1448ec3bebc6SGovindraj.R if (!up) 1449ec3bebc6SGovindraj.R return -EINVAL; 1450ec3bebc6SGovindraj.R 1451e5b57c03SFelipe Balbi if (!pdata) 145262f3ec5fSGovindraj.R return 0; 145362f3ec5fSGovindraj.R 1454e5b57c03SFelipe Balbi up->context_loss_cnt = serial_omap_get_context_loss_count(up); 1455ec3bebc6SGovindraj.R 145662f3ec5fSGovindraj.R if (device_may_wakeup(dev)) { 145762f3ec5fSGovindraj.R if (!up->wakeups_enabled) { 1458e5b57c03SFelipe Balbi serial_omap_enable_wakeup(up, true); 145962f3ec5fSGovindraj.R up->wakeups_enabled = true; 146062f3ec5fSGovindraj.R } 146162f3ec5fSGovindraj.R } else { 146262f3ec5fSGovindraj.R if (up->wakeups_enabled) { 1463e5b57c03SFelipe Balbi serial_omap_enable_wakeup(up, false); 146462f3ec5fSGovindraj.R up->wakeups_enabled = false; 146562f3ec5fSGovindraj.R } 146662f3ec5fSGovindraj.R } 146762f3ec5fSGovindraj.R 14682fd14964SGovindraj.R up->latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE; 14692fd14964SGovindraj.R schedule_work(&up->qos_work); 14702fd14964SGovindraj.R 1471fcdca757SGovindraj.R return 0; 1472fcdca757SGovindraj.R } 1473fcdca757SGovindraj.R 1474fcdca757SGovindraj.R static int serial_omap_runtime_resume(struct device *dev) 1475fcdca757SGovindraj.R { 14769f9ac1e8SGovindraj.R struct uart_omap_port *up = dev_get_drvdata(dev); 1477ec3bebc6SGovindraj.R struct omap_uart_port_info *pdata = dev->platform_data; 14789f9ac1e8SGovindraj.R 1479a5f43138SCousson, Benoit if (up && pdata) { 1480e5b57c03SFelipe Balbi u32 loss_cnt = serial_omap_get_context_loss_count(up); 1481ec3bebc6SGovindraj.R 1482ec3bebc6SGovindraj.R if (up->context_loss_cnt != loss_cnt) 14839f9ac1e8SGovindraj.R serial_omap_restore_context(up); 148494734749SGovindraj.R 14852fd14964SGovindraj.R up->latency = up->calc_latency; 14862fd14964SGovindraj.R schedule_work(&up->qos_work); 1487ec3bebc6SGovindraj.R } 14889f9ac1e8SGovindraj.R 1489fcdca757SGovindraj.R return 0; 1490fcdca757SGovindraj.R } 1491fcdca757SGovindraj.R #endif 1492fcdca757SGovindraj.R 1493fcdca757SGovindraj.R static const struct dev_pm_ops serial_omap_dev_pm_ops = { 1494fcdca757SGovindraj.R SET_SYSTEM_SLEEP_PM_OPS(serial_omap_suspend, serial_omap_resume) 1495fcdca757SGovindraj.R SET_RUNTIME_PM_OPS(serial_omap_runtime_suspend, 1496fcdca757SGovindraj.R serial_omap_runtime_resume, NULL) 1497fcdca757SGovindraj.R }; 1498fcdca757SGovindraj.R 1499d92b0dfcSRajendra Nayak #if defined(CONFIG_OF) 1500d92b0dfcSRajendra Nayak static const struct of_device_id omap_serial_of_match[] = { 1501d92b0dfcSRajendra Nayak { .compatible = "ti,omap2-uart" }, 1502d92b0dfcSRajendra Nayak { .compatible = "ti,omap3-uart" }, 1503d92b0dfcSRajendra Nayak { .compatible = "ti,omap4-uart" }, 1504d92b0dfcSRajendra Nayak {}, 1505d92b0dfcSRajendra Nayak }; 1506d92b0dfcSRajendra Nayak MODULE_DEVICE_TABLE(of, omap_serial_of_match); 1507d92b0dfcSRajendra Nayak #endif 1508d92b0dfcSRajendra Nayak 1509ab4382d2SGreg Kroah-Hartman static struct platform_driver serial_omap_driver = { 1510ab4382d2SGreg Kroah-Hartman .probe = serial_omap_probe, 15116d608ef3SFelipe Balbi .remove = __devexit_p(serial_omap_remove), 1512ab4382d2SGreg Kroah-Hartman .driver = { 1513ab4382d2SGreg Kroah-Hartman .name = DRIVER_NAME, 1514fcdca757SGovindraj.R .pm = &serial_omap_dev_pm_ops, 1515d92b0dfcSRajendra Nayak .of_match_table = of_match_ptr(omap_serial_of_match), 1516ab4382d2SGreg Kroah-Hartman }, 1517ab4382d2SGreg Kroah-Hartman }; 1518ab4382d2SGreg Kroah-Hartman 1519ab4382d2SGreg Kroah-Hartman static int __init serial_omap_init(void) 1520ab4382d2SGreg Kroah-Hartman { 1521ab4382d2SGreg Kroah-Hartman int ret; 1522ab4382d2SGreg Kroah-Hartman 1523ab4382d2SGreg Kroah-Hartman ret = uart_register_driver(&serial_omap_reg); 1524ab4382d2SGreg Kroah-Hartman if (ret != 0) 1525ab4382d2SGreg Kroah-Hartman return ret; 1526ab4382d2SGreg Kroah-Hartman ret = platform_driver_register(&serial_omap_driver); 1527ab4382d2SGreg Kroah-Hartman if (ret != 0) 1528ab4382d2SGreg Kroah-Hartman uart_unregister_driver(&serial_omap_reg); 1529ab4382d2SGreg Kroah-Hartman return ret; 1530ab4382d2SGreg Kroah-Hartman } 1531ab4382d2SGreg Kroah-Hartman 1532ab4382d2SGreg Kroah-Hartman static void __exit serial_omap_exit(void) 1533ab4382d2SGreg Kroah-Hartman { 1534ab4382d2SGreg Kroah-Hartman platform_driver_unregister(&serial_omap_driver); 1535ab4382d2SGreg Kroah-Hartman uart_unregister_driver(&serial_omap_reg); 1536ab4382d2SGreg Kroah-Hartman } 1537ab4382d2SGreg Kroah-Hartman 1538ab4382d2SGreg Kroah-Hartman module_init(serial_omap_init); 1539ab4382d2SGreg Kroah-Hartman module_exit(serial_omap_exit); 1540ab4382d2SGreg Kroah-Hartman 1541ab4382d2SGreg Kroah-Hartman MODULE_DESCRIPTION("OMAP High Speed UART driver"); 1542ab4382d2SGreg Kroah-Hartman MODULE_LICENSE("GPL"); 1543ab4382d2SGreg Kroah-Hartman MODULE_AUTHOR("Texas Instruments Inc"); 1544