1ab4382d2SGreg Kroah-Hartman /* 2ab4382d2SGreg Kroah-Hartman * Driver for OMAP-UART controller. 3ab4382d2SGreg Kroah-Hartman * Based on drivers/serial/8250.c 4ab4382d2SGreg Kroah-Hartman * 5ab4382d2SGreg Kroah-Hartman * Copyright (C) 2010 Texas Instruments. 6ab4382d2SGreg Kroah-Hartman * 7ab4382d2SGreg Kroah-Hartman * Authors: 8ab4382d2SGreg Kroah-Hartman * Govindraj R <govindraj.raja@ti.com> 9ab4382d2SGreg Kroah-Hartman * Thara Gopinath <thara@ti.com> 10ab4382d2SGreg Kroah-Hartman * 11ab4382d2SGreg Kroah-Hartman * This program is free software; you can redistribute it and/or modify 12ab4382d2SGreg Kroah-Hartman * it under the terms of the GNU General Public License as published by 13ab4382d2SGreg Kroah-Hartman * the Free Software Foundation; either version 2 of the License, or 14ab4382d2SGreg Kroah-Hartman * (at your option) any later version. 15ab4382d2SGreg Kroah-Hartman * 1625985edcSLucas De Marchi * Note: This driver is made separate from 8250 driver as we cannot 17ab4382d2SGreg Kroah-Hartman * over load 8250 driver with omap platform specific configuration for 18ab4382d2SGreg Kroah-Hartman * features like DMA, it makes easier to implement features like DMA and 19ab4382d2SGreg Kroah-Hartman * hardware flow control and software flow control configuration with 20ab4382d2SGreg Kroah-Hartman * this driver as required for the omap-platform. 21ab4382d2SGreg Kroah-Hartman */ 22ab4382d2SGreg Kroah-Hartman 23364a6eceSThomas Weber #if defined(CONFIG_SERIAL_OMAP_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) 24364a6eceSThomas Weber #define SUPPORT_SYSRQ 25364a6eceSThomas Weber #endif 26364a6eceSThomas Weber 27ab4382d2SGreg Kroah-Hartman #include <linux/module.h> 28ab4382d2SGreg Kroah-Hartman #include <linux/init.h> 29ab4382d2SGreg Kroah-Hartman #include <linux/console.h> 30ab4382d2SGreg Kroah-Hartman #include <linux/serial_reg.h> 31ab4382d2SGreg Kroah-Hartman #include <linux/delay.h> 32ab4382d2SGreg Kroah-Hartman #include <linux/slab.h> 33ab4382d2SGreg Kroah-Hartman #include <linux/tty.h> 34ab4382d2SGreg Kroah-Hartman #include <linux/tty_flip.h> 35ab4382d2SGreg Kroah-Hartman #include <linux/io.h> 36ab4382d2SGreg Kroah-Hartman #include <linux/clk.h> 37ab4382d2SGreg Kroah-Hartman #include <linux/serial_core.h> 38ab4382d2SGreg Kroah-Hartman #include <linux/irq.h> 39fcdca757SGovindraj.R #include <linux/pm_runtime.h> 40d92b0dfcSRajendra Nayak #include <linux/of.h> 419574f36fSNeilBrown #include <linux/gpio.h> 42ab4382d2SGreg Kroah-Hartman 43ab4382d2SGreg Kroah-Hartman #include <plat/dmtimer.h> 44ab4382d2SGreg Kroah-Hartman #include <plat/omap-serial.h> 45ab4382d2SGreg Kroah-Hartman 467c77c8deSGovindraj.R #define UART_BUILD_REVISION(x, y) (((x) << 8) | (y)) 477c77c8deSGovindraj.R 487c77c8deSGovindraj.R #define OMAP_UART_REV_42 0x0402 497c77c8deSGovindraj.R #define OMAP_UART_REV_46 0x0406 507c77c8deSGovindraj.R #define OMAP_UART_REV_52 0x0502 517c77c8deSGovindraj.R #define OMAP_UART_REV_63 0x0603 527c77c8deSGovindraj.R 538fe789dcSRajendra Nayak #define DEFAULT_CLK_SPEED 48000000 /* 48Mhz*/ 548fe789dcSRajendra Nayak 550ba5f668SPaul Walmsley /* SCR register bitmasks */ 560ba5f668SPaul Walmsley #define OMAP_UART_SCR_RX_TRIG_GRANU1_MASK (1 << 7) 570ba5f668SPaul Walmsley 580ba5f668SPaul Walmsley /* FCR register bitmasks */ 590ba5f668SPaul Walmsley #define OMAP_UART_FCR_RX_FIFO_TRIG_SHIFT 6 600ba5f668SPaul Walmsley #define OMAP_UART_FCR_RX_FIFO_TRIG_MASK (0x3 << 6) 610ba5f668SPaul Walmsley 627c77c8deSGovindraj.R /* MVR register bitmasks */ 637c77c8deSGovindraj.R #define OMAP_UART_MVR_SCHEME_SHIFT 30 647c77c8deSGovindraj.R 657c77c8deSGovindraj.R #define OMAP_UART_LEGACY_MVR_MAJ_MASK 0xf0 667c77c8deSGovindraj.R #define OMAP_UART_LEGACY_MVR_MAJ_SHIFT 4 677c77c8deSGovindraj.R #define OMAP_UART_LEGACY_MVR_MIN_MASK 0x0f 687c77c8deSGovindraj.R 697c77c8deSGovindraj.R #define OMAP_UART_MVR_MAJ_MASK 0x700 707c77c8deSGovindraj.R #define OMAP_UART_MVR_MAJ_SHIFT 8 717c77c8deSGovindraj.R #define OMAP_UART_MVR_MIN_MASK 0x3f 727c77c8deSGovindraj.R 73ab4382d2SGreg Kroah-Hartman static struct uart_omap_port *ui[OMAP_MAX_HSUART_PORTS]; 74ab4382d2SGreg Kroah-Hartman 75ab4382d2SGreg Kroah-Hartman /* Forward declaration of functions */ 7694734749SGovindraj.R static void serial_omap_mdr1_errataset(struct uart_omap_port *up, u8 mdr1); 77ab4382d2SGreg Kroah-Hartman 782fd14964SGovindraj.R static struct workqueue_struct *serial_omap_uart_wq; 79ab4382d2SGreg Kroah-Hartman 80ab4382d2SGreg Kroah-Hartman static inline unsigned int serial_in(struct uart_omap_port *up, int offset) 81ab4382d2SGreg Kroah-Hartman { 82ab4382d2SGreg Kroah-Hartman offset <<= up->port.regshift; 83ab4382d2SGreg Kroah-Hartman return readw(up->port.membase + offset); 84ab4382d2SGreg Kroah-Hartman } 85ab4382d2SGreg Kroah-Hartman 86ab4382d2SGreg Kroah-Hartman static inline void serial_out(struct uart_omap_port *up, int offset, int value) 87ab4382d2SGreg Kroah-Hartman { 88ab4382d2SGreg Kroah-Hartman offset <<= up->port.regshift; 89ab4382d2SGreg Kroah-Hartman writew(value, up->port.membase + offset); 90ab4382d2SGreg Kroah-Hartman } 91ab4382d2SGreg Kroah-Hartman 92ab4382d2SGreg Kroah-Hartman static inline void serial_omap_clear_fifos(struct uart_omap_port *up) 93ab4382d2SGreg Kroah-Hartman { 94ab4382d2SGreg Kroah-Hartman serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO); 95ab4382d2SGreg Kroah-Hartman serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | 96ab4382d2SGreg Kroah-Hartman UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); 97ab4382d2SGreg Kroah-Hartman serial_out(up, UART_FCR, 0); 98ab4382d2SGreg Kroah-Hartman } 99ab4382d2SGreg Kroah-Hartman 100e5b57c03SFelipe Balbi static int serial_omap_get_context_loss_count(struct uart_omap_port *up) 101e5b57c03SFelipe Balbi { 102d8ee4ea6SFelipe Balbi struct omap_uart_port_info *pdata = up->dev->platform_data; 103e5b57c03SFelipe Balbi 104e5b57c03SFelipe Balbi if (!pdata->get_context_loss_count) 105e5b57c03SFelipe Balbi return 0; 106e5b57c03SFelipe Balbi 107d8ee4ea6SFelipe Balbi return pdata->get_context_loss_count(up->dev); 108e5b57c03SFelipe Balbi } 109e5b57c03SFelipe Balbi 110e5b57c03SFelipe Balbi static void serial_omap_set_forceidle(struct uart_omap_port *up) 111e5b57c03SFelipe Balbi { 112d8ee4ea6SFelipe Balbi struct omap_uart_port_info *pdata = up->dev->platform_data; 113e5b57c03SFelipe Balbi 114e5b57c03SFelipe Balbi if (pdata->set_forceidle) 115d8ee4ea6SFelipe Balbi pdata->set_forceidle(up->dev); 116e5b57c03SFelipe Balbi } 117e5b57c03SFelipe Balbi 118e5b57c03SFelipe Balbi static void serial_omap_set_noidle(struct uart_omap_port *up) 119e5b57c03SFelipe Balbi { 120d8ee4ea6SFelipe Balbi struct omap_uart_port_info *pdata = up->dev->platform_data; 121e5b57c03SFelipe Balbi 122e5b57c03SFelipe Balbi if (pdata->set_noidle) 123d8ee4ea6SFelipe Balbi pdata->set_noidle(up->dev); 124e5b57c03SFelipe Balbi } 125e5b57c03SFelipe Balbi 126e5b57c03SFelipe Balbi static void serial_omap_enable_wakeup(struct uart_omap_port *up, bool enable) 127e5b57c03SFelipe Balbi { 128d8ee4ea6SFelipe Balbi struct omap_uart_port_info *pdata = up->dev->platform_data; 129e5b57c03SFelipe Balbi 130e5b57c03SFelipe Balbi if (pdata->enable_wakeup) 131d8ee4ea6SFelipe Balbi pdata->enable_wakeup(up->dev, enable); 132e5b57c03SFelipe Balbi } 133e5b57c03SFelipe Balbi 134ab4382d2SGreg Kroah-Hartman /* 135ab4382d2SGreg Kroah-Hartman * serial_omap_get_divisor - calculate divisor value 136ab4382d2SGreg Kroah-Hartman * @port: uart port info 137ab4382d2SGreg Kroah-Hartman * @baud: baudrate for which divisor needs to be calculated. 138ab4382d2SGreg Kroah-Hartman * 139ab4382d2SGreg Kroah-Hartman * We have written our own function to get the divisor so as to support 140ab4382d2SGreg Kroah-Hartman * 13x mode. 3Mbps Baudrate as an different divisor. 141ab4382d2SGreg Kroah-Hartman * Reference OMAP TRM Chapter 17: 142ab4382d2SGreg Kroah-Hartman * Table 17-1. UART Mode Baud Rates, Divisor Values, and Error Rates 143ab4382d2SGreg Kroah-Hartman * referring to oversampling - divisor value 144ab4382d2SGreg Kroah-Hartman * baudrate 460,800 to 3,686,400 all have divisor 13 145ab4382d2SGreg Kroah-Hartman * except 3,000,000 which has divisor value 16 146ab4382d2SGreg Kroah-Hartman */ 147ab4382d2SGreg Kroah-Hartman static unsigned int 148ab4382d2SGreg Kroah-Hartman serial_omap_get_divisor(struct uart_port *port, unsigned int baud) 149ab4382d2SGreg Kroah-Hartman { 150ab4382d2SGreg Kroah-Hartman unsigned int divisor; 151ab4382d2SGreg Kroah-Hartman 152ab4382d2SGreg Kroah-Hartman if (baud > OMAP_MODE13X_SPEED && baud != 3000000) 153ab4382d2SGreg Kroah-Hartman divisor = 13; 154ab4382d2SGreg Kroah-Hartman else 155ab4382d2SGreg Kroah-Hartman divisor = 16; 156ab4382d2SGreg Kroah-Hartman return port->uartclk/(baud * divisor); 157ab4382d2SGreg Kroah-Hartman } 158ab4382d2SGreg Kroah-Hartman 159ab4382d2SGreg Kroah-Hartman static void serial_omap_enable_ms(struct uart_port *port) 160ab4382d2SGreg Kroah-Hartman { 161c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 162ab4382d2SGreg Kroah-Hartman 163ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_enable_ms+%d\n", up->port.line); 164fcdca757SGovindraj.R 165d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 166ab4382d2SGreg Kroah-Hartman up->ier |= UART_IER_MSI; 167ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 168d8ee4ea6SFelipe Balbi pm_runtime_put(up->dev); 169ab4382d2SGreg Kroah-Hartman } 170ab4382d2SGreg Kroah-Hartman 171ab4382d2SGreg Kroah-Hartman static void serial_omap_stop_tx(struct uart_port *port) 172ab4382d2SGreg Kroah-Hartman { 173c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 174ab4382d2SGreg Kroah-Hartman 175d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 176ab4382d2SGreg Kroah-Hartman if (up->ier & UART_IER_THRI) { 177ab4382d2SGreg Kroah-Hartman up->ier &= ~UART_IER_THRI; 178ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 179ab4382d2SGreg Kroah-Hartman } 180fcdca757SGovindraj.R 181e5b57c03SFelipe Balbi serial_omap_set_forceidle(up); 182be4b0281SPaul Walmsley 183d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 184d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 185ab4382d2SGreg Kroah-Hartman } 186ab4382d2SGreg Kroah-Hartman 187ab4382d2SGreg Kroah-Hartman static void serial_omap_stop_rx(struct uart_port *port) 188ab4382d2SGreg Kroah-Hartman { 189c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 190ab4382d2SGreg Kroah-Hartman 191d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 192ab4382d2SGreg Kroah-Hartman up->ier &= ~UART_IER_RLSI; 193ab4382d2SGreg Kroah-Hartman up->port.read_status_mask &= ~UART_LSR_DR; 194ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 195d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 196d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 197ab4382d2SGreg Kroah-Hartman } 198ab4382d2SGreg Kroah-Hartman 199da274686SGovindraj.R static inline void receive_chars(struct uart_omap_port *up, 200da274686SGovindraj.R unsigned int *status) 201ab4382d2SGreg Kroah-Hartman { 202ab4382d2SGreg Kroah-Hartman struct tty_struct *tty = up->port.state->port.tty; 203da274686SGovindraj.R unsigned int flag, lsr = *status; 204da274686SGovindraj.R unsigned char ch = 0; 205ab4382d2SGreg Kroah-Hartman int max_count = 256; 206ab4382d2SGreg Kroah-Hartman 207ab4382d2SGreg Kroah-Hartman do { 208ab4382d2SGreg Kroah-Hartman if (likely(lsr & UART_LSR_DR)) 209ab4382d2SGreg Kroah-Hartman ch = serial_in(up, UART_RX); 210ab4382d2SGreg Kroah-Hartman flag = TTY_NORMAL; 211ab4382d2SGreg Kroah-Hartman up->port.icount.rx++; 212ab4382d2SGreg Kroah-Hartman 213ab4382d2SGreg Kroah-Hartman if (unlikely(lsr & UART_LSR_BRK_ERROR_BITS)) { 214ab4382d2SGreg Kroah-Hartman /* 215ab4382d2SGreg Kroah-Hartman * For statistics only 216ab4382d2SGreg Kroah-Hartman */ 217ab4382d2SGreg Kroah-Hartman if (lsr & UART_LSR_BI) { 218ab4382d2SGreg Kroah-Hartman lsr &= ~(UART_LSR_FE | UART_LSR_PE); 219ab4382d2SGreg Kroah-Hartman up->port.icount.brk++; 220ab4382d2SGreg Kroah-Hartman /* 221ab4382d2SGreg Kroah-Hartman * We do the SysRQ and SAK checking 222ab4382d2SGreg Kroah-Hartman * here because otherwise the break 223ab4382d2SGreg Kroah-Hartman * may get masked by ignore_status_mask 224ab4382d2SGreg Kroah-Hartman * or read_status_mask. 225ab4382d2SGreg Kroah-Hartman */ 226ab4382d2SGreg Kroah-Hartman if (uart_handle_break(&up->port)) 227ab4382d2SGreg Kroah-Hartman goto ignore_char; 228ab4382d2SGreg Kroah-Hartman } else if (lsr & UART_LSR_PE) { 229ab4382d2SGreg Kroah-Hartman up->port.icount.parity++; 230ab4382d2SGreg Kroah-Hartman } else if (lsr & UART_LSR_FE) { 231ab4382d2SGreg Kroah-Hartman up->port.icount.frame++; 232ab4382d2SGreg Kroah-Hartman } 233ab4382d2SGreg Kroah-Hartman 234ab4382d2SGreg Kroah-Hartman if (lsr & UART_LSR_OE) 235ab4382d2SGreg Kroah-Hartman up->port.icount.overrun++; 236ab4382d2SGreg Kroah-Hartman 237ab4382d2SGreg Kroah-Hartman /* 238ab4382d2SGreg Kroah-Hartman * Mask off conditions which should be ignored. 239ab4382d2SGreg Kroah-Hartman */ 240ab4382d2SGreg Kroah-Hartman lsr &= up->port.read_status_mask; 241ab4382d2SGreg Kroah-Hartman 242ab4382d2SGreg Kroah-Hartman #ifdef CONFIG_SERIAL_OMAP_CONSOLE 243ab4382d2SGreg Kroah-Hartman if (up->port.line == up->port.cons->index) { 244ab4382d2SGreg Kroah-Hartman /* Recover the break flag from console xmit */ 245ab4382d2SGreg Kroah-Hartman lsr |= up->lsr_break_flag; 246ab4382d2SGreg Kroah-Hartman } 247ab4382d2SGreg Kroah-Hartman #endif 248ab4382d2SGreg Kroah-Hartman if (lsr & UART_LSR_BI) 249ab4382d2SGreg Kroah-Hartman flag = TTY_BREAK; 250ab4382d2SGreg Kroah-Hartman else if (lsr & UART_LSR_PE) 251ab4382d2SGreg Kroah-Hartman flag = TTY_PARITY; 252ab4382d2SGreg Kroah-Hartman else if (lsr & UART_LSR_FE) 253ab4382d2SGreg Kroah-Hartman flag = TTY_FRAME; 254ab4382d2SGreg Kroah-Hartman } 255ab4382d2SGreg Kroah-Hartman 256ab4382d2SGreg Kroah-Hartman if (uart_handle_sysrq_char(&up->port, ch)) 257ab4382d2SGreg Kroah-Hartman goto ignore_char; 258ab4382d2SGreg Kroah-Hartman uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag); 259ab4382d2SGreg Kroah-Hartman ignore_char: 260ab4382d2SGreg Kroah-Hartman lsr = serial_in(up, UART_LSR); 261ab4382d2SGreg Kroah-Hartman } while ((lsr & (UART_LSR_DR | UART_LSR_BI)) && (max_count-- > 0)); 262ab4382d2SGreg Kroah-Hartman spin_unlock(&up->port.lock); 263ab4382d2SGreg Kroah-Hartman tty_flip_buffer_push(tty); 264ab4382d2SGreg Kroah-Hartman spin_lock(&up->port.lock); 265ab4382d2SGreg Kroah-Hartman } 266ab4382d2SGreg Kroah-Hartman 267ab4382d2SGreg Kroah-Hartman static void transmit_chars(struct uart_omap_port *up) 268ab4382d2SGreg Kroah-Hartman { 269ab4382d2SGreg Kroah-Hartman struct circ_buf *xmit = &up->port.state->xmit; 270ab4382d2SGreg Kroah-Hartman int count; 271ab4382d2SGreg Kroah-Hartman 272ab4382d2SGreg Kroah-Hartman if (up->port.x_char) { 273ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TX, up->port.x_char); 274ab4382d2SGreg Kroah-Hartman up->port.icount.tx++; 275ab4382d2SGreg Kroah-Hartman up->port.x_char = 0; 276ab4382d2SGreg Kroah-Hartman return; 277ab4382d2SGreg Kroah-Hartman } 278ab4382d2SGreg Kroah-Hartman if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { 279ab4382d2SGreg Kroah-Hartman serial_omap_stop_tx(&up->port); 280ab4382d2SGreg Kroah-Hartman return; 281ab4382d2SGreg Kroah-Hartman } 282af681cadSGreg Kroah-Hartman count = up->port.fifosize / 4; 283ab4382d2SGreg Kroah-Hartman do { 284ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TX, xmit->buf[xmit->tail]); 285ab4382d2SGreg Kroah-Hartman xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 286ab4382d2SGreg Kroah-Hartman up->port.icount.tx++; 287ab4382d2SGreg Kroah-Hartman if (uart_circ_empty(xmit)) 288ab4382d2SGreg Kroah-Hartman break; 289ab4382d2SGreg Kroah-Hartman } while (--count > 0); 290ab4382d2SGreg Kroah-Hartman 291ab4382d2SGreg Kroah-Hartman if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 292ab4382d2SGreg Kroah-Hartman uart_write_wakeup(&up->port); 293ab4382d2SGreg Kroah-Hartman 294ab4382d2SGreg Kroah-Hartman if (uart_circ_empty(xmit)) 295ab4382d2SGreg Kroah-Hartman serial_omap_stop_tx(&up->port); 296ab4382d2SGreg Kroah-Hartman } 297ab4382d2SGreg Kroah-Hartman 298ab4382d2SGreg Kroah-Hartman static inline void serial_omap_enable_ier_thri(struct uart_omap_port *up) 299ab4382d2SGreg Kroah-Hartman { 300ab4382d2SGreg Kroah-Hartman if (!(up->ier & UART_IER_THRI)) { 301ab4382d2SGreg Kroah-Hartman up->ier |= UART_IER_THRI; 302ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 303ab4382d2SGreg Kroah-Hartman } 304ab4382d2SGreg Kroah-Hartman } 305ab4382d2SGreg Kroah-Hartman 306ab4382d2SGreg Kroah-Hartman static void serial_omap_start_tx(struct uart_port *port) 307ab4382d2SGreg Kroah-Hartman { 308c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 309ab4382d2SGreg Kroah-Hartman 310d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 311ab4382d2SGreg Kroah-Hartman serial_omap_enable_ier_thri(up); 312e5b57c03SFelipe Balbi serial_omap_set_noidle(up); 313d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 314d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 315ab4382d2SGreg Kroah-Hartman } 316ab4382d2SGreg Kroah-Hartman 317ab4382d2SGreg Kroah-Hartman static unsigned int check_modem_status(struct uart_omap_port *up) 318ab4382d2SGreg Kroah-Hartman { 319ab4382d2SGreg Kroah-Hartman unsigned int status; 320ab4382d2SGreg Kroah-Hartman 321ab4382d2SGreg Kroah-Hartman status = serial_in(up, UART_MSR); 322ab4382d2SGreg Kroah-Hartman status |= up->msr_saved_flags; 323ab4382d2SGreg Kroah-Hartman up->msr_saved_flags = 0; 324ab4382d2SGreg Kroah-Hartman if ((status & UART_MSR_ANY_DELTA) == 0) 325ab4382d2SGreg Kroah-Hartman return status; 326ab4382d2SGreg Kroah-Hartman 327ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI && 328ab4382d2SGreg Kroah-Hartman up->port.state != NULL) { 329ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_TERI) 330ab4382d2SGreg Kroah-Hartman up->port.icount.rng++; 331ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DDSR) 332ab4382d2SGreg Kroah-Hartman up->port.icount.dsr++; 333ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DDCD) 334ab4382d2SGreg Kroah-Hartman uart_handle_dcd_change 335ab4382d2SGreg Kroah-Hartman (&up->port, status & UART_MSR_DCD); 336ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DCTS) 337ab4382d2SGreg Kroah-Hartman uart_handle_cts_change 338ab4382d2SGreg Kroah-Hartman (&up->port, status & UART_MSR_CTS); 339ab4382d2SGreg Kroah-Hartman wake_up_interruptible(&up->port.state->port.delta_msr_wait); 340ab4382d2SGreg Kroah-Hartman } 341ab4382d2SGreg Kroah-Hartman 342ab4382d2SGreg Kroah-Hartman return status; 343ab4382d2SGreg Kroah-Hartman } 344ab4382d2SGreg Kroah-Hartman 345ab4382d2SGreg Kroah-Hartman /** 346ab4382d2SGreg Kroah-Hartman * serial_omap_irq() - This handles the interrupt from one port 347ab4382d2SGreg Kroah-Hartman * @irq: uart port irq number 348ab4382d2SGreg Kroah-Hartman * @dev_id: uart port info 349ab4382d2SGreg Kroah-Hartman */ 350ab4382d2SGreg Kroah-Hartman static inline irqreturn_t serial_omap_irq(int irq, void *dev_id) 351ab4382d2SGreg Kroah-Hartman { 352ab4382d2SGreg Kroah-Hartman struct uart_omap_port *up = dev_id; 353ab4382d2SGreg Kroah-Hartman unsigned int iir, lsr; 354ab4382d2SGreg Kroah-Hartman unsigned long flags; 355ab4382d2SGreg Kroah-Hartman 356d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 357ab4382d2SGreg Kroah-Hartman iir = serial_in(up, UART_IIR); 358fcdca757SGovindraj.R if (iir & UART_IIR_NO_INT) { 359d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 360d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 361ab4382d2SGreg Kroah-Hartman return IRQ_NONE; 362fcdca757SGovindraj.R } 363ab4382d2SGreg Kroah-Hartman 364ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags); 365ab4382d2SGreg Kroah-Hartman lsr = serial_in(up, UART_LSR); 366ab4382d2SGreg Kroah-Hartman if (iir & UART_IIR_RLSI) { 367ab4382d2SGreg Kroah-Hartman if (lsr & UART_LSR_DR) 368ab4382d2SGreg Kroah-Hartman receive_chars(up, &lsr); 369ab4382d2SGreg Kroah-Hartman } 370ab4382d2SGreg Kroah-Hartman 371ab4382d2SGreg Kroah-Hartman check_modem_status(up); 372ab4382d2SGreg Kroah-Hartman if ((lsr & UART_LSR_THRE) && (iir & UART_IIR_THRI)) 373ab4382d2SGreg Kroah-Hartman transmit_chars(up); 374ab4382d2SGreg Kroah-Hartman 375ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags); 376d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 377d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 378fcdca757SGovindraj.R 379ab4382d2SGreg Kroah-Hartman up->port_activity = jiffies; 380ab4382d2SGreg Kroah-Hartman return IRQ_HANDLED; 381ab4382d2SGreg Kroah-Hartman } 382ab4382d2SGreg Kroah-Hartman 383ab4382d2SGreg Kroah-Hartman static unsigned int serial_omap_tx_empty(struct uart_port *port) 384ab4382d2SGreg Kroah-Hartman { 385c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 386ab4382d2SGreg Kroah-Hartman unsigned long flags = 0; 387ab4382d2SGreg Kroah-Hartman unsigned int ret = 0; 388ab4382d2SGreg Kroah-Hartman 389d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 390ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_tx_empty+%d\n", up->port.line); 391ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags); 392ab4382d2SGreg Kroah-Hartman ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0; 393ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags); 394d8ee4ea6SFelipe Balbi pm_runtime_put(up->dev); 395ab4382d2SGreg Kroah-Hartman return ret; 396ab4382d2SGreg Kroah-Hartman } 397ab4382d2SGreg Kroah-Hartman 398ab4382d2SGreg Kroah-Hartman static unsigned int serial_omap_get_mctrl(struct uart_port *port) 399ab4382d2SGreg Kroah-Hartman { 400c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 401514f31d1SShubhrajyoti D unsigned int status; 402ab4382d2SGreg Kroah-Hartman unsigned int ret = 0; 403ab4382d2SGreg Kroah-Hartman 404d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 405ab4382d2SGreg Kroah-Hartman status = check_modem_status(up); 406d8ee4ea6SFelipe Balbi pm_runtime_put(up->dev); 407fcdca757SGovindraj.R 408ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_get_mctrl+%d\n", up->port.line); 409ab4382d2SGreg Kroah-Hartman 410ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DCD) 411ab4382d2SGreg Kroah-Hartman ret |= TIOCM_CAR; 412ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_RI) 413ab4382d2SGreg Kroah-Hartman ret |= TIOCM_RNG; 414ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DSR) 415ab4382d2SGreg Kroah-Hartman ret |= TIOCM_DSR; 416ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_CTS) 417ab4382d2SGreg Kroah-Hartman ret |= TIOCM_CTS; 418ab4382d2SGreg Kroah-Hartman return ret; 419ab4382d2SGreg Kroah-Hartman } 420ab4382d2SGreg Kroah-Hartman 421ab4382d2SGreg Kroah-Hartman static void serial_omap_set_mctrl(struct uart_port *port, unsigned int mctrl) 422ab4382d2SGreg Kroah-Hartman { 423c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 424ab4382d2SGreg Kroah-Hartman unsigned char mcr = 0; 425ab4382d2SGreg Kroah-Hartman 426ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_set_mctrl+%d\n", up->port.line); 427ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_RTS) 428ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_RTS; 429ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_DTR) 430ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_DTR; 431ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_OUT1) 432ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_OUT1; 433ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_OUT2) 434ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_OUT2; 435ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_LOOP) 436ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_LOOP; 437ab4382d2SGreg Kroah-Hartman 438d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 439c538d20cSGovindraj.R up->mcr = serial_in(up, UART_MCR); 440c538d20cSGovindraj.R up->mcr |= mcr; 441c538d20cSGovindraj.R serial_out(up, UART_MCR, up->mcr); 442d8ee4ea6SFelipe Balbi pm_runtime_put(up->dev); 4439574f36fSNeilBrown 4449574f36fSNeilBrown if (gpio_is_valid(up->DTR_gpio) && 4459574f36fSNeilBrown !!(mctrl & TIOCM_DTR) != up->DTR_active) { 4469574f36fSNeilBrown up->DTR_active = !up->DTR_active; 4479574f36fSNeilBrown if (gpio_cansleep(up->DTR_gpio)) 4489574f36fSNeilBrown schedule_work(&up->qos_work); 4499574f36fSNeilBrown else 4509574f36fSNeilBrown gpio_set_value(up->DTR_gpio, 4519574f36fSNeilBrown up->DTR_active != up->DTR_inverted); 4529574f36fSNeilBrown } 453ab4382d2SGreg Kroah-Hartman } 454ab4382d2SGreg Kroah-Hartman 455ab4382d2SGreg Kroah-Hartman static void serial_omap_break_ctl(struct uart_port *port, int break_state) 456ab4382d2SGreg Kroah-Hartman { 457c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 458ab4382d2SGreg Kroah-Hartman unsigned long flags = 0; 459ab4382d2SGreg Kroah-Hartman 460ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_break_ctl+%d\n", up->port.line); 461d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 462ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags); 463ab4382d2SGreg Kroah-Hartman if (break_state == -1) 464ab4382d2SGreg Kroah-Hartman up->lcr |= UART_LCR_SBC; 465ab4382d2SGreg Kroah-Hartman else 466ab4382d2SGreg Kroah-Hartman up->lcr &= ~UART_LCR_SBC; 467ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, up->lcr); 468ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags); 469d8ee4ea6SFelipe Balbi pm_runtime_put(up->dev); 470ab4382d2SGreg Kroah-Hartman } 471ab4382d2SGreg Kroah-Hartman 472ab4382d2SGreg Kroah-Hartman static int serial_omap_startup(struct uart_port *port) 473ab4382d2SGreg Kroah-Hartman { 474c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 475ab4382d2SGreg Kroah-Hartman unsigned long flags = 0; 476ab4382d2SGreg Kroah-Hartman int retval; 477ab4382d2SGreg Kroah-Hartman 478ab4382d2SGreg Kroah-Hartman /* 479ab4382d2SGreg Kroah-Hartman * Allocate the IRQ 480ab4382d2SGreg Kroah-Hartman */ 481ab4382d2SGreg Kroah-Hartman retval = request_irq(up->port.irq, serial_omap_irq, up->port.irqflags, 482ab4382d2SGreg Kroah-Hartman up->name, up); 483ab4382d2SGreg Kroah-Hartman if (retval) 484ab4382d2SGreg Kroah-Hartman return retval; 485ab4382d2SGreg Kroah-Hartman 486ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_startup+%d\n", up->port.line); 487ab4382d2SGreg Kroah-Hartman 488d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 489ab4382d2SGreg Kroah-Hartman /* 490ab4382d2SGreg Kroah-Hartman * Clear the FIFO buffers and disable them. 491ab4382d2SGreg Kroah-Hartman * (they will be reenabled in set_termios()) 492ab4382d2SGreg Kroah-Hartman */ 493ab4382d2SGreg Kroah-Hartman serial_omap_clear_fifos(up); 494ab4382d2SGreg Kroah-Hartman /* For Hardware flow control */ 495ab4382d2SGreg Kroah-Hartman serial_out(up, UART_MCR, UART_MCR_RTS); 496ab4382d2SGreg Kroah-Hartman 497ab4382d2SGreg Kroah-Hartman /* 498ab4382d2SGreg Kroah-Hartman * Clear the interrupt registers. 499ab4382d2SGreg Kroah-Hartman */ 500ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_LSR); 501ab4382d2SGreg Kroah-Hartman if (serial_in(up, UART_LSR) & UART_LSR_DR) 502ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_RX); 503ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_IIR); 504ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_MSR); 505ab4382d2SGreg Kroah-Hartman 506ab4382d2SGreg Kroah-Hartman /* 507ab4382d2SGreg Kroah-Hartman * Now, initialize the UART 508ab4382d2SGreg Kroah-Hartman */ 509ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_WLEN8); 510ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags); 511ab4382d2SGreg Kroah-Hartman /* 512ab4382d2SGreg Kroah-Hartman * Most PC uarts need OUT2 raised to enable interrupts. 513ab4382d2SGreg Kroah-Hartman */ 514ab4382d2SGreg Kroah-Hartman up->port.mctrl |= TIOCM_OUT2; 515ab4382d2SGreg Kroah-Hartman serial_omap_set_mctrl(&up->port, up->port.mctrl); 516ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags); 517ab4382d2SGreg Kroah-Hartman 518ab4382d2SGreg Kroah-Hartman up->msr_saved_flags = 0; 519ab4382d2SGreg Kroah-Hartman /* 520ab4382d2SGreg Kroah-Hartman * Finally, enable interrupts. Note: Modem status interrupts 521ab4382d2SGreg Kroah-Hartman * are set via set_termios(), which will be occurring imminently 522ab4382d2SGreg Kroah-Hartman * anyway, so we don't enable them here. 523ab4382d2SGreg Kroah-Hartman */ 524ab4382d2SGreg Kroah-Hartman up->ier = UART_IER_RLSI | UART_IER_RDI; 525ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 526ab4382d2SGreg Kroah-Hartman 52778841462SJarkko Nikula /* Enable module level wake up */ 52878841462SJarkko Nikula serial_out(up, UART_OMAP_WER, OMAP_UART_WER_MOD_WKUP); 52978841462SJarkko Nikula 530d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 531d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 532ab4382d2SGreg Kroah-Hartman up->port_activity = jiffies; 533ab4382d2SGreg Kroah-Hartman return 0; 534ab4382d2SGreg Kroah-Hartman } 535ab4382d2SGreg Kroah-Hartman 536ab4382d2SGreg Kroah-Hartman static void serial_omap_shutdown(struct uart_port *port) 537ab4382d2SGreg Kroah-Hartman { 538c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 539ab4382d2SGreg Kroah-Hartman unsigned long flags = 0; 540ab4382d2SGreg Kroah-Hartman 541ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_shutdown+%d\n", up->port.line); 542fcdca757SGovindraj.R 543d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 544ab4382d2SGreg Kroah-Hartman /* 545ab4382d2SGreg Kroah-Hartman * Disable interrupts from this port 546ab4382d2SGreg Kroah-Hartman */ 547ab4382d2SGreg Kroah-Hartman up->ier = 0; 548ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, 0); 549ab4382d2SGreg Kroah-Hartman 550ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags); 551ab4382d2SGreg Kroah-Hartman up->port.mctrl &= ~TIOCM_OUT2; 552ab4382d2SGreg Kroah-Hartman serial_omap_set_mctrl(&up->port, up->port.mctrl); 553ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags); 554ab4382d2SGreg Kroah-Hartman 555ab4382d2SGreg Kroah-Hartman /* 556ab4382d2SGreg Kroah-Hartman * Disable break condition and FIFOs 557ab4382d2SGreg Kroah-Hartman */ 558ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC); 559ab4382d2SGreg Kroah-Hartman serial_omap_clear_fifos(up); 560ab4382d2SGreg Kroah-Hartman 561ab4382d2SGreg Kroah-Hartman /* 562ab4382d2SGreg Kroah-Hartman * Read data port to reset things, and then free the irq 563ab4382d2SGreg Kroah-Hartman */ 564ab4382d2SGreg Kroah-Hartman if (serial_in(up, UART_LSR) & UART_LSR_DR) 565ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_RX); 566fcdca757SGovindraj.R 567d8ee4ea6SFelipe Balbi pm_runtime_put(up->dev); 568ab4382d2SGreg Kroah-Hartman free_irq(up->port.irq, up); 569ab4382d2SGreg Kroah-Hartman } 570ab4382d2SGreg Kroah-Hartman 571ab4382d2SGreg Kroah-Hartman static inline void 572ab4382d2SGreg Kroah-Hartman serial_omap_configure_xonxoff 573ab4382d2SGreg Kroah-Hartman (struct uart_omap_port *up, struct ktermios *termios) 574ab4382d2SGreg Kroah-Hartman { 575ab4382d2SGreg Kroah-Hartman up->lcr = serial_in(up, UART_LCR); 576ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 577ab4382d2SGreg Kroah-Hartman up->efr = serial_in(up, UART_EFR); 578ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, up->efr & ~UART_EFR_ECB); 579ab4382d2SGreg Kroah-Hartman 580ab4382d2SGreg Kroah-Hartman serial_out(up, UART_XON1, termios->c_cc[VSTART]); 581ab4382d2SGreg Kroah-Hartman serial_out(up, UART_XOFF1, termios->c_cc[VSTOP]); 582ab4382d2SGreg Kroah-Hartman 583ab4382d2SGreg Kroah-Hartman /* clear SW control mode bits */ 584c538d20cSGovindraj.R up->efr &= OMAP_UART_SW_CLR; 585ab4382d2SGreg Kroah-Hartman 586ab4382d2SGreg Kroah-Hartman /* 587ab4382d2SGreg Kroah-Hartman * IXON Flag: 588ab4382d2SGreg Kroah-Hartman * Enable XON/XOFF flow control on output. 589ab4382d2SGreg Kroah-Hartman * Transmit XON1, XOFF1 590ab4382d2SGreg Kroah-Hartman */ 591ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IXON) 592c538d20cSGovindraj.R up->efr |= OMAP_UART_SW_TX; 593ab4382d2SGreg Kroah-Hartman 594ab4382d2SGreg Kroah-Hartman /* 595ab4382d2SGreg Kroah-Hartman * IXOFF Flag: 596ab4382d2SGreg Kroah-Hartman * Enable XON/XOFF flow control on input. 597ab4382d2SGreg Kroah-Hartman * Receiver compares XON1, XOFF1. 598ab4382d2SGreg Kroah-Hartman */ 599ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IXOFF) 600c538d20cSGovindraj.R up->efr |= OMAP_UART_SW_RX; 601ab4382d2SGreg Kroah-Hartman 602ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); 603ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 604ab4382d2SGreg Kroah-Hartman 605ab4382d2SGreg Kroah-Hartman up->mcr = serial_in(up, UART_MCR); 606ab4382d2SGreg Kroah-Hartman 607ab4382d2SGreg Kroah-Hartman /* 608ab4382d2SGreg Kroah-Hartman * IXANY Flag: 609ab4382d2SGreg Kroah-Hartman * Enable any character to restart output. 610ab4382d2SGreg Kroah-Hartman * Operation resumes after receiving any 611ab4382d2SGreg Kroah-Hartman * character after recognition of the XOFF character 612ab4382d2SGreg Kroah-Hartman */ 613ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IXANY) 614ab4382d2SGreg Kroah-Hartman up->mcr |= UART_MCR_XONANY; 615ab4382d2SGreg Kroah-Hartman 616ab4382d2SGreg Kroah-Hartman serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR); 617ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 618ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TI752_TCR, OMAP_UART_TCR_TRIG); 619ab4382d2SGreg Kroah-Hartman /* Enable special char function UARTi.EFR_REG[5] and 620ab4382d2SGreg Kroah-Hartman * load the new software flow control mode IXON or IXOFF 621ab4382d2SGreg Kroah-Hartman * and restore the UARTi.EFR_REG[4] ENHANCED_EN value. 622ab4382d2SGreg Kroah-Hartman */ 623c538d20cSGovindraj.R serial_out(up, UART_EFR, up->efr | UART_EFR_SCD); 624ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 625ab4382d2SGreg Kroah-Hartman 626ab4382d2SGreg Kroah-Hartman serial_out(up, UART_MCR, up->mcr & ~UART_MCR_TCRTLR); 627ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, up->lcr); 628ab4382d2SGreg Kroah-Hartman } 629ab4382d2SGreg Kroah-Hartman 6302fd14964SGovindraj.R static void serial_omap_uart_qos_work(struct work_struct *work) 6312fd14964SGovindraj.R { 6322fd14964SGovindraj.R struct uart_omap_port *up = container_of(work, struct uart_omap_port, 6332fd14964SGovindraj.R qos_work); 6342fd14964SGovindraj.R 6352fd14964SGovindraj.R pm_qos_update_request(&up->pm_qos_request, up->latency); 6369574f36fSNeilBrown if (gpio_is_valid(up->DTR_gpio)) 6379574f36fSNeilBrown gpio_set_value_cansleep(up->DTR_gpio, 6389574f36fSNeilBrown up->DTR_active != up->DTR_inverted); 6392fd14964SGovindraj.R } 6402fd14964SGovindraj.R 641ab4382d2SGreg Kroah-Hartman static void 642ab4382d2SGreg Kroah-Hartman serial_omap_set_termios(struct uart_port *port, struct ktermios *termios, 643ab4382d2SGreg Kroah-Hartman struct ktermios *old) 644ab4382d2SGreg Kroah-Hartman { 645c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 646ab4382d2SGreg Kroah-Hartman unsigned char cval = 0; 647ab4382d2SGreg Kroah-Hartman unsigned char efr = 0; 648ab4382d2SGreg Kroah-Hartman unsigned long flags = 0; 649ab4382d2SGreg Kroah-Hartman unsigned int baud, quot; 650ab4382d2SGreg Kroah-Hartman 651ab4382d2SGreg Kroah-Hartman switch (termios->c_cflag & CSIZE) { 652ab4382d2SGreg Kroah-Hartman case CS5: 653ab4382d2SGreg Kroah-Hartman cval = UART_LCR_WLEN5; 654ab4382d2SGreg Kroah-Hartman break; 655ab4382d2SGreg Kroah-Hartman case CS6: 656ab4382d2SGreg Kroah-Hartman cval = UART_LCR_WLEN6; 657ab4382d2SGreg Kroah-Hartman break; 658ab4382d2SGreg Kroah-Hartman case CS7: 659ab4382d2SGreg Kroah-Hartman cval = UART_LCR_WLEN7; 660ab4382d2SGreg Kroah-Hartman break; 661ab4382d2SGreg Kroah-Hartman default: 662ab4382d2SGreg Kroah-Hartman case CS8: 663ab4382d2SGreg Kroah-Hartman cval = UART_LCR_WLEN8; 664ab4382d2SGreg Kroah-Hartman break; 665ab4382d2SGreg Kroah-Hartman } 666ab4382d2SGreg Kroah-Hartman 667ab4382d2SGreg Kroah-Hartman if (termios->c_cflag & CSTOPB) 668ab4382d2SGreg Kroah-Hartman cval |= UART_LCR_STOP; 669ab4382d2SGreg Kroah-Hartman if (termios->c_cflag & PARENB) 670ab4382d2SGreg Kroah-Hartman cval |= UART_LCR_PARITY; 671ab4382d2SGreg Kroah-Hartman if (!(termios->c_cflag & PARODD)) 672ab4382d2SGreg Kroah-Hartman cval |= UART_LCR_EPAR; 673ab4382d2SGreg Kroah-Hartman 674ab4382d2SGreg Kroah-Hartman /* 675ab4382d2SGreg Kroah-Hartman * Ask the core to calculate the divisor for us. 676ab4382d2SGreg Kroah-Hartman */ 677ab4382d2SGreg Kroah-Hartman 678ab4382d2SGreg Kroah-Hartman baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/13); 679ab4382d2SGreg Kroah-Hartman quot = serial_omap_get_divisor(port, baud); 680ab4382d2SGreg Kroah-Hartman 6812fd14964SGovindraj.R /* calculate wakeup latency constraint */ 68219723452SPaul Walmsley up->calc_latency = (USEC_PER_SEC * up->port.fifosize) / (baud / 8); 6832fd14964SGovindraj.R up->latency = up->calc_latency; 6842fd14964SGovindraj.R schedule_work(&up->qos_work); 6852fd14964SGovindraj.R 686c538d20cSGovindraj.R up->dll = quot & 0xff; 687c538d20cSGovindraj.R up->dlh = quot >> 8; 688c538d20cSGovindraj.R up->mdr1 = UART_OMAP_MDR1_DISABLE; 689c538d20cSGovindraj.R 690ab4382d2SGreg Kroah-Hartman up->fcr = UART_FCR_R_TRIG_01 | UART_FCR_T_TRIG_01 | 691ab4382d2SGreg Kroah-Hartman UART_FCR_ENABLE_FIFO; 692ab4382d2SGreg Kroah-Hartman 693ab4382d2SGreg Kroah-Hartman /* 694ab4382d2SGreg Kroah-Hartman * Ok, we're now changing the port state. Do it with 695ab4382d2SGreg Kroah-Hartman * interrupts disabled. 696ab4382d2SGreg Kroah-Hartman */ 697d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 698ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags); 699ab4382d2SGreg Kroah-Hartman 700ab4382d2SGreg Kroah-Hartman /* 701ab4382d2SGreg Kroah-Hartman * Update the per-port timeout. 702ab4382d2SGreg Kroah-Hartman */ 703ab4382d2SGreg Kroah-Hartman uart_update_timeout(port, termios->c_cflag, baud); 704ab4382d2SGreg Kroah-Hartman 705ab4382d2SGreg Kroah-Hartman up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; 706ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & INPCK) 707ab4382d2SGreg Kroah-Hartman up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE; 708ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & (BRKINT | PARMRK)) 709ab4382d2SGreg Kroah-Hartman up->port.read_status_mask |= UART_LSR_BI; 710ab4382d2SGreg Kroah-Hartman 711ab4382d2SGreg Kroah-Hartman /* 712ab4382d2SGreg Kroah-Hartman * Characters to ignore 713ab4382d2SGreg Kroah-Hartman */ 714ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask = 0; 715ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IGNPAR) 716ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE; 717ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IGNBRK) { 718ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask |= UART_LSR_BI; 719ab4382d2SGreg Kroah-Hartman /* 720ab4382d2SGreg Kroah-Hartman * If we're ignoring parity and break indicators, 721ab4382d2SGreg Kroah-Hartman * ignore overruns too (for real raw support). 722ab4382d2SGreg Kroah-Hartman */ 723ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IGNPAR) 724ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask |= UART_LSR_OE; 725ab4382d2SGreg Kroah-Hartman } 726ab4382d2SGreg Kroah-Hartman 727ab4382d2SGreg Kroah-Hartman /* 728ab4382d2SGreg Kroah-Hartman * ignore all characters if CREAD is not set 729ab4382d2SGreg Kroah-Hartman */ 730ab4382d2SGreg Kroah-Hartman if ((termios->c_cflag & CREAD) == 0) 731ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask |= UART_LSR_DR; 732ab4382d2SGreg Kroah-Hartman 733ab4382d2SGreg Kroah-Hartman /* 734ab4382d2SGreg Kroah-Hartman * Modem status interrupts 735ab4382d2SGreg Kroah-Hartman */ 736ab4382d2SGreg Kroah-Hartman up->ier &= ~UART_IER_MSI; 737ab4382d2SGreg Kroah-Hartman if (UART_ENABLE_MS(&up->port, termios->c_cflag)) 738ab4382d2SGreg Kroah-Hartman up->ier |= UART_IER_MSI; 739ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 740ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, cval); /* reset DLAB */ 741c538d20cSGovindraj.R up->lcr = cval; 74232212897SGovindraj.R up->scr = OMAP_UART_SCR_TX_EMPTY; 743ab4382d2SGreg Kroah-Hartman 744ab4382d2SGreg Kroah-Hartman /* FIFOs and DMA Settings */ 745ab4382d2SGreg Kroah-Hartman 746ab4382d2SGreg Kroah-Hartman /* FCR can be changed only when the 747ab4382d2SGreg Kroah-Hartman * baud clock is not running 748ab4382d2SGreg Kroah-Hartman * DLL_REG and DLH_REG set to 0. 749ab4382d2SGreg Kroah-Hartman */ 750ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 751ab4382d2SGreg Kroah-Hartman serial_out(up, UART_DLL, 0); 752ab4382d2SGreg Kroah-Hartman serial_out(up, UART_DLM, 0); 753ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0); 754ab4382d2SGreg Kroah-Hartman 755ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 756ab4382d2SGreg Kroah-Hartman 757ab4382d2SGreg Kroah-Hartman up->efr = serial_in(up, UART_EFR); 758ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); 759ab4382d2SGreg Kroah-Hartman 760ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 761ab4382d2SGreg Kroah-Hartman up->mcr = serial_in(up, UART_MCR); 762ab4382d2SGreg Kroah-Hartman serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR); 763ab4382d2SGreg Kroah-Hartman /* FIFO ENABLE, DMA MODE */ 7640ba5f668SPaul Walmsley 7650ba5f668SPaul Walmsley up->scr |= OMAP_UART_SCR_RX_TRIG_GRANU1_MASK; 7660a697b22SPaul Walmsley 7670ba5f668SPaul Walmsley /* Set receive FIFO threshold to 1 byte */ 7680ba5f668SPaul Walmsley up->fcr &= ~OMAP_UART_FCR_RX_FIFO_TRIG_MASK; 7690ba5f668SPaul Walmsley up->fcr |= (0x1 << OMAP_UART_FCR_RX_FIFO_TRIG_SHIFT); 7708a74e9ffSGreg Kroah-Hartman 7710ba5f668SPaul Walmsley serial_out(up, UART_FCR, up->fcr); 7720ba5f668SPaul Walmsley serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 7730ba5f668SPaul Walmsley 774c538d20cSGovindraj.R serial_out(up, UART_OMAP_SCR, up->scr); 775c538d20cSGovindraj.R 776ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, up->efr); 777ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 778ab4382d2SGreg Kroah-Hartman serial_out(up, UART_MCR, up->mcr); 779ab4382d2SGreg Kroah-Hartman 780ab4382d2SGreg Kroah-Hartman /* Protocol, Baud Rate, and Interrupt Settings */ 781ab4382d2SGreg Kroah-Hartman 78294734749SGovindraj.R if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) 78394734749SGovindraj.R serial_omap_mdr1_errataset(up, up->mdr1); 78494734749SGovindraj.R else 785c538d20cSGovindraj.R serial_out(up, UART_OMAP_MDR1, up->mdr1); 78694734749SGovindraj.R 787ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 788ab4382d2SGreg Kroah-Hartman 789ab4382d2SGreg Kroah-Hartman up->efr = serial_in(up, UART_EFR); 790ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); 791ab4382d2SGreg Kroah-Hartman 792ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0); 793ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, 0); 794ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 795ab4382d2SGreg Kroah-Hartman 796c538d20cSGovindraj.R serial_out(up, UART_DLL, up->dll); /* LS of divisor */ 797c538d20cSGovindraj.R serial_out(up, UART_DLM, up->dlh); /* MS of divisor */ 798ab4382d2SGreg Kroah-Hartman 799ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0); 800ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 801ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 802ab4382d2SGreg Kroah-Hartman 803ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, up->efr); 804ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, cval); 805ab4382d2SGreg Kroah-Hartman 806ab4382d2SGreg Kroah-Hartman if (baud > 230400 && baud != 3000000) 807c538d20cSGovindraj.R up->mdr1 = UART_OMAP_MDR1_13X_MODE; 808ab4382d2SGreg Kroah-Hartman else 809c538d20cSGovindraj.R up->mdr1 = UART_OMAP_MDR1_16X_MODE; 810c538d20cSGovindraj.R 81194734749SGovindraj.R if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) 81294734749SGovindraj.R serial_omap_mdr1_errataset(up, up->mdr1); 81394734749SGovindraj.R else 814c538d20cSGovindraj.R serial_out(up, UART_OMAP_MDR1, up->mdr1); 815ab4382d2SGreg Kroah-Hartman 816ab4382d2SGreg Kroah-Hartman /* Hardware Flow Control Configuration */ 817ab4382d2SGreg Kroah-Hartman 818ab4382d2SGreg Kroah-Hartman if (termios->c_cflag & CRTSCTS) { 819ab4382d2SGreg Kroah-Hartman efr |= (UART_EFR_CTS | UART_EFR_RTS); 820ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 821ab4382d2SGreg Kroah-Hartman 822ab4382d2SGreg Kroah-Hartman up->mcr = serial_in(up, UART_MCR); 823ab4382d2SGreg Kroah-Hartman serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR); 824ab4382d2SGreg Kroah-Hartman 825ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 826ab4382d2SGreg Kroah-Hartman up->efr = serial_in(up, UART_EFR); 827ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); 828ab4382d2SGreg Kroah-Hartman 829ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TI752_TCR, OMAP_UART_TCR_TRIG); 830ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, efr); /* Enable AUTORTS and AUTOCTS */ 831ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 832ab4382d2SGreg Kroah-Hartman serial_out(up, UART_MCR, up->mcr | UART_MCR_RTS); 833ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, cval); 834ab4382d2SGreg Kroah-Hartman } 835ab4382d2SGreg Kroah-Hartman 836ab4382d2SGreg Kroah-Hartman serial_omap_set_mctrl(&up->port, up->port.mctrl); 837ab4382d2SGreg Kroah-Hartman /* Software Flow Control Configuration */ 838ab4382d2SGreg Kroah-Hartman serial_omap_configure_xonxoff(up, termios); 839ab4382d2SGreg Kroah-Hartman 840ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags); 841d8ee4ea6SFelipe Balbi pm_runtime_put(up->dev); 842ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_set_termios+%d\n", up->port.line); 843ab4382d2SGreg Kroah-Hartman } 844ab4382d2SGreg Kroah-Hartman 845ab4382d2SGreg Kroah-Hartman static void 846ab4382d2SGreg Kroah-Hartman serial_omap_pm(struct uart_port *port, unsigned int state, 847ab4382d2SGreg Kroah-Hartman unsigned int oldstate) 848ab4382d2SGreg Kroah-Hartman { 849c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 850ab4382d2SGreg Kroah-Hartman unsigned char efr; 851ab4382d2SGreg Kroah-Hartman 852ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_pm+%d\n", up->port.line); 853fcdca757SGovindraj.R 854d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 855ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 856ab4382d2SGreg Kroah-Hartman efr = serial_in(up, UART_EFR); 857ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, efr | UART_EFR_ECB); 858ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0); 859ab4382d2SGreg Kroah-Hartman 860ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, (state != 0) ? UART_IERX_SLEEP : 0); 861ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 862ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, efr); 863ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0); 864fcdca757SGovindraj.R 865d8ee4ea6SFelipe Balbi if (!device_may_wakeup(up->dev)) { 866fcdca757SGovindraj.R if (!state) 867d8ee4ea6SFelipe Balbi pm_runtime_forbid(up->dev); 868fcdca757SGovindraj.R else 869d8ee4ea6SFelipe Balbi pm_runtime_allow(up->dev); 870fcdca757SGovindraj.R } 871fcdca757SGovindraj.R 872d8ee4ea6SFelipe Balbi pm_runtime_put(up->dev); 873ab4382d2SGreg Kroah-Hartman } 874ab4382d2SGreg Kroah-Hartman 875ab4382d2SGreg Kroah-Hartman static void serial_omap_release_port(struct uart_port *port) 876ab4382d2SGreg Kroah-Hartman { 877ab4382d2SGreg Kroah-Hartman dev_dbg(port->dev, "serial_omap_release_port+\n"); 878ab4382d2SGreg Kroah-Hartman } 879ab4382d2SGreg Kroah-Hartman 880ab4382d2SGreg Kroah-Hartman static int serial_omap_request_port(struct uart_port *port) 881ab4382d2SGreg Kroah-Hartman { 882ab4382d2SGreg Kroah-Hartman dev_dbg(port->dev, "serial_omap_request_port+\n"); 883ab4382d2SGreg Kroah-Hartman return 0; 884ab4382d2SGreg Kroah-Hartman } 885ab4382d2SGreg Kroah-Hartman 886ab4382d2SGreg Kroah-Hartman static void serial_omap_config_port(struct uart_port *port, int flags) 887ab4382d2SGreg Kroah-Hartman { 888c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 889ab4382d2SGreg Kroah-Hartman 890ab4382d2SGreg Kroah-Hartman dev_dbg(up->port.dev, "serial_omap_config_port+%d\n", 891ba77433dSRajendra Nayak up->port.line); 892ab4382d2SGreg Kroah-Hartman up->port.type = PORT_OMAP; 893ab4382d2SGreg Kroah-Hartman } 894ab4382d2SGreg Kroah-Hartman 895ab4382d2SGreg Kroah-Hartman static int 896ab4382d2SGreg Kroah-Hartman serial_omap_verify_port(struct uart_port *port, struct serial_struct *ser) 897ab4382d2SGreg Kroah-Hartman { 898ab4382d2SGreg Kroah-Hartman /* we don't want the core code to modify any port params */ 899ab4382d2SGreg Kroah-Hartman dev_dbg(port->dev, "serial_omap_verify_port+\n"); 900ab4382d2SGreg Kroah-Hartman return -EINVAL; 901ab4382d2SGreg Kroah-Hartman } 902ab4382d2SGreg Kroah-Hartman 903ab4382d2SGreg Kroah-Hartman static const char * 904ab4382d2SGreg Kroah-Hartman serial_omap_type(struct uart_port *port) 905ab4382d2SGreg Kroah-Hartman { 906c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 907ab4382d2SGreg Kroah-Hartman 908ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_type+%d\n", up->port.line); 909ab4382d2SGreg Kroah-Hartman return up->name; 910ab4382d2SGreg Kroah-Hartman } 911ab4382d2SGreg Kroah-Hartman 912ab4382d2SGreg Kroah-Hartman #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE) 913ab4382d2SGreg Kroah-Hartman 914ab4382d2SGreg Kroah-Hartman static inline void wait_for_xmitr(struct uart_omap_port *up) 915ab4382d2SGreg Kroah-Hartman { 916ab4382d2SGreg Kroah-Hartman unsigned int status, tmout = 10000; 917ab4382d2SGreg Kroah-Hartman 918ab4382d2SGreg Kroah-Hartman /* Wait up to 10ms for the character(s) to be sent. */ 919ab4382d2SGreg Kroah-Hartman do { 920ab4382d2SGreg Kroah-Hartman status = serial_in(up, UART_LSR); 921ab4382d2SGreg Kroah-Hartman 922ab4382d2SGreg Kroah-Hartman if (status & UART_LSR_BI) 923ab4382d2SGreg Kroah-Hartman up->lsr_break_flag = UART_LSR_BI; 924ab4382d2SGreg Kroah-Hartman 925ab4382d2SGreg Kroah-Hartman if (--tmout == 0) 926ab4382d2SGreg Kroah-Hartman break; 927ab4382d2SGreg Kroah-Hartman udelay(1); 928ab4382d2SGreg Kroah-Hartman } while ((status & BOTH_EMPTY) != BOTH_EMPTY); 929ab4382d2SGreg Kroah-Hartman 930ab4382d2SGreg Kroah-Hartman /* Wait up to 1s for flow control if necessary */ 931ab4382d2SGreg Kroah-Hartman if (up->port.flags & UPF_CONS_FLOW) { 932ab4382d2SGreg Kroah-Hartman tmout = 1000000; 933ab4382d2SGreg Kroah-Hartman for (tmout = 1000000; tmout; tmout--) { 934ab4382d2SGreg Kroah-Hartman unsigned int msr = serial_in(up, UART_MSR); 935ab4382d2SGreg Kroah-Hartman 936ab4382d2SGreg Kroah-Hartman up->msr_saved_flags |= msr & MSR_SAVE_FLAGS; 937ab4382d2SGreg Kroah-Hartman if (msr & UART_MSR_CTS) 938ab4382d2SGreg Kroah-Hartman break; 939ab4382d2SGreg Kroah-Hartman 940ab4382d2SGreg Kroah-Hartman udelay(1); 941ab4382d2SGreg Kroah-Hartman } 942ab4382d2SGreg Kroah-Hartman } 943ab4382d2SGreg Kroah-Hartman } 944ab4382d2SGreg Kroah-Hartman 945ab4382d2SGreg Kroah-Hartman #ifdef CONFIG_CONSOLE_POLL 946ab4382d2SGreg Kroah-Hartman 947ab4382d2SGreg Kroah-Hartman static void serial_omap_poll_put_char(struct uart_port *port, unsigned char ch) 948ab4382d2SGreg Kroah-Hartman { 949c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 950fcdca757SGovindraj.R 951d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 952ab4382d2SGreg Kroah-Hartman wait_for_xmitr(up); 953ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TX, ch); 954d8ee4ea6SFelipe Balbi pm_runtime_put(up->dev); 955ab4382d2SGreg Kroah-Hartman } 956ab4382d2SGreg Kroah-Hartman 957ab4382d2SGreg Kroah-Hartman static int serial_omap_poll_get_char(struct uart_port *port) 958ab4382d2SGreg Kroah-Hartman { 959c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 960fcdca757SGovindraj.R unsigned int status; 961ab4382d2SGreg Kroah-Hartman 962d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 963fcdca757SGovindraj.R status = serial_in(up, UART_LSR); 964ab4382d2SGreg Kroah-Hartman if (!(status & UART_LSR_DR)) 965ab4382d2SGreg Kroah-Hartman return NO_POLL_CHAR; 966ab4382d2SGreg Kroah-Hartman 967fcdca757SGovindraj.R status = serial_in(up, UART_RX); 968d8ee4ea6SFelipe Balbi pm_runtime_put(up->dev); 969fcdca757SGovindraj.R return status; 970ab4382d2SGreg Kroah-Hartman } 971ab4382d2SGreg Kroah-Hartman 972ab4382d2SGreg Kroah-Hartman #endif /* CONFIG_CONSOLE_POLL */ 973ab4382d2SGreg Kroah-Hartman 974ab4382d2SGreg Kroah-Hartman #ifdef CONFIG_SERIAL_OMAP_CONSOLE 975ab4382d2SGreg Kroah-Hartman 976ab4382d2SGreg Kroah-Hartman static struct uart_omap_port *serial_omap_console_ports[4]; 977ab4382d2SGreg Kroah-Hartman 978ab4382d2SGreg Kroah-Hartman static struct uart_driver serial_omap_reg; 979ab4382d2SGreg Kroah-Hartman 980ab4382d2SGreg Kroah-Hartman static void serial_omap_console_putchar(struct uart_port *port, int ch) 981ab4382d2SGreg Kroah-Hartman { 982c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 983ab4382d2SGreg Kroah-Hartman 984ab4382d2SGreg Kroah-Hartman wait_for_xmitr(up); 985ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TX, ch); 986ab4382d2SGreg Kroah-Hartman } 987ab4382d2SGreg Kroah-Hartman 988ab4382d2SGreg Kroah-Hartman static void 989ab4382d2SGreg Kroah-Hartman serial_omap_console_write(struct console *co, const char *s, 990ab4382d2SGreg Kroah-Hartman unsigned int count) 991ab4382d2SGreg Kroah-Hartman { 992ab4382d2SGreg Kroah-Hartman struct uart_omap_port *up = serial_omap_console_ports[co->index]; 993ab4382d2SGreg Kroah-Hartman unsigned long flags; 994ab4382d2SGreg Kroah-Hartman unsigned int ier; 995ab4382d2SGreg Kroah-Hartman int locked = 1; 996ab4382d2SGreg Kroah-Hartman 997d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 998fcdca757SGovindraj.R 999ab4382d2SGreg Kroah-Hartman local_irq_save(flags); 1000ab4382d2SGreg Kroah-Hartman if (up->port.sysrq) 1001ab4382d2SGreg Kroah-Hartman locked = 0; 1002ab4382d2SGreg Kroah-Hartman else if (oops_in_progress) 1003ab4382d2SGreg Kroah-Hartman locked = spin_trylock(&up->port.lock); 1004ab4382d2SGreg Kroah-Hartman else 1005ab4382d2SGreg Kroah-Hartman spin_lock(&up->port.lock); 1006ab4382d2SGreg Kroah-Hartman 1007ab4382d2SGreg Kroah-Hartman /* 1008ab4382d2SGreg Kroah-Hartman * First save the IER then disable the interrupts 1009ab4382d2SGreg Kroah-Hartman */ 1010ab4382d2SGreg Kroah-Hartman ier = serial_in(up, UART_IER); 1011ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, 0); 1012ab4382d2SGreg Kroah-Hartman 1013ab4382d2SGreg Kroah-Hartman uart_console_write(&up->port, s, count, serial_omap_console_putchar); 1014ab4382d2SGreg Kroah-Hartman 1015ab4382d2SGreg Kroah-Hartman /* 1016ab4382d2SGreg Kroah-Hartman * Finally, wait for transmitter to become empty 1017ab4382d2SGreg Kroah-Hartman * and restore the IER 1018ab4382d2SGreg Kroah-Hartman */ 1019ab4382d2SGreg Kroah-Hartman wait_for_xmitr(up); 1020ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, ier); 1021ab4382d2SGreg Kroah-Hartman /* 1022ab4382d2SGreg Kroah-Hartman * The receive handling will happen properly because the 1023ab4382d2SGreg Kroah-Hartman * receive ready bit will still be set; it is not cleared 1024ab4382d2SGreg Kroah-Hartman * on read. However, modem control will not, we must 1025ab4382d2SGreg Kroah-Hartman * call it if we have saved something in the saved flags 1026ab4382d2SGreg Kroah-Hartman * while processing with interrupts off. 1027ab4382d2SGreg Kroah-Hartman */ 1028ab4382d2SGreg Kroah-Hartman if (up->msr_saved_flags) 1029ab4382d2SGreg Kroah-Hartman check_modem_status(up); 1030ab4382d2SGreg Kroah-Hartman 1031d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 1032d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 1033ab4382d2SGreg Kroah-Hartman if (locked) 1034ab4382d2SGreg Kroah-Hartman spin_unlock(&up->port.lock); 1035ab4382d2SGreg Kroah-Hartman local_irq_restore(flags); 1036ab4382d2SGreg Kroah-Hartman } 1037ab4382d2SGreg Kroah-Hartman 1038ab4382d2SGreg Kroah-Hartman static int __init 1039ab4382d2SGreg Kroah-Hartman serial_omap_console_setup(struct console *co, char *options) 1040ab4382d2SGreg Kroah-Hartman { 1041ab4382d2SGreg Kroah-Hartman struct uart_omap_port *up; 1042ab4382d2SGreg Kroah-Hartman int baud = 115200; 1043ab4382d2SGreg Kroah-Hartman int bits = 8; 1044ab4382d2SGreg Kroah-Hartman int parity = 'n'; 1045ab4382d2SGreg Kroah-Hartman int flow = 'n'; 1046ab4382d2SGreg Kroah-Hartman 1047ab4382d2SGreg Kroah-Hartman if (serial_omap_console_ports[co->index] == NULL) 1048ab4382d2SGreg Kroah-Hartman return -ENODEV; 1049ab4382d2SGreg Kroah-Hartman up = serial_omap_console_ports[co->index]; 1050ab4382d2SGreg Kroah-Hartman 1051ab4382d2SGreg Kroah-Hartman if (options) 1052ab4382d2SGreg Kroah-Hartman uart_parse_options(options, &baud, &parity, &bits, &flow); 1053ab4382d2SGreg Kroah-Hartman 1054ab4382d2SGreg Kroah-Hartman return uart_set_options(&up->port, co, baud, parity, bits, flow); 1055ab4382d2SGreg Kroah-Hartman } 1056ab4382d2SGreg Kroah-Hartman 1057ab4382d2SGreg Kroah-Hartman static struct console serial_omap_console = { 1058ab4382d2SGreg Kroah-Hartman .name = OMAP_SERIAL_NAME, 1059ab4382d2SGreg Kroah-Hartman .write = serial_omap_console_write, 1060ab4382d2SGreg Kroah-Hartman .device = uart_console_device, 1061ab4382d2SGreg Kroah-Hartman .setup = serial_omap_console_setup, 1062ab4382d2SGreg Kroah-Hartman .flags = CON_PRINTBUFFER, 1063ab4382d2SGreg Kroah-Hartman .index = -1, 1064ab4382d2SGreg Kroah-Hartman .data = &serial_omap_reg, 1065ab4382d2SGreg Kroah-Hartman }; 1066ab4382d2SGreg Kroah-Hartman 1067ab4382d2SGreg Kroah-Hartman static void serial_omap_add_console_port(struct uart_omap_port *up) 1068ab4382d2SGreg Kroah-Hartman { 1069ba77433dSRajendra Nayak serial_omap_console_ports[up->port.line] = up; 1070ab4382d2SGreg Kroah-Hartman } 1071ab4382d2SGreg Kroah-Hartman 1072ab4382d2SGreg Kroah-Hartman #define OMAP_CONSOLE (&serial_omap_console) 1073ab4382d2SGreg Kroah-Hartman 1074ab4382d2SGreg Kroah-Hartman #else 1075ab4382d2SGreg Kroah-Hartman 1076ab4382d2SGreg Kroah-Hartman #define OMAP_CONSOLE NULL 1077ab4382d2SGreg Kroah-Hartman 1078ab4382d2SGreg Kroah-Hartman static inline void serial_omap_add_console_port(struct uart_omap_port *up) 1079ab4382d2SGreg Kroah-Hartman {} 1080ab4382d2SGreg Kroah-Hartman 1081ab4382d2SGreg Kroah-Hartman #endif 1082ab4382d2SGreg Kroah-Hartman 1083ab4382d2SGreg Kroah-Hartman static struct uart_ops serial_omap_pops = { 1084ab4382d2SGreg Kroah-Hartman .tx_empty = serial_omap_tx_empty, 1085ab4382d2SGreg Kroah-Hartman .set_mctrl = serial_omap_set_mctrl, 1086ab4382d2SGreg Kroah-Hartman .get_mctrl = serial_omap_get_mctrl, 1087ab4382d2SGreg Kroah-Hartman .stop_tx = serial_omap_stop_tx, 1088ab4382d2SGreg Kroah-Hartman .start_tx = serial_omap_start_tx, 1089ab4382d2SGreg Kroah-Hartman .stop_rx = serial_omap_stop_rx, 1090ab4382d2SGreg Kroah-Hartman .enable_ms = serial_omap_enable_ms, 1091ab4382d2SGreg Kroah-Hartman .break_ctl = serial_omap_break_ctl, 1092ab4382d2SGreg Kroah-Hartman .startup = serial_omap_startup, 1093ab4382d2SGreg Kroah-Hartman .shutdown = serial_omap_shutdown, 1094ab4382d2SGreg Kroah-Hartman .set_termios = serial_omap_set_termios, 1095ab4382d2SGreg Kroah-Hartman .pm = serial_omap_pm, 1096ab4382d2SGreg Kroah-Hartman .type = serial_omap_type, 1097ab4382d2SGreg Kroah-Hartman .release_port = serial_omap_release_port, 1098ab4382d2SGreg Kroah-Hartman .request_port = serial_omap_request_port, 1099ab4382d2SGreg Kroah-Hartman .config_port = serial_omap_config_port, 1100ab4382d2SGreg Kroah-Hartman .verify_port = serial_omap_verify_port, 1101ab4382d2SGreg Kroah-Hartman #ifdef CONFIG_CONSOLE_POLL 1102ab4382d2SGreg Kroah-Hartman .poll_put_char = serial_omap_poll_put_char, 1103ab4382d2SGreg Kroah-Hartman .poll_get_char = serial_omap_poll_get_char, 1104ab4382d2SGreg Kroah-Hartman #endif 1105ab4382d2SGreg Kroah-Hartman }; 1106ab4382d2SGreg Kroah-Hartman 1107ab4382d2SGreg Kroah-Hartman static struct uart_driver serial_omap_reg = { 1108ab4382d2SGreg Kroah-Hartman .owner = THIS_MODULE, 1109ab4382d2SGreg Kroah-Hartman .driver_name = "OMAP-SERIAL", 1110ab4382d2SGreg Kroah-Hartman .dev_name = OMAP_SERIAL_NAME, 1111ab4382d2SGreg Kroah-Hartman .nr = OMAP_MAX_HSUART_PORTS, 1112ab4382d2SGreg Kroah-Hartman .cons = OMAP_CONSOLE, 1113ab4382d2SGreg Kroah-Hartman }; 1114ab4382d2SGreg Kroah-Hartman 11153bc4f0d8SShubhrajyoti D #ifdef CONFIG_PM_SLEEP 1116fcdca757SGovindraj.R static int serial_omap_suspend(struct device *dev) 1117ab4382d2SGreg Kroah-Hartman { 1118fcdca757SGovindraj.R struct uart_omap_port *up = dev_get_drvdata(dev); 1119ab4382d2SGreg Kroah-Hartman 11202fd14964SGovindraj.R if (up) { 1121ab4382d2SGreg Kroah-Hartman uart_suspend_port(&serial_omap_reg, &up->port); 11222fd14964SGovindraj.R flush_work_sync(&up->qos_work); 11232fd14964SGovindraj.R } 11242fd14964SGovindraj.R 1125ab4382d2SGreg Kroah-Hartman return 0; 1126ab4382d2SGreg Kroah-Hartman } 1127ab4382d2SGreg Kroah-Hartman 1128fcdca757SGovindraj.R static int serial_omap_resume(struct device *dev) 1129ab4382d2SGreg Kroah-Hartman { 1130fcdca757SGovindraj.R struct uart_omap_port *up = dev_get_drvdata(dev); 1131ab4382d2SGreg Kroah-Hartman 1132ab4382d2SGreg Kroah-Hartman if (up) 1133ab4382d2SGreg Kroah-Hartman uart_resume_port(&serial_omap_reg, &up->port); 1134ab4382d2SGreg Kroah-Hartman return 0; 1135ab4382d2SGreg Kroah-Hartman } 1136fcdca757SGovindraj.R #endif 1137ab4382d2SGreg Kroah-Hartman 11387c77c8deSGovindraj.R static void omap_serial_fill_features_erratas(struct uart_omap_port *up) 11397c77c8deSGovindraj.R { 11407c77c8deSGovindraj.R u32 mvr, scheme; 11417c77c8deSGovindraj.R u16 revision, major, minor; 11427c77c8deSGovindraj.R 11437c77c8deSGovindraj.R mvr = serial_in(up, UART_OMAP_MVER); 11447c77c8deSGovindraj.R 11457c77c8deSGovindraj.R /* Check revision register scheme */ 11467c77c8deSGovindraj.R scheme = mvr >> OMAP_UART_MVR_SCHEME_SHIFT; 11477c77c8deSGovindraj.R 11487c77c8deSGovindraj.R switch (scheme) { 11497c77c8deSGovindraj.R case 0: /* Legacy Scheme: OMAP2/3 */ 11507c77c8deSGovindraj.R /* MINOR_REV[0:4], MAJOR_REV[4:7] */ 11517c77c8deSGovindraj.R major = (mvr & OMAP_UART_LEGACY_MVR_MAJ_MASK) >> 11527c77c8deSGovindraj.R OMAP_UART_LEGACY_MVR_MAJ_SHIFT; 11537c77c8deSGovindraj.R minor = (mvr & OMAP_UART_LEGACY_MVR_MIN_MASK); 11547c77c8deSGovindraj.R break; 11557c77c8deSGovindraj.R case 1: 11567c77c8deSGovindraj.R /* New Scheme: OMAP4+ */ 11577c77c8deSGovindraj.R /* MINOR_REV[0:5], MAJOR_REV[8:10] */ 11587c77c8deSGovindraj.R major = (mvr & OMAP_UART_MVR_MAJ_MASK) >> 11597c77c8deSGovindraj.R OMAP_UART_MVR_MAJ_SHIFT; 11607c77c8deSGovindraj.R minor = (mvr & OMAP_UART_MVR_MIN_MASK); 11617c77c8deSGovindraj.R break; 11627c77c8deSGovindraj.R default: 1163d8ee4ea6SFelipe Balbi dev_warn(up->dev, 11647c77c8deSGovindraj.R "Unknown %s revision, defaulting to highest\n", 11657c77c8deSGovindraj.R up->name); 11667c77c8deSGovindraj.R /* highest possible revision */ 11677c77c8deSGovindraj.R major = 0xff; 11687c77c8deSGovindraj.R minor = 0xff; 11697c77c8deSGovindraj.R } 11707c77c8deSGovindraj.R 11717c77c8deSGovindraj.R /* normalize revision for the driver */ 11727c77c8deSGovindraj.R revision = UART_BUILD_REVISION(major, minor); 11737c77c8deSGovindraj.R 11747c77c8deSGovindraj.R switch (revision) { 11757c77c8deSGovindraj.R case OMAP_UART_REV_46: 11767c77c8deSGovindraj.R up->errata |= (UART_ERRATA_i202_MDR1_ACCESS | 11777c77c8deSGovindraj.R UART_ERRATA_i291_DMA_FORCEIDLE); 11787c77c8deSGovindraj.R break; 11797c77c8deSGovindraj.R case OMAP_UART_REV_52: 11807c77c8deSGovindraj.R up->errata |= (UART_ERRATA_i202_MDR1_ACCESS | 11817c77c8deSGovindraj.R UART_ERRATA_i291_DMA_FORCEIDLE); 11827c77c8deSGovindraj.R break; 11837c77c8deSGovindraj.R case OMAP_UART_REV_63: 11847c77c8deSGovindraj.R up->errata |= UART_ERRATA_i202_MDR1_ACCESS; 11857c77c8deSGovindraj.R break; 11867c77c8deSGovindraj.R default: 11877c77c8deSGovindraj.R break; 11887c77c8deSGovindraj.R } 11897c77c8deSGovindraj.R } 11907c77c8deSGovindraj.R 1191d92b0dfcSRajendra Nayak static struct omap_uart_port_info *of_get_uart_port_info(struct device *dev) 1192d92b0dfcSRajendra Nayak { 1193d92b0dfcSRajendra Nayak struct omap_uart_port_info *omap_up_info; 1194d92b0dfcSRajendra Nayak 1195d92b0dfcSRajendra Nayak omap_up_info = devm_kzalloc(dev, sizeof(*omap_up_info), GFP_KERNEL); 1196d92b0dfcSRajendra Nayak if (!omap_up_info) 1197d92b0dfcSRajendra Nayak return NULL; /* out of memory */ 1198d92b0dfcSRajendra Nayak 1199d92b0dfcSRajendra Nayak of_property_read_u32(dev->of_node, "clock-frequency", 1200d92b0dfcSRajendra Nayak &omap_up_info->uartclk); 1201d92b0dfcSRajendra Nayak return omap_up_info; 1202d92b0dfcSRajendra Nayak } 1203d92b0dfcSRajendra Nayak 1204ab4382d2SGreg Kroah-Hartman static int serial_omap_probe(struct platform_device *pdev) 1205ab4382d2SGreg Kroah-Hartman { 1206ab4382d2SGreg Kroah-Hartman struct uart_omap_port *up; 120749457430SFelipe Balbi struct resource *mem, *irq; 1208ab4382d2SGreg Kroah-Hartman struct omap_uart_port_info *omap_up_info = pdev->dev.platform_data; 12099574f36fSNeilBrown int ret; 1210ab4382d2SGreg Kroah-Hartman 1211d92b0dfcSRajendra Nayak if (pdev->dev.of_node) 1212d92b0dfcSRajendra Nayak omap_up_info = of_get_uart_port_info(&pdev->dev); 1213d92b0dfcSRajendra Nayak 1214ab4382d2SGreg Kroah-Hartman mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1215ab4382d2SGreg Kroah-Hartman if (!mem) { 1216ab4382d2SGreg Kroah-Hartman dev_err(&pdev->dev, "no mem resource?\n"); 1217ab4382d2SGreg Kroah-Hartman return -ENODEV; 1218ab4382d2SGreg Kroah-Hartman } 1219ab4382d2SGreg Kroah-Hartman 1220ab4382d2SGreg Kroah-Hartman irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 1221ab4382d2SGreg Kroah-Hartman if (!irq) { 1222ab4382d2SGreg Kroah-Hartman dev_err(&pdev->dev, "no irq resource?\n"); 1223ab4382d2SGreg Kroah-Hartman return -ENODEV; 1224ab4382d2SGreg Kroah-Hartman } 1225ab4382d2SGreg Kroah-Hartman 1226388bc262SShubhrajyoti D if (!devm_request_mem_region(&pdev->dev, mem->start, resource_size(mem), 1227ab4382d2SGreg Kroah-Hartman pdev->dev.driver->name)) { 1228ab4382d2SGreg Kroah-Hartman dev_err(&pdev->dev, "memory region already claimed\n"); 1229ab4382d2SGreg Kroah-Hartman return -EBUSY; 1230ab4382d2SGreg Kroah-Hartman } 1231ab4382d2SGreg Kroah-Hartman 12329574f36fSNeilBrown if (gpio_is_valid(omap_up_info->DTR_gpio) && 12339574f36fSNeilBrown omap_up_info->DTR_present) { 12349574f36fSNeilBrown ret = gpio_request(omap_up_info->DTR_gpio, "omap-serial"); 12359574f36fSNeilBrown if (ret < 0) 12369574f36fSNeilBrown return ret; 12379574f36fSNeilBrown ret = gpio_direction_output(omap_up_info->DTR_gpio, 12389574f36fSNeilBrown omap_up_info->DTR_inverted); 12399574f36fSNeilBrown if (ret < 0) 12409574f36fSNeilBrown return ret; 12419574f36fSNeilBrown } 12429574f36fSNeilBrown 1243388bc262SShubhrajyoti D up = devm_kzalloc(&pdev->dev, sizeof(*up), GFP_KERNEL); 1244388bc262SShubhrajyoti D if (!up) 1245388bc262SShubhrajyoti D return -ENOMEM; 1246388bc262SShubhrajyoti D 12479574f36fSNeilBrown if (gpio_is_valid(omap_up_info->DTR_gpio) && 12489574f36fSNeilBrown omap_up_info->DTR_present) { 12499574f36fSNeilBrown up->DTR_gpio = omap_up_info->DTR_gpio; 12509574f36fSNeilBrown up->DTR_inverted = omap_up_info->DTR_inverted; 12519574f36fSNeilBrown } else 12529574f36fSNeilBrown up->DTR_gpio = -EINVAL; 12539574f36fSNeilBrown up->DTR_active = 0; 12549574f36fSNeilBrown 1255d8ee4ea6SFelipe Balbi up->dev = &pdev->dev; 1256ab4382d2SGreg Kroah-Hartman up->port.dev = &pdev->dev; 1257ab4382d2SGreg Kroah-Hartman up->port.type = PORT_OMAP; 1258ab4382d2SGreg Kroah-Hartman up->port.iotype = UPIO_MEM; 1259ab4382d2SGreg Kroah-Hartman up->port.irq = irq->start; 1260ab4382d2SGreg Kroah-Hartman 1261ab4382d2SGreg Kroah-Hartman up->port.regshift = 2; 1262ab4382d2SGreg Kroah-Hartman up->port.fifosize = 64; 1263ab4382d2SGreg Kroah-Hartman up->port.ops = &serial_omap_pops; 1264ab4382d2SGreg Kroah-Hartman 1265d92b0dfcSRajendra Nayak if (pdev->dev.of_node) 1266d92b0dfcSRajendra Nayak up->port.line = of_alias_get_id(pdev->dev.of_node, "serial"); 1267d92b0dfcSRajendra Nayak else 1268ab4382d2SGreg Kroah-Hartman up->port.line = pdev->id; 1269ab4382d2SGreg Kroah-Hartman 1270d92b0dfcSRajendra Nayak if (up->port.line < 0) { 1271d92b0dfcSRajendra Nayak dev_err(&pdev->dev, "failed to get alias/pdev id, errno %d\n", 1272d92b0dfcSRajendra Nayak up->port.line); 1273d92b0dfcSRajendra Nayak ret = -ENODEV; 1274388bc262SShubhrajyoti D goto err_port_line; 1275d92b0dfcSRajendra Nayak } 1276d92b0dfcSRajendra Nayak 1277d92b0dfcSRajendra Nayak sprintf(up->name, "OMAP UART%d", up->port.line); 1278edd70ad7SGovindraj.R up->port.mapbase = mem->start; 1279388bc262SShubhrajyoti D up->port.membase = devm_ioremap(&pdev->dev, mem->start, 1280388bc262SShubhrajyoti D resource_size(mem)); 1281edd70ad7SGovindraj.R if (!up->port.membase) { 1282edd70ad7SGovindraj.R dev_err(&pdev->dev, "can't ioremap UART\n"); 1283edd70ad7SGovindraj.R ret = -ENOMEM; 1284388bc262SShubhrajyoti D goto err_ioremap; 1285edd70ad7SGovindraj.R } 1286edd70ad7SGovindraj.R 1287ab4382d2SGreg Kroah-Hartman up->port.flags = omap_up_info->flags; 1288ab4382d2SGreg Kroah-Hartman up->port.uartclk = omap_up_info->uartclk; 12898fe789dcSRajendra Nayak if (!up->port.uartclk) { 12908fe789dcSRajendra Nayak up->port.uartclk = DEFAULT_CLK_SPEED; 12918fe789dcSRajendra Nayak dev_warn(&pdev->dev, "No clock speed specified: using default:" 12928fe789dcSRajendra Nayak "%d\n", DEFAULT_CLK_SPEED); 12938fe789dcSRajendra Nayak } 1294ab4382d2SGreg Kroah-Hartman 12952fd14964SGovindraj.R up->latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE; 12962fd14964SGovindraj.R up->calc_latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE; 12972fd14964SGovindraj.R pm_qos_add_request(&up->pm_qos_request, 12982fd14964SGovindraj.R PM_QOS_CPU_DMA_LATENCY, up->latency); 12992fd14964SGovindraj.R serial_omap_uart_wq = create_singlethread_workqueue(up->name); 13002fd14964SGovindraj.R INIT_WORK(&up->qos_work, serial_omap_uart_qos_work); 13012fd14964SGovindraj.R 1302fcdca757SGovindraj.R pm_runtime_use_autosuspend(&pdev->dev); 1303fcdca757SGovindraj.R pm_runtime_set_autosuspend_delay(&pdev->dev, 1304c86845dbSDeepak K omap_up_info->autosuspend_timeout); 1305fcdca757SGovindraj.R 1306fcdca757SGovindraj.R pm_runtime_irq_safe(&pdev->dev); 1307fcdca757SGovindraj.R pm_runtime_enable(&pdev->dev); 1308fcdca757SGovindraj.R pm_runtime_get_sync(&pdev->dev); 1309fcdca757SGovindraj.R 13107c77c8deSGovindraj.R omap_serial_fill_features_erratas(up); 13117c77c8deSGovindraj.R 1312ba77433dSRajendra Nayak ui[up->port.line] = up; 1313ab4382d2SGreg Kroah-Hartman serial_omap_add_console_port(up); 1314ab4382d2SGreg Kroah-Hartman 1315ab4382d2SGreg Kroah-Hartman ret = uart_add_one_port(&serial_omap_reg, &up->port); 1316ab4382d2SGreg Kroah-Hartman if (ret != 0) 1317388bc262SShubhrajyoti D goto err_add_port; 1318ab4382d2SGreg Kroah-Hartman 1319fcdca757SGovindraj.R pm_runtime_put(&pdev->dev); 1320ab4382d2SGreg Kroah-Hartman platform_set_drvdata(pdev, up); 1321ab4382d2SGreg Kroah-Hartman return 0; 1322388bc262SShubhrajyoti D 1323388bc262SShubhrajyoti D err_add_port: 1324388bc262SShubhrajyoti D pm_runtime_put(&pdev->dev); 1325388bc262SShubhrajyoti D pm_runtime_disable(&pdev->dev); 1326388bc262SShubhrajyoti D err_ioremap: 1327388bc262SShubhrajyoti D err_port_line: 1328ab4382d2SGreg Kroah-Hartman dev_err(&pdev->dev, "[UART%d]: failure [%s]: %d\n", 1329ab4382d2SGreg Kroah-Hartman pdev->id, __func__, ret); 1330ab4382d2SGreg Kroah-Hartman return ret; 1331ab4382d2SGreg Kroah-Hartman } 1332ab4382d2SGreg Kroah-Hartman 1333ab4382d2SGreg Kroah-Hartman static int serial_omap_remove(struct platform_device *dev) 1334ab4382d2SGreg Kroah-Hartman { 1335ab4382d2SGreg Kroah-Hartman struct uart_omap_port *up = platform_get_drvdata(dev); 1336ab4382d2SGreg Kroah-Hartman 1337ab4382d2SGreg Kroah-Hartman if (up) { 1338d8ee4ea6SFelipe Balbi pm_runtime_disable(up->dev); 1339ab4382d2SGreg Kroah-Hartman uart_remove_one_port(&serial_omap_reg, &up->port); 13402fd14964SGovindraj.R pm_qos_remove_request(&up->pm_qos_request); 1341ab4382d2SGreg Kroah-Hartman } 1342fcdca757SGovindraj.R 1343fcdca757SGovindraj.R platform_set_drvdata(dev, NULL); 1344ab4382d2SGreg Kroah-Hartman return 0; 1345ab4382d2SGreg Kroah-Hartman } 1346ab4382d2SGreg Kroah-Hartman 134794734749SGovindraj.R /* 134894734749SGovindraj.R * Work Around for Errata i202 (2430, 3430, 3630, 4430 and 4460) 134994734749SGovindraj.R * The access to uart register after MDR1 Access 135094734749SGovindraj.R * causes UART to corrupt data. 135194734749SGovindraj.R * 135294734749SGovindraj.R * Need a delay = 135394734749SGovindraj.R * 5 L4 clock cycles + 5 UART functional clock cycle (@48MHz = ~0.2uS) 135494734749SGovindraj.R * give 10 times as much 135594734749SGovindraj.R */ 135694734749SGovindraj.R static void serial_omap_mdr1_errataset(struct uart_omap_port *up, u8 mdr1) 135794734749SGovindraj.R { 135894734749SGovindraj.R u8 timeout = 255; 135994734749SGovindraj.R 136094734749SGovindraj.R serial_out(up, UART_OMAP_MDR1, mdr1); 136194734749SGovindraj.R udelay(2); 136294734749SGovindraj.R serial_out(up, UART_FCR, up->fcr | UART_FCR_CLEAR_XMIT | 136394734749SGovindraj.R UART_FCR_CLEAR_RCVR); 136494734749SGovindraj.R /* 136594734749SGovindraj.R * Wait for FIFO to empty: when empty, RX_FIFO_E bit is 0 and 136694734749SGovindraj.R * TX_FIFO_E bit is 1. 136794734749SGovindraj.R */ 136894734749SGovindraj.R while (UART_LSR_THRE != (serial_in(up, UART_LSR) & 136994734749SGovindraj.R (UART_LSR_THRE | UART_LSR_DR))) { 137094734749SGovindraj.R timeout--; 137194734749SGovindraj.R if (!timeout) { 137294734749SGovindraj.R /* Should *never* happen. we warn and carry on */ 1373d8ee4ea6SFelipe Balbi dev_crit(up->dev, "Errata i202: timedout %x\n", 137494734749SGovindraj.R serial_in(up, UART_LSR)); 137594734749SGovindraj.R break; 137694734749SGovindraj.R } 137794734749SGovindraj.R udelay(1); 137894734749SGovindraj.R } 137994734749SGovindraj.R } 138094734749SGovindraj.R 1381b5148856SShubhrajyoti D #ifdef CONFIG_PM_RUNTIME 13829f9ac1e8SGovindraj.R static void serial_omap_restore_context(struct uart_omap_port *up) 13839f9ac1e8SGovindraj.R { 138494734749SGovindraj.R if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) 138594734749SGovindraj.R serial_omap_mdr1_errataset(up, UART_OMAP_MDR1_DISABLE); 138694734749SGovindraj.R else 13879f9ac1e8SGovindraj.R serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE); 138894734749SGovindraj.R 13899f9ac1e8SGovindraj.R serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */ 13909f9ac1e8SGovindraj.R serial_out(up, UART_EFR, UART_EFR_ECB); 13919f9ac1e8SGovindraj.R serial_out(up, UART_LCR, 0x0); /* Operational mode */ 13929f9ac1e8SGovindraj.R serial_out(up, UART_IER, 0x0); 13939f9ac1e8SGovindraj.R serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */ 1394c538d20cSGovindraj.R serial_out(up, UART_DLL, up->dll); 1395c538d20cSGovindraj.R serial_out(up, UART_DLM, up->dlh); 13969f9ac1e8SGovindraj.R serial_out(up, UART_LCR, 0x0); /* Operational mode */ 13979f9ac1e8SGovindraj.R serial_out(up, UART_IER, up->ier); 13989f9ac1e8SGovindraj.R serial_out(up, UART_FCR, up->fcr); 13999f9ac1e8SGovindraj.R serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 14009f9ac1e8SGovindraj.R serial_out(up, UART_MCR, up->mcr); 14019f9ac1e8SGovindraj.R serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */ 1402c538d20cSGovindraj.R serial_out(up, UART_OMAP_SCR, up->scr); 14039f9ac1e8SGovindraj.R serial_out(up, UART_EFR, up->efr); 14049f9ac1e8SGovindraj.R serial_out(up, UART_LCR, up->lcr); 140594734749SGovindraj.R if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) 140694734749SGovindraj.R serial_omap_mdr1_errataset(up, up->mdr1); 140794734749SGovindraj.R else 1408c538d20cSGovindraj.R serial_out(up, UART_OMAP_MDR1, up->mdr1); 14099f9ac1e8SGovindraj.R } 14109f9ac1e8SGovindraj.R 1411fcdca757SGovindraj.R static int serial_omap_runtime_suspend(struct device *dev) 1412fcdca757SGovindraj.R { 1413ec3bebc6SGovindraj.R struct uart_omap_port *up = dev_get_drvdata(dev); 1414ec3bebc6SGovindraj.R struct omap_uart_port_info *pdata = dev->platform_data; 1415ec3bebc6SGovindraj.R 1416ec3bebc6SGovindraj.R if (!up) 1417ec3bebc6SGovindraj.R return -EINVAL; 1418ec3bebc6SGovindraj.R 1419e5b57c03SFelipe Balbi if (!pdata) 142062f3ec5fSGovindraj.R return 0; 142162f3ec5fSGovindraj.R 1422e5b57c03SFelipe Balbi up->context_loss_cnt = serial_omap_get_context_loss_count(up); 1423ec3bebc6SGovindraj.R 142462f3ec5fSGovindraj.R if (device_may_wakeup(dev)) { 142562f3ec5fSGovindraj.R if (!up->wakeups_enabled) { 1426e5b57c03SFelipe Balbi serial_omap_enable_wakeup(up, true); 142762f3ec5fSGovindraj.R up->wakeups_enabled = true; 142862f3ec5fSGovindraj.R } 142962f3ec5fSGovindraj.R } else { 143062f3ec5fSGovindraj.R if (up->wakeups_enabled) { 1431e5b57c03SFelipe Balbi serial_omap_enable_wakeup(up, false); 143262f3ec5fSGovindraj.R up->wakeups_enabled = false; 143362f3ec5fSGovindraj.R } 143462f3ec5fSGovindraj.R } 143562f3ec5fSGovindraj.R 14362fd14964SGovindraj.R up->latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE; 14372fd14964SGovindraj.R schedule_work(&up->qos_work); 14382fd14964SGovindraj.R 1439fcdca757SGovindraj.R return 0; 1440fcdca757SGovindraj.R } 1441fcdca757SGovindraj.R 1442fcdca757SGovindraj.R static int serial_omap_runtime_resume(struct device *dev) 1443fcdca757SGovindraj.R { 14449f9ac1e8SGovindraj.R struct uart_omap_port *up = dev_get_drvdata(dev); 1445ec3bebc6SGovindraj.R struct omap_uart_port_info *pdata = dev->platform_data; 14469f9ac1e8SGovindraj.R 1447a5f43138SCousson, Benoit if (up && pdata) { 1448e5b57c03SFelipe Balbi u32 loss_cnt = serial_omap_get_context_loss_count(up); 1449ec3bebc6SGovindraj.R 1450ec3bebc6SGovindraj.R if (up->context_loss_cnt != loss_cnt) 14519f9ac1e8SGovindraj.R serial_omap_restore_context(up); 145294734749SGovindraj.R 14532fd14964SGovindraj.R up->latency = up->calc_latency; 14542fd14964SGovindraj.R schedule_work(&up->qos_work); 1455ec3bebc6SGovindraj.R } 14569f9ac1e8SGovindraj.R 1457fcdca757SGovindraj.R return 0; 1458fcdca757SGovindraj.R } 1459fcdca757SGovindraj.R #endif 1460fcdca757SGovindraj.R 1461fcdca757SGovindraj.R static const struct dev_pm_ops serial_omap_dev_pm_ops = { 1462fcdca757SGovindraj.R SET_SYSTEM_SLEEP_PM_OPS(serial_omap_suspend, serial_omap_resume) 1463fcdca757SGovindraj.R SET_RUNTIME_PM_OPS(serial_omap_runtime_suspend, 1464fcdca757SGovindraj.R serial_omap_runtime_resume, NULL) 1465fcdca757SGovindraj.R }; 1466fcdca757SGovindraj.R 1467d92b0dfcSRajendra Nayak #if defined(CONFIG_OF) 1468d92b0dfcSRajendra Nayak static const struct of_device_id omap_serial_of_match[] = { 1469d92b0dfcSRajendra Nayak { .compatible = "ti,omap2-uart" }, 1470d92b0dfcSRajendra Nayak { .compatible = "ti,omap3-uart" }, 1471d92b0dfcSRajendra Nayak { .compatible = "ti,omap4-uart" }, 1472d92b0dfcSRajendra Nayak {}, 1473d92b0dfcSRajendra Nayak }; 1474d92b0dfcSRajendra Nayak MODULE_DEVICE_TABLE(of, omap_serial_of_match); 1475d92b0dfcSRajendra Nayak #endif 1476d92b0dfcSRajendra Nayak 1477ab4382d2SGreg Kroah-Hartman static struct platform_driver serial_omap_driver = { 1478ab4382d2SGreg Kroah-Hartman .probe = serial_omap_probe, 1479ab4382d2SGreg Kroah-Hartman .remove = serial_omap_remove, 1480ab4382d2SGreg Kroah-Hartman .driver = { 1481ab4382d2SGreg Kroah-Hartman .name = DRIVER_NAME, 1482fcdca757SGovindraj.R .pm = &serial_omap_dev_pm_ops, 1483d92b0dfcSRajendra Nayak .of_match_table = of_match_ptr(omap_serial_of_match), 1484ab4382d2SGreg Kroah-Hartman }, 1485ab4382d2SGreg Kroah-Hartman }; 1486ab4382d2SGreg Kroah-Hartman 1487ab4382d2SGreg Kroah-Hartman static int __init serial_omap_init(void) 1488ab4382d2SGreg Kroah-Hartman { 1489ab4382d2SGreg Kroah-Hartman int ret; 1490ab4382d2SGreg Kroah-Hartman 1491ab4382d2SGreg Kroah-Hartman ret = uart_register_driver(&serial_omap_reg); 1492ab4382d2SGreg Kroah-Hartman if (ret != 0) 1493ab4382d2SGreg Kroah-Hartman return ret; 1494ab4382d2SGreg Kroah-Hartman ret = platform_driver_register(&serial_omap_driver); 1495ab4382d2SGreg Kroah-Hartman if (ret != 0) 1496ab4382d2SGreg Kroah-Hartman uart_unregister_driver(&serial_omap_reg); 1497ab4382d2SGreg Kroah-Hartman return ret; 1498ab4382d2SGreg Kroah-Hartman } 1499ab4382d2SGreg Kroah-Hartman 1500ab4382d2SGreg Kroah-Hartman static void __exit serial_omap_exit(void) 1501ab4382d2SGreg Kroah-Hartman { 1502ab4382d2SGreg Kroah-Hartman platform_driver_unregister(&serial_omap_driver); 1503ab4382d2SGreg Kroah-Hartman uart_unregister_driver(&serial_omap_reg); 1504ab4382d2SGreg Kroah-Hartman } 1505ab4382d2SGreg Kroah-Hartman 1506ab4382d2SGreg Kroah-Hartman module_init(serial_omap_init); 1507ab4382d2SGreg Kroah-Hartman module_exit(serial_omap_exit); 1508ab4382d2SGreg Kroah-Hartman 1509ab4382d2SGreg Kroah-Hartman MODULE_DESCRIPTION("OMAP High Speed UART driver"); 1510ab4382d2SGreg Kroah-Hartman MODULE_LICENSE("GPL"); 1511ab4382d2SGreg Kroah-Hartman MODULE_AUTHOR("Texas Instruments Inc"); 1512