1ab4382d2SGreg Kroah-Hartman /* 2ab4382d2SGreg Kroah-Hartman * Driver for OMAP-UART controller. 3ab4382d2SGreg Kroah-Hartman * Based on drivers/serial/8250.c 4ab4382d2SGreg Kroah-Hartman * 5ab4382d2SGreg Kroah-Hartman * Copyright (C) 2010 Texas Instruments. 6ab4382d2SGreg Kroah-Hartman * 7ab4382d2SGreg Kroah-Hartman * Authors: 8ab4382d2SGreg Kroah-Hartman * Govindraj R <govindraj.raja@ti.com> 9ab4382d2SGreg Kroah-Hartman * Thara Gopinath <thara@ti.com> 10ab4382d2SGreg Kroah-Hartman * 11ab4382d2SGreg Kroah-Hartman * This program is free software; you can redistribute it and/or modify 12ab4382d2SGreg Kroah-Hartman * it under the terms of the GNU General Public License as published by 13ab4382d2SGreg Kroah-Hartman * the Free Software Foundation; either version 2 of the License, or 14ab4382d2SGreg Kroah-Hartman * (at your option) any later version. 15ab4382d2SGreg Kroah-Hartman * 1625985edcSLucas De Marchi * Note: This driver is made separate from 8250 driver as we cannot 17ab4382d2SGreg Kroah-Hartman * over load 8250 driver with omap platform specific configuration for 18ab4382d2SGreg Kroah-Hartman * features like DMA, it makes easier to implement features like DMA and 19ab4382d2SGreg Kroah-Hartman * hardware flow control and software flow control configuration with 20ab4382d2SGreg Kroah-Hartman * this driver as required for the omap-platform. 21ab4382d2SGreg Kroah-Hartman */ 22ab4382d2SGreg Kroah-Hartman 23364a6eceSThomas Weber #if defined(CONFIG_SERIAL_OMAP_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) 24364a6eceSThomas Weber #define SUPPORT_SYSRQ 25364a6eceSThomas Weber #endif 26364a6eceSThomas Weber 27ab4382d2SGreg Kroah-Hartman #include <linux/module.h> 28ab4382d2SGreg Kroah-Hartman #include <linux/init.h> 29ab4382d2SGreg Kroah-Hartman #include <linux/console.h> 30ab4382d2SGreg Kroah-Hartman #include <linux/serial_reg.h> 31ab4382d2SGreg Kroah-Hartman #include <linux/delay.h> 32ab4382d2SGreg Kroah-Hartman #include <linux/slab.h> 33ab4382d2SGreg Kroah-Hartman #include <linux/tty.h> 34ab4382d2SGreg Kroah-Hartman #include <linux/tty_flip.h> 35d21e4005SFelipe Balbi #include <linux/platform_device.h> 36ab4382d2SGreg Kroah-Hartman #include <linux/io.h> 37ab4382d2SGreg Kroah-Hartman #include <linux/clk.h> 38ab4382d2SGreg Kroah-Hartman #include <linux/serial_core.h> 39ab4382d2SGreg Kroah-Hartman #include <linux/irq.h> 40fcdca757SGovindraj.R #include <linux/pm_runtime.h> 41d92b0dfcSRajendra Nayak #include <linux/of.h> 429574f36fSNeilBrown #include <linux/gpio.h> 434a0ac0f5SMark Jackson #include <linux/of_gpio.h> 44d9ba5737STony Lindgren #include <linux/platform_data/serial-omap.h> 45ab4382d2SGreg Kroah-Hartman 464a0ac0f5SMark Jackson #include <dt-bindings/gpio/gpio.h> 474a0ac0f5SMark Jackson 48f91b55abSRussell King #define OMAP_MAX_HSUART_PORTS 6 49f91b55abSRussell King 507c77c8deSGovindraj.R #define UART_BUILD_REVISION(x, y) (((x) << 8) | (y)) 517c77c8deSGovindraj.R 527c77c8deSGovindraj.R #define OMAP_UART_REV_42 0x0402 537c77c8deSGovindraj.R #define OMAP_UART_REV_46 0x0406 547c77c8deSGovindraj.R #define OMAP_UART_REV_52 0x0502 557c77c8deSGovindraj.R #define OMAP_UART_REV_63 0x0603 567c77c8deSGovindraj.R 57f64ffda6SGovindraj.R #define OMAP_UART_TX_WAKEUP_EN BIT(7) 58f64ffda6SGovindraj.R 59f64ffda6SGovindraj.R /* Feature flags */ 60f64ffda6SGovindraj.R #define OMAP_UART_WER_HAS_TX_WAKEUP BIT(0) 61f64ffda6SGovindraj.R 62f91b55abSRussell King #define UART_ERRATA_i202_MDR1_ACCESS BIT(0) 63f91b55abSRussell King #define UART_ERRATA_i291_DMA_FORCEIDLE BIT(1) 64f91b55abSRussell King 658fe789dcSRajendra Nayak #define DEFAULT_CLK_SPEED 48000000 /* 48Mhz*/ 668fe789dcSRajendra Nayak 670ba5f668SPaul Walmsley /* SCR register bitmasks */ 680ba5f668SPaul Walmsley #define OMAP_UART_SCR_RX_TRIG_GRANU1_MASK (1 << 7) 691776fd05SAlexey Pelykh #define OMAP_UART_SCR_TX_TRIG_GRANU1_MASK (1 << 6) 70f91b55abSRussell King #define OMAP_UART_SCR_TX_EMPTY (1 << 3) 710ba5f668SPaul Walmsley 720ba5f668SPaul Walmsley /* FCR register bitmasks */ 730ba5f668SPaul Walmsley #define OMAP_UART_FCR_RX_FIFO_TRIG_MASK (0x3 << 6) 746721ab7fSFelipe Balbi #define OMAP_UART_FCR_TX_FIFO_TRIG_MASK (0x3 << 4) 750ba5f668SPaul Walmsley 767c77c8deSGovindraj.R /* MVR register bitmasks */ 777c77c8deSGovindraj.R #define OMAP_UART_MVR_SCHEME_SHIFT 30 787c77c8deSGovindraj.R 797c77c8deSGovindraj.R #define OMAP_UART_LEGACY_MVR_MAJ_MASK 0xf0 807c77c8deSGovindraj.R #define OMAP_UART_LEGACY_MVR_MAJ_SHIFT 4 817c77c8deSGovindraj.R #define OMAP_UART_LEGACY_MVR_MIN_MASK 0x0f 827c77c8deSGovindraj.R 837c77c8deSGovindraj.R #define OMAP_UART_MVR_MAJ_MASK 0x700 847c77c8deSGovindraj.R #define OMAP_UART_MVR_MAJ_SHIFT 8 857c77c8deSGovindraj.R #define OMAP_UART_MVR_MIN_MASK 0x3f 867c77c8deSGovindraj.R 87f91b55abSRussell King #define OMAP_UART_DMA_CH_FREE -1 88f91b55abSRussell King 89f91b55abSRussell King #define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA 90f91b55abSRussell King #define OMAP_MODE13X_SPEED 230400 91f91b55abSRussell King 92f91b55abSRussell King /* WER = 0x7F 93f91b55abSRussell King * Enable module level wakeup in WER reg 94f91b55abSRussell King */ 95f91b55abSRussell King #define OMAP_UART_WER_MOD_WKUP 0X7F 96f91b55abSRussell King 97f91b55abSRussell King /* Enable XON/XOFF flow control on output */ 983af08bd7SRussell King #define OMAP_UART_SW_TX 0x08 99f91b55abSRussell King 100f91b55abSRussell King /* Enable XON/XOFF flow control on input */ 1013af08bd7SRussell King #define OMAP_UART_SW_RX 0x02 102f91b55abSRussell King 103f91b55abSRussell King #define OMAP_UART_SW_CLR 0xF0 104f91b55abSRussell King 105f91b55abSRussell King #define OMAP_UART_TCR_TRIG 0x0F 106f91b55abSRussell King 107f91b55abSRussell King struct uart_omap_dma { 108f91b55abSRussell King u8 uart_dma_tx; 109f91b55abSRussell King u8 uart_dma_rx; 110f91b55abSRussell King int rx_dma_channel; 111f91b55abSRussell King int tx_dma_channel; 112f91b55abSRussell King dma_addr_t rx_buf_dma_phys; 113f91b55abSRussell King dma_addr_t tx_buf_dma_phys; 114f91b55abSRussell King unsigned int uart_base; 115f91b55abSRussell King /* 116f91b55abSRussell King * Buffer for rx dma.It is not required for tx because the buffer 117f91b55abSRussell King * comes from port structure. 118f91b55abSRussell King */ 119f91b55abSRussell King unsigned char *rx_buf; 120f91b55abSRussell King unsigned int prev_rx_dma_pos; 121f91b55abSRussell King int tx_buf_size; 122f91b55abSRussell King int tx_dma_used; 123f91b55abSRussell King int rx_dma_used; 124f91b55abSRussell King spinlock_t tx_lock; 125f91b55abSRussell King spinlock_t rx_lock; 126f91b55abSRussell King /* timer to poll activity on rx dma */ 127f91b55abSRussell King struct timer_list rx_timer; 128f91b55abSRussell King unsigned int rx_buf_size; 129f91b55abSRussell King unsigned int rx_poll_rate; 130f91b55abSRussell King unsigned int rx_timeout; 131f91b55abSRussell King }; 132f91b55abSRussell King 133d37c6cebSFelipe Balbi struct uart_omap_port { 134d37c6cebSFelipe Balbi struct uart_port port; 135d37c6cebSFelipe Balbi struct uart_omap_dma uart_dma; 136d37c6cebSFelipe Balbi struct device *dev; 137d37c6cebSFelipe Balbi 138d37c6cebSFelipe Balbi unsigned char ier; 139d37c6cebSFelipe Balbi unsigned char lcr; 140d37c6cebSFelipe Balbi unsigned char mcr; 141d37c6cebSFelipe Balbi unsigned char fcr; 142d37c6cebSFelipe Balbi unsigned char efr; 143d37c6cebSFelipe Balbi unsigned char dll; 144d37c6cebSFelipe Balbi unsigned char dlh; 145d37c6cebSFelipe Balbi unsigned char mdr1; 146d37c6cebSFelipe Balbi unsigned char scr; 147f64ffda6SGovindraj.R unsigned char wer; 148d37c6cebSFelipe Balbi 149d37c6cebSFelipe Balbi int use_dma; 150d37c6cebSFelipe Balbi /* 151d37c6cebSFelipe Balbi * Some bits in registers are cleared on a read, so they must 152d37c6cebSFelipe Balbi * be saved whenever the register is read but the bits will not 153d37c6cebSFelipe Balbi * be immediately processed. 154d37c6cebSFelipe Balbi */ 155d37c6cebSFelipe Balbi unsigned int lsr_break_flag; 156d37c6cebSFelipe Balbi unsigned char msr_saved_flags; 157d37c6cebSFelipe Balbi char name[20]; 158d37c6cebSFelipe Balbi unsigned long port_activity; 15939aee51dSShubhrajyoti D int context_loss_cnt; 160d37c6cebSFelipe Balbi u32 errata; 161d37c6cebSFelipe Balbi u8 wakeups_enabled; 162f64ffda6SGovindraj.R u32 features; 163d37c6cebSFelipe Balbi 164e36851d0SFelipe Balbi int DTR_gpio; 165e36851d0SFelipe Balbi int DTR_inverted; 166e36851d0SFelipe Balbi int DTR_active; 167e36851d0SFelipe Balbi 1684a0ac0f5SMark Jackson struct serial_rs485 rs485; 1694a0ac0f5SMark Jackson int rts_gpio; 1704a0ac0f5SMark Jackson 171d37c6cebSFelipe Balbi struct pm_qos_request pm_qos_request; 172d37c6cebSFelipe Balbi u32 latency; 173d37c6cebSFelipe Balbi u32 calc_latency; 174d37c6cebSFelipe Balbi struct work_struct qos_work; 175ddd85e22SSourav Poddar bool is_suspending; 176d37c6cebSFelipe Balbi }; 177d37c6cebSFelipe Balbi 178d37c6cebSFelipe Balbi #define to_uart_omap_port(p) ((container_of((p), struct uart_omap_port, port))) 179d37c6cebSFelipe Balbi 180ab4382d2SGreg Kroah-Hartman static struct uart_omap_port *ui[OMAP_MAX_HSUART_PORTS]; 181ab4382d2SGreg Kroah-Hartman 182ab4382d2SGreg Kroah-Hartman /* Forward declaration of functions */ 18394734749SGovindraj.R static void serial_omap_mdr1_errataset(struct uart_omap_port *up, u8 mdr1); 184ab4382d2SGreg Kroah-Hartman 1852fd14964SGovindraj.R static struct workqueue_struct *serial_omap_uart_wq; 186ab4382d2SGreg Kroah-Hartman 187ab4382d2SGreg Kroah-Hartman static inline unsigned int serial_in(struct uart_omap_port *up, int offset) 188ab4382d2SGreg Kroah-Hartman { 189ab4382d2SGreg Kroah-Hartman offset <<= up->port.regshift; 190ab4382d2SGreg Kroah-Hartman return readw(up->port.membase + offset); 191ab4382d2SGreg Kroah-Hartman } 192ab4382d2SGreg Kroah-Hartman 193ab4382d2SGreg Kroah-Hartman static inline void serial_out(struct uart_omap_port *up, int offset, int value) 194ab4382d2SGreg Kroah-Hartman { 195ab4382d2SGreg Kroah-Hartman offset <<= up->port.regshift; 196ab4382d2SGreg Kroah-Hartman writew(value, up->port.membase + offset); 197ab4382d2SGreg Kroah-Hartman } 198ab4382d2SGreg Kroah-Hartman 199ab4382d2SGreg Kroah-Hartman static inline void serial_omap_clear_fifos(struct uart_omap_port *up) 200ab4382d2SGreg Kroah-Hartman { 201ab4382d2SGreg Kroah-Hartman serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO); 202ab4382d2SGreg Kroah-Hartman serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | 203ab4382d2SGreg Kroah-Hartman UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); 204ab4382d2SGreg Kroah-Hartman serial_out(up, UART_FCR, 0); 205ab4382d2SGreg Kroah-Hartman } 206ab4382d2SGreg Kroah-Hartman 207e5b57c03SFelipe Balbi static int serial_omap_get_context_loss_count(struct uart_omap_port *up) 208e5b57c03SFelipe Balbi { 209574de559SJingoo Han struct omap_uart_port_info *pdata = dev_get_platdata(up->dev); 210e5b57c03SFelipe Balbi 211ce2f08deSFelipe Balbi if (!pdata || !pdata->get_context_loss_count) 212a630fbfbSTony Lindgren return -EINVAL; 213e5b57c03SFelipe Balbi 214d8ee4ea6SFelipe Balbi return pdata->get_context_loss_count(up->dev); 215e5b57c03SFelipe Balbi } 216e5b57c03SFelipe Balbi 217e5b57c03SFelipe Balbi static void serial_omap_enable_wakeup(struct uart_omap_port *up, bool enable) 218e5b57c03SFelipe Balbi { 219574de559SJingoo Han struct omap_uart_port_info *pdata = dev_get_platdata(up->dev); 220e5b57c03SFelipe Balbi 221ce2f08deSFelipe Balbi if (!pdata || !pdata->enable_wakeup) 222ce2f08deSFelipe Balbi return; 223ce2f08deSFelipe Balbi 224d8ee4ea6SFelipe Balbi pdata->enable_wakeup(up->dev, enable); 225e5b57c03SFelipe Balbi } 226e5b57c03SFelipe Balbi 227ab4382d2SGreg Kroah-Hartman /* 2285fe21236SAlexey Pelykh * serial_omap_baud_is_mode16 - check if baud rate is MODE16X 2295fe21236SAlexey Pelykh * @port: uart port info 2305fe21236SAlexey Pelykh * @baud: baudrate for which mode needs to be determined 2315fe21236SAlexey Pelykh * 2325fe21236SAlexey Pelykh * Returns true if baud rate is MODE16X and false if MODE13X 2335fe21236SAlexey Pelykh * Original table in OMAP TRM named "UART Mode Baud Rates, Divisor Values, 2345fe21236SAlexey Pelykh * and Error Rates" determines modes not for all common baud rates. 2355fe21236SAlexey Pelykh * E.g. for 1000000 baud rate mode must be 16x, but according to that 2365fe21236SAlexey Pelykh * table it's determined as 13x. 2375fe21236SAlexey Pelykh */ 2385fe21236SAlexey Pelykh static bool 2395fe21236SAlexey Pelykh serial_omap_baud_is_mode16(struct uart_port *port, unsigned int baud) 2405fe21236SAlexey Pelykh { 2415fe21236SAlexey Pelykh unsigned int n13 = port->uartclk / (13 * baud); 2425fe21236SAlexey Pelykh unsigned int n16 = port->uartclk / (16 * baud); 2435fe21236SAlexey Pelykh int baudAbsDiff13 = baud - (port->uartclk / (13 * n13)); 2445fe21236SAlexey Pelykh int baudAbsDiff16 = baud - (port->uartclk / (16 * n16)); 2455fe21236SAlexey Pelykh if(baudAbsDiff13 < 0) 2465fe21236SAlexey Pelykh baudAbsDiff13 = -baudAbsDiff13; 2475fe21236SAlexey Pelykh if(baudAbsDiff16 < 0) 2485fe21236SAlexey Pelykh baudAbsDiff16 = -baudAbsDiff16; 2495fe21236SAlexey Pelykh 2505fe21236SAlexey Pelykh return (baudAbsDiff13 > baudAbsDiff16); 2515fe21236SAlexey Pelykh } 2525fe21236SAlexey Pelykh 2535fe21236SAlexey Pelykh /* 254ab4382d2SGreg Kroah-Hartman * serial_omap_get_divisor - calculate divisor value 255ab4382d2SGreg Kroah-Hartman * @port: uart port info 256ab4382d2SGreg Kroah-Hartman * @baud: baudrate for which divisor needs to be calculated. 257ab4382d2SGreg Kroah-Hartman */ 258ab4382d2SGreg Kroah-Hartman static unsigned int 259ab4382d2SGreg Kroah-Hartman serial_omap_get_divisor(struct uart_port *port, unsigned int baud) 260ab4382d2SGreg Kroah-Hartman { 261ab4382d2SGreg Kroah-Hartman unsigned int divisor; 262ab4382d2SGreg Kroah-Hartman 2635fe21236SAlexey Pelykh if (!serial_omap_baud_is_mode16(port, baud)) 264ab4382d2SGreg Kroah-Hartman divisor = 13; 265ab4382d2SGreg Kroah-Hartman else 266ab4382d2SGreg Kroah-Hartman divisor = 16; 267ab4382d2SGreg Kroah-Hartman return port->uartclk/(baud * divisor); 268ab4382d2SGreg Kroah-Hartman } 269ab4382d2SGreg Kroah-Hartman 270ab4382d2SGreg Kroah-Hartman static void serial_omap_enable_ms(struct uart_port *port) 271ab4382d2SGreg Kroah-Hartman { 272c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 273ab4382d2SGreg Kroah-Hartman 274ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_enable_ms+%d\n", up->port.line); 275fcdca757SGovindraj.R 276d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 277ab4382d2SGreg Kroah-Hartman up->ier |= UART_IER_MSI; 278ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 279660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 280660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 281ab4382d2SGreg Kroah-Hartman } 282ab4382d2SGreg Kroah-Hartman 283ab4382d2SGreg Kroah-Hartman static void serial_omap_stop_tx(struct uart_port *port) 284ab4382d2SGreg Kroah-Hartman { 285c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 2864a0ac0f5SMark Jackson struct circ_buf *xmit = &up->port.state->xmit; 2874a0ac0f5SMark Jackson int res; 288ab4382d2SGreg Kroah-Hartman 289d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 2904a0ac0f5SMark Jackson 2914a0ac0f5SMark Jackson /* handle rs485 */ 2924a0ac0f5SMark Jackson if (up->rs485.flags & SER_RS485_ENABLED) { 2934a0ac0f5SMark Jackson /* do nothing if current tx not yet completed */ 2944a0ac0f5SMark Jackson res = serial_in(up, UART_LSR) & UART_LSR_TEMT; 2954a0ac0f5SMark Jackson if (!res) 2964a0ac0f5SMark Jackson return; 2974a0ac0f5SMark Jackson 2984a0ac0f5SMark Jackson /* if there's no more data to send, turn off rts */ 2994a0ac0f5SMark Jackson if (uart_circ_empty(xmit)) { 3004a0ac0f5SMark Jackson /* if rts not already disabled */ 3014a0ac0f5SMark Jackson res = (up->rs485.flags & SER_RS485_RTS_AFTER_SEND) ? 1 : 0; 3024a0ac0f5SMark Jackson if (gpio_get_value(up->rts_gpio) != res) { 3034a0ac0f5SMark Jackson if (up->rs485.delay_rts_after_send > 0) { 3044a0ac0f5SMark Jackson mdelay(up->rs485.delay_rts_after_send); 3054a0ac0f5SMark Jackson } 3064a0ac0f5SMark Jackson gpio_set_value(up->rts_gpio, res); 3074a0ac0f5SMark Jackson } 3084a0ac0f5SMark Jackson } 3094a0ac0f5SMark Jackson } 3104a0ac0f5SMark Jackson 311ab4382d2SGreg Kroah-Hartman if (up->ier & UART_IER_THRI) { 312ab4382d2SGreg Kroah-Hartman up->ier &= ~UART_IER_THRI; 313ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 314ab4382d2SGreg Kroah-Hartman } 315fcdca757SGovindraj.R 3164a0ac0f5SMark Jackson if ((up->rs485.flags & SER_RS485_ENABLED) && 3174a0ac0f5SMark Jackson !(up->rs485.flags & SER_RS485_RX_DURING_TX)) { 3184a0ac0f5SMark Jackson up->ier = UART_IER_RLSI | UART_IER_RDI; 3194a0ac0f5SMark Jackson serial_out(up, UART_IER, up->ier); 3204a0ac0f5SMark Jackson } 3214a0ac0f5SMark Jackson 322d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 323d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 324ab4382d2SGreg Kroah-Hartman } 325ab4382d2SGreg Kroah-Hartman 326ab4382d2SGreg Kroah-Hartman static void serial_omap_stop_rx(struct uart_port *port) 327ab4382d2SGreg Kroah-Hartman { 328c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 329ab4382d2SGreg Kroah-Hartman 330d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 331ab4382d2SGreg Kroah-Hartman up->ier &= ~UART_IER_RLSI; 332ab4382d2SGreg Kroah-Hartman up->port.read_status_mask &= ~UART_LSR_DR; 333ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 334d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 335d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 336ab4382d2SGreg Kroah-Hartman } 337ab4382d2SGreg Kroah-Hartman 338bf63a086SFelipe Balbi static void transmit_chars(struct uart_omap_port *up, unsigned int lsr) 339ab4382d2SGreg Kroah-Hartman { 340ab4382d2SGreg Kroah-Hartman struct circ_buf *xmit = &up->port.state->xmit; 341ab4382d2SGreg Kroah-Hartman int count; 342ab4382d2SGreg Kroah-Hartman 343ab4382d2SGreg Kroah-Hartman if (up->port.x_char) { 344ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TX, up->port.x_char); 345ab4382d2SGreg Kroah-Hartman up->port.icount.tx++; 346ab4382d2SGreg Kroah-Hartman up->port.x_char = 0; 347ab4382d2SGreg Kroah-Hartman return; 348ab4382d2SGreg Kroah-Hartman } 349ab4382d2SGreg Kroah-Hartman if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { 350ab4382d2SGreg Kroah-Hartman serial_omap_stop_tx(&up->port); 351ab4382d2SGreg Kroah-Hartman return; 352ab4382d2SGreg Kroah-Hartman } 353355fe568SGreg Kroah-Hartman count = up->port.fifosize / 4; 354ab4382d2SGreg Kroah-Hartman do { 355ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TX, xmit->buf[xmit->tail]); 356ab4382d2SGreg Kroah-Hartman xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 357ab4382d2SGreg Kroah-Hartman up->port.icount.tx++; 358ab4382d2SGreg Kroah-Hartman if (uart_circ_empty(xmit)) 359ab4382d2SGreg Kroah-Hartman break; 360ab4382d2SGreg Kroah-Hartman } while (--count > 0); 361ab4382d2SGreg Kroah-Hartman 3620324a821SRuchika Kharwar if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) { 3630324a821SRuchika Kharwar spin_unlock(&up->port.lock); 364ab4382d2SGreg Kroah-Hartman uart_write_wakeup(&up->port); 3650324a821SRuchika Kharwar spin_lock(&up->port.lock); 3660324a821SRuchika Kharwar } 367ab4382d2SGreg Kroah-Hartman 368ab4382d2SGreg Kroah-Hartman if (uart_circ_empty(xmit)) 369ab4382d2SGreg Kroah-Hartman serial_omap_stop_tx(&up->port); 370ab4382d2SGreg Kroah-Hartman } 371ab4382d2SGreg Kroah-Hartman 372ab4382d2SGreg Kroah-Hartman static inline void serial_omap_enable_ier_thri(struct uart_omap_port *up) 373ab4382d2SGreg Kroah-Hartman { 374ab4382d2SGreg Kroah-Hartman if (!(up->ier & UART_IER_THRI)) { 375ab4382d2SGreg Kroah-Hartman up->ier |= UART_IER_THRI; 376ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 377ab4382d2SGreg Kroah-Hartman } 378ab4382d2SGreg Kroah-Hartman } 379ab4382d2SGreg Kroah-Hartman 380ab4382d2SGreg Kroah-Hartman static void serial_omap_start_tx(struct uart_port *port) 381ab4382d2SGreg Kroah-Hartman { 382c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 3834a0ac0f5SMark Jackson int res; 384ab4382d2SGreg Kroah-Hartman 385d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 3864a0ac0f5SMark Jackson 3874a0ac0f5SMark Jackson /* handle rs485 */ 3884a0ac0f5SMark Jackson if (up->rs485.flags & SER_RS485_ENABLED) { 3894a0ac0f5SMark Jackson /* if rts not already enabled */ 3904a0ac0f5SMark Jackson res = (up->rs485.flags & SER_RS485_RTS_ON_SEND) ? 1 : 0; 3914a0ac0f5SMark Jackson if (gpio_get_value(up->rts_gpio) != res) { 3924a0ac0f5SMark Jackson gpio_set_value(up->rts_gpio, res); 3934a0ac0f5SMark Jackson if (up->rs485.delay_rts_before_send > 0) { 3944a0ac0f5SMark Jackson mdelay(up->rs485.delay_rts_before_send); 3954a0ac0f5SMark Jackson } 3964a0ac0f5SMark Jackson } 3974a0ac0f5SMark Jackson } 3984a0ac0f5SMark Jackson 3994a0ac0f5SMark Jackson if ((up->rs485.flags & SER_RS485_ENABLED) && 4004a0ac0f5SMark Jackson !(up->rs485.flags & SER_RS485_RX_DURING_TX)) 4014a0ac0f5SMark Jackson serial_omap_stop_rx(port); 4024a0ac0f5SMark Jackson 403ab4382d2SGreg Kroah-Hartman serial_omap_enable_ier_thri(up); 404d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 405d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 406ab4382d2SGreg Kroah-Hartman } 407ab4382d2SGreg Kroah-Hartman 4083af08bd7SRussell King static void serial_omap_throttle(struct uart_port *port) 4093af08bd7SRussell King { 4103af08bd7SRussell King struct uart_omap_port *up = to_uart_omap_port(port); 4113af08bd7SRussell King unsigned long flags; 4123af08bd7SRussell King 4133af08bd7SRussell King pm_runtime_get_sync(up->dev); 4143af08bd7SRussell King spin_lock_irqsave(&up->port.lock, flags); 4153af08bd7SRussell King up->ier &= ~(UART_IER_RLSI | UART_IER_RDI); 4163af08bd7SRussell King serial_out(up, UART_IER, up->ier); 4173af08bd7SRussell King spin_unlock_irqrestore(&up->port.lock, flags); 4183af08bd7SRussell King pm_runtime_mark_last_busy(up->dev); 4193af08bd7SRussell King pm_runtime_put_autosuspend(up->dev); 4203af08bd7SRussell King } 4213af08bd7SRussell King 4223af08bd7SRussell King static void serial_omap_unthrottle(struct uart_port *port) 4233af08bd7SRussell King { 4243af08bd7SRussell King struct uart_omap_port *up = to_uart_omap_port(port); 4253af08bd7SRussell King unsigned long flags; 4263af08bd7SRussell King 4273af08bd7SRussell King pm_runtime_get_sync(up->dev); 4283af08bd7SRussell King spin_lock_irqsave(&up->port.lock, flags); 4293af08bd7SRussell King up->ier |= UART_IER_RLSI | UART_IER_RDI; 4303af08bd7SRussell King serial_out(up, UART_IER, up->ier); 4313af08bd7SRussell King spin_unlock_irqrestore(&up->port.lock, flags); 4323af08bd7SRussell King pm_runtime_mark_last_busy(up->dev); 4333af08bd7SRussell King pm_runtime_put_autosuspend(up->dev); 4343af08bd7SRussell King } 4353af08bd7SRussell King 436ab4382d2SGreg Kroah-Hartman static unsigned int check_modem_status(struct uart_omap_port *up) 437ab4382d2SGreg Kroah-Hartman { 438ab4382d2SGreg Kroah-Hartman unsigned int status; 439ab4382d2SGreg Kroah-Hartman 440ab4382d2SGreg Kroah-Hartman status = serial_in(up, UART_MSR); 441ab4382d2SGreg Kroah-Hartman status |= up->msr_saved_flags; 442ab4382d2SGreg Kroah-Hartman up->msr_saved_flags = 0; 443ab4382d2SGreg Kroah-Hartman if ((status & UART_MSR_ANY_DELTA) == 0) 444ab4382d2SGreg Kroah-Hartman return status; 445ab4382d2SGreg Kroah-Hartman 446ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI && 447ab4382d2SGreg Kroah-Hartman up->port.state != NULL) { 448ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_TERI) 449ab4382d2SGreg Kroah-Hartman up->port.icount.rng++; 450ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DDSR) 451ab4382d2SGreg Kroah-Hartman up->port.icount.dsr++; 452ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DDCD) 453ab4382d2SGreg Kroah-Hartman uart_handle_dcd_change 454ab4382d2SGreg Kroah-Hartman (&up->port, status & UART_MSR_DCD); 455ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DCTS) 456ab4382d2SGreg Kroah-Hartman uart_handle_cts_change 457ab4382d2SGreg Kroah-Hartman (&up->port, status & UART_MSR_CTS); 458ab4382d2SGreg Kroah-Hartman wake_up_interruptible(&up->port.state->port.delta_msr_wait); 459ab4382d2SGreg Kroah-Hartman } 460ab4382d2SGreg Kroah-Hartman 461ab4382d2SGreg Kroah-Hartman return status; 462ab4382d2SGreg Kroah-Hartman } 463ab4382d2SGreg Kroah-Hartman 46472256cbdSFelipe Balbi static void serial_omap_rlsi(struct uart_omap_port *up, unsigned int lsr) 46572256cbdSFelipe Balbi { 46672256cbdSFelipe Balbi unsigned int flag; 4679a12fcf8SShubhrajyoti D unsigned char ch = 0; 4689a12fcf8SShubhrajyoti D 4699a12fcf8SShubhrajyoti D if (likely(lsr & UART_LSR_DR)) 4709a12fcf8SShubhrajyoti D ch = serial_in(up, UART_RX); 47172256cbdSFelipe Balbi 47272256cbdSFelipe Balbi up->port.icount.rx++; 47372256cbdSFelipe Balbi flag = TTY_NORMAL; 47472256cbdSFelipe Balbi 47572256cbdSFelipe Balbi if (lsr & UART_LSR_BI) { 47672256cbdSFelipe Balbi flag = TTY_BREAK; 47772256cbdSFelipe Balbi lsr &= ~(UART_LSR_FE | UART_LSR_PE); 47872256cbdSFelipe Balbi up->port.icount.brk++; 47972256cbdSFelipe Balbi /* 48072256cbdSFelipe Balbi * We do the SysRQ and SAK checking 48172256cbdSFelipe Balbi * here because otherwise the break 48272256cbdSFelipe Balbi * may get masked by ignore_status_mask 48372256cbdSFelipe Balbi * or read_status_mask. 48472256cbdSFelipe Balbi */ 48572256cbdSFelipe Balbi if (uart_handle_break(&up->port)) 48672256cbdSFelipe Balbi return; 48772256cbdSFelipe Balbi 48872256cbdSFelipe Balbi } 48972256cbdSFelipe Balbi 49072256cbdSFelipe Balbi if (lsr & UART_LSR_PE) { 49172256cbdSFelipe Balbi flag = TTY_PARITY; 49272256cbdSFelipe Balbi up->port.icount.parity++; 49372256cbdSFelipe Balbi } 49472256cbdSFelipe Balbi 49572256cbdSFelipe Balbi if (lsr & UART_LSR_FE) { 49672256cbdSFelipe Balbi flag = TTY_FRAME; 49772256cbdSFelipe Balbi up->port.icount.frame++; 49872256cbdSFelipe Balbi } 49972256cbdSFelipe Balbi 50072256cbdSFelipe Balbi if (lsr & UART_LSR_OE) 50172256cbdSFelipe Balbi up->port.icount.overrun++; 50272256cbdSFelipe Balbi 50372256cbdSFelipe Balbi #ifdef CONFIG_SERIAL_OMAP_CONSOLE 50472256cbdSFelipe Balbi if (up->port.line == up->port.cons->index) { 50572256cbdSFelipe Balbi /* Recover the break flag from console xmit */ 50672256cbdSFelipe Balbi lsr |= up->lsr_break_flag; 50772256cbdSFelipe Balbi } 50872256cbdSFelipe Balbi #endif 50972256cbdSFelipe Balbi uart_insert_char(&up->port, lsr, UART_LSR_OE, 0, flag); 51072256cbdSFelipe Balbi } 51172256cbdSFelipe Balbi 51272256cbdSFelipe Balbi static void serial_omap_rdi(struct uart_omap_port *up, unsigned int lsr) 51372256cbdSFelipe Balbi { 51472256cbdSFelipe Balbi unsigned char ch = 0; 51572256cbdSFelipe Balbi unsigned int flag; 51672256cbdSFelipe Balbi 51772256cbdSFelipe Balbi if (!(lsr & UART_LSR_DR)) 51872256cbdSFelipe Balbi return; 51972256cbdSFelipe Balbi 52072256cbdSFelipe Balbi ch = serial_in(up, UART_RX); 52172256cbdSFelipe Balbi flag = TTY_NORMAL; 52272256cbdSFelipe Balbi up->port.icount.rx++; 52372256cbdSFelipe Balbi 52472256cbdSFelipe Balbi if (uart_handle_sysrq_char(&up->port, ch)) 52572256cbdSFelipe Balbi return; 52672256cbdSFelipe Balbi 52772256cbdSFelipe Balbi uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag); 52872256cbdSFelipe Balbi } 52972256cbdSFelipe Balbi 530ab4382d2SGreg Kroah-Hartman /** 531ab4382d2SGreg Kroah-Hartman * serial_omap_irq() - This handles the interrupt from one port 532ab4382d2SGreg Kroah-Hartman * @irq: uart port irq number 533ab4382d2SGreg Kroah-Hartman * @dev_id: uart port info 534ab4382d2SGreg Kroah-Hartman */ 53552c5513dSFelipe Balbi static irqreturn_t serial_omap_irq(int irq, void *dev_id) 536ab4382d2SGreg Kroah-Hartman { 537ab4382d2SGreg Kroah-Hartman struct uart_omap_port *up = dev_id; 538ab4382d2SGreg Kroah-Hartman unsigned int iir, lsr; 53981b75aefSFelipe Balbi unsigned int type; 5407b013e44SGreg Kroah-Hartman irqreturn_t ret = IRQ_NONE; 54172256cbdSFelipe Balbi int max_count = 256; 542ab4382d2SGreg Kroah-Hartman 5436c3a30c7SFelipe Balbi spin_lock(&up->port.lock); 54481b75aefSFelipe Balbi pm_runtime_get_sync(up->dev); 54572256cbdSFelipe Balbi 54672256cbdSFelipe Balbi do { 54781b75aefSFelipe Balbi iir = serial_in(up, UART_IIR); 54881b75aefSFelipe Balbi if (iir & UART_IIR_NO_INT) 54972256cbdSFelipe Balbi break; 55081b75aefSFelipe Balbi 5517b013e44SGreg Kroah-Hartman ret = IRQ_HANDLED; 552ab4382d2SGreg Kroah-Hartman lsr = serial_in(up, UART_LSR); 55381b75aefSFelipe Balbi 55481b75aefSFelipe Balbi /* extract IRQ type from IIR register */ 55581b75aefSFelipe Balbi type = iir & 0x3e; 55681b75aefSFelipe Balbi 55781b75aefSFelipe Balbi switch (type) { 55881b75aefSFelipe Balbi case UART_IIR_MSI: 55981b75aefSFelipe Balbi check_modem_status(up); 56081b75aefSFelipe Balbi break; 56181b75aefSFelipe Balbi case UART_IIR_THRI: 562bf63a086SFelipe Balbi transmit_chars(up, lsr); 56381b75aefSFelipe Balbi break; 56472256cbdSFelipe Balbi case UART_IIR_RX_TIMEOUT: 56572256cbdSFelipe Balbi /* FALLTHROUGH */ 56681b75aefSFelipe Balbi case UART_IIR_RDI: 56772256cbdSFelipe Balbi serial_omap_rdi(up, lsr); 56881b75aefSFelipe Balbi break; 56981b75aefSFelipe Balbi case UART_IIR_RLSI: 57072256cbdSFelipe Balbi serial_omap_rlsi(up, lsr); 57181b75aefSFelipe Balbi break; 57281b75aefSFelipe Balbi case UART_IIR_CTS_RTS_DSR: 57372256cbdSFelipe Balbi /* simply try again */ 57472256cbdSFelipe Balbi break; 57581b75aefSFelipe Balbi case UART_IIR_XOFF: 57681b75aefSFelipe Balbi /* FALLTHROUGH */ 57781b75aefSFelipe Balbi default: 57881b75aefSFelipe Balbi break; 579ab4382d2SGreg Kroah-Hartman } 58072256cbdSFelipe Balbi } while (!(iir & UART_IIR_NO_INT) && max_count--); 581ab4382d2SGreg Kroah-Hartman 5826c3a30c7SFelipe Balbi spin_unlock(&up->port.lock); 58372256cbdSFelipe Balbi 5842e124b4aSJiri Slaby tty_flip_buffer_push(&up->port.state->port); 58572256cbdSFelipe Balbi 586d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 587d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 588ab4382d2SGreg Kroah-Hartman up->port_activity = jiffies; 58981b75aefSFelipe Balbi 5907b013e44SGreg Kroah-Hartman return ret; 591ab4382d2SGreg Kroah-Hartman } 592ab4382d2SGreg Kroah-Hartman 593ab4382d2SGreg Kroah-Hartman static unsigned int serial_omap_tx_empty(struct uart_port *port) 594ab4382d2SGreg Kroah-Hartman { 595c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 596ab4382d2SGreg Kroah-Hartman unsigned long flags = 0; 597ab4382d2SGreg Kroah-Hartman unsigned int ret = 0; 598ab4382d2SGreg Kroah-Hartman 599d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 600ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_tx_empty+%d\n", up->port.line); 601ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags); 602ab4382d2SGreg Kroah-Hartman ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0; 603ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags); 604660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 605660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 606ab4382d2SGreg Kroah-Hartman return ret; 607ab4382d2SGreg Kroah-Hartman } 608ab4382d2SGreg Kroah-Hartman 609ab4382d2SGreg Kroah-Hartman static unsigned int serial_omap_get_mctrl(struct uart_port *port) 610ab4382d2SGreg Kroah-Hartman { 611c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 612514f31d1SShubhrajyoti D unsigned int status; 613ab4382d2SGreg Kroah-Hartman unsigned int ret = 0; 614ab4382d2SGreg Kroah-Hartman 615d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 616ab4382d2SGreg Kroah-Hartman status = check_modem_status(up); 617660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 618660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 619fcdca757SGovindraj.R 620ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_get_mctrl+%d\n", up->port.line); 621ab4382d2SGreg Kroah-Hartman 622ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DCD) 623ab4382d2SGreg Kroah-Hartman ret |= TIOCM_CAR; 624ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_RI) 625ab4382d2SGreg Kroah-Hartman ret |= TIOCM_RNG; 626ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DSR) 627ab4382d2SGreg Kroah-Hartman ret |= TIOCM_DSR; 628ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_CTS) 629ab4382d2SGreg Kroah-Hartman ret |= TIOCM_CTS; 630ab4382d2SGreg Kroah-Hartman return ret; 631ab4382d2SGreg Kroah-Hartman } 632ab4382d2SGreg Kroah-Hartman 633ab4382d2SGreg Kroah-Hartman static void serial_omap_set_mctrl(struct uart_port *port, unsigned int mctrl) 634ab4382d2SGreg Kroah-Hartman { 635c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 6369363f8faSRussell King unsigned char mcr = 0, old_mcr; 637ab4382d2SGreg Kroah-Hartman 638ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_set_mctrl+%d\n", up->port.line); 639ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_RTS) 640ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_RTS; 641ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_DTR) 642ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_DTR; 643ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_OUT1) 644ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_OUT1; 645ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_OUT2) 646ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_OUT2; 647ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_LOOP) 648ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_LOOP; 649ab4382d2SGreg Kroah-Hartman 650d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 6519363f8faSRussell King old_mcr = serial_in(up, UART_MCR); 6529363f8faSRussell King old_mcr &= ~(UART_MCR_LOOP | UART_MCR_OUT2 | UART_MCR_OUT1 | 6539363f8faSRussell King UART_MCR_DTR | UART_MCR_RTS); 6549363f8faSRussell King up->mcr = old_mcr | mcr; 655c538d20cSGovindraj.R serial_out(up, UART_MCR, up->mcr); 656660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 657660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 6589574f36fSNeilBrown 6599574f36fSNeilBrown if (gpio_is_valid(up->DTR_gpio) && 6609574f36fSNeilBrown !!(mctrl & TIOCM_DTR) != up->DTR_active) { 6619574f36fSNeilBrown up->DTR_active = !up->DTR_active; 6629574f36fSNeilBrown if (gpio_cansleep(up->DTR_gpio)) 6639574f36fSNeilBrown schedule_work(&up->qos_work); 6649574f36fSNeilBrown else 6659574f36fSNeilBrown gpio_set_value(up->DTR_gpio, 6669574f36fSNeilBrown up->DTR_active != up->DTR_inverted); 6679574f36fSNeilBrown } 668ab4382d2SGreg Kroah-Hartman } 669ab4382d2SGreg Kroah-Hartman 670ab4382d2SGreg Kroah-Hartman static void serial_omap_break_ctl(struct uart_port *port, int break_state) 671ab4382d2SGreg Kroah-Hartman { 672c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 673ab4382d2SGreg Kroah-Hartman unsigned long flags = 0; 674ab4382d2SGreg Kroah-Hartman 675ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_break_ctl+%d\n", up->port.line); 676d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 677ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags); 678ab4382d2SGreg Kroah-Hartman if (break_state == -1) 679ab4382d2SGreg Kroah-Hartman up->lcr |= UART_LCR_SBC; 680ab4382d2SGreg Kroah-Hartman else 681ab4382d2SGreg Kroah-Hartman up->lcr &= ~UART_LCR_SBC; 682ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, up->lcr); 683ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags); 684660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 685660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 686ab4382d2SGreg Kroah-Hartman } 687ab4382d2SGreg Kroah-Hartman 688ab4382d2SGreg Kroah-Hartman static int serial_omap_startup(struct uart_port *port) 689ab4382d2SGreg Kroah-Hartman { 690c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 691ab4382d2SGreg Kroah-Hartman unsigned long flags = 0; 692ab4382d2SGreg Kroah-Hartman int retval; 693ab4382d2SGreg Kroah-Hartman 694ab4382d2SGreg Kroah-Hartman /* 695ab4382d2SGreg Kroah-Hartman * Allocate the IRQ 696ab4382d2SGreg Kroah-Hartman */ 697ab4382d2SGreg Kroah-Hartman retval = request_irq(up->port.irq, serial_omap_irq, up->port.irqflags, 698ab4382d2SGreg Kroah-Hartman up->name, up); 699ab4382d2SGreg Kroah-Hartman if (retval) 700ab4382d2SGreg Kroah-Hartman return retval; 701ab4382d2SGreg Kroah-Hartman 702ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_startup+%d\n", up->port.line); 703ab4382d2SGreg Kroah-Hartman 704d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 705ab4382d2SGreg Kroah-Hartman /* 706ab4382d2SGreg Kroah-Hartman * Clear the FIFO buffers and disable them. 707ab4382d2SGreg Kroah-Hartman * (they will be reenabled in set_termios()) 708ab4382d2SGreg Kroah-Hartman */ 709ab4382d2SGreg Kroah-Hartman serial_omap_clear_fifos(up); 710ab4382d2SGreg Kroah-Hartman /* For Hardware flow control */ 711ab4382d2SGreg Kroah-Hartman serial_out(up, UART_MCR, UART_MCR_RTS); 712ab4382d2SGreg Kroah-Hartman 713ab4382d2SGreg Kroah-Hartman /* 714ab4382d2SGreg Kroah-Hartman * Clear the interrupt registers. 715ab4382d2SGreg Kroah-Hartman */ 716ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_LSR); 717ab4382d2SGreg Kroah-Hartman if (serial_in(up, UART_LSR) & UART_LSR_DR) 718ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_RX); 719ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_IIR); 720ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_MSR); 721ab4382d2SGreg Kroah-Hartman 722ab4382d2SGreg Kroah-Hartman /* 723ab4382d2SGreg Kroah-Hartman * Now, initialize the UART 724ab4382d2SGreg Kroah-Hartman */ 725ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_WLEN8); 726ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags); 727ab4382d2SGreg Kroah-Hartman /* 728ab4382d2SGreg Kroah-Hartman * Most PC uarts need OUT2 raised to enable interrupts. 729ab4382d2SGreg Kroah-Hartman */ 730ab4382d2SGreg Kroah-Hartman up->port.mctrl |= TIOCM_OUT2; 731ab4382d2SGreg Kroah-Hartman serial_omap_set_mctrl(&up->port, up->port.mctrl); 732ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags); 733ab4382d2SGreg Kroah-Hartman 734ab4382d2SGreg Kroah-Hartman up->msr_saved_flags = 0; 735ab4382d2SGreg Kroah-Hartman /* 736ab4382d2SGreg Kroah-Hartman * Finally, enable interrupts. Note: Modem status interrupts 737ab4382d2SGreg Kroah-Hartman * are set via set_termios(), which will be occurring imminently 738ab4382d2SGreg Kroah-Hartman * anyway, so we don't enable them here. 739ab4382d2SGreg Kroah-Hartman */ 740ab4382d2SGreg Kroah-Hartman up->ier = UART_IER_RLSI | UART_IER_RDI; 741ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 742ab4382d2SGreg Kroah-Hartman 74378841462SJarkko Nikula /* Enable module level wake up */ 744f64ffda6SGovindraj.R up->wer = OMAP_UART_WER_MOD_WKUP; 745f64ffda6SGovindraj.R if (up->features & OMAP_UART_WER_HAS_TX_WAKEUP) 746f64ffda6SGovindraj.R up->wer |= OMAP_UART_TX_WAKEUP_EN; 747f64ffda6SGovindraj.R 748f64ffda6SGovindraj.R serial_out(up, UART_OMAP_WER, up->wer); 74978841462SJarkko Nikula 750d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 751d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 752ab4382d2SGreg Kroah-Hartman up->port_activity = jiffies; 753ab4382d2SGreg Kroah-Hartman return 0; 754ab4382d2SGreg Kroah-Hartman } 755ab4382d2SGreg Kroah-Hartman 756ab4382d2SGreg Kroah-Hartman static void serial_omap_shutdown(struct uart_port *port) 757ab4382d2SGreg Kroah-Hartman { 758c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 759ab4382d2SGreg Kroah-Hartman unsigned long flags = 0; 760ab4382d2SGreg Kroah-Hartman 761ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_shutdown+%d\n", up->port.line); 762fcdca757SGovindraj.R 763d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 764ab4382d2SGreg Kroah-Hartman /* 765ab4382d2SGreg Kroah-Hartman * Disable interrupts from this port 766ab4382d2SGreg Kroah-Hartman */ 767ab4382d2SGreg Kroah-Hartman up->ier = 0; 768ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, 0); 769ab4382d2SGreg Kroah-Hartman 770ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags); 771ab4382d2SGreg Kroah-Hartman up->port.mctrl &= ~TIOCM_OUT2; 772ab4382d2SGreg Kroah-Hartman serial_omap_set_mctrl(&up->port, up->port.mctrl); 773ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags); 774ab4382d2SGreg Kroah-Hartman 775ab4382d2SGreg Kroah-Hartman /* 776ab4382d2SGreg Kroah-Hartman * Disable break condition and FIFOs 777ab4382d2SGreg Kroah-Hartman */ 778ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC); 779ab4382d2SGreg Kroah-Hartman serial_omap_clear_fifos(up); 780ab4382d2SGreg Kroah-Hartman 781ab4382d2SGreg Kroah-Hartman /* 782ab4382d2SGreg Kroah-Hartman * Read data port to reset things, and then free the irq 783ab4382d2SGreg Kroah-Hartman */ 784ab4382d2SGreg Kroah-Hartman if (serial_in(up, UART_LSR) & UART_LSR_DR) 785ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_RX); 786fcdca757SGovindraj.R 787660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 788660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 789ab4382d2SGreg Kroah-Hartman free_irq(up->port.irq, up); 790ab4382d2SGreg Kroah-Hartman } 791ab4382d2SGreg Kroah-Hartman 7922fd14964SGovindraj.R static void serial_omap_uart_qos_work(struct work_struct *work) 7932fd14964SGovindraj.R { 7942fd14964SGovindraj.R struct uart_omap_port *up = container_of(work, struct uart_omap_port, 7952fd14964SGovindraj.R qos_work); 7962fd14964SGovindraj.R 7972fd14964SGovindraj.R pm_qos_update_request(&up->pm_qos_request, up->latency); 7989574f36fSNeilBrown if (gpio_is_valid(up->DTR_gpio)) 7999574f36fSNeilBrown gpio_set_value_cansleep(up->DTR_gpio, 8009574f36fSNeilBrown up->DTR_active != up->DTR_inverted); 8012fd14964SGovindraj.R } 8022fd14964SGovindraj.R 803ab4382d2SGreg Kroah-Hartman static void 804ab4382d2SGreg Kroah-Hartman serial_omap_set_termios(struct uart_port *port, struct ktermios *termios, 805ab4382d2SGreg Kroah-Hartman struct ktermios *old) 806ab4382d2SGreg Kroah-Hartman { 807c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 808ab4382d2SGreg Kroah-Hartman unsigned char cval = 0; 809ab4382d2SGreg Kroah-Hartman unsigned long flags = 0; 810ab4382d2SGreg Kroah-Hartman unsigned int baud, quot; 811ab4382d2SGreg Kroah-Hartman 812ab4382d2SGreg Kroah-Hartman switch (termios->c_cflag & CSIZE) { 813ab4382d2SGreg Kroah-Hartman case CS5: 814ab4382d2SGreg Kroah-Hartman cval = UART_LCR_WLEN5; 815ab4382d2SGreg Kroah-Hartman break; 816ab4382d2SGreg Kroah-Hartman case CS6: 817ab4382d2SGreg Kroah-Hartman cval = UART_LCR_WLEN6; 818ab4382d2SGreg Kroah-Hartman break; 819ab4382d2SGreg Kroah-Hartman case CS7: 820ab4382d2SGreg Kroah-Hartman cval = UART_LCR_WLEN7; 821ab4382d2SGreg Kroah-Hartman break; 822ab4382d2SGreg Kroah-Hartman default: 823ab4382d2SGreg Kroah-Hartman case CS8: 824ab4382d2SGreg Kroah-Hartman cval = UART_LCR_WLEN8; 825ab4382d2SGreg Kroah-Hartman break; 826ab4382d2SGreg Kroah-Hartman } 827ab4382d2SGreg Kroah-Hartman 828ab4382d2SGreg Kroah-Hartman if (termios->c_cflag & CSTOPB) 829ab4382d2SGreg Kroah-Hartman cval |= UART_LCR_STOP; 830ab4382d2SGreg Kroah-Hartman if (termios->c_cflag & PARENB) 831ab4382d2SGreg Kroah-Hartman cval |= UART_LCR_PARITY; 832ab4382d2SGreg Kroah-Hartman if (!(termios->c_cflag & PARODD)) 833ab4382d2SGreg Kroah-Hartman cval |= UART_LCR_EPAR; 834fdbc7353SEnric Balletbo i Serra if (termios->c_cflag & CMSPAR) 835fdbc7353SEnric Balletbo i Serra cval |= UART_LCR_SPAR; 836ab4382d2SGreg Kroah-Hartman 837ab4382d2SGreg Kroah-Hartman /* 838ab4382d2SGreg Kroah-Hartman * Ask the core to calculate the divisor for us. 839ab4382d2SGreg Kroah-Hartman */ 840ab4382d2SGreg Kroah-Hartman 841ab4382d2SGreg Kroah-Hartman baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/13); 842ab4382d2SGreg Kroah-Hartman quot = serial_omap_get_divisor(port, baud); 843ab4382d2SGreg Kroah-Hartman 8442fd14964SGovindraj.R /* calculate wakeup latency constraint */ 84519723452SPaul Walmsley up->calc_latency = (USEC_PER_SEC * up->port.fifosize) / (baud / 8); 8462fd14964SGovindraj.R up->latency = up->calc_latency; 8472fd14964SGovindraj.R schedule_work(&up->qos_work); 8482fd14964SGovindraj.R 849c538d20cSGovindraj.R up->dll = quot & 0xff; 850c538d20cSGovindraj.R up->dlh = quot >> 8; 851c538d20cSGovindraj.R up->mdr1 = UART_OMAP_MDR1_DISABLE; 852c538d20cSGovindraj.R 853ab4382d2SGreg Kroah-Hartman up->fcr = UART_FCR_R_TRIG_01 | UART_FCR_T_TRIG_01 | 854ab4382d2SGreg Kroah-Hartman UART_FCR_ENABLE_FIFO; 855ab4382d2SGreg Kroah-Hartman 856ab4382d2SGreg Kroah-Hartman /* 857ab4382d2SGreg Kroah-Hartman * Ok, we're now changing the port state. Do it with 858ab4382d2SGreg Kroah-Hartman * interrupts disabled. 859ab4382d2SGreg Kroah-Hartman */ 860d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 861ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags); 862ab4382d2SGreg Kroah-Hartman 863ab4382d2SGreg Kroah-Hartman /* 864ab4382d2SGreg Kroah-Hartman * Update the per-port timeout. 865ab4382d2SGreg Kroah-Hartman */ 866ab4382d2SGreg Kroah-Hartman uart_update_timeout(port, termios->c_cflag, baud); 867ab4382d2SGreg Kroah-Hartman 868ab4382d2SGreg Kroah-Hartman up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; 869ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & INPCK) 870ab4382d2SGreg Kroah-Hartman up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE; 871ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & (BRKINT | PARMRK)) 872ab4382d2SGreg Kroah-Hartman up->port.read_status_mask |= UART_LSR_BI; 873ab4382d2SGreg Kroah-Hartman 874ab4382d2SGreg Kroah-Hartman /* 875ab4382d2SGreg Kroah-Hartman * Characters to ignore 876ab4382d2SGreg Kroah-Hartman */ 877ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask = 0; 878ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IGNPAR) 879ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE; 880ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IGNBRK) { 881ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask |= UART_LSR_BI; 882ab4382d2SGreg Kroah-Hartman /* 883ab4382d2SGreg Kroah-Hartman * If we're ignoring parity and break indicators, 884ab4382d2SGreg Kroah-Hartman * ignore overruns too (for real raw support). 885ab4382d2SGreg Kroah-Hartman */ 886ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IGNPAR) 887ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask |= UART_LSR_OE; 888ab4382d2SGreg Kroah-Hartman } 889ab4382d2SGreg Kroah-Hartman 890ab4382d2SGreg Kroah-Hartman /* 891ab4382d2SGreg Kroah-Hartman * ignore all characters if CREAD is not set 892ab4382d2SGreg Kroah-Hartman */ 893ab4382d2SGreg Kroah-Hartman if ((termios->c_cflag & CREAD) == 0) 894ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask |= UART_LSR_DR; 895ab4382d2SGreg Kroah-Hartman 896ab4382d2SGreg Kroah-Hartman /* 897ab4382d2SGreg Kroah-Hartman * Modem status interrupts 898ab4382d2SGreg Kroah-Hartman */ 899ab4382d2SGreg Kroah-Hartman up->ier &= ~UART_IER_MSI; 900ab4382d2SGreg Kroah-Hartman if (UART_ENABLE_MS(&up->port, termios->c_cflag)) 901ab4382d2SGreg Kroah-Hartman up->ier |= UART_IER_MSI; 902ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 903ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, cval); /* reset DLAB */ 904c538d20cSGovindraj.R up->lcr = cval; 9051776fd05SAlexey Pelykh up->scr = 0; 906ab4382d2SGreg Kroah-Hartman 907ab4382d2SGreg Kroah-Hartman /* FIFOs and DMA Settings */ 908ab4382d2SGreg Kroah-Hartman 909ab4382d2SGreg Kroah-Hartman /* FCR can be changed only when the 910ab4382d2SGreg Kroah-Hartman * baud clock is not running 911ab4382d2SGreg Kroah-Hartman * DLL_REG and DLH_REG set to 0. 912ab4382d2SGreg Kroah-Hartman */ 913ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 914ab4382d2SGreg Kroah-Hartman serial_out(up, UART_DLL, 0); 915ab4382d2SGreg Kroah-Hartman serial_out(up, UART_DLM, 0); 916ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0); 917ab4382d2SGreg Kroah-Hartman 918ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 919ab4382d2SGreg Kroah-Hartman 92008bd4903SRussell King up->efr = serial_in(up, UART_EFR) & ~UART_EFR_ECB; 921d864c03bSRussell King up->efr &= ~UART_EFR_SCD; 922ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); 923ab4382d2SGreg Kroah-Hartman 924ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 92508bd4903SRussell King up->mcr = serial_in(up, UART_MCR) & ~UART_MCR_TCRTLR; 926ab4382d2SGreg Kroah-Hartman serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR); 927ab4382d2SGreg Kroah-Hartman /* FIFO ENABLE, DMA MODE */ 9280ba5f668SPaul Walmsley 9291f663966SAlexey Pelykh up->scr |= OMAP_UART_SCR_RX_TRIG_GRANU1_MASK; 9301f663966SAlexey Pelykh /* 9311f663966SAlexey Pelykh * NOTE: Setting OMAP_UART_SCR_RX_TRIG_GRANU1_MASK 9321f663966SAlexey Pelykh * sets Enables the granularity of 1 for TRIGGER RX 9331f663966SAlexey Pelykh * level. Along with setting RX FIFO trigger level 9341f663966SAlexey Pelykh * to 1 (as noted below, 16 characters) and TLR[3:0] 9351f663966SAlexey Pelykh * to zero this will result RX FIFO threshold level 9361f663966SAlexey Pelykh * to 1 character, instead of 16 as noted in comment 9371f663966SAlexey Pelykh * below. 9381f663966SAlexey Pelykh */ 9391f663966SAlexey Pelykh 9406721ab7fSFelipe Balbi /* Set receive FIFO threshold to 16 characters and 9416721ab7fSFelipe Balbi * transmit FIFO threshold to 16 spaces 9426721ab7fSFelipe Balbi */ 9430ba5f668SPaul Walmsley up->fcr &= ~OMAP_UART_FCR_RX_FIFO_TRIG_MASK; 9446721ab7fSFelipe Balbi up->fcr &= ~OMAP_UART_FCR_TX_FIFO_TRIG_MASK; 9456721ab7fSFelipe Balbi up->fcr |= UART_FCR6_R_TRIGGER_16 | UART_FCR6_T_TRIGGER_24 | 9466721ab7fSFelipe Balbi UART_FCR_ENABLE_FIFO; 9478a74e9ffSGreg Kroah-Hartman 9480ba5f668SPaul Walmsley serial_out(up, UART_FCR, up->fcr); 9490ba5f668SPaul Walmsley serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 9500ba5f668SPaul Walmsley 951c538d20cSGovindraj.R serial_out(up, UART_OMAP_SCR, up->scr); 952c538d20cSGovindraj.R 95308bd4903SRussell King /* Reset UART_MCR_TCRTLR: this must be done with the EFR_ECB bit set */ 954ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 955ab4382d2SGreg Kroah-Hartman serial_out(up, UART_MCR, up->mcr); 95608bd4903SRussell King serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 95708bd4903SRussell King serial_out(up, UART_EFR, up->efr); 95808bd4903SRussell King serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 959ab4382d2SGreg Kroah-Hartman 960ab4382d2SGreg Kroah-Hartman /* Protocol, Baud Rate, and Interrupt Settings */ 961ab4382d2SGreg Kroah-Hartman 96294734749SGovindraj.R if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) 96394734749SGovindraj.R serial_omap_mdr1_errataset(up, up->mdr1); 96494734749SGovindraj.R else 965c538d20cSGovindraj.R serial_out(up, UART_OMAP_MDR1, up->mdr1); 96694734749SGovindraj.R 967ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 968ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); 969ab4382d2SGreg Kroah-Hartman 970ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0); 971ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, 0); 972ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 973ab4382d2SGreg Kroah-Hartman 974c538d20cSGovindraj.R serial_out(up, UART_DLL, up->dll); /* LS of divisor */ 975c538d20cSGovindraj.R serial_out(up, UART_DLM, up->dlh); /* MS of divisor */ 976ab4382d2SGreg Kroah-Hartman 977ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0); 978ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 979ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 980ab4382d2SGreg Kroah-Hartman 981ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, up->efr); 982ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, cval); 983ab4382d2SGreg Kroah-Hartman 9845fe21236SAlexey Pelykh if (!serial_omap_baud_is_mode16(port, baud)) 985c538d20cSGovindraj.R up->mdr1 = UART_OMAP_MDR1_13X_MODE; 986ab4382d2SGreg Kroah-Hartman else 987c538d20cSGovindraj.R up->mdr1 = UART_OMAP_MDR1_16X_MODE; 988c538d20cSGovindraj.R 98994734749SGovindraj.R if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) 99094734749SGovindraj.R serial_omap_mdr1_errataset(up, up->mdr1); 99194734749SGovindraj.R else 992c538d20cSGovindraj.R serial_out(up, UART_OMAP_MDR1, up->mdr1); 993ab4382d2SGreg Kroah-Hartman 994c533e51bSRussell King /* Configure flow control */ 99508bd4903SRussell King serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 996ab4382d2SGreg Kroah-Hartman 997c533e51bSRussell King /* XON1/XOFF1 accessible mode B, TCRTLR=0, ECB=0 */ 998c533e51bSRussell King serial_out(up, UART_XON1, termios->c_cc[VSTART]); 999c533e51bSRussell King serial_out(up, UART_XOFF1, termios->c_cc[VSTOP]); 1000c533e51bSRussell King 1001c533e51bSRussell King /* Enable access to TCR/TLR */ 100208bd4903SRussell King serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); 1003ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 1004ab4382d2SGreg Kroah-Hartman serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR); 1005ab4382d2SGreg Kroah-Hartman 1006ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TI752_TCR, OMAP_UART_TCR_TRIG); 100708bd4903SRussell King 1008c7d059caSRussell King if (termios->c_cflag & CRTSCTS && up->port.flags & UPF_HARD_FLOW) { 100908bd4903SRussell King /* Enable AUTORTS and AUTOCTS */ 101008bd4903SRussell King up->efr |= UART_EFR_CTS | UART_EFR_RTS; 101108bd4903SRussell King 10121fe8aa88SRussell King /* Ensure MCR RTS is asserted */ 10131fe8aa88SRussell King up->mcr |= UART_MCR_RTS; 10140d5b1663SRussell King } else { 10150d5b1663SRussell King /* Disable AUTORTS and AUTOCTS */ 10160d5b1663SRussell King up->efr &= ~(UART_EFR_CTS | UART_EFR_RTS); 1017ab4382d2SGreg Kroah-Hartman } 1018ab4382d2SGreg Kroah-Hartman 101901d70bb3SRussell King if (up->port.flags & UPF_SOFT_FLOW) { 102001d70bb3SRussell King /* clear SW control mode bits */ 102101d70bb3SRussell King up->efr &= OMAP_UART_SW_CLR; 102201d70bb3SRussell King 102301d70bb3SRussell King /* 102401d70bb3SRussell King * IXON Flag: 102501d70bb3SRussell King * Enable XON/XOFF flow control on input. 102601d70bb3SRussell King * Receiver compares XON1, XOFF1. 102701d70bb3SRussell King */ 10283af08bd7SRussell King if (termios->c_iflag & IXON) 102901d70bb3SRussell King up->efr |= OMAP_UART_SW_RX; 103001d70bb3SRussell King 103101d70bb3SRussell King /* 10323af08bd7SRussell King * IXOFF Flag: 10333af08bd7SRussell King * Enable XON/XOFF flow control on output. 10343af08bd7SRussell King * Transmit XON1, XOFF1 10353af08bd7SRussell King */ 10363af08bd7SRussell King if (termios->c_iflag & IXOFF) 10373af08bd7SRussell King up->efr |= OMAP_UART_SW_TX; 10383af08bd7SRussell King 10393af08bd7SRussell King /* 104001d70bb3SRussell King * IXANY Flag: 104101d70bb3SRussell King * Enable any character to restart output. 104201d70bb3SRussell King * Operation resumes after receiving any 104301d70bb3SRussell King * character after recognition of the XOFF character 104401d70bb3SRussell King */ 104501d70bb3SRussell King if (termios->c_iflag & IXANY) 104601d70bb3SRussell King up->mcr |= UART_MCR_XONANY; 104701d70bb3SRussell King else 104801d70bb3SRussell King up->mcr &= ~UART_MCR_XONANY; 104918f360f8SRussell King } 1050c7d059caSRussell King serial_out(up, UART_MCR, up->mcr); 105101d70bb3SRussell King serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 105201d70bb3SRussell King serial_out(up, UART_EFR, up->efr); 105301d70bb3SRussell King serial_out(up, UART_LCR, up->lcr); 1054ab4382d2SGreg Kroah-Hartman 1055ab4382d2SGreg Kroah-Hartman serial_omap_set_mctrl(&up->port, up->port.mctrl); 1056ab4382d2SGreg Kroah-Hartman 1057ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags); 1058660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 1059660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 1060ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_set_termios+%d\n", up->port.line); 1061ab4382d2SGreg Kroah-Hartman } 1062ab4382d2SGreg Kroah-Hartman 10639727faf4SFelipe Balbi static int serial_omap_set_wake(struct uart_port *port, unsigned int state) 10649727faf4SFelipe Balbi { 10659727faf4SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 10669727faf4SFelipe Balbi 10679727faf4SFelipe Balbi serial_omap_enable_wakeup(up, state); 10689727faf4SFelipe Balbi 10699727faf4SFelipe Balbi return 0; 10709727faf4SFelipe Balbi } 10719727faf4SFelipe Balbi 1072ab4382d2SGreg Kroah-Hartman static void 1073ab4382d2SGreg Kroah-Hartman serial_omap_pm(struct uart_port *port, unsigned int state, 1074ab4382d2SGreg Kroah-Hartman unsigned int oldstate) 1075ab4382d2SGreg Kroah-Hartman { 1076c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 1077ab4382d2SGreg Kroah-Hartman unsigned char efr; 1078ab4382d2SGreg Kroah-Hartman 1079ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_pm+%d\n", up->port.line); 1080fcdca757SGovindraj.R 1081d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 1082ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 1083ab4382d2SGreg Kroah-Hartman efr = serial_in(up, UART_EFR); 1084ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, efr | UART_EFR_ECB); 1085ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0); 1086ab4382d2SGreg Kroah-Hartman 1087ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, (state != 0) ? UART_IERX_SLEEP : 0); 1088ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 1089ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, efr); 1090ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0); 1091fcdca757SGovindraj.R 1092d8ee4ea6SFelipe Balbi if (!device_may_wakeup(up->dev)) { 1093fcdca757SGovindraj.R if (!state) 1094d8ee4ea6SFelipe Balbi pm_runtime_forbid(up->dev); 1095fcdca757SGovindraj.R else 1096d8ee4ea6SFelipe Balbi pm_runtime_allow(up->dev); 1097fcdca757SGovindraj.R } 1098fcdca757SGovindraj.R 1099660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 1100660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 1101ab4382d2SGreg Kroah-Hartman } 1102ab4382d2SGreg Kroah-Hartman 1103ab4382d2SGreg Kroah-Hartman static void serial_omap_release_port(struct uart_port *port) 1104ab4382d2SGreg Kroah-Hartman { 1105ab4382d2SGreg Kroah-Hartman dev_dbg(port->dev, "serial_omap_release_port+\n"); 1106ab4382d2SGreg Kroah-Hartman } 1107ab4382d2SGreg Kroah-Hartman 1108ab4382d2SGreg Kroah-Hartman static int serial_omap_request_port(struct uart_port *port) 1109ab4382d2SGreg Kroah-Hartman { 1110ab4382d2SGreg Kroah-Hartman dev_dbg(port->dev, "serial_omap_request_port+\n"); 1111ab4382d2SGreg Kroah-Hartman return 0; 1112ab4382d2SGreg Kroah-Hartman } 1113ab4382d2SGreg Kroah-Hartman 1114ab4382d2SGreg Kroah-Hartman static void serial_omap_config_port(struct uart_port *port, int flags) 1115ab4382d2SGreg Kroah-Hartman { 1116c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 1117ab4382d2SGreg Kroah-Hartman 1118ab4382d2SGreg Kroah-Hartman dev_dbg(up->port.dev, "serial_omap_config_port+%d\n", 1119ba77433dSRajendra Nayak up->port.line); 1120ab4382d2SGreg Kroah-Hartman up->port.type = PORT_OMAP; 11213af08bd7SRussell King up->port.flags |= UPF_SOFT_FLOW | UPF_HARD_FLOW; 1122ab4382d2SGreg Kroah-Hartman } 1123ab4382d2SGreg Kroah-Hartman 1124ab4382d2SGreg Kroah-Hartman static int 1125ab4382d2SGreg Kroah-Hartman serial_omap_verify_port(struct uart_port *port, struct serial_struct *ser) 1126ab4382d2SGreg Kroah-Hartman { 1127ab4382d2SGreg Kroah-Hartman /* we don't want the core code to modify any port params */ 1128ab4382d2SGreg Kroah-Hartman dev_dbg(port->dev, "serial_omap_verify_port+\n"); 1129ab4382d2SGreg Kroah-Hartman return -EINVAL; 1130ab4382d2SGreg Kroah-Hartman } 1131ab4382d2SGreg Kroah-Hartman 1132ab4382d2SGreg Kroah-Hartman static const char * 1133ab4382d2SGreg Kroah-Hartman serial_omap_type(struct uart_port *port) 1134ab4382d2SGreg Kroah-Hartman { 1135c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 1136ab4382d2SGreg Kroah-Hartman 1137ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_type+%d\n", up->port.line); 1138ab4382d2SGreg Kroah-Hartman return up->name; 1139ab4382d2SGreg Kroah-Hartman } 1140ab4382d2SGreg Kroah-Hartman 1141ab4382d2SGreg Kroah-Hartman #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE) 1142ab4382d2SGreg Kroah-Hartman 1143ab4382d2SGreg Kroah-Hartman static inline void wait_for_xmitr(struct uart_omap_port *up) 1144ab4382d2SGreg Kroah-Hartman { 1145ab4382d2SGreg Kroah-Hartman unsigned int status, tmout = 10000; 1146ab4382d2SGreg Kroah-Hartman 1147ab4382d2SGreg Kroah-Hartman /* Wait up to 10ms for the character(s) to be sent. */ 1148ab4382d2SGreg Kroah-Hartman do { 1149ab4382d2SGreg Kroah-Hartman status = serial_in(up, UART_LSR); 1150ab4382d2SGreg Kroah-Hartman 1151ab4382d2SGreg Kroah-Hartman if (status & UART_LSR_BI) 1152ab4382d2SGreg Kroah-Hartman up->lsr_break_flag = UART_LSR_BI; 1153ab4382d2SGreg Kroah-Hartman 1154ab4382d2SGreg Kroah-Hartman if (--tmout == 0) 1155ab4382d2SGreg Kroah-Hartman break; 1156ab4382d2SGreg Kroah-Hartman udelay(1); 1157ab4382d2SGreg Kroah-Hartman } while ((status & BOTH_EMPTY) != BOTH_EMPTY); 1158ab4382d2SGreg Kroah-Hartman 1159ab4382d2SGreg Kroah-Hartman /* Wait up to 1s for flow control if necessary */ 1160ab4382d2SGreg Kroah-Hartman if (up->port.flags & UPF_CONS_FLOW) { 1161ab4382d2SGreg Kroah-Hartman tmout = 1000000; 1162ab4382d2SGreg Kroah-Hartman for (tmout = 1000000; tmout; tmout--) { 1163ab4382d2SGreg Kroah-Hartman unsigned int msr = serial_in(up, UART_MSR); 1164ab4382d2SGreg Kroah-Hartman 1165ab4382d2SGreg Kroah-Hartman up->msr_saved_flags |= msr & MSR_SAVE_FLAGS; 1166ab4382d2SGreg Kroah-Hartman if (msr & UART_MSR_CTS) 1167ab4382d2SGreg Kroah-Hartman break; 1168ab4382d2SGreg Kroah-Hartman 1169ab4382d2SGreg Kroah-Hartman udelay(1); 1170ab4382d2SGreg Kroah-Hartman } 1171ab4382d2SGreg Kroah-Hartman } 1172ab4382d2SGreg Kroah-Hartman } 1173ab4382d2SGreg Kroah-Hartman 1174ab4382d2SGreg Kroah-Hartman #ifdef CONFIG_CONSOLE_POLL 1175ab4382d2SGreg Kroah-Hartman 1176ab4382d2SGreg Kroah-Hartman static void serial_omap_poll_put_char(struct uart_port *port, unsigned char ch) 1177ab4382d2SGreg Kroah-Hartman { 1178c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 1179fcdca757SGovindraj.R 1180d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 1181ab4382d2SGreg Kroah-Hartman wait_for_xmitr(up); 1182ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TX, ch); 1183660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 1184660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 1185ab4382d2SGreg Kroah-Hartman } 1186ab4382d2SGreg Kroah-Hartman 1187ab4382d2SGreg Kroah-Hartman static int serial_omap_poll_get_char(struct uart_port *port) 1188ab4382d2SGreg Kroah-Hartman { 1189c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 1190fcdca757SGovindraj.R unsigned int status; 1191ab4382d2SGreg Kroah-Hartman 1192d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 1193fcdca757SGovindraj.R status = serial_in(up, UART_LSR); 1194a6b19c33SFelipe Balbi if (!(status & UART_LSR_DR)) { 1195a6b19c33SFelipe Balbi status = NO_POLL_CHAR; 1196a6b19c33SFelipe Balbi goto out; 1197a6b19c33SFelipe Balbi } 1198ab4382d2SGreg Kroah-Hartman 1199fcdca757SGovindraj.R status = serial_in(up, UART_RX); 1200a6b19c33SFelipe Balbi 1201a6b19c33SFelipe Balbi out: 1202660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 1203660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 1204a6b19c33SFelipe Balbi 1205fcdca757SGovindraj.R return status; 1206ab4382d2SGreg Kroah-Hartman } 1207ab4382d2SGreg Kroah-Hartman 1208ab4382d2SGreg Kroah-Hartman #endif /* CONFIG_CONSOLE_POLL */ 1209ab4382d2SGreg Kroah-Hartman 1210ab4382d2SGreg Kroah-Hartman #ifdef CONFIG_SERIAL_OMAP_CONSOLE 1211ab4382d2SGreg Kroah-Hartman 121240477d0eSShubhrajyoti D static struct uart_omap_port *serial_omap_console_ports[OMAP_MAX_HSUART_PORTS]; 1213ab4382d2SGreg Kroah-Hartman 1214ab4382d2SGreg Kroah-Hartman static struct uart_driver serial_omap_reg; 1215ab4382d2SGreg Kroah-Hartman 1216ab4382d2SGreg Kroah-Hartman static void serial_omap_console_putchar(struct uart_port *port, int ch) 1217ab4382d2SGreg Kroah-Hartman { 1218c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 1219ab4382d2SGreg Kroah-Hartman 1220ab4382d2SGreg Kroah-Hartman wait_for_xmitr(up); 1221ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TX, ch); 1222ab4382d2SGreg Kroah-Hartman } 1223ab4382d2SGreg Kroah-Hartman 1224ab4382d2SGreg Kroah-Hartman static void 1225ab4382d2SGreg Kroah-Hartman serial_omap_console_write(struct console *co, const char *s, 1226ab4382d2SGreg Kroah-Hartman unsigned int count) 1227ab4382d2SGreg Kroah-Hartman { 1228ab4382d2SGreg Kroah-Hartman struct uart_omap_port *up = serial_omap_console_ports[co->index]; 1229ab4382d2SGreg Kroah-Hartman unsigned long flags; 1230ab4382d2SGreg Kroah-Hartman unsigned int ier; 1231ab4382d2SGreg Kroah-Hartman int locked = 1; 1232ab4382d2SGreg Kroah-Hartman 1233d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 1234fcdca757SGovindraj.R 1235ab4382d2SGreg Kroah-Hartman local_irq_save(flags); 1236ab4382d2SGreg Kroah-Hartman if (up->port.sysrq) 1237ab4382d2SGreg Kroah-Hartman locked = 0; 1238ab4382d2SGreg Kroah-Hartman else if (oops_in_progress) 1239ab4382d2SGreg Kroah-Hartman locked = spin_trylock(&up->port.lock); 1240ab4382d2SGreg Kroah-Hartman else 1241ab4382d2SGreg Kroah-Hartman spin_lock(&up->port.lock); 1242ab4382d2SGreg Kroah-Hartman 1243ab4382d2SGreg Kroah-Hartman /* 1244ab4382d2SGreg Kroah-Hartman * First save the IER then disable the interrupts 1245ab4382d2SGreg Kroah-Hartman */ 1246ab4382d2SGreg Kroah-Hartman ier = serial_in(up, UART_IER); 1247ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, 0); 1248ab4382d2SGreg Kroah-Hartman 1249ab4382d2SGreg Kroah-Hartman uart_console_write(&up->port, s, count, serial_omap_console_putchar); 1250ab4382d2SGreg Kroah-Hartman 1251ab4382d2SGreg Kroah-Hartman /* 1252ab4382d2SGreg Kroah-Hartman * Finally, wait for transmitter to become empty 1253ab4382d2SGreg Kroah-Hartman * and restore the IER 1254ab4382d2SGreg Kroah-Hartman */ 1255ab4382d2SGreg Kroah-Hartman wait_for_xmitr(up); 1256ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, ier); 1257ab4382d2SGreg Kroah-Hartman /* 1258ab4382d2SGreg Kroah-Hartman * The receive handling will happen properly because the 1259ab4382d2SGreg Kroah-Hartman * receive ready bit will still be set; it is not cleared 1260ab4382d2SGreg Kroah-Hartman * on read. However, modem control will not, we must 1261ab4382d2SGreg Kroah-Hartman * call it if we have saved something in the saved flags 1262ab4382d2SGreg Kroah-Hartman * while processing with interrupts off. 1263ab4382d2SGreg Kroah-Hartman */ 1264ab4382d2SGreg Kroah-Hartman if (up->msr_saved_flags) 1265ab4382d2SGreg Kroah-Hartman check_modem_status(up); 1266ab4382d2SGreg Kroah-Hartman 1267d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 1268d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 1269ab4382d2SGreg Kroah-Hartman if (locked) 1270ab4382d2SGreg Kroah-Hartman spin_unlock(&up->port.lock); 1271ab4382d2SGreg Kroah-Hartman local_irq_restore(flags); 1272ab4382d2SGreg Kroah-Hartman } 1273ab4382d2SGreg Kroah-Hartman 1274ab4382d2SGreg Kroah-Hartman static int __init 1275ab4382d2SGreg Kroah-Hartman serial_omap_console_setup(struct console *co, char *options) 1276ab4382d2SGreg Kroah-Hartman { 1277ab4382d2SGreg Kroah-Hartman struct uart_omap_port *up; 1278ab4382d2SGreg Kroah-Hartman int baud = 115200; 1279ab4382d2SGreg Kroah-Hartman int bits = 8; 1280ab4382d2SGreg Kroah-Hartman int parity = 'n'; 1281ab4382d2SGreg Kroah-Hartman int flow = 'n'; 1282ab4382d2SGreg Kroah-Hartman 1283ab4382d2SGreg Kroah-Hartman if (serial_omap_console_ports[co->index] == NULL) 1284ab4382d2SGreg Kroah-Hartman return -ENODEV; 1285ab4382d2SGreg Kroah-Hartman up = serial_omap_console_ports[co->index]; 1286ab4382d2SGreg Kroah-Hartman 1287ab4382d2SGreg Kroah-Hartman if (options) 1288ab4382d2SGreg Kroah-Hartman uart_parse_options(options, &baud, &parity, &bits, &flow); 1289ab4382d2SGreg Kroah-Hartman 1290ab4382d2SGreg Kroah-Hartman return uart_set_options(&up->port, co, baud, parity, bits, flow); 1291ab4382d2SGreg Kroah-Hartman } 1292ab4382d2SGreg Kroah-Hartman 1293ab4382d2SGreg Kroah-Hartman static struct console serial_omap_console = { 1294ab4382d2SGreg Kroah-Hartman .name = OMAP_SERIAL_NAME, 1295ab4382d2SGreg Kroah-Hartman .write = serial_omap_console_write, 1296ab4382d2SGreg Kroah-Hartman .device = uart_console_device, 1297ab4382d2SGreg Kroah-Hartman .setup = serial_omap_console_setup, 1298ab4382d2SGreg Kroah-Hartman .flags = CON_PRINTBUFFER, 1299ab4382d2SGreg Kroah-Hartman .index = -1, 1300ab4382d2SGreg Kroah-Hartman .data = &serial_omap_reg, 1301ab4382d2SGreg Kroah-Hartman }; 1302ab4382d2SGreg Kroah-Hartman 1303ab4382d2SGreg Kroah-Hartman static void serial_omap_add_console_port(struct uart_omap_port *up) 1304ab4382d2SGreg Kroah-Hartman { 1305ba77433dSRajendra Nayak serial_omap_console_ports[up->port.line] = up; 1306ab4382d2SGreg Kroah-Hartman } 1307ab4382d2SGreg Kroah-Hartman 1308ab4382d2SGreg Kroah-Hartman #define OMAP_CONSOLE (&serial_omap_console) 1309ab4382d2SGreg Kroah-Hartman 1310ab4382d2SGreg Kroah-Hartman #else 1311ab4382d2SGreg Kroah-Hartman 1312ab4382d2SGreg Kroah-Hartman #define OMAP_CONSOLE NULL 1313ab4382d2SGreg Kroah-Hartman 1314ab4382d2SGreg Kroah-Hartman static inline void serial_omap_add_console_port(struct uart_omap_port *up) 1315ab4382d2SGreg Kroah-Hartman {} 1316ab4382d2SGreg Kroah-Hartman 1317ab4382d2SGreg Kroah-Hartman #endif 1318ab4382d2SGreg Kroah-Hartman 13194a0ac0f5SMark Jackson /* Enable or disable the rs485 support */ 13204a0ac0f5SMark Jackson static void 13214a0ac0f5SMark Jackson serial_omap_config_rs485(struct uart_port *port, struct serial_rs485 *rs485conf) 13224a0ac0f5SMark Jackson { 13234a0ac0f5SMark Jackson struct uart_omap_port *up = to_uart_omap_port(port); 13244a0ac0f5SMark Jackson unsigned long flags; 13254a0ac0f5SMark Jackson unsigned int mode; 13264a0ac0f5SMark Jackson int val; 13274a0ac0f5SMark Jackson 13284a0ac0f5SMark Jackson pm_runtime_get_sync(up->dev); 13294a0ac0f5SMark Jackson spin_lock_irqsave(&up->port.lock, flags); 13304a0ac0f5SMark Jackson 13314a0ac0f5SMark Jackson /* Disable interrupts from this port */ 13324a0ac0f5SMark Jackson mode = up->ier; 13334a0ac0f5SMark Jackson up->ier = 0; 13344a0ac0f5SMark Jackson serial_out(up, UART_IER, 0); 13354a0ac0f5SMark Jackson 13364a0ac0f5SMark Jackson /* store new config */ 13374a0ac0f5SMark Jackson up->rs485 = *rs485conf; 13384a0ac0f5SMark Jackson 13394a0ac0f5SMark Jackson /* 13404a0ac0f5SMark Jackson * Just as a precaution, only allow rs485 13414a0ac0f5SMark Jackson * to be enabled if the gpio pin is valid 13424a0ac0f5SMark Jackson */ 13434a0ac0f5SMark Jackson if (gpio_is_valid(up->rts_gpio)) { 13444a0ac0f5SMark Jackson /* enable / disable rts */ 13454a0ac0f5SMark Jackson val = (up->rs485.flags & SER_RS485_ENABLED) ? 13464a0ac0f5SMark Jackson SER_RS485_RTS_AFTER_SEND : SER_RS485_RTS_ON_SEND; 13474a0ac0f5SMark Jackson val = (up->rs485.flags & val) ? 1 : 0; 13484a0ac0f5SMark Jackson gpio_set_value(up->rts_gpio, val); 13494a0ac0f5SMark Jackson } else 13504a0ac0f5SMark Jackson up->rs485.flags &= ~SER_RS485_ENABLED; 13514a0ac0f5SMark Jackson 13524a0ac0f5SMark Jackson /* Enable interrupts */ 13534a0ac0f5SMark Jackson up->ier = mode; 13544a0ac0f5SMark Jackson serial_out(up, UART_IER, up->ier); 13554a0ac0f5SMark Jackson 13564a0ac0f5SMark Jackson spin_unlock_irqrestore(&up->port.lock, flags); 13574a0ac0f5SMark Jackson pm_runtime_mark_last_busy(up->dev); 13584a0ac0f5SMark Jackson pm_runtime_put_autosuspend(up->dev); 13594a0ac0f5SMark Jackson } 13604a0ac0f5SMark Jackson 13614a0ac0f5SMark Jackson static int 13624a0ac0f5SMark Jackson serial_omap_ioctl(struct uart_port *port, unsigned int cmd, unsigned long arg) 13634a0ac0f5SMark Jackson { 13644a0ac0f5SMark Jackson struct serial_rs485 rs485conf; 13654a0ac0f5SMark Jackson 13664a0ac0f5SMark Jackson switch (cmd) { 13674a0ac0f5SMark Jackson case TIOCSRS485: 13684a0ac0f5SMark Jackson if (copy_from_user(&rs485conf, (struct serial_rs485 *) arg, 13694a0ac0f5SMark Jackson sizeof(rs485conf))) 13704a0ac0f5SMark Jackson return -EFAULT; 13714a0ac0f5SMark Jackson 13724a0ac0f5SMark Jackson serial_omap_config_rs485(port, &rs485conf); 13734a0ac0f5SMark Jackson break; 13744a0ac0f5SMark Jackson 13754a0ac0f5SMark Jackson case TIOCGRS485: 13764a0ac0f5SMark Jackson if (copy_to_user((struct serial_rs485 *) arg, 13774a0ac0f5SMark Jackson &(to_uart_omap_port(port)->rs485), 13784a0ac0f5SMark Jackson sizeof(rs485conf))) 13794a0ac0f5SMark Jackson return -EFAULT; 13804a0ac0f5SMark Jackson break; 13814a0ac0f5SMark Jackson 13824a0ac0f5SMark Jackson default: 13834a0ac0f5SMark Jackson return -ENOIOCTLCMD; 13844a0ac0f5SMark Jackson } 13854a0ac0f5SMark Jackson return 0; 13864a0ac0f5SMark Jackson } 13874a0ac0f5SMark Jackson 13884a0ac0f5SMark Jackson 1389ab4382d2SGreg Kroah-Hartman static struct uart_ops serial_omap_pops = { 1390ab4382d2SGreg Kroah-Hartman .tx_empty = serial_omap_tx_empty, 1391ab4382d2SGreg Kroah-Hartman .set_mctrl = serial_omap_set_mctrl, 1392ab4382d2SGreg Kroah-Hartman .get_mctrl = serial_omap_get_mctrl, 1393ab4382d2SGreg Kroah-Hartman .stop_tx = serial_omap_stop_tx, 1394ab4382d2SGreg Kroah-Hartman .start_tx = serial_omap_start_tx, 13953af08bd7SRussell King .throttle = serial_omap_throttle, 13963af08bd7SRussell King .unthrottle = serial_omap_unthrottle, 1397ab4382d2SGreg Kroah-Hartman .stop_rx = serial_omap_stop_rx, 1398ab4382d2SGreg Kroah-Hartman .enable_ms = serial_omap_enable_ms, 1399ab4382d2SGreg Kroah-Hartman .break_ctl = serial_omap_break_ctl, 1400ab4382d2SGreg Kroah-Hartman .startup = serial_omap_startup, 1401ab4382d2SGreg Kroah-Hartman .shutdown = serial_omap_shutdown, 1402ab4382d2SGreg Kroah-Hartman .set_termios = serial_omap_set_termios, 1403ab4382d2SGreg Kroah-Hartman .pm = serial_omap_pm, 14049727faf4SFelipe Balbi .set_wake = serial_omap_set_wake, 1405ab4382d2SGreg Kroah-Hartman .type = serial_omap_type, 1406ab4382d2SGreg Kroah-Hartman .release_port = serial_omap_release_port, 1407ab4382d2SGreg Kroah-Hartman .request_port = serial_omap_request_port, 1408ab4382d2SGreg Kroah-Hartman .config_port = serial_omap_config_port, 1409ab4382d2SGreg Kroah-Hartman .verify_port = serial_omap_verify_port, 14104a0ac0f5SMark Jackson .ioctl = serial_omap_ioctl, 1411ab4382d2SGreg Kroah-Hartman #ifdef CONFIG_CONSOLE_POLL 1412ab4382d2SGreg Kroah-Hartman .poll_put_char = serial_omap_poll_put_char, 1413ab4382d2SGreg Kroah-Hartman .poll_get_char = serial_omap_poll_get_char, 1414ab4382d2SGreg Kroah-Hartman #endif 1415ab4382d2SGreg Kroah-Hartman }; 1416ab4382d2SGreg Kroah-Hartman 1417ab4382d2SGreg Kroah-Hartman static struct uart_driver serial_omap_reg = { 1418ab4382d2SGreg Kroah-Hartman .owner = THIS_MODULE, 1419ab4382d2SGreg Kroah-Hartman .driver_name = "OMAP-SERIAL", 1420ab4382d2SGreg Kroah-Hartman .dev_name = OMAP_SERIAL_NAME, 1421ab4382d2SGreg Kroah-Hartman .nr = OMAP_MAX_HSUART_PORTS, 1422ab4382d2SGreg Kroah-Hartman .cons = OMAP_CONSOLE, 1423ab4382d2SGreg Kroah-Hartman }; 1424ab4382d2SGreg Kroah-Hartman 14253bc4f0d8SShubhrajyoti D #ifdef CONFIG_PM_SLEEP 1426ddd85e22SSourav Poddar static int serial_omap_prepare(struct device *dev) 1427ddd85e22SSourav Poddar { 1428ddd85e22SSourav Poddar struct uart_omap_port *up = dev_get_drvdata(dev); 1429ddd85e22SSourav Poddar 1430ddd85e22SSourav Poddar up->is_suspending = true; 1431ddd85e22SSourav Poddar 1432ddd85e22SSourav Poddar return 0; 1433ddd85e22SSourav Poddar } 1434ddd85e22SSourav Poddar 1435ddd85e22SSourav Poddar static void serial_omap_complete(struct device *dev) 1436ddd85e22SSourav Poddar { 1437ddd85e22SSourav Poddar struct uart_omap_port *up = dev_get_drvdata(dev); 1438ddd85e22SSourav Poddar 1439ddd85e22SSourav Poddar up->is_suspending = false; 1440ddd85e22SSourav Poddar } 1441ddd85e22SSourav Poddar 1442fcdca757SGovindraj.R static int serial_omap_suspend(struct device *dev) 1443ab4382d2SGreg Kroah-Hartman { 1444fcdca757SGovindraj.R struct uart_omap_port *up = dev_get_drvdata(dev); 1445ab4382d2SGreg Kroah-Hartman 1446ab4382d2SGreg Kroah-Hartman uart_suspend_port(&serial_omap_reg, &up->port); 144743829731STejun Heo flush_work(&up->qos_work); 14482fd14964SGovindraj.R 1449ab4382d2SGreg Kroah-Hartman return 0; 1450ab4382d2SGreg Kroah-Hartman } 1451ab4382d2SGreg Kroah-Hartman 1452fcdca757SGovindraj.R static int serial_omap_resume(struct device *dev) 1453ab4382d2SGreg Kroah-Hartman { 1454fcdca757SGovindraj.R struct uart_omap_port *up = dev_get_drvdata(dev); 1455ab4382d2SGreg Kroah-Hartman 1456ab4382d2SGreg Kroah-Hartman uart_resume_port(&serial_omap_reg, &up->port); 1457ac57e7f3SSourav Poddar 1458ab4382d2SGreg Kroah-Hartman return 0; 1459ab4382d2SGreg Kroah-Hartman } 1460ddd85e22SSourav Poddar #else 1461ddd85e22SSourav Poddar #define serial_omap_prepare NULL 14622cb5a2faSArnd Bergmann #define serial_omap_complete NULL 1463ddd85e22SSourav Poddar #endif /* CONFIG_PM_SLEEP */ 1464ab4382d2SGreg Kroah-Hartman 14659671f099SBill Pemberton static void omap_serial_fill_features_erratas(struct uart_omap_port *up) 14667c77c8deSGovindraj.R { 14677c77c8deSGovindraj.R u32 mvr, scheme; 14687c77c8deSGovindraj.R u16 revision, major, minor; 14697c77c8deSGovindraj.R 147076bac198SRuchika Kharwar mvr = readl(up->port.membase + (UART_OMAP_MVER << up->port.regshift)); 14717c77c8deSGovindraj.R 14727c77c8deSGovindraj.R /* Check revision register scheme */ 14737c77c8deSGovindraj.R scheme = mvr >> OMAP_UART_MVR_SCHEME_SHIFT; 14747c77c8deSGovindraj.R 14757c77c8deSGovindraj.R switch (scheme) { 14767c77c8deSGovindraj.R case 0: /* Legacy Scheme: OMAP2/3 */ 14777c77c8deSGovindraj.R /* MINOR_REV[0:4], MAJOR_REV[4:7] */ 14787c77c8deSGovindraj.R major = (mvr & OMAP_UART_LEGACY_MVR_MAJ_MASK) >> 14797c77c8deSGovindraj.R OMAP_UART_LEGACY_MVR_MAJ_SHIFT; 14807c77c8deSGovindraj.R minor = (mvr & OMAP_UART_LEGACY_MVR_MIN_MASK); 14817c77c8deSGovindraj.R break; 14827c77c8deSGovindraj.R case 1: 14837c77c8deSGovindraj.R /* New Scheme: OMAP4+ */ 14847c77c8deSGovindraj.R /* MINOR_REV[0:5], MAJOR_REV[8:10] */ 14857c77c8deSGovindraj.R major = (mvr & OMAP_UART_MVR_MAJ_MASK) >> 14867c77c8deSGovindraj.R OMAP_UART_MVR_MAJ_SHIFT; 14877c77c8deSGovindraj.R minor = (mvr & OMAP_UART_MVR_MIN_MASK); 14887c77c8deSGovindraj.R break; 14897c77c8deSGovindraj.R default: 1490d8ee4ea6SFelipe Balbi dev_warn(up->dev, 14917c77c8deSGovindraj.R "Unknown %s revision, defaulting to highest\n", 14927c77c8deSGovindraj.R up->name); 14937c77c8deSGovindraj.R /* highest possible revision */ 14947c77c8deSGovindraj.R major = 0xff; 14957c77c8deSGovindraj.R minor = 0xff; 14967c77c8deSGovindraj.R } 14977c77c8deSGovindraj.R 14987c77c8deSGovindraj.R /* normalize revision for the driver */ 14997c77c8deSGovindraj.R revision = UART_BUILD_REVISION(major, minor); 15007c77c8deSGovindraj.R 15017c77c8deSGovindraj.R switch (revision) { 15027c77c8deSGovindraj.R case OMAP_UART_REV_46: 15037c77c8deSGovindraj.R up->errata |= (UART_ERRATA_i202_MDR1_ACCESS | 15047c77c8deSGovindraj.R UART_ERRATA_i291_DMA_FORCEIDLE); 15057c77c8deSGovindraj.R break; 15067c77c8deSGovindraj.R case OMAP_UART_REV_52: 15077c77c8deSGovindraj.R up->errata |= (UART_ERRATA_i202_MDR1_ACCESS | 15087c77c8deSGovindraj.R UART_ERRATA_i291_DMA_FORCEIDLE); 1509f64ffda6SGovindraj.R up->features |= OMAP_UART_WER_HAS_TX_WAKEUP; 15107c77c8deSGovindraj.R break; 15117c77c8deSGovindraj.R case OMAP_UART_REV_63: 15127c77c8deSGovindraj.R up->errata |= UART_ERRATA_i202_MDR1_ACCESS; 1513f64ffda6SGovindraj.R up->features |= OMAP_UART_WER_HAS_TX_WAKEUP; 15147c77c8deSGovindraj.R break; 15157c77c8deSGovindraj.R default: 15167c77c8deSGovindraj.R break; 15177c77c8deSGovindraj.R } 15187c77c8deSGovindraj.R } 15197c77c8deSGovindraj.R 15209671f099SBill Pemberton static struct omap_uart_port_info *of_get_uart_port_info(struct device *dev) 1521d92b0dfcSRajendra Nayak { 1522d92b0dfcSRajendra Nayak struct omap_uart_port_info *omap_up_info; 1523d92b0dfcSRajendra Nayak 1524d92b0dfcSRajendra Nayak omap_up_info = devm_kzalloc(dev, sizeof(*omap_up_info), GFP_KERNEL); 1525d92b0dfcSRajendra Nayak if (!omap_up_info) 1526d92b0dfcSRajendra Nayak return NULL; /* out of memory */ 1527d92b0dfcSRajendra Nayak 1528d92b0dfcSRajendra Nayak of_property_read_u32(dev->of_node, "clock-frequency", 1529d92b0dfcSRajendra Nayak &omap_up_info->uartclk); 1530d92b0dfcSRajendra Nayak return omap_up_info; 1531d92b0dfcSRajendra Nayak } 1532d92b0dfcSRajendra Nayak 15334a0ac0f5SMark Jackson static int serial_omap_probe_rs485(struct uart_omap_port *up, 15344a0ac0f5SMark Jackson struct device_node *np) 15354a0ac0f5SMark Jackson { 15364a0ac0f5SMark Jackson struct serial_rs485 *rs485conf = &up->rs485; 15374a0ac0f5SMark Jackson u32 rs485_delay[2]; 15384a0ac0f5SMark Jackson enum of_gpio_flags flags; 15394a0ac0f5SMark Jackson int ret; 15404a0ac0f5SMark Jackson 15414a0ac0f5SMark Jackson rs485conf->flags = 0; 15424a0ac0f5SMark Jackson up->rts_gpio = -EINVAL; 15434a0ac0f5SMark Jackson 15444a0ac0f5SMark Jackson if (!np) 15454a0ac0f5SMark Jackson return 0; 15464a0ac0f5SMark Jackson 15474a0ac0f5SMark Jackson if (of_property_read_bool(np, "rs485-rts-active-high")) 15484a0ac0f5SMark Jackson rs485conf->flags |= SER_RS485_RTS_ON_SEND; 15494a0ac0f5SMark Jackson else 15504a0ac0f5SMark Jackson rs485conf->flags |= SER_RS485_RTS_AFTER_SEND; 15514a0ac0f5SMark Jackson 15524a0ac0f5SMark Jackson /* check for tx enable gpio */ 15534a0ac0f5SMark Jackson up->rts_gpio = of_get_named_gpio_flags(np, "rts-gpio", 0, &flags); 15544a0ac0f5SMark Jackson if (gpio_is_valid(up->rts_gpio)) { 15554a0ac0f5SMark Jackson ret = gpio_request(up->rts_gpio, "omap-serial"); 15564a0ac0f5SMark Jackson if (ret < 0) 15574a0ac0f5SMark Jackson return ret; 15584a0ac0f5SMark Jackson ret = gpio_direction_output(up->rts_gpio, 15594a0ac0f5SMark Jackson flags & SER_RS485_RTS_AFTER_SEND); 15604a0ac0f5SMark Jackson if (ret < 0) 15614a0ac0f5SMark Jackson return ret; 15624a0ac0f5SMark Jackson } else 15634a0ac0f5SMark Jackson up->rts_gpio = -EINVAL; 15644a0ac0f5SMark Jackson 15654a0ac0f5SMark Jackson if (of_property_read_u32_array(np, "rs485-rts-delay", 15664a0ac0f5SMark Jackson rs485_delay, 2) == 0) { 15674a0ac0f5SMark Jackson rs485conf->delay_rts_before_send = rs485_delay[0]; 15684a0ac0f5SMark Jackson rs485conf->delay_rts_after_send = rs485_delay[1]; 15694a0ac0f5SMark Jackson } 15704a0ac0f5SMark Jackson 15714a0ac0f5SMark Jackson if (of_property_read_bool(np, "rs485-rx-during-tx")) 15724a0ac0f5SMark Jackson rs485conf->flags |= SER_RS485_RX_DURING_TX; 15734a0ac0f5SMark Jackson 15744a0ac0f5SMark Jackson if (of_property_read_bool(np, "linux,rs485-enabled-at-boot-time")) 15754a0ac0f5SMark Jackson rs485conf->flags |= SER_RS485_ENABLED; 15764a0ac0f5SMark Jackson 15774a0ac0f5SMark Jackson return 0; 15784a0ac0f5SMark Jackson } 15794a0ac0f5SMark Jackson 15809671f099SBill Pemberton static int serial_omap_probe(struct platform_device *pdev) 1581ab4382d2SGreg Kroah-Hartman { 1582ab4382d2SGreg Kroah-Hartman struct uart_omap_port *up; 158349457430SFelipe Balbi struct resource *mem, *irq; 1584574de559SJingoo Han struct omap_uart_port_info *omap_up_info = dev_get_platdata(&pdev->dev); 15859574f36fSNeilBrown int ret; 1586ab4382d2SGreg Kroah-Hartman 1587a0a490f9SVikram Pandita if (pdev->dev.of_node) { 1588d92b0dfcSRajendra Nayak omap_up_info = of_get_uart_port_info(&pdev->dev); 1589a0a490f9SVikram Pandita pdev->dev.platform_data = omap_up_info; 1590a0a490f9SVikram Pandita } 1591d92b0dfcSRajendra Nayak 1592ab4382d2SGreg Kroah-Hartman mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1593ab4382d2SGreg Kroah-Hartman if (!mem) { 1594ab4382d2SGreg Kroah-Hartman dev_err(&pdev->dev, "no mem resource?\n"); 1595ab4382d2SGreg Kroah-Hartman return -ENODEV; 1596ab4382d2SGreg Kroah-Hartman } 1597ab4382d2SGreg Kroah-Hartman 1598ab4382d2SGreg Kroah-Hartman irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 1599ab4382d2SGreg Kroah-Hartman if (!irq) { 1600ab4382d2SGreg Kroah-Hartman dev_err(&pdev->dev, "no irq resource?\n"); 1601ab4382d2SGreg Kroah-Hartman return -ENODEV; 1602ab4382d2SGreg Kroah-Hartman } 1603ab4382d2SGreg Kroah-Hartman 1604388bc262SShubhrajyoti D if (!devm_request_mem_region(&pdev->dev, mem->start, resource_size(mem), 1605ab4382d2SGreg Kroah-Hartman pdev->dev.driver->name)) { 1606ab4382d2SGreg Kroah-Hartman dev_err(&pdev->dev, "memory region already claimed\n"); 1607ab4382d2SGreg Kroah-Hartman return -EBUSY; 1608ab4382d2SGreg Kroah-Hartman } 1609ab4382d2SGreg Kroah-Hartman 16109574f36fSNeilBrown if (gpio_is_valid(omap_up_info->DTR_gpio) && 16119574f36fSNeilBrown omap_up_info->DTR_present) { 16129574f36fSNeilBrown ret = gpio_request(omap_up_info->DTR_gpio, "omap-serial"); 16139574f36fSNeilBrown if (ret < 0) 16149574f36fSNeilBrown return ret; 16159574f36fSNeilBrown ret = gpio_direction_output(omap_up_info->DTR_gpio, 16169574f36fSNeilBrown omap_up_info->DTR_inverted); 16179574f36fSNeilBrown if (ret < 0) 16189574f36fSNeilBrown return ret; 16199574f36fSNeilBrown } 16209574f36fSNeilBrown 1621388bc262SShubhrajyoti D up = devm_kzalloc(&pdev->dev, sizeof(*up), GFP_KERNEL); 1622388bc262SShubhrajyoti D if (!up) 1623388bc262SShubhrajyoti D return -ENOMEM; 1624388bc262SShubhrajyoti D 16259574f36fSNeilBrown if (gpio_is_valid(omap_up_info->DTR_gpio) && 16269574f36fSNeilBrown omap_up_info->DTR_present) { 16279574f36fSNeilBrown up->DTR_gpio = omap_up_info->DTR_gpio; 16289574f36fSNeilBrown up->DTR_inverted = omap_up_info->DTR_inverted; 16299574f36fSNeilBrown } else 16309574f36fSNeilBrown up->DTR_gpio = -EINVAL; 16319574f36fSNeilBrown up->DTR_active = 0; 16329574f36fSNeilBrown 1633d8ee4ea6SFelipe Balbi up->dev = &pdev->dev; 1634ab4382d2SGreg Kroah-Hartman up->port.dev = &pdev->dev; 1635ab4382d2SGreg Kroah-Hartman up->port.type = PORT_OMAP; 1636ab4382d2SGreg Kroah-Hartman up->port.iotype = UPIO_MEM; 1637ab4382d2SGreg Kroah-Hartman up->port.irq = irq->start; 1638ab4382d2SGreg Kroah-Hartman 1639ab4382d2SGreg Kroah-Hartman up->port.regshift = 2; 1640ab4382d2SGreg Kroah-Hartman up->port.fifosize = 64; 1641ab4382d2SGreg Kroah-Hartman up->port.ops = &serial_omap_pops; 1642ab4382d2SGreg Kroah-Hartman 1643d92b0dfcSRajendra Nayak if (pdev->dev.of_node) 1644d92b0dfcSRajendra Nayak up->port.line = of_alias_get_id(pdev->dev.of_node, "serial"); 1645d92b0dfcSRajendra Nayak else 1646ab4382d2SGreg Kroah-Hartman up->port.line = pdev->id; 1647ab4382d2SGreg Kroah-Hartman 1648d92b0dfcSRajendra Nayak if (up->port.line < 0) { 1649d92b0dfcSRajendra Nayak dev_err(&pdev->dev, "failed to get alias/pdev id, errno %d\n", 1650d92b0dfcSRajendra Nayak up->port.line); 1651d92b0dfcSRajendra Nayak ret = -ENODEV; 1652388bc262SShubhrajyoti D goto err_port_line; 1653d92b0dfcSRajendra Nayak } 1654d92b0dfcSRajendra Nayak 16554a0ac0f5SMark Jackson ret = serial_omap_probe_rs485(up, pdev->dev.of_node); 16564a0ac0f5SMark Jackson if (ret < 0) 16574a0ac0f5SMark Jackson goto err_rs485; 16584a0ac0f5SMark Jackson 1659d92b0dfcSRajendra Nayak sprintf(up->name, "OMAP UART%d", up->port.line); 1660edd70ad7SGovindraj.R up->port.mapbase = mem->start; 1661388bc262SShubhrajyoti D up->port.membase = devm_ioremap(&pdev->dev, mem->start, 1662388bc262SShubhrajyoti D resource_size(mem)); 1663edd70ad7SGovindraj.R if (!up->port.membase) { 1664edd70ad7SGovindraj.R dev_err(&pdev->dev, "can't ioremap UART\n"); 1665edd70ad7SGovindraj.R ret = -ENOMEM; 1666388bc262SShubhrajyoti D goto err_ioremap; 1667edd70ad7SGovindraj.R } 1668edd70ad7SGovindraj.R 1669ab4382d2SGreg Kroah-Hartman up->port.flags = omap_up_info->flags; 1670ab4382d2SGreg Kroah-Hartman up->port.uartclk = omap_up_info->uartclk; 16718fe789dcSRajendra Nayak if (!up->port.uartclk) { 16728fe789dcSRajendra Nayak up->port.uartclk = DEFAULT_CLK_SPEED; 16738fe789dcSRajendra Nayak dev_warn(&pdev->dev, "No clock speed specified: using default:" 16748fe789dcSRajendra Nayak "%d\n", DEFAULT_CLK_SPEED); 16758fe789dcSRajendra Nayak } 1676ab4382d2SGreg Kroah-Hartman 16772fd14964SGovindraj.R up->latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE; 16782fd14964SGovindraj.R up->calc_latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE; 16792fd14964SGovindraj.R pm_qos_add_request(&up->pm_qos_request, 16802fd14964SGovindraj.R PM_QOS_CPU_DMA_LATENCY, up->latency); 16812fd14964SGovindraj.R serial_omap_uart_wq = create_singlethread_workqueue(up->name); 16822fd14964SGovindraj.R INIT_WORK(&up->qos_work, serial_omap_uart_qos_work); 16832fd14964SGovindraj.R 168493220dccSFelipe Balbi platform_set_drvdata(pdev, up); 1685a630fbfbSTony Lindgren if (omap_up_info->autosuspend_timeout == 0) 1686a630fbfbSTony Lindgren omap_up_info->autosuspend_timeout = -1; 1687a630fbfbSTony Lindgren device_init_wakeup(up->dev, true); 1688fcdca757SGovindraj.R pm_runtime_use_autosuspend(&pdev->dev); 1689fcdca757SGovindraj.R pm_runtime_set_autosuspend_delay(&pdev->dev, 1690c86845dbSDeepak K omap_up_info->autosuspend_timeout); 1691fcdca757SGovindraj.R 1692fcdca757SGovindraj.R pm_runtime_irq_safe(&pdev->dev); 16933026d14aSGrygorii Strashko pm_runtime_enable(&pdev->dev); 16943026d14aSGrygorii Strashko 1695fcdca757SGovindraj.R pm_runtime_get_sync(&pdev->dev); 1696fcdca757SGovindraj.R 16977c77c8deSGovindraj.R omap_serial_fill_features_erratas(up); 16987c77c8deSGovindraj.R 1699ba77433dSRajendra Nayak ui[up->port.line] = up; 1700ab4382d2SGreg Kroah-Hartman serial_omap_add_console_port(up); 1701ab4382d2SGreg Kroah-Hartman 1702ab4382d2SGreg Kroah-Hartman ret = uart_add_one_port(&serial_omap_reg, &up->port); 1703ab4382d2SGreg Kroah-Hartman if (ret != 0) 1704388bc262SShubhrajyoti D goto err_add_port; 1705ab4382d2SGreg Kroah-Hartman 1706660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 1707660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 1708ab4382d2SGreg Kroah-Hartman return 0; 1709388bc262SShubhrajyoti D 1710388bc262SShubhrajyoti D err_add_port: 1711388bc262SShubhrajyoti D pm_runtime_put(&pdev->dev); 1712388bc262SShubhrajyoti D pm_runtime_disable(&pdev->dev); 1713388bc262SShubhrajyoti D err_ioremap: 17144a0ac0f5SMark Jackson err_rs485: 1715388bc262SShubhrajyoti D err_port_line: 1716ab4382d2SGreg Kroah-Hartman dev_err(&pdev->dev, "[UART%d]: failure [%s]: %d\n", 1717ab4382d2SGreg Kroah-Hartman pdev->id, __func__, ret); 1718ab4382d2SGreg Kroah-Hartman return ret; 1719ab4382d2SGreg Kroah-Hartman } 1720ab4382d2SGreg Kroah-Hartman 1721ae8d8a14SBill Pemberton static int serial_omap_remove(struct platform_device *dev) 1722ab4382d2SGreg Kroah-Hartman { 1723ab4382d2SGreg Kroah-Hartman struct uart_omap_port *up = platform_get_drvdata(dev); 1724ab4382d2SGreg Kroah-Hartman 17257e9c8e7dSFelipe Balbi pm_runtime_put_sync(up->dev); 1726d8ee4ea6SFelipe Balbi pm_runtime_disable(up->dev); 1727ab4382d2SGreg Kroah-Hartman uart_remove_one_port(&serial_omap_reg, &up->port); 17282fd14964SGovindraj.R pm_qos_remove_request(&up->pm_qos_request); 1729fcdca757SGovindraj.R 1730ab4382d2SGreg Kroah-Hartman return 0; 1731ab4382d2SGreg Kroah-Hartman } 1732ab4382d2SGreg Kroah-Hartman 173394734749SGovindraj.R /* 173494734749SGovindraj.R * Work Around for Errata i202 (2430, 3430, 3630, 4430 and 4460) 173594734749SGovindraj.R * The access to uart register after MDR1 Access 173694734749SGovindraj.R * causes UART to corrupt data. 173794734749SGovindraj.R * 173894734749SGovindraj.R * Need a delay = 173994734749SGovindraj.R * 5 L4 clock cycles + 5 UART functional clock cycle (@48MHz = ~0.2uS) 174094734749SGovindraj.R * give 10 times as much 174194734749SGovindraj.R */ 174294734749SGovindraj.R static void serial_omap_mdr1_errataset(struct uart_omap_port *up, u8 mdr1) 174394734749SGovindraj.R { 174494734749SGovindraj.R u8 timeout = 255; 174594734749SGovindraj.R 174694734749SGovindraj.R serial_out(up, UART_OMAP_MDR1, mdr1); 174794734749SGovindraj.R udelay(2); 174894734749SGovindraj.R serial_out(up, UART_FCR, up->fcr | UART_FCR_CLEAR_XMIT | 174994734749SGovindraj.R UART_FCR_CLEAR_RCVR); 175094734749SGovindraj.R /* 175194734749SGovindraj.R * Wait for FIFO to empty: when empty, RX_FIFO_E bit is 0 and 175294734749SGovindraj.R * TX_FIFO_E bit is 1. 175394734749SGovindraj.R */ 175494734749SGovindraj.R while (UART_LSR_THRE != (serial_in(up, UART_LSR) & 175594734749SGovindraj.R (UART_LSR_THRE | UART_LSR_DR))) { 175694734749SGovindraj.R timeout--; 175794734749SGovindraj.R if (!timeout) { 175894734749SGovindraj.R /* Should *never* happen. we warn and carry on */ 1759d8ee4ea6SFelipe Balbi dev_crit(up->dev, "Errata i202: timedout %x\n", 176094734749SGovindraj.R serial_in(up, UART_LSR)); 176194734749SGovindraj.R break; 176294734749SGovindraj.R } 176394734749SGovindraj.R udelay(1); 176494734749SGovindraj.R } 176594734749SGovindraj.R } 176694734749SGovindraj.R 1767b5148856SShubhrajyoti D #ifdef CONFIG_PM_RUNTIME 17689f9ac1e8SGovindraj.R static void serial_omap_restore_context(struct uart_omap_port *up) 17699f9ac1e8SGovindraj.R { 177094734749SGovindraj.R if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) 177194734749SGovindraj.R serial_omap_mdr1_errataset(up, UART_OMAP_MDR1_DISABLE); 177294734749SGovindraj.R else 17739f9ac1e8SGovindraj.R serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE); 177494734749SGovindraj.R 17759f9ac1e8SGovindraj.R serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */ 17769f9ac1e8SGovindraj.R serial_out(up, UART_EFR, UART_EFR_ECB); 17779f9ac1e8SGovindraj.R serial_out(up, UART_LCR, 0x0); /* Operational mode */ 17789f9ac1e8SGovindraj.R serial_out(up, UART_IER, 0x0); 17799f9ac1e8SGovindraj.R serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */ 1780c538d20cSGovindraj.R serial_out(up, UART_DLL, up->dll); 1781c538d20cSGovindraj.R serial_out(up, UART_DLM, up->dlh); 17829f9ac1e8SGovindraj.R serial_out(up, UART_LCR, 0x0); /* Operational mode */ 17839f9ac1e8SGovindraj.R serial_out(up, UART_IER, up->ier); 17849f9ac1e8SGovindraj.R serial_out(up, UART_FCR, up->fcr); 17859f9ac1e8SGovindraj.R serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 17869f9ac1e8SGovindraj.R serial_out(up, UART_MCR, up->mcr); 17879f9ac1e8SGovindraj.R serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */ 1788c538d20cSGovindraj.R serial_out(up, UART_OMAP_SCR, up->scr); 17899f9ac1e8SGovindraj.R serial_out(up, UART_EFR, up->efr); 17909f9ac1e8SGovindraj.R serial_out(up, UART_LCR, up->lcr); 179194734749SGovindraj.R if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) 179294734749SGovindraj.R serial_omap_mdr1_errataset(up, up->mdr1); 179394734749SGovindraj.R else 1794c538d20cSGovindraj.R serial_out(up, UART_OMAP_MDR1, up->mdr1); 1795f64ffda6SGovindraj.R serial_out(up, UART_OMAP_WER, up->wer); 17969f9ac1e8SGovindraj.R } 17979f9ac1e8SGovindraj.R 1798fcdca757SGovindraj.R static int serial_omap_runtime_suspend(struct device *dev) 1799fcdca757SGovindraj.R { 1800ec3bebc6SGovindraj.R struct uart_omap_port *up = dev_get_drvdata(dev); 1801ec3bebc6SGovindraj.R 18027f25301dSWei Yongjun if (!up) 18037f25301dSWei Yongjun return -EINVAL; 18047f25301dSWei Yongjun 1805ddd85e22SSourav Poddar /* 1806ddd85e22SSourav Poddar * When using 'no_console_suspend', the console UART must not be 1807ddd85e22SSourav Poddar * suspended. Since driver suspend is managed by runtime suspend, 1808ddd85e22SSourav Poddar * preventing runtime suspend (by returning error) will keep device 1809ddd85e22SSourav Poddar * active during suspend. 1810ddd85e22SSourav Poddar */ 1811ddd85e22SSourav Poddar if (up->is_suspending && !console_suspend_enabled && 1812ddd85e22SSourav Poddar uart_console(&up->port)) 1813ddd85e22SSourav Poddar return -EBUSY; 1814ddd85e22SSourav Poddar 1815e5b57c03SFelipe Balbi up->context_loss_cnt = serial_omap_get_context_loss_count(up); 1816ec3bebc6SGovindraj.R 181762f3ec5fSGovindraj.R if (device_may_wakeup(dev)) { 181862f3ec5fSGovindraj.R if (!up->wakeups_enabled) { 1819e5b57c03SFelipe Balbi serial_omap_enable_wakeup(up, true); 182062f3ec5fSGovindraj.R up->wakeups_enabled = true; 182162f3ec5fSGovindraj.R } 182262f3ec5fSGovindraj.R } else { 182362f3ec5fSGovindraj.R if (up->wakeups_enabled) { 1824e5b57c03SFelipe Balbi serial_omap_enable_wakeup(up, false); 182562f3ec5fSGovindraj.R up->wakeups_enabled = false; 182662f3ec5fSGovindraj.R } 182762f3ec5fSGovindraj.R } 182862f3ec5fSGovindraj.R 18292fd14964SGovindraj.R up->latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE; 18302fd14964SGovindraj.R schedule_work(&up->qos_work); 18312fd14964SGovindraj.R 1832fcdca757SGovindraj.R return 0; 1833fcdca757SGovindraj.R } 1834fcdca757SGovindraj.R 1835fcdca757SGovindraj.R static int serial_omap_runtime_resume(struct device *dev) 1836fcdca757SGovindraj.R { 18379f9ac1e8SGovindraj.R struct uart_omap_port *up = dev_get_drvdata(dev); 18389f9ac1e8SGovindraj.R 183939aee51dSShubhrajyoti D int loss_cnt = serial_omap_get_context_loss_count(up); 1840ec3bebc6SGovindraj.R 184139aee51dSShubhrajyoti D if (loss_cnt < 0) { 1842a630fbfbSTony Lindgren dev_dbg(dev, "serial_omap_get_context_loss_count failed : %d\n", 184339aee51dSShubhrajyoti D loss_cnt); 18449f9ac1e8SGovindraj.R serial_omap_restore_context(up); 184539aee51dSShubhrajyoti D } else if (up->context_loss_cnt != loss_cnt) { 184639aee51dSShubhrajyoti D serial_omap_restore_context(up); 184739aee51dSShubhrajyoti D } 18482fd14964SGovindraj.R up->latency = up->calc_latency; 18492fd14964SGovindraj.R schedule_work(&up->qos_work); 18509f9ac1e8SGovindraj.R 1851fcdca757SGovindraj.R return 0; 1852fcdca757SGovindraj.R } 1853fcdca757SGovindraj.R #endif 1854fcdca757SGovindraj.R 1855fcdca757SGovindraj.R static const struct dev_pm_ops serial_omap_dev_pm_ops = { 1856fcdca757SGovindraj.R SET_SYSTEM_SLEEP_PM_OPS(serial_omap_suspend, serial_omap_resume) 1857fcdca757SGovindraj.R SET_RUNTIME_PM_OPS(serial_omap_runtime_suspend, 1858fcdca757SGovindraj.R serial_omap_runtime_resume, NULL) 1859ddd85e22SSourav Poddar .prepare = serial_omap_prepare, 1860ddd85e22SSourav Poddar .complete = serial_omap_complete, 1861fcdca757SGovindraj.R }; 1862fcdca757SGovindraj.R 1863d92b0dfcSRajendra Nayak #if defined(CONFIG_OF) 1864d92b0dfcSRajendra Nayak static const struct of_device_id omap_serial_of_match[] = { 1865d92b0dfcSRajendra Nayak { .compatible = "ti,omap2-uart" }, 1866d92b0dfcSRajendra Nayak { .compatible = "ti,omap3-uart" }, 1867d92b0dfcSRajendra Nayak { .compatible = "ti,omap4-uart" }, 1868d92b0dfcSRajendra Nayak {}, 1869d92b0dfcSRajendra Nayak }; 1870d92b0dfcSRajendra Nayak MODULE_DEVICE_TABLE(of, omap_serial_of_match); 1871d92b0dfcSRajendra Nayak #endif 1872d92b0dfcSRajendra Nayak 1873ab4382d2SGreg Kroah-Hartman static struct platform_driver serial_omap_driver = { 1874ab4382d2SGreg Kroah-Hartman .probe = serial_omap_probe, 18752d47b716SBill Pemberton .remove = serial_omap_remove, 1876ab4382d2SGreg Kroah-Hartman .driver = { 1877ab4382d2SGreg Kroah-Hartman .name = DRIVER_NAME, 1878fcdca757SGovindraj.R .pm = &serial_omap_dev_pm_ops, 1879d92b0dfcSRajendra Nayak .of_match_table = of_match_ptr(omap_serial_of_match), 1880ab4382d2SGreg Kroah-Hartman }, 1881ab4382d2SGreg Kroah-Hartman }; 1882ab4382d2SGreg Kroah-Hartman 1883ab4382d2SGreg Kroah-Hartman static int __init serial_omap_init(void) 1884ab4382d2SGreg Kroah-Hartman { 1885ab4382d2SGreg Kroah-Hartman int ret; 1886ab4382d2SGreg Kroah-Hartman 1887ab4382d2SGreg Kroah-Hartman ret = uart_register_driver(&serial_omap_reg); 1888ab4382d2SGreg Kroah-Hartman if (ret != 0) 1889ab4382d2SGreg Kroah-Hartman return ret; 1890ab4382d2SGreg Kroah-Hartman ret = platform_driver_register(&serial_omap_driver); 1891ab4382d2SGreg Kroah-Hartman if (ret != 0) 1892ab4382d2SGreg Kroah-Hartman uart_unregister_driver(&serial_omap_reg); 1893ab4382d2SGreg Kroah-Hartman return ret; 1894ab4382d2SGreg Kroah-Hartman } 1895ab4382d2SGreg Kroah-Hartman 1896ab4382d2SGreg Kroah-Hartman static void __exit serial_omap_exit(void) 1897ab4382d2SGreg Kroah-Hartman { 1898ab4382d2SGreg Kroah-Hartman platform_driver_unregister(&serial_omap_driver); 1899ab4382d2SGreg Kroah-Hartman uart_unregister_driver(&serial_omap_reg); 1900ab4382d2SGreg Kroah-Hartman } 1901ab4382d2SGreg Kroah-Hartman 1902ab4382d2SGreg Kroah-Hartman module_init(serial_omap_init); 1903ab4382d2SGreg Kroah-Hartman module_exit(serial_omap_exit); 1904ab4382d2SGreg Kroah-Hartman 1905ab4382d2SGreg Kroah-Hartman MODULE_DESCRIPTION("OMAP High Speed UART driver"); 1906ab4382d2SGreg Kroah-Hartman MODULE_LICENSE("GPL"); 1907ab4382d2SGreg Kroah-Hartman MODULE_AUTHOR("Texas Instruments Inc"); 1908