1e3b3d0f5SGreg Kroah-Hartman // SPDX-License-Identifier: GPL-2.0+ 2ab4382d2SGreg Kroah-Hartman /* 3ab4382d2SGreg Kroah-Hartman * Driver for OMAP-UART controller. 4ab4382d2SGreg Kroah-Hartman * Based on drivers/serial/8250.c 5ab4382d2SGreg Kroah-Hartman * 6ab4382d2SGreg Kroah-Hartman * Copyright (C) 2010 Texas Instruments. 7ab4382d2SGreg Kroah-Hartman * 8ab4382d2SGreg Kroah-Hartman * Authors: 9ab4382d2SGreg Kroah-Hartman * Govindraj R <govindraj.raja@ti.com> 10ab4382d2SGreg Kroah-Hartman * Thara Gopinath <thara@ti.com> 11ab4382d2SGreg Kroah-Hartman * 1225985edcSLucas De Marchi * Note: This driver is made separate from 8250 driver as we cannot 13ab4382d2SGreg Kroah-Hartman * over load 8250 driver with omap platform specific configuration for 14ab4382d2SGreg Kroah-Hartman * features like DMA, it makes easier to implement features like DMA and 15ab4382d2SGreg Kroah-Hartman * hardware flow control and software flow control configuration with 16ab4382d2SGreg Kroah-Hartman * this driver as required for the omap-platform. 17ab4382d2SGreg Kroah-Hartman */ 18ab4382d2SGreg Kroah-Hartman 19ab4382d2SGreg Kroah-Hartman #include <linux/module.h> 20ab4382d2SGreg Kroah-Hartman #include <linux/init.h> 21ab4382d2SGreg Kroah-Hartman #include <linux/console.h> 22ab4382d2SGreg Kroah-Hartman #include <linux/serial_reg.h> 23ab4382d2SGreg Kroah-Hartman #include <linux/delay.h> 24ab4382d2SGreg Kroah-Hartman #include <linux/slab.h> 25ab4382d2SGreg Kroah-Hartman #include <linux/tty.h> 26ab4382d2SGreg Kroah-Hartman #include <linux/tty_flip.h> 27d21e4005SFelipe Balbi #include <linux/platform_device.h> 28ab4382d2SGreg Kroah-Hartman #include <linux/io.h> 29ab4382d2SGreg Kroah-Hartman #include <linux/clk.h> 30ab4382d2SGreg Kroah-Hartman #include <linux/serial_core.h> 31ab4382d2SGreg Kroah-Hartman #include <linux/irq.h> 32fcdca757SGovindraj.R #include <linux/pm_runtime.h> 33ee83bd3bSTony Lindgren #include <linux/pm_wakeirq.h> 34d92b0dfcSRajendra Nayak #include <linux/of.h> 352a0b965cSTony Lindgren #include <linux/of_irq.h> 365745fd0fSLinus Walleij #include <linux/gpio/consumer.h> 37d9ba5737STony Lindgren #include <linux/platform_data/serial-omap.h> 38ab4382d2SGreg Kroah-Hartman 397af0ea5dSNishanth Menon #define OMAP_MAX_HSUART_PORTS 10 40f91b55abSRussell King 417c77c8deSGovindraj.R #define UART_BUILD_REVISION(x, y) (((x) << 8) | (y)) 427c77c8deSGovindraj.R 437c77c8deSGovindraj.R #define OMAP_UART_REV_42 0x0402 447c77c8deSGovindraj.R #define OMAP_UART_REV_46 0x0406 457c77c8deSGovindraj.R #define OMAP_UART_REV_52 0x0502 467c77c8deSGovindraj.R #define OMAP_UART_REV_63 0x0603 477c77c8deSGovindraj.R 48f64ffda6SGovindraj.R #define OMAP_UART_TX_WAKEUP_EN BIT(7) 49f64ffda6SGovindraj.R 50f64ffda6SGovindraj.R /* Feature flags */ 51f64ffda6SGovindraj.R #define OMAP_UART_WER_HAS_TX_WAKEUP BIT(0) 52f64ffda6SGovindraj.R 53f91b55abSRussell King #define UART_ERRATA_i202_MDR1_ACCESS BIT(0) 54f91b55abSRussell King #define UART_ERRATA_i291_DMA_FORCEIDLE BIT(1) 55f91b55abSRussell King 568fe789dcSRajendra Nayak #define DEFAULT_CLK_SPEED 48000000 /* 48Mhz */ 578fe789dcSRajendra Nayak 580ba5f668SPaul Walmsley /* SCR register bitmasks */ 590ba5f668SPaul Walmsley #define OMAP_UART_SCR_RX_TRIG_GRANU1_MASK (1 << 7) 601776fd05SAlexey Pelykh #define OMAP_UART_SCR_TX_TRIG_GRANU1_MASK (1 << 6) 61f91b55abSRussell King #define OMAP_UART_SCR_TX_EMPTY (1 << 3) 620ba5f668SPaul Walmsley 630ba5f668SPaul Walmsley /* FCR register bitmasks */ 640ba5f668SPaul Walmsley #define OMAP_UART_FCR_RX_FIFO_TRIG_MASK (0x3 << 6) 656721ab7fSFelipe Balbi #define OMAP_UART_FCR_TX_FIFO_TRIG_MASK (0x3 << 4) 660ba5f668SPaul Walmsley 677c77c8deSGovindraj.R /* MVR register bitmasks */ 687c77c8deSGovindraj.R #define OMAP_UART_MVR_SCHEME_SHIFT 30 697c77c8deSGovindraj.R 707c77c8deSGovindraj.R #define OMAP_UART_LEGACY_MVR_MAJ_MASK 0xf0 717c77c8deSGovindraj.R #define OMAP_UART_LEGACY_MVR_MAJ_SHIFT 4 727c77c8deSGovindraj.R #define OMAP_UART_LEGACY_MVR_MIN_MASK 0x0f 737c77c8deSGovindraj.R 747c77c8deSGovindraj.R #define OMAP_UART_MVR_MAJ_MASK 0x700 757c77c8deSGovindraj.R #define OMAP_UART_MVR_MAJ_SHIFT 8 767c77c8deSGovindraj.R #define OMAP_UART_MVR_MIN_MASK 0x3f 777c77c8deSGovindraj.R 78f91b55abSRussell King #define OMAP_UART_DMA_CH_FREE -1 79f91b55abSRussell King 80f91b55abSRussell King #define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA 81f91b55abSRussell King #define OMAP_MODE13X_SPEED 230400 82f91b55abSRussell King 83f91b55abSRussell King /* WER = 0x7F 84f91b55abSRussell King * Enable module level wakeup in WER reg 85f91b55abSRussell King */ 86fbf7ebe4SPavel Machek #define OMAP_UART_WER_MOD_WKUP 0x7F 87f91b55abSRussell King 88f91b55abSRussell King /* Enable XON/XOFF flow control on output */ 893af08bd7SRussell King #define OMAP_UART_SW_TX 0x08 90f91b55abSRussell King 91f91b55abSRussell King /* Enable XON/XOFF flow control on input */ 923af08bd7SRussell King #define OMAP_UART_SW_RX 0x02 93f91b55abSRussell King 94f91b55abSRussell King #define OMAP_UART_SW_CLR 0xF0 95f91b55abSRussell King 96f91b55abSRussell King #define OMAP_UART_TCR_TRIG 0x0F 97f91b55abSRussell King 98f91b55abSRussell King struct uart_omap_dma { 99f91b55abSRussell King u8 uart_dma_tx; 100f91b55abSRussell King u8 uart_dma_rx; 101f91b55abSRussell King int rx_dma_channel; 102f91b55abSRussell King int tx_dma_channel; 103f91b55abSRussell King dma_addr_t rx_buf_dma_phys; 104f91b55abSRussell King dma_addr_t tx_buf_dma_phys; 105f91b55abSRussell King unsigned int uart_base; 106f91b55abSRussell King /* 107f91b55abSRussell King * Buffer for rx dma. It is not required for tx because the buffer 108f91b55abSRussell King * comes from port structure. 109f91b55abSRussell King */ 110f91b55abSRussell King unsigned char *rx_buf; 111f91b55abSRussell King unsigned int prev_rx_dma_pos; 112f91b55abSRussell King int tx_buf_size; 113f91b55abSRussell King int tx_dma_used; 114f91b55abSRussell King int rx_dma_used; 115f91b55abSRussell King spinlock_t tx_lock; 116f91b55abSRussell King spinlock_t rx_lock; 117f91b55abSRussell King /* timer to poll activity on rx dma */ 118f91b55abSRussell King struct timer_list rx_timer; 119f91b55abSRussell King unsigned int rx_buf_size; 120f91b55abSRussell King unsigned int rx_poll_rate; 121f91b55abSRussell King unsigned int rx_timeout; 122f91b55abSRussell King }; 123f91b55abSRussell King 124d37c6cebSFelipe Balbi struct uart_omap_port { 125d37c6cebSFelipe Balbi struct uart_port port; 126d37c6cebSFelipe Balbi struct uart_omap_dma uart_dma; 127d37c6cebSFelipe Balbi struct device *dev; 1282a0b965cSTony Lindgren int wakeirq; 129d37c6cebSFelipe Balbi 130d37c6cebSFelipe Balbi unsigned char ier; 131d37c6cebSFelipe Balbi unsigned char lcr; 132d37c6cebSFelipe Balbi unsigned char mcr; 133d37c6cebSFelipe Balbi unsigned char fcr; 134d37c6cebSFelipe Balbi unsigned char efr; 135d37c6cebSFelipe Balbi unsigned char dll; 136d37c6cebSFelipe Balbi unsigned char dlh; 137d37c6cebSFelipe Balbi unsigned char mdr1; 138d37c6cebSFelipe Balbi unsigned char scr; 139f64ffda6SGovindraj.R unsigned char wer; 140d37c6cebSFelipe Balbi 141d37c6cebSFelipe Balbi int use_dma; 142d37c6cebSFelipe Balbi /* 143d37c6cebSFelipe Balbi * Some bits in registers are cleared on a read, so they must 144fbf7ebe4SPavel Machek * be saved whenever the register is read, but the bits will not 145d37c6cebSFelipe Balbi * be immediately processed. 146d37c6cebSFelipe Balbi */ 147d37c6cebSFelipe Balbi unsigned int lsr_break_flag; 148d37c6cebSFelipe Balbi unsigned char msr_saved_flags; 149d37c6cebSFelipe Balbi char name[20]; 150d37c6cebSFelipe Balbi unsigned long port_activity; 15139aee51dSShubhrajyoti D int context_loss_cnt; 152d37c6cebSFelipe Balbi u32 errata; 153f64ffda6SGovindraj.R u32 features; 154d37c6cebSFelipe Balbi 1555745fd0fSLinus Walleij struct gpio_desc *rts_gpiod; 1564a0ac0f5SMark Jackson 157d37c6cebSFelipe Balbi struct pm_qos_request pm_qos_request; 158d37c6cebSFelipe Balbi u32 latency; 159d37c6cebSFelipe Balbi u32 calc_latency; 160d37c6cebSFelipe Balbi struct work_struct qos_work; 161ddd85e22SSourav Poddar bool is_suspending; 162e2a5e844SDario Binacchi 163e2a5e844SDario Binacchi unsigned int rs485_tx_filter_count; 164d37c6cebSFelipe Balbi }; 165d37c6cebSFelipe Balbi 166d37c6cebSFelipe Balbi #define to_uart_omap_port(p) ((container_of((p), struct uart_omap_port, port))) 167d37c6cebSFelipe Balbi 168ab4382d2SGreg Kroah-Hartman static struct uart_omap_port *ui[OMAP_MAX_HSUART_PORTS]; 169ab4382d2SGreg Kroah-Hartman 170ab4382d2SGreg Kroah-Hartman /* Forward declaration of functions */ 17194734749SGovindraj.R static void serial_omap_mdr1_errataset(struct uart_omap_port *up, u8 mdr1); 172ab4382d2SGreg Kroah-Hartman 173ab4382d2SGreg Kroah-Hartman static inline unsigned int serial_in(struct uart_omap_port *up, int offset) 174ab4382d2SGreg Kroah-Hartman { 175ab4382d2SGreg Kroah-Hartman offset <<= up->port.regshift; 176ab4382d2SGreg Kroah-Hartman return readw(up->port.membase + offset); 177ab4382d2SGreg Kroah-Hartman } 178ab4382d2SGreg Kroah-Hartman 179ab4382d2SGreg Kroah-Hartman static inline void serial_out(struct uart_omap_port *up, int offset, int value) 180ab4382d2SGreg Kroah-Hartman { 181ab4382d2SGreg Kroah-Hartman offset <<= up->port.regshift; 182ab4382d2SGreg Kroah-Hartman writew(value, up->port.membase + offset); 183ab4382d2SGreg Kroah-Hartman } 184ab4382d2SGreg Kroah-Hartman 185ab4382d2SGreg Kroah-Hartman static inline void serial_omap_clear_fifos(struct uart_omap_port *up) 186ab4382d2SGreg Kroah-Hartman { 187ab4382d2SGreg Kroah-Hartman serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO); 188ab4382d2SGreg Kroah-Hartman serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | 189ab4382d2SGreg Kroah-Hartman UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); 190ab4382d2SGreg Kroah-Hartman serial_out(up, UART_FCR, 0); 191ab4382d2SGreg Kroah-Hartman } 192ab4382d2SGreg Kroah-Hartman 193adfb9233SEzequiel Garcia #ifdef CONFIG_PM 194e5b57c03SFelipe Balbi static int serial_omap_get_context_loss_count(struct uart_omap_port *up) 195e5b57c03SFelipe Balbi { 196574de559SJingoo Han struct omap_uart_port_info *pdata = dev_get_platdata(up->dev); 197e5b57c03SFelipe Balbi 198ce2f08deSFelipe Balbi if (!pdata || !pdata->get_context_loss_count) 199a630fbfbSTony Lindgren return -EINVAL; 200e5b57c03SFelipe Balbi 201d8ee4ea6SFelipe Balbi return pdata->get_context_loss_count(up->dev); 202e5b57c03SFelipe Balbi } 203e5b57c03SFelipe Balbi 204ee83bd3bSTony Lindgren /* REVISIT: Remove this when omap3 boots in device tree only mode */ 205e5b57c03SFelipe Balbi static void serial_omap_enable_wakeup(struct uart_omap_port *up, bool enable) 206e5b57c03SFelipe Balbi { 207574de559SJingoo Han struct omap_uart_port_info *pdata = dev_get_platdata(up->dev); 208e5b57c03SFelipe Balbi 209ce2f08deSFelipe Balbi if (!pdata || !pdata->enable_wakeup) 210ce2f08deSFelipe Balbi return; 211ce2f08deSFelipe Balbi 212d8ee4ea6SFelipe Balbi pdata->enable_wakeup(up->dev, enable); 213e5b57c03SFelipe Balbi } 214adfb9233SEzequiel Garcia #endif /* CONFIG_PM */ 215e5b57c03SFelipe Balbi 216ab4382d2SGreg Kroah-Hartman /* 21713d6ceb4SFrans Klaver * Calculate the absolute difference between the desired and actual baud 21813d6ceb4SFrans Klaver * rate for the given mode. 21913d6ceb4SFrans Klaver */ 22013d6ceb4SFrans Klaver static inline int calculate_baud_abs_diff(struct uart_port *port, 22113d6ceb4SFrans Klaver unsigned int baud, unsigned int mode) 22213d6ceb4SFrans Klaver { 22313d6ceb4SFrans Klaver unsigned int n = port->uartclk / (mode * baud); 22413d6ceb4SFrans Klaver int abs_diff; 22513d6ceb4SFrans Klaver 22613d6ceb4SFrans Klaver if (n == 0) 22713d6ceb4SFrans Klaver n = 1; 22813d6ceb4SFrans Klaver 22913d6ceb4SFrans Klaver abs_diff = baud - (port->uartclk / (mode * n)); 23013d6ceb4SFrans Klaver if (abs_diff < 0) 23113d6ceb4SFrans Klaver abs_diff = -abs_diff; 23213d6ceb4SFrans Klaver 23313d6ceb4SFrans Klaver return abs_diff; 23413d6ceb4SFrans Klaver } 23513d6ceb4SFrans Klaver 23613d6ceb4SFrans Klaver /* 2375fe21236SAlexey Pelykh * serial_omap_baud_is_mode16 - check if baud rate is MODE16X 2385fe21236SAlexey Pelykh * @port: uart port info 2395fe21236SAlexey Pelykh * @baud: baudrate for which mode needs to be determined 2405fe21236SAlexey Pelykh * 2415fe21236SAlexey Pelykh * Returns true if baud rate is MODE16X and false if MODE13X 2425fe21236SAlexey Pelykh * Original table in OMAP TRM named "UART Mode Baud Rates, Divisor Values, 2435fe21236SAlexey Pelykh * and Error Rates" determines modes not for all common baud rates. 2445fe21236SAlexey Pelykh * E.g. for 1000000 baud rate mode must be 16x, but according to that 2455fe21236SAlexey Pelykh * table it's determined as 13x. 2465fe21236SAlexey Pelykh */ 2475fe21236SAlexey Pelykh static bool 2485fe21236SAlexey Pelykh serial_omap_baud_is_mode16(struct uart_port *port, unsigned int baud) 2495fe21236SAlexey Pelykh { 25013d6ceb4SFrans Klaver int abs_diff_13 = calculate_baud_abs_diff(port, baud, 13); 25113d6ceb4SFrans Klaver int abs_diff_16 = calculate_baud_abs_diff(port, baud, 16); 252dc318756SFrans Klaver 25313d6ceb4SFrans Klaver return (abs_diff_13 >= abs_diff_16); 2545fe21236SAlexey Pelykh } 2555fe21236SAlexey Pelykh 2565fe21236SAlexey Pelykh /* 257ab4382d2SGreg Kroah-Hartman * serial_omap_get_divisor - calculate divisor value 258ab4382d2SGreg Kroah-Hartman * @port: uart port info 259ab4382d2SGreg Kroah-Hartman * @baud: baudrate for which divisor needs to be calculated. 260ab4382d2SGreg Kroah-Hartman */ 261ab4382d2SGreg Kroah-Hartman static unsigned int 262ab4382d2SGreg Kroah-Hartman serial_omap_get_divisor(struct uart_port *port, unsigned int baud) 263ab4382d2SGreg Kroah-Hartman { 2644250b5d9SAlexey Pelykh unsigned int mode; 265ab4382d2SGreg Kroah-Hartman 2665fe21236SAlexey Pelykh if (!serial_omap_baud_is_mode16(port, baud)) 2674250b5d9SAlexey Pelykh mode = 13; 268ab4382d2SGreg Kroah-Hartman else 2694250b5d9SAlexey Pelykh mode = 16; 2704250b5d9SAlexey Pelykh return port->uartclk/(mode * baud); 271ab4382d2SGreg Kroah-Hartman } 272ab4382d2SGreg Kroah-Hartman 273ab4382d2SGreg Kroah-Hartman static void serial_omap_enable_ms(struct uart_port *port) 274ab4382d2SGreg Kroah-Hartman { 275c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 276ab4382d2SGreg Kroah-Hartman 277ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_enable_ms+%d\n", up->port.line); 278fcdca757SGovindraj.R 279d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 280ab4382d2SGreg Kroah-Hartman up->ier |= UART_IER_MSI; 281ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 282660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 283660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 284ab4382d2SGreg Kroah-Hartman } 285ab4382d2SGreg Kroah-Hartman 286ab4382d2SGreg Kroah-Hartman static void serial_omap_stop_tx(struct uart_port *port) 287ab4382d2SGreg Kroah-Hartman { 288c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 2894a0ac0f5SMark Jackson int res; 290ab4382d2SGreg Kroah-Hartman 291d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 2924a0ac0f5SMark Jackson 293018e7448SPhilippe Proulx /* Handle RS-485 */ 294dadd7ecbSRicardo Ribalda Delgado if (port->rs485.flags & SER_RS485_ENABLED) { 295018e7448SPhilippe Proulx if (up->scr & OMAP_UART_SCR_TX_EMPTY) { 296018e7448SPhilippe Proulx /* THR interrupt is fired when both TX FIFO and TX 297018e7448SPhilippe Proulx * shift register are empty. This means there's nothing 298018e7448SPhilippe Proulx * left to transmit now, so make sure the THR interrupt 299018e7448SPhilippe Proulx * is fired when TX FIFO is below the trigger level, 300018e7448SPhilippe Proulx * disable THR interrupts and toggle the RS-485 GPIO 301018e7448SPhilippe Proulx * data direction pin if needed. 302018e7448SPhilippe Proulx */ 303018e7448SPhilippe Proulx up->scr &= ~OMAP_UART_SCR_TX_EMPTY; 304018e7448SPhilippe Proulx serial_out(up, UART_OMAP_SCR, up->scr); 305dadd7ecbSRicardo Ribalda Delgado res = (port->rs485.flags & SER_RS485_RTS_AFTER_SEND) ? 306dadd7ecbSRicardo Ribalda Delgado 1 : 0; 30745f6b6dbSDario Binacchi if (up->rts_gpiod && 30845f6b6dbSDario Binacchi gpiod_get_value(up->rts_gpiod) != res) { 309dadd7ecbSRicardo Ribalda Delgado if (port->rs485.delay_rts_after_send > 0) 310dadd7ecbSRicardo Ribalda Delgado mdelay( 311dadd7ecbSRicardo Ribalda Delgado port->rs485.delay_rts_after_send); 3125745fd0fSLinus Walleij gpiod_set_value(up->rts_gpiod, res); 3134a0ac0f5SMark Jackson } 314018e7448SPhilippe Proulx } else { 315018e7448SPhilippe Proulx /* We're asked to stop, but there's still stuff in the 316018e7448SPhilippe Proulx * UART FIFO, so make sure the THR interrupt is fired 317018e7448SPhilippe Proulx * when both TX FIFO and TX shift register are empty. 318018e7448SPhilippe Proulx * The next THR interrupt (if no transmission is started 319018e7448SPhilippe Proulx * in the meantime) will indicate the end of a 320018e7448SPhilippe Proulx * transmission. Therefore we _don't_ disable THR 321018e7448SPhilippe Proulx * interrupts in this situation. 322018e7448SPhilippe Proulx */ 323018e7448SPhilippe Proulx up->scr |= OMAP_UART_SCR_TX_EMPTY; 324018e7448SPhilippe Proulx serial_out(up, UART_OMAP_SCR, up->scr); 325018e7448SPhilippe Proulx return; 3264a0ac0f5SMark Jackson } 3274a0ac0f5SMark Jackson } 3284a0ac0f5SMark Jackson 329ab4382d2SGreg Kroah-Hartman if (up->ier & UART_IER_THRI) { 330ab4382d2SGreg Kroah-Hartman up->ier &= ~UART_IER_THRI; 331ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 332ab4382d2SGreg Kroah-Hartman } 333fcdca757SGovindraj.R 334d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 335d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 336ab4382d2SGreg Kroah-Hartman } 337ab4382d2SGreg Kroah-Hartman 338ab4382d2SGreg Kroah-Hartman static void serial_omap_stop_rx(struct uart_port *port) 339ab4382d2SGreg Kroah-Hartman { 340c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 341ab4382d2SGreg Kroah-Hartman 342d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 343cab53dc9SDimitris Lampridis up->ier &= ~(UART_IER_RLSI | UART_IER_RDI); 344ab4382d2SGreg Kroah-Hartman up->port.read_status_mask &= ~UART_LSR_DR; 345ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 346d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 347d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 348ab4382d2SGreg Kroah-Hartman } 349ab4382d2SGreg Kroah-Hartman 350bf63a086SFelipe Balbi static void transmit_chars(struct uart_omap_port *up, unsigned int lsr) 351ab4382d2SGreg Kroah-Hartman { 352ab4382d2SGreg Kroah-Hartman struct circ_buf *xmit = &up->port.state->xmit; 353ab4382d2SGreg Kroah-Hartman int count; 354ab4382d2SGreg Kroah-Hartman 355ab4382d2SGreg Kroah-Hartman if (up->port.x_char) { 356ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TX, up->port.x_char); 357ab4382d2SGreg Kroah-Hartman up->port.icount.tx++; 358ab4382d2SGreg Kroah-Hartman up->port.x_char = 0; 359e2a5e844SDario Binacchi if ((up->port.rs485.flags & SER_RS485_ENABLED) && 360e2a5e844SDario Binacchi !(up->port.rs485.flags & SER_RS485_RX_DURING_TX)) 361e2a5e844SDario Binacchi up->rs485_tx_filter_count++; 362e2a5e844SDario Binacchi 363ab4382d2SGreg Kroah-Hartman return; 364ab4382d2SGreg Kroah-Hartman } 365ab4382d2SGreg Kroah-Hartman if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { 366ab4382d2SGreg Kroah-Hartman serial_omap_stop_tx(&up->port); 367ab4382d2SGreg Kroah-Hartman return; 368ab4382d2SGreg Kroah-Hartman } 369355fe568SGreg Kroah-Hartman count = up->port.fifosize / 4; 370ab4382d2SGreg Kroah-Hartman do { 371ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TX, xmit->buf[xmit->tail]); 372ab4382d2SGreg Kroah-Hartman xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 373ab4382d2SGreg Kroah-Hartman up->port.icount.tx++; 374e2a5e844SDario Binacchi if ((up->port.rs485.flags & SER_RS485_ENABLED) && 375e2a5e844SDario Binacchi !(up->port.rs485.flags & SER_RS485_RX_DURING_TX)) 376e2a5e844SDario Binacchi up->rs485_tx_filter_count++; 377e2a5e844SDario Binacchi 378ab4382d2SGreg Kroah-Hartman if (uart_circ_empty(xmit)) 379ab4382d2SGreg Kroah-Hartman break; 380ab4382d2SGreg Kroah-Hartman } while (--count > 0); 381ab4382d2SGreg Kroah-Hartman 3826bf78967SFelipe Balbi if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 383ab4382d2SGreg Kroah-Hartman uart_write_wakeup(&up->port); 384ab4382d2SGreg Kroah-Hartman 385ab4382d2SGreg Kroah-Hartman if (uart_circ_empty(xmit)) 386ab4382d2SGreg Kroah-Hartman serial_omap_stop_tx(&up->port); 387ab4382d2SGreg Kroah-Hartman } 388ab4382d2SGreg Kroah-Hartman 389ab4382d2SGreg Kroah-Hartman static inline void serial_omap_enable_ier_thri(struct uart_omap_port *up) 390ab4382d2SGreg Kroah-Hartman { 391ab4382d2SGreg Kroah-Hartman if (!(up->ier & UART_IER_THRI)) { 392ab4382d2SGreg Kroah-Hartman up->ier |= UART_IER_THRI; 393ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 394ab4382d2SGreg Kroah-Hartman } 395ab4382d2SGreg Kroah-Hartman } 396ab4382d2SGreg Kroah-Hartman 397ab4382d2SGreg Kroah-Hartman static void serial_omap_start_tx(struct uart_port *port) 398ab4382d2SGreg Kroah-Hartman { 399c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 4004a0ac0f5SMark Jackson int res; 401ab4382d2SGreg Kroah-Hartman 402d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 4034a0ac0f5SMark Jackson 404018e7448SPhilippe Proulx /* Handle RS-485 */ 405dadd7ecbSRicardo Ribalda Delgado if (port->rs485.flags & SER_RS485_ENABLED) { 406018e7448SPhilippe Proulx /* Fire THR interrupts when FIFO is below trigger level */ 407018e7448SPhilippe Proulx up->scr &= ~OMAP_UART_SCR_TX_EMPTY; 408018e7448SPhilippe Proulx serial_out(up, UART_OMAP_SCR, up->scr); 409018e7448SPhilippe Proulx 4104a0ac0f5SMark Jackson /* if rts not already enabled */ 411dadd7ecbSRicardo Ribalda Delgado res = (port->rs485.flags & SER_RS485_RTS_ON_SEND) ? 1 : 0; 41245f6b6dbSDario Binacchi if (up->rts_gpiod && gpiod_get_value(up->rts_gpiod) != res) { 4135745fd0fSLinus Walleij gpiod_set_value(up->rts_gpiod, res); 414dadd7ecbSRicardo Ribalda Delgado if (port->rs485.delay_rts_before_send > 0) 415dadd7ecbSRicardo Ribalda Delgado mdelay(port->rs485.delay_rts_before_send); 4164a0ac0f5SMark Jackson } 4174a0ac0f5SMark Jackson } 4184a0ac0f5SMark Jackson 419dadd7ecbSRicardo Ribalda Delgado if ((port->rs485.flags & SER_RS485_ENABLED) && 420dadd7ecbSRicardo Ribalda Delgado !(port->rs485.flags & SER_RS485_RX_DURING_TX)) 421e2a5e844SDario Binacchi up->rs485_tx_filter_count = 0; 4224a0ac0f5SMark Jackson 423ab4382d2SGreg Kroah-Hartman serial_omap_enable_ier_thri(up); 424d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 425d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 426ab4382d2SGreg Kroah-Hartman } 427ab4382d2SGreg Kroah-Hartman 4283af08bd7SRussell King static void serial_omap_throttle(struct uart_port *port) 4293af08bd7SRussell King { 4303af08bd7SRussell King struct uart_omap_port *up = to_uart_omap_port(port); 4313af08bd7SRussell King unsigned long flags; 4323af08bd7SRussell King 4333af08bd7SRussell King pm_runtime_get_sync(up->dev); 4343af08bd7SRussell King spin_lock_irqsave(&up->port.lock, flags); 4353af08bd7SRussell King up->ier &= ~(UART_IER_RLSI | UART_IER_RDI); 4363af08bd7SRussell King serial_out(up, UART_IER, up->ier); 4373af08bd7SRussell King spin_unlock_irqrestore(&up->port.lock, flags); 4383af08bd7SRussell King pm_runtime_mark_last_busy(up->dev); 4393af08bd7SRussell King pm_runtime_put_autosuspend(up->dev); 4403af08bd7SRussell King } 4413af08bd7SRussell King 4423af08bd7SRussell King static void serial_omap_unthrottle(struct uart_port *port) 4433af08bd7SRussell King { 4443af08bd7SRussell King struct uart_omap_port *up = to_uart_omap_port(port); 4453af08bd7SRussell King unsigned long flags; 4463af08bd7SRussell King 4473af08bd7SRussell King pm_runtime_get_sync(up->dev); 4483af08bd7SRussell King spin_lock_irqsave(&up->port.lock, flags); 4493af08bd7SRussell King up->ier |= UART_IER_RLSI | UART_IER_RDI; 4503af08bd7SRussell King serial_out(up, UART_IER, up->ier); 4513af08bd7SRussell King spin_unlock_irqrestore(&up->port.lock, flags); 4523af08bd7SRussell King pm_runtime_mark_last_busy(up->dev); 4533af08bd7SRussell King pm_runtime_put_autosuspend(up->dev); 4543af08bd7SRussell King } 4553af08bd7SRussell King 456ab4382d2SGreg Kroah-Hartman static unsigned int check_modem_status(struct uart_omap_port *up) 457ab4382d2SGreg Kroah-Hartman { 458ab4382d2SGreg Kroah-Hartman unsigned int status; 459ab4382d2SGreg Kroah-Hartman 460ab4382d2SGreg Kroah-Hartman status = serial_in(up, UART_MSR); 461ab4382d2SGreg Kroah-Hartman status |= up->msr_saved_flags; 462ab4382d2SGreg Kroah-Hartman up->msr_saved_flags = 0; 463ab4382d2SGreg Kroah-Hartman if ((status & UART_MSR_ANY_DELTA) == 0) 464ab4382d2SGreg Kroah-Hartman return status; 465ab4382d2SGreg Kroah-Hartman 466ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI && 467ab4382d2SGreg Kroah-Hartman up->port.state != NULL) { 468ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_TERI) 469ab4382d2SGreg Kroah-Hartman up->port.icount.rng++; 470ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DDSR) 471ab4382d2SGreg Kroah-Hartman up->port.icount.dsr++; 472ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DDCD) 473ab4382d2SGreg Kroah-Hartman uart_handle_dcd_change 474ab4382d2SGreg Kroah-Hartman (&up->port, status & UART_MSR_DCD); 475ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DCTS) 476ab4382d2SGreg Kroah-Hartman uart_handle_cts_change 477ab4382d2SGreg Kroah-Hartman (&up->port, status & UART_MSR_CTS); 478ab4382d2SGreg Kroah-Hartman wake_up_interruptible(&up->port.state->port.delta_msr_wait); 479ab4382d2SGreg Kroah-Hartman } 480ab4382d2SGreg Kroah-Hartman 481ab4382d2SGreg Kroah-Hartman return status; 482ab4382d2SGreg Kroah-Hartman } 483ab4382d2SGreg Kroah-Hartman 48472256cbdSFelipe Balbi static void serial_omap_rlsi(struct uart_omap_port *up, unsigned int lsr) 48572256cbdSFelipe Balbi { 48672256cbdSFelipe Balbi unsigned int flag; 4879a12fcf8SShubhrajyoti D 488e83c6587SXiongfeng Wang /* 489e83c6587SXiongfeng Wang * Read one data character out to avoid stalling the receiver according 490e83c6587SXiongfeng Wang * to the table 23-246 of the omap4 TRM. 491e83c6587SXiongfeng Wang */ 492e2a5e844SDario Binacchi if (likely(lsr & UART_LSR_DR)) { 493e83c6587SXiongfeng Wang serial_in(up, UART_RX); 494e2a5e844SDario Binacchi if ((up->port.rs485.flags & SER_RS485_ENABLED) && 495e2a5e844SDario Binacchi !(up->port.rs485.flags & SER_RS485_RX_DURING_TX) && 496e2a5e844SDario Binacchi up->rs485_tx_filter_count) 497e2a5e844SDario Binacchi up->rs485_tx_filter_count--; 498e2a5e844SDario Binacchi } 49972256cbdSFelipe Balbi 50072256cbdSFelipe Balbi up->port.icount.rx++; 50172256cbdSFelipe Balbi flag = TTY_NORMAL; 50272256cbdSFelipe Balbi 50372256cbdSFelipe Balbi if (lsr & UART_LSR_BI) { 50472256cbdSFelipe Balbi flag = TTY_BREAK; 50572256cbdSFelipe Balbi lsr &= ~(UART_LSR_FE | UART_LSR_PE); 50672256cbdSFelipe Balbi up->port.icount.brk++; 50772256cbdSFelipe Balbi /* 50872256cbdSFelipe Balbi * We do the SysRQ and SAK checking 50972256cbdSFelipe Balbi * here because otherwise the break 51072256cbdSFelipe Balbi * may get masked by ignore_status_mask 51172256cbdSFelipe Balbi * or read_status_mask. 51272256cbdSFelipe Balbi */ 51372256cbdSFelipe Balbi if (uart_handle_break(&up->port)) 51472256cbdSFelipe Balbi return; 51572256cbdSFelipe Balbi 51672256cbdSFelipe Balbi } 51772256cbdSFelipe Balbi 51872256cbdSFelipe Balbi if (lsr & UART_LSR_PE) { 51972256cbdSFelipe Balbi flag = TTY_PARITY; 52072256cbdSFelipe Balbi up->port.icount.parity++; 52172256cbdSFelipe Balbi } 52272256cbdSFelipe Balbi 52372256cbdSFelipe Balbi if (lsr & UART_LSR_FE) { 52472256cbdSFelipe Balbi flag = TTY_FRAME; 52572256cbdSFelipe Balbi up->port.icount.frame++; 52672256cbdSFelipe Balbi } 52772256cbdSFelipe Balbi 52872256cbdSFelipe Balbi if (lsr & UART_LSR_OE) 52972256cbdSFelipe Balbi up->port.icount.overrun++; 53072256cbdSFelipe Balbi 53172256cbdSFelipe Balbi #ifdef CONFIG_SERIAL_OMAP_CONSOLE 53272256cbdSFelipe Balbi if (up->port.line == up->port.cons->index) { 53372256cbdSFelipe Balbi /* Recover the break flag from console xmit */ 53472256cbdSFelipe Balbi lsr |= up->lsr_break_flag; 53572256cbdSFelipe Balbi } 53672256cbdSFelipe Balbi #endif 53772256cbdSFelipe Balbi uart_insert_char(&up->port, lsr, UART_LSR_OE, 0, flag); 53872256cbdSFelipe Balbi } 53972256cbdSFelipe Balbi 54072256cbdSFelipe Balbi static void serial_omap_rdi(struct uart_omap_port *up, unsigned int lsr) 54172256cbdSFelipe Balbi { 54272256cbdSFelipe Balbi unsigned char ch = 0; 54372256cbdSFelipe Balbi unsigned int flag; 54472256cbdSFelipe Balbi 54572256cbdSFelipe Balbi if (!(lsr & UART_LSR_DR)) 54672256cbdSFelipe Balbi return; 54772256cbdSFelipe Balbi 54872256cbdSFelipe Balbi ch = serial_in(up, UART_RX); 549e2a5e844SDario Binacchi if ((up->port.rs485.flags & SER_RS485_ENABLED) && 550e2a5e844SDario Binacchi !(up->port.rs485.flags & SER_RS485_RX_DURING_TX) && 551e2a5e844SDario Binacchi up->rs485_tx_filter_count) { 552e2a5e844SDario Binacchi up->rs485_tx_filter_count--; 553e2a5e844SDario Binacchi return; 554e2a5e844SDario Binacchi } 555e2a5e844SDario Binacchi 55672256cbdSFelipe Balbi flag = TTY_NORMAL; 55772256cbdSFelipe Balbi up->port.icount.rx++; 55872256cbdSFelipe Balbi 55972256cbdSFelipe Balbi if (uart_handle_sysrq_char(&up->port, ch)) 56072256cbdSFelipe Balbi return; 56172256cbdSFelipe Balbi 56272256cbdSFelipe Balbi uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag); 56372256cbdSFelipe Balbi } 56472256cbdSFelipe Balbi 565ab4382d2SGreg Kroah-Hartman /** 566ab4382d2SGreg Kroah-Hartman * serial_omap_irq() - This handles the interrupt from one port 567ab4382d2SGreg Kroah-Hartman * @irq: uart port irq number 568ab4382d2SGreg Kroah-Hartman * @dev_id: uart port info 569ab4382d2SGreg Kroah-Hartman */ 57052c5513dSFelipe Balbi static irqreturn_t serial_omap_irq(int irq, void *dev_id) 571ab4382d2SGreg Kroah-Hartman { 572ab4382d2SGreg Kroah-Hartman struct uart_omap_port *up = dev_id; 573ab4382d2SGreg Kroah-Hartman unsigned int iir, lsr; 57481b75aefSFelipe Balbi unsigned int type; 5757b013e44SGreg Kroah-Hartman irqreturn_t ret = IRQ_NONE; 57672256cbdSFelipe Balbi int max_count = 256; 577ab4382d2SGreg Kroah-Hartman 5786c3a30c7SFelipe Balbi spin_lock(&up->port.lock); 57981b75aefSFelipe Balbi pm_runtime_get_sync(up->dev); 58072256cbdSFelipe Balbi 58172256cbdSFelipe Balbi do { 58281b75aefSFelipe Balbi iir = serial_in(up, UART_IIR); 58381b75aefSFelipe Balbi if (iir & UART_IIR_NO_INT) 58472256cbdSFelipe Balbi break; 58581b75aefSFelipe Balbi 5867b013e44SGreg Kroah-Hartman ret = IRQ_HANDLED; 587ab4382d2SGreg Kroah-Hartman lsr = serial_in(up, UART_LSR); 58881b75aefSFelipe Balbi 58981b75aefSFelipe Balbi /* extract IRQ type from IIR register */ 59081b75aefSFelipe Balbi type = iir & 0x3e; 59181b75aefSFelipe Balbi 59281b75aefSFelipe Balbi switch (type) { 59381b75aefSFelipe Balbi case UART_IIR_MSI: 59481b75aefSFelipe Balbi check_modem_status(up); 59581b75aefSFelipe Balbi break; 59681b75aefSFelipe Balbi case UART_IIR_THRI: 597bf63a086SFelipe Balbi transmit_chars(up, lsr); 59881b75aefSFelipe Balbi break; 59972256cbdSFelipe Balbi case UART_IIR_RX_TIMEOUT: 60081b75aefSFelipe Balbi case UART_IIR_RDI: 60172256cbdSFelipe Balbi serial_omap_rdi(up, lsr); 60281b75aefSFelipe Balbi break; 60381b75aefSFelipe Balbi case UART_IIR_RLSI: 60472256cbdSFelipe Balbi serial_omap_rlsi(up, lsr); 60581b75aefSFelipe Balbi break; 60681b75aefSFelipe Balbi case UART_IIR_CTS_RTS_DSR: 60772256cbdSFelipe Balbi /* simply try again */ 60872256cbdSFelipe Balbi break; 60981b75aefSFelipe Balbi case UART_IIR_XOFF: 61081b75aefSFelipe Balbi default: 61181b75aefSFelipe Balbi break; 612ab4382d2SGreg Kroah-Hartman } 613e60f9fd0SMartin Townsend } while (max_count--); 614ab4382d2SGreg Kroah-Hartman 6156c3a30c7SFelipe Balbi spin_unlock(&up->port.lock); 61672256cbdSFelipe Balbi 6172e124b4aSJiri Slaby tty_flip_buffer_push(&up->port.state->port); 61872256cbdSFelipe Balbi 619d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 620d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 621ab4382d2SGreg Kroah-Hartman up->port_activity = jiffies; 62281b75aefSFelipe Balbi 6237b013e44SGreg Kroah-Hartman return ret; 624ab4382d2SGreg Kroah-Hartman } 625ab4382d2SGreg Kroah-Hartman 626ab4382d2SGreg Kroah-Hartman static unsigned int serial_omap_tx_empty(struct uart_port *port) 627ab4382d2SGreg Kroah-Hartman { 628c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 629*18ee37e1SJohan Hovold unsigned long flags; 630ab4382d2SGreg Kroah-Hartman unsigned int ret = 0; 631ab4382d2SGreg Kroah-Hartman 632d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 633ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_tx_empty+%d\n", up->port.line); 634ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags); 635ab4382d2SGreg Kroah-Hartman ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0; 636ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags); 637660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 638660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 639ab4382d2SGreg Kroah-Hartman return ret; 640ab4382d2SGreg Kroah-Hartman } 641ab4382d2SGreg Kroah-Hartman 642ab4382d2SGreg Kroah-Hartman static unsigned int serial_omap_get_mctrl(struct uart_port *port) 643ab4382d2SGreg Kroah-Hartman { 644c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 645514f31d1SShubhrajyoti D unsigned int status; 646ab4382d2SGreg Kroah-Hartman unsigned int ret = 0; 647ab4382d2SGreg Kroah-Hartman 648d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 649ab4382d2SGreg Kroah-Hartman status = check_modem_status(up); 650660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 651660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 652fcdca757SGovindraj.R 653ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_get_mctrl+%d\n", up->port.line); 654ab4382d2SGreg Kroah-Hartman 655ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DCD) 656ab4382d2SGreg Kroah-Hartman ret |= TIOCM_CAR; 657ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_RI) 658ab4382d2SGreg Kroah-Hartman ret |= TIOCM_RNG; 659ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DSR) 660ab4382d2SGreg Kroah-Hartman ret |= TIOCM_DSR; 661ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_CTS) 662ab4382d2SGreg Kroah-Hartman ret |= TIOCM_CTS; 663ab4382d2SGreg Kroah-Hartman return ret; 664ab4382d2SGreg Kroah-Hartman } 665ab4382d2SGreg Kroah-Hartman 666ab4382d2SGreg Kroah-Hartman static void serial_omap_set_mctrl(struct uart_port *port, unsigned int mctrl) 667ab4382d2SGreg Kroah-Hartman { 668c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 669348f9bb3SPeter Hurley unsigned char mcr = 0, old_mcr, lcr; 670ab4382d2SGreg Kroah-Hartman 671ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_set_mctrl+%d\n", up->port.line); 672ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_RTS) 673ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_RTS; 674ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_DTR) 675ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_DTR; 676ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_OUT1) 677ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_OUT1; 678ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_OUT2) 679ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_OUT2; 680ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_LOOP) 681ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_LOOP; 682ab4382d2SGreg Kroah-Hartman 683d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 6849363f8faSRussell King old_mcr = serial_in(up, UART_MCR); 6859363f8faSRussell King old_mcr &= ~(UART_MCR_LOOP | UART_MCR_OUT2 | UART_MCR_OUT1 | 6869363f8faSRussell King UART_MCR_DTR | UART_MCR_RTS); 6879363f8faSRussell King up->mcr = old_mcr | mcr; 688c538d20cSGovindraj.R serial_out(up, UART_MCR, up->mcr); 689348f9bb3SPeter Hurley 690348f9bb3SPeter Hurley /* Turn off autoRTS if RTS is lowered; restore autoRTS if RTS raised */ 691348f9bb3SPeter Hurley lcr = serial_in(up, UART_LCR); 692348f9bb3SPeter Hurley serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 693348f9bb3SPeter Hurley if ((mctrl & TIOCM_RTS) && (port->status & UPSTAT_AUTORTS)) 694348f9bb3SPeter Hurley up->efr |= UART_EFR_RTS; 695348f9bb3SPeter Hurley else 6962a71de2fSLukas Wunner up->efr &= ~UART_EFR_RTS; 697348f9bb3SPeter Hurley serial_out(up, UART_EFR, up->efr); 698348f9bb3SPeter Hurley serial_out(up, UART_LCR, lcr); 699348f9bb3SPeter Hurley 700660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 701660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 702ab4382d2SGreg Kroah-Hartman } 703ab4382d2SGreg Kroah-Hartman 704ab4382d2SGreg Kroah-Hartman static void serial_omap_break_ctl(struct uart_port *port, int break_state) 705ab4382d2SGreg Kroah-Hartman { 706c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 707*18ee37e1SJohan Hovold unsigned long flags; 708ab4382d2SGreg Kroah-Hartman 709ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_break_ctl+%d\n", up->port.line); 710d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 711ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags); 712ab4382d2SGreg Kroah-Hartman if (break_state == -1) 713ab4382d2SGreg Kroah-Hartman up->lcr |= UART_LCR_SBC; 714ab4382d2SGreg Kroah-Hartman else 715ab4382d2SGreg Kroah-Hartman up->lcr &= ~UART_LCR_SBC; 716ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, up->lcr); 717ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags); 718660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 719660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 720ab4382d2SGreg Kroah-Hartman } 721ab4382d2SGreg Kroah-Hartman 722ab4382d2SGreg Kroah-Hartman static int serial_omap_startup(struct uart_port *port) 723ab4382d2SGreg Kroah-Hartman { 724c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 725*18ee37e1SJohan Hovold unsigned long flags; 726ab4382d2SGreg Kroah-Hartman int retval; 727ab4382d2SGreg Kroah-Hartman 728ab4382d2SGreg Kroah-Hartman /* 729ab4382d2SGreg Kroah-Hartman * Allocate the IRQ 730ab4382d2SGreg Kroah-Hartman */ 731ab4382d2SGreg Kroah-Hartman retval = request_irq(up->port.irq, serial_omap_irq, up->port.irqflags, 732ab4382d2SGreg Kroah-Hartman up->name, up); 733ab4382d2SGreg Kroah-Hartman if (retval) 734ab4382d2SGreg Kroah-Hartman return retval; 735ab4382d2SGreg Kroah-Hartman 7362a0b965cSTony Lindgren /* Optional wake-up IRQ */ 7372a0b965cSTony Lindgren if (up->wakeirq) { 738ee83bd3bSTony Lindgren retval = dev_pm_set_dedicated_wake_irq(up->dev, up->wakeirq); 7392a0b965cSTony Lindgren if (retval) { 7402a0b965cSTony Lindgren free_irq(up->port.irq, up); 7412a0b965cSTony Lindgren return retval; 7422a0b965cSTony Lindgren } 7432a0b965cSTony Lindgren } 7442a0b965cSTony Lindgren 745ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_startup+%d\n", up->port.line); 746ab4382d2SGreg Kroah-Hartman 747d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 748ab4382d2SGreg Kroah-Hartman /* 749ab4382d2SGreg Kroah-Hartman * Clear the FIFO buffers and disable them. 750ab4382d2SGreg Kroah-Hartman * (they will be reenabled in set_termios()) 751ab4382d2SGreg Kroah-Hartman */ 752ab4382d2SGreg Kroah-Hartman serial_omap_clear_fifos(up); 753ab4382d2SGreg Kroah-Hartman 754ab4382d2SGreg Kroah-Hartman /* 755ab4382d2SGreg Kroah-Hartman * Clear the interrupt registers. 756ab4382d2SGreg Kroah-Hartman */ 757ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_LSR); 758ab4382d2SGreg Kroah-Hartman if (serial_in(up, UART_LSR) & UART_LSR_DR) 759ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_RX); 760ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_IIR); 761ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_MSR); 762ab4382d2SGreg Kroah-Hartman 763ab4382d2SGreg Kroah-Hartman /* 764ab4382d2SGreg Kroah-Hartman * Now, initialize the UART 765ab4382d2SGreg Kroah-Hartman */ 766ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_WLEN8); 767ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags); 768ab4382d2SGreg Kroah-Hartman /* 769ab4382d2SGreg Kroah-Hartman * Most PC uarts need OUT2 raised to enable interrupts. 770ab4382d2SGreg Kroah-Hartman */ 771ab4382d2SGreg Kroah-Hartman up->port.mctrl |= TIOCM_OUT2; 772ab4382d2SGreg Kroah-Hartman serial_omap_set_mctrl(&up->port, up->port.mctrl); 773ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags); 774ab4382d2SGreg Kroah-Hartman 775ab4382d2SGreg Kroah-Hartman up->msr_saved_flags = 0; 776ab4382d2SGreg Kroah-Hartman /* 777ab4382d2SGreg Kroah-Hartman * Finally, enable interrupts. Note: Modem status interrupts 778ab4382d2SGreg Kroah-Hartman * are set via set_termios(), which will be occurring imminently 779ab4382d2SGreg Kroah-Hartman * anyway, so we don't enable them here. 780ab4382d2SGreg Kroah-Hartman */ 781ab4382d2SGreg Kroah-Hartman up->ier = UART_IER_RLSI | UART_IER_RDI; 782ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 783ab4382d2SGreg Kroah-Hartman 78478841462SJarkko Nikula /* Enable module level wake up */ 785f64ffda6SGovindraj.R up->wer = OMAP_UART_WER_MOD_WKUP; 786f64ffda6SGovindraj.R if (up->features & OMAP_UART_WER_HAS_TX_WAKEUP) 787f64ffda6SGovindraj.R up->wer |= OMAP_UART_TX_WAKEUP_EN; 788f64ffda6SGovindraj.R 789f64ffda6SGovindraj.R serial_out(up, UART_OMAP_WER, up->wer); 79078841462SJarkko Nikula 791d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 792d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 793ab4382d2SGreg Kroah-Hartman up->port_activity = jiffies; 794ab4382d2SGreg Kroah-Hartman return 0; 795ab4382d2SGreg Kroah-Hartman } 796ab4382d2SGreg Kroah-Hartman 797ab4382d2SGreg Kroah-Hartman static void serial_omap_shutdown(struct uart_port *port) 798ab4382d2SGreg Kroah-Hartman { 799c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 800*18ee37e1SJohan Hovold unsigned long flags; 801ab4382d2SGreg Kroah-Hartman 802ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_shutdown+%d\n", up->port.line); 803fcdca757SGovindraj.R 804d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 805ab4382d2SGreg Kroah-Hartman /* 806ab4382d2SGreg Kroah-Hartman * Disable interrupts from this port 807ab4382d2SGreg Kroah-Hartman */ 808ab4382d2SGreg Kroah-Hartman up->ier = 0; 809ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, 0); 810ab4382d2SGreg Kroah-Hartman 811ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags); 812ab4382d2SGreg Kroah-Hartman up->port.mctrl &= ~TIOCM_OUT2; 813ab4382d2SGreg Kroah-Hartman serial_omap_set_mctrl(&up->port, up->port.mctrl); 814ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags); 815ab4382d2SGreg Kroah-Hartman 816ab4382d2SGreg Kroah-Hartman /* 817ab4382d2SGreg Kroah-Hartman * Disable break condition and FIFOs 818ab4382d2SGreg Kroah-Hartman */ 819ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC); 820ab4382d2SGreg Kroah-Hartman serial_omap_clear_fifos(up); 821ab4382d2SGreg Kroah-Hartman 822ab4382d2SGreg Kroah-Hartman /* 823ab4382d2SGreg Kroah-Hartman * Read data port to reset things, and then free the irq 824ab4382d2SGreg Kroah-Hartman */ 825ab4382d2SGreg Kroah-Hartman if (serial_in(up, UART_LSR) & UART_LSR_DR) 826ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_RX); 827fcdca757SGovindraj.R 828660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 829660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 830ab4382d2SGreg Kroah-Hartman free_irq(up->port.irq, up); 831ee83bd3bSTony Lindgren dev_pm_clear_wake_irq(up->dev); 832ab4382d2SGreg Kroah-Hartman } 833ab4382d2SGreg Kroah-Hartman 8342fd14964SGovindraj.R static void serial_omap_uart_qos_work(struct work_struct *work) 8352fd14964SGovindraj.R { 8362fd14964SGovindraj.R struct uart_omap_port *up = container_of(work, struct uart_omap_port, 8372fd14964SGovindraj.R qos_work); 8382fd14964SGovindraj.R 83901d2b189SRafael J. Wysocki cpu_latency_qos_update_request(&up->pm_qos_request, up->latency); 8402fd14964SGovindraj.R } 8412fd14964SGovindraj.R 842ab4382d2SGreg Kroah-Hartman static void 843ab4382d2SGreg Kroah-Hartman serial_omap_set_termios(struct uart_port *port, struct ktermios *termios, 844ab4382d2SGreg Kroah-Hartman struct ktermios *old) 845ab4382d2SGreg Kroah-Hartman { 846c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 847ab4382d2SGreg Kroah-Hartman unsigned char cval = 0; 848*18ee37e1SJohan Hovold unsigned long flags; 849ab4382d2SGreg Kroah-Hartman unsigned int baud, quot; 850ab4382d2SGreg Kroah-Hartman 851ab4382d2SGreg Kroah-Hartman switch (termios->c_cflag & CSIZE) { 852ab4382d2SGreg Kroah-Hartman case CS5: 853ab4382d2SGreg Kroah-Hartman cval = UART_LCR_WLEN5; 854ab4382d2SGreg Kroah-Hartman break; 855ab4382d2SGreg Kroah-Hartman case CS6: 856ab4382d2SGreg Kroah-Hartman cval = UART_LCR_WLEN6; 857ab4382d2SGreg Kroah-Hartman break; 858ab4382d2SGreg Kroah-Hartman case CS7: 859ab4382d2SGreg Kroah-Hartman cval = UART_LCR_WLEN7; 860ab4382d2SGreg Kroah-Hartman break; 861ab4382d2SGreg Kroah-Hartman default: 862ab4382d2SGreg Kroah-Hartman case CS8: 863ab4382d2SGreg Kroah-Hartman cval = UART_LCR_WLEN8; 864ab4382d2SGreg Kroah-Hartman break; 865ab4382d2SGreg Kroah-Hartman } 866ab4382d2SGreg Kroah-Hartman 867ab4382d2SGreg Kroah-Hartman if (termios->c_cflag & CSTOPB) 868ab4382d2SGreg Kroah-Hartman cval |= UART_LCR_STOP; 869ab4382d2SGreg Kroah-Hartman if (termios->c_cflag & PARENB) 870ab4382d2SGreg Kroah-Hartman cval |= UART_LCR_PARITY; 871ab4382d2SGreg Kroah-Hartman if (!(termios->c_cflag & PARODD)) 872ab4382d2SGreg Kroah-Hartman cval |= UART_LCR_EPAR; 873fdbc7353SEnric Balletbo i Serra if (termios->c_cflag & CMSPAR) 874fdbc7353SEnric Balletbo i Serra cval |= UART_LCR_SPAR; 875ab4382d2SGreg Kroah-Hartman 876ab4382d2SGreg Kroah-Hartman /* 877ab4382d2SGreg Kroah-Hartman * Ask the core to calculate the divisor for us. 878ab4382d2SGreg Kroah-Hartman */ 879ab4382d2SGreg Kroah-Hartman 880ab4382d2SGreg Kroah-Hartman baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/13); 881ab4382d2SGreg Kroah-Hartman quot = serial_omap_get_divisor(port, baud); 882ab4382d2SGreg Kroah-Hartman 8832fd14964SGovindraj.R /* calculate wakeup latency constraint */ 88419723452SPaul Walmsley up->calc_latency = (USEC_PER_SEC * up->port.fifosize) / (baud / 8); 8852fd14964SGovindraj.R up->latency = up->calc_latency; 8862fd14964SGovindraj.R schedule_work(&up->qos_work); 8872fd14964SGovindraj.R 888c538d20cSGovindraj.R up->dll = quot & 0xff; 889c538d20cSGovindraj.R up->dlh = quot >> 8; 890c538d20cSGovindraj.R up->mdr1 = UART_OMAP_MDR1_DISABLE; 891c538d20cSGovindraj.R 892ab4382d2SGreg Kroah-Hartman up->fcr = UART_FCR_R_TRIG_01 | UART_FCR_T_TRIG_01 | 893ab4382d2SGreg Kroah-Hartman UART_FCR_ENABLE_FIFO; 894ab4382d2SGreg Kroah-Hartman 895ab4382d2SGreg Kroah-Hartman /* 896ab4382d2SGreg Kroah-Hartman * Ok, we're now changing the port state. Do it with 897ab4382d2SGreg Kroah-Hartman * interrupts disabled. 898ab4382d2SGreg Kroah-Hartman */ 899d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 900ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags); 901ab4382d2SGreg Kroah-Hartman 902ab4382d2SGreg Kroah-Hartman /* 903ab4382d2SGreg Kroah-Hartman * Update the per-port timeout. 904ab4382d2SGreg Kroah-Hartman */ 905ab4382d2SGreg Kroah-Hartman uart_update_timeout(port, termios->c_cflag, baud); 906ab4382d2SGreg Kroah-Hartman 907ab4382d2SGreg Kroah-Hartman up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; 908ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & INPCK) 909ab4382d2SGreg Kroah-Hartman up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE; 910ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & (BRKINT | PARMRK)) 911ab4382d2SGreg Kroah-Hartman up->port.read_status_mask |= UART_LSR_BI; 912ab4382d2SGreg Kroah-Hartman 913ab4382d2SGreg Kroah-Hartman /* 914ab4382d2SGreg Kroah-Hartman * Characters to ignore 915ab4382d2SGreg Kroah-Hartman */ 916ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask = 0; 917ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IGNPAR) 918ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE; 919ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IGNBRK) { 920ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask |= UART_LSR_BI; 921ab4382d2SGreg Kroah-Hartman /* 922ab4382d2SGreg Kroah-Hartman * If we're ignoring parity and break indicators, 923ab4382d2SGreg Kroah-Hartman * ignore overruns too (for real raw support). 924ab4382d2SGreg Kroah-Hartman */ 925ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IGNPAR) 926ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask |= UART_LSR_OE; 927ab4382d2SGreg Kroah-Hartman } 928ab4382d2SGreg Kroah-Hartman 929ab4382d2SGreg Kroah-Hartman /* 930ab4382d2SGreg Kroah-Hartman * ignore all characters if CREAD is not set 931ab4382d2SGreg Kroah-Hartman */ 932ab4382d2SGreg Kroah-Hartman if ((termios->c_cflag & CREAD) == 0) 933ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask |= UART_LSR_DR; 934ab4382d2SGreg Kroah-Hartman 935ab4382d2SGreg Kroah-Hartman /* 936ab4382d2SGreg Kroah-Hartman * Modem status interrupts 937ab4382d2SGreg Kroah-Hartman */ 938ab4382d2SGreg Kroah-Hartman up->ier &= ~UART_IER_MSI; 939ab4382d2SGreg Kroah-Hartman if (UART_ENABLE_MS(&up->port, termios->c_cflag)) 940ab4382d2SGreg Kroah-Hartman up->ier |= UART_IER_MSI; 941ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 942ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, cval); /* reset DLAB */ 943c538d20cSGovindraj.R up->lcr = cval; 9441776fd05SAlexey Pelykh up->scr = 0; 945ab4382d2SGreg Kroah-Hartman 946ab4382d2SGreg Kroah-Hartman /* FIFOs and DMA Settings */ 947ab4382d2SGreg Kroah-Hartman 948ab4382d2SGreg Kroah-Hartman /* FCR can be changed only when the 949ab4382d2SGreg Kroah-Hartman * baud clock is not running 950ab4382d2SGreg Kroah-Hartman * DLL_REG and DLH_REG set to 0. 951ab4382d2SGreg Kroah-Hartman */ 952ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 953ab4382d2SGreg Kroah-Hartman serial_out(up, UART_DLL, 0); 954ab4382d2SGreg Kroah-Hartman serial_out(up, UART_DLM, 0); 955ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0); 956ab4382d2SGreg Kroah-Hartman 957ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 958ab4382d2SGreg Kroah-Hartman 95908bd4903SRussell King up->efr = serial_in(up, UART_EFR) & ~UART_EFR_ECB; 960d864c03bSRussell King up->efr &= ~UART_EFR_SCD; 961ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); 962ab4382d2SGreg Kroah-Hartman 963ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 96408bd4903SRussell King up->mcr = serial_in(up, UART_MCR) & ~UART_MCR_TCRTLR; 965ab4382d2SGreg Kroah-Hartman serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR); 966ab4382d2SGreg Kroah-Hartman /* FIFO ENABLE, DMA MODE */ 9670ba5f668SPaul Walmsley 9681f663966SAlexey Pelykh up->scr |= OMAP_UART_SCR_RX_TRIG_GRANU1_MASK; 9691f663966SAlexey Pelykh /* 9701f663966SAlexey Pelykh * NOTE: Setting OMAP_UART_SCR_RX_TRIG_GRANU1_MASK 9711f663966SAlexey Pelykh * sets Enables the granularity of 1 for TRIGGER RX 9721f663966SAlexey Pelykh * level. Along with setting RX FIFO trigger level 9731f663966SAlexey Pelykh * to 1 (as noted below, 16 characters) and TLR[3:0] 9741f663966SAlexey Pelykh * to zero this will result RX FIFO threshold level 9751f663966SAlexey Pelykh * to 1 character, instead of 16 as noted in comment 9761f663966SAlexey Pelykh * below. 9771f663966SAlexey Pelykh */ 9781f663966SAlexey Pelykh 9796721ab7fSFelipe Balbi /* Set receive FIFO threshold to 16 characters and 980018e7448SPhilippe Proulx * transmit FIFO threshold to 32 spaces 9816721ab7fSFelipe Balbi */ 9820ba5f668SPaul Walmsley up->fcr &= ~OMAP_UART_FCR_RX_FIFO_TRIG_MASK; 9836721ab7fSFelipe Balbi up->fcr &= ~OMAP_UART_FCR_TX_FIFO_TRIG_MASK; 9846721ab7fSFelipe Balbi up->fcr |= UART_FCR6_R_TRIGGER_16 | UART_FCR6_T_TRIGGER_24 | 9856721ab7fSFelipe Balbi UART_FCR_ENABLE_FIFO; 9868a74e9ffSGreg Kroah-Hartman 9870ba5f668SPaul Walmsley serial_out(up, UART_FCR, up->fcr); 9880ba5f668SPaul Walmsley serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 9890ba5f668SPaul Walmsley 990c538d20cSGovindraj.R serial_out(up, UART_OMAP_SCR, up->scr); 991c538d20cSGovindraj.R 99208bd4903SRussell King /* Reset UART_MCR_TCRTLR: this must be done with the EFR_ECB bit set */ 993ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 994ab4382d2SGreg Kroah-Hartman serial_out(up, UART_MCR, up->mcr); 99508bd4903SRussell King serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 99608bd4903SRussell King serial_out(up, UART_EFR, up->efr); 99708bd4903SRussell King serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 998ab4382d2SGreg Kroah-Hartman 999ab4382d2SGreg Kroah-Hartman /* Protocol, Baud Rate, and Interrupt Settings */ 1000ab4382d2SGreg Kroah-Hartman 100194734749SGovindraj.R if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) 100294734749SGovindraj.R serial_omap_mdr1_errataset(up, up->mdr1); 100394734749SGovindraj.R else 1004c538d20cSGovindraj.R serial_out(up, UART_OMAP_MDR1, up->mdr1); 100594734749SGovindraj.R 1006ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 1007ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); 1008ab4382d2SGreg Kroah-Hartman 1009ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0); 1010ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, 0); 1011ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 1012ab4382d2SGreg Kroah-Hartman 1013c538d20cSGovindraj.R serial_out(up, UART_DLL, up->dll); /* LS of divisor */ 1014c538d20cSGovindraj.R serial_out(up, UART_DLM, up->dlh); /* MS of divisor */ 1015ab4382d2SGreg Kroah-Hartman 1016ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0); 1017ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier); 1018ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 1019ab4382d2SGreg Kroah-Hartman 1020ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, up->efr); 1021ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, cval); 1022ab4382d2SGreg Kroah-Hartman 10235fe21236SAlexey Pelykh if (!serial_omap_baud_is_mode16(port, baud)) 1024c538d20cSGovindraj.R up->mdr1 = UART_OMAP_MDR1_13X_MODE; 1025ab4382d2SGreg Kroah-Hartman else 1026c538d20cSGovindraj.R up->mdr1 = UART_OMAP_MDR1_16X_MODE; 1027c538d20cSGovindraj.R 102894734749SGovindraj.R if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) 102994734749SGovindraj.R serial_omap_mdr1_errataset(up, up->mdr1); 103094734749SGovindraj.R else 1031c538d20cSGovindraj.R serial_out(up, UART_OMAP_MDR1, up->mdr1); 1032ab4382d2SGreg Kroah-Hartman 1033c533e51bSRussell King /* Configure flow control */ 103408bd4903SRussell King serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 1035ab4382d2SGreg Kroah-Hartman 1036c533e51bSRussell King /* XON1/XOFF1 accessible mode B, TCRTLR=0, ECB=0 */ 1037c533e51bSRussell King serial_out(up, UART_XON1, termios->c_cc[VSTART]); 1038c533e51bSRussell King serial_out(up, UART_XOFF1, termios->c_cc[VSTOP]); 1039c533e51bSRussell King 1040c533e51bSRussell King /* Enable access to TCR/TLR */ 104108bd4903SRussell King serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); 1042ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 1043ab4382d2SGreg Kroah-Hartman serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR); 1044ab4382d2SGreg Kroah-Hartman 1045ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TI752_TCR, OMAP_UART_TCR_TRIG); 104608bd4903SRussell King 1047391f93f2SPeter Hurley up->port.status &= ~(UPSTAT_AUTOCTS | UPSTAT_AUTORTS | UPSTAT_AUTOXOFF); 1048391f93f2SPeter Hurley 1049c7d059caSRussell King if (termios->c_cflag & CRTSCTS && up->port.flags & UPF_HARD_FLOW) { 1050348f9bb3SPeter Hurley /* Enable AUTOCTS (autoRTS is enabled when RTS is raised) */ 1051391f93f2SPeter Hurley up->port.status |= UPSTAT_AUTOCTS | UPSTAT_AUTORTS; 1052348f9bb3SPeter Hurley up->efr |= UART_EFR_CTS; 10530d5b1663SRussell King } else { 10540d5b1663SRussell King /* Disable AUTORTS and AUTOCTS */ 10550d5b1663SRussell King up->efr &= ~(UART_EFR_CTS | UART_EFR_RTS); 1056ab4382d2SGreg Kroah-Hartman } 1057ab4382d2SGreg Kroah-Hartman 105801d70bb3SRussell King if (up->port.flags & UPF_SOFT_FLOW) { 105901d70bb3SRussell King /* clear SW control mode bits */ 106001d70bb3SRussell King up->efr &= OMAP_UART_SW_CLR; 106101d70bb3SRussell King 106201d70bb3SRussell King /* 106301d70bb3SRussell King * IXON Flag: 106401d70bb3SRussell King * Enable XON/XOFF flow control on input. 106501d70bb3SRussell King * Receiver compares XON1, XOFF1. 106601d70bb3SRussell King */ 10673af08bd7SRussell King if (termios->c_iflag & IXON) 106801d70bb3SRussell King up->efr |= OMAP_UART_SW_RX; 106901d70bb3SRussell King 107001d70bb3SRussell King /* 10713af08bd7SRussell King * IXOFF Flag: 10723af08bd7SRussell King * Enable XON/XOFF flow control on output. 10733af08bd7SRussell King * Transmit XON1, XOFF1 10743af08bd7SRussell King */ 1075391f93f2SPeter Hurley if (termios->c_iflag & IXOFF) { 1076391f93f2SPeter Hurley up->port.status |= UPSTAT_AUTOXOFF; 10773af08bd7SRussell King up->efr |= OMAP_UART_SW_TX; 1078391f93f2SPeter Hurley } 10793af08bd7SRussell King 10803af08bd7SRussell King /* 108101d70bb3SRussell King * IXANY Flag: 108201d70bb3SRussell King * Enable any character to restart output. 108301d70bb3SRussell King * Operation resumes after receiving any 108401d70bb3SRussell King * character after recognition of the XOFF character 108501d70bb3SRussell King */ 108601d70bb3SRussell King if (termios->c_iflag & IXANY) 108701d70bb3SRussell King up->mcr |= UART_MCR_XONANY; 108801d70bb3SRussell King else 108901d70bb3SRussell King up->mcr &= ~UART_MCR_XONANY; 109018f360f8SRussell King } 1091c7d059caSRussell King serial_out(up, UART_MCR, up->mcr); 109201d70bb3SRussell King serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 109301d70bb3SRussell King serial_out(up, UART_EFR, up->efr); 109401d70bb3SRussell King serial_out(up, UART_LCR, up->lcr); 1095ab4382d2SGreg Kroah-Hartman 1096ab4382d2SGreg Kroah-Hartman serial_omap_set_mctrl(&up->port, up->port.mctrl); 1097ab4382d2SGreg Kroah-Hartman 1098ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags); 1099660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 1100660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 1101ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_set_termios+%d\n", up->port.line); 1102ab4382d2SGreg Kroah-Hartman } 1103ab4382d2SGreg Kroah-Hartman 1104ab4382d2SGreg Kroah-Hartman static void 1105ab4382d2SGreg Kroah-Hartman serial_omap_pm(struct uart_port *port, unsigned int state, 1106ab4382d2SGreg Kroah-Hartman unsigned int oldstate) 1107ab4382d2SGreg Kroah-Hartman { 1108c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 1109ab4382d2SGreg Kroah-Hartman unsigned char efr; 1110ab4382d2SGreg Kroah-Hartman 1111ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_pm+%d\n", up->port.line); 1112fcdca757SGovindraj.R 1113d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 1114ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 1115ab4382d2SGreg Kroah-Hartman efr = serial_in(up, UART_EFR); 1116ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, efr | UART_EFR_ECB); 1117ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0); 1118ab4382d2SGreg Kroah-Hartman 1119ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, (state != 0) ? UART_IERX_SLEEP : 0); 1120ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 1121ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, efr); 1122ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0); 1123fcdca757SGovindraj.R 1124660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 1125660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 1126ab4382d2SGreg Kroah-Hartman } 1127ab4382d2SGreg Kroah-Hartman 1128ab4382d2SGreg Kroah-Hartman static void serial_omap_release_port(struct uart_port *port) 1129ab4382d2SGreg Kroah-Hartman { 1130ab4382d2SGreg Kroah-Hartman dev_dbg(port->dev, "serial_omap_release_port+\n"); 1131ab4382d2SGreg Kroah-Hartman } 1132ab4382d2SGreg Kroah-Hartman 1133ab4382d2SGreg Kroah-Hartman static int serial_omap_request_port(struct uart_port *port) 1134ab4382d2SGreg Kroah-Hartman { 1135ab4382d2SGreg Kroah-Hartman dev_dbg(port->dev, "serial_omap_request_port+\n"); 1136ab4382d2SGreg Kroah-Hartman return 0; 1137ab4382d2SGreg Kroah-Hartman } 1138ab4382d2SGreg Kroah-Hartman 1139ab4382d2SGreg Kroah-Hartman static void serial_omap_config_port(struct uart_port *port, int flags) 1140ab4382d2SGreg Kroah-Hartman { 1141c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 1142ab4382d2SGreg Kroah-Hartman 1143ab4382d2SGreg Kroah-Hartman dev_dbg(up->port.dev, "serial_omap_config_port+%d\n", 1144ba77433dSRajendra Nayak up->port.line); 1145ab4382d2SGreg Kroah-Hartman up->port.type = PORT_OMAP; 11463af08bd7SRussell King up->port.flags |= UPF_SOFT_FLOW | UPF_HARD_FLOW; 1147ab4382d2SGreg Kroah-Hartman } 1148ab4382d2SGreg Kroah-Hartman 1149ab4382d2SGreg Kroah-Hartman static int 1150ab4382d2SGreg Kroah-Hartman serial_omap_verify_port(struct uart_port *port, struct serial_struct *ser) 1151ab4382d2SGreg Kroah-Hartman { 1152ab4382d2SGreg Kroah-Hartman /* we don't want the core code to modify any port params */ 1153ab4382d2SGreg Kroah-Hartman dev_dbg(port->dev, "serial_omap_verify_port+\n"); 1154ab4382d2SGreg Kroah-Hartman return -EINVAL; 1155ab4382d2SGreg Kroah-Hartman } 1156ab4382d2SGreg Kroah-Hartman 1157ab4382d2SGreg Kroah-Hartman static const char * 1158ab4382d2SGreg Kroah-Hartman serial_omap_type(struct uart_port *port) 1159ab4382d2SGreg Kroah-Hartman { 1160c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 1161ab4382d2SGreg Kroah-Hartman 1162ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_type+%d\n", up->port.line); 1163ab4382d2SGreg Kroah-Hartman return up->name; 1164ab4382d2SGreg Kroah-Hartman } 1165ab4382d2SGreg Kroah-Hartman 1166ab4382d2SGreg Kroah-Hartman #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE) 1167ab4382d2SGreg Kroah-Hartman 1168b4a512b8SArnd Bergmann static void __maybe_unused wait_for_xmitr(struct uart_omap_port *up) 1169ab4382d2SGreg Kroah-Hartman { 1170ab4382d2SGreg Kroah-Hartman unsigned int status, tmout = 10000; 1171ab4382d2SGreg Kroah-Hartman 1172ab4382d2SGreg Kroah-Hartman /* Wait up to 10ms for the character(s) to be sent. */ 1173ab4382d2SGreg Kroah-Hartman do { 1174ab4382d2SGreg Kroah-Hartman status = serial_in(up, UART_LSR); 1175ab4382d2SGreg Kroah-Hartman 1176ab4382d2SGreg Kroah-Hartman if (status & UART_LSR_BI) 1177ab4382d2SGreg Kroah-Hartman up->lsr_break_flag = UART_LSR_BI; 1178ab4382d2SGreg Kroah-Hartman 1179ab4382d2SGreg Kroah-Hartman if (--tmout == 0) 1180ab4382d2SGreg Kroah-Hartman break; 1181ab4382d2SGreg Kroah-Hartman udelay(1); 1182ab4382d2SGreg Kroah-Hartman } while ((status & BOTH_EMPTY) != BOTH_EMPTY); 1183ab4382d2SGreg Kroah-Hartman 1184ab4382d2SGreg Kroah-Hartman /* Wait up to 1s for flow control if necessary */ 1185ab4382d2SGreg Kroah-Hartman if (up->port.flags & UPF_CONS_FLOW) { 1186ab4382d2SGreg Kroah-Hartman tmout = 1000000; 1187ab4382d2SGreg Kroah-Hartman for (tmout = 1000000; tmout; tmout--) { 1188ab4382d2SGreg Kroah-Hartman unsigned int msr = serial_in(up, UART_MSR); 1189ab4382d2SGreg Kroah-Hartman 1190ab4382d2SGreg Kroah-Hartman up->msr_saved_flags |= msr & MSR_SAVE_FLAGS; 1191ab4382d2SGreg Kroah-Hartman if (msr & UART_MSR_CTS) 1192ab4382d2SGreg Kroah-Hartman break; 1193ab4382d2SGreg Kroah-Hartman 1194ab4382d2SGreg Kroah-Hartman udelay(1); 1195ab4382d2SGreg Kroah-Hartman } 1196ab4382d2SGreg Kroah-Hartman } 1197ab4382d2SGreg Kroah-Hartman } 1198ab4382d2SGreg Kroah-Hartman 1199ab4382d2SGreg Kroah-Hartman #ifdef CONFIG_CONSOLE_POLL 1200ab4382d2SGreg Kroah-Hartman 1201ab4382d2SGreg Kroah-Hartman static void serial_omap_poll_put_char(struct uart_port *port, unsigned char ch) 1202ab4382d2SGreg Kroah-Hartman { 1203c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 1204fcdca757SGovindraj.R 1205d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 1206ab4382d2SGreg Kroah-Hartman wait_for_xmitr(up); 1207ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TX, ch); 1208660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 1209660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 1210ab4382d2SGreg Kroah-Hartman } 1211ab4382d2SGreg Kroah-Hartman 1212ab4382d2SGreg Kroah-Hartman static int serial_omap_poll_get_char(struct uart_port *port) 1213ab4382d2SGreg Kroah-Hartman { 1214c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 1215fcdca757SGovindraj.R unsigned int status; 1216ab4382d2SGreg Kroah-Hartman 1217d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 1218fcdca757SGovindraj.R status = serial_in(up, UART_LSR); 1219a6b19c33SFelipe Balbi if (!(status & UART_LSR_DR)) { 1220a6b19c33SFelipe Balbi status = NO_POLL_CHAR; 1221a6b19c33SFelipe Balbi goto out; 1222a6b19c33SFelipe Balbi } 1223ab4382d2SGreg Kroah-Hartman 1224fcdca757SGovindraj.R status = serial_in(up, UART_RX); 1225a6b19c33SFelipe Balbi 1226a6b19c33SFelipe Balbi out: 1227660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 1228660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 1229a6b19c33SFelipe Balbi 1230fcdca757SGovindraj.R return status; 1231ab4382d2SGreg Kroah-Hartman } 1232ab4382d2SGreg Kroah-Hartman 1233ab4382d2SGreg Kroah-Hartman #endif /* CONFIG_CONSOLE_POLL */ 1234ab4382d2SGreg Kroah-Hartman 1235ab4382d2SGreg Kroah-Hartman #ifdef CONFIG_SERIAL_OMAP_CONSOLE 1236ab4382d2SGreg Kroah-Hartman 123728ec9570SLokesh Vutla #ifdef CONFIG_SERIAL_EARLYCON 1238b38dd0e8SJeffy Chen static unsigned int omap_serial_early_in(struct uart_port *port, int offset) 123928ec9570SLokesh Vutla { 124028ec9570SLokesh Vutla offset <<= port->regshift; 124128ec9570SLokesh Vutla return readw(port->membase + offset); 124228ec9570SLokesh Vutla } 124328ec9570SLokesh Vutla 1244b38dd0e8SJeffy Chen static void omap_serial_early_out(struct uart_port *port, int offset, 124528ec9570SLokesh Vutla int value) 124628ec9570SLokesh Vutla { 124728ec9570SLokesh Vutla offset <<= port->regshift; 124828ec9570SLokesh Vutla writew(value, port->membase + offset); 124928ec9570SLokesh Vutla } 125028ec9570SLokesh Vutla 1251b38dd0e8SJeffy Chen static void omap_serial_early_putc(struct uart_port *port, int c) 125228ec9570SLokesh Vutla { 125328ec9570SLokesh Vutla unsigned int status; 125428ec9570SLokesh Vutla 125528ec9570SLokesh Vutla for (;;) { 125628ec9570SLokesh Vutla status = omap_serial_early_in(port, UART_LSR); 125728ec9570SLokesh Vutla if ((status & BOTH_EMPTY) == BOTH_EMPTY) 125828ec9570SLokesh Vutla break; 125928ec9570SLokesh Vutla cpu_relax(); 126028ec9570SLokesh Vutla } 126128ec9570SLokesh Vutla omap_serial_early_out(port, UART_TX, c); 126228ec9570SLokesh Vutla } 126328ec9570SLokesh Vutla 1264b38dd0e8SJeffy Chen static void early_omap_serial_write(struct console *console, const char *s, 1265b38dd0e8SJeffy Chen unsigned int count) 126628ec9570SLokesh Vutla { 126728ec9570SLokesh Vutla struct earlycon_device *device = console->data; 126828ec9570SLokesh Vutla struct uart_port *port = &device->port; 126928ec9570SLokesh Vutla 127028ec9570SLokesh Vutla uart_console_write(port, s, count, omap_serial_early_putc); 127128ec9570SLokesh Vutla } 127228ec9570SLokesh Vutla 127328ec9570SLokesh Vutla static int __init early_omap_serial_setup(struct earlycon_device *device, 127428ec9570SLokesh Vutla const char *options) 127528ec9570SLokesh Vutla { 127628ec9570SLokesh Vutla struct uart_port *port = &device->port; 127728ec9570SLokesh Vutla 127828ec9570SLokesh Vutla if (!(device->port.membase || device->port.iobase)) 127928ec9570SLokesh Vutla return -ENODEV; 128028ec9570SLokesh Vutla 128128ec9570SLokesh Vutla port->regshift = 2; 128228ec9570SLokesh Vutla device->con->write = early_omap_serial_write; 128328ec9570SLokesh Vutla return 0; 128428ec9570SLokesh Vutla } 128528ec9570SLokesh Vutla 128628ec9570SLokesh Vutla OF_EARLYCON_DECLARE(omapserial, "ti,omap2-uart", early_omap_serial_setup); 128728ec9570SLokesh Vutla OF_EARLYCON_DECLARE(omapserial, "ti,omap3-uart", early_omap_serial_setup); 128828ec9570SLokesh Vutla OF_EARLYCON_DECLARE(omapserial, "ti,omap4-uart", early_omap_serial_setup); 128928ec9570SLokesh Vutla #endif /* CONFIG_SERIAL_EARLYCON */ 129028ec9570SLokesh Vutla 129140477d0eSShubhrajyoti D static struct uart_omap_port *serial_omap_console_ports[OMAP_MAX_HSUART_PORTS]; 1292ab4382d2SGreg Kroah-Hartman 1293ab4382d2SGreg Kroah-Hartman static struct uart_driver serial_omap_reg; 1294ab4382d2SGreg Kroah-Hartman 1295ab4382d2SGreg Kroah-Hartman static void serial_omap_console_putchar(struct uart_port *port, int ch) 1296ab4382d2SGreg Kroah-Hartman { 1297c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port); 1298ab4382d2SGreg Kroah-Hartman 1299ab4382d2SGreg Kroah-Hartman wait_for_xmitr(up); 1300ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TX, ch); 1301ab4382d2SGreg Kroah-Hartman } 1302ab4382d2SGreg Kroah-Hartman 1303ab4382d2SGreg Kroah-Hartman static void 1304ab4382d2SGreg Kroah-Hartman serial_omap_console_write(struct console *co, const char *s, 1305ab4382d2SGreg Kroah-Hartman unsigned int count) 1306ab4382d2SGreg Kroah-Hartman { 1307ab4382d2SGreg Kroah-Hartman struct uart_omap_port *up = serial_omap_console_ports[co->index]; 1308ab4382d2SGreg Kroah-Hartman unsigned long flags; 1309ab4382d2SGreg Kroah-Hartman unsigned int ier; 1310ab4382d2SGreg Kroah-Hartman int locked = 1; 1311ab4382d2SGreg Kroah-Hartman 1312d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev); 1313fcdca757SGovindraj.R 1314ab4382d2SGreg Kroah-Hartman local_irq_save(flags); 1315ab4382d2SGreg Kroah-Hartman if (up->port.sysrq) 1316ab4382d2SGreg Kroah-Hartman locked = 0; 1317ab4382d2SGreg Kroah-Hartman else if (oops_in_progress) 1318ab4382d2SGreg Kroah-Hartman locked = spin_trylock(&up->port.lock); 1319ab4382d2SGreg Kroah-Hartman else 1320ab4382d2SGreg Kroah-Hartman spin_lock(&up->port.lock); 1321ab4382d2SGreg Kroah-Hartman 1322ab4382d2SGreg Kroah-Hartman /* 1323ab4382d2SGreg Kroah-Hartman * First save the IER then disable the interrupts 1324ab4382d2SGreg Kroah-Hartman */ 1325ab4382d2SGreg Kroah-Hartman ier = serial_in(up, UART_IER); 1326ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, 0); 1327ab4382d2SGreg Kroah-Hartman 1328ab4382d2SGreg Kroah-Hartman uart_console_write(&up->port, s, count, serial_omap_console_putchar); 1329ab4382d2SGreg Kroah-Hartman 1330ab4382d2SGreg Kroah-Hartman /* 1331ab4382d2SGreg Kroah-Hartman * Finally, wait for transmitter to become empty 1332ab4382d2SGreg Kroah-Hartman * and restore the IER 1333ab4382d2SGreg Kroah-Hartman */ 1334ab4382d2SGreg Kroah-Hartman wait_for_xmitr(up); 1335ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, ier); 1336ab4382d2SGreg Kroah-Hartman /* 1337ab4382d2SGreg Kroah-Hartman * The receive handling will happen properly because the 1338ab4382d2SGreg Kroah-Hartman * receive ready bit will still be set; it is not cleared 1339ab4382d2SGreg Kroah-Hartman * on read. However, modem control will not, we must 1340ab4382d2SGreg Kroah-Hartman * call it if we have saved something in the saved flags 1341ab4382d2SGreg Kroah-Hartman * while processing with interrupts off. 1342ab4382d2SGreg Kroah-Hartman */ 1343ab4382d2SGreg Kroah-Hartman if (up->msr_saved_flags) 1344ab4382d2SGreg Kroah-Hartman check_modem_status(up); 1345ab4382d2SGreg Kroah-Hartman 1346d8ee4ea6SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 1347d8ee4ea6SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 1348ab4382d2SGreg Kroah-Hartman if (locked) 1349ab4382d2SGreg Kroah-Hartman spin_unlock(&up->port.lock); 1350ab4382d2SGreg Kroah-Hartman local_irq_restore(flags); 1351ab4382d2SGreg Kroah-Hartman } 1352ab4382d2SGreg Kroah-Hartman 1353ab4382d2SGreg Kroah-Hartman static int __init 1354ab4382d2SGreg Kroah-Hartman serial_omap_console_setup(struct console *co, char *options) 1355ab4382d2SGreg Kroah-Hartman { 1356ab4382d2SGreg Kroah-Hartman struct uart_omap_port *up; 1357ab4382d2SGreg Kroah-Hartman int baud = 115200; 1358ab4382d2SGreg Kroah-Hartman int bits = 8; 1359ab4382d2SGreg Kroah-Hartman int parity = 'n'; 1360ab4382d2SGreg Kroah-Hartman int flow = 'n'; 1361ab4382d2SGreg Kroah-Hartman 1362ab4382d2SGreg Kroah-Hartman if (serial_omap_console_ports[co->index] == NULL) 1363ab4382d2SGreg Kroah-Hartman return -ENODEV; 1364ab4382d2SGreg Kroah-Hartman up = serial_omap_console_ports[co->index]; 1365ab4382d2SGreg Kroah-Hartman 1366ab4382d2SGreg Kroah-Hartman if (options) 1367ab4382d2SGreg Kroah-Hartman uart_parse_options(options, &baud, &parity, &bits, &flow); 1368ab4382d2SGreg Kroah-Hartman 1369ab4382d2SGreg Kroah-Hartman return uart_set_options(&up->port, co, baud, parity, bits, flow); 1370ab4382d2SGreg Kroah-Hartman } 1371ab4382d2SGreg Kroah-Hartman 1372ab4382d2SGreg Kroah-Hartman static struct console serial_omap_console = { 1373ab4382d2SGreg Kroah-Hartman .name = OMAP_SERIAL_NAME, 1374ab4382d2SGreg Kroah-Hartman .write = serial_omap_console_write, 1375ab4382d2SGreg Kroah-Hartman .device = uart_console_device, 1376ab4382d2SGreg Kroah-Hartman .setup = serial_omap_console_setup, 1377ab4382d2SGreg Kroah-Hartman .flags = CON_PRINTBUFFER, 1378ab4382d2SGreg Kroah-Hartman .index = -1, 1379ab4382d2SGreg Kroah-Hartman .data = &serial_omap_reg, 1380ab4382d2SGreg Kroah-Hartman }; 1381ab4382d2SGreg Kroah-Hartman 1382ab4382d2SGreg Kroah-Hartman static void serial_omap_add_console_port(struct uart_omap_port *up) 1383ab4382d2SGreg Kroah-Hartman { 1384ba77433dSRajendra Nayak serial_omap_console_ports[up->port.line] = up; 1385ab4382d2SGreg Kroah-Hartman } 1386ab4382d2SGreg Kroah-Hartman 1387ab4382d2SGreg Kroah-Hartman #define OMAP_CONSOLE (&serial_omap_console) 1388ab4382d2SGreg Kroah-Hartman 1389ab4382d2SGreg Kroah-Hartman #else 1390ab4382d2SGreg Kroah-Hartman 1391ab4382d2SGreg Kroah-Hartman #define OMAP_CONSOLE NULL 1392ab4382d2SGreg Kroah-Hartman 1393ab4382d2SGreg Kroah-Hartman static inline void serial_omap_add_console_port(struct uart_omap_port *up) 1394ab4382d2SGreg Kroah-Hartman {} 1395ab4382d2SGreg Kroah-Hartman 1396ab4382d2SGreg Kroah-Hartman #endif 1397ab4382d2SGreg Kroah-Hartman 13984a0ac0f5SMark Jackson /* Enable or disable the rs485 support */ 1399dadd7ecbSRicardo Ribalda Delgado static int 1400308bbc9aSPeter Hurley serial_omap_config_rs485(struct uart_port *port, struct serial_rs485 *rs485) 14014a0ac0f5SMark Jackson { 14024a0ac0f5SMark Jackson struct uart_omap_port *up = to_uart_omap_port(port); 14034a0ac0f5SMark Jackson unsigned int mode; 14044a0ac0f5SMark Jackson int val; 14054a0ac0f5SMark Jackson 14064a0ac0f5SMark Jackson pm_runtime_get_sync(up->dev); 14074a0ac0f5SMark Jackson 14084a0ac0f5SMark Jackson /* Disable interrupts from this port */ 14094a0ac0f5SMark Jackson mode = up->ier; 14104a0ac0f5SMark Jackson up->ier = 0; 14114a0ac0f5SMark Jackson serial_out(up, UART_IER, 0); 14124a0ac0f5SMark Jackson 1413308bbc9aSPeter Hurley /* Clamp the delays to [0, 100ms] */ 1414308bbc9aSPeter Hurley rs485->delay_rts_before_send = min(rs485->delay_rts_before_send, 100U); 1415308bbc9aSPeter Hurley rs485->delay_rts_after_send = min(rs485->delay_rts_after_send, 100U); 1416308bbc9aSPeter Hurley 14174a0ac0f5SMark Jackson /* store new config */ 1418308bbc9aSPeter Hurley port->rs485 = *rs485; 14194a0ac0f5SMark Jackson 14205745fd0fSLinus Walleij if (up->rts_gpiod) { 14214a0ac0f5SMark Jackson /* enable / disable rts */ 1422dadd7ecbSRicardo Ribalda Delgado val = (port->rs485.flags & SER_RS485_ENABLED) ? 14234a0ac0f5SMark Jackson SER_RS485_RTS_AFTER_SEND : SER_RS485_RTS_ON_SEND; 1424dadd7ecbSRicardo Ribalda Delgado val = (port->rs485.flags & val) ? 1 : 0; 14255745fd0fSLinus Walleij gpiod_set_value(up->rts_gpiod, val); 142645f6b6dbSDario Binacchi } 14274a0ac0f5SMark Jackson 14284a0ac0f5SMark Jackson /* Enable interrupts */ 14294a0ac0f5SMark Jackson up->ier = mode; 14304a0ac0f5SMark Jackson serial_out(up, UART_IER, up->ier); 14314a0ac0f5SMark Jackson 1432018e7448SPhilippe Proulx /* If RS-485 is disabled, make sure the THR interrupt is fired when 1433018e7448SPhilippe Proulx * TX FIFO is below the trigger level. 1434018e7448SPhilippe Proulx */ 1435dadd7ecbSRicardo Ribalda Delgado if (!(port->rs485.flags & SER_RS485_ENABLED) && 1436018e7448SPhilippe Proulx (up->scr & OMAP_UART_SCR_TX_EMPTY)) { 1437018e7448SPhilippe Proulx up->scr &= ~OMAP_UART_SCR_TX_EMPTY; 1438018e7448SPhilippe Proulx serial_out(up, UART_OMAP_SCR, up->scr); 1439018e7448SPhilippe Proulx } 1440018e7448SPhilippe Proulx 14414a0ac0f5SMark Jackson pm_runtime_mark_last_busy(up->dev); 14424a0ac0f5SMark Jackson pm_runtime_put_autosuspend(up->dev); 14434a0ac0f5SMark Jackson 14444a0ac0f5SMark Jackson return 0; 14454a0ac0f5SMark Jackson } 14464a0ac0f5SMark Jackson 14472331e068SBhumika Goyal static const struct uart_ops serial_omap_pops = { 1448ab4382d2SGreg Kroah-Hartman .tx_empty = serial_omap_tx_empty, 1449ab4382d2SGreg Kroah-Hartman .set_mctrl = serial_omap_set_mctrl, 1450ab4382d2SGreg Kroah-Hartman .get_mctrl = serial_omap_get_mctrl, 1451ab4382d2SGreg Kroah-Hartman .stop_tx = serial_omap_stop_tx, 1452ab4382d2SGreg Kroah-Hartman .start_tx = serial_omap_start_tx, 14533af08bd7SRussell King .throttle = serial_omap_throttle, 14543af08bd7SRussell King .unthrottle = serial_omap_unthrottle, 1455ab4382d2SGreg Kroah-Hartman .stop_rx = serial_omap_stop_rx, 1456ab4382d2SGreg Kroah-Hartman .enable_ms = serial_omap_enable_ms, 1457ab4382d2SGreg Kroah-Hartman .break_ctl = serial_omap_break_ctl, 1458ab4382d2SGreg Kroah-Hartman .startup = serial_omap_startup, 1459ab4382d2SGreg Kroah-Hartman .shutdown = serial_omap_shutdown, 1460ab4382d2SGreg Kroah-Hartman .set_termios = serial_omap_set_termios, 1461ab4382d2SGreg Kroah-Hartman .pm = serial_omap_pm, 1462ab4382d2SGreg Kroah-Hartman .type = serial_omap_type, 1463ab4382d2SGreg Kroah-Hartman .release_port = serial_omap_release_port, 1464ab4382d2SGreg Kroah-Hartman .request_port = serial_omap_request_port, 1465ab4382d2SGreg Kroah-Hartman .config_port = serial_omap_config_port, 1466ab4382d2SGreg Kroah-Hartman .verify_port = serial_omap_verify_port, 1467ab4382d2SGreg Kroah-Hartman #ifdef CONFIG_CONSOLE_POLL 1468ab4382d2SGreg Kroah-Hartman .poll_put_char = serial_omap_poll_put_char, 1469ab4382d2SGreg Kroah-Hartman .poll_get_char = serial_omap_poll_get_char, 1470ab4382d2SGreg Kroah-Hartman #endif 1471ab4382d2SGreg Kroah-Hartman }; 1472ab4382d2SGreg Kroah-Hartman 1473ab4382d2SGreg Kroah-Hartman static struct uart_driver serial_omap_reg = { 1474ab4382d2SGreg Kroah-Hartman .owner = THIS_MODULE, 1475ab4382d2SGreg Kroah-Hartman .driver_name = "OMAP-SERIAL", 1476ab4382d2SGreg Kroah-Hartman .dev_name = OMAP_SERIAL_NAME, 1477ab4382d2SGreg Kroah-Hartman .nr = OMAP_MAX_HSUART_PORTS, 1478ab4382d2SGreg Kroah-Hartman .cons = OMAP_CONSOLE, 1479ab4382d2SGreg Kroah-Hartman }; 1480ab4382d2SGreg Kroah-Hartman 14813bc4f0d8SShubhrajyoti D #ifdef CONFIG_PM_SLEEP 1482ddd85e22SSourav Poddar static int serial_omap_prepare(struct device *dev) 1483ddd85e22SSourav Poddar { 1484ddd85e22SSourav Poddar struct uart_omap_port *up = dev_get_drvdata(dev); 1485ddd85e22SSourav Poddar 1486ddd85e22SSourav Poddar up->is_suspending = true; 1487ddd85e22SSourav Poddar 1488ddd85e22SSourav Poddar return 0; 1489ddd85e22SSourav Poddar } 1490ddd85e22SSourav Poddar 1491ddd85e22SSourav Poddar static void serial_omap_complete(struct device *dev) 1492ddd85e22SSourav Poddar { 1493ddd85e22SSourav Poddar struct uart_omap_port *up = dev_get_drvdata(dev); 1494ddd85e22SSourav Poddar 1495ddd85e22SSourav Poddar up->is_suspending = false; 1496ddd85e22SSourav Poddar } 1497ddd85e22SSourav Poddar 1498fcdca757SGovindraj.R static int serial_omap_suspend(struct device *dev) 1499ab4382d2SGreg Kroah-Hartman { 1500fcdca757SGovindraj.R struct uart_omap_port *up = dev_get_drvdata(dev); 1501ab4382d2SGreg Kroah-Hartman 1502ab4382d2SGreg Kroah-Hartman uart_suspend_port(&serial_omap_reg, &up->port); 150343829731STejun Heo flush_work(&up->qos_work); 15042fd14964SGovindraj.R 1505d758c9c1STony Lindgren if (device_may_wakeup(dev)) 1506d758c9c1STony Lindgren serial_omap_enable_wakeup(up, true); 1507d758c9c1STony Lindgren else 1508d758c9c1STony Lindgren serial_omap_enable_wakeup(up, false); 1509d758c9c1STony Lindgren 1510ab4382d2SGreg Kroah-Hartman return 0; 1511ab4382d2SGreg Kroah-Hartman } 1512ab4382d2SGreg Kroah-Hartman 1513fcdca757SGovindraj.R static int serial_omap_resume(struct device *dev) 1514ab4382d2SGreg Kroah-Hartman { 1515fcdca757SGovindraj.R struct uart_omap_port *up = dev_get_drvdata(dev); 1516ab4382d2SGreg Kroah-Hartman 1517d758c9c1STony Lindgren if (device_may_wakeup(dev)) 1518d758c9c1STony Lindgren serial_omap_enable_wakeup(up, false); 1519d758c9c1STony Lindgren 1520ab4382d2SGreg Kroah-Hartman uart_resume_port(&serial_omap_reg, &up->port); 1521ac57e7f3SSourav Poddar 1522ab4382d2SGreg Kroah-Hartman return 0; 1523ab4382d2SGreg Kroah-Hartman } 1524ddd85e22SSourav Poddar #else 1525ddd85e22SSourav Poddar #define serial_omap_prepare NULL 15262cb5a2faSArnd Bergmann #define serial_omap_complete NULL 1527ddd85e22SSourav Poddar #endif /* CONFIG_PM_SLEEP */ 1528ab4382d2SGreg Kroah-Hartman 15299671f099SBill Pemberton static void omap_serial_fill_features_erratas(struct uart_omap_port *up) 15307c77c8deSGovindraj.R { 15317c77c8deSGovindraj.R u32 mvr, scheme; 15327c77c8deSGovindraj.R u16 revision, major, minor; 15337c77c8deSGovindraj.R 153476bac198SRuchika Kharwar mvr = readl(up->port.membase + (UART_OMAP_MVER << up->port.regshift)); 15357c77c8deSGovindraj.R 15367c77c8deSGovindraj.R /* Check revision register scheme */ 15377c77c8deSGovindraj.R scheme = mvr >> OMAP_UART_MVR_SCHEME_SHIFT; 15387c77c8deSGovindraj.R 15397c77c8deSGovindraj.R switch (scheme) { 15407c77c8deSGovindraj.R case 0: /* Legacy Scheme: OMAP2/3 */ 15417c77c8deSGovindraj.R /* MINOR_REV[0:4], MAJOR_REV[4:7] */ 15427c77c8deSGovindraj.R major = (mvr & OMAP_UART_LEGACY_MVR_MAJ_MASK) >> 15437c77c8deSGovindraj.R OMAP_UART_LEGACY_MVR_MAJ_SHIFT; 15447c77c8deSGovindraj.R minor = (mvr & OMAP_UART_LEGACY_MVR_MIN_MASK); 15457c77c8deSGovindraj.R break; 15467c77c8deSGovindraj.R case 1: 15477c77c8deSGovindraj.R /* New Scheme: OMAP4+ */ 15487c77c8deSGovindraj.R /* MINOR_REV[0:5], MAJOR_REV[8:10] */ 15497c77c8deSGovindraj.R major = (mvr & OMAP_UART_MVR_MAJ_MASK) >> 15507c77c8deSGovindraj.R OMAP_UART_MVR_MAJ_SHIFT; 15517c77c8deSGovindraj.R minor = (mvr & OMAP_UART_MVR_MIN_MASK); 15527c77c8deSGovindraj.R break; 15537c77c8deSGovindraj.R default: 1554d8ee4ea6SFelipe Balbi dev_warn(up->dev, 15557c77c8deSGovindraj.R "Unknown %s revision, defaulting to highest\n", 15567c77c8deSGovindraj.R up->name); 15577c77c8deSGovindraj.R /* highest possible revision */ 15587c77c8deSGovindraj.R major = 0xff; 15597c77c8deSGovindraj.R minor = 0xff; 15607c77c8deSGovindraj.R } 15617c77c8deSGovindraj.R 15627c77c8deSGovindraj.R /* normalize revision for the driver */ 15637c77c8deSGovindraj.R revision = UART_BUILD_REVISION(major, minor); 15647c77c8deSGovindraj.R 15657c77c8deSGovindraj.R switch (revision) { 15667c77c8deSGovindraj.R case OMAP_UART_REV_46: 15677c77c8deSGovindraj.R up->errata |= (UART_ERRATA_i202_MDR1_ACCESS | 15687c77c8deSGovindraj.R UART_ERRATA_i291_DMA_FORCEIDLE); 15697c77c8deSGovindraj.R break; 15707c77c8deSGovindraj.R case OMAP_UART_REV_52: 15717c77c8deSGovindraj.R up->errata |= (UART_ERRATA_i202_MDR1_ACCESS | 15727c77c8deSGovindraj.R UART_ERRATA_i291_DMA_FORCEIDLE); 1573f64ffda6SGovindraj.R up->features |= OMAP_UART_WER_HAS_TX_WAKEUP; 15747c77c8deSGovindraj.R break; 15757c77c8deSGovindraj.R case OMAP_UART_REV_63: 15767c77c8deSGovindraj.R up->errata |= UART_ERRATA_i202_MDR1_ACCESS; 1577f64ffda6SGovindraj.R up->features |= OMAP_UART_WER_HAS_TX_WAKEUP; 15787c77c8deSGovindraj.R break; 15797c77c8deSGovindraj.R default: 15807c77c8deSGovindraj.R break; 15817c77c8deSGovindraj.R } 15827c77c8deSGovindraj.R } 15837c77c8deSGovindraj.R 15849671f099SBill Pemberton static struct omap_uart_port_info *of_get_uart_port_info(struct device *dev) 1585d92b0dfcSRajendra Nayak { 1586d92b0dfcSRajendra Nayak struct omap_uart_port_info *omap_up_info; 1587d92b0dfcSRajendra Nayak 1588d92b0dfcSRajendra Nayak omap_up_info = devm_kzalloc(dev, sizeof(*omap_up_info), GFP_KERNEL); 1589d92b0dfcSRajendra Nayak if (!omap_up_info) 1590d92b0dfcSRajendra Nayak return NULL; /* out of memory */ 1591d92b0dfcSRajendra Nayak 1592d92b0dfcSRajendra Nayak of_property_read_u32(dev->of_node, "clock-frequency", 1593d92b0dfcSRajendra Nayak &omap_up_info->uartclk); 15941b775de9SSebastian Reichel 15951b775de9SSebastian Reichel omap_up_info->flags = UPF_BOOT_AUTOCONF; 15961b775de9SSebastian Reichel 1597d92b0dfcSRajendra Nayak return omap_up_info; 1598d92b0dfcSRajendra Nayak } 1599d92b0dfcSRajendra Nayak 16004a0ac0f5SMark Jackson static int serial_omap_probe_rs485(struct uart_omap_port *up, 16015745fd0fSLinus Walleij struct device *dev) 16024a0ac0f5SMark Jackson { 1603dadd7ecbSRicardo Ribalda Delgado struct serial_rs485 *rs485conf = &up->port.rs485; 16045745fd0fSLinus Walleij struct device_node *np = dev->of_node; 16055745fd0fSLinus Walleij enum gpiod_flags gflags; 16064a0ac0f5SMark Jackson int ret; 16074a0ac0f5SMark Jackson 16084a0ac0f5SMark Jackson rs485conf->flags = 0; 16095745fd0fSLinus Walleij up->rts_gpiod = NULL; 16104a0ac0f5SMark Jackson 16114a0ac0f5SMark Jackson if (!np) 16124a0ac0f5SMark Jackson return 0; 16134a0ac0f5SMark Jackson 1614c150c0f3SLukas Wunner ret = uart_get_rs485_mode(&up->port); 1615c150c0f3SLukas Wunner if (ret) 1616c150c0f3SLukas Wunner return ret; 1617743f93f8SLukas Wunner 1618f1e5b618SLukas Wunner if (of_property_read_bool(np, "rs485-rts-active-high")) { 16194a0ac0f5SMark Jackson rs485conf->flags |= SER_RS485_RTS_ON_SEND; 1620f1e5b618SLukas Wunner rs485conf->flags &= ~SER_RS485_RTS_AFTER_SEND; 1621f1e5b618SLukas Wunner } else { 1622f1e5b618SLukas Wunner rs485conf->flags &= ~SER_RS485_RTS_ON_SEND; 16234a0ac0f5SMark Jackson rs485conf->flags |= SER_RS485_RTS_AFTER_SEND; 1624f1e5b618SLukas Wunner } 16254a0ac0f5SMark Jackson 16264a0ac0f5SMark Jackson /* check for tx enable gpio */ 16275745fd0fSLinus Walleij gflags = rs485conf->flags & SER_RS485_RTS_AFTER_SEND ? 16285745fd0fSLinus Walleij GPIOD_OUT_HIGH : GPIOD_OUT_LOW; 16295745fd0fSLinus Walleij up->rts_gpiod = devm_gpiod_get_optional(dev, "rts", gflags); 16305745fd0fSLinus Walleij if (IS_ERR(up->rts_gpiod)) { 16315745fd0fSLinus Walleij ret = PTR_ERR(up->rts_gpiod); 16325745fd0fSLinus Walleij if (ret == -EPROBE_DEFER) 16334a0ac0f5SMark Jackson return ret; 16345745fd0fSLinus Walleij /* 16355745fd0fSLinus Walleij * FIXME: the code historically ignored any other error than 16365745fd0fSLinus Walleij * -EPROBE_DEFER and just went on without GPIO. 16375745fd0fSLinus Walleij */ 16385745fd0fSLinus Walleij up->rts_gpiod = NULL; 1639a64c1a1cSMichael Grzeschik } else { 16405745fd0fSLinus Walleij gpiod_set_consumer_name(up->rts_gpiod, "omap-serial"); 1641a64c1a1cSMichael Grzeschik } 16424a0ac0f5SMark Jackson 16434a0ac0f5SMark Jackson return 0; 16444a0ac0f5SMark Jackson } 16454a0ac0f5SMark Jackson 16469671f099SBill Pemberton static int serial_omap_probe(struct platform_device *pdev) 1647ab4382d2SGreg Kroah-Hartman { 1648574de559SJingoo Han struct omap_uart_port_info *omap_up_info = dev_get_platdata(&pdev->dev); 1649cc51638aSFelipe Balbi struct uart_omap_port *up; 1650cc51638aSFelipe Balbi struct resource *mem; 1651d044d235SFelipe Balbi void __iomem *base; 1652cc51638aSFelipe Balbi int uartirq = 0; 1653cc51638aSFelipe Balbi int wakeirq = 0; 1654cc51638aSFelipe Balbi int ret; 1655ab4382d2SGreg Kroah-Hartman 16562a0b965cSTony Lindgren /* The optional wakeirq may be specified in the board dts file */ 1657a0a490f9SVikram Pandita if (pdev->dev.of_node) { 16582a0b965cSTony Lindgren uartirq = irq_of_parse_and_map(pdev->dev.of_node, 0); 16592a0b965cSTony Lindgren if (!uartirq) 16602a0b965cSTony Lindgren return -EPROBE_DEFER; 16612a0b965cSTony Lindgren wakeirq = irq_of_parse_and_map(pdev->dev.of_node, 1); 1662d92b0dfcSRajendra Nayak omap_up_info = of_get_uart_port_info(&pdev->dev); 1663a0a490f9SVikram Pandita pdev->dev.platform_data = omap_up_info; 16642a0b965cSTony Lindgren } else { 166554af692cSFelipe Balbi uartirq = platform_get_irq(pdev, 0); 166654af692cSFelipe Balbi if (uartirq < 0) 166754af692cSFelipe Balbi return -EPROBE_DEFER; 1668a0a490f9SVikram Pandita } 1669d92b0dfcSRajendra Nayak 1670d044d235SFelipe Balbi up = devm_kzalloc(&pdev->dev, sizeof(*up), GFP_KERNEL); 1671d044d235SFelipe Balbi if (!up) 1672d044d235SFelipe Balbi return -ENOMEM; 1673ab4382d2SGreg Kroah-Hartman 1674d044d235SFelipe Balbi mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1675d044d235SFelipe Balbi base = devm_ioremap_resource(&pdev->dev, mem); 1676d044d235SFelipe Balbi if (IS_ERR(base)) 1677d044d235SFelipe Balbi return PTR_ERR(base); 1678ab4382d2SGreg Kroah-Hartman 1679d8ee4ea6SFelipe Balbi up->dev = &pdev->dev; 1680ab4382d2SGreg Kroah-Hartman up->port.dev = &pdev->dev; 1681ab4382d2SGreg Kroah-Hartman up->port.type = PORT_OMAP; 1682ab4382d2SGreg Kroah-Hartman up->port.iotype = UPIO_MEM; 16832a0b965cSTony Lindgren up->port.irq = uartirq; 1684ab4382d2SGreg Kroah-Hartman up->port.regshift = 2; 1685ab4382d2SGreg Kroah-Hartman up->port.fifosize = 64; 1686ab4382d2SGreg Kroah-Hartman up->port.ops = &serial_omap_pops; 1687b062e4aaSDmitry Safonov up->port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_OMAP_CONSOLE); 1688ab4382d2SGreg Kroah-Hartman 1689d92b0dfcSRajendra Nayak if (pdev->dev.of_node) 16903c59958dSSebastian Andrzej Siewior ret = of_alias_get_id(pdev->dev.of_node, "serial"); 1691d92b0dfcSRajendra Nayak else 16923c59958dSSebastian Andrzej Siewior ret = pdev->id; 1693ab4382d2SGreg Kroah-Hartman 16943c59958dSSebastian Andrzej Siewior if (ret < 0) { 1695d92b0dfcSRajendra Nayak dev_err(&pdev->dev, "failed to get alias/pdev id, errno %d\n", 16963c59958dSSebastian Andrzej Siewior ret); 1697388bc262SShubhrajyoti D goto err_port_line; 1698d92b0dfcSRajendra Nayak } 16993c59958dSSebastian Andrzej Siewior up->port.line = ret; 1700d92b0dfcSRajendra Nayak 17017af0ea5dSNishanth Menon if (up->port.line >= OMAP_MAX_HSUART_PORTS) { 17027af0ea5dSNishanth Menon dev_err(&pdev->dev, "uart ID %d > MAX %d.\n", up->port.line, 17037af0ea5dSNishanth Menon OMAP_MAX_HSUART_PORTS); 17047af0ea5dSNishanth Menon ret = -ENXIO; 17057af0ea5dSNishanth Menon goto err_port_line; 17067af0ea5dSNishanth Menon } 17077af0ea5dSNishanth Menon 17081cf94d3aSDoug Kehn up->wakeirq = wakeirq; 17091cf94d3aSDoug Kehn if (!up->wakeirq) 17101cf94d3aSDoug Kehn dev_info(up->port.dev, "no wakeirq for uart%d\n", 17111cf94d3aSDoug Kehn up->port.line); 17121cf94d3aSDoug Kehn 17135745fd0fSLinus Walleij ret = serial_omap_probe_rs485(up, &pdev->dev); 17144a0ac0f5SMark Jackson if (ret < 0) 17154a0ac0f5SMark Jackson goto err_rs485; 17164a0ac0f5SMark Jackson 1717d92b0dfcSRajendra Nayak sprintf(up->name, "OMAP UART%d", up->port.line); 1718edd70ad7SGovindraj.R up->port.mapbase = mem->start; 1719d044d235SFelipe Balbi up->port.membase = base; 1720ab4382d2SGreg Kroah-Hartman up->port.flags = omap_up_info->flags; 1721ab4382d2SGreg Kroah-Hartman up->port.uartclk = omap_up_info->uartclk; 1722dadd7ecbSRicardo Ribalda Delgado up->port.rs485_config = serial_omap_config_rs485; 17238fe789dcSRajendra Nayak if (!up->port.uartclk) { 17248fe789dcSRajendra Nayak up->port.uartclk = DEFAULT_CLK_SPEED; 1725e5f9bf72SPhilippe Proulx dev_warn(&pdev->dev, 172680d8611dSPhilippe Proulx "No clock speed specified: using default: %d\n", 1727e5f9bf72SPhilippe Proulx DEFAULT_CLK_SPEED); 17288fe789dcSRajendra Nayak } 1729ab4382d2SGreg Kroah-Hartman 17302552d352SRafael J. Wysocki up->latency = PM_QOS_CPU_LATENCY_DEFAULT_VALUE; 17312552d352SRafael J. Wysocki up->calc_latency = PM_QOS_CPU_LATENCY_DEFAULT_VALUE; 173201d2b189SRafael J. Wysocki cpu_latency_qos_add_request(&up->pm_qos_request, up->latency); 17332fd14964SGovindraj.R INIT_WORK(&up->qos_work, serial_omap_uart_qos_work); 17342fd14964SGovindraj.R 173593220dccSFelipe Balbi platform_set_drvdata(pdev, up); 1736a630fbfbSTony Lindgren if (omap_up_info->autosuspend_timeout == 0) 1737a630fbfbSTony Lindgren omap_up_info->autosuspend_timeout = -1; 17385b6acc79SFelipe Balbi 1739a630fbfbSTony Lindgren device_init_wakeup(up->dev, true); 1740fcdca757SGovindraj.R pm_runtime_use_autosuspend(&pdev->dev); 1741fcdca757SGovindraj.R pm_runtime_set_autosuspend_delay(&pdev->dev, 1742c86845dbSDeepak K omap_up_info->autosuspend_timeout); 1743fcdca757SGovindraj.R 1744fcdca757SGovindraj.R pm_runtime_irq_safe(&pdev->dev); 17453026d14aSGrygorii Strashko pm_runtime_enable(&pdev->dev); 17463026d14aSGrygorii Strashko 1747fcdca757SGovindraj.R pm_runtime_get_sync(&pdev->dev); 1748fcdca757SGovindraj.R 17497c77c8deSGovindraj.R omap_serial_fill_features_erratas(up); 17507c77c8deSGovindraj.R 1751ba77433dSRajendra Nayak ui[up->port.line] = up; 1752ab4382d2SGreg Kroah-Hartman serial_omap_add_console_port(up); 1753ab4382d2SGreg Kroah-Hartman 1754ab4382d2SGreg Kroah-Hartman ret = uart_add_one_port(&serial_omap_reg, &up->port); 1755ab4382d2SGreg Kroah-Hartman if (ret != 0) 1756388bc262SShubhrajyoti D goto err_add_port; 1757ab4382d2SGreg Kroah-Hartman 1758660ac5f4SFelipe Balbi pm_runtime_mark_last_busy(up->dev); 1759660ac5f4SFelipe Balbi pm_runtime_put_autosuspend(up->dev); 1760ab4382d2SGreg Kroah-Hartman return 0; 1761388bc262SShubhrajyoti D 1762388bc262SShubhrajyoti D err_add_port: 176377e6fe7fSJohan Hovold pm_runtime_dont_use_autosuspend(&pdev->dev); 176477e6fe7fSJohan Hovold pm_runtime_put_sync(&pdev->dev); 1765388bc262SShubhrajyoti D pm_runtime_disable(&pdev->dev); 176601d2b189SRafael J. Wysocki cpu_latency_qos_remove_request(&up->pm_qos_request); 176766cf1d84SSemen Protsenko device_init_wakeup(up->dev, false); 17684a0ac0f5SMark Jackson err_rs485: 1769388bc262SShubhrajyoti D err_port_line: 1770ab4382d2SGreg Kroah-Hartman return ret; 1771ab4382d2SGreg Kroah-Hartman } 1772ab4382d2SGreg Kroah-Hartman 1773ae8d8a14SBill Pemberton static int serial_omap_remove(struct platform_device *dev) 1774ab4382d2SGreg Kroah-Hartman { 1775ab4382d2SGreg Kroah-Hartman struct uart_omap_port *up = platform_get_drvdata(dev); 1776ab4382d2SGreg Kroah-Hartman 1777099bd73dSJohan Hovold pm_runtime_get_sync(up->dev); 1778099bd73dSJohan Hovold 1779099bd73dSJohan Hovold uart_remove_one_port(&serial_omap_reg, &up->port); 1780099bd73dSJohan Hovold 1781099bd73dSJohan Hovold pm_runtime_dont_use_autosuspend(up->dev); 17827e9c8e7dSFelipe Balbi pm_runtime_put_sync(up->dev); 1783d8ee4ea6SFelipe Balbi pm_runtime_disable(up->dev); 178401d2b189SRafael J. Wysocki cpu_latency_qos_remove_request(&up->pm_qos_request); 178593a2e470SSanjay Singh Rawat device_init_wakeup(&dev->dev, false); 1786fcdca757SGovindraj.R 1787ab4382d2SGreg Kroah-Hartman return 0; 1788ab4382d2SGreg Kroah-Hartman } 1789ab4382d2SGreg Kroah-Hartman 179094734749SGovindraj.R /* 179194734749SGovindraj.R * Work Around for Errata i202 (2430, 3430, 3630, 4430 and 4460) 179294734749SGovindraj.R * The access to uart register after MDR1 Access 179394734749SGovindraj.R * causes UART to corrupt data. 179494734749SGovindraj.R * 179594734749SGovindraj.R * Need a delay = 179694734749SGovindraj.R * 5 L4 clock cycles + 5 UART functional clock cycle (@48MHz = ~0.2uS) 179794734749SGovindraj.R * give 10 times as much 179894734749SGovindraj.R */ 179994734749SGovindraj.R static void serial_omap_mdr1_errataset(struct uart_omap_port *up, u8 mdr1) 180094734749SGovindraj.R { 180194734749SGovindraj.R u8 timeout = 255; 180294734749SGovindraj.R 180394734749SGovindraj.R serial_out(up, UART_OMAP_MDR1, mdr1); 180494734749SGovindraj.R udelay(2); 180594734749SGovindraj.R serial_out(up, UART_FCR, up->fcr | UART_FCR_CLEAR_XMIT | 180694734749SGovindraj.R UART_FCR_CLEAR_RCVR); 180794734749SGovindraj.R /* 180894734749SGovindraj.R * Wait for FIFO to empty: when empty, RX_FIFO_E bit is 0 and 180994734749SGovindraj.R * TX_FIFO_E bit is 1. 181094734749SGovindraj.R */ 181194734749SGovindraj.R while (UART_LSR_THRE != (serial_in(up, UART_LSR) & 181294734749SGovindraj.R (UART_LSR_THRE | UART_LSR_DR))) { 181394734749SGovindraj.R timeout--; 181494734749SGovindraj.R if (!timeout) { 181594734749SGovindraj.R /* Should *never* happen. we warn and carry on */ 1816d8ee4ea6SFelipe Balbi dev_crit(up->dev, "Errata i202: timedout %x\n", 181794734749SGovindraj.R serial_in(up, UART_LSR)); 181894734749SGovindraj.R break; 181994734749SGovindraj.R } 182094734749SGovindraj.R udelay(1); 182194734749SGovindraj.R } 182294734749SGovindraj.R } 182394734749SGovindraj.R 1824d39fe4e5SRafael J. Wysocki #ifdef CONFIG_PM 18259f9ac1e8SGovindraj.R static void serial_omap_restore_context(struct uart_omap_port *up) 18269f9ac1e8SGovindraj.R { 182794734749SGovindraj.R if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) 182894734749SGovindraj.R serial_omap_mdr1_errataset(up, UART_OMAP_MDR1_DISABLE); 182994734749SGovindraj.R else 18309f9ac1e8SGovindraj.R serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE); 183194734749SGovindraj.R 18329f9ac1e8SGovindraj.R serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */ 18339f9ac1e8SGovindraj.R serial_out(up, UART_EFR, UART_EFR_ECB); 18349f9ac1e8SGovindraj.R serial_out(up, UART_LCR, 0x0); /* Operational mode */ 18359f9ac1e8SGovindraj.R serial_out(up, UART_IER, 0x0); 18369f9ac1e8SGovindraj.R serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */ 1837c538d20cSGovindraj.R serial_out(up, UART_DLL, up->dll); 1838c538d20cSGovindraj.R serial_out(up, UART_DLM, up->dlh); 18399f9ac1e8SGovindraj.R serial_out(up, UART_LCR, 0x0); /* Operational mode */ 18409f9ac1e8SGovindraj.R serial_out(up, UART_IER, up->ier); 18419f9ac1e8SGovindraj.R serial_out(up, UART_FCR, up->fcr); 18429f9ac1e8SGovindraj.R serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 18439f9ac1e8SGovindraj.R serial_out(up, UART_MCR, up->mcr); 18449f9ac1e8SGovindraj.R serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */ 1845c538d20cSGovindraj.R serial_out(up, UART_OMAP_SCR, up->scr); 18469f9ac1e8SGovindraj.R serial_out(up, UART_EFR, up->efr); 18479f9ac1e8SGovindraj.R serial_out(up, UART_LCR, up->lcr); 184894734749SGovindraj.R if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) 184994734749SGovindraj.R serial_omap_mdr1_errataset(up, up->mdr1); 185094734749SGovindraj.R else 1851c538d20cSGovindraj.R serial_out(up, UART_OMAP_MDR1, up->mdr1); 1852f64ffda6SGovindraj.R serial_out(up, UART_OMAP_WER, up->wer); 18539f9ac1e8SGovindraj.R } 18549f9ac1e8SGovindraj.R 1855fcdca757SGovindraj.R static int serial_omap_runtime_suspend(struct device *dev) 1856fcdca757SGovindraj.R { 1857ec3bebc6SGovindraj.R struct uart_omap_port *up = dev_get_drvdata(dev); 1858ec3bebc6SGovindraj.R 18597f25301dSWei Yongjun if (!up) 18607f25301dSWei Yongjun return -EINVAL; 18617f25301dSWei Yongjun 1862ddd85e22SSourav Poddar /* 1863ddd85e22SSourav Poddar * When using 'no_console_suspend', the console UART must not be 1864ddd85e22SSourav Poddar * suspended. Since driver suspend is managed by runtime suspend, 1865ddd85e22SSourav Poddar * preventing runtime suspend (by returning error) will keep device 1866ddd85e22SSourav Poddar * active during suspend. 1867ddd85e22SSourav Poddar */ 1868ddd85e22SSourav Poddar if (up->is_suspending && !console_suspend_enabled && 1869ddd85e22SSourav Poddar uart_console(&up->port)) 1870ddd85e22SSourav Poddar return -EBUSY; 1871ddd85e22SSourav Poddar 1872e5b57c03SFelipe Balbi up->context_loss_cnt = serial_omap_get_context_loss_count(up); 1873ec3bebc6SGovindraj.R 1874e5b57c03SFelipe Balbi serial_omap_enable_wakeup(up, true); 187562f3ec5fSGovindraj.R 18762552d352SRafael J. Wysocki up->latency = PM_QOS_CPU_LATENCY_DEFAULT_VALUE; 18772fd14964SGovindraj.R schedule_work(&up->qos_work); 18782fd14964SGovindraj.R 1879fcdca757SGovindraj.R return 0; 1880fcdca757SGovindraj.R } 1881fcdca757SGovindraj.R 1882fcdca757SGovindraj.R static int serial_omap_runtime_resume(struct device *dev) 1883fcdca757SGovindraj.R { 18849f9ac1e8SGovindraj.R struct uart_omap_port *up = dev_get_drvdata(dev); 18859f9ac1e8SGovindraj.R 188639aee51dSShubhrajyoti D int loss_cnt = serial_omap_get_context_loss_count(up); 1887ec3bebc6SGovindraj.R 1888d758c9c1STony Lindgren serial_omap_enable_wakeup(up, false); 1889d758c9c1STony Lindgren 189039aee51dSShubhrajyoti D if (loss_cnt < 0) { 1891a630fbfbSTony Lindgren dev_dbg(dev, "serial_omap_get_context_loss_count failed : %d\n", 189239aee51dSShubhrajyoti D loss_cnt); 18939f9ac1e8SGovindraj.R serial_omap_restore_context(up); 189439aee51dSShubhrajyoti D } else if (up->context_loss_cnt != loss_cnt) { 189539aee51dSShubhrajyoti D serial_omap_restore_context(up); 189639aee51dSShubhrajyoti D } 18972fd14964SGovindraj.R up->latency = up->calc_latency; 18982fd14964SGovindraj.R schedule_work(&up->qos_work); 18999f9ac1e8SGovindraj.R 1900fcdca757SGovindraj.R return 0; 1901fcdca757SGovindraj.R } 1902fcdca757SGovindraj.R #endif 1903fcdca757SGovindraj.R 1904fcdca757SGovindraj.R static const struct dev_pm_ops serial_omap_dev_pm_ops = { 1905fcdca757SGovindraj.R SET_SYSTEM_SLEEP_PM_OPS(serial_omap_suspend, serial_omap_resume) 1906fcdca757SGovindraj.R SET_RUNTIME_PM_OPS(serial_omap_runtime_suspend, 1907fcdca757SGovindraj.R serial_omap_runtime_resume, NULL) 1908ddd85e22SSourav Poddar .prepare = serial_omap_prepare, 1909ddd85e22SSourav Poddar .complete = serial_omap_complete, 1910fcdca757SGovindraj.R }; 1911fcdca757SGovindraj.R 1912d92b0dfcSRajendra Nayak #if defined(CONFIG_OF) 1913d92b0dfcSRajendra Nayak static const struct of_device_id omap_serial_of_match[] = { 1914d92b0dfcSRajendra Nayak { .compatible = "ti,omap2-uart" }, 1915d92b0dfcSRajendra Nayak { .compatible = "ti,omap3-uart" }, 1916d92b0dfcSRajendra Nayak { .compatible = "ti,omap4-uart" }, 1917d92b0dfcSRajendra Nayak {}, 1918d92b0dfcSRajendra Nayak }; 1919d92b0dfcSRajendra Nayak MODULE_DEVICE_TABLE(of, omap_serial_of_match); 1920d92b0dfcSRajendra Nayak #endif 1921d92b0dfcSRajendra Nayak 1922ab4382d2SGreg Kroah-Hartman static struct platform_driver serial_omap_driver = { 1923ab4382d2SGreg Kroah-Hartman .probe = serial_omap_probe, 19242d47b716SBill Pemberton .remove = serial_omap_remove, 1925ab4382d2SGreg Kroah-Hartman .driver = { 19261349ba02SJean Delvare .name = OMAP_SERIAL_DRIVER_NAME, 1927fcdca757SGovindraj.R .pm = &serial_omap_dev_pm_ops, 1928d92b0dfcSRajendra Nayak .of_match_table = of_match_ptr(omap_serial_of_match), 1929ab4382d2SGreg Kroah-Hartman }, 1930ab4382d2SGreg Kroah-Hartman }; 1931ab4382d2SGreg Kroah-Hartman 1932ab4382d2SGreg Kroah-Hartman static int __init serial_omap_init(void) 1933ab4382d2SGreg Kroah-Hartman { 1934ab4382d2SGreg Kroah-Hartman int ret; 1935ab4382d2SGreg Kroah-Hartman 1936ab4382d2SGreg Kroah-Hartman ret = uart_register_driver(&serial_omap_reg); 1937ab4382d2SGreg Kroah-Hartman if (ret != 0) 1938ab4382d2SGreg Kroah-Hartman return ret; 1939ab4382d2SGreg Kroah-Hartman ret = platform_driver_register(&serial_omap_driver); 1940ab4382d2SGreg Kroah-Hartman if (ret != 0) 1941ab4382d2SGreg Kroah-Hartman uart_unregister_driver(&serial_omap_reg); 1942ab4382d2SGreg Kroah-Hartman return ret; 1943ab4382d2SGreg Kroah-Hartman } 1944ab4382d2SGreg Kroah-Hartman 1945ab4382d2SGreg Kroah-Hartman static void __exit serial_omap_exit(void) 1946ab4382d2SGreg Kroah-Hartman { 1947ab4382d2SGreg Kroah-Hartman platform_driver_unregister(&serial_omap_driver); 1948ab4382d2SGreg Kroah-Hartman uart_unregister_driver(&serial_omap_reg); 1949ab4382d2SGreg Kroah-Hartman } 1950ab4382d2SGreg Kroah-Hartman 1951ab4382d2SGreg Kroah-Hartman module_init(serial_omap_init); 1952ab4382d2SGreg Kroah-Hartman module_exit(serial_omap_exit); 1953ab4382d2SGreg Kroah-Hartman 1954ab4382d2SGreg Kroah-Hartman MODULE_DESCRIPTION("OMAP High Speed UART driver"); 1955ab4382d2SGreg Kroah-Hartman MODULE_LICENSE("GPL"); 1956ab4382d2SGreg Kroah-Hartman MODULE_AUTHOR("Texas Instruments Inc"); 1957