1e3b3d0f5SGreg Kroah-Hartman // SPDX-License-Identifier: GPL-2.0+
2ab4382d2SGreg Kroah-Hartman /*
3ab4382d2SGreg Kroah-Hartman * Driver for OMAP-UART controller.
4ab4382d2SGreg Kroah-Hartman * Based on drivers/serial/8250.c
5ab4382d2SGreg Kroah-Hartman *
6ab4382d2SGreg Kroah-Hartman * Copyright (C) 2010 Texas Instruments.
7ab4382d2SGreg Kroah-Hartman *
8ab4382d2SGreg Kroah-Hartman * Authors:
9ab4382d2SGreg Kroah-Hartman * Govindraj R <govindraj.raja@ti.com>
10ab4382d2SGreg Kroah-Hartman * Thara Gopinath <thara@ti.com>
11ab4382d2SGreg Kroah-Hartman *
1225985edcSLucas De Marchi * Note: This driver is made separate from 8250 driver as we cannot
13ab4382d2SGreg Kroah-Hartman * over load 8250 driver with omap platform specific configuration for
14ab4382d2SGreg Kroah-Hartman * features like DMA, it makes easier to implement features like DMA and
15ab4382d2SGreg Kroah-Hartman * hardware flow control and software flow control configuration with
16ab4382d2SGreg Kroah-Hartman * this driver as required for the omap-platform.
17ab4382d2SGreg Kroah-Hartman */
18ab4382d2SGreg Kroah-Hartman
19ab4382d2SGreg Kroah-Hartman #include <linux/module.h>
20ab4382d2SGreg Kroah-Hartman #include <linux/init.h>
21ab4382d2SGreg Kroah-Hartman #include <linux/console.h>
2234619de1SIlpo Järvinen #include <linux/serial.h>
23ab4382d2SGreg Kroah-Hartman #include <linux/serial_reg.h>
24ab4382d2SGreg Kroah-Hartman #include <linux/delay.h>
25ab4382d2SGreg Kroah-Hartman #include <linux/slab.h>
26ab4382d2SGreg Kroah-Hartman #include <linux/tty.h>
27ab4382d2SGreg Kroah-Hartman #include <linux/tty_flip.h>
28d21e4005SFelipe Balbi #include <linux/platform_device.h>
29ab4382d2SGreg Kroah-Hartman #include <linux/io.h>
30ab4382d2SGreg Kroah-Hartman #include <linux/clk.h>
31ab4382d2SGreg Kroah-Hartman #include <linux/serial_core.h>
32ab4382d2SGreg Kroah-Hartman #include <linux/irq.h>
33fcdca757SGovindraj.R #include <linux/pm_runtime.h>
34ee83bd3bSTony Lindgren #include <linux/pm_wakeirq.h>
35d92b0dfcSRajendra Nayak #include <linux/of.h>
362a0b965cSTony Lindgren #include <linux/of_irq.h>
375745fd0fSLinus Walleij #include <linux/gpio/consumer.h>
38d9ba5737STony Lindgren #include <linux/platform_data/serial-omap.h>
39ab4382d2SGreg Kroah-Hartman
407af0ea5dSNishanth Menon #define OMAP_MAX_HSUART_PORTS 10
41f91b55abSRussell King
427c77c8deSGovindraj.R #define UART_BUILD_REVISION(x, y) (((x) << 8) | (y))
437c77c8deSGovindraj.R
447c77c8deSGovindraj.R #define OMAP_UART_REV_42 0x0402
457c77c8deSGovindraj.R #define OMAP_UART_REV_46 0x0406
467c77c8deSGovindraj.R #define OMAP_UART_REV_52 0x0502
477c77c8deSGovindraj.R #define OMAP_UART_REV_63 0x0603
487c77c8deSGovindraj.R
49f64ffda6SGovindraj.R #define OMAP_UART_TX_WAKEUP_EN BIT(7)
50f64ffda6SGovindraj.R
51f64ffda6SGovindraj.R /* Feature flags */
52f64ffda6SGovindraj.R #define OMAP_UART_WER_HAS_TX_WAKEUP BIT(0)
53f64ffda6SGovindraj.R
54f91b55abSRussell King #define UART_ERRATA_i202_MDR1_ACCESS BIT(0)
55f91b55abSRussell King #define UART_ERRATA_i291_DMA_FORCEIDLE BIT(1)
56f91b55abSRussell King
578fe789dcSRajendra Nayak #define DEFAULT_CLK_SPEED 48000000 /* 48Mhz */
588fe789dcSRajendra Nayak
590ba5f668SPaul Walmsley /* SCR register bitmasks */
600ba5f668SPaul Walmsley #define OMAP_UART_SCR_RX_TRIG_GRANU1_MASK (1 << 7)
611776fd05SAlexey Pelykh #define OMAP_UART_SCR_TX_TRIG_GRANU1_MASK (1 << 6)
62f91b55abSRussell King #define OMAP_UART_SCR_TX_EMPTY (1 << 3)
630ba5f668SPaul Walmsley
640ba5f668SPaul Walmsley /* FCR register bitmasks */
650ba5f668SPaul Walmsley #define OMAP_UART_FCR_RX_FIFO_TRIG_MASK (0x3 << 6)
666721ab7fSFelipe Balbi #define OMAP_UART_FCR_TX_FIFO_TRIG_MASK (0x3 << 4)
670ba5f668SPaul Walmsley
687c77c8deSGovindraj.R /* MVR register bitmasks */
697c77c8deSGovindraj.R #define OMAP_UART_MVR_SCHEME_SHIFT 30
707c77c8deSGovindraj.R
717c77c8deSGovindraj.R #define OMAP_UART_LEGACY_MVR_MAJ_MASK 0xf0
727c77c8deSGovindraj.R #define OMAP_UART_LEGACY_MVR_MAJ_SHIFT 4
737c77c8deSGovindraj.R #define OMAP_UART_LEGACY_MVR_MIN_MASK 0x0f
747c77c8deSGovindraj.R
757c77c8deSGovindraj.R #define OMAP_UART_MVR_MAJ_MASK 0x700
767c77c8deSGovindraj.R #define OMAP_UART_MVR_MAJ_SHIFT 8
777c77c8deSGovindraj.R #define OMAP_UART_MVR_MIN_MASK 0x3f
787c77c8deSGovindraj.R
79f91b55abSRussell King #define OMAP_UART_DMA_CH_FREE -1
80f91b55abSRussell King
81f91b55abSRussell King #define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA
82f91b55abSRussell King #define OMAP_MODE13X_SPEED 230400
83f91b55abSRussell King
84f91b55abSRussell King /* WER = 0x7F
85f91b55abSRussell King * Enable module level wakeup in WER reg
86f91b55abSRussell King */
87fbf7ebe4SPavel Machek #define OMAP_UART_WER_MOD_WKUP 0x7F
88f91b55abSRussell King
89f91b55abSRussell King /* Enable XON/XOFF flow control on output */
903af08bd7SRussell King #define OMAP_UART_SW_TX 0x08
91f91b55abSRussell King
92f91b55abSRussell King /* Enable XON/XOFF flow control on input */
933af08bd7SRussell King #define OMAP_UART_SW_RX 0x02
94f91b55abSRussell King
95f91b55abSRussell King #define OMAP_UART_SW_CLR 0xF0
96f91b55abSRussell King
97f91b55abSRussell King #define OMAP_UART_TCR_TRIG 0x0F
98f91b55abSRussell King
99f91b55abSRussell King struct uart_omap_dma {
100f91b55abSRussell King u8 uart_dma_tx;
101f91b55abSRussell King u8 uart_dma_rx;
102f91b55abSRussell King int rx_dma_channel;
103f91b55abSRussell King int tx_dma_channel;
104f91b55abSRussell King dma_addr_t rx_buf_dma_phys;
105f91b55abSRussell King dma_addr_t tx_buf_dma_phys;
106f91b55abSRussell King unsigned int uart_base;
107f91b55abSRussell King /*
108f91b55abSRussell King * Buffer for rx dma. It is not required for tx because the buffer
109f91b55abSRussell King * comes from port structure.
110f91b55abSRussell King */
111f91b55abSRussell King unsigned char *rx_buf;
112f91b55abSRussell King unsigned int prev_rx_dma_pos;
113f91b55abSRussell King int tx_buf_size;
114f91b55abSRussell King int tx_dma_used;
115f91b55abSRussell King int rx_dma_used;
116f91b55abSRussell King spinlock_t tx_lock;
117f91b55abSRussell King spinlock_t rx_lock;
118f91b55abSRussell King /* timer to poll activity on rx dma */
119f91b55abSRussell King struct timer_list rx_timer;
120f91b55abSRussell King unsigned int rx_buf_size;
121f91b55abSRussell King unsigned int rx_poll_rate;
122f91b55abSRussell King unsigned int rx_timeout;
123f91b55abSRussell King };
124f91b55abSRussell King
125d37c6cebSFelipe Balbi struct uart_omap_port {
126d37c6cebSFelipe Balbi struct uart_port port;
127d37c6cebSFelipe Balbi struct uart_omap_dma uart_dma;
128d37c6cebSFelipe Balbi struct device *dev;
1292a0b965cSTony Lindgren int wakeirq;
130d37c6cebSFelipe Balbi
131d37c6cebSFelipe Balbi unsigned char ier;
132d37c6cebSFelipe Balbi unsigned char lcr;
133d37c6cebSFelipe Balbi unsigned char mcr;
134d37c6cebSFelipe Balbi unsigned char fcr;
135d37c6cebSFelipe Balbi unsigned char efr;
136d37c6cebSFelipe Balbi unsigned char dll;
137d37c6cebSFelipe Balbi unsigned char dlh;
138d37c6cebSFelipe Balbi unsigned char mdr1;
139d37c6cebSFelipe Balbi unsigned char scr;
140f64ffda6SGovindraj.R unsigned char wer;
141d37c6cebSFelipe Balbi
142d37c6cebSFelipe Balbi int use_dma;
143d37c6cebSFelipe Balbi /*
144d37c6cebSFelipe Balbi * Some bits in registers are cleared on a read, so they must
145fbf7ebe4SPavel Machek * be saved whenever the register is read, but the bits will not
146d37c6cebSFelipe Balbi * be immediately processed.
147d37c6cebSFelipe Balbi */
148d37c6cebSFelipe Balbi unsigned int lsr_break_flag;
149d37c6cebSFelipe Balbi unsigned char msr_saved_flags;
150d37c6cebSFelipe Balbi char name[20];
151d37c6cebSFelipe Balbi unsigned long port_activity;
15239aee51dSShubhrajyoti D int context_loss_cnt;
153d37c6cebSFelipe Balbi u32 errata;
154f64ffda6SGovindraj.R u32 features;
155d37c6cebSFelipe Balbi
1565745fd0fSLinus Walleij struct gpio_desc *rts_gpiod;
1574a0ac0f5SMark Jackson
158d37c6cebSFelipe Balbi struct pm_qos_request pm_qos_request;
159d37c6cebSFelipe Balbi u32 latency;
160d37c6cebSFelipe Balbi u32 calc_latency;
161d37c6cebSFelipe Balbi struct work_struct qos_work;
162ddd85e22SSourav Poddar bool is_suspending;
163e2a5e844SDario Binacchi
164e2a5e844SDario Binacchi unsigned int rs485_tx_filter_count;
165d37c6cebSFelipe Balbi };
166d37c6cebSFelipe Balbi
167d37c6cebSFelipe Balbi #define to_uart_omap_port(p) ((container_of((p), struct uart_omap_port, port)))
168d37c6cebSFelipe Balbi
169ab4382d2SGreg Kroah-Hartman static struct uart_omap_port *ui[OMAP_MAX_HSUART_PORTS];
170ab4382d2SGreg Kroah-Hartman
171ab4382d2SGreg Kroah-Hartman /* Forward declaration of functions */
17294734749SGovindraj.R static void serial_omap_mdr1_errataset(struct uart_omap_port *up, u8 mdr1);
173ab4382d2SGreg Kroah-Hartman
serial_in(struct uart_omap_port * up,int offset)174ab4382d2SGreg Kroah-Hartman static inline unsigned int serial_in(struct uart_omap_port *up, int offset)
175ab4382d2SGreg Kroah-Hartman {
176ab4382d2SGreg Kroah-Hartman offset <<= up->port.regshift;
177ab4382d2SGreg Kroah-Hartman return readw(up->port.membase + offset);
178ab4382d2SGreg Kroah-Hartman }
179ab4382d2SGreg Kroah-Hartman
serial_out(struct uart_omap_port * up,int offset,int value)180ab4382d2SGreg Kroah-Hartman static inline void serial_out(struct uart_omap_port *up, int offset, int value)
181ab4382d2SGreg Kroah-Hartman {
182ab4382d2SGreg Kroah-Hartman offset <<= up->port.regshift;
183ab4382d2SGreg Kroah-Hartman writew(value, up->port.membase + offset);
184ab4382d2SGreg Kroah-Hartman }
185ab4382d2SGreg Kroah-Hartman
serial_omap_clear_fifos(struct uart_omap_port * up)186ab4382d2SGreg Kroah-Hartman static inline void serial_omap_clear_fifos(struct uart_omap_port *up)
187ab4382d2SGreg Kroah-Hartman {
188ab4382d2SGreg Kroah-Hartman serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
189ab4382d2SGreg Kroah-Hartman serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
190ab4382d2SGreg Kroah-Hartman UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
191ab4382d2SGreg Kroah-Hartman serial_out(up, UART_FCR, 0);
192ab4382d2SGreg Kroah-Hartman }
193ab4382d2SGreg Kroah-Hartman
194adfb9233SEzequiel Garcia #ifdef CONFIG_PM
serial_omap_get_context_loss_count(struct uart_omap_port * up)195e5b57c03SFelipe Balbi static int serial_omap_get_context_loss_count(struct uart_omap_port *up)
196e5b57c03SFelipe Balbi {
197574de559SJingoo Han struct omap_uart_port_info *pdata = dev_get_platdata(up->dev);
198e5b57c03SFelipe Balbi
199ce2f08deSFelipe Balbi if (!pdata || !pdata->get_context_loss_count)
200a630fbfbSTony Lindgren return -EINVAL;
201e5b57c03SFelipe Balbi
202d8ee4ea6SFelipe Balbi return pdata->get_context_loss_count(up->dev);
203e5b57c03SFelipe Balbi }
204e5b57c03SFelipe Balbi
205ee83bd3bSTony Lindgren /* REVISIT: Remove this when omap3 boots in device tree only mode */
serial_omap_enable_wakeup(struct uart_omap_port * up,bool enable)206e5b57c03SFelipe Balbi static void serial_omap_enable_wakeup(struct uart_omap_port *up, bool enable)
207e5b57c03SFelipe Balbi {
208574de559SJingoo Han struct omap_uart_port_info *pdata = dev_get_platdata(up->dev);
209e5b57c03SFelipe Balbi
210ce2f08deSFelipe Balbi if (!pdata || !pdata->enable_wakeup)
211ce2f08deSFelipe Balbi return;
212ce2f08deSFelipe Balbi
213d8ee4ea6SFelipe Balbi pdata->enable_wakeup(up->dev, enable);
214e5b57c03SFelipe Balbi }
215adfb9233SEzequiel Garcia #endif /* CONFIG_PM */
216e5b57c03SFelipe Balbi
217ab4382d2SGreg Kroah-Hartman /*
21813d6ceb4SFrans Klaver * Calculate the absolute difference between the desired and actual baud
21913d6ceb4SFrans Klaver * rate for the given mode.
22013d6ceb4SFrans Klaver */
calculate_baud_abs_diff(struct uart_port * port,unsigned int baud,unsigned int mode)22113d6ceb4SFrans Klaver static inline int calculate_baud_abs_diff(struct uart_port *port,
22213d6ceb4SFrans Klaver unsigned int baud, unsigned int mode)
22313d6ceb4SFrans Klaver {
22413d6ceb4SFrans Klaver unsigned int n = port->uartclk / (mode * baud);
22513d6ceb4SFrans Klaver
22613d6ceb4SFrans Klaver if (n == 0)
22713d6ceb4SFrans Klaver n = 1;
22813d6ceb4SFrans Klaver
22946f12960SAndy Shevchenko return abs_diff(baud, port->uartclk / (mode * n));
23013d6ceb4SFrans Klaver }
23113d6ceb4SFrans Klaver
23213d6ceb4SFrans Klaver /*
2335fe21236SAlexey Pelykh * serial_omap_baud_is_mode16 - check if baud rate is MODE16X
2345fe21236SAlexey Pelykh * @port: uart port info
2355fe21236SAlexey Pelykh * @baud: baudrate for which mode needs to be determined
2365fe21236SAlexey Pelykh *
2375fe21236SAlexey Pelykh * Returns true if baud rate is MODE16X and false if MODE13X
2385fe21236SAlexey Pelykh * Original table in OMAP TRM named "UART Mode Baud Rates, Divisor Values,
2395fe21236SAlexey Pelykh * and Error Rates" determines modes not for all common baud rates.
2405fe21236SAlexey Pelykh * E.g. for 1000000 baud rate mode must be 16x, but according to that
2415fe21236SAlexey Pelykh * table it's determined as 13x.
2425fe21236SAlexey Pelykh */
2435fe21236SAlexey Pelykh static bool
serial_omap_baud_is_mode16(struct uart_port * port,unsigned int baud)2445fe21236SAlexey Pelykh serial_omap_baud_is_mode16(struct uart_port *port, unsigned int baud)
2455fe21236SAlexey Pelykh {
24613d6ceb4SFrans Klaver int abs_diff_13 = calculate_baud_abs_diff(port, baud, 13);
24713d6ceb4SFrans Klaver int abs_diff_16 = calculate_baud_abs_diff(port, baud, 16);
248dc318756SFrans Klaver
24913d6ceb4SFrans Klaver return (abs_diff_13 >= abs_diff_16);
2505fe21236SAlexey Pelykh }
2515fe21236SAlexey Pelykh
2525fe21236SAlexey Pelykh /*
253ab4382d2SGreg Kroah-Hartman * serial_omap_get_divisor - calculate divisor value
254ab4382d2SGreg Kroah-Hartman * @port: uart port info
255ab4382d2SGreg Kroah-Hartman * @baud: baudrate for which divisor needs to be calculated.
256ab4382d2SGreg Kroah-Hartman */
257ab4382d2SGreg Kroah-Hartman static unsigned int
serial_omap_get_divisor(struct uart_port * port,unsigned int baud)258ab4382d2SGreg Kroah-Hartman serial_omap_get_divisor(struct uart_port *port, unsigned int baud)
259ab4382d2SGreg Kroah-Hartman {
2604250b5d9SAlexey Pelykh unsigned int mode;
261ab4382d2SGreg Kroah-Hartman
2625fe21236SAlexey Pelykh if (!serial_omap_baud_is_mode16(port, baud))
2634250b5d9SAlexey Pelykh mode = 13;
264ab4382d2SGreg Kroah-Hartman else
2654250b5d9SAlexey Pelykh mode = 16;
2664250b5d9SAlexey Pelykh return port->uartclk/(mode * baud);
267ab4382d2SGreg Kroah-Hartman }
268ab4382d2SGreg Kroah-Hartman
serial_omap_enable_ms(struct uart_port * port)269ab4382d2SGreg Kroah-Hartman static void serial_omap_enable_ms(struct uart_port *port)
270ab4382d2SGreg Kroah-Hartman {
271c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port);
272ab4382d2SGreg Kroah-Hartman
273ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_enable_ms+%d\n", up->port.line);
274fcdca757SGovindraj.R
275ab4382d2SGreg Kroah-Hartman up->ier |= UART_IER_MSI;
276ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier);
277ab4382d2SGreg Kroah-Hartman }
278ab4382d2SGreg Kroah-Hartman
serial_omap_stop_tx(struct uart_port * port)279ab4382d2SGreg Kroah-Hartman static void serial_omap_stop_tx(struct uart_port *port)
280ab4382d2SGreg Kroah-Hartman {
281c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port);
2824a0ac0f5SMark Jackson int res;
283ab4382d2SGreg Kroah-Hartman
284018e7448SPhilippe Proulx /* Handle RS-485 */
285dadd7ecbSRicardo Ribalda Delgado if (port->rs485.flags & SER_RS485_ENABLED) {
286018e7448SPhilippe Proulx if (up->scr & OMAP_UART_SCR_TX_EMPTY) {
287018e7448SPhilippe Proulx /* THR interrupt is fired when both TX FIFO and TX
288018e7448SPhilippe Proulx * shift register are empty. This means there's nothing
289018e7448SPhilippe Proulx * left to transmit now, so make sure the THR interrupt
290018e7448SPhilippe Proulx * is fired when TX FIFO is below the trigger level,
291018e7448SPhilippe Proulx * disable THR interrupts and toggle the RS-485 GPIO
292018e7448SPhilippe Proulx * data direction pin if needed.
293018e7448SPhilippe Proulx */
294018e7448SPhilippe Proulx up->scr &= ~OMAP_UART_SCR_TX_EMPTY;
295018e7448SPhilippe Proulx serial_out(up, UART_OMAP_SCR, up->scr);
296dadd7ecbSRicardo Ribalda Delgado res = (port->rs485.flags & SER_RS485_RTS_AFTER_SEND) ?
297dadd7ecbSRicardo Ribalda Delgado 1 : 0;
298e2752ae3SLukas Wunner if (gpiod_get_value(up->rts_gpiod) != res) {
299dadd7ecbSRicardo Ribalda Delgado if (port->rs485.delay_rts_after_send > 0)
300dadd7ecbSRicardo Ribalda Delgado mdelay(
301dadd7ecbSRicardo Ribalda Delgado port->rs485.delay_rts_after_send);
3025745fd0fSLinus Walleij gpiod_set_value(up->rts_gpiod, res);
3034a0ac0f5SMark Jackson }
304018e7448SPhilippe Proulx } else {
305018e7448SPhilippe Proulx /* We're asked to stop, but there's still stuff in the
306018e7448SPhilippe Proulx * UART FIFO, so make sure the THR interrupt is fired
307018e7448SPhilippe Proulx * when both TX FIFO and TX shift register are empty.
308018e7448SPhilippe Proulx * The next THR interrupt (if no transmission is started
309018e7448SPhilippe Proulx * in the meantime) will indicate the end of a
310018e7448SPhilippe Proulx * transmission. Therefore we _don't_ disable THR
311018e7448SPhilippe Proulx * interrupts in this situation.
312018e7448SPhilippe Proulx */
313018e7448SPhilippe Proulx up->scr |= OMAP_UART_SCR_TX_EMPTY;
314018e7448SPhilippe Proulx serial_out(up, UART_OMAP_SCR, up->scr);
315018e7448SPhilippe Proulx return;
3164a0ac0f5SMark Jackson }
3174a0ac0f5SMark Jackson }
3184a0ac0f5SMark Jackson
319ab4382d2SGreg Kroah-Hartman if (up->ier & UART_IER_THRI) {
320ab4382d2SGreg Kroah-Hartman up->ier &= ~UART_IER_THRI;
321ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier);
322ab4382d2SGreg Kroah-Hartman }
323ab4382d2SGreg Kroah-Hartman }
324ab4382d2SGreg Kroah-Hartman
serial_omap_stop_rx(struct uart_port * port)325ab4382d2SGreg Kroah-Hartman static void serial_omap_stop_rx(struct uart_port *port)
326ab4382d2SGreg Kroah-Hartman {
327c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port);
328ab4382d2SGreg Kroah-Hartman
329cab53dc9SDimitris Lampridis up->ier &= ~(UART_IER_RLSI | UART_IER_RDI);
330ab4382d2SGreg Kroah-Hartman up->port.read_status_mask &= ~UART_LSR_DR;
331ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier);
332ab4382d2SGreg Kroah-Hartman }
333ab4382d2SGreg Kroah-Hartman
serial_omap_put_char(struct uart_omap_port * up,unsigned char ch)3347ef26ab6SJiri Slaby static void serial_omap_put_char(struct uart_omap_port *up, unsigned char ch)
3357ef26ab6SJiri Slaby {
3367ef26ab6SJiri Slaby serial_out(up, UART_TX, ch);
3377ef26ab6SJiri Slaby
3387ef26ab6SJiri Slaby if ((up->port.rs485.flags & SER_RS485_ENABLED) &&
3397ef26ab6SJiri Slaby !(up->port.rs485.flags & SER_RS485_RX_DURING_TX))
3407ef26ab6SJiri Slaby up->rs485_tx_filter_count++;
3417ef26ab6SJiri Slaby }
3427ef26ab6SJiri Slaby
transmit_chars(struct uart_omap_port * up,unsigned int lsr)343bf63a086SFelipe Balbi static void transmit_chars(struct uart_omap_port *up, unsigned int lsr)
344ab4382d2SGreg Kroah-Hartman {
345d11cc8c3SJiri Slaby (SUSE) u8 ch;
346ab4382d2SGreg Kroah-Hartman
347d11cc8c3SJiri Slaby (SUSE) uart_port_tx_limited(&up->port, ch, up->port.fifosize / 4,
348d11cc8c3SJiri Slaby (SUSE) true,
349d11cc8c3SJiri Slaby (SUSE) serial_omap_put_char(up, ch),
350d11cc8c3SJiri Slaby (SUSE) ({}));
351ab4382d2SGreg Kroah-Hartman }
352ab4382d2SGreg Kroah-Hartman
serial_omap_enable_ier_thri(struct uart_omap_port * up)353ab4382d2SGreg Kroah-Hartman static inline void serial_omap_enable_ier_thri(struct uart_omap_port *up)
354ab4382d2SGreg Kroah-Hartman {
355ab4382d2SGreg Kroah-Hartman if (!(up->ier & UART_IER_THRI)) {
356ab4382d2SGreg Kroah-Hartman up->ier |= UART_IER_THRI;
357ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier);
358ab4382d2SGreg Kroah-Hartman }
359ab4382d2SGreg Kroah-Hartman }
360ab4382d2SGreg Kroah-Hartman
serial_omap_start_tx(struct uart_port * port)361ab4382d2SGreg Kroah-Hartman static void serial_omap_start_tx(struct uart_port *port)
362ab4382d2SGreg Kroah-Hartman {
363c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port);
3644a0ac0f5SMark Jackson int res;
365ab4382d2SGreg Kroah-Hartman
366018e7448SPhilippe Proulx /* Handle RS-485 */
367dadd7ecbSRicardo Ribalda Delgado if (port->rs485.flags & SER_RS485_ENABLED) {
368018e7448SPhilippe Proulx /* Fire THR interrupts when FIFO is below trigger level */
369018e7448SPhilippe Proulx up->scr &= ~OMAP_UART_SCR_TX_EMPTY;
370018e7448SPhilippe Proulx serial_out(up, UART_OMAP_SCR, up->scr);
371018e7448SPhilippe Proulx
3724a0ac0f5SMark Jackson /* if rts not already enabled */
373dadd7ecbSRicardo Ribalda Delgado res = (port->rs485.flags & SER_RS485_RTS_ON_SEND) ? 1 : 0;
374e2752ae3SLukas Wunner if (gpiod_get_value(up->rts_gpiod) != res) {
3755745fd0fSLinus Walleij gpiod_set_value(up->rts_gpiod, res);
376dadd7ecbSRicardo Ribalda Delgado if (port->rs485.delay_rts_before_send > 0)
377dadd7ecbSRicardo Ribalda Delgado mdelay(port->rs485.delay_rts_before_send);
3784a0ac0f5SMark Jackson }
3794a0ac0f5SMark Jackson }
3804a0ac0f5SMark Jackson
381dadd7ecbSRicardo Ribalda Delgado if ((port->rs485.flags & SER_RS485_ENABLED) &&
382dadd7ecbSRicardo Ribalda Delgado !(port->rs485.flags & SER_RS485_RX_DURING_TX))
383e2a5e844SDario Binacchi up->rs485_tx_filter_count = 0;
3844a0ac0f5SMark Jackson
385ab4382d2SGreg Kroah-Hartman serial_omap_enable_ier_thri(up);
386ab4382d2SGreg Kroah-Hartman }
387ab4382d2SGreg Kroah-Hartman
serial_omap_throttle(struct uart_port * port)3883af08bd7SRussell King static void serial_omap_throttle(struct uart_port *port)
3893af08bd7SRussell King {
3903af08bd7SRussell King struct uart_omap_port *up = to_uart_omap_port(port);
3913af08bd7SRussell King unsigned long flags;
3923af08bd7SRussell King
3933af08bd7SRussell King spin_lock_irqsave(&up->port.lock, flags);
3943af08bd7SRussell King up->ier &= ~(UART_IER_RLSI | UART_IER_RDI);
3953af08bd7SRussell King serial_out(up, UART_IER, up->ier);
3963af08bd7SRussell King spin_unlock_irqrestore(&up->port.lock, flags);
3973af08bd7SRussell King }
3983af08bd7SRussell King
serial_omap_unthrottle(struct uart_port * port)3993af08bd7SRussell King static void serial_omap_unthrottle(struct uart_port *port)
4003af08bd7SRussell King {
4013af08bd7SRussell King struct uart_omap_port *up = to_uart_omap_port(port);
4023af08bd7SRussell King unsigned long flags;
4033af08bd7SRussell King
4043af08bd7SRussell King spin_lock_irqsave(&up->port.lock, flags);
4053af08bd7SRussell King up->ier |= UART_IER_RLSI | UART_IER_RDI;
4063af08bd7SRussell King serial_out(up, UART_IER, up->ier);
4073af08bd7SRussell King spin_unlock_irqrestore(&up->port.lock, flags);
4083af08bd7SRussell King }
4093af08bd7SRussell King
check_modem_status(struct uart_omap_port * up)410ab4382d2SGreg Kroah-Hartman static unsigned int check_modem_status(struct uart_omap_port *up)
411ab4382d2SGreg Kroah-Hartman {
412ab4382d2SGreg Kroah-Hartman unsigned int status;
413ab4382d2SGreg Kroah-Hartman
414ab4382d2SGreg Kroah-Hartman status = serial_in(up, UART_MSR);
415ab4382d2SGreg Kroah-Hartman status |= up->msr_saved_flags;
416ab4382d2SGreg Kroah-Hartman up->msr_saved_flags = 0;
417ab4382d2SGreg Kroah-Hartman if ((status & UART_MSR_ANY_DELTA) == 0)
418ab4382d2SGreg Kroah-Hartman return status;
419ab4382d2SGreg Kroah-Hartman
420ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI &&
421ab4382d2SGreg Kroah-Hartman up->port.state != NULL) {
422ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_TERI)
423ab4382d2SGreg Kroah-Hartman up->port.icount.rng++;
424ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DDSR)
425ab4382d2SGreg Kroah-Hartman up->port.icount.dsr++;
426ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DDCD)
427ab4382d2SGreg Kroah-Hartman uart_handle_dcd_change
428ab4382d2SGreg Kroah-Hartman (&up->port, status & UART_MSR_DCD);
429ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DCTS)
430ab4382d2SGreg Kroah-Hartman uart_handle_cts_change
431ab4382d2SGreg Kroah-Hartman (&up->port, status & UART_MSR_CTS);
432ab4382d2SGreg Kroah-Hartman wake_up_interruptible(&up->port.state->port.delta_msr_wait);
433ab4382d2SGreg Kroah-Hartman }
434ab4382d2SGreg Kroah-Hartman
435ab4382d2SGreg Kroah-Hartman return status;
436ab4382d2SGreg Kroah-Hartman }
437ab4382d2SGreg Kroah-Hartman
serial_omap_rlsi(struct uart_omap_port * up,unsigned int lsr)43872256cbdSFelipe Balbi static void serial_omap_rlsi(struct uart_omap_port *up, unsigned int lsr)
43972256cbdSFelipe Balbi {
440fd2b55f8SJiri Slaby u8 flag;
4419a12fcf8SShubhrajyoti D
442e83c6587SXiongfeng Wang /*
443e83c6587SXiongfeng Wang * Read one data character out to avoid stalling the receiver according
444e83c6587SXiongfeng Wang * to the table 23-246 of the omap4 TRM.
445e83c6587SXiongfeng Wang */
446e2a5e844SDario Binacchi if (likely(lsr & UART_LSR_DR)) {
447e83c6587SXiongfeng Wang serial_in(up, UART_RX);
448e2a5e844SDario Binacchi if ((up->port.rs485.flags & SER_RS485_ENABLED) &&
449e2a5e844SDario Binacchi !(up->port.rs485.flags & SER_RS485_RX_DURING_TX) &&
450e2a5e844SDario Binacchi up->rs485_tx_filter_count)
451e2a5e844SDario Binacchi up->rs485_tx_filter_count--;
452e2a5e844SDario Binacchi }
45372256cbdSFelipe Balbi
45472256cbdSFelipe Balbi up->port.icount.rx++;
45572256cbdSFelipe Balbi flag = TTY_NORMAL;
45672256cbdSFelipe Balbi
45772256cbdSFelipe Balbi if (lsr & UART_LSR_BI) {
45872256cbdSFelipe Balbi flag = TTY_BREAK;
45972256cbdSFelipe Balbi lsr &= ~(UART_LSR_FE | UART_LSR_PE);
46072256cbdSFelipe Balbi up->port.icount.brk++;
46172256cbdSFelipe Balbi /*
46272256cbdSFelipe Balbi * We do the SysRQ and SAK checking
46372256cbdSFelipe Balbi * here because otherwise the break
46472256cbdSFelipe Balbi * may get masked by ignore_status_mask
46572256cbdSFelipe Balbi * or read_status_mask.
46672256cbdSFelipe Balbi */
46772256cbdSFelipe Balbi if (uart_handle_break(&up->port))
46872256cbdSFelipe Balbi return;
46972256cbdSFelipe Balbi
47072256cbdSFelipe Balbi }
47172256cbdSFelipe Balbi
47272256cbdSFelipe Balbi if (lsr & UART_LSR_PE) {
47372256cbdSFelipe Balbi flag = TTY_PARITY;
47472256cbdSFelipe Balbi up->port.icount.parity++;
47572256cbdSFelipe Balbi }
47672256cbdSFelipe Balbi
47772256cbdSFelipe Balbi if (lsr & UART_LSR_FE) {
47872256cbdSFelipe Balbi flag = TTY_FRAME;
47972256cbdSFelipe Balbi up->port.icount.frame++;
48072256cbdSFelipe Balbi }
48172256cbdSFelipe Balbi
48272256cbdSFelipe Balbi if (lsr & UART_LSR_OE)
48372256cbdSFelipe Balbi up->port.icount.overrun++;
48472256cbdSFelipe Balbi
48572256cbdSFelipe Balbi #ifdef CONFIG_SERIAL_OMAP_CONSOLE
48672256cbdSFelipe Balbi if (up->port.line == up->port.cons->index) {
48772256cbdSFelipe Balbi /* Recover the break flag from console xmit */
48872256cbdSFelipe Balbi lsr |= up->lsr_break_flag;
48972256cbdSFelipe Balbi }
49072256cbdSFelipe Balbi #endif
49172256cbdSFelipe Balbi uart_insert_char(&up->port, lsr, UART_LSR_OE, 0, flag);
49272256cbdSFelipe Balbi }
49372256cbdSFelipe Balbi
serial_omap_rdi(struct uart_omap_port * up,unsigned int lsr)49472256cbdSFelipe Balbi static void serial_omap_rdi(struct uart_omap_port *up, unsigned int lsr)
49572256cbdSFelipe Balbi {
496fd2b55f8SJiri Slaby u8 ch;
49772256cbdSFelipe Balbi
49872256cbdSFelipe Balbi if (!(lsr & UART_LSR_DR))
49972256cbdSFelipe Balbi return;
50072256cbdSFelipe Balbi
50172256cbdSFelipe Balbi ch = serial_in(up, UART_RX);
502e2a5e844SDario Binacchi if ((up->port.rs485.flags & SER_RS485_ENABLED) &&
503e2a5e844SDario Binacchi !(up->port.rs485.flags & SER_RS485_RX_DURING_TX) &&
504e2a5e844SDario Binacchi up->rs485_tx_filter_count) {
505e2a5e844SDario Binacchi up->rs485_tx_filter_count--;
506e2a5e844SDario Binacchi return;
507e2a5e844SDario Binacchi }
508e2a5e844SDario Binacchi
50972256cbdSFelipe Balbi up->port.icount.rx++;
51072256cbdSFelipe Balbi
51172256cbdSFelipe Balbi if (uart_handle_sysrq_char(&up->port, ch))
51272256cbdSFelipe Balbi return;
51372256cbdSFelipe Balbi
5144d1fceb1SJiri Slaby uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, TTY_NORMAL);
51572256cbdSFelipe Balbi }
51672256cbdSFelipe Balbi
517ab4382d2SGreg Kroah-Hartman /**
518ab4382d2SGreg Kroah-Hartman * serial_omap_irq() - This handles the interrupt from one port
519ab4382d2SGreg Kroah-Hartman * @irq: uart port irq number
520ab4382d2SGreg Kroah-Hartman * @dev_id: uart port info
521ab4382d2SGreg Kroah-Hartman */
serial_omap_irq(int irq,void * dev_id)52252c5513dSFelipe Balbi static irqreturn_t serial_omap_irq(int irq, void *dev_id)
523ab4382d2SGreg Kroah-Hartman {
524ab4382d2SGreg Kroah-Hartman struct uart_omap_port *up = dev_id;
525ab4382d2SGreg Kroah-Hartman unsigned int iir, lsr;
52681b75aefSFelipe Balbi unsigned int type;
5277b013e44SGreg Kroah-Hartman irqreturn_t ret = IRQ_NONE;
52872256cbdSFelipe Balbi int max_count = 256;
529ab4382d2SGreg Kroah-Hartman
5306c3a30c7SFelipe Balbi spin_lock(&up->port.lock);
53172256cbdSFelipe Balbi
53272256cbdSFelipe Balbi do {
53381b75aefSFelipe Balbi iir = serial_in(up, UART_IIR);
53481b75aefSFelipe Balbi if (iir & UART_IIR_NO_INT)
53572256cbdSFelipe Balbi break;
53681b75aefSFelipe Balbi
5377b013e44SGreg Kroah-Hartman ret = IRQ_HANDLED;
538ab4382d2SGreg Kroah-Hartman lsr = serial_in(up, UART_LSR);
53981b75aefSFelipe Balbi
54081b75aefSFelipe Balbi /* extract IRQ type from IIR register */
54181b75aefSFelipe Balbi type = iir & 0x3e;
54281b75aefSFelipe Balbi
54381b75aefSFelipe Balbi switch (type) {
54481b75aefSFelipe Balbi case UART_IIR_MSI:
54581b75aefSFelipe Balbi check_modem_status(up);
54681b75aefSFelipe Balbi break;
54781b75aefSFelipe Balbi case UART_IIR_THRI:
548bf63a086SFelipe Balbi transmit_chars(up, lsr);
54981b75aefSFelipe Balbi break;
55072256cbdSFelipe Balbi case UART_IIR_RX_TIMEOUT:
55181b75aefSFelipe Balbi case UART_IIR_RDI:
55272256cbdSFelipe Balbi serial_omap_rdi(up, lsr);
55381b75aefSFelipe Balbi break;
55481b75aefSFelipe Balbi case UART_IIR_RLSI:
55572256cbdSFelipe Balbi serial_omap_rlsi(up, lsr);
55681b75aefSFelipe Balbi break;
55781b75aefSFelipe Balbi case UART_IIR_CTS_RTS_DSR:
55872256cbdSFelipe Balbi /* simply try again */
55972256cbdSFelipe Balbi break;
56081b75aefSFelipe Balbi case UART_IIR_XOFF:
56181b75aefSFelipe Balbi default:
56281b75aefSFelipe Balbi break;
563ab4382d2SGreg Kroah-Hartman }
564e60f9fd0SMartin Townsend } while (max_count--);
565ab4382d2SGreg Kroah-Hartman
5666c3a30c7SFelipe Balbi spin_unlock(&up->port.lock);
56772256cbdSFelipe Balbi
5682e124b4aSJiri Slaby tty_flip_buffer_push(&up->port.state->port);
56972256cbdSFelipe Balbi
570ab4382d2SGreg Kroah-Hartman up->port_activity = jiffies;
57181b75aefSFelipe Balbi
5727b013e44SGreg Kroah-Hartman return ret;
573ab4382d2SGreg Kroah-Hartman }
574ab4382d2SGreg Kroah-Hartman
serial_omap_tx_empty(struct uart_port * port)575ab4382d2SGreg Kroah-Hartman static unsigned int serial_omap_tx_empty(struct uart_port *port)
576ab4382d2SGreg Kroah-Hartman {
577c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port);
57818ee37e1SJohan Hovold unsigned long flags;
579ab4382d2SGreg Kroah-Hartman unsigned int ret = 0;
580ab4382d2SGreg Kroah-Hartman
581ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_tx_empty+%d\n", up->port.line);
582ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags);
583ab4382d2SGreg Kroah-Hartman ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
584ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags);
58533e5571eSTony Lindgren
586ab4382d2SGreg Kroah-Hartman return ret;
587ab4382d2SGreg Kroah-Hartman }
588ab4382d2SGreg Kroah-Hartman
serial_omap_get_mctrl(struct uart_port * port)589ab4382d2SGreg Kroah-Hartman static unsigned int serial_omap_get_mctrl(struct uart_port *port)
590ab4382d2SGreg Kroah-Hartman {
591c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port);
592514f31d1SShubhrajyoti D unsigned int status;
593ab4382d2SGreg Kroah-Hartman unsigned int ret = 0;
594ab4382d2SGreg Kroah-Hartman
595ab4382d2SGreg Kroah-Hartman status = check_modem_status(up);
596fcdca757SGovindraj.R
597ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_get_mctrl+%d\n", up->port.line);
598ab4382d2SGreg Kroah-Hartman
599ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DCD)
600ab4382d2SGreg Kroah-Hartman ret |= TIOCM_CAR;
601ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_RI)
602ab4382d2SGreg Kroah-Hartman ret |= TIOCM_RNG;
603ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_DSR)
604ab4382d2SGreg Kroah-Hartman ret |= TIOCM_DSR;
605ab4382d2SGreg Kroah-Hartman if (status & UART_MSR_CTS)
606ab4382d2SGreg Kroah-Hartman ret |= TIOCM_CTS;
607ab4382d2SGreg Kroah-Hartman return ret;
608ab4382d2SGreg Kroah-Hartman }
609ab4382d2SGreg Kroah-Hartman
serial_omap_set_mctrl(struct uart_port * port,unsigned int mctrl)610ab4382d2SGreg Kroah-Hartman static void serial_omap_set_mctrl(struct uart_port *port, unsigned int mctrl)
611ab4382d2SGreg Kroah-Hartman {
612c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port);
613348f9bb3SPeter Hurley unsigned char mcr = 0, old_mcr, lcr;
614ab4382d2SGreg Kroah-Hartman
615ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_set_mctrl+%d\n", up->port.line);
616ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_RTS)
617ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_RTS;
618ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_DTR)
619ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_DTR;
620ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_OUT1)
621ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_OUT1;
622ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_OUT2)
623ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_OUT2;
624ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_LOOP)
625ab4382d2SGreg Kroah-Hartman mcr |= UART_MCR_LOOP;
626ab4382d2SGreg Kroah-Hartman
6279363f8faSRussell King old_mcr = serial_in(up, UART_MCR);
6289363f8faSRussell King old_mcr &= ~(UART_MCR_LOOP | UART_MCR_OUT2 | UART_MCR_OUT1 |
6299363f8faSRussell King UART_MCR_DTR | UART_MCR_RTS);
6309363f8faSRussell King up->mcr = old_mcr | mcr;
631c538d20cSGovindraj.R serial_out(up, UART_MCR, up->mcr);
632348f9bb3SPeter Hurley
633348f9bb3SPeter Hurley /* Turn off autoRTS if RTS is lowered; restore autoRTS if RTS raised */
634348f9bb3SPeter Hurley lcr = serial_in(up, UART_LCR);
635348f9bb3SPeter Hurley serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
636348f9bb3SPeter Hurley if ((mctrl & TIOCM_RTS) && (port->status & UPSTAT_AUTORTS))
637348f9bb3SPeter Hurley up->efr |= UART_EFR_RTS;
638348f9bb3SPeter Hurley else
6392a71de2fSLukas Wunner up->efr &= ~UART_EFR_RTS;
640348f9bb3SPeter Hurley serial_out(up, UART_EFR, up->efr);
641348f9bb3SPeter Hurley serial_out(up, UART_LCR, lcr);
642ab4382d2SGreg Kroah-Hartman }
643ab4382d2SGreg Kroah-Hartman
serial_omap_break_ctl(struct uart_port * port,int break_state)644ab4382d2SGreg Kroah-Hartman static void serial_omap_break_ctl(struct uart_port *port, int break_state)
645ab4382d2SGreg Kroah-Hartman {
646c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port);
64718ee37e1SJohan Hovold unsigned long flags;
648ab4382d2SGreg Kroah-Hartman
649ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_break_ctl+%d\n", up->port.line);
650ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags);
651ab4382d2SGreg Kroah-Hartman if (break_state == -1)
652ab4382d2SGreg Kroah-Hartman up->lcr |= UART_LCR_SBC;
653ab4382d2SGreg Kroah-Hartman else
654ab4382d2SGreg Kroah-Hartman up->lcr &= ~UART_LCR_SBC;
655ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, up->lcr);
656ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags);
657ab4382d2SGreg Kroah-Hartman }
658ab4382d2SGreg Kroah-Hartman
serial_omap_startup(struct uart_port * port)659ab4382d2SGreg Kroah-Hartman static int serial_omap_startup(struct uart_port *port)
660ab4382d2SGreg Kroah-Hartman {
661c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port);
66218ee37e1SJohan Hovold unsigned long flags;
663ab4382d2SGreg Kroah-Hartman int retval;
664ab4382d2SGreg Kroah-Hartman
665ab4382d2SGreg Kroah-Hartman /*
666ab4382d2SGreg Kroah-Hartman * Allocate the IRQ
667ab4382d2SGreg Kroah-Hartman */
668ab4382d2SGreg Kroah-Hartman retval = request_irq(up->port.irq, serial_omap_irq, up->port.irqflags,
669ab4382d2SGreg Kroah-Hartman up->name, up);
670ab4382d2SGreg Kroah-Hartman if (retval)
671ab4382d2SGreg Kroah-Hartman return retval;
672ab4382d2SGreg Kroah-Hartman
6732a0b965cSTony Lindgren /* Optional wake-up IRQ */
6742a0b965cSTony Lindgren if (up->wakeirq) {
675ee83bd3bSTony Lindgren retval = dev_pm_set_dedicated_wake_irq(up->dev, up->wakeirq);
6762a0b965cSTony Lindgren if (retval) {
6772a0b965cSTony Lindgren free_irq(up->port.irq, up);
6782a0b965cSTony Lindgren return retval;
6792a0b965cSTony Lindgren }
6802a0b965cSTony Lindgren }
6812a0b965cSTony Lindgren
682ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_startup+%d\n", up->port.line);
683ab4382d2SGreg Kroah-Hartman
684d8ee4ea6SFelipe Balbi pm_runtime_get_sync(up->dev);
685ab4382d2SGreg Kroah-Hartman /*
686ab4382d2SGreg Kroah-Hartman * Clear the FIFO buffers and disable them.
687ab4382d2SGreg Kroah-Hartman * (they will be reenabled in set_termios())
688ab4382d2SGreg Kroah-Hartman */
689ab4382d2SGreg Kroah-Hartman serial_omap_clear_fifos(up);
690ab4382d2SGreg Kroah-Hartman
691ab4382d2SGreg Kroah-Hartman /*
692ab4382d2SGreg Kroah-Hartman * Clear the interrupt registers.
693ab4382d2SGreg Kroah-Hartman */
694ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_LSR);
695ab4382d2SGreg Kroah-Hartman if (serial_in(up, UART_LSR) & UART_LSR_DR)
696ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_RX);
697ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_IIR);
698ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_MSR);
699ab4382d2SGreg Kroah-Hartman
700ab4382d2SGreg Kroah-Hartman /*
701ab4382d2SGreg Kroah-Hartman * Now, initialize the UART
702ab4382d2SGreg Kroah-Hartman */
703ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_WLEN8);
704ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags);
705ab4382d2SGreg Kroah-Hartman /*
706ab4382d2SGreg Kroah-Hartman * Most PC uarts need OUT2 raised to enable interrupts.
707ab4382d2SGreg Kroah-Hartman */
708ab4382d2SGreg Kroah-Hartman up->port.mctrl |= TIOCM_OUT2;
709ab4382d2SGreg Kroah-Hartman serial_omap_set_mctrl(&up->port, up->port.mctrl);
710ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags);
711ab4382d2SGreg Kroah-Hartman
712ab4382d2SGreg Kroah-Hartman up->msr_saved_flags = 0;
713ab4382d2SGreg Kroah-Hartman /*
714ab4382d2SGreg Kroah-Hartman * Finally, enable interrupts. Note: Modem status interrupts
715ab4382d2SGreg Kroah-Hartman * are set via set_termios(), which will be occurring imminently
716ab4382d2SGreg Kroah-Hartman * anyway, so we don't enable them here.
717ab4382d2SGreg Kroah-Hartman */
718ab4382d2SGreg Kroah-Hartman up->ier = UART_IER_RLSI | UART_IER_RDI;
719ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier);
720ab4382d2SGreg Kroah-Hartman
72178841462SJarkko Nikula /* Enable module level wake up */
722f64ffda6SGovindraj.R up->wer = OMAP_UART_WER_MOD_WKUP;
723f64ffda6SGovindraj.R if (up->features & OMAP_UART_WER_HAS_TX_WAKEUP)
724f64ffda6SGovindraj.R up->wer |= OMAP_UART_TX_WAKEUP_EN;
725f64ffda6SGovindraj.R
726f64ffda6SGovindraj.R serial_out(up, UART_OMAP_WER, up->wer);
72778841462SJarkko Nikula
728ab4382d2SGreg Kroah-Hartman up->port_activity = jiffies;
729ab4382d2SGreg Kroah-Hartman return 0;
730ab4382d2SGreg Kroah-Hartman }
731ab4382d2SGreg Kroah-Hartman
serial_omap_shutdown(struct uart_port * port)732ab4382d2SGreg Kroah-Hartman static void serial_omap_shutdown(struct uart_port *port)
733ab4382d2SGreg Kroah-Hartman {
734c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port);
73518ee37e1SJohan Hovold unsigned long flags;
736ab4382d2SGreg Kroah-Hartman
737ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_shutdown+%d\n", up->port.line);
738fcdca757SGovindraj.R
739ab4382d2SGreg Kroah-Hartman /*
740ab4382d2SGreg Kroah-Hartman * Disable interrupts from this port
741ab4382d2SGreg Kroah-Hartman */
742ab4382d2SGreg Kroah-Hartman up->ier = 0;
743ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, 0);
744ab4382d2SGreg Kroah-Hartman
745ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags);
746ab4382d2SGreg Kroah-Hartman up->port.mctrl &= ~TIOCM_OUT2;
747ab4382d2SGreg Kroah-Hartman serial_omap_set_mctrl(&up->port, up->port.mctrl);
748ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags);
749ab4382d2SGreg Kroah-Hartman
750ab4382d2SGreg Kroah-Hartman /*
751ab4382d2SGreg Kroah-Hartman * Disable break condition and FIFOs
752ab4382d2SGreg Kroah-Hartman */
753ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC);
754ab4382d2SGreg Kroah-Hartman serial_omap_clear_fifos(up);
755ab4382d2SGreg Kroah-Hartman
756ab4382d2SGreg Kroah-Hartman /*
757ab4382d2SGreg Kroah-Hartman * Read data port to reset things, and then free the irq
758ab4382d2SGreg Kroah-Hartman */
759ab4382d2SGreg Kroah-Hartman if (serial_in(up, UART_LSR) & UART_LSR_DR)
760ab4382d2SGreg Kroah-Hartman (void) serial_in(up, UART_RX);
761fcdca757SGovindraj.R
76233e5571eSTony Lindgren pm_runtime_put_sync(up->dev);
763ab4382d2SGreg Kroah-Hartman free_irq(up->port.irq, up);
764ee83bd3bSTony Lindgren dev_pm_clear_wake_irq(up->dev);
765ab4382d2SGreg Kroah-Hartman }
766ab4382d2SGreg Kroah-Hartman
serial_omap_uart_qos_work(struct work_struct * work)7672fd14964SGovindraj.R static void serial_omap_uart_qos_work(struct work_struct *work)
7682fd14964SGovindraj.R {
7692fd14964SGovindraj.R struct uart_omap_port *up = container_of(work, struct uart_omap_port,
7702fd14964SGovindraj.R qos_work);
7712fd14964SGovindraj.R
77201d2b189SRafael J. Wysocki cpu_latency_qos_update_request(&up->pm_qos_request, up->latency);
7732fd14964SGovindraj.R }
7742fd14964SGovindraj.R
775ab4382d2SGreg Kroah-Hartman static void
serial_omap_set_termios(struct uart_port * port,struct ktermios * termios,const struct ktermios * old)776ab4382d2SGreg Kroah-Hartman serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
777bec5b814SIlpo Järvinen const struct ktermios *old)
778ab4382d2SGreg Kroah-Hartman {
779c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port);
780ab4382d2SGreg Kroah-Hartman unsigned char cval = 0;
78118ee37e1SJohan Hovold unsigned long flags;
782ab4382d2SGreg Kroah-Hartman unsigned int baud, quot;
783ab4382d2SGreg Kroah-Hartman
784988c5bbeSJiri Slaby cval = UART_LCR_WLEN(tty_get_char_size(termios->c_cflag));
785ab4382d2SGreg Kroah-Hartman
786ab4382d2SGreg Kroah-Hartman if (termios->c_cflag & CSTOPB)
787ab4382d2SGreg Kroah-Hartman cval |= UART_LCR_STOP;
788ab4382d2SGreg Kroah-Hartman if (termios->c_cflag & PARENB)
789ab4382d2SGreg Kroah-Hartman cval |= UART_LCR_PARITY;
790ab4382d2SGreg Kroah-Hartman if (!(termios->c_cflag & PARODD))
791ab4382d2SGreg Kroah-Hartman cval |= UART_LCR_EPAR;
792fdbc7353SEnric Balletbo i Serra if (termios->c_cflag & CMSPAR)
793fdbc7353SEnric Balletbo i Serra cval |= UART_LCR_SPAR;
794ab4382d2SGreg Kroah-Hartman
795ab4382d2SGreg Kroah-Hartman /*
796ab4382d2SGreg Kroah-Hartman * Ask the core to calculate the divisor for us.
797ab4382d2SGreg Kroah-Hartman */
798ab4382d2SGreg Kroah-Hartman
799ab4382d2SGreg Kroah-Hartman baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/13);
800ab4382d2SGreg Kroah-Hartman quot = serial_omap_get_divisor(port, baud);
801ab4382d2SGreg Kroah-Hartman
8022fd14964SGovindraj.R /* calculate wakeup latency constraint */
80319723452SPaul Walmsley up->calc_latency = (USEC_PER_SEC * up->port.fifosize) / (baud / 8);
8042fd14964SGovindraj.R up->latency = up->calc_latency;
8052fd14964SGovindraj.R schedule_work(&up->qos_work);
8062fd14964SGovindraj.R
807c538d20cSGovindraj.R up->dll = quot & 0xff;
808c538d20cSGovindraj.R up->dlh = quot >> 8;
809c538d20cSGovindraj.R up->mdr1 = UART_OMAP_MDR1_DISABLE;
810c538d20cSGovindraj.R
811ab4382d2SGreg Kroah-Hartman up->fcr = UART_FCR_R_TRIG_01 | UART_FCR_T_TRIG_01 |
812ab4382d2SGreg Kroah-Hartman UART_FCR_ENABLE_FIFO;
813ab4382d2SGreg Kroah-Hartman
814ab4382d2SGreg Kroah-Hartman /*
815ab4382d2SGreg Kroah-Hartman * Ok, we're now changing the port state. Do it with
816ab4382d2SGreg Kroah-Hartman * interrupts disabled.
817ab4382d2SGreg Kroah-Hartman */
818ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&up->port.lock, flags);
819ab4382d2SGreg Kroah-Hartman
820ab4382d2SGreg Kroah-Hartman /*
821ab4382d2SGreg Kroah-Hartman * Update the per-port timeout.
822ab4382d2SGreg Kroah-Hartman */
823ab4382d2SGreg Kroah-Hartman uart_update_timeout(port, termios->c_cflag, baud);
824ab4382d2SGreg Kroah-Hartman
825ab4382d2SGreg Kroah-Hartman up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
826ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & INPCK)
827ab4382d2SGreg Kroah-Hartman up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
828ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & (BRKINT | PARMRK))
829ab4382d2SGreg Kroah-Hartman up->port.read_status_mask |= UART_LSR_BI;
830ab4382d2SGreg Kroah-Hartman
831ab4382d2SGreg Kroah-Hartman /*
832ab4382d2SGreg Kroah-Hartman * Characters to ignore
833ab4382d2SGreg Kroah-Hartman */
834ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask = 0;
835ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IGNPAR)
836ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
837ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IGNBRK) {
838ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask |= UART_LSR_BI;
839ab4382d2SGreg Kroah-Hartman /*
840ab4382d2SGreg Kroah-Hartman * If we're ignoring parity and break indicators,
841ab4382d2SGreg Kroah-Hartman * ignore overruns too (for real raw support).
842ab4382d2SGreg Kroah-Hartman */
843ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IGNPAR)
844ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask |= UART_LSR_OE;
845ab4382d2SGreg Kroah-Hartman }
846ab4382d2SGreg Kroah-Hartman
847ab4382d2SGreg Kroah-Hartman /*
848ab4382d2SGreg Kroah-Hartman * ignore all characters if CREAD is not set
849ab4382d2SGreg Kroah-Hartman */
850ab4382d2SGreg Kroah-Hartman if ((termios->c_cflag & CREAD) == 0)
851ab4382d2SGreg Kroah-Hartman up->port.ignore_status_mask |= UART_LSR_DR;
852ab4382d2SGreg Kroah-Hartman
853ab4382d2SGreg Kroah-Hartman /*
854ab4382d2SGreg Kroah-Hartman * Modem status interrupts
855ab4382d2SGreg Kroah-Hartman */
856ab4382d2SGreg Kroah-Hartman up->ier &= ~UART_IER_MSI;
857ab4382d2SGreg Kroah-Hartman if (UART_ENABLE_MS(&up->port, termios->c_cflag))
858ab4382d2SGreg Kroah-Hartman up->ier |= UART_IER_MSI;
859ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier);
860ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, cval); /* reset DLAB */
861c538d20cSGovindraj.R up->lcr = cval;
8621776fd05SAlexey Pelykh up->scr = 0;
863ab4382d2SGreg Kroah-Hartman
864ab4382d2SGreg Kroah-Hartman /* FIFOs and DMA Settings */
865ab4382d2SGreg Kroah-Hartman
866ab4382d2SGreg Kroah-Hartman /* FCR can be changed only when the
867ab4382d2SGreg Kroah-Hartman * baud clock is not running
868ab4382d2SGreg Kroah-Hartman * DLL_REG and DLH_REG set to 0.
869ab4382d2SGreg Kroah-Hartman */
870ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
871ab4382d2SGreg Kroah-Hartman serial_out(up, UART_DLL, 0);
872ab4382d2SGreg Kroah-Hartman serial_out(up, UART_DLM, 0);
873ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0);
874ab4382d2SGreg Kroah-Hartman
875ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
876ab4382d2SGreg Kroah-Hartman
87708bd4903SRussell King up->efr = serial_in(up, UART_EFR) & ~UART_EFR_ECB;
878d864c03bSRussell King up->efr &= ~UART_EFR_SCD;
879ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
880ab4382d2SGreg Kroah-Hartman
881ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
88208bd4903SRussell King up->mcr = serial_in(up, UART_MCR) & ~UART_MCR_TCRTLR;
883ab4382d2SGreg Kroah-Hartman serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR);
884ab4382d2SGreg Kroah-Hartman /* FIFO ENABLE, DMA MODE */
8850ba5f668SPaul Walmsley
8861f663966SAlexey Pelykh up->scr |= OMAP_UART_SCR_RX_TRIG_GRANU1_MASK;
8871f663966SAlexey Pelykh /*
8881f663966SAlexey Pelykh * NOTE: Setting OMAP_UART_SCR_RX_TRIG_GRANU1_MASK
8891f663966SAlexey Pelykh * sets Enables the granularity of 1 for TRIGGER RX
8901f663966SAlexey Pelykh * level. Along with setting RX FIFO trigger level
8911f663966SAlexey Pelykh * to 1 (as noted below, 16 characters) and TLR[3:0]
8921f663966SAlexey Pelykh * to zero this will result RX FIFO threshold level
8931f663966SAlexey Pelykh * to 1 character, instead of 16 as noted in comment
8941f663966SAlexey Pelykh * below.
8951f663966SAlexey Pelykh */
8961f663966SAlexey Pelykh
8976721ab7fSFelipe Balbi /* Set receive FIFO threshold to 16 characters and
898018e7448SPhilippe Proulx * transmit FIFO threshold to 32 spaces
8996721ab7fSFelipe Balbi */
9000ba5f668SPaul Walmsley up->fcr &= ~OMAP_UART_FCR_RX_FIFO_TRIG_MASK;
9016721ab7fSFelipe Balbi up->fcr &= ~OMAP_UART_FCR_TX_FIFO_TRIG_MASK;
9026721ab7fSFelipe Balbi up->fcr |= UART_FCR6_R_TRIGGER_16 | UART_FCR6_T_TRIGGER_24 |
9036721ab7fSFelipe Balbi UART_FCR_ENABLE_FIFO;
9048a74e9ffSGreg Kroah-Hartman
9050ba5f668SPaul Walmsley serial_out(up, UART_FCR, up->fcr);
9060ba5f668SPaul Walmsley serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
9070ba5f668SPaul Walmsley
908c538d20cSGovindraj.R serial_out(up, UART_OMAP_SCR, up->scr);
909c538d20cSGovindraj.R
91008bd4903SRussell King /* Reset UART_MCR_TCRTLR: this must be done with the EFR_ECB bit set */
911ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
912ab4382d2SGreg Kroah-Hartman serial_out(up, UART_MCR, up->mcr);
91308bd4903SRussell King serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
91408bd4903SRussell King serial_out(up, UART_EFR, up->efr);
91508bd4903SRussell King serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
916ab4382d2SGreg Kroah-Hartman
917ab4382d2SGreg Kroah-Hartman /* Protocol, Baud Rate, and Interrupt Settings */
918ab4382d2SGreg Kroah-Hartman
91994734749SGovindraj.R if (up->errata & UART_ERRATA_i202_MDR1_ACCESS)
92094734749SGovindraj.R serial_omap_mdr1_errataset(up, up->mdr1);
92194734749SGovindraj.R else
922c538d20cSGovindraj.R serial_out(up, UART_OMAP_MDR1, up->mdr1);
92394734749SGovindraj.R
924ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
925ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
926ab4382d2SGreg Kroah-Hartman
927ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0);
928ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, 0);
929ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
930ab4382d2SGreg Kroah-Hartman
931c538d20cSGovindraj.R serial_out(up, UART_DLL, up->dll); /* LS of divisor */
932c538d20cSGovindraj.R serial_out(up, UART_DLM, up->dlh); /* MS of divisor */
933ab4382d2SGreg Kroah-Hartman
934ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0);
935ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, up->ier);
936ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
937ab4382d2SGreg Kroah-Hartman
938ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, up->efr);
939ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, cval);
940ab4382d2SGreg Kroah-Hartman
9415fe21236SAlexey Pelykh if (!serial_omap_baud_is_mode16(port, baud))
942c538d20cSGovindraj.R up->mdr1 = UART_OMAP_MDR1_13X_MODE;
943ab4382d2SGreg Kroah-Hartman else
944c538d20cSGovindraj.R up->mdr1 = UART_OMAP_MDR1_16X_MODE;
945c538d20cSGovindraj.R
94694734749SGovindraj.R if (up->errata & UART_ERRATA_i202_MDR1_ACCESS)
94794734749SGovindraj.R serial_omap_mdr1_errataset(up, up->mdr1);
94894734749SGovindraj.R else
949c538d20cSGovindraj.R serial_out(up, UART_OMAP_MDR1, up->mdr1);
950ab4382d2SGreg Kroah-Hartman
951c533e51bSRussell King /* Configure flow control */
95208bd4903SRussell King serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
953ab4382d2SGreg Kroah-Hartman
954c533e51bSRussell King /* XON1/XOFF1 accessible mode B, TCRTLR=0, ECB=0 */
955c533e51bSRussell King serial_out(up, UART_XON1, termios->c_cc[VSTART]);
956c533e51bSRussell King serial_out(up, UART_XOFF1, termios->c_cc[VSTOP]);
957c533e51bSRussell King
958c533e51bSRussell King /* Enable access to TCR/TLR */
95908bd4903SRussell King serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
960ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
961ab4382d2SGreg Kroah-Hartman serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR);
962ab4382d2SGreg Kroah-Hartman
963ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TI752_TCR, OMAP_UART_TCR_TRIG);
96408bd4903SRussell King
965391f93f2SPeter Hurley up->port.status &= ~(UPSTAT_AUTOCTS | UPSTAT_AUTORTS | UPSTAT_AUTOXOFF);
966391f93f2SPeter Hurley
967c7d059caSRussell King if (termios->c_cflag & CRTSCTS && up->port.flags & UPF_HARD_FLOW) {
968348f9bb3SPeter Hurley /* Enable AUTOCTS (autoRTS is enabled when RTS is raised) */
969391f93f2SPeter Hurley up->port.status |= UPSTAT_AUTOCTS | UPSTAT_AUTORTS;
970348f9bb3SPeter Hurley up->efr |= UART_EFR_CTS;
9710d5b1663SRussell King } else {
9720d5b1663SRussell King /* Disable AUTORTS and AUTOCTS */
9730d5b1663SRussell King up->efr &= ~(UART_EFR_CTS | UART_EFR_RTS);
974ab4382d2SGreg Kroah-Hartman }
975ab4382d2SGreg Kroah-Hartman
97601d70bb3SRussell King if (up->port.flags & UPF_SOFT_FLOW) {
97701d70bb3SRussell King /* clear SW control mode bits */
97801d70bb3SRussell King up->efr &= OMAP_UART_SW_CLR;
97901d70bb3SRussell King
98001d70bb3SRussell King /*
98101d70bb3SRussell King * IXON Flag:
98201d70bb3SRussell King * Enable XON/XOFF flow control on input.
98301d70bb3SRussell King * Receiver compares XON1, XOFF1.
98401d70bb3SRussell King */
9853af08bd7SRussell King if (termios->c_iflag & IXON)
98601d70bb3SRussell King up->efr |= OMAP_UART_SW_RX;
98701d70bb3SRussell King
98801d70bb3SRussell King /*
9893af08bd7SRussell King * IXOFF Flag:
9903af08bd7SRussell King * Enable XON/XOFF flow control on output.
9913af08bd7SRussell King * Transmit XON1, XOFF1
9923af08bd7SRussell King */
993391f93f2SPeter Hurley if (termios->c_iflag & IXOFF) {
994391f93f2SPeter Hurley up->port.status |= UPSTAT_AUTOXOFF;
9953af08bd7SRussell King up->efr |= OMAP_UART_SW_TX;
996391f93f2SPeter Hurley }
9973af08bd7SRussell King
9983af08bd7SRussell King /*
99901d70bb3SRussell King * IXANY Flag:
100001d70bb3SRussell King * Enable any character to restart output.
100101d70bb3SRussell King * Operation resumes after receiving any
100201d70bb3SRussell King * character after recognition of the XOFF character
100301d70bb3SRussell King */
100401d70bb3SRussell King if (termios->c_iflag & IXANY)
100501d70bb3SRussell King up->mcr |= UART_MCR_XONANY;
100601d70bb3SRussell King else
100701d70bb3SRussell King up->mcr &= ~UART_MCR_XONANY;
100818f360f8SRussell King }
1009c7d059caSRussell King serial_out(up, UART_MCR, up->mcr);
101001d70bb3SRussell King serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
101101d70bb3SRussell King serial_out(up, UART_EFR, up->efr);
101201d70bb3SRussell King serial_out(up, UART_LCR, up->lcr);
1013ab4382d2SGreg Kroah-Hartman
1014ab4382d2SGreg Kroah-Hartman serial_omap_set_mctrl(&up->port, up->port.mctrl);
1015ab4382d2SGreg Kroah-Hartman
1016ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&up->port.lock, flags);
1017ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_set_termios+%d\n", up->port.line);
1018ab4382d2SGreg Kroah-Hartman }
1019ab4382d2SGreg Kroah-Hartman
1020ab4382d2SGreg Kroah-Hartman static void
serial_omap_pm(struct uart_port * port,unsigned int state,unsigned int oldstate)1021ab4382d2SGreg Kroah-Hartman serial_omap_pm(struct uart_port *port, unsigned int state,
1022ab4382d2SGreg Kroah-Hartman unsigned int oldstate)
1023ab4382d2SGreg Kroah-Hartman {
1024c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port);
1025ab4382d2SGreg Kroah-Hartman unsigned char efr;
1026ab4382d2SGreg Kroah-Hartman
1027ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_pm+%d\n", up->port.line);
1028fcdca757SGovindraj.R
1029ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
1030ab4382d2SGreg Kroah-Hartman efr = serial_in(up, UART_EFR);
1031ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, efr | UART_EFR_ECB);
1032ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0);
1033ab4382d2SGreg Kroah-Hartman
1034ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, (state != 0) ? UART_IERX_SLEEP : 0);
1035ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
1036ab4382d2SGreg Kroah-Hartman serial_out(up, UART_EFR, efr);
1037ab4382d2SGreg Kroah-Hartman serial_out(up, UART_LCR, 0);
1038ab4382d2SGreg Kroah-Hartman }
1039ab4382d2SGreg Kroah-Hartman
serial_omap_release_port(struct uart_port * port)1040ab4382d2SGreg Kroah-Hartman static void serial_omap_release_port(struct uart_port *port)
1041ab4382d2SGreg Kroah-Hartman {
1042ab4382d2SGreg Kroah-Hartman dev_dbg(port->dev, "serial_omap_release_port+\n");
1043ab4382d2SGreg Kroah-Hartman }
1044ab4382d2SGreg Kroah-Hartman
serial_omap_request_port(struct uart_port * port)1045ab4382d2SGreg Kroah-Hartman static int serial_omap_request_port(struct uart_port *port)
1046ab4382d2SGreg Kroah-Hartman {
1047ab4382d2SGreg Kroah-Hartman dev_dbg(port->dev, "serial_omap_request_port+\n");
1048ab4382d2SGreg Kroah-Hartman return 0;
1049ab4382d2SGreg Kroah-Hartman }
1050ab4382d2SGreg Kroah-Hartman
serial_omap_config_port(struct uart_port * port,int flags)1051ab4382d2SGreg Kroah-Hartman static void serial_omap_config_port(struct uart_port *port, int flags)
1052ab4382d2SGreg Kroah-Hartman {
1053c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port);
1054ab4382d2SGreg Kroah-Hartman
1055ab4382d2SGreg Kroah-Hartman dev_dbg(up->port.dev, "serial_omap_config_port+%d\n",
1056ba77433dSRajendra Nayak up->port.line);
1057ab4382d2SGreg Kroah-Hartman up->port.type = PORT_OMAP;
10583af08bd7SRussell King up->port.flags |= UPF_SOFT_FLOW | UPF_HARD_FLOW;
1059ab4382d2SGreg Kroah-Hartman }
1060ab4382d2SGreg Kroah-Hartman
1061ab4382d2SGreg Kroah-Hartman static int
serial_omap_verify_port(struct uart_port * port,struct serial_struct * ser)1062ab4382d2SGreg Kroah-Hartman serial_omap_verify_port(struct uart_port *port, struct serial_struct *ser)
1063ab4382d2SGreg Kroah-Hartman {
1064ab4382d2SGreg Kroah-Hartman /* we don't want the core code to modify any port params */
1065ab4382d2SGreg Kroah-Hartman dev_dbg(port->dev, "serial_omap_verify_port+\n");
1066ab4382d2SGreg Kroah-Hartman return -EINVAL;
1067ab4382d2SGreg Kroah-Hartman }
1068ab4382d2SGreg Kroah-Hartman
1069ab4382d2SGreg Kroah-Hartman static const char *
serial_omap_type(struct uart_port * port)1070ab4382d2SGreg Kroah-Hartman serial_omap_type(struct uart_port *port)
1071ab4382d2SGreg Kroah-Hartman {
1072c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port);
1073ab4382d2SGreg Kroah-Hartman
1074ba77433dSRajendra Nayak dev_dbg(up->port.dev, "serial_omap_type+%d\n", up->port.line);
1075ab4382d2SGreg Kroah-Hartman return up->name;
1076ab4382d2SGreg Kroah-Hartman }
1077ab4382d2SGreg Kroah-Hartman
wait_for_xmitr(struct uart_omap_port * up)1078b4a512b8SArnd Bergmann static void __maybe_unused wait_for_xmitr(struct uart_omap_port *up)
1079ab4382d2SGreg Kroah-Hartman {
1080ab4382d2SGreg Kroah-Hartman unsigned int status, tmout = 10000;
1081ab4382d2SGreg Kroah-Hartman
1082ab4382d2SGreg Kroah-Hartman /* Wait up to 10ms for the character(s) to be sent. */
1083ab4382d2SGreg Kroah-Hartman do {
1084ab4382d2SGreg Kroah-Hartman status = serial_in(up, UART_LSR);
1085ab4382d2SGreg Kroah-Hartman
1086ab4382d2SGreg Kroah-Hartman if (status & UART_LSR_BI)
1087ab4382d2SGreg Kroah-Hartman up->lsr_break_flag = UART_LSR_BI;
1088ab4382d2SGreg Kroah-Hartman
1089ab4382d2SGreg Kroah-Hartman if (--tmout == 0)
1090ab4382d2SGreg Kroah-Hartman break;
1091ab4382d2SGreg Kroah-Hartman udelay(1);
109234619de1SIlpo Järvinen } while (!uart_lsr_tx_empty(status));
1093ab4382d2SGreg Kroah-Hartman
1094ab4382d2SGreg Kroah-Hartman /* Wait up to 1s for flow control if necessary */
1095ab4382d2SGreg Kroah-Hartman if (up->port.flags & UPF_CONS_FLOW) {
1096ab4382d2SGreg Kroah-Hartman tmout = 1000000;
1097ab4382d2SGreg Kroah-Hartman for (tmout = 1000000; tmout; tmout--) {
1098ab4382d2SGreg Kroah-Hartman unsigned int msr = serial_in(up, UART_MSR);
1099ab4382d2SGreg Kroah-Hartman
1100ab4382d2SGreg Kroah-Hartman up->msr_saved_flags |= msr & MSR_SAVE_FLAGS;
1101ab4382d2SGreg Kroah-Hartman if (msr & UART_MSR_CTS)
1102ab4382d2SGreg Kroah-Hartman break;
1103ab4382d2SGreg Kroah-Hartman
1104ab4382d2SGreg Kroah-Hartman udelay(1);
1105ab4382d2SGreg Kroah-Hartman }
1106ab4382d2SGreg Kroah-Hartman }
1107ab4382d2SGreg Kroah-Hartman }
1108ab4382d2SGreg Kroah-Hartman
1109ab4382d2SGreg Kroah-Hartman #ifdef CONFIG_CONSOLE_POLL
1110ab4382d2SGreg Kroah-Hartman
serial_omap_poll_put_char(struct uart_port * port,unsigned char ch)1111ab4382d2SGreg Kroah-Hartman static void serial_omap_poll_put_char(struct uart_port *port, unsigned char ch)
1112ab4382d2SGreg Kroah-Hartman {
1113c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port);
1114fcdca757SGovindraj.R
1115ab4382d2SGreg Kroah-Hartman wait_for_xmitr(up);
1116ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TX, ch);
1117ab4382d2SGreg Kroah-Hartman }
1118ab4382d2SGreg Kroah-Hartman
serial_omap_poll_get_char(struct uart_port * port)1119ab4382d2SGreg Kroah-Hartman static int serial_omap_poll_get_char(struct uart_port *port)
1120ab4382d2SGreg Kroah-Hartman {
1121c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port);
1122fcdca757SGovindraj.R unsigned int status;
1123ab4382d2SGreg Kroah-Hartman
1124fcdca757SGovindraj.R status = serial_in(up, UART_LSR);
1125a6b19c33SFelipe Balbi if (!(status & UART_LSR_DR)) {
1126a6b19c33SFelipe Balbi status = NO_POLL_CHAR;
1127a6b19c33SFelipe Balbi goto out;
1128a6b19c33SFelipe Balbi }
1129ab4382d2SGreg Kroah-Hartman
1130fcdca757SGovindraj.R status = serial_in(up, UART_RX);
1131a6b19c33SFelipe Balbi
1132a6b19c33SFelipe Balbi out:
1133fcdca757SGovindraj.R return status;
1134ab4382d2SGreg Kroah-Hartman }
1135ab4382d2SGreg Kroah-Hartman
1136ab4382d2SGreg Kroah-Hartman #endif /* CONFIG_CONSOLE_POLL */
1137ab4382d2SGreg Kroah-Hartman
1138ab4382d2SGreg Kroah-Hartman #ifdef CONFIG_SERIAL_OMAP_CONSOLE
1139ab4382d2SGreg Kroah-Hartman
114028ec9570SLokesh Vutla #ifdef CONFIG_SERIAL_EARLYCON
omap_serial_early_in(struct uart_port * port,int offset)1141b38dd0e8SJeffy Chen static unsigned int omap_serial_early_in(struct uart_port *port, int offset)
114228ec9570SLokesh Vutla {
114328ec9570SLokesh Vutla offset <<= port->regshift;
114428ec9570SLokesh Vutla return readw(port->membase + offset);
114528ec9570SLokesh Vutla }
114628ec9570SLokesh Vutla
omap_serial_early_out(struct uart_port * port,int offset,int value)1147b38dd0e8SJeffy Chen static void omap_serial_early_out(struct uart_port *port, int offset,
114828ec9570SLokesh Vutla int value)
114928ec9570SLokesh Vutla {
115028ec9570SLokesh Vutla offset <<= port->regshift;
115128ec9570SLokesh Vutla writew(value, port->membase + offset);
115228ec9570SLokesh Vutla }
115328ec9570SLokesh Vutla
omap_serial_early_putc(struct uart_port * port,unsigned char c)11543f8bab17SJiri Slaby static void omap_serial_early_putc(struct uart_port *port, unsigned char c)
115528ec9570SLokesh Vutla {
115628ec9570SLokesh Vutla unsigned int status;
115728ec9570SLokesh Vutla
115828ec9570SLokesh Vutla for (;;) {
115928ec9570SLokesh Vutla status = omap_serial_early_in(port, UART_LSR);
116034619de1SIlpo Järvinen if (uart_lsr_tx_empty(status))
116128ec9570SLokesh Vutla break;
116228ec9570SLokesh Vutla cpu_relax();
116328ec9570SLokesh Vutla }
116428ec9570SLokesh Vutla omap_serial_early_out(port, UART_TX, c);
116528ec9570SLokesh Vutla }
116628ec9570SLokesh Vutla
early_omap_serial_write(struct console * console,const char * s,unsigned int count)1167b38dd0e8SJeffy Chen static void early_omap_serial_write(struct console *console, const char *s,
1168b38dd0e8SJeffy Chen unsigned int count)
116928ec9570SLokesh Vutla {
117028ec9570SLokesh Vutla struct earlycon_device *device = console->data;
117128ec9570SLokesh Vutla struct uart_port *port = &device->port;
117228ec9570SLokesh Vutla
117328ec9570SLokesh Vutla uart_console_write(port, s, count, omap_serial_early_putc);
117428ec9570SLokesh Vutla }
117528ec9570SLokesh Vutla
early_omap_serial_setup(struct earlycon_device * device,const char * options)117628ec9570SLokesh Vutla static int __init early_omap_serial_setup(struct earlycon_device *device,
117728ec9570SLokesh Vutla const char *options)
117828ec9570SLokesh Vutla {
117928ec9570SLokesh Vutla struct uart_port *port = &device->port;
118028ec9570SLokesh Vutla
118128ec9570SLokesh Vutla if (!(device->port.membase || device->port.iobase))
118228ec9570SLokesh Vutla return -ENODEV;
118328ec9570SLokesh Vutla
118428ec9570SLokesh Vutla port->regshift = 2;
118528ec9570SLokesh Vutla device->con->write = early_omap_serial_write;
118628ec9570SLokesh Vutla return 0;
118728ec9570SLokesh Vutla }
118828ec9570SLokesh Vutla
118928ec9570SLokesh Vutla OF_EARLYCON_DECLARE(omapserial, "ti,omap2-uart", early_omap_serial_setup);
119028ec9570SLokesh Vutla OF_EARLYCON_DECLARE(omapserial, "ti,omap3-uart", early_omap_serial_setup);
119128ec9570SLokesh Vutla OF_EARLYCON_DECLARE(omapserial, "ti,omap4-uart", early_omap_serial_setup);
119228ec9570SLokesh Vutla #endif /* CONFIG_SERIAL_EARLYCON */
119328ec9570SLokesh Vutla
119440477d0eSShubhrajyoti D static struct uart_omap_port *serial_omap_console_ports[OMAP_MAX_HSUART_PORTS];
1195ab4382d2SGreg Kroah-Hartman
1196ab4382d2SGreg Kroah-Hartman static struct uart_driver serial_omap_reg;
1197ab4382d2SGreg Kroah-Hartman
serial_omap_console_putchar(struct uart_port * port,unsigned char ch)11983f8bab17SJiri Slaby static void serial_omap_console_putchar(struct uart_port *port, unsigned char ch)
1199ab4382d2SGreg Kroah-Hartman {
1200c990f351SFelipe Balbi struct uart_omap_port *up = to_uart_omap_port(port);
1201ab4382d2SGreg Kroah-Hartman
1202ab4382d2SGreg Kroah-Hartman wait_for_xmitr(up);
1203ab4382d2SGreg Kroah-Hartman serial_out(up, UART_TX, ch);
1204ab4382d2SGreg Kroah-Hartman }
1205ab4382d2SGreg Kroah-Hartman
1206ab4382d2SGreg Kroah-Hartman static void
serial_omap_console_write(struct console * co,const char * s,unsigned int count)1207ab4382d2SGreg Kroah-Hartman serial_omap_console_write(struct console *co, const char *s,
1208ab4382d2SGreg Kroah-Hartman unsigned int count)
1209ab4382d2SGreg Kroah-Hartman {
1210ab4382d2SGreg Kroah-Hartman struct uart_omap_port *up = serial_omap_console_ports[co->index];
1211ab4382d2SGreg Kroah-Hartman unsigned long flags;
1212ab4382d2SGreg Kroah-Hartman unsigned int ier;
1213ab4382d2SGreg Kroah-Hartman int locked = 1;
1214ab4382d2SGreg Kroah-Hartman
1215ab4382d2SGreg Kroah-Hartman local_irq_save(flags);
1216ab4382d2SGreg Kroah-Hartman if (up->port.sysrq)
1217ab4382d2SGreg Kroah-Hartman locked = 0;
1218ab4382d2SGreg Kroah-Hartman else if (oops_in_progress)
1219ab4382d2SGreg Kroah-Hartman locked = spin_trylock(&up->port.lock);
1220ab4382d2SGreg Kroah-Hartman else
1221ab4382d2SGreg Kroah-Hartman spin_lock(&up->port.lock);
1222ab4382d2SGreg Kroah-Hartman
1223ab4382d2SGreg Kroah-Hartman /*
1224ab4382d2SGreg Kroah-Hartman * First save the IER then disable the interrupts
1225ab4382d2SGreg Kroah-Hartman */
1226ab4382d2SGreg Kroah-Hartman ier = serial_in(up, UART_IER);
1227ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, 0);
1228ab4382d2SGreg Kroah-Hartman
1229ab4382d2SGreg Kroah-Hartman uart_console_write(&up->port, s, count, serial_omap_console_putchar);
1230ab4382d2SGreg Kroah-Hartman
1231ab4382d2SGreg Kroah-Hartman /*
1232ab4382d2SGreg Kroah-Hartman * Finally, wait for transmitter to become empty
1233ab4382d2SGreg Kroah-Hartman * and restore the IER
1234ab4382d2SGreg Kroah-Hartman */
1235ab4382d2SGreg Kroah-Hartman wait_for_xmitr(up);
1236ab4382d2SGreg Kroah-Hartman serial_out(up, UART_IER, ier);
1237ab4382d2SGreg Kroah-Hartman /*
1238ab4382d2SGreg Kroah-Hartman * The receive handling will happen properly because the
1239ab4382d2SGreg Kroah-Hartman * receive ready bit will still be set; it is not cleared
1240ab4382d2SGreg Kroah-Hartman * on read. However, modem control will not, we must
1241ab4382d2SGreg Kroah-Hartman * call it if we have saved something in the saved flags
1242ab4382d2SGreg Kroah-Hartman * while processing with interrupts off.
1243ab4382d2SGreg Kroah-Hartman */
1244ab4382d2SGreg Kroah-Hartman if (up->msr_saved_flags)
1245ab4382d2SGreg Kroah-Hartman check_modem_status(up);
1246ab4382d2SGreg Kroah-Hartman
1247ab4382d2SGreg Kroah-Hartman if (locked)
1248ab4382d2SGreg Kroah-Hartman spin_unlock(&up->port.lock);
1249ab4382d2SGreg Kroah-Hartman local_irq_restore(flags);
1250ab4382d2SGreg Kroah-Hartman }
1251ab4382d2SGreg Kroah-Hartman
1252ab4382d2SGreg Kroah-Hartman static int __init
serial_omap_console_setup(struct console * co,char * options)1253ab4382d2SGreg Kroah-Hartman serial_omap_console_setup(struct console *co, char *options)
1254ab4382d2SGreg Kroah-Hartman {
1255ab4382d2SGreg Kroah-Hartman struct uart_omap_port *up;
1256ab4382d2SGreg Kroah-Hartman int baud = 115200;
1257ab4382d2SGreg Kroah-Hartman int bits = 8;
1258ab4382d2SGreg Kroah-Hartman int parity = 'n';
1259ab4382d2SGreg Kroah-Hartman int flow = 'n';
1260ab4382d2SGreg Kroah-Hartman
1261ab4382d2SGreg Kroah-Hartman if (serial_omap_console_ports[co->index] == NULL)
1262ab4382d2SGreg Kroah-Hartman return -ENODEV;
1263ab4382d2SGreg Kroah-Hartman up = serial_omap_console_ports[co->index];
1264ab4382d2SGreg Kroah-Hartman
1265ab4382d2SGreg Kroah-Hartman if (options)
1266ab4382d2SGreg Kroah-Hartman uart_parse_options(options, &baud, &parity, &bits, &flow);
1267ab4382d2SGreg Kroah-Hartman
1268ab4382d2SGreg Kroah-Hartman return uart_set_options(&up->port, co, baud, parity, bits, flow);
1269ab4382d2SGreg Kroah-Hartman }
1270ab4382d2SGreg Kroah-Hartman
1271ab4382d2SGreg Kroah-Hartman static struct console serial_omap_console = {
1272ab4382d2SGreg Kroah-Hartman .name = OMAP_SERIAL_NAME,
1273ab4382d2SGreg Kroah-Hartman .write = serial_omap_console_write,
1274ab4382d2SGreg Kroah-Hartman .device = uart_console_device,
1275ab4382d2SGreg Kroah-Hartman .setup = serial_omap_console_setup,
1276ab4382d2SGreg Kroah-Hartman .flags = CON_PRINTBUFFER,
1277ab4382d2SGreg Kroah-Hartman .index = -1,
1278ab4382d2SGreg Kroah-Hartman .data = &serial_omap_reg,
1279ab4382d2SGreg Kroah-Hartman };
1280ab4382d2SGreg Kroah-Hartman
serial_omap_add_console_port(struct uart_omap_port * up)1281ab4382d2SGreg Kroah-Hartman static void serial_omap_add_console_port(struct uart_omap_port *up)
1282ab4382d2SGreg Kroah-Hartman {
1283ba77433dSRajendra Nayak serial_omap_console_ports[up->port.line] = up;
1284ab4382d2SGreg Kroah-Hartman }
1285ab4382d2SGreg Kroah-Hartman
1286ab4382d2SGreg Kroah-Hartman #define OMAP_CONSOLE (&serial_omap_console)
1287ab4382d2SGreg Kroah-Hartman
1288ab4382d2SGreg Kroah-Hartman #else
1289ab4382d2SGreg Kroah-Hartman
1290ab4382d2SGreg Kroah-Hartman #define OMAP_CONSOLE NULL
1291ab4382d2SGreg Kroah-Hartman
serial_omap_add_console_port(struct uart_omap_port * up)1292ab4382d2SGreg Kroah-Hartman static inline void serial_omap_add_console_port(struct uart_omap_port *up)
1293ab4382d2SGreg Kroah-Hartman {}
1294ab4382d2SGreg Kroah-Hartman
1295ab4382d2SGreg Kroah-Hartman #endif
1296ab4382d2SGreg Kroah-Hartman
12974a0ac0f5SMark Jackson /* Enable or disable the rs485 support */
1298dadd7ecbSRicardo Ribalda Delgado static int
serial_omap_config_rs485(struct uart_port * port,struct ktermios * termios,struct serial_rs485 * rs485)1299ae50bb27SIlpo Järvinen serial_omap_config_rs485(struct uart_port *port, struct ktermios *termios,
1300ae50bb27SIlpo Järvinen struct serial_rs485 *rs485)
13014a0ac0f5SMark Jackson {
13024a0ac0f5SMark Jackson struct uart_omap_port *up = to_uart_omap_port(port);
13034a0ac0f5SMark Jackson unsigned int mode;
13044a0ac0f5SMark Jackson int val;
13054a0ac0f5SMark Jackson
13064a0ac0f5SMark Jackson /* Disable interrupts from this port */
13074a0ac0f5SMark Jackson mode = up->ier;
13084a0ac0f5SMark Jackson up->ier = 0;
13094a0ac0f5SMark Jackson serial_out(up, UART_IER, 0);
13104a0ac0f5SMark Jackson
13114a0ac0f5SMark Jackson /* enable / disable rts */
1312d84b01cdSLino Sanfilippo val = (rs485->flags & SER_RS485_ENABLED) ?
13134a0ac0f5SMark Jackson SER_RS485_RTS_AFTER_SEND : SER_RS485_RTS_ON_SEND;
1314d84b01cdSLino Sanfilippo val = (rs485->flags & val) ? 1 : 0;
13155745fd0fSLinus Walleij gpiod_set_value(up->rts_gpiod, val);
13164a0ac0f5SMark Jackson
13174a0ac0f5SMark Jackson /* Enable interrupts */
13184a0ac0f5SMark Jackson up->ier = mode;
13194a0ac0f5SMark Jackson serial_out(up, UART_IER, up->ier);
13204a0ac0f5SMark Jackson
1321018e7448SPhilippe Proulx /* If RS-485 is disabled, make sure the THR interrupt is fired when
1322018e7448SPhilippe Proulx * TX FIFO is below the trigger level.
1323018e7448SPhilippe Proulx */
1324d84b01cdSLino Sanfilippo if (!(rs485->flags & SER_RS485_ENABLED) &&
1325018e7448SPhilippe Proulx (up->scr & OMAP_UART_SCR_TX_EMPTY)) {
1326018e7448SPhilippe Proulx up->scr &= ~OMAP_UART_SCR_TX_EMPTY;
1327018e7448SPhilippe Proulx serial_out(up, UART_OMAP_SCR, up->scr);
1328018e7448SPhilippe Proulx }
1329018e7448SPhilippe Proulx
13304a0ac0f5SMark Jackson return 0;
13314a0ac0f5SMark Jackson }
13324a0ac0f5SMark Jackson
13332331e068SBhumika Goyal static const struct uart_ops serial_omap_pops = {
1334ab4382d2SGreg Kroah-Hartman .tx_empty = serial_omap_tx_empty,
1335ab4382d2SGreg Kroah-Hartman .set_mctrl = serial_omap_set_mctrl,
1336ab4382d2SGreg Kroah-Hartman .get_mctrl = serial_omap_get_mctrl,
1337ab4382d2SGreg Kroah-Hartman .stop_tx = serial_omap_stop_tx,
1338ab4382d2SGreg Kroah-Hartman .start_tx = serial_omap_start_tx,
13393af08bd7SRussell King .throttle = serial_omap_throttle,
13403af08bd7SRussell King .unthrottle = serial_omap_unthrottle,
1341ab4382d2SGreg Kroah-Hartman .stop_rx = serial_omap_stop_rx,
1342ab4382d2SGreg Kroah-Hartman .enable_ms = serial_omap_enable_ms,
1343ab4382d2SGreg Kroah-Hartman .break_ctl = serial_omap_break_ctl,
1344ab4382d2SGreg Kroah-Hartman .startup = serial_omap_startup,
1345ab4382d2SGreg Kroah-Hartman .shutdown = serial_omap_shutdown,
1346ab4382d2SGreg Kroah-Hartman .set_termios = serial_omap_set_termios,
1347ab4382d2SGreg Kroah-Hartman .pm = serial_omap_pm,
1348ab4382d2SGreg Kroah-Hartman .type = serial_omap_type,
1349ab4382d2SGreg Kroah-Hartman .release_port = serial_omap_release_port,
1350ab4382d2SGreg Kroah-Hartman .request_port = serial_omap_request_port,
1351ab4382d2SGreg Kroah-Hartman .config_port = serial_omap_config_port,
1352ab4382d2SGreg Kroah-Hartman .verify_port = serial_omap_verify_port,
1353ab4382d2SGreg Kroah-Hartman #ifdef CONFIG_CONSOLE_POLL
1354ab4382d2SGreg Kroah-Hartman .poll_put_char = serial_omap_poll_put_char,
1355ab4382d2SGreg Kroah-Hartman .poll_get_char = serial_omap_poll_get_char,
1356ab4382d2SGreg Kroah-Hartman #endif
1357ab4382d2SGreg Kroah-Hartman };
1358ab4382d2SGreg Kroah-Hartman
1359ab4382d2SGreg Kroah-Hartman static struct uart_driver serial_omap_reg = {
1360ab4382d2SGreg Kroah-Hartman .owner = THIS_MODULE,
1361ab4382d2SGreg Kroah-Hartman .driver_name = "OMAP-SERIAL",
1362ab4382d2SGreg Kroah-Hartman .dev_name = OMAP_SERIAL_NAME,
1363ab4382d2SGreg Kroah-Hartman .nr = OMAP_MAX_HSUART_PORTS,
1364ab4382d2SGreg Kroah-Hartman .cons = OMAP_CONSOLE,
1365ab4382d2SGreg Kroah-Hartman };
1366ab4382d2SGreg Kroah-Hartman
13673bc4f0d8SShubhrajyoti D #ifdef CONFIG_PM_SLEEP
serial_omap_prepare(struct device * dev)1368ddd85e22SSourav Poddar static int serial_omap_prepare(struct device *dev)
1369ddd85e22SSourav Poddar {
1370ddd85e22SSourav Poddar struct uart_omap_port *up = dev_get_drvdata(dev);
1371ddd85e22SSourav Poddar
1372ddd85e22SSourav Poddar up->is_suspending = true;
1373ddd85e22SSourav Poddar
1374ddd85e22SSourav Poddar return 0;
1375ddd85e22SSourav Poddar }
1376ddd85e22SSourav Poddar
serial_omap_complete(struct device * dev)1377ddd85e22SSourav Poddar static void serial_omap_complete(struct device *dev)
1378ddd85e22SSourav Poddar {
1379ddd85e22SSourav Poddar struct uart_omap_port *up = dev_get_drvdata(dev);
1380ddd85e22SSourav Poddar
1381ddd85e22SSourav Poddar up->is_suspending = false;
1382ddd85e22SSourav Poddar }
1383ddd85e22SSourav Poddar
serial_omap_suspend(struct device * dev)1384fcdca757SGovindraj.R static int serial_omap_suspend(struct device *dev)
1385ab4382d2SGreg Kroah-Hartman {
1386fcdca757SGovindraj.R struct uart_omap_port *up = dev_get_drvdata(dev);
1387ab4382d2SGreg Kroah-Hartman
1388ab4382d2SGreg Kroah-Hartman uart_suspend_port(&serial_omap_reg, &up->port);
138943829731STejun Heo flush_work(&up->qos_work);
13902fd14964SGovindraj.R
1391d758c9c1STony Lindgren if (device_may_wakeup(dev))
1392d758c9c1STony Lindgren serial_omap_enable_wakeup(up, true);
1393d758c9c1STony Lindgren else
1394d758c9c1STony Lindgren serial_omap_enable_wakeup(up, false);
1395d758c9c1STony Lindgren
1396ab4382d2SGreg Kroah-Hartman return 0;
1397ab4382d2SGreg Kroah-Hartman }
1398ab4382d2SGreg Kroah-Hartman
serial_omap_resume(struct device * dev)1399fcdca757SGovindraj.R static int serial_omap_resume(struct device *dev)
1400ab4382d2SGreg Kroah-Hartman {
1401fcdca757SGovindraj.R struct uart_omap_port *up = dev_get_drvdata(dev);
1402ab4382d2SGreg Kroah-Hartman
1403d758c9c1STony Lindgren if (device_may_wakeup(dev))
1404d758c9c1STony Lindgren serial_omap_enable_wakeup(up, false);
1405d758c9c1STony Lindgren
1406ab4382d2SGreg Kroah-Hartman uart_resume_port(&serial_omap_reg, &up->port);
1407ac57e7f3SSourav Poddar
1408ab4382d2SGreg Kroah-Hartman return 0;
1409ab4382d2SGreg Kroah-Hartman }
1410ddd85e22SSourav Poddar #else
1411ddd85e22SSourav Poddar #define serial_omap_prepare NULL
14122cb5a2faSArnd Bergmann #define serial_omap_complete NULL
1413ddd85e22SSourav Poddar #endif /* CONFIG_PM_SLEEP */
1414ab4382d2SGreg Kroah-Hartman
omap_serial_fill_features_erratas(struct uart_omap_port * up)14159671f099SBill Pemberton static void omap_serial_fill_features_erratas(struct uart_omap_port *up)
14167c77c8deSGovindraj.R {
14177c77c8deSGovindraj.R u32 mvr, scheme;
14187c77c8deSGovindraj.R u16 revision, major, minor;
14197c77c8deSGovindraj.R
142076bac198SRuchika Kharwar mvr = readl(up->port.membase + (UART_OMAP_MVER << up->port.regshift));
14217c77c8deSGovindraj.R
14227c77c8deSGovindraj.R /* Check revision register scheme */
14237c77c8deSGovindraj.R scheme = mvr >> OMAP_UART_MVR_SCHEME_SHIFT;
14247c77c8deSGovindraj.R
14257c77c8deSGovindraj.R switch (scheme) {
14267c77c8deSGovindraj.R case 0: /* Legacy Scheme: OMAP2/3 */
14277c77c8deSGovindraj.R /* MINOR_REV[0:4], MAJOR_REV[4:7] */
14287c77c8deSGovindraj.R major = (mvr & OMAP_UART_LEGACY_MVR_MAJ_MASK) >>
14297c77c8deSGovindraj.R OMAP_UART_LEGACY_MVR_MAJ_SHIFT;
14307c77c8deSGovindraj.R minor = (mvr & OMAP_UART_LEGACY_MVR_MIN_MASK);
14317c77c8deSGovindraj.R break;
14327c77c8deSGovindraj.R case 1:
14337c77c8deSGovindraj.R /* New Scheme: OMAP4+ */
14347c77c8deSGovindraj.R /* MINOR_REV[0:5], MAJOR_REV[8:10] */
14357c77c8deSGovindraj.R major = (mvr & OMAP_UART_MVR_MAJ_MASK) >>
14367c77c8deSGovindraj.R OMAP_UART_MVR_MAJ_SHIFT;
14377c77c8deSGovindraj.R minor = (mvr & OMAP_UART_MVR_MIN_MASK);
14387c77c8deSGovindraj.R break;
14397c77c8deSGovindraj.R default:
1440d8ee4ea6SFelipe Balbi dev_warn(up->dev,
14417c77c8deSGovindraj.R "Unknown %s revision, defaulting to highest\n",
14427c77c8deSGovindraj.R up->name);
14437c77c8deSGovindraj.R /* highest possible revision */
14447c77c8deSGovindraj.R major = 0xff;
14457c77c8deSGovindraj.R minor = 0xff;
14467c77c8deSGovindraj.R }
14477c77c8deSGovindraj.R
14487c77c8deSGovindraj.R /* normalize revision for the driver */
14497c77c8deSGovindraj.R revision = UART_BUILD_REVISION(major, minor);
14507c77c8deSGovindraj.R
14517c77c8deSGovindraj.R switch (revision) {
14527c77c8deSGovindraj.R case OMAP_UART_REV_46:
14537c77c8deSGovindraj.R up->errata |= (UART_ERRATA_i202_MDR1_ACCESS |
14547c77c8deSGovindraj.R UART_ERRATA_i291_DMA_FORCEIDLE);
14557c77c8deSGovindraj.R break;
14567c77c8deSGovindraj.R case OMAP_UART_REV_52:
14577c77c8deSGovindraj.R up->errata |= (UART_ERRATA_i202_MDR1_ACCESS |
14587c77c8deSGovindraj.R UART_ERRATA_i291_DMA_FORCEIDLE);
1459f64ffda6SGovindraj.R up->features |= OMAP_UART_WER_HAS_TX_WAKEUP;
14607c77c8deSGovindraj.R break;
14617c77c8deSGovindraj.R case OMAP_UART_REV_63:
14627c77c8deSGovindraj.R up->errata |= UART_ERRATA_i202_MDR1_ACCESS;
1463f64ffda6SGovindraj.R up->features |= OMAP_UART_WER_HAS_TX_WAKEUP;
14647c77c8deSGovindraj.R break;
14657c77c8deSGovindraj.R default:
14667c77c8deSGovindraj.R break;
14677c77c8deSGovindraj.R }
14687c77c8deSGovindraj.R }
14697c77c8deSGovindraj.R
of_get_uart_port_info(struct device * dev)14709671f099SBill Pemberton static struct omap_uart_port_info *of_get_uart_port_info(struct device *dev)
1471d92b0dfcSRajendra Nayak {
1472d92b0dfcSRajendra Nayak struct omap_uart_port_info *omap_up_info;
1473d92b0dfcSRajendra Nayak
1474d92b0dfcSRajendra Nayak omap_up_info = devm_kzalloc(dev, sizeof(*omap_up_info), GFP_KERNEL);
1475d92b0dfcSRajendra Nayak if (!omap_up_info)
1476d92b0dfcSRajendra Nayak return NULL; /* out of memory */
1477d92b0dfcSRajendra Nayak
1478d92b0dfcSRajendra Nayak of_property_read_u32(dev->of_node, "clock-frequency",
1479d92b0dfcSRajendra Nayak &omap_up_info->uartclk);
14801b775de9SSebastian Reichel
14811b775de9SSebastian Reichel omap_up_info->flags = UPF_BOOT_AUTOCONF;
14821b775de9SSebastian Reichel
1483d92b0dfcSRajendra Nayak return omap_up_info;
1484d92b0dfcSRajendra Nayak }
1485d92b0dfcSRajendra Nayak
1486*57886e83SLino Sanfilippo static const struct serial_rs485 serial_omap_rs485_supported = {
1487*57886e83SLino Sanfilippo .flags = SER_RS485_ENABLED | SER_RS485_RTS_ON_SEND | SER_RS485_RTS_AFTER_SEND |
1488*57886e83SLino Sanfilippo SER_RS485_RX_DURING_TX,
1489*57886e83SLino Sanfilippo .delay_rts_before_send = 1,
1490*57886e83SLino Sanfilippo .delay_rts_after_send = 1,
1491*57886e83SLino Sanfilippo };
1492*57886e83SLino Sanfilippo
serial_omap_probe_rs485(struct uart_omap_port * up,struct device * dev)14934a0ac0f5SMark Jackson static int serial_omap_probe_rs485(struct uart_omap_port *up,
14945745fd0fSLinus Walleij struct device *dev)
14954a0ac0f5SMark Jackson {
1496dadd7ecbSRicardo Ribalda Delgado struct serial_rs485 *rs485conf = &up->port.rs485;
14975745fd0fSLinus Walleij struct device_node *np = dev->of_node;
14985745fd0fSLinus Walleij enum gpiod_flags gflags;
14994a0ac0f5SMark Jackson int ret;
15004a0ac0f5SMark Jackson
15014a0ac0f5SMark Jackson rs485conf->flags = 0;
15025745fd0fSLinus Walleij up->rts_gpiod = NULL;
15034a0ac0f5SMark Jackson
15044a0ac0f5SMark Jackson if (!np)
15054a0ac0f5SMark Jackson return 0;
15064a0ac0f5SMark Jackson
1507*57886e83SLino Sanfilippo up->port.rs485_config = serial_omap_config_rs485;
1508*57886e83SLino Sanfilippo up->port.rs485_supported = serial_omap_rs485_supported;
1509*57886e83SLino Sanfilippo
1510c150c0f3SLukas Wunner ret = uart_get_rs485_mode(&up->port);
1511c150c0f3SLukas Wunner if (ret)
1512c150c0f3SLukas Wunner return ret;
1513743f93f8SLukas Wunner
1514f1e5b618SLukas Wunner if (of_property_read_bool(np, "rs485-rts-active-high")) {
15154a0ac0f5SMark Jackson rs485conf->flags |= SER_RS485_RTS_ON_SEND;
1516f1e5b618SLukas Wunner rs485conf->flags &= ~SER_RS485_RTS_AFTER_SEND;
1517f1e5b618SLukas Wunner } else {
1518f1e5b618SLukas Wunner rs485conf->flags &= ~SER_RS485_RTS_ON_SEND;
15194a0ac0f5SMark Jackson rs485conf->flags |= SER_RS485_RTS_AFTER_SEND;
1520f1e5b618SLukas Wunner }
15214a0ac0f5SMark Jackson
15224a0ac0f5SMark Jackson /* check for tx enable gpio */
15235745fd0fSLinus Walleij gflags = rs485conf->flags & SER_RS485_RTS_AFTER_SEND ?
15245745fd0fSLinus Walleij GPIOD_OUT_HIGH : GPIOD_OUT_LOW;
15255745fd0fSLinus Walleij up->rts_gpiod = devm_gpiod_get_optional(dev, "rts", gflags);
15265745fd0fSLinus Walleij if (IS_ERR(up->rts_gpiod)) {
15275745fd0fSLinus Walleij ret = PTR_ERR(up->rts_gpiod);
15285745fd0fSLinus Walleij if (ret == -EPROBE_DEFER)
15294a0ac0f5SMark Jackson return ret;
1530e2752ae3SLukas Wunner
15315745fd0fSLinus Walleij up->rts_gpiod = NULL;
1532e2752ae3SLukas Wunner up->port.rs485_supported = (const struct serial_rs485) { };
1533e2752ae3SLukas Wunner if (rs485conf->flags & SER_RS485_ENABLED) {
1534e2752ae3SLukas Wunner dev_err(dev, "disabling RS-485 (rts-gpio missing in device tree)\n");
1535e2752ae3SLukas Wunner memset(rs485conf, 0, sizeof(*rs485conf));
1536e2752ae3SLukas Wunner }
1537a64c1a1cSMichael Grzeschik } else {
15385745fd0fSLinus Walleij gpiod_set_consumer_name(up->rts_gpiod, "omap-serial");
1539a64c1a1cSMichael Grzeschik }
15404a0ac0f5SMark Jackson
15414a0ac0f5SMark Jackson return 0;
15424a0ac0f5SMark Jackson }
15434a0ac0f5SMark Jackson
serial_omap_probe(struct platform_device * pdev)15449671f099SBill Pemberton static int serial_omap_probe(struct platform_device *pdev)
1545ab4382d2SGreg Kroah-Hartman {
1546574de559SJingoo Han struct omap_uart_port_info *omap_up_info = dev_get_platdata(&pdev->dev);
1547cc51638aSFelipe Balbi struct uart_omap_port *up;
1548cc51638aSFelipe Balbi struct resource *mem;
1549d044d235SFelipe Balbi void __iomem *base;
1550cc51638aSFelipe Balbi int uartirq = 0;
1551cc51638aSFelipe Balbi int wakeirq = 0;
1552cc51638aSFelipe Balbi int ret;
1553ab4382d2SGreg Kroah-Hartman
15542a0b965cSTony Lindgren /* The optional wakeirq may be specified in the board dts file */
1555a0a490f9SVikram Pandita if (pdev->dev.of_node) {
15562a0b965cSTony Lindgren uartirq = irq_of_parse_and_map(pdev->dev.of_node, 0);
15572a0b965cSTony Lindgren if (!uartirq)
15582a0b965cSTony Lindgren return -EPROBE_DEFER;
15592a0b965cSTony Lindgren wakeirq = irq_of_parse_and_map(pdev->dev.of_node, 1);
1560d92b0dfcSRajendra Nayak omap_up_info = of_get_uart_port_info(&pdev->dev);
1561a0a490f9SVikram Pandita pdev->dev.platform_data = omap_up_info;
15622a0b965cSTony Lindgren } else {
156354af692cSFelipe Balbi uartirq = platform_get_irq(pdev, 0);
156454af692cSFelipe Balbi if (uartirq < 0)
156554af692cSFelipe Balbi return -EPROBE_DEFER;
1566a0a490f9SVikram Pandita }
1567d92b0dfcSRajendra Nayak
1568d044d235SFelipe Balbi up = devm_kzalloc(&pdev->dev, sizeof(*up), GFP_KERNEL);
1569d044d235SFelipe Balbi if (!up)
1570d044d235SFelipe Balbi return -ENOMEM;
1571ab4382d2SGreg Kroah-Hartman
1572fcf0be13SYangtao Li base = devm_platform_get_and_ioremap_resource(pdev, 0, &mem);
1573d044d235SFelipe Balbi if (IS_ERR(base))
1574d044d235SFelipe Balbi return PTR_ERR(base);
1575ab4382d2SGreg Kroah-Hartman
1576d8ee4ea6SFelipe Balbi up->dev = &pdev->dev;
1577ab4382d2SGreg Kroah-Hartman up->port.dev = &pdev->dev;
1578ab4382d2SGreg Kroah-Hartman up->port.type = PORT_OMAP;
1579ab4382d2SGreg Kroah-Hartman up->port.iotype = UPIO_MEM;
15802a0b965cSTony Lindgren up->port.irq = uartirq;
1581ab4382d2SGreg Kroah-Hartman up->port.regshift = 2;
1582ab4382d2SGreg Kroah-Hartman up->port.fifosize = 64;
1583ab4382d2SGreg Kroah-Hartman up->port.ops = &serial_omap_pops;
1584b062e4aaSDmitry Safonov up->port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_OMAP_CONSOLE);
1585ab4382d2SGreg Kroah-Hartman
1586d92b0dfcSRajendra Nayak if (pdev->dev.of_node)
15873c59958dSSebastian Andrzej Siewior ret = of_alias_get_id(pdev->dev.of_node, "serial");
1588d92b0dfcSRajendra Nayak else
15893c59958dSSebastian Andrzej Siewior ret = pdev->id;
1590ab4382d2SGreg Kroah-Hartman
15913c59958dSSebastian Andrzej Siewior if (ret < 0) {
1592d92b0dfcSRajendra Nayak dev_err(&pdev->dev, "failed to get alias/pdev id, errno %d\n",
15933c59958dSSebastian Andrzej Siewior ret);
1594388bc262SShubhrajyoti D goto err_port_line;
1595d92b0dfcSRajendra Nayak }
15963c59958dSSebastian Andrzej Siewior up->port.line = ret;
1597d92b0dfcSRajendra Nayak
15987af0ea5dSNishanth Menon if (up->port.line >= OMAP_MAX_HSUART_PORTS) {
15997af0ea5dSNishanth Menon dev_err(&pdev->dev, "uart ID %d > MAX %d.\n", up->port.line,
16007af0ea5dSNishanth Menon OMAP_MAX_HSUART_PORTS);
16017af0ea5dSNishanth Menon ret = -ENXIO;
16027af0ea5dSNishanth Menon goto err_port_line;
16037af0ea5dSNishanth Menon }
16047af0ea5dSNishanth Menon
16051cf94d3aSDoug Kehn up->wakeirq = wakeirq;
16061cf94d3aSDoug Kehn if (!up->wakeirq)
16071cf94d3aSDoug Kehn dev_info(up->port.dev, "no wakeirq for uart%d\n",
16081cf94d3aSDoug Kehn up->port.line);
16091cf94d3aSDoug Kehn
1610d92b0dfcSRajendra Nayak sprintf(up->name, "OMAP UART%d", up->port.line);
1611edd70ad7SGovindraj.R up->port.mapbase = mem->start;
1612d044d235SFelipe Balbi up->port.membase = base;
1613ab4382d2SGreg Kroah-Hartman up->port.flags = omap_up_info->flags;
1614ab4382d2SGreg Kroah-Hartman up->port.uartclk = omap_up_info->uartclk;
16158fe789dcSRajendra Nayak if (!up->port.uartclk) {
16168fe789dcSRajendra Nayak up->port.uartclk = DEFAULT_CLK_SPEED;
1617e5f9bf72SPhilippe Proulx dev_warn(&pdev->dev,
161880d8611dSPhilippe Proulx "No clock speed specified: using default: %d\n",
1619e5f9bf72SPhilippe Proulx DEFAULT_CLK_SPEED);
16208fe789dcSRajendra Nayak }
1621ab4382d2SGreg Kroah-Hartman
1622*57886e83SLino Sanfilippo ret = serial_omap_probe_rs485(up, &pdev->dev);
1623*57886e83SLino Sanfilippo if (ret < 0)
1624*57886e83SLino Sanfilippo goto err_rs485;
1625*57886e83SLino Sanfilippo
16262552d352SRafael J. Wysocki up->latency = PM_QOS_CPU_LATENCY_DEFAULT_VALUE;
16272552d352SRafael J. Wysocki up->calc_latency = PM_QOS_CPU_LATENCY_DEFAULT_VALUE;
162801d2b189SRafael J. Wysocki cpu_latency_qos_add_request(&up->pm_qos_request, up->latency);
16292fd14964SGovindraj.R INIT_WORK(&up->qos_work, serial_omap_uart_qos_work);
16302fd14964SGovindraj.R
163193220dccSFelipe Balbi platform_set_drvdata(pdev, up);
1632a630fbfbSTony Lindgren if (omap_up_info->autosuspend_timeout == 0)
1633a630fbfbSTony Lindgren omap_up_info->autosuspend_timeout = -1;
16345b6acc79SFelipe Balbi
1635a630fbfbSTony Lindgren device_init_wakeup(up->dev, true);
1636fcdca757SGovindraj.R
16373026d14aSGrygorii Strashko pm_runtime_enable(&pdev->dev);
16383026d14aSGrygorii Strashko
1639fcdca757SGovindraj.R pm_runtime_get_sync(&pdev->dev);
1640fcdca757SGovindraj.R
16417c77c8deSGovindraj.R omap_serial_fill_features_erratas(up);
16427c77c8deSGovindraj.R
1643ba77433dSRajendra Nayak ui[up->port.line] = up;
1644ab4382d2SGreg Kroah-Hartman serial_omap_add_console_port(up);
1645ab4382d2SGreg Kroah-Hartman
1646ab4382d2SGreg Kroah-Hartman ret = uart_add_one_port(&serial_omap_reg, &up->port);
1647ab4382d2SGreg Kroah-Hartman if (ret != 0)
1648388bc262SShubhrajyoti D goto err_add_port;
1649ab4382d2SGreg Kroah-Hartman
1650ab4382d2SGreg Kroah-Hartman return 0;
1651388bc262SShubhrajyoti D
1652388bc262SShubhrajyoti D err_add_port:
165377e6fe7fSJohan Hovold pm_runtime_put_sync(&pdev->dev);
1654388bc262SShubhrajyoti D pm_runtime_disable(&pdev->dev);
165501d2b189SRafael J. Wysocki cpu_latency_qos_remove_request(&up->pm_qos_request);
165666cf1d84SSemen Protsenko device_init_wakeup(up->dev, false);
16574a0ac0f5SMark Jackson err_rs485:
1658388bc262SShubhrajyoti D err_port_line:
1659ab4382d2SGreg Kroah-Hartman return ret;
1660ab4382d2SGreg Kroah-Hartman }
1661ab4382d2SGreg Kroah-Hartman
serial_omap_remove(struct platform_device * dev)1662ae8d8a14SBill Pemberton static int serial_omap_remove(struct platform_device *dev)
1663ab4382d2SGreg Kroah-Hartman {
1664ab4382d2SGreg Kroah-Hartman struct uart_omap_port *up = platform_get_drvdata(dev);
1665ab4382d2SGreg Kroah-Hartman
1666099bd73dSJohan Hovold pm_runtime_get_sync(up->dev);
1667099bd73dSJohan Hovold
1668099bd73dSJohan Hovold uart_remove_one_port(&serial_omap_reg, &up->port);
1669099bd73dSJohan Hovold
16707e9c8e7dSFelipe Balbi pm_runtime_put_sync(up->dev);
1671d8ee4ea6SFelipe Balbi pm_runtime_disable(up->dev);
167201d2b189SRafael J. Wysocki cpu_latency_qos_remove_request(&up->pm_qos_request);
167393a2e470SSanjay Singh Rawat device_init_wakeup(&dev->dev, false);
1674fcdca757SGovindraj.R
1675ab4382d2SGreg Kroah-Hartman return 0;
1676ab4382d2SGreg Kroah-Hartman }
1677ab4382d2SGreg Kroah-Hartman
167894734749SGovindraj.R /*
167994734749SGovindraj.R * Work Around for Errata i202 (2430, 3430, 3630, 4430 and 4460)
168094734749SGovindraj.R * The access to uart register after MDR1 Access
168194734749SGovindraj.R * causes UART to corrupt data.
168294734749SGovindraj.R *
168394734749SGovindraj.R * Need a delay =
168494734749SGovindraj.R * 5 L4 clock cycles + 5 UART functional clock cycle (@48MHz = ~0.2uS)
168594734749SGovindraj.R * give 10 times as much
168694734749SGovindraj.R */
serial_omap_mdr1_errataset(struct uart_omap_port * up,u8 mdr1)168794734749SGovindraj.R static void serial_omap_mdr1_errataset(struct uart_omap_port *up, u8 mdr1)
168894734749SGovindraj.R {
168994734749SGovindraj.R u8 timeout = 255;
169094734749SGovindraj.R
169194734749SGovindraj.R serial_out(up, UART_OMAP_MDR1, mdr1);
169294734749SGovindraj.R udelay(2);
169394734749SGovindraj.R serial_out(up, UART_FCR, up->fcr | UART_FCR_CLEAR_XMIT |
169494734749SGovindraj.R UART_FCR_CLEAR_RCVR);
169594734749SGovindraj.R /*
169694734749SGovindraj.R * Wait for FIFO to empty: when empty, RX_FIFO_E bit is 0 and
169794734749SGovindraj.R * TX_FIFO_E bit is 1.
169894734749SGovindraj.R */
169994734749SGovindraj.R while (UART_LSR_THRE != (serial_in(up, UART_LSR) &
170094734749SGovindraj.R (UART_LSR_THRE | UART_LSR_DR))) {
170194734749SGovindraj.R timeout--;
170294734749SGovindraj.R if (!timeout) {
170394734749SGovindraj.R /* Should *never* happen. we warn and carry on */
1704d8ee4ea6SFelipe Balbi dev_crit(up->dev, "Errata i202: timedout %x\n",
170594734749SGovindraj.R serial_in(up, UART_LSR));
170694734749SGovindraj.R break;
170794734749SGovindraj.R }
170894734749SGovindraj.R udelay(1);
170994734749SGovindraj.R }
171094734749SGovindraj.R }
171194734749SGovindraj.R
1712d39fe4e5SRafael J. Wysocki #ifdef CONFIG_PM
serial_omap_restore_context(struct uart_omap_port * up)17139f9ac1e8SGovindraj.R static void serial_omap_restore_context(struct uart_omap_port *up)
17149f9ac1e8SGovindraj.R {
171594734749SGovindraj.R if (up->errata & UART_ERRATA_i202_MDR1_ACCESS)
171694734749SGovindraj.R serial_omap_mdr1_errataset(up, UART_OMAP_MDR1_DISABLE);
171794734749SGovindraj.R else
17189f9ac1e8SGovindraj.R serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE);
171994734749SGovindraj.R
17209f9ac1e8SGovindraj.R serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */
17219f9ac1e8SGovindraj.R serial_out(up, UART_EFR, UART_EFR_ECB);
17229f9ac1e8SGovindraj.R serial_out(up, UART_LCR, 0x0); /* Operational mode */
17239f9ac1e8SGovindraj.R serial_out(up, UART_IER, 0x0);
17249f9ac1e8SGovindraj.R serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */
1725c538d20cSGovindraj.R serial_out(up, UART_DLL, up->dll);
1726c538d20cSGovindraj.R serial_out(up, UART_DLM, up->dlh);
17279f9ac1e8SGovindraj.R serial_out(up, UART_LCR, 0x0); /* Operational mode */
17289f9ac1e8SGovindraj.R serial_out(up, UART_IER, up->ier);
17299f9ac1e8SGovindraj.R serial_out(up, UART_FCR, up->fcr);
17309f9ac1e8SGovindraj.R serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
17319f9ac1e8SGovindraj.R serial_out(up, UART_MCR, up->mcr);
17329f9ac1e8SGovindraj.R serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */
1733c538d20cSGovindraj.R serial_out(up, UART_OMAP_SCR, up->scr);
17349f9ac1e8SGovindraj.R serial_out(up, UART_EFR, up->efr);
17359f9ac1e8SGovindraj.R serial_out(up, UART_LCR, up->lcr);
173694734749SGovindraj.R if (up->errata & UART_ERRATA_i202_MDR1_ACCESS)
173794734749SGovindraj.R serial_omap_mdr1_errataset(up, up->mdr1);
173894734749SGovindraj.R else
1739c538d20cSGovindraj.R serial_out(up, UART_OMAP_MDR1, up->mdr1);
1740f64ffda6SGovindraj.R serial_out(up, UART_OMAP_WER, up->wer);
17419f9ac1e8SGovindraj.R }
17429f9ac1e8SGovindraj.R
serial_omap_runtime_suspend(struct device * dev)1743fcdca757SGovindraj.R static int serial_omap_runtime_suspend(struct device *dev)
1744fcdca757SGovindraj.R {
1745ec3bebc6SGovindraj.R struct uart_omap_port *up = dev_get_drvdata(dev);
1746ec3bebc6SGovindraj.R
17477f25301dSWei Yongjun if (!up)
17487f25301dSWei Yongjun return -EINVAL;
17497f25301dSWei Yongjun
1750ddd85e22SSourav Poddar /*
1751ddd85e22SSourav Poddar * When using 'no_console_suspend', the console UART must not be
1752ddd85e22SSourav Poddar * suspended. Since driver suspend is managed by runtime suspend,
1753ddd85e22SSourav Poddar * preventing runtime suspend (by returning error) will keep device
1754ddd85e22SSourav Poddar * active during suspend.
1755ddd85e22SSourav Poddar */
1756ddd85e22SSourav Poddar if (up->is_suspending && !console_suspend_enabled &&
1757ddd85e22SSourav Poddar uart_console(&up->port))
1758ddd85e22SSourav Poddar return -EBUSY;
1759ddd85e22SSourav Poddar
1760e5b57c03SFelipe Balbi up->context_loss_cnt = serial_omap_get_context_loss_count(up);
1761ec3bebc6SGovindraj.R
1762e5b57c03SFelipe Balbi serial_omap_enable_wakeup(up, true);
176362f3ec5fSGovindraj.R
17642552d352SRafael J. Wysocki up->latency = PM_QOS_CPU_LATENCY_DEFAULT_VALUE;
17652fd14964SGovindraj.R schedule_work(&up->qos_work);
17662fd14964SGovindraj.R
1767fcdca757SGovindraj.R return 0;
1768fcdca757SGovindraj.R }
1769fcdca757SGovindraj.R
serial_omap_runtime_resume(struct device * dev)1770fcdca757SGovindraj.R static int serial_omap_runtime_resume(struct device *dev)
1771fcdca757SGovindraj.R {
17729f9ac1e8SGovindraj.R struct uart_omap_port *up = dev_get_drvdata(dev);
17739f9ac1e8SGovindraj.R
177439aee51dSShubhrajyoti D int loss_cnt = serial_omap_get_context_loss_count(up);
1775ec3bebc6SGovindraj.R
1776d758c9c1STony Lindgren serial_omap_enable_wakeup(up, false);
1777d758c9c1STony Lindgren
177839aee51dSShubhrajyoti D if (loss_cnt < 0) {
1779a630fbfbSTony Lindgren dev_dbg(dev, "serial_omap_get_context_loss_count failed : %d\n",
178039aee51dSShubhrajyoti D loss_cnt);
17819f9ac1e8SGovindraj.R serial_omap_restore_context(up);
178239aee51dSShubhrajyoti D } else if (up->context_loss_cnt != loss_cnt) {
178339aee51dSShubhrajyoti D serial_omap_restore_context(up);
178439aee51dSShubhrajyoti D }
17852fd14964SGovindraj.R up->latency = up->calc_latency;
17862fd14964SGovindraj.R schedule_work(&up->qos_work);
17879f9ac1e8SGovindraj.R
1788fcdca757SGovindraj.R return 0;
1789fcdca757SGovindraj.R }
1790fcdca757SGovindraj.R #endif
1791fcdca757SGovindraj.R
1792fcdca757SGovindraj.R static const struct dev_pm_ops serial_omap_dev_pm_ops = {
1793fcdca757SGovindraj.R SET_SYSTEM_SLEEP_PM_OPS(serial_omap_suspend, serial_omap_resume)
1794fcdca757SGovindraj.R SET_RUNTIME_PM_OPS(serial_omap_runtime_suspend,
1795fcdca757SGovindraj.R serial_omap_runtime_resume, NULL)
1796ddd85e22SSourav Poddar .prepare = serial_omap_prepare,
1797ddd85e22SSourav Poddar .complete = serial_omap_complete,
1798fcdca757SGovindraj.R };
1799fcdca757SGovindraj.R
1800d92b0dfcSRajendra Nayak #if defined(CONFIG_OF)
1801d92b0dfcSRajendra Nayak static const struct of_device_id omap_serial_of_match[] = {
1802d92b0dfcSRajendra Nayak { .compatible = "ti,omap2-uart" },
1803d92b0dfcSRajendra Nayak { .compatible = "ti,omap3-uart" },
1804d92b0dfcSRajendra Nayak { .compatible = "ti,omap4-uart" },
1805d92b0dfcSRajendra Nayak {},
1806d92b0dfcSRajendra Nayak };
1807d92b0dfcSRajendra Nayak MODULE_DEVICE_TABLE(of, omap_serial_of_match);
1808d92b0dfcSRajendra Nayak #endif
1809d92b0dfcSRajendra Nayak
1810ab4382d2SGreg Kroah-Hartman static struct platform_driver serial_omap_driver = {
1811ab4382d2SGreg Kroah-Hartman .probe = serial_omap_probe,
18122d47b716SBill Pemberton .remove = serial_omap_remove,
1813ab4382d2SGreg Kroah-Hartman .driver = {
18141349ba02SJean Delvare .name = OMAP_SERIAL_DRIVER_NAME,
1815fcdca757SGovindraj.R .pm = &serial_omap_dev_pm_ops,
1816d92b0dfcSRajendra Nayak .of_match_table = of_match_ptr(omap_serial_of_match),
1817ab4382d2SGreg Kroah-Hartman },
1818ab4382d2SGreg Kroah-Hartman };
1819ab4382d2SGreg Kroah-Hartman
serial_omap_init(void)1820ab4382d2SGreg Kroah-Hartman static int __init serial_omap_init(void)
1821ab4382d2SGreg Kroah-Hartman {
1822ab4382d2SGreg Kroah-Hartman int ret;
1823ab4382d2SGreg Kroah-Hartman
1824ab4382d2SGreg Kroah-Hartman ret = uart_register_driver(&serial_omap_reg);
1825ab4382d2SGreg Kroah-Hartman if (ret != 0)
1826ab4382d2SGreg Kroah-Hartman return ret;
1827ab4382d2SGreg Kroah-Hartman ret = platform_driver_register(&serial_omap_driver);
1828ab4382d2SGreg Kroah-Hartman if (ret != 0)
1829ab4382d2SGreg Kroah-Hartman uart_unregister_driver(&serial_omap_reg);
1830ab4382d2SGreg Kroah-Hartman return ret;
1831ab4382d2SGreg Kroah-Hartman }
1832ab4382d2SGreg Kroah-Hartman
serial_omap_exit(void)1833ab4382d2SGreg Kroah-Hartman static void __exit serial_omap_exit(void)
1834ab4382d2SGreg Kroah-Hartman {
1835ab4382d2SGreg Kroah-Hartman platform_driver_unregister(&serial_omap_driver);
1836ab4382d2SGreg Kroah-Hartman uart_unregister_driver(&serial_omap_reg);
1837ab4382d2SGreg Kroah-Hartman }
1838ab4382d2SGreg Kroah-Hartman
1839ab4382d2SGreg Kroah-Hartman module_init(serial_omap_init);
1840ab4382d2SGreg Kroah-Hartman module_exit(serial_omap_exit);
1841ab4382d2SGreg Kroah-Hartman
1842ab4382d2SGreg Kroah-Hartman MODULE_DESCRIPTION("OMAP High Speed UART driver");
1843ab4382d2SGreg Kroah-Hartman MODULE_LICENSE("GPL");
1844ab4382d2SGreg Kroah-Hartman MODULE_AUTHOR("Texas Instruments Inc");
1845