xref: /openbmc/linux/drivers/tty/serial/max3100.c (revision a325f174)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  *
4  *  Copyright (C) 2008 Christian Pellegrin <chripell@evolware.org>
5  *
6  * Notes: the MAX3100 doesn't provide an interrupt on CTS so we have
7  * to use polling for flow control. TX empty IRQ is unusable, since
8  * writing conf clears FIFO buffer and we cannot have this interrupt
9  * always asking us for attention.
10  *
11  * Example platform data:
12 
13  static struct plat_max3100 max3100_plat_data = {
14  .loopback = 0,
15  .crystal = 0,
16  .poll_time = 100,
17  };
18 
19  static struct spi_board_info spi_board_info[] = {
20  {
21  .modalias	= "max3100",
22  .platform_data	= &max3100_plat_data,
23  .irq		= IRQ_EINT12,
24  .max_speed_hz	= 5*1000*1000,
25  .chip_select	= 0,
26  },
27  };
28 
29  * The initial minor number is 209 in the low-density serial port:
30  * mknod /dev/ttyMAX0 c 204 209
31  */
32 
33 #define MAX3100_MAJOR 204
34 #define MAX3100_MINOR 209
35 /* 4 MAX3100s should be enough for everyone */
36 #define MAX_MAX3100 4
37 
38 #include <linux/delay.h>
39 #include <linux/slab.h>
40 #include <linux/device.h>
41 #include <linux/module.h>
42 #include <linux/serial_core.h>
43 #include <linux/serial.h>
44 #include <linux/spi/spi.h>
45 #include <linux/freezer.h>
46 #include <linux/tty.h>
47 #include <linux/tty_flip.h>
48 
49 #include <linux/serial_max3100.h>
50 
51 #define MAX3100_C    (1<<14)
52 #define MAX3100_D    (0<<14)
53 #define MAX3100_W    (1<<15)
54 #define MAX3100_RX   (0<<15)
55 
56 #define MAX3100_WC   (MAX3100_W  | MAX3100_C)
57 #define MAX3100_RC   (MAX3100_RX | MAX3100_C)
58 #define MAX3100_WD   (MAX3100_W  | MAX3100_D)
59 #define MAX3100_RD   (MAX3100_RX | MAX3100_D)
60 #define MAX3100_CMD  (3 << 14)
61 
62 #define MAX3100_T    (1<<14)
63 #define MAX3100_R    (1<<15)
64 
65 #define MAX3100_FEN  (1<<13)
66 #define MAX3100_SHDN (1<<12)
67 #define MAX3100_TM   (1<<11)
68 #define MAX3100_RM   (1<<10)
69 #define MAX3100_PM   (1<<9)
70 #define MAX3100_RAM  (1<<8)
71 #define MAX3100_IR   (1<<7)
72 #define MAX3100_ST   (1<<6)
73 #define MAX3100_PE   (1<<5)
74 #define MAX3100_L    (1<<4)
75 #define MAX3100_BAUD (0xf)
76 
77 #define MAX3100_TE   (1<<10)
78 #define MAX3100_RAFE (1<<10)
79 #define MAX3100_RTS  (1<<9)
80 #define MAX3100_CTS  (1<<9)
81 #define MAX3100_PT   (1<<8)
82 #define MAX3100_DATA (0xff)
83 
84 #define MAX3100_RT   (MAX3100_R | MAX3100_T)
85 #define MAX3100_RTC  (MAX3100_RT | MAX3100_CTS | MAX3100_RAFE)
86 
87 /* the following simulate a status reg for ignore_status_mask */
88 #define MAX3100_STATUS_PE 1
89 #define MAX3100_STATUS_FE 2
90 #define MAX3100_STATUS_OE 4
91 
92 struct max3100_port {
93 	struct uart_port port;
94 	struct spi_device *spi;
95 
96 	int cts;	        /* last CTS received for flow ctrl */
97 	int tx_empty;		/* last TX empty bit */
98 
99 	spinlock_t conf_lock;	/* shared data */
100 	int conf_commit;	/* need to make changes */
101 	int conf;		/* configuration for the MAX31000
102 				 * (bits 0-7, bits 8-11 are irqs) */
103 	int rts_commit;	        /* need to change rts */
104 	int rts;		/* rts status */
105 	int baud;		/* current baud rate */
106 
107 	int parity;		/* keeps track if we should send parity */
108 #define MAX3100_PARITY_ON 1
109 #define MAX3100_PARITY_ODD 2
110 #define MAX3100_7BIT 4
111 	int rx_enabled;	        /* if we should rx chars */
112 
113 	int irq;		/* irq assigned to the max3100 */
114 
115 	int minor;		/* minor number */
116 	int crystal;		/* 1 if 3.6864Mhz crystal 0 for 1.8432 */
117 	int loopback;		/* 1 if we are in loopback mode */
118 
119 	/* for handling irqs: need workqueue since we do spi_sync */
120 	struct workqueue_struct *workqueue;
121 	struct work_struct work;
122 	/* set to 1 to make the workhandler exit as soon as possible */
123 	int  force_end_work;
124 	/* need to know we are suspending to avoid deadlock on workqueue */
125 	int suspending;
126 
127 	/* hook for suspending MAX3100 via dedicated pin */
128 	void (*max3100_hw_suspend) (int suspend);
129 
130 	/* poll time (in ms) for ctrl lines */
131 	int poll_time;
132 	/* and its timer */
133 	struct timer_list	timer;
134 };
135 
136 static struct max3100_port *max3100s[MAX_MAX3100]; /* the chips */
137 static DEFINE_MUTEX(max3100s_lock);		   /* race on probe */
138 
139 static int max3100_do_parity(struct max3100_port *s, u16 c)
140 {
141 	int parity;
142 
143 	if (s->parity & MAX3100_PARITY_ODD)
144 		parity = 1;
145 	else
146 		parity = 0;
147 
148 	if (s->parity & MAX3100_7BIT)
149 		c &= 0x7f;
150 	else
151 		c &= 0xff;
152 
153 	parity = parity ^ (hweight8(c) & 1);
154 	return parity;
155 }
156 
157 static int max3100_check_parity(struct max3100_port *s, u16 c)
158 {
159 	return max3100_do_parity(s, c) == ((c >> 8) & 1);
160 }
161 
162 static void max3100_calc_parity(struct max3100_port *s, u16 *c)
163 {
164 	if (s->parity & MAX3100_7BIT)
165 		*c &= 0x7f;
166 	else
167 		*c &= 0xff;
168 
169 	if (s->parity & MAX3100_PARITY_ON)
170 		*c |= max3100_do_parity(s, *c) << 8;
171 }
172 
173 static void max3100_work(struct work_struct *w);
174 
175 static void max3100_dowork(struct max3100_port *s)
176 {
177 	if (!s->force_end_work && !freezing(current) && !s->suspending)
178 		queue_work(s->workqueue, &s->work);
179 }
180 
181 static void max3100_timeout(struct timer_list *t)
182 {
183 	struct max3100_port *s = from_timer(s, t, timer);
184 
185 	if (s->port.state) {
186 		max3100_dowork(s);
187 		mod_timer(&s->timer, jiffies + s->poll_time);
188 	}
189 }
190 
191 static int max3100_sr(struct max3100_port *s, u16 tx, u16 *rx)
192 {
193 	struct spi_message message;
194 	u16 etx, erx;
195 	int status;
196 	struct spi_transfer tran = {
197 		.tx_buf = &etx,
198 		.rx_buf = &erx,
199 		.len = 2,
200 	};
201 
202 	etx = cpu_to_be16(tx);
203 	spi_message_init(&message);
204 	spi_message_add_tail(&tran, &message);
205 	status = spi_sync(s->spi, &message);
206 	if (status) {
207 		dev_warn(&s->spi->dev, "error while calling spi_sync\n");
208 		return -EIO;
209 	}
210 	*rx = be16_to_cpu(erx);
211 	s->tx_empty = (*rx & MAX3100_T) > 0;
212 	dev_dbg(&s->spi->dev, "%04x - %04x\n", tx, *rx);
213 	return 0;
214 }
215 
216 static int max3100_handlerx(struct max3100_port *s, u16 rx)
217 {
218 	unsigned int status = 0;
219 	int ret = 0, cts;
220 	u8 ch, flg;
221 
222 	if (rx & MAX3100_R && s->rx_enabled) {
223 		dev_dbg(&s->spi->dev, "%s\n", __func__);
224 		ch = rx & (s->parity & MAX3100_7BIT ? 0x7f : 0xff);
225 		if (rx & MAX3100_RAFE) {
226 			s->port.icount.frame++;
227 			flg = TTY_FRAME;
228 			status |= MAX3100_STATUS_FE;
229 		} else {
230 			if (s->parity & MAX3100_PARITY_ON) {
231 				if (max3100_check_parity(s, rx)) {
232 					s->port.icount.rx++;
233 					flg = TTY_NORMAL;
234 				} else {
235 					s->port.icount.parity++;
236 					flg = TTY_PARITY;
237 					status |= MAX3100_STATUS_PE;
238 				}
239 			} else {
240 				s->port.icount.rx++;
241 				flg = TTY_NORMAL;
242 			}
243 		}
244 		uart_insert_char(&s->port, status, MAX3100_STATUS_OE, ch, flg);
245 		ret = 1;
246 	}
247 
248 	cts = (rx & MAX3100_CTS) > 0;
249 	if (s->cts != cts) {
250 		s->cts = cts;
251 		uart_handle_cts_change(&s->port, cts);
252 	}
253 
254 	return ret;
255 }
256 
257 static void max3100_work(struct work_struct *w)
258 {
259 	struct max3100_port *s = container_of(w, struct max3100_port, work);
260 	int rxchars;
261 	u16 tx, rx;
262 	int conf, cconf, crts;
263 	struct circ_buf *xmit = &s->port.state->xmit;
264 
265 	dev_dbg(&s->spi->dev, "%s\n", __func__);
266 
267 	rxchars = 0;
268 	do {
269 		spin_lock(&s->conf_lock);
270 		conf = s->conf;
271 		cconf = s->conf_commit;
272 		s->conf_commit = 0;
273 		crts = s->rts_commit;
274 		s->rts_commit = 0;
275 		spin_unlock(&s->conf_lock);
276 		if (cconf)
277 			max3100_sr(s, MAX3100_WC | conf, &rx);
278 		if (crts) {
279 			max3100_sr(s, MAX3100_WD | MAX3100_TE |
280 				   (s->rts ? MAX3100_RTS : 0), &rx);
281 			rxchars += max3100_handlerx(s, rx);
282 		}
283 
284 		max3100_sr(s, MAX3100_RD, &rx);
285 		rxchars += max3100_handlerx(s, rx);
286 
287 		if (rx & MAX3100_T) {
288 			tx = 0xffff;
289 			if (s->port.x_char) {
290 				tx = s->port.x_char;
291 				s->port.icount.tx++;
292 				s->port.x_char = 0;
293 			} else if (!uart_circ_empty(xmit) &&
294 				   !uart_tx_stopped(&s->port)) {
295 				tx = xmit->buf[xmit->tail];
296 				uart_xmit_advance(&s->port, 1);
297 			}
298 			if (tx != 0xffff) {
299 				max3100_calc_parity(s, &tx);
300 				tx |= MAX3100_WD | (s->rts ? MAX3100_RTS : 0);
301 				max3100_sr(s, tx, &rx);
302 				rxchars += max3100_handlerx(s, rx);
303 			}
304 		}
305 
306 		if (rxchars > 16) {
307 			tty_flip_buffer_push(&s->port.state->port);
308 			rxchars = 0;
309 		}
310 		if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
311 			uart_write_wakeup(&s->port);
312 
313 	} while (!s->force_end_work &&
314 		 !freezing(current) &&
315 		 ((rx & MAX3100_R) ||
316 		  (!uart_circ_empty(xmit) &&
317 		   !uart_tx_stopped(&s->port))));
318 
319 	if (rxchars > 0)
320 		tty_flip_buffer_push(&s->port.state->port);
321 }
322 
323 static irqreturn_t max3100_irq(int irqno, void *dev_id)
324 {
325 	struct max3100_port *s = dev_id;
326 
327 	dev_dbg(&s->spi->dev, "%s\n", __func__);
328 
329 	max3100_dowork(s);
330 	return IRQ_HANDLED;
331 }
332 
333 static void max3100_enable_ms(struct uart_port *port)
334 {
335 	struct max3100_port *s = container_of(port,
336 					      struct max3100_port,
337 					      port);
338 
339 	if (s->poll_time > 0)
340 		mod_timer(&s->timer, jiffies);
341 	dev_dbg(&s->spi->dev, "%s\n", __func__);
342 }
343 
344 static void max3100_start_tx(struct uart_port *port)
345 {
346 	struct max3100_port *s = container_of(port,
347 					      struct max3100_port,
348 					      port);
349 
350 	dev_dbg(&s->spi->dev, "%s\n", __func__);
351 
352 	max3100_dowork(s);
353 }
354 
355 static void max3100_stop_rx(struct uart_port *port)
356 {
357 	struct max3100_port *s = container_of(port,
358 					      struct max3100_port,
359 					      port);
360 
361 	dev_dbg(&s->spi->dev, "%s\n", __func__);
362 
363 	s->rx_enabled = 0;
364 	spin_lock(&s->conf_lock);
365 	s->conf &= ~MAX3100_RM;
366 	s->conf_commit = 1;
367 	spin_unlock(&s->conf_lock);
368 	max3100_dowork(s);
369 }
370 
371 static unsigned int max3100_tx_empty(struct uart_port *port)
372 {
373 	struct max3100_port *s = container_of(port,
374 					      struct max3100_port,
375 					      port);
376 
377 	dev_dbg(&s->spi->dev, "%s\n", __func__);
378 
379 	/* may not be truly up-to-date */
380 	max3100_dowork(s);
381 	return s->tx_empty;
382 }
383 
384 static unsigned int max3100_get_mctrl(struct uart_port *port)
385 {
386 	struct max3100_port *s = container_of(port,
387 					      struct max3100_port,
388 					      port);
389 
390 	dev_dbg(&s->spi->dev, "%s\n", __func__);
391 
392 	/* may not be truly up-to-date */
393 	max3100_dowork(s);
394 	/* always assert DCD and DSR since these lines are not wired */
395 	return (s->cts ? TIOCM_CTS : 0) | TIOCM_DSR | TIOCM_CAR;
396 }
397 
398 static void max3100_set_mctrl(struct uart_port *port, unsigned int mctrl)
399 {
400 	struct max3100_port *s = container_of(port,
401 					      struct max3100_port,
402 					      port);
403 	int rts;
404 
405 	dev_dbg(&s->spi->dev, "%s\n", __func__);
406 
407 	rts = (mctrl & TIOCM_RTS) > 0;
408 
409 	spin_lock(&s->conf_lock);
410 	if (s->rts != rts) {
411 		s->rts = rts;
412 		s->rts_commit = 1;
413 		max3100_dowork(s);
414 	}
415 	spin_unlock(&s->conf_lock);
416 }
417 
418 static void
419 max3100_set_termios(struct uart_port *port, struct ktermios *termios,
420 		    const struct ktermios *old)
421 {
422 	struct max3100_port *s = container_of(port,
423 					      struct max3100_port,
424 					      port);
425 	int baud = 0;
426 	unsigned cflag;
427 	u32 param_new, param_mask, parity = 0;
428 
429 	dev_dbg(&s->spi->dev, "%s\n", __func__);
430 
431 	cflag = termios->c_cflag;
432 	param_mask = 0;
433 
434 	baud = tty_termios_baud_rate(termios);
435 	param_new = s->conf & MAX3100_BAUD;
436 	switch (baud) {
437 	case 300:
438 		if (s->crystal)
439 			baud = s->baud;
440 		else
441 			param_new = 15;
442 		break;
443 	case 600:
444 		param_new = 14 + s->crystal;
445 		break;
446 	case 1200:
447 		param_new = 13 + s->crystal;
448 		break;
449 	case 2400:
450 		param_new = 12 + s->crystal;
451 		break;
452 	case 4800:
453 		param_new = 11 + s->crystal;
454 		break;
455 	case 9600:
456 		param_new = 10 + s->crystal;
457 		break;
458 	case 19200:
459 		param_new = 9 + s->crystal;
460 		break;
461 	case 38400:
462 		param_new = 8 + s->crystal;
463 		break;
464 	case 57600:
465 		param_new = 1 + s->crystal;
466 		break;
467 	case 115200:
468 		param_new = 0 + s->crystal;
469 		break;
470 	case 230400:
471 		if (s->crystal)
472 			param_new = 0;
473 		else
474 			baud = s->baud;
475 		break;
476 	default:
477 		baud = s->baud;
478 	}
479 	tty_termios_encode_baud_rate(termios, baud, baud);
480 	s->baud = baud;
481 	param_mask |= MAX3100_BAUD;
482 
483 	if ((cflag & CSIZE) == CS8) {
484 		param_new &= ~MAX3100_L;
485 		parity &= ~MAX3100_7BIT;
486 	} else {
487 		param_new |= MAX3100_L;
488 		parity |= MAX3100_7BIT;
489 		cflag = (cflag & ~CSIZE) | CS7;
490 	}
491 	param_mask |= MAX3100_L;
492 
493 	if (cflag & CSTOPB)
494 		param_new |= MAX3100_ST;
495 	else
496 		param_new &= ~MAX3100_ST;
497 	param_mask |= MAX3100_ST;
498 
499 	if (cflag & PARENB) {
500 		param_new |= MAX3100_PE;
501 		parity |= MAX3100_PARITY_ON;
502 	} else {
503 		param_new &= ~MAX3100_PE;
504 		parity &= ~MAX3100_PARITY_ON;
505 	}
506 	param_mask |= MAX3100_PE;
507 
508 	if (cflag & PARODD)
509 		parity |= MAX3100_PARITY_ODD;
510 	else
511 		parity &= ~MAX3100_PARITY_ODD;
512 
513 	/* mask termios capabilities we don't support */
514 	cflag &= ~CMSPAR;
515 	termios->c_cflag = cflag;
516 
517 	s->port.ignore_status_mask = 0;
518 	if (termios->c_iflag & IGNPAR)
519 		s->port.ignore_status_mask |=
520 			MAX3100_STATUS_PE | MAX3100_STATUS_FE |
521 			MAX3100_STATUS_OE;
522 
523 	if (s->poll_time > 0)
524 		del_timer_sync(&s->timer);
525 
526 	uart_update_timeout(port, termios->c_cflag, baud);
527 
528 	spin_lock(&s->conf_lock);
529 	s->conf = (s->conf & ~param_mask) | (param_new & param_mask);
530 	s->conf_commit = 1;
531 	s->parity = parity;
532 	spin_unlock(&s->conf_lock);
533 	max3100_dowork(s);
534 
535 	if (UART_ENABLE_MS(&s->port, termios->c_cflag))
536 		max3100_enable_ms(&s->port);
537 }
538 
539 static void max3100_shutdown(struct uart_port *port)
540 {
541 	struct max3100_port *s = container_of(port,
542 					      struct max3100_port,
543 					      port);
544 
545 	dev_dbg(&s->spi->dev, "%s\n", __func__);
546 
547 	if (s->suspending)
548 		return;
549 
550 	s->force_end_work = 1;
551 
552 	if (s->poll_time > 0)
553 		del_timer_sync(&s->timer);
554 
555 	if (s->workqueue) {
556 		destroy_workqueue(s->workqueue);
557 		s->workqueue = NULL;
558 	}
559 	if (s->irq)
560 		free_irq(s->irq, s);
561 
562 	/* set shutdown mode to save power */
563 	if (s->max3100_hw_suspend)
564 		s->max3100_hw_suspend(1);
565 	else  {
566 		u16 tx, rx;
567 
568 		tx = MAX3100_WC | MAX3100_SHDN;
569 		max3100_sr(s, tx, &rx);
570 	}
571 }
572 
573 static int max3100_startup(struct uart_port *port)
574 {
575 	struct max3100_port *s = container_of(port,
576 					      struct max3100_port,
577 					      port);
578 	char b[12];
579 
580 	dev_dbg(&s->spi->dev, "%s\n", __func__);
581 
582 	s->conf = MAX3100_RM;
583 	s->baud = s->crystal ? 230400 : 115200;
584 	s->rx_enabled = 1;
585 
586 	if (s->suspending)
587 		return 0;
588 
589 	s->force_end_work = 0;
590 	s->parity = 0;
591 	s->rts = 0;
592 
593 	sprintf(b, "max3100-%d", s->minor);
594 	s->workqueue = create_freezable_workqueue(b);
595 	if (!s->workqueue) {
596 		dev_warn(&s->spi->dev, "cannot create workqueue\n");
597 		return -EBUSY;
598 	}
599 	INIT_WORK(&s->work, max3100_work);
600 
601 	if (request_irq(s->irq, max3100_irq,
602 			IRQF_TRIGGER_FALLING, "max3100", s) < 0) {
603 		dev_warn(&s->spi->dev, "cannot allocate irq %d\n", s->irq);
604 		s->irq = 0;
605 		destroy_workqueue(s->workqueue);
606 		s->workqueue = NULL;
607 		return -EBUSY;
608 	}
609 
610 	if (s->loopback) {
611 		u16 tx, rx;
612 		tx = 0x4001;
613 		max3100_sr(s, tx, &rx);
614 	}
615 
616 	if (s->max3100_hw_suspend)
617 		s->max3100_hw_suspend(0);
618 	s->conf_commit = 1;
619 	max3100_dowork(s);
620 	/* wait for clock to settle */
621 	msleep(50);
622 
623 	max3100_enable_ms(&s->port);
624 
625 	return 0;
626 }
627 
628 static const char *max3100_type(struct uart_port *port)
629 {
630 	struct max3100_port *s = container_of(port,
631 					      struct max3100_port,
632 					      port);
633 
634 	dev_dbg(&s->spi->dev, "%s\n", __func__);
635 
636 	return s->port.type == PORT_MAX3100 ? "MAX3100" : NULL;
637 }
638 
639 static void max3100_release_port(struct uart_port *port)
640 {
641 	struct max3100_port *s = container_of(port,
642 					      struct max3100_port,
643 					      port);
644 
645 	dev_dbg(&s->spi->dev, "%s\n", __func__);
646 }
647 
648 static void max3100_config_port(struct uart_port *port, int flags)
649 {
650 	struct max3100_port *s = container_of(port,
651 					      struct max3100_port,
652 					      port);
653 
654 	dev_dbg(&s->spi->dev, "%s\n", __func__);
655 
656 	if (flags & UART_CONFIG_TYPE)
657 		s->port.type = PORT_MAX3100;
658 }
659 
660 static int max3100_verify_port(struct uart_port *port,
661 			       struct serial_struct *ser)
662 {
663 	struct max3100_port *s = container_of(port,
664 					      struct max3100_port,
665 					      port);
666 	int ret = -EINVAL;
667 
668 	dev_dbg(&s->spi->dev, "%s\n", __func__);
669 
670 	if (ser->type == PORT_UNKNOWN || ser->type == PORT_MAX3100)
671 		ret = 0;
672 	return ret;
673 }
674 
675 static void max3100_stop_tx(struct uart_port *port)
676 {
677 	struct max3100_port *s = container_of(port,
678 					      struct max3100_port,
679 					      port);
680 
681 	dev_dbg(&s->spi->dev, "%s\n", __func__);
682 }
683 
684 static int max3100_request_port(struct uart_port *port)
685 {
686 	struct max3100_port *s = container_of(port,
687 					      struct max3100_port,
688 					      port);
689 
690 	dev_dbg(&s->spi->dev, "%s\n", __func__);
691 	return 0;
692 }
693 
694 static void max3100_break_ctl(struct uart_port *port, int break_state)
695 {
696 	struct max3100_port *s = container_of(port,
697 					      struct max3100_port,
698 					      port);
699 
700 	dev_dbg(&s->spi->dev, "%s\n", __func__);
701 }
702 
703 static const struct uart_ops max3100_ops = {
704 	.tx_empty	= max3100_tx_empty,
705 	.set_mctrl	= max3100_set_mctrl,
706 	.get_mctrl	= max3100_get_mctrl,
707 	.stop_tx        = max3100_stop_tx,
708 	.start_tx	= max3100_start_tx,
709 	.stop_rx	= max3100_stop_rx,
710 	.enable_ms      = max3100_enable_ms,
711 	.break_ctl      = max3100_break_ctl,
712 	.startup	= max3100_startup,
713 	.shutdown	= max3100_shutdown,
714 	.set_termios	= max3100_set_termios,
715 	.type		= max3100_type,
716 	.release_port   = max3100_release_port,
717 	.request_port   = max3100_request_port,
718 	.config_port	= max3100_config_port,
719 	.verify_port	= max3100_verify_port,
720 };
721 
722 static struct uart_driver max3100_uart_driver = {
723 	.owner          = THIS_MODULE,
724 	.driver_name    = "ttyMAX",
725 	.dev_name       = "ttyMAX",
726 	.major          = MAX3100_MAJOR,
727 	.minor          = MAX3100_MINOR,
728 	.nr             = MAX_MAX3100,
729 };
730 static int uart_driver_registered;
731 
732 static int max3100_probe(struct spi_device *spi)
733 {
734 	int i, retval;
735 	struct plat_max3100 *pdata;
736 	u16 tx, rx;
737 
738 	mutex_lock(&max3100s_lock);
739 
740 	if (!uart_driver_registered) {
741 		uart_driver_registered = 1;
742 		retval = uart_register_driver(&max3100_uart_driver);
743 		if (retval) {
744 			printk(KERN_ERR "Couldn't register max3100 uart driver\n");
745 			mutex_unlock(&max3100s_lock);
746 			return retval;
747 		}
748 	}
749 
750 	for (i = 0; i < MAX_MAX3100; i++)
751 		if (!max3100s[i])
752 			break;
753 	if (i == MAX_MAX3100) {
754 		dev_warn(&spi->dev, "too many MAX3100 chips\n");
755 		mutex_unlock(&max3100s_lock);
756 		return -ENOMEM;
757 	}
758 
759 	max3100s[i] = kzalloc(sizeof(struct max3100_port), GFP_KERNEL);
760 	if (!max3100s[i]) {
761 		dev_warn(&spi->dev,
762 			 "kmalloc for max3100 structure %d failed!\n", i);
763 		mutex_unlock(&max3100s_lock);
764 		return -ENOMEM;
765 	}
766 	max3100s[i]->spi = spi;
767 	max3100s[i]->irq = spi->irq;
768 	spin_lock_init(&max3100s[i]->conf_lock);
769 	spi_set_drvdata(spi, max3100s[i]);
770 	pdata = dev_get_platdata(&spi->dev);
771 	max3100s[i]->crystal = pdata->crystal;
772 	max3100s[i]->loopback = pdata->loopback;
773 	max3100s[i]->poll_time = msecs_to_jiffies(pdata->poll_time);
774 	if (pdata->poll_time > 0 && max3100s[i]->poll_time == 0)
775 		max3100s[i]->poll_time = 1;
776 	max3100s[i]->max3100_hw_suspend = pdata->max3100_hw_suspend;
777 	max3100s[i]->minor = i;
778 	timer_setup(&max3100s[i]->timer, max3100_timeout, 0);
779 
780 	dev_dbg(&spi->dev, "%s: adding port %d\n", __func__, i);
781 	max3100s[i]->port.irq = max3100s[i]->irq;
782 	max3100s[i]->port.uartclk = max3100s[i]->crystal ? 3686400 : 1843200;
783 	max3100s[i]->port.fifosize = 16;
784 	max3100s[i]->port.ops = &max3100_ops;
785 	max3100s[i]->port.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF;
786 	max3100s[i]->port.line = i;
787 	max3100s[i]->port.type = PORT_MAX3100;
788 	max3100s[i]->port.dev = &spi->dev;
789 	retval = uart_add_one_port(&max3100_uart_driver, &max3100s[i]->port);
790 	if (retval < 0)
791 		dev_warn(&spi->dev,
792 			 "uart_add_one_port failed for line %d with error %d\n",
793 			 i, retval);
794 
795 	/* set shutdown mode to save power. Will be woken-up on open */
796 	if (max3100s[i]->max3100_hw_suspend)
797 		max3100s[i]->max3100_hw_suspend(1);
798 	else {
799 		tx = MAX3100_WC | MAX3100_SHDN;
800 		max3100_sr(max3100s[i], tx, &rx);
801 	}
802 	mutex_unlock(&max3100s_lock);
803 	return 0;
804 }
805 
806 static void max3100_remove(struct spi_device *spi)
807 {
808 	struct max3100_port *s = spi_get_drvdata(spi);
809 	int i;
810 
811 	mutex_lock(&max3100s_lock);
812 
813 	/* find out the index for the chip we are removing */
814 	for (i = 0; i < MAX_MAX3100; i++)
815 		if (max3100s[i] == s) {
816 			dev_dbg(&spi->dev, "%s: removing port %d\n", __func__, i);
817 			uart_remove_one_port(&max3100_uart_driver, &max3100s[i]->port);
818 			kfree(max3100s[i]);
819 			max3100s[i] = NULL;
820 			break;
821 		}
822 
823 	WARN_ON(i == MAX_MAX3100);
824 
825 	/* check if this is the last chip we have */
826 	for (i = 0; i < MAX_MAX3100; i++)
827 		if (max3100s[i]) {
828 			mutex_unlock(&max3100s_lock);
829 			return;
830 		}
831 	pr_debug("removing max3100 driver\n");
832 	uart_unregister_driver(&max3100_uart_driver);
833 
834 	mutex_unlock(&max3100s_lock);
835 }
836 
837 #ifdef CONFIG_PM_SLEEP
838 
839 static int max3100_suspend(struct device *dev)
840 {
841 	struct max3100_port *s = dev_get_drvdata(dev);
842 
843 	dev_dbg(&s->spi->dev, "%s\n", __func__);
844 
845 	disable_irq(s->irq);
846 
847 	s->suspending = 1;
848 	uart_suspend_port(&max3100_uart_driver, &s->port);
849 
850 	if (s->max3100_hw_suspend)
851 		s->max3100_hw_suspend(1);
852 	else {
853 		/* no HW suspend, so do SW one */
854 		u16 tx, rx;
855 
856 		tx = MAX3100_WC | MAX3100_SHDN;
857 		max3100_sr(s, tx, &rx);
858 	}
859 	return 0;
860 }
861 
862 static int max3100_resume(struct device *dev)
863 {
864 	struct max3100_port *s = dev_get_drvdata(dev);
865 
866 	dev_dbg(&s->spi->dev, "%s\n", __func__);
867 
868 	if (s->max3100_hw_suspend)
869 		s->max3100_hw_suspend(0);
870 	uart_resume_port(&max3100_uart_driver, &s->port);
871 	s->suspending = 0;
872 
873 	enable_irq(s->irq);
874 
875 	s->conf_commit = 1;
876 	if (s->workqueue)
877 		max3100_dowork(s);
878 
879 	return 0;
880 }
881 
882 static SIMPLE_DEV_PM_OPS(max3100_pm_ops, max3100_suspend, max3100_resume);
883 #define MAX3100_PM_OPS (&max3100_pm_ops)
884 
885 #else
886 #define MAX3100_PM_OPS NULL
887 #endif
888 
889 static struct spi_driver max3100_driver = {
890 	.driver = {
891 		.name		= "max3100",
892 		.pm		= MAX3100_PM_OPS,
893 	},
894 	.probe		= max3100_probe,
895 	.remove		= max3100_remove,
896 };
897 
898 module_spi_driver(max3100_driver);
899 
900 MODULE_DESCRIPTION("MAX3100 driver");
901 MODULE_AUTHOR("Christian Pellegrin <chripell@evolware.org>");
902 MODULE_LICENSE("GPL");
903 MODULE_ALIAS("spi:max3100");
904