xref: /openbmc/linux/drivers/tty/serial/max3100.c (revision 4b33b5ff)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  *
4  *  Copyright (C) 2008 Christian Pellegrin <chripell@evolware.org>
5  *
6  * Notes: the MAX3100 doesn't provide an interrupt on CTS so we have
7  * to use polling for flow control. TX empty IRQ is unusable, since
8  * writing conf clears FIFO buffer and we cannot have this interrupt
9  * always asking us for attention.
10  *
11  * Example platform data:
12 
13  static struct plat_max3100 max3100_plat_data = {
14  .loopback = 0,
15  .crystal = 0,
16  .poll_time = 100,
17  };
18 
19  static struct spi_board_info spi_board_info[] = {
20  {
21  .modalias	= "max3100",
22  .platform_data	= &max3100_plat_data,
23  .irq		= IRQ_EINT12,
24  .max_speed_hz	= 5*1000*1000,
25  .chip_select	= 0,
26  },
27  };
28 
29  * The initial minor number is 209 in the low-density serial port:
30  * mknod /dev/ttyMAX0 c 204 209
31  */
32 
33 #define MAX3100_MAJOR 204
34 #define MAX3100_MINOR 209
35 /* 4 MAX3100s should be enough for everyone */
36 #define MAX_MAX3100 4
37 
38 #include <linux/delay.h>
39 #include <linux/slab.h>
40 #include <linux/device.h>
41 #include <linux/module.h>
42 #include <linux/serial_core.h>
43 #include <linux/serial.h>
44 #include <linux/spi/spi.h>
45 #include <linux/freezer.h>
46 #include <linux/tty.h>
47 #include <linux/tty_flip.h>
48 
49 #include <linux/serial_max3100.h>
50 
51 #define MAX3100_C    (1<<14)
52 #define MAX3100_D    (0<<14)
53 #define MAX3100_W    (1<<15)
54 #define MAX3100_RX   (0<<15)
55 
56 #define MAX3100_WC   (MAX3100_W  | MAX3100_C)
57 #define MAX3100_RC   (MAX3100_RX | MAX3100_C)
58 #define MAX3100_WD   (MAX3100_W  | MAX3100_D)
59 #define MAX3100_RD   (MAX3100_RX | MAX3100_D)
60 #define MAX3100_CMD  (3 << 14)
61 
62 #define MAX3100_T    (1<<14)
63 #define MAX3100_R    (1<<15)
64 
65 #define MAX3100_FEN  (1<<13)
66 #define MAX3100_SHDN (1<<12)
67 #define MAX3100_TM   (1<<11)
68 #define MAX3100_RM   (1<<10)
69 #define MAX3100_PM   (1<<9)
70 #define MAX3100_RAM  (1<<8)
71 #define MAX3100_IR   (1<<7)
72 #define MAX3100_ST   (1<<6)
73 #define MAX3100_PE   (1<<5)
74 #define MAX3100_L    (1<<4)
75 #define MAX3100_BAUD (0xf)
76 
77 #define MAX3100_TE   (1<<10)
78 #define MAX3100_RAFE (1<<10)
79 #define MAX3100_RTS  (1<<9)
80 #define MAX3100_CTS  (1<<9)
81 #define MAX3100_PT   (1<<8)
82 #define MAX3100_DATA (0xff)
83 
84 #define MAX3100_RT   (MAX3100_R | MAX3100_T)
85 #define MAX3100_RTC  (MAX3100_RT | MAX3100_CTS | MAX3100_RAFE)
86 
87 /* the following simulate a status reg for ignore_status_mask */
88 #define MAX3100_STATUS_PE 1
89 #define MAX3100_STATUS_FE 2
90 #define MAX3100_STATUS_OE 4
91 
92 struct max3100_port {
93 	struct uart_port port;
94 	struct spi_device *spi;
95 
96 	int cts;	        /* last CTS received for flow ctrl */
97 	int tx_empty;		/* last TX empty bit */
98 
99 	spinlock_t conf_lock;	/* shared data */
100 	int conf_commit;	/* need to make changes */
101 	int conf;		/* configuration for the MAX31000
102 				 * (bits 0-7, bits 8-11 are irqs) */
103 	int rts_commit;	        /* need to change rts */
104 	int rts;		/* rts status */
105 	int baud;		/* current baud rate */
106 
107 	int parity;		/* keeps track if we should send parity */
108 #define MAX3100_PARITY_ON 1
109 #define MAX3100_PARITY_ODD 2
110 #define MAX3100_7BIT 4
111 	int rx_enabled;	        /* if we should rx chars */
112 
113 	int irq;		/* irq assigned to the max3100 */
114 
115 	int minor;		/* minor number */
116 	int crystal;		/* 1 if 3.6864Mhz crystal 0 for 1.8432 */
117 	int loopback;		/* 1 if we are in loopback mode */
118 
119 	/* for handling irqs: need workqueue since we do spi_sync */
120 	struct workqueue_struct *workqueue;
121 	struct work_struct work;
122 	/* set to 1 to make the workhandler exit as soon as possible */
123 	int  force_end_work;
124 	/* need to know we are suspending to avoid deadlock on workqueue */
125 	int suspending;
126 
127 	/* hook for suspending MAX3100 via dedicated pin */
128 	void (*max3100_hw_suspend) (int suspend);
129 
130 	/* poll time (in ms) for ctrl lines */
131 	int poll_time;
132 	/* and its timer */
133 	struct timer_list	timer;
134 };
135 
136 static struct max3100_port *max3100s[MAX_MAX3100]; /* the chips */
137 static DEFINE_MUTEX(max3100s_lock);		   /* race on probe */
138 
139 static int max3100_do_parity(struct max3100_port *s, u16 c)
140 {
141 	int parity;
142 
143 	if (s->parity & MAX3100_PARITY_ODD)
144 		parity = 1;
145 	else
146 		parity = 0;
147 
148 	if (s->parity & MAX3100_7BIT)
149 		c &= 0x7f;
150 	else
151 		c &= 0xff;
152 
153 	parity = parity ^ (hweight8(c) & 1);
154 	return parity;
155 }
156 
157 static int max3100_check_parity(struct max3100_port *s, u16 c)
158 {
159 	return max3100_do_parity(s, c) == ((c >> 8) & 1);
160 }
161 
162 static void max3100_calc_parity(struct max3100_port *s, u16 *c)
163 {
164 	if (s->parity & MAX3100_7BIT)
165 		*c &= 0x7f;
166 	else
167 		*c &= 0xff;
168 
169 	if (s->parity & MAX3100_PARITY_ON)
170 		*c |= max3100_do_parity(s, *c) << 8;
171 }
172 
173 static void max3100_work(struct work_struct *w);
174 
175 static void max3100_dowork(struct max3100_port *s)
176 {
177 	if (!s->force_end_work && !freezing(current) && !s->suspending)
178 		queue_work(s->workqueue, &s->work);
179 }
180 
181 static void max3100_timeout(struct timer_list *t)
182 {
183 	struct max3100_port *s = from_timer(s, t, timer);
184 
185 	if (s->port.state) {
186 		max3100_dowork(s);
187 		mod_timer(&s->timer, jiffies + s->poll_time);
188 	}
189 }
190 
191 static int max3100_sr(struct max3100_port *s, u16 tx, u16 *rx)
192 {
193 	struct spi_message message;
194 	u16 etx, erx;
195 	int status;
196 	struct spi_transfer tran = {
197 		.tx_buf = &etx,
198 		.rx_buf = &erx,
199 		.len = 2,
200 	};
201 
202 	etx = cpu_to_be16(tx);
203 	spi_message_init(&message);
204 	spi_message_add_tail(&tran, &message);
205 	status = spi_sync(s->spi, &message);
206 	if (status) {
207 		dev_warn(&s->spi->dev, "error while calling spi_sync\n");
208 		return -EIO;
209 	}
210 	*rx = be16_to_cpu(erx);
211 	s->tx_empty = (*rx & MAX3100_T) > 0;
212 	dev_dbg(&s->spi->dev, "%04x - %04x\n", tx, *rx);
213 	return 0;
214 }
215 
216 static int max3100_handlerx(struct max3100_port *s, u16 rx)
217 {
218 	unsigned int ch, flg, status = 0;
219 	int ret = 0, cts;
220 
221 	if (rx & MAX3100_R && s->rx_enabled) {
222 		dev_dbg(&s->spi->dev, "%s\n", __func__);
223 		ch = rx & (s->parity & MAX3100_7BIT ? 0x7f : 0xff);
224 		if (rx & MAX3100_RAFE) {
225 			s->port.icount.frame++;
226 			flg = TTY_FRAME;
227 			status |= MAX3100_STATUS_FE;
228 		} else {
229 			if (s->parity & MAX3100_PARITY_ON) {
230 				if (max3100_check_parity(s, rx)) {
231 					s->port.icount.rx++;
232 					flg = TTY_NORMAL;
233 				} else {
234 					s->port.icount.parity++;
235 					flg = TTY_PARITY;
236 					status |= MAX3100_STATUS_PE;
237 				}
238 			} else {
239 				s->port.icount.rx++;
240 				flg = TTY_NORMAL;
241 			}
242 		}
243 		uart_insert_char(&s->port, status, MAX3100_STATUS_OE, ch, flg);
244 		ret = 1;
245 	}
246 
247 	cts = (rx & MAX3100_CTS) > 0;
248 	if (s->cts != cts) {
249 		s->cts = cts;
250 		uart_handle_cts_change(&s->port, cts ? TIOCM_CTS : 0);
251 	}
252 
253 	return ret;
254 }
255 
256 static void max3100_work(struct work_struct *w)
257 {
258 	struct max3100_port *s = container_of(w, struct max3100_port, work);
259 	int rxchars;
260 	u16 tx, rx;
261 	int conf, cconf, crts;
262 	struct circ_buf *xmit = &s->port.state->xmit;
263 
264 	dev_dbg(&s->spi->dev, "%s\n", __func__);
265 
266 	rxchars = 0;
267 	do {
268 		spin_lock(&s->conf_lock);
269 		conf = s->conf;
270 		cconf = s->conf_commit;
271 		s->conf_commit = 0;
272 		crts = s->rts_commit;
273 		s->rts_commit = 0;
274 		spin_unlock(&s->conf_lock);
275 		if (cconf)
276 			max3100_sr(s, MAX3100_WC | conf, &rx);
277 		if (crts) {
278 			max3100_sr(s, MAX3100_WD | MAX3100_TE |
279 				   (s->rts ? MAX3100_RTS : 0), &rx);
280 			rxchars += max3100_handlerx(s, rx);
281 		}
282 
283 		max3100_sr(s, MAX3100_RD, &rx);
284 		rxchars += max3100_handlerx(s, rx);
285 
286 		if (rx & MAX3100_T) {
287 			tx = 0xffff;
288 			if (s->port.x_char) {
289 				tx = s->port.x_char;
290 				s->port.icount.tx++;
291 				s->port.x_char = 0;
292 			} else if (!uart_circ_empty(xmit) &&
293 				   !uart_tx_stopped(&s->port)) {
294 				tx = xmit->buf[xmit->tail];
295 				xmit->tail = (xmit->tail + 1) &
296 					(UART_XMIT_SIZE - 1);
297 				s->port.icount.tx++;
298 			}
299 			if (tx != 0xffff) {
300 				max3100_calc_parity(s, &tx);
301 				tx |= MAX3100_WD | (s->rts ? MAX3100_RTS : 0);
302 				max3100_sr(s, tx, &rx);
303 				rxchars += max3100_handlerx(s, rx);
304 			}
305 		}
306 
307 		if (rxchars > 16) {
308 			tty_flip_buffer_push(&s->port.state->port);
309 			rxchars = 0;
310 		}
311 		if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
312 			uart_write_wakeup(&s->port);
313 
314 	} while (!s->force_end_work &&
315 		 !freezing(current) &&
316 		 ((rx & MAX3100_R) ||
317 		  (!uart_circ_empty(xmit) &&
318 		   !uart_tx_stopped(&s->port))));
319 
320 	if (rxchars > 0)
321 		tty_flip_buffer_push(&s->port.state->port);
322 }
323 
324 static irqreturn_t max3100_irq(int irqno, void *dev_id)
325 {
326 	struct max3100_port *s = dev_id;
327 
328 	dev_dbg(&s->spi->dev, "%s\n", __func__);
329 
330 	max3100_dowork(s);
331 	return IRQ_HANDLED;
332 }
333 
334 static void max3100_enable_ms(struct uart_port *port)
335 {
336 	struct max3100_port *s = container_of(port,
337 					      struct max3100_port,
338 					      port);
339 
340 	if (s->poll_time > 0)
341 		mod_timer(&s->timer, jiffies);
342 	dev_dbg(&s->spi->dev, "%s\n", __func__);
343 }
344 
345 static void max3100_start_tx(struct uart_port *port)
346 {
347 	struct max3100_port *s = container_of(port,
348 					      struct max3100_port,
349 					      port);
350 
351 	dev_dbg(&s->spi->dev, "%s\n", __func__);
352 
353 	max3100_dowork(s);
354 }
355 
356 static void max3100_stop_rx(struct uart_port *port)
357 {
358 	struct max3100_port *s = container_of(port,
359 					      struct max3100_port,
360 					      port);
361 
362 	dev_dbg(&s->spi->dev, "%s\n", __func__);
363 
364 	s->rx_enabled = 0;
365 	spin_lock(&s->conf_lock);
366 	s->conf &= ~MAX3100_RM;
367 	s->conf_commit = 1;
368 	spin_unlock(&s->conf_lock);
369 	max3100_dowork(s);
370 }
371 
372 static unsigned int max3100_tx_empty(struct uart_port *port)
373 {
374 	struct max3100_port *s = container_of(port,
375 					      struct max3100_port,
376 					      port);
377 
378 	dev_dbg(&s->spi->dev, "%s\n", __func__);
379 
380 	/* may not be truly up-to-date */
381 	max3100_dowork(s);
382 	return s->tx_empty;
383 }
384 
385 static unsigned int max3100_get_mctrl(struct uart_port *port)
386 {
387 	struct max3100_port *s = container_of(port,
388 					      struct max3100_port,
389 					      port);
390 
391 	dev_dbg(&s->spi->dev, "%s\n", __func__);
392 
393 	/* may not be truly up-to-date */
394 	max3100_dowork(s);
395 	/* always assert DCD and DSR since these lines are not wired */
396 	return (s->cts ? TIOCM_CTS : 0) | TIOCM_DSR | TIOCM_CAR;
397 }
398 
399 static void max3100_set_mctrl(struct uart_port *port, unsigned int mctrl)
400 {
401 	struct max3100_port *s = container_of(port,
402 					      struct max3100_port,
403 					      port);
404 	int rts;
405 
406 	dev_dbg(&s->spi->dev, "%s\n", __func__);
407 
408 	rts = (mctrl & TIOCM_RTS) > 0;
409 
410 	spin_lock(&s->conf_lock);
411 	if (s->rts != rts) {
412 		s->rts = rts;
413 		s->rts_commit = 1;
414 		max3100_dowork(s);
415 	}
416 	spin_unlock(&s->conf_lock);
417 }
418 
419 static void
420 max3100_set_termios(struct uart_port *port, struct ktermios *termios,
421 		    struct ktermios *old)
422 {
423 	struct max3100_port *s = container_of(port,
424 					      struct max3100_port,
425 					      port);
426 	int baud = 0;
427 	unsigned cflag;
428 	u32 param_new, param_mask, parity = 0;
429 
430 	dev_dbg(&s->spi->dev, "%s\n", __func__);
431 
432 	cflag = termios->c_cflag;
433 	param_mask = 0;
434 
435 	baud = tty_termios_baud_rate(termios);
436 	param_new = s->conf & MAX3100_BAUD;
437 	switch (baud) {
438 	case 300:
439 		if (s->crystal)
440 			baud = s->baud;
441 		else
442 			param_new = 15;
443 		break;
444 	case 600:
445 		param_new = 14 + s->crystal;
446 		break;
447 	case 1200:
448 		param_new = 13 + s->crystal;
449 		break;
450 	case 2400:
451 		param_new = 12 + s->crystal;
452 		break;
453 	case 4800:
454 		param_new = 11 + s->crystal;
455 		break;
456 	case 9600:
457 		param_new = 10 + s->crystal;
458 		break;
459 	case 19200:
460 		param_new = 9 + s->crystal;
461 		break;
462 	case 38400:
463 		param_new = 8 + s->crystal;
464 		break;
465 	case 57600:
466 		param_new = 1 + s->crystal;
467 		break;
468 	case 115200:
469 		param_new = 0 + s->crystal;
470 		break;
471 	case 230400:
472 		if (s->crystal)
473 			param_new = 0;
474 		else
475 			baud = s->baud;
476 		break;
477 	default:
478 		baud = s->baud;
479 	}
480 	tty_termios_encode_baud_rate(termios, baud, baud);
481 	s->baud = baud;
482 	param_mask |= MAX3100_BAUD;
483 
484 	if ((cflag & CSIZE) == CS8) {
485 		param_new &= ~MAX3100_L;
486 		parity &= ~MAX3100_7BIT;
487 	} else {
488 		param_new |= MAX3100_L;
489 		parity |= MAX3100_7BIT;
490 		cflag = (cflag & ~CSIZE) | CS7;
491 	}
492 	param_mask |= MAX3100_L;
493 
494 	if (cflag & CSTOPB)
495 		param_new |= MAX3100_ST;
496 	else
497 		param_new &= ~MAX3100_ST;
498 	param_mask |= MAX3100_ST;
499 
500 	if (cflag & PARENB) {
501 		param_new |= MAX3100_PE;
502 		parity |= MAX3100_PARITY_ON;
503 	} else {
504 		param_new &= ~MAX3100_PE;
505 		parity &= ~MAX3100_PARITY_ON;
506 	}
507 	param_mask |= MAX3100_PE;
508 
509 	if (cflag & PARODD)
510 		parity |= MAX3100_PARITY_ODD;
511 	else
512 		parity &= ~MAX3100_PARITY_ODD;
513 
514 	/* mask termios capabilities we don't support */
515 	cflag &= ~CMSPAR;
516 	termios->c_cflag = cflag;
517 
518 	s->port.ignore_status_mask = 0;
519 	if (termios->c_iflag & IGNPAR)
520 		s->port.ignore_status_mask |=
521 			MAX3100_STATUS_PE | MAX3100_STATUS_FE |
522 			MAX3100_STATUS_OE;
523 
524 	if (s->poll_time > 0)
525 		del_timer_sync(&s->timer);
526 
527 	uart_update_timeout(port, termios->c_cflag, baud);
528 
529 	spin_lock(&s->conf_lock);
530 	s->conf = (s->conf & ~param_mask) | (param_new & param_mask);
531 	s->conf_commit = 1;
532 	s->parity = parity;
533 	spin_unlock(&s->conf_lock);
534 	max3100_dowork(s);
535 
536 	if (UART_ENABLE_MS(&s->port, termios->c_cflag))
537 		max3100_enable_ms(&s->port);
538 }
539 
540 static void max3100_shutdown(struct uart_port *port)
541 {
542 	struct max3100_port *s = container_of(port,
543 					      struct max3100_port,
544 					      port);
545 
546 	dev_dbg(&s->spi->dev, "%s\n", __func__);
547 
548 	if (s->suspending)
549 		return;
550 
551 	s->force_end_work = 1;
552 
553 	if (s->poll_time > 0)
554 		del_timer_sync(&s->timer);
555 
556 	if (s->workqueue) {
557 		destroy_workqueue(s->workqueue);
558 		s->workqueue = NULL;
559 	}
560 	if (s->irq)
561 		free_irq(s->irq, s);
562 
563 	/* set shutdown mode to save power */
564 	if (s->max3100_hw_suspend)
565 		s->max3100_hw_suspend(1);
566 	else  {
567 		u16 tx, rx;
568 
569 		tx = MAX3100_WC | MAX3100_SHDN;
570 		max3100_sr(s, tx, &rx);
571 	}
572 }
573 
574 static int max3100_startup(struct uart_port *port)
575 {
576 	struct max3100_port *s = container_of(port,
577 					      struct max3100_port,
578 					      port);
579 	char b[12];
580 
581 	dev_dbg(&s->spi->dev, "%s\n", __func__);
582 
583 	s->conf = MAX3100_RM;
584 	s->baud = s->crystal ? 230400 : 115200;
585 	s->rx_enabled = 1;
586 
587 	if (s->suspending)
588 		return 0;
589 
590 	s->force_end_work = 0;
591 	s->parity = 0;
592 	s->rts = 0;
593 
594 	sprintf(b, "max3100-%d", s->minor);
595 	s->workqueue = create_freezable_workqueue(b);
596 	if (!s->workqueue) {
597 		dev_warn(&s->spi->dev, "cannot create workqueue\n");
598 		return -EBUSY;
599 	}
600 	INIT_WORK(&s->work, max3100_work);
601 
602 	if (request_irq(s->irq, max3100_irq,
603 			IRQF_TRIGGER_FALLING, "max3100", s) < 0) {
604 		dev_warn(&s->spi->dev, "cannot allocate irq %d\n", s->irq);
605 		s->irq = 0;
606 		destroy_workqueue(s->workqueue);
607 		s->workqueue = NULL;
608 		return -EBUSY;
609 	}
610 
611 	if (s->loopback) {
612 		u16 tx, rx;
613 		tx = 0x4001;
614 		max3100_sr(s, tx, &rx);
615 	}
616 
617 	if (s->max3100_hw_suspend)
618 		s->max3100_hw_suspend(0);
619 	s->conf_commit = 1;
620 	max3100_dowork(s);
621 	/* wait for clock to settle */
622 	msleep(50);
623 
624 	max3100_enable_ms(&s->port);
625 
626 	return 0;
627 }
628 
629 static const char *max3100_type(struct uart_port *port)
630 {
631 	struct max3100_port *s = container_of(port,
632 					      struct max3100_port,
633 					      port);
634 
635 	dev_dbg(&s->spi->dev, "%s\n", __func__);
636 
637 	return s->port.type == PORT_MAX3100 ? "MAX3100" : NULL;
638 }
639 
640 static void max3100_release_port(struct uart_port *port)
641 {
642 	struct max3100_port *s = container_of(port,
643 					      struct max3100_port,
644 					      port);
645 
646 	dev_dbg(&s->spi->dev, "%s\n", __func__);
647 }
648 
649 static void max3100_config_port(struct uart_port *port, int flags)
650 {
651 	struct max3100_port *s = container_of(port,
652 					      struct max3100_port,
653 					      port);
654 
655 	dev_dbg(&s->spi->dev, "%s\n", __func__);
656 
657 	if (flags & UART_CONFIG_TYPE)
658 		s->port.type = PORT_MAX3100;
659 }
660 
661 static int max3100_verify_port(struct uart_port *port,
662 			       struct serial_struct *ser)
663 {
664 	struct max3100_port *s = container_of(port,
665 					      struct max3100_port,
666 					      port);
667 	int ret = -EINVAL;
668 
669 	dev_dbg(&s->spi->dev, "%s\n", __func__);
670 
671 	if (ser->type == PORT_UNKNOWN || ser->type == PORT_MAX3100)
672 		ret = 0;
673 	return ret;
674 }
675 
676 static void max3100_stop_tx(struct uart_port *port)
677 {
678 	struct max3100_port *s = container_of(port,
679 					      struct max3100_port,
680 					      port);
681 
682 	dev_dbg(&s->spi->dev, "%s\n", __func__);
683 }
684 
685 static int max3100_request_port(struct uart_port *port)
686 {
687 	struct max3100_port *s = container_of(port,
688 					      struct max3100_port,
689 					      port);
690 
691 	dev_dbg(&s->spi->dev, "%s\n", __func__);
692 	return 0;
693 }
694 
695 static void max3100_break_ctl(struct uart_port *port, int break_state)
696 {
697 	struct max3100_port *s = container_of(port,
698 					      struct max3100_port,
699 					      port);
700 
701 	dev_dbg(&s->spi->dev, "%s\n", __func__);
702 }
703 
704 static const struct uart_ops max3100_ops = {
705 	.tx_empty	= max3100_tx_empty,
706 	.set_mctrl	= max3100_set_mctrl,
707 	.get_mctrl	= max3100_get_mctrl,
708 	.stop_tx        = max3100_stop_tx,
709 	.start_tx	= max3100_start_tx,
710 	.stop_rx	= max3100_stop_rx,
711 	.enable_ms      = max3100_enable_ms,
712 	.break_ctl      = max3100_break_ctl,
713 	.startup	= max3100_startup,
714 	.shutdown	= max3100_shutdown,
715 	.set_termios	= max3100_set_termios,
716 	.type		= max3100_type,
717 	.release_port   = max3100_release_port,
718 	.request_port   = max3100_request_port,
719 	.config_port	= max3100_config_port,
720 	.verify_port	= max3100_verify_port,
721 };
722 
723 static struct uart_driver max3100_uart_driver = {
724 	.owner          = THIS_MODULE,
725 	.driver_name    = "ttyMAX",
726 	.dev_name       = "ttyMAX",
727 	.major          = MAX3100_MAJOR,
728 	.minor          = MAX3100_MINOR,
729 	.nr             = MAX_MAX3100,
730 };
731 static int uart_driver_registered;
732 
733 static int max3100_probe(struct spi_device *spi)
734 {
735 	int i, retval;
736 	struct plat_max3100 *pdata;
737 	u16 tx, rx;
738 
739 	mutex_lock(&max3100s_lock);
740 
741 	if (!uart_driver_registered) {
742 		uart_driver_registered = 1;
743 		retval = uart_register_driver(&max3100_uart_driver);
744 		if (retval) {
745 			printk(KERN_ERR "Couldn't register max3100 uart driver\n");
746 			mutex_unlock(&max3100s_lock);
747 			return retval;
748 		}
749 	}
750 
751 	for (i = 0; i < MAX_MAX3100; i++)
752 		if (!max3100s[i])
753 			break;
754 	if (i == MAX_MAX3100) {
755 		dev_warn(&spi->dev, "too many MAX3100 chips\n");
756 		mutex_unlock(&max3100s_lock);
757 		return -ENOMEM;
758 	}
759 
760 	max3100s[i] = kzalloc(sizeof(struct max3100_port), GFP_KERNEL);
761 	if (!max3100s[i]) {
762 		dev_warn(&spi->dev,
763 			 "kmalloc for max3100 structure %d failed!\n", i);
764 		mutex_unlock(&max3100s_lock);
765 		return -ENOMEM;
766 	}
767 	max3100s[i]->spi = spi;
768 	max3100s[i]->irq = spi->irq;
769 	spin_lock_init(&max3100s[i]->conf_lock);
770 	spi_set_drvdata(spi, max3100s[i]);
771 	pdata = dev_get_platdata(&spi->dev);
772 	max3100s[i]->crystal = pdata->crystal;
773 	max3100s[i]->loopback = pdata->loopback;
774 	max3100s[i]->poll_time = msecs_to_jiffies(pdata->poll_time);
775 	if (pdata->poll_time > 0 && max3100s[i]->poll_time == 0)
776 		max3100s[i]->poll_time = 1;
777 	max3100s[i]->max3100_hw_suspend = pdata->max3100_hw_suspend;
778 	max3100s[i]->minor = i;
779 	timer_setup(&max3100s[i]->timer, max3100_timeout, 0);
780 
781 	dev_dbg(&spi->dev, "%s: adding port %d\n", __func__, i);
782 	max3100s[i]->port.irq = max3100s[i]->irq;
783 	max3100s[i]->port.uartclk = max3100s[i]->crystal ? 3686400 : 1843200;
784 	max3100s[i]->port.fifosize = 16;
785 	max3100s[i]->port.ops = &max3100_ops;
786 	max3100s[i]->port.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF;
787 	max3100s[i]->port.line = i;
788 	max3100s[i]->port.type = PORT_MAX3100;
789 	max3100s[i]->port.dev = &spi->dev;
790 	retval = uart_add_one_port(&max3100_uart_driver, &max3100s[i]->port);
791 	if (retval < 0)
792 		dev_warn(&spi->dev,
793 			 "uart_add_one_port failed for line %d with error %d\n",
794 			 i, retval);
795 
796 	/* set shutdown mode to save power. Will be woken-up on open */
797 	if (max3100s[i]->max3100_hw_suspend)
798 		max3100s[i]->max3100_hw_suspend(1);
799 	else {
800 		tx = MAX3100_WC | MAX3100_SHDN;
801 		max3100_sr(max3100s[i], tx, &rx);
802 	}
803 	mutex_unlock(&max3100s_lock);
804 	return 0;
805 }
806 
807 static void max3100_remove(struct spi_device *spi)
808 {
809 	struct max3100_port *s = spi_get_drvdata(spi);
810 	int i;
811 
812 	mutex_lock(&max3100s_lock);
813 
814 	/* find out the index for the chip we are removing */
815 	for (i = 0; i < MAX_MAX3100; i++)
816 		if (max3100s[i] == s) {
817 			dev_dbg(&spi->dev, "%s: removing port %d\n", __func__, i);
818 			uart_remove_one_port(&max3100_uart_driver, &max3100s[i]->port);
819 			kfree(max3100s[i]);
820 			max3100s[i] = NULL;
821 			break;
822 		}
823 
824 	WARN_ON(i == MAX_MAX3100);
825 
826 	/* check if this is the last chip we have */
827 	for (i = 0; i < MAX_MAX3100; i++)
828 		if (max3100s[i]) {
829 			mutex_unlock(&max3100s_lock);
830 			return;
831 		}
832 	pr_debug("removing max3100 driver\n");
833 	uart_unregister_driver(&max3100_uart_driver);
834 
835 	mutex_unlock(&max3100s_lock);
836 }
837 
838 #ifdef CONFIG_PM_SLEEP
839 
840 static int max3100_suspend(struct device *dev)
841 {
842 	struct max3100_port *s = dev_get_drvdata(dev);
843 
844 	dev_dbg(&s->spi->dev, "%s\n", __func__);
845 
846 	disable_irq(s->irq);
847 
848 	s->suspending = 1;
849 	uart_suspend_port(&max3100_uart_driver, &s->port);
850 
851 	if (s->max3100_hw_suspend)
852 		s->max3100_hw_suspend(1);
853 	else {
854 		/* no HW suspend, so do SW one */
855 		u16 tx, rx;
856 
857 		tx = MAX3100_WC | MAX3100_SHDN;
858 		max3100_sr(s, tx, &rx);
859 	}
860 	return 0;
861 }
862 
863 static int max3100_resume(struct device *dev)
864 {
865 	struct max3100_port *s = dev_get_drvdata(dev);
866 
867 	dev_dbg(&s->spi->dev, "%s\n", __func__);
868 
869 	if (s->max3100_hw_suspend)
870 		s->max3100_hw_suspend(0);
871 	uart_resume_port(&max3100_uart_driver, &s->port);
872 	s->suspending = 0;
873 
874 	enable_irq(s->irq);
875 
876 	s->conf_commit = 1;
877 	if (s->workqueue)
878 		max3100_dowork(s);
879 
880 	return 0;
881 }
882 
883 static SIMPLE_DEV_PM_OPS(max3100_pm_ops, max3100_suspend, max3100_resume);
884 #define MAX3100_PM_OPS (&max3100_pm_ops)
885 
886 #else
887 #define MAX3100_PM_OPS NULL
888 #endif
889 
890 static struct spi_driver max3100_driver = {
891 	.driver = {
892 		.name		= "max3100",
893 		.pm		= MAX3100_PM_OPS,
894 	},
895 	.probe		= max3100_probe,
896 	.remove		= max3100_remove,
897 };
898 
899 module_spi_driver(max3100_driver);
900 
901 MODULE_DESCRIPTION("MAX3100 driver");
902 MODULE_AUTHOR("Christian Pellegrin <chripell@evolware.org>");
903 MODULE_LICENSE("GPL");
904 MODULE_ALIAS("spi:max3100");
905