1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 *
4 * Copyright (C) 2008 Christian Pellegrin <chripell@evolware.org>
5 *
6 * Notes: the MAX3100 doesn't provide an interrupt on CTS so we have
7 * to use polling for flow control. TX empty IRQ is unusable, since
8 * writing conf clears FIFO buffer and we cannot have this interrupt
9 * always asking us for attention.
10 *
11 * Example platform data:
12
13 static struct plat_max3100 max3100_plat_data = {
14 .loopback = 0,
15 .crystal = 0,
16 .poll_time = 100,
17 };
18
19 static struct spi_board_info spi_board_info[] = {
20 {
21 .modalias = "max3100",
22 .platform_data = &max3100_plat_data,
23 .irq = IRQ_EINT12,
24 .max_speed_hz = 5*1000*1000,
25 .chip_select = 0,
26 },
27 };
28
29 * The initial minor number is 209 in the low-density serial port:
30 * mknod /dev/ttyMAX0 c 204 209
31 */
32
33 #define MAX3100_MAJOR 204
34 #define MAX3100_MINOR 209
35 /* 4 MAX3100s should be enough for everyone */
36 #define MAX_MAX3100 4
37
38 #include <linux/delay.h>
39 #include <linux/slab.h>
40 #include <linux/device.h>
41 #include <linux/module.h>
42 #include <linux/serial_core.h>
43 #include <linux/serial.h>
44 #include <linux/spi/spi.h>
45 #include <linux/freezer.h>
46 #include <linux/tty.h>
47 #include <linux/tty_flip.h>
48 #include <linux/types.h>
49
50 #include <asm/unaligned.h>
51
52 #include <linux/serial_max3100.h>
53
54 #define MAX3100_C (1<<14)
55 #define MAX3100_D (0<<14)
56 #define MAX3100_W (1<<15)
57 #define MAX3100_RX (0<<15)
58
59 #define MAX3100_WC (MAX3100_W | MAX3100_C)
60 #define MAX3100_RC (MAX3100_RX | MAX3100_C)
61 #define MAX3100_WD (MAX3100_W | MAX3100_D)
62 #define MAX3100_RD (MAX3100_RX | MAX3100_D)
63 #define MAX3100_CMD (3 << 14)
64
65 #define MAX3100_T (1<<14)
66 #define MAX3100_R (1<<15)
67
68 #define MAX3100_FEN (1<<13)
69 #define MAX3100_SHDN (1<<12)
70 #define MAX3100_TM (1<<11)
71 #define MAX3100_RM (1<<10)
72 #define MAX3100_PM (1<<9)
73 #define MAX3100_RAM (1<<8)
74 #define MAX3100_IR (1<<7)
75 #define MAX3100_ST (1<<6)
76 #define MAX3100_PE (1<<5)
77 #define MAX3100_L (1<<4)
78 #define MAX3100_BAUD (0xf)
79
80 #define MAX3100_TE (1<<10)
81 #define MAX3100_RAFE (1<<10)
82 #define MAX3100_RTS (1<<9)
83 #define MAX3100_CTS (1<<9)
84 #define MAX3100_PT (1<<8)
85 #define MAX3100_DATA (0xff)
86
87 #define MAX3100_RT (MAX3100_R | MAX3100_T)
88 #define MAX3100_RTC (MAX3100_RT | MAX3100_CTS | MAX3100_RAFE)
89
90 /* the following simulate a status reg for ignore_status_mask */
91 #define MAX3100_STATUS_PE 1
92 #define MAX3100_STATUS_FE 2
93 #define MAX3100_STATUS_OE 4
94
95 struct max3100_port {
96 struct uart_port port;
97 struct spi_device *spi;
98
99 int cts; /* last CTS received for flow ctrl */
100 int tx_empty; /* last TX empty bit */
101
102 spinlock_t conf_lock; /* shared data */
103 int conf_commit; /* need to make changes */
104 int conf; /* configuration for the MAX31000
105 * (bits 0-7, bits 8-11 are irqs) */
106 int rts_commit; /* need to change rts */
107 int rts; /* rts status */
108 int baud; /* current baud rate */
109
110 int parity; /* keeps track if we should send parity */
111 #define MAX3100_PARITY_ON 1
112 #define MAX3100_PARITY_ODD 2
113 #define MAX3100_7BIT 4
114 int rx_enabled; /* if we should rx chars */
115
116 int irq; /* irq assigned to the max3100 */
117
118 int minor; /* minor number */
119 int crystal; /* 1 if 3.6864Mhz crystal 0 for 1.8432 */
120 int loopback; /* 1 if we are in loopback mode */
121
122 /* for handling irqs: need workqueue since we do spi_sync */
123 struct workqueue_struct *workqueue;
124 struct work_struct work;
125 /* set to 1 to make the workhandler exit as soon as possible */
126 int force_end_work;
127 /* need to know we are suspending to avoid deadlock on workqueue */
128 int suspending;
129
130 /* hook for suspending MAX3100 via dedicated pin */
131 void (*max3100_hw_suspend) (int suspend);
132
133 /* poll time (in ms) for ctrl lines */
134 int poll_time;
135 /* and its timer */
136 struct timer_list timer;
137 };
138
139 static struct max3100_port *max3100s[MAX_MAX3100]; /* the chips */
140 static DEFINE_MUTEX(max3100s_lock); /* race on probe */
141
max3100_do_parity(struct max3100_port * s,u16 c)142 static int max3100_do_parity(struct max3100_port *s, u16 c)
143 {
144 int parity;
145
146 if (s->parity & MAX3100_PARITY_ODD)
147 parity = 1;
148 else
149 parity = 0;
150
151 if (s->parity & MAX3100_7BIT)
152 c &= 0x7f;
153 else
154 c &= 0xff;
155
156 parity = parity ^ (hweight8(c) & 1);
157 return parity;
158 }
159
max3100_check_parity(struct max3100_port * s,u16 c)160 static int max3100_check_parity(struct max3100_port *s, u16 c)
161 {
162 return max3100_do_parity(s, c) == ((c >> 8) & 1);
163 }
164
max3100_calc_parity(struct max3100_port * s,u16 * c)165 static void max3100_calc_parity(struct max3100_port *s, u16 *c)
166 {
167 if (s->parity & MAX3100_7BIT)
168 *c &= 0x7f;
169 else
170 *c &= 0xff;
171
172 if (s->parity & MAX3100_PARITY_ON)
173 *c |= max3100_do_parity(s, *c) << 8;
174 }
175
176 static void max3100_work(struct work_struct *w);
177
max3100_dowork(struct max3100_port * s)178 static void max3100_dowork(struct max3100_port *s)
179 {
180 if (!s->force_end_work && !freezing(current) && !s->suspending)
181 queue_work(s->workqueue, &s->work);
182 }
183
max3100_timeout(struct timer_list * t)184 static void max3100_timeout(struct timer_list *t)
185 {
186 struct max3100_port *s = from_timer(s, t, timer);
187
188 if (s->port.state) {
189 max3100_dowork(s);
190 mod_timer(&s->timer, jiffies + s->poll_time);
191 }
192 }
193
max3100_sr(struct max3100_port * s,u16 tx,u16 * rx)194 static int max3100_sr(struct max3100_port *s, u16 tx, u16 *rx)
195 {
196 struct spi_message message;
197 __be16 etx, erx;
198 int status;
199 struct spi_transfer tran = {
200 .tx_buf = &etx,
201 .rx_buf = &erx,
202 .len = 2,
203 };
204
205 etx = cpu_to_be16(tx);
206 spi_message_init(&message);
207 spi_message_add_tail(&tran, &message);
208 status = spi_sync(s->spi, &message);
209 if (status) {
210 dev_warn(&s->spi->dev, "error while calling spi_sync\n");
211 return -EIO;
212 }
213 *rx = be16_to_cpu(erx);
214 s->tx_empty = (*rx & MAX3100_T) > 0;
215 dev_dbg(&s->spi->dev, "%04x - %04x\n", tx, *rx);
216 return 0;
217 }
218
max3100_handlerx_unlocked(struct max3100_port * s,u16 rx)219 static int max3100_handlerx_unlocked(struct max3100_port *s, u16 rx)
220 {
221 unsigned int status = 0;
222 int ret = 0, cts;
223 u8 ch, flg;
224
225 if (rx & MAX3100_R && s->rx_enabled) {
226 dev_dbg(&s->spi->dev, "%s\n", __func__);
227 ch = rx & (s->parity & MAX3100_7BIT ? 0x7f : 0xff);
228 if (rx & MAX3100_RAFE) {
229 s->port.icount.frame++;
230 flg = TTY_FRAME;
231 status |= MAX3100_STATUS_FE;
232 } else {
233 if (s->parity & MAX3100_PARITY_ON) {
234 if (max3100_check_parity(s, rx)) {
235 s->port.icount.rx++;
236 flg = TTY_NORMAL;
237 } else {
238 s->port.icount.parity++;
239 flg = TTY_PARITY;
240 status |= MAX3100_STATUS_PE;
241 }
242 } else {
243 s->port.icount.rx++;
244 flg = TTY_NORMAL;
245 }
246 }
247 uart_insert_char(&s->port, status, MAX3100_STATUS_OE, ch, flg);
248 ret = 1;
249 }
250
251 cts = (rx & MAX3100_CTS) > 0;
252 if (s->cts != cts) {
253 s->cts = cts;
254 uart_handle_cts_change(&s->port, cts);
255 }
256
257 return ret;
258 }
259
max3100_handlerx(struct max3100_port * s,u16 rx)260 static int max3100_handlerx(struct max3100_port *s, u16 rx)
261 {
262 unsigned long flags;
263 int ret;
264
265 uart_port_lock_irqsave(&s->port, &flags);
266 ret = max3100_handlerx_unlocked(s, rx);
267 uart_port_unlock_irqrestore(&s->port, flags);
268 return ret;
269 }
270
max3100_work(struct work_struct * w)271 static void max3100_work(struct work_struct *w)
272 {
273 struct max3100_port *s = container_of(w, struct max3100_port, work);
274 int rxchars;
275 u16 tx, rx;
276 int conf, cconf, crts;
277 struct circ_buf *xmit = &s->port.state->xmit;
278
279 dev_dbg(&s->spi->dev, "%s\n", __func__);
280
281 rxchars = 0;
282 do {
283 spin_lock(&s->conf_lock);
284 conf = s->conf;
285 cconf = s->conf_commit;
286 s->conf_commit = 0;
287 crts = s->rts_commit;
288 s->rts_commit = 0;
289 spin_unlock(&s->conf_lock);
290 if (cconf)
291 max3100_sr(s, MAX3100_WC | conf, &rx);
292 if (crts) {
293 max3100_sr(s, MAX3100_WD | MAX3100_TE |
294 (s->rts ? MAX3100_RTS : 0), &rx);
295 rxchars += max3100_handlerx(s, rx);
296 }
297
298 max3100_sr(s, MAX3100_RD, &rx);
299 rxchars += max3100_handlerx(s, rx);
300
301 if (rx & MAX3100_T) {
302 tx = 0xffff;
303 if (s->port.x_char) {
304 tx = s->port.x_char;
305 s->port.icount.tx++;
306 s->port.x_char = 0;
307 } else if (!uart_circ_empty(xmit) &&
308 !uart_tx_stopped(&s->port)) {
309 tx = xmit->buf[xmit->tail];
310 uart_xmit_advance(&s->port, 1);
311 }
312 if (tx != 0xffff) {
313 max3100_calc_parity(s, &tx);
314 tx |= MAX3100_WD | (s->rts ? MAX3100_RTS : 0);
315 max3100_sr(s, tx, &rx);
316 rxchars += max3100_handlerx(s, rx);
317 }
318 }
319
320 if (rxchars > 16) {
321 tty_flip_buffer_push(&s->port.state->port);
322 rxchars = 0;
323 }
324 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
325 uart_write_wakeup(&s->port);
326
327 } while (!s->force_end_work &&
328 !freezing(current) &&
329 ((rx & MAX3100_R) ||
330 (!uart_circ_empty(xmit) &&
331 !uart_tx_stopped(&s->port))));
332
333 if (rxchars > 0)
334 tty_flip_buffer_push(&s->port.state->port);
335 }
336
max3100_irq(int irqno,void * dev_id)337 static irqreturn_t max3100_irq(int irqno, void *dev_id)
338 {
339 struct max3100_port *s = dev_id;
340
341 dev_dbg(&s->spi->dev, "%s\n", __func__);
342
343 max3100_dowork(s);
344 return IRQ_HANDLED;
345 }
346
max3100_enable_ms(struct uart_port * port)347 static void max3100_enable_ms(struct uart_port *port)
348 {
349 struct max3100_port *s = container_of(port,
350 struct max3100_port,
351 port);
352
353 if (s->poll_time > 0)
354 mod_timer(&s->timer, jiffies);
355 dev_dbg(&s->spi->dev, "%s\n", __func__);
356 }
357
max3100_start_tx(struct uart_port * port)358 static void max3100_start_tx(struct uart_port *port)
359 {
360 struct max3100_port *s = container_of(port,
361 struct max3100_port,
362 port);
363
364 dev_dbg(&s->spi->dev, "%s\n", __func__);
365
366 max3100_dowork(s);
367 }
368
max3100_stop_rx(struct uart_port * port)369 static void max3100_stop_rx(struct uart_port *port)
370 {
371 struct max3100_port *s = container_of(port,
372 struct max3100_port,
373 port);
374
375 dev_dbg(&s->spi->dev, "%s\n", __func__);
376
377 s->rx_enabled = 0;
378 spin_lock(&s->conf_lock);
379 s->conf &= ~MAX3100_RM;
380 s->conf_commit = 1;
381 spin_unlock(&s->conf_lock);
382 max3100_dowork(s);
383 }
384
max3100_tx_empty(struct uart_port * port)385 static unsigned int max3100_tx_empty(struct uart_port *port)
386 {
387 struct max3100_port *s = container_of(port,
388 struct max3100_port,
389 port);
390
391 dev_dbg(&s->spi->dev, "%s\n", __func__);
392
393 /* may not be truly up-to-date */
394 max3100_dowork(s);
395 return s->tx_empty;
396 }
397
max3100_get_mctrl(struct uart_port * port)398 static unsigned int max3100_get_mctrl(struct uart_port *port)
399 {
400 struct max3100_port *s = container_of(port,
401 struct max3100_port,
402 port);
403
404 dev_dbg(&s->spi->dev, "%s\n", __func__);
405
406 /* may not be truly up-to-date */
407 max3100_dowork(s);
408 /* always assert DCD and DSR since these lines are not wired */
409 return (s->cts ? TIOCM_CTS : 0) | TIOCM_DSR | TIOCM_CAR;
410 }
411
max3100_set_mctrl(struct uart_port * port,unsigned int mctrl)412 static void max3100_set_mctrl(struct uart_port *port, unsigned int mctrl)
413 {
414 struct max3100_port *s = container_of(port,
415 struct max3100_port,
416 port);
417 int rts;
418
419 dev_dbg(&s->spi->dev, "%s\n", __func__);
420
421 rts = (mctrl & TIOCM_RTS) > 0;
422
423 spin_lock(&s->conf_lock);
424 if (s->rts != rts) {
425 s->rts = rts;
426 s->rts_commit = 1;
427 max3100_dowork(s);
428 }
429 spin_unlock(&s->conf_lock);
430 }
431
432 static void
max3100_set_termios(struct uart_port * port,struct ktermios * termios,const struct ktermios * old)433 max3100_set_termios(struct uart_port *port, struct ktermios *termios,
434 const struct ktermios *old)
435 {
436 struct max3100_port *s = container_of(port,
437 struct max3100_port,
438 port);
439 int baud = 0;
440 unsigned cflag;
441 u32 param_new, param_mask, parity = 0;
442
443 dev_dbg(&s->spi->dev, "%s\n", __func__);
444
445 cflag = termios->c_cflag;
446 param_mask = 0;
447
448 baud = tty_termios_baud_rate(termios);
449 param_new = s->conf & MAX3100_BAUD;
450 switch (baud) {
451 case 300:
452 if (s->crystal)
453 baud = s->baud;
454 else
455 param_new = 15;
456 break;
457 case 600:
458 param_new = 14 + s->crystal;
459 break;
460 case 1200:
461 param_new = 13 + s->crystal;
462 break;
463 case 2400:
464 param_new = 12 + s->crystal;
465 break;
466 case 4800:
467 param_new = 11 + s->crystal;
468 break;
469 case 9600:
470 param_new = 10 + s->crystal;
471 break;
472 case 19200:
473 param_new = 9 + s->crystal;
474 break;
475 case 38400:
476 param_new = 8 + s->crystal;
477 break;
478 case 57600:
479 param_new = 1 + s->crystal;
480 break;
481 case 115200:
482 param_new = 0 + s->crystal;
483 break;
484 case 230400:
485 if (s->crystal)
486 param_new = 0;
487 else
488 baud = s->baud;
489 break;
490 default:
491 baud = s->baud;
492 }
493 tty_termios_encode_baud_rate(termios, baud, baud);
494 s->baud = baud;
495 param_mask |= MAX3100_BAUD;
496
497 if ((cflag & CSIZE) == CS8) {
498 param_new &= ~MAX3100_L;
499 parity &= ~MAX3100_7BIT;
500 } else {
501 param_new |= MAX3100_L;
502 parity |= MAX3100_7BIT;
503 cflag = (cflag & ~CSIZE) | CS7;
504 }
505 param_mask |= MAX3100_L;
506
507 if (cflag & CSTOPB)
508 param_new |= MAX3100_ST;
509 else
510 param_new &= ~MAX3100_ST;
511 param_mask |= MAX3100_ST;
512
513 if (cflag & PARENB) {
514 param_new |= MAX3100_PE;
515 parity |= MAX3100_PARITY_ON;
516 } else {
517 param_new &= ~MAX3100_PE;
518 parity &= ~MAX3100_PARITY_ON;
519 }
520 param_mask |= MAX3100_PE;
521
522 if (cflag & PARODD)
523 parity |= MAX3100_PARITY_ODD;
524 else
525 parity &= ~MAX3100_PARITY_ODD;
526
527 /* mask termios capabilities we don't support */
528 cflag &= ~CMSPAR;
529 termios->c_cflag = cflag;
530
531 s->port.ignore_status_mask = 0;
532 if (termios->c_iflag & IGNPAR)
533 s->port.ignore_status_mask |=
534 MAX3100_STATUS_PE | MAX3100_STATUS_FE |
535 MAX3100_STATUS_OE;
536
537 if (s->poll_time > 0)
538 del_timer_sync(&s->timer);
539
540 uart_update_timeout(port, termios->c_cflag, baud);
541
542 spin_lock(&s->conf_lock);
543 s->conf = (s->conf & ~param_mask) | (param_new & param_mask);
544 s->conf_commit = 1;
545 s->parity = parity;
546 spin_unlock(&s->conf_lock);
547 max3100_dowork(s);
548
549 if (UART_ENABLE_MS(&s->port, termios->c_cflag))
550 max3100_enable_ms(&s->port);
551 }
552
max3100_shutdown(struct uart_port * port)553 static void max3100_shutdown(struct uart_port *port)
554 {
555 struct max3100_port *s = container_of(port,
556 struct max3100_port,
557 port);
558
559 dev_dbg(&s->spi->dev, "%s\n", __func__);
560
561 if (s->suspending)
562 return;
563
564 s->force_end_work = 1;
565
566 if (s->poll_time > 0)
567 del_timer_sync(&s->timer);
568
569 if (s->workqueue) {
570 destroy_workqueue(s->workqueue);
571 s->workqueue = NULL;
572 }
573 if (s->irq)
574 free_irq(s->irq, s);
575
576 /* set shutdown mode to save power */
577 if (s->max3100_hw_suspend)
578 s->max3100_hw_suspend(1);
579 else {
580 u16 tx, rx;
581
582 tx = MAX3100_WC | MAX3100_SHDN;
583 max3100_sr(s, tx, &rx);
584 }
585 }
586
max3100_startup(struct uart_port * port)587 static int max3100_startup(struct uart_port *port)
588 {
589 struct max3100_port *s = container_of(port,
590 struct max3100_port,
591 port);
592 char b[12];
593
594 dev_dbg(&s->spi->dev, "%s\n", __func__);
595
596 s->conf = MAX3100_RM;
597 s->baud = s->crystal ? 230400 : 115200;
598 s->rx_enabled = 1;
599
600 if (s->suspending)
601 return 0;
602
603 s->force_end_work = 0;
604 s->parity = 0;
605 s->rts = 0;
606
607 sprintf(b, "max3100-%d", s->minor);
608 s->workqueue = create_freezable_workqueue(b);
609 if (!s->workqueue) {
610 dev_warn(&s->spi->dev, "cannot create workqueue\n");
611 return -EBUSY;
612 }
613 INIT_WORK(&s->work, max3100_work);
614
615 if (request_irq(s->irq, max3100_irq,
616 IRQF_TRIGGER_FALLING, "max3100", s) < 0) {
617 dev_warn(&s->spi->dev, "cannot allocate irq %d\n", s->irq);
618 s->irq = 0;
619 destroy_workqueue(s->workqueue);
620 s->workqueue = NULL;
621 return -EBUSY;
622 }
623
624 if (s->loopback) {
625 u16 tx, rx;
626 tx = 0x4001;
627 max3100_sr(s, tx, &rx);
628 }
629
630 if (s->max3100_hw_suspend)
631 s->max3100_hw_suspend(0);
632 s->conf_commit = 1;
633 max3100_dowork(s);
634 /* wait for clock to settle */
635 msleep(50);
636
637 max3100_enable_ms(&s->port);
638
639 return 0;
640 }
641
max3100_type(struct uart_port * port)642 static const char *max3100_type(struct uart_port *port)
643 {
644 struct max3100_port *s = container_of(port,
645 struct max3100_port,
646 port);
647
648 dev_dbg(&s->spi->dev, "%s\n", __func__);
649
650 return s->port.type == PORT_MAX3100 ? "MAX3100" : NULL;
651 }
652
max3100_release_port(struct uart_port * port)653 static void max3100_release_port(struct uart_port *port)
654 {
655 struct max3100_port *s = container_of(port,
656 struct max3100_port,
657 port);
658
659 dev_dbg(&s->spi->dev, "%s\n", __func__);
660 }
661
max3100_config_port(struct uart_port * port,int flags)662 static void max3100_config_port(struct uart_port *port, int flags)
663 {
664 struct max3100_port *s = container_of(port,
665 struct max3100_port,
666 port);
667
668 dev_dbg(&s->spi->dev, "%s\n", __func__);
669
670 if (flags & UART_CONFIG_TYPE)
671 s->port.type = PORT_MAX3100;
672 }
673
max3100_verify_port(struct uart_port * port,struct serial_struct * ser)674 static int max3100_verify_port(struct uart_port *port,
675 struct serial_struct *ser)
676 {
677 struct max3100_port *s = container_of(port,
678 struct max3100_port,
679 port);
680 int ret = -EINVAL;
681
682 dev_dbg(&s->spi->dev, "%s\n", __func__);
683
684 if (ser->type == PORT_UNKNOWN || ser->type == PORT_MAX3100)
685 ret = 0;
686 return ret;
687 }
688
max3100_stop_tx(struct uart_port * port)689 static void max3100_stop_tx(struct uart_port *port)
690 {
691 struct max3100_port *s = container_of(port,
692 struct max3100_port,
693 port);
694
695 dev_dbg(&s->spi->dev, "%s\n", __func__);
696 }
697
max3100_request_port(struct uart_port * port)698 static int max3100_request_port(struct uart_port *port)
699 {
700 struct max3100_port *s = container_of(port,
701 struct max3100_port,
702 port);
703
704 dev_dbg(&s->spi->dev, "%s\n", __func__);
705 return 0;
706 }
707
max3100_break_ctl(struct uart_port * port,int break_state)708 static void max3100_break_ctl(struct uart_port *port, int break_state)
709 {
710 struct max3100_port *s = container_of(port,
711 struct max3100_port,
712 port);
713
714 dev_dbg(&s->spi->dev, "%s\n", __func__);
715 }
716
717 static const struct uart_ops max3100_ops = {
718 .tx_empty = max3100_tx_empty,
719 .set_mctrl = max3100_set_mctrl,
720 .get_mctrl = max3100_get_mctrl,
721 .stop_tx = max3100_stop_tx,
722 .start_tx = max3100_start_tx,
723 .stop_rx = max3100_stop_rx,
724 .enable_ms = max3100_enable_ms,
725 .break_ctl = max3100_break_ctl,
726 .startup = max3100_startup,
727 .shutdown = max3100_shutdown,
728 .set_termios = max3100_set_termios,
729 .type = max3100_type,
730 .release_port = max3100_release_port,
731 .request_port = max3100_request_port,
732 .config_port = max3100_config_port,
733 .verify_port = max3100_verify_port,
734 };
735
736 static struct uart_driver max3100_uart_driver = {
737 .owner = THIS_MODULE,
738 .driver_name = "ttyMAX",
739 .dev_name = "ttyMAX",
740 .major = MAX3100_MAJOR,
741 .minor = MAX3100_MINOR,
742 .nr = MAX_MAX3100,
743 };
744 static int uart_driver_registered;
745
max3100_probe(struct spi_device * spi)746 static int max3100_probe(struct spi_device *spi)
747 {
748 int i, retval;
749 struct plat_max3100 *pdata;
750 u16 tx, rx;
751
752 mutex_lock(&max3100s_lock);
753
754 if (!uart_driver_registered) {
755 retval = uart_register_driver(&max3100_uart_driver);
756 if (retval) {
757 printk(KERN_ERR "Couldn't register max3100 uart driver\n");
758 mutex_unlock(&max3100s_lock);
759 return retval;
760 }
761
762 uart_driver_registered = 1;
763 }
764
765 for (i = 0; i < MAX_MAX3100; i++)
766 if (!max3100s[i])
767 break;
768 if (i == MAX_MAX3100) {
769 dev_warn(&spi->dev, "too many MAX3100 chips\n");
770 mutex_unlock(&max3100s_lock);
771 return -ENOMEM;
772 }
773
774 max3100s[i] = kzalloc(sizeof(struct max3100_port), GFP_KERNEL);
775 if (!max3100s[i]) {
776 dev_warn(&spi->dev,
777 "kmalloc for max3100 structure %d failed!\n", i);
778 mutex_unlock(&max3100s_lock);
779 return -ENOMEM;
780 }
781 max3100s[i]->spi = spi;
782 max3100s[i]->irq = spi->irq;
783 spin_lock_init(&max3100s[i]->conf_lock);
784 spi_set_drvdata(spi, max3100s[i]);
785 pdata = dev_get_platdata(&spi->dev);
786 max3100s[i]->crystal = pdata->crystal;
787 max3100s[i]->loopback = pdata->loopback;
788 max3100s[i]->poll_time = msecs_to_jiffies(pdata->poll_time);
789 if (pdata->poll_time > 0 && max3100s[i]->poll_time == 0)
790 max3100s[i]->poll_time = 1;
791 max3100s[i]->max3100_hw_suspend = pdata->max3100_hw_suspend;
792 max3100s[i]->minor = i;
793 timer_setup(&max3100s[i]->timer, max3100_timeout, 0);
794
795 dev_dbg(&spi->dev, "%s: adding port %d\n", __func__, i);
796 max3100s[i]->port.irq = max3100s[i]->irq;
797 max3100s[i]->port.uartclk = max3100s[i]->crystal ? 3686400 : 1843200;
798 max3100s[i]->port.fifosize = 16;
799 max3100s[i]->port.ops = &max3100_ops;
800 max3100s[i]->port.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF;
801 max3100s[i]->port.line = i;
802 max3100s[i]->port.type = PORT_MAX3100;
803 max3100s[i]->port.dev = &spi->dev;
804 retval = uart_add_one_port(&max3100_uart_driver, &max3100s[i]->port);
805 if (retval < 0)
806 dev_warn(&spi->dev,
807 "uart_add_one_port failed for line %d with error %d\n",
808 i, retval);
809
810 /* set shutdown mode to save power. Will be woken-up on open */
811 if (max3100s[i]->max3100_hw_suspend)
812 max3100s[i]->max3100_hw_suspend(1);
813 else {
814 tx = MAX3100_WC | MAX3100_SHDN;
815 max3100_sr(max3100s[i], tx, &rx);
816 }
817 mutex_unlock(&max3100s_lock);
818 return 0;
819 }
820
max3100_remove(struct spi_device * spi)821 static void max3100_remove(struct spi_device *spi)
822 {
823 struct max3100_port *s = spi_get_drvdata(spi);
824 int i;
825
826 mutex_lock(&max3100s_lock);
827
828 /* find out the index for the chip we are removing */
829 for (i = 0; i < MAX_MAX3100; i++)
830 if (max3100s[i] == s) {
831 dev_dbg(&spi->dev, "%s: removing port %d\n", __func__, i);
832 uart_remove_one_port(&max3100_uart_driver, &max3100s[i]->port);
833 kfree(max3100s[i]);
834 max3100s[i] = NULL;
835 break;
836 }
837
838 WARN_ON(i == MAX_MAX3100);
839
840 /* check if this is the last chip we have */
841 for (i = 0; i < MAX_MAX3100; i++)
842 if (max3100s[i]) {
843 mutex_unlock(&max3100s_lock);
844 return;
845 }
846 pr_debug("removing max3100 driver\n");
847 uart_unregister_driver(&max3100_uart_driver);
848 uart_driver_registered = 0;
849
850 mutex_unlock(&max3100s_lock);
851 }
852
853 #ifdef CONFIG_PM_SLEEP
854
max3100_suspend(struct device * dev)855 static int max3100_suspend(struct device *dev)
856 {
857 struct max3100_port *s = dev_get_drvdata(dev);
858
859 dev_dbg(&s->spi->dev, "%s\n", __func__);
860
861 disable_irq(s->irq);
862
863 s->suspending = 1;
864 uart_suspend_port(&max3100_uart_driver, &s->port);
865
866 if (s->max3100_hw_suspend)
867 s->max3100_hw_suspend(1);
868 else {
869 /* no HW suspend, so do SW one */
870 u16 tx, rx;
871
872 tx = MAX3100_WC | MAX3100_SHDN;
873 max3100_sr(s, tx, &rx);
874 }
875 return 0;
876 }
877
max3100_resume(struct device * dev)878 static int max3100_resume(struct device *dev)
879 {
880 struct max3100_port *s = dev_get_drvdata(dev);
881
882 dev_dbg(&s->spi->dev, "%s\n", __func__);
883
884 if (s->max3100_hw_suspend)
885 s->max3100_hw_suspend(0);
886 uart_resume_port(&max3100_uart_driver, &s->port);
887 s->suspending = 0;
888
889 enable_irq(s->irq);
890
891 s->conf_commit = 1;
892 if (s->workqueue)
893 max3100_dowork(s);
894
895 return 0;
896 }
897
898 static SIMPLE_DEV_PM_OPS(max3100_pm_ops, max3100_suspend, max3100_resume);
899 #define MAX3100_PM_OPS (&max3100_pm_ops)
900
901 #else
902 #define MAX3100_PM_OPS NULL
903 #endif
904
905 static struct spi_driver max3100_driver = {
906 .driver = {
907 .name = "max3100",
908 .pm = MAX3100_PM_OPS,
909 },
910 .probe = max3100_probe,
911 .remove = max3100_remove,
912 };
913
914 module_spi_driver(max3100_driver);
915
916 MODULE_DESCRIPTION("MAX3100 driver");
917 MODULE_AUTHOR("Christian Pellegrin <chripell@evolware.org>");
918 MODULE_LICENSE("GPL");
919 MODULE_ALIAS("spi:max3100");
920