1ab4382d2SGreg Kroah-Hartman /* 2ab4382d2SGreg Kroah-Hartman * Driver for Motorola IMX serial ports 3ab4382d2SGreg Kroah-Hartman * 4ab4382d2SGreg Kroah-Hartman * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o. 5ab4382d2SGreg Kroah-Hartman * 6ab4382d2SGreg Kroah-Hartman * Author: Sascha Hauer <sascha@saschahauer.de> 7ab4382d2SGreg Kroah-Hartman * Copyright (C) 2004 Pengutronix 8ab4382d2SGreg Kroah-Hartman * 9ab4382d2SGreg Kroah-Hartman * Copyright (C) 2009 emlix GmbH 10ab4382d2SGreg Kroah-Hartman * Author: Fabian Godehardt (added IrDA support for iMX) 11ab4382d2SGreg Kroah-Hartman * 12ab4382d2SGreg Kroah-Hartman * This program is free software; you can redistribute it and/or modify 13ab4382d2SGreg Kroah-Hartman * it under the terms of the GNU General Public License as published by 14ab4382d2SGreg Kroah-Hartman * the Free Software Foundation; either version 2 of the License, or 15ab4382d2SGreg Kroah-Hartman * (at your option) any later version. 16ab4382d2SGreg Kroah-Hartman * 17ab4382d2SGreg Kroah-Hartman * This program is distributed in the hope that it will be useful, 18ab4382d2SGreg Kroah-Hartman * but WITHOUT ANY WARRANTY; without even the implied warranty of 19ab4382d2SGreg Kroah-Hartman * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20ab4382d2SGreg Kroah-Hartman * GNU General Public License for more details. 21ab4382d2SGreg Kroah-Hartman * 22ab4382d2SGreg Kroah-Hartman * You should have received a copy of the GNU General Public License 23ab4382d2SGreg Kroah-Hartman * along with this program; if not, write to the Free Software 24ab4382d2SGreg Kroah-Hartman * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 25ab4382d2SGreg Kroah-Hartman * 26ab4382d2SGreg Kroah-Hartman * [29-Mar-2005] Mike Lee 27ab4382d2SGreg Kroah-Hartman * Added hardware handshake 28ab4382d2SGreg Kroah-Hartman */ 29ab4382d2SGreg Kroah-Hartman 30ab4382d2SGreg Kroah-Hartman #if defined(CONFIG_SERIAL_IMX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) 31ab4382d2SGreg Kroah-Hartman #define SUPPORT_SYSRQ 32ab4382d2SGreg Kroah-Hartman #endif 33ab4382d2SGreg Kroah-Hartman 34ab4382d2SGreg Kroah-Hartman #include <linux/module.h> 35ab4382d2SGreg Kroah-Hartman #include <linux/ioport.h> 36ab4382d2SGreg Kroah-Hartman #include <linux/init.h> 37ab4382d2SGreg Kroah-Hartman #include <linux/console.h> 38ab4382d2SGreg Kroah-Hartman #include <linux/sysrq.h> 39ab4382d2SGreg Kroah-Hartman #include <linux/platform_device.h> 40ab4382d2SGreg Kroah-Hartman #include <linux/tty.h> 41ab4382d2SGreg Kroah-Hartman #include <linux/tty_flip.h> 42ab4382d2SGreg Kroah-Hartman #include <linux/serial_core.h> 43ab4382d2SGreg Kroah-Hartman #include <linux/serial.h> 44ab4382d2SGreg Kroah-Hartman #include <linux/clk.h> 45ab4382d2SGreg Kroah-Hartman #include <linux/delay.h> 46ab4382d2SGreg Kroah-Hartman #include <linux/rational.h> 47ab4382d2SGreg Kroah-Hartman #include <linux/slab.h> 4822698aa2SShawn Guo #include <linux/of.h> 4922698aa2SShawn Guo #include <linux/of_device.h> 50ab4382d2SGreg Kroah-Hartman 51ab4382d2SGreg Kroah-Hartman #include <asm/io.h> 52ab4382d2SGreg Kroah-Hartman #include <asm/irq.h> 53ab4382d2SGreg Kroah-Hartman #include <mach/imx-uart.h> 54ab4382d2SGreg Kroah-Hartman 55ab4382d2SGreg Kroah-Hartman /* Register definitions */ 56ab4382d2SGreg Kroah-Hartman #define URXD0 0x0 /* Receiver Register */ 57ab4382d2SGreg Kroah-Hartman #define URTX0 0x40 /* Transmitter Register */ 58ab4382d2SGreg Kroah-Hartman #define UCR1 0x80 /* Control Register 1 */ 59ab4382d2SGreg Kroah-Hartman #define UCR2 0x84 /* Control Register 2 */ 60ab4382d2SGreg Kroah-Hartman #define UCR3 0x88 /* Control Register 3 */ 61ab4382d2SGreg Kroah-Hartman #define UCR4 0x8c /* Control Register 4 */ 62ab4382d2SGreg Kroah-Hartman #define UFCR 0x90 /* FIFO Control Register */ 63ab4382d2SGreg Kroah-Hartman #define USR1 0x94 /* Status Register 1 */ 64ab4382d2SGreg Kroah-Hartman #define USR2 0x98 /* Status Register 2 */ 65ab4382d2SGreg Kroah-Hartman #define UESC 0x9c /* Escape Character Register */ 66ab4382d2SGreg Kroah-Hartman #define UTIM 0xa0 /* Escape Timer Register */ 67ab4382d2SGreg Kroah-Hartman #define UBIR 0xa4 /* BRM Incremental Register */ 68ab4382d2SGreg Kroah-Hartman #define UBMR 0xa8 /* BRM Modulator Register */ 69ab4382d2SGreg Kroah-Hartman #define UBRC 0xac /* Baud Rate Count Register */ 70fe6b540aSShawn Guo #define IMX21_ONEMS 0xb0 /* One Millisecond register */ 71fe6b540aSShawn Guo #define IMX1_UTS 0xd0 /* UART Test Register on i.mx1 */ 72fe6b540aSShawn Guo #define IMX21_UTS 0xb4 /* UART Test Register on all other i.mx*/ 73ab4382d2SGreg Kroah-Hartman 74ab4382d2SGreg Kroah-Hartman /* UART Control Register Bit Fields.*/ 75ab4382d2SGreg Kroah-Hartman #define URXD_CHARRDY (1<<15) 76ab4382d2SGreg Kroah-Hartman #define URXD_ERR (1<<14) 77ab4382d2SGreg Kroah-Hartman #define URXD_OVRRUN (1<<13) 78ab4382d2SGreg Kroah-Hartman #define URXD_FRMERR (1<<12) 79ab4382d2SGreg Kroah-Hartman #define URXD_BRK (1<<11) 80ab4382d2SGreg Kroah-Hartman #define URXD_PRERR (1<<10) 8125985edcSLucas De Marchi #define UCR1_ADEN (1<<15) /* Auto detect interrupt */ 82ab4382d2SGreg Kroah-Hartman #define UCR1_ADBR (1<<14) /* Auto detect baud rate */ 83ab4382d2SGreg Kroah-Hartman #define UCR1_TRDYEN (1<<13) /* Transmitter ready interrupt enable */ 84ab4382d2SGreg Kroah-Hartman #define UCR1_IDEN (1<<12) /* Idle condition interrupt */ 85ab4382d2SGreg Kroah-Hartman #define UCR1_RRDYEN (1<<9) /* Recv ready interrupt enable */ 86ab4382d2SGreg Kroah-Hartman #define UCR1_RDMAEN (1<<8) /* Recv ready DMA enable */ 87ab4382d2SGreg Kroah-Hartman #define UCR1_IREN (1<<7) /* Infrared interface enable */ 88ab4382d2SGreg Kroah-Hartman #define UCR1_TXMPTYEN (1<<6) /* Transimitter empty interrupt enable */ 89ab4382d2SGreg Kroah-Hartman #define UCR1_RTSDEN (1<<5) /* RTS delta interrupt enable */ 90ab4382d2SGreg Kroah-Hartman #define UCR1_SNDBRK (1<<4) /* Send break */ 91ab4382d2SGreg Kroah-Hartman #define UCR1_TDMAEN (1<<3) /* Transmitter ready DMA enable */ 92fe6b540aSShawn Guo #define IMX1_UCR1_UARTCLKEN (1<<2) /* UART clock enabled, i.mx1 only */ 93ab4382d2SGreg Kroah-Hartman #define UCR1_DOZE (1<<1) /* Doze */ 94ab4382d2SGreg Kroah-Hartman #define UCR1_UARTEN (1<<0) /* UART enabled */ 95ab4382d2SGreg Kroah-Hartman #define UCR2_ESCI (1<<15) /* Escape seq interrupt enable */ 96ab4382d2SGreg Kroah-Hartman #define UCR2_IRTS (1<<14) /* Ignore RTS pin */ 97ab4382d2SGreg Kroah-Hartman #define UCR2_CTSC (1<<13) /* CTS pin control */ 98ab4382d2SGreg Kroah-Hartman #define UCR2_CTS (1<<12) /* Clear to send */ 99ab4382d2SGreg Kroah-Hartman #define UCR2_ESCEN (1<<11) /* Escape enable */ 100ab4382d2SGreg Kroah-Hartman #define UCR2_PREN (1<<8) /* Parity enable */ 101ab4382d2SGreg Kroah-Hartman #define UCR2_PROE (1<<7) /* Parity odd/even */ 102ab4382d2SGreg Kroah-Hartman #define UCR2_STPB (1<<6) /* Stop */ 103ab4382d2SGreg Kroah-Hartman #define UCR2_WS (1<<5) /* Word size */ 104ab4382d2SGreg Kroah-Hartman #define UCR2_RTSEN (1<<4) /* Request to send interrupt enable */ 105ab4382d2SGreg Kroah-Hartman #define UCR2_TXEN (1<<2) /* Transmitter enabled */ 106ab4382d2SGreg Kroah-Hartman #define UCR2_RXEN (1<<1) /* Receiver enabled */ 107ab4382d2SGreg Kroah-Hartman #define UCR2_SRST (1<<0) /* SW reset */ 108ab4382d2SGreg Kroah-Hartman #define UCR3_DTREN (1<<13) /* DTR interrupt enable */ 109ab4382d2SGreg Kroah-Hartman #define UCR3_PARERREN (1<<12) /* Parity enable */ 110ab4382d2SGreg Kroah-Hartman #define UCR3_FRAERREN (1<<11) /* Frame error interrupt enable */ 111ab4382d2SGreg Kroah-Hartman #define UCR3_DSR (1<<10) /* Data set ready */ 112ab4382d2SGreg Kroah-Hartman #define UCR3_DCD (1<<9) /* Data carrier detect */ 113ab4382d2SGreg Kroah-Hartman #define UCR3_RI (1<<8) /* Ring indicator */ 114ab4382d2SGreg Kroah-Hartman #define UCR3_TIMEOUTEN (1<<7) /* Timeout interrupt enable */ 115ab4382d2SGreg Kroah-Hartman #define UCR3_RXDSEN (1<<6) /* Receive status interrupt enable */ 116ab4382d2SGreg Kroah-Hartman #define UCR3_AIRINTEN (1<<5) /* Async IR wake interrupt enable */ 117ab4382d2SGreg Kroah-Hartman #define UCR3_AWAKEN (1<<4) /* Async wake interrupt enable */ 118fe6b540aSShawn Guo #define IMX21_UCR3_RXDMUXSEL (1<<2) /* RXD Muxed Input Select */ 119ab4382d2SGreg Kroah-Hartman #define UCR3_INVT (1<<1) /* Inverted Infrared transmission */ 120ab4382d2SGreg Kroah-Hartman #define UCR3_BPEN (1<<0) /* Preset registers enable */ 121ab4382d2SGreg Kroah-Hartman #define UCR4_CTSTL_SHF 10 /* CTS trigger level shift */ 122ab4382d2SGreg Kroah-Hartman #define UCR4_CTSTL_MASK 0x3F /* CTS trigger is 6 bits wide */ 123ab4382d2SGreg Kroah-Hartman #define UCR4_INVR (1<<9) /* Inverted infrared reception */ 124ab4382d2SGreg Kroah-Hartman #define UCR4_ENIRI (1<<8) /* Serial infrared interrupt enable */ 125ab4382d2SGreg Kroah-Hartman #define UCR4_WKEN (1<<7) /* Wake interrupt enable */ 126ab4382d2SGreg Kroah-Hartman #define UCR4_REF16 (1<<6) /* Ref freq 16 MHz */ 127ab4382d2SGreg Kroah-Hartman #define UCR4_IRSC (1<<5) /* IR special case */ 128ab4382d2SGreg Kroah-Hartman #define UCR4_TCEN (1<<3) /* Transmit complete interrupt enable */ 129ab4382d2SGreg Kroah-Hartman #define UCR4_BKEN (1<<2) /* Break condition interrupt enable */ 130ab4382d2SGreg Kroah-Hartman #define UCR4_OREN (1<<1) /* Receiver overrun interrupt enable */ 131ab4382d2SGreg Kroah-Hartman #define UCR4_DREN (1<<0) /* Recv data ready interrupt enable */ 132ab4382d2SGreg Kroah-Hartman #define UFCR_RXTL_SHF 0 /* Receiver trigger level shift */ 133ab4382d2SGreg Kroah-Hartman #define UFCR_RFDIV (7<<7) /* Reference freq divider mask */ 134ab4382d2SGreg Kroah-Hartman #define UFCR_RFDIV_REG(x) (((x) < 7 ? 6 - (x) : 6) << 7) 135ab4382d2SGreg Kroah-Hartman #define UFCR_TXTL_SHF 10 /* Transmitter trigger level shift */ 136ab4382d2SGreg Kroah-Hartman #define USR1_PARITYERR (1<<15) /* Parity error interrupt flag */ 137ab4382d2SGreg Kroah-Hartman #define USR1_RTSS (1<<14) /* RTS pin status */ 138ab4382d2SGreg Kroah-Hartman #define USR1_TRDY (1<<13) /* Transmitter ready interrupt/dma flag */ 139ab4382d2SGreg Kroah-Hartman #define USR1_RTSD (1<<12) /* RTS delta */ 140ab4382d2SGreg Kroah-Hartman #define USR1_ESCF (1<<11) /* Escape seq interrupt flag */ 141ab4382d2SGreg Kroah-Hartman #define USR1_FRAMERR (1<<10) /* Frame error interrupt flag */ 142ab4382d2SGreg Kroah-Hartman #define USR1_RRDY (1<<9) /* Receiver ready interrupt/dma flag */ 143ab4382d2SGreg Kroah-Hartman #define USR1_TIMEOUT (1<<7) /* Receive timeout interrupt status */ 144ab4382d2SGreg Kroah-Hartman #define USR1_RXDS (1<<6) /* Receiver idle interrupt flag */ 145ab4382d2SGreg Kroah-Hartman #define USR1_AIRINT (1<<5) /* Async IR wake interrupt flag */ 146ab4382d2SGreg Kroah-Hartman #define USR1_AWAKE (1<<4) /* Aysnc wake interrupt flag */ 147ab4382d2SGreg Kroah-Hartman #define USR2_ADET (1<<15) /* Auto baud rate detect complete */ 148ab4382d2SGreg Kroah-Hartman #define USR2_TXFE (1<<14) /* Transmit buffer FIFO empty */ 149ab4382d2SGreg Kroah-Hartman #define USR2_DTRF (1<<13) /* DTR edge interrupt flag */ 150ab4382d2SGreg Kroah-Hartman #define USR2_IDLE (1<<12) /* Idle condition */ 151ab4382d2SGreg Kroah-Hartman #define USR2_IRINT (1<<8) /* Serial infrared interrupt flag */ 152ab4382d2SGreg Kroah-Hartman #define USR2_WAKE (1<<7) /* Wake */ 153ab4382d2SGreg Kroah-Hartman #define USR2_RTSF (1<<4) /* RTS edge interrupt flag */ 154ab4382d2SGreg Kroah-Hartman #define USR2_TXDC (1<<3) /* Transmitter complete */ 155ab4382d2SGreg Kroah-Hartman #define USR2_BRCD (1<<2) /* Break condition */ 156ab4382d2SGreg Kroah-Hartman #define USR2_ORE (1<<1) /* Overrun error */ 157ab4382d2SGreg Kroah-Hartman #define USR2_RDR (1<<0) /* Recv data ready */ 158ab4382d2SGreg Kroah-Hartman #define UTS_FRCPERR (1<<13) /* Force parity error */ 159ab4382d2SGreg Kroah-Hartman #define UTS_LOOP (1<<12) /* Loop tx and rx */ 160ab4382d2SGreg Kroah-Hartman #define UTS_TXEMPTY (1<<6) /* TxFIFO empty */ 161ab4382d2SGreg Kroah-Hartman #define UTS_RXEMPTY (1<<5) /* RxFIFO empty */ 162ab4382d2SGreg Kroah-Hartman #define UTS_TXFULL (1<<4) /* TxFIFO full */ 163ab4382d2SGreg Kroah-Hartman #define UTS_RXFULL (1<<3) /* RxFIFO full */ 164ab4382d2SGreg Kroah-Hartman #define UTS_SOFTRST (1<<0) /* Software reset */ 165ab4382d2SGreg Kroah-Hartman 166ab4382d2SGreg Kroah-Hartman /* We've been assigned a range on the "Low-density serial ports" major */ 167ab4382d2SGreg Kroah-Hartman #define SERIAL_IMX_MAJOR 207 168ab4382d2SGreg Kroah-Hartman #define MINOR_START 16 169ab4382d2SGreg Kroah-Hartman #define DEV_NAME "ttymxc" 170ab4382d2SGreg Kroah-Hartman #define MAX_INTERNAL_IRQ MXC_INTERNAL_IRQS 171ab4382d2SGreg Kroah-Hartman 172ab4382d2SGreg Kroah-Hartman /* 173ab4382d2SGreg Kroah-Hartman * This determines how often we check the modem status signals 174ab4382d2SGreg Kroah-Hartman * for any change. They generally aren't connected to an IRQ 175ab4382d2SGreg Kroah-Hartman * so we have to poll them. We also check immediately before 176ab4382d2SGreg Kroah-Hartman * filling the TX fifo incase CTS has been dropped. 177ab4382d2SGreg Kroah-Hartman */ 178ab4382d2SGreg Kroah-Hartman #define MCTRL_TIMEOUT (250*HZ/1000) 179ab4382d2SGreg Kroah-Hartman 180ab4382d2SGreg Kroah-Hartman #define DRIVER_NAME "IMX-uart" 181ab4382d2SGreg Kroah-Hartman 182ab4382d2SGreg Kroah-Hartman #define UART_NR 8 183ab4382d2SGreg Kroah-Hartman 184fe6b540aSShawn Guo /* i.mx21 type uart runs on all i.mx except i.mx1 */ 185fe6b540aSShawn Guo enum imx_uart_type { 186fe6b540aSShawn Guo IMX1_UART, 187fe6b540aSShawn Guo IMX21_UART, 188fe6b540aSShawn Guo }; 189fe6b540aSShawn Guo 190fe6b540aSShawn Guo /* device type dependent stuff */ 191fe6b540aSShawn Guo struct imx_uart_data { 192fe6b540aSShawn Guo unsigned uts_reg; 193fe6b540aSShawn Guo enum imx_uart_type devtype; 194fe6b540aSShawn Guo }; 195fe6b540aSShawn Guo 196ab4382d2SGreg Kroah-Hartman struct imx_port { 197ab4382d2SGreg Kroah-Hartman struct uart_port port; 198ab4382d2SGreg Kroah-Hartman struct timer_list timer; 199ab4382d2SGreg Kroah-Hartman unsigned int old_status; 200ab4382d2SGreg Kroah-Hartman int txirq,rxirq,rtsirq; 201ab4382d2SGreg Kroah-Hartman unsigned int have_rtscts:1; 202ab4382d2SGreg Kroah-Hartman unsigned int use_irda:1; 203ab4382d2SGreg Kroah-Hartman unsigned int irda_inv_rx:1; 204ab4382d2SGreg Kroah-Hartman unsigned int irda_inv_tx:1; 205ab4382d2SGreg Kroah-Hartman unsigned short trcv_delay; /* transceiver delay */ 206ab4382d2SGreg Kroah-Hartman struct clk *clk; 207fe6b540aSShawn Guo struct imx_uart_data *devdata; 208ab4382d2SGreg Kroah-Hartman }; 209ab4382d2SGreg Kroah-Hartman 210ab4382d2SGreg Kroah-Hartman #ifdef CONFIG_IRDA 211ab4382d2SGreg Kroah-Hartman #define USE_IRDA(sport) ((sport)->use_irda) 212ab4382d2SGreg Kroah-Hartman #else 213ab4382d2SGreg Kroah-Hartman #define USE_IRDA(sport) (0) 214ab4382d2SGreg Kroah-Hartman #endif 215ab4382d2SGreg Kroah-Hartman 216fe6b540aSShawn Guo static struct imx_uart_data imx_uart_devdata[] = { 217fe6b540aSShawn Guo [IMX1_UART] = { 218fe6b540aSShawn Guo .uts_reg = IMX1_UTS, 219fe6b540aSShawn Guo .devtype = IMX1_UART, 220fe6b540aSShawn Guo }, 221fe6b540aSShawn Guo [IMX21_UART] = { 222fe6b540aSShawn Guo .uts_reg = IMX21_UTS, 223fe6b540aSShawn Guo .devtype = IMX21_UART, 224fe6b540aSShawn Guo }, 225fe6b540aSShawn Guo }; 226fe6b540aSShawn Guo 227fe6b540aSShawn Guo static struct platform_device_id imx_uart_devtype[] = { 228fe6b540aSShawn Guo { 229fe6b540aSShawn Guo .name = "imx1-uart", 230fe6b540aSShawn Guo .driver_data = (kernel_ulong_t) &imx_uart_devdata[IMX1_UART], 231fe6b540aSShawn Guo }, { 232fe6b540aSShawn Guo .name = "imx21-uart", 233fe6b540aSShawn Guo .driver_data = (kernel_ulong_t) &imx_uart_devdata[IMX21_UART], 234fe6b540aSShawn Guo }, { 235fe6b540aSShawn Guo /* sentinel */ 236fe6b540aSShawn Guo } 237fe6b540aSShawn Guo }; 238fe6b540aSShawn Guo MODULE_DEVICE_TABLE(platform, imx_uart_devtype); 239fe6b540aSShawn Guo 24022698aa2SShawn Guo static struct of_device_id imx_uart_dt_ids[] = { 24122698aa2SShawn Guo { .compatible = "fsl,imx1-uart", .data = &imx_uart_devdata[IMX1_UART], }, 24222698aa2SShawn Guo { .compatible = "fsl,imx21-uart", .data = &imx_uart_devdata[IMX21_UART], }, 24322698aa2SShawn Guo { /* sentinel */ } 24422698aa2SShawn Guo }; 24522698aa2SShawn Guo MODULE_DEVICE_TABLE(of, imx_uart_dt_ids); 24622698aa2SShawn Guo 247fe6b540aSShawn Guo static inline unsigned uts_reg(struct imx_port *sport) 248fe6b540aSShawn Guo { 249fe6b540aSShawn Guo return sport->devdata->uts_reg; 250fe6b540aSShawn Guo } 251fe6b540aSShawn Guo 252fe6b540aSShawn Guo static inline int is_imx1_uart(struct imx_port *sport) 253fe6b540aSShawn Guo { 254fe6b540aSShawn Guo return sport->devdata->devtype == IMX1_UART; 255fe6b540aSShawn Guo } 256fe6b540aSShawn Guo 257fe6b540aSShawn Guo static inline int is_imx21_uart(struct imx_port *sport) 258fe6b540aSShawn Guo { 259fe6b540aSShawn Guo return sport->devdata->devtype == IMX21_UART; 260fe6b540aSShawn Guo } 261fe6b540aSShawn Guo 262ab4382d2SGreg Kroah-Hartman /* 263ab4382d2SGreg Kroah-Hartman * Handle any change of modem status signal since we were last called. 264ab4382d2SGreg Kroah-Hartman */ 265ab4382d2SGreg Kroah-Hartman static void imx_mctrl_check(struct imx_port *sport) 266ab4382d2SGreg Kroah-Hartman { 267ab4382d2SGreg Kroah-Hartman unsigned int status, changed; 268ab4382d2SGreg Kroah-Hartman 269ab4382d2SGreg Kroah-Hartman status = sport->port.ops->get_mctrl(&sport->port); 270ab4382d2SGreg Kroah-Hartman changed = status ^ sport->old_status; 271ab4382d2SGreg Kroah-Hartman 272ab4382d2SGreg Kroah-Hartman if (changed == 0) 273ab4382d2SGreg Kroah-Hartman return; 274ab4382d2SGreg Kroah-Hartman 275ab4382d2SGreg Kroah-Hartman sport->old_status = status; 276ab4382d2SGreg Kroah-Hartman 277ab4382d2SGreg Kroah-Hartman if (changed & TIOCM_RI) 278ab4382d2SGreg Kroah-Hartman sport->port.icount.rng++; 279ab4382d2SGreg Kroah-Hartman if (changed & TIOCM_DSR) 280ab4382d2SGreg Kroah-Hartman sport->port.icount.dsr++; 281ab4382d2SGreg Kroah-Hartman if (changed & TIOCM_CAR) 282ab4382d2SGreg Kroah-Hartman uart_handle_dcd_change(&sport->port, status & TIOCM_CAR); 283ab4382d2SGreg Kroah-Hartman if (changed & TIOCM_CTS) 284ab4382d2SGreg Kroah-Hartman uart_handle_cts_change(&sport->port, status & TIOCM_CTS); 285ab4382d2SGreg Kroah-Hartman 286ab4382d2SGreg Kroah-Hartman wake_up_interruptible(&sport->port.state->port.delta_msr_wait); 287ab4382d2SGreg Kroah-Hartman } 288ab4382d2SGreg Kroah-Hartman 289ab4382d2SGreg Kroah-Hartman /* 290ab4382d2SGreg Kroah-Hartman * This is our per-port timeout handler, for checking the 291ab4382d2SGreg Kroah-Hartman * modem status signals. 292ab4382d2SGreg Kroah-Hartman */ 293ab4382d2SGreg Kroah-Hartman static void imx_timeout(unsigned long data) 294ab4382d2SGreg Kroah-Hartman { 295ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)data; 296ab4382d2SGreg Kroah-Hartman unsigned long flags; 297ab4382d2SGreg Kroah-Hartman 298ab4382d2SGreg Kroah-Hartman if (sport->port.state) { 299ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&sport->port.lock, flags); 300ab4382d2SGreg Kroah-Hartman imx_mctrl_check(sport); 301ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&sport->port.lock, flags); 302ab4382d2SGreg Kroah-Hartman 303ab4382d2SGreg Kroah-Hartman mod_timer(&sport->timer, jiffies + MCTRL_TIMEOUT); 304ab4382d2SGreg Kroah-Hartman } 305ab4382d2SGreg Kroah-Hartman } 306ab4382d2SGreg Kroah-Hartman 307ab4382d2SGreg Kroah-Hartman /* 308ab4382d2SGreg Kroah-Hartman * interrupts disabled on entry 309ab4382d2SGreg Kroah-Hartman */ 310ab4382d2SGreg Kroah-Hartman static void imx_stop_tx(struct uart_port *port) 311ab4382d2SGreg Kroah-Hartman { 312ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 313ab4382d2SGreg Kroah-Hartman unsigned long temp; 314ab4382d2SGreg Kroah-Hartman 315ab4382d2SGreg Kroah-Hartman if (USE_IRDA(sport)) { 316ab4382d2SGreg Kroah-Hartman /* half duplex - wait for end of transmission */ 317ab4382d2SGreg Kroah-Hartman int n = 256; 318ab4382d2SGreg Kroah-Hartman while ((--n > 0) && 319ab4382d2SGreg Kroah-Hartman !(readl(sport->port.membase + USR2) & USR2_TXDC)) { 320ab4382d2SGreg Kroah-Hartman udelay(5); 321ab4382d2SGreg Kroah-Hartman barrier(); 322ab4382d2SGreg Kroah-Hartman } 323ab4382d2SGreg Kroah-Hartman /* 324ab4382d2SGreg Kroah-Hartman * irda transceiver - wait a bit more to avoid 325ab4382d2SGreg Kroah-Hartman * cutoff, hardware dependent 326ab4382d2SGreg Kroah-Hartman */ 327ab4382d2SGreg Kroah-Hartman udelay(sport->trcv_delay); 328ab4382d2SGreg Kroah-Hartman 329ab4382d2SGreg Kroah-Hartman /* 330ab4382d2SGreg Kroah-Hartman * half duplex - reactivate receive mode, 331ab4382d2SGreg Kroah-Hartman * flush receive pipe echo crap 332ab4382d2SGreg Kroah-Hartman */ 333ab4382d2SGreg Kroah-Hartman if (readl(sport->port.membase + USR2) & USR2_TXDC) { 334ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR1); 335ab4382d2SGreg Kroah-Hartman temp &= ~(UCR1_TXMPTYEN | UCR1_TRDYEN); 336ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR1); 337ab4382d2SGreg Kroah-Hartman 338ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR4); 339ab4382d2SGreg Kroah-Hartman temp &= ~(UCR4_TCEN); 340ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR4); 341ab4382d2SGreg Kroah-Hartman 342ab4382d2SGreg Kroah-Hartman while (readl(sport->port.membase + URXD0) & 343ab4382d2SGreg Kroah-Hartman URXD_CHARRDY) 344ab4382d2SGreg Kroah-Hartman barrier(); 345ab4382d2SGreg Kroah-Hartman 346ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR1); 347ab4382d2SGreg Kroah-Hartman temp |= UCR1_RRDYEN; 348ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR1); 349ab4382d2SGreg Kroah-Hartman 350ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR4); 351ab4382d2SGreg Kroah-Hartman temp |= UCR4_DREN; 352ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR4); 353ab4382d2SGreg Kroah-Hartman } 354ab4382d2SGreg Kroah-Hartman return; 355ab4382d2SGreg Kroah-Hartman } 356ab4382d2SGreg Kroah-Hartman 357ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR1); 358ab4382d2SGreg Kroah-Hartman writel(temp & ~UCR1_TXMPTYEN, sport->port.membase + UCR1); 359ab4382d2SGreg Kroah-Hartman } 360ab4382d2SGreg Kroah-Hartman 361ab4382d2SGreg Kroah-Hartman /* 362ab4382d2SGreg Kroah-Hartman * interrupts disabled on entry 363ab4382d2SGreg Kroah-Hartman */ 364ab4382d2SGreg Kroah-Hartman static void imx_stop_rx(struct uart_port *port) 365ab4382d2SGreg Kroah-Hartman { 366ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 367ab4382d2SGreg Kroah-Hartman unsigned long temp; 368ab4382d2SGreg Kroah-Hartman 369ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR2); 370ab4382d2SGreg Kroah-Hartman writel(temp &~ UCR2_RXEN, sport->port.membase + UCR2); 371ab4382d2SGreg Kroah-Hartman } 372ab4382d2SGreg Kroah-Hartman 373ab4382d2SGreg Kroah-Hartman /* 374ab4382d2SGreg Kroah-Hartman * Set the modem control timer to fire immediately. 375ab4382d2SGreg Kroah-Hartman */ 376ab4382d2SGreg Kroah-Hartman static void imx_enable_ms(struct uart_port *port) 377ab4382d2SGreg Kroah-Hartman { 378ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 379ab4382d2SGreg Kroah-Hartman 380ab4382d2SGreg Kroah-Hartman mod_timer(&sport->timer, jiffies); 381ab4382d2SGreg Kroah-Hartman } 382ab4382d2SGreg Kroah-Hartman 383ab4382d2SGreg Kroah-Hartman static inline void imx_transmit_buffer(struct imx_port *sport) 384ab4382d2SGreg Kroah-Hartman { 385ab4382d2SGreg Kroah-Hartman struct circ_buf *xmit = &sport->port.state->xmit; 386ab4382d2SGreg Kroah-Hartman 387ab4382d2SGreg Kroah-Hartman while (!uart_circ_empty(xmit) && 388fe6b540aSShawn Guo !(readl(sport->port.membase + uts_reg(sport)) 389fe6b540aSShawn Guo & UTS_TXFULL)) { 390ab4382d2SGreg Kroah-Hartman /* send xmit->buf[xmit->tail] 391ab4382d2SGreg Kroah-Hartman * out the port here */ 392ab4382d2SGreg Kroah-Hartman writel(xmit->buf[xmit->tail], sport->port.membase + URTX0); 393ab4382d2SGreg Kroah-Hartman xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 394ab4382d2SGreg Kroah-Hartman sport->port.icount.tx++; 395ab4382d2SGreg Kroah-Hartman } 396ab4382d2SGreg Kroah-Hartman 397ab4382d2SGreg Kroah-Hartman if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 398ab4382d2SGreg Kroah-Hartman uart_write_wakeup(&sport->port); 399ab4382d2SGreg Kroah-Hartman 400ab4382d2SGreg Kroah-Hartman if (uart_circ_empty(xmit)) 401ab4382d2SGreg Kroah-Hartman imx_stop_tx(&sport->port); 402ab4382d2SGreg Kroah-Hartman } 403ab4382d2SGreg Kroah-Hartman 404ab4382d2SGreg Kroah-Hartman /* 405ab4382d2SGreg Kroah-Hartman * interrupts disabled on entry 406ab4382d2SGreg Kroah-Hartman */ 407ab4382d2SGreg Kroah-Hartman static void imx_start_tx(struct uart_port *port) 408ab4382d2SGreg Kroah-Hartman { 409ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 410ab4382d2SGreg Kroah-Hartman unsigned long temp; 411ab4382d2SGreg Kroah-Hartman 412ab4382d2SGreg Kroah-Hartman if (USE_IRDA(sport)) { 413ab4382d2SGreg Kroah-Hartman /* half duplex in IrDA mode; have to disable receive mode */ 414ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR4); 415ab4382d2SGreg Kroah-Hartman temp &= ~(UCR4_DREN); 416ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR4); 417ab4382d2SGreg Kroah-Hartman 418ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR1); 419ab4382d2SGreg Kroah-Hartman temp &= ~(UCR1_RRDYEN); 420ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR1); 421ab4382d2SGreg Kroah-Hartman } 422ab4382d2SGreg Kroah-Hartman 423ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR1); 424ab4382d2SGreg Kroah-Hartman writel(temp | UCR1_TXMPTYEN, sport->port.membase + UCR1); 425ab4382d2SGreg Kroah-Hartman 426ab4382d2SGreg Kroah-Hartman if (USE_IRDA(sport)) { 427ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR1); 428ab4382d2SGreg Kroah-Hartman temp |= UCR1_TRDYEN; 429ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR1); 430ab4382d2SGreg Kroah-Hartman 431ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR4); 432ab4382d2SGreg Kroah-Hartman temp |= UCR4_TCEN; 433ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR4); 434ab4382d2SGreg Kroah-Hartman } 435ab4382d2SGreg Kroah-Hartman 436fe6b540aSShawn Guo if (readl(sport->port.membase + uts_reg(sport)) & UTS_TXEMPTY) 437ab4382d2SGreg Kroah-Hartman imx_transmit_buffer(sport); 438ab4382d2SGreg Kroah-Hartman } 439ab4382d2SGreg Kroah-Hartman 440ab4382d2SGreg Kroah-Hartman static irqreturn_t imx_rtsint(int irq, void *dev_id) 441ab4382d2SGreg Kroah-Hartman { 442ab4382d2SGreg Kroah-Hartman struct imx_port *sport = dev_id; 4435680e941SUwe Kleine-König unsigned int val; 444ab4382d2SGreg Kroah-Hartman unsigned long flags; 445ab4382d2SGreg Kroah-Hartman 446ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&sport->port.lock, flags); 447ab4382d2SGreg Kroah-Hartman 448ab4382d2SGreg Kroah-Hartman writel(USR1_RTSD, sport->port.membase + USR1); 4495680e941SUwe Kleine-König val = readl(sport->port.membase + USR1) & USR1_RTSS; 450ab4382d2SGreg Kroah-Hartman uart_handle_cts_change(&sport->port, !!val); 451ab4382d2SGreg Kroah-Hartman wake_up_interruptible(&sport->port.state->port.delta_msr_wait); 452ab4382d2SGreg Kroah-Hartman 453ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&sport->port.lock, flags); 454ab4382d2SGreg Kroah-Hartman return IRQ_HANDLED; 455ab4382d2SGreg Kroah-Hartman } 456ab4382d2SGreg Kroah-Hartman 457ab4382d2SGreg Kroah-Hartman static irqreturn_t imx_txint(int irq, void *dev_id) 458ab4382d2SGreg Kroah-Hartman { 459ab4382d2SGreg Kroah-Hartman struct imx_port *sport = dev_id; 460ab4382d2SGreg Kroah-Hartman struct circ_buf *xmit = &sport->port.state->xmit; 461ab4382d2SGreg Kroah-Hartman unsigned long flags; 462ab4382d2SGreg Kroah-Hartman 463ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&sport->port.lock,flags); 464ab4382d2SGreg Kroah-Hartman if (sport->port.x_char) 465ab4382d2SGreg Kroah-Hartman { 466ab4382d2SGreg Kroah-Hartman /* Send next char */ 467ab4382d2SGreg Kroah-Hartman writel(sport->port.x_char, sport->port.membase + URTX0); 468ab4382d2SGreg Kroah-Hartman goto out; 469ab4382d2SGreg Kroah-Hartman } 470ab4382d2SGreg Kroah-Hartman 471ab4382d2SGreg Kroah-Hartman if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) { 472ab4382d2SGreg Kroah-Hartman imx_stop_tx(&sport->port); 473ab4382d2SGreg Kroah-Hartman goto out; 474ab4382d2SGreg Kroah-Hartman } 475ab4382d2SGreg Kroah-Hartman 476ab4382d2SGreg Kroah-Hartman imx_transmit_buffer(sport); 477ab4382d2SGreg Kroah-Hartman 478ab4382d2SGreg Kroah-Hartman if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 479ab4382d2SGreg Kroah-Hartman uart_write_wakeup(&sport->port); 480ab4382d2SGreg Kroah-Hartman 481ab4382d2SGreg Kroah-Hartman out: 482ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&sport->port.lock,flags); 483ab4382d2SGreg Kroah-Hartman return IRQ_HANDLED; 484ab4382d2SGreg Kroah-Hartman } 485ab4382d2SGreg Kroah-Hartman 486ab4382d2SGreg Kroah-Hartman static irqreturn_t imx_rxint(int irq, void *dev_id) 487ab4382d2SGreg Kroah-Hartman { 488ab4382d2SGreg Kroah-Hartman struct imx_port *sport = dev_id; 489ab4382d2SGreg Kroah-Hartman unsigned int rx,flg,ignored = 0; 490ab4382d2SGreg Kroah-Hartman struct tty_struct *tty = sport->port.state->port.tty; 491ab4382d2SGreg Kroah-Hartman unsigned long flags, temp; 492ab4382d2SGreg Kroah-Hartman 493ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&sport->port.lock,flags); 494ab4382d2SGreg Kroah-Hartman 495ab4382d2SGreg Kroah-Hartman while (readl(sport->port.membase + USR2) & USR2_RDR) { 496ab4382d2SGreg Kroah-Hartman flg = TTY_NORMAL; 497ab4382d2SGreg Kroah-Hartman sport->port.icount.rx++; 498ab4382d2SGreg Kroah-Hartman 499ab4382d2SGreg Kroah-Hartman rx = readl(sport->port.membase + URXD0); 500ab4382d2SGreg Kroah-Hartman 501ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + USR2); 502ab4382d2SGreg Kroah-Hartman if (temp & USR2_BRCD) { 503ab4382d2SGreg Kroah-Hartman writel(USR2_BRCD, sport->port.membase + USR2); 504ab4382d2SGreg Kroah-Hartman if (uart_handle_break(&sport->port)) 505ab4382d2SGreg Kroah-Hartman continue; 506ab4382d2SGreg Kroah-Hartman } 507ab4382d2SGreg Kroah-Hartman 508ab4382d2SGreg Kroah-Hartman if (uart_handle_sysrq_char(&sport->port, (unsigned char)rx)) 509ab4382d2SGreg Kroah-Hartman continue; 510ab4382d2SGreg Kroah-Hartman 511ab4382d2SGreg Kroah-Hartman if (rx & (URXD_PRERR | URXD_OVRRUN | URXD_FRMERR) ) { 512ab4382d2SGreg Kroah-Hartman if (rx & URXD_PRERR) 513ab4382d2SGreg Kroah-Hartman sport->port.icount.parity++; 514ab4382d2SGreg Kroah-Hartman else if (rx & URXD_FRMERR) 515ab4382d2SGreg Kroah-Hartman sport->port.icount.frame++; 516ab4382d2SGreg Kroah-Hartman if (rx & URXD_OVRRUN) 517ab4382d2SGreg Kroah-Hartman sport->port.icount.overrun++; 518ab4382d2SGreg Kroah-Hartman 519ab4382d2SGreg Kroah-Hartman if (rx & sport->port.ignore_status_mask) { 520ab4382d2SGreg Kroah-Hartman if (++ignored > 100) 521ab4382d2SGreg Kroah-Hartman goto out; 522ab4382d2SGreg Kroah-Hartman continue; 523ab4382d2SGreg Kroah-Hartman } 524ab4382d2SGreg Kroah-Hartman 525ab4382d2SGreg Kroah-Hartman rx &= sport->port.read_status_mask; 526ab4382d2SGreg Kroah-Hartman 527ab4382d2SGreg Kroah-Hartman if (rx & URXD_PRERR) 528ab4382d2SGreg Kroah-Hartman flg = TTY_PARITY; 529ab4382d2SGreg Kroah-Hartman else if (rx & URXD_FRMERR) 530ab4382d2SGreg Kroah-Hartman flg = TTY_FRAME; 531ab4382d2SGreg Kroah-Hartman if (rx & URXD_OVRRUN) 532ab4382d2SGreg Kroah-Hartman flg = TTY_OVERRUN; 533ab4382d2SGreg Kroah-Hartman 534ab4382d2SGreg Kroah-Hartman #ifdef SUPPORT_SYSRQ 535ab4382d2SGreg Kroah-Hartman sport->port.sysrq = 0; 536ab4382d2SGreg Kroah-Hartman #endif 537ab4382d2SGreg Kroah-Hartman } 538ab4382d2SGreg Kroah-Hartman 539ab4382d2SGreg Kroah-Hartman tty_insert_flip_char(tty, rx, flg); 540ab4382d2SGreg Kroah-Hartman } 541ab4382d2SGreg Kroah-Hartman 542ab4382d2SGreg Kroah-Hartman out: 543ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&sport->port.lock,flags); 544ab4382d2SGreg Kroah-Hartman tty_flip_buffer_push(tty); 545ab4382d2SGreg Kroah-Hartman return IRQ_HANDLED; 546ab4382d2SGreg Kroah-Hartman } 547ab4382d2SGreg Kroah-Hartman 548ab4382d2SGreg Kroah-Hartman static irqreturn_t imx_int(int irq, void *dev_id) 549ab4382d2SGreg Kroah-Hartman { 550ab4382d2SGreg Kroah-Hartman struct imx_port *sport = dev_id; 551ab4382d2SGreg Kroah-Hartman unsigned int sts; 552ab4382d2SGreg Kroah-Hartman 553ab4382d2SGreg Kroah-Hartman sts = readl(sport->port.membase + USR1); 554ab4382d2SGreg Kroah-Hartman 555ab4382d2SGreg Kroah-Hartman if (sts & USR1_RRDY) 556ab4382d2SGreg Kroah-Hartman imx_rxint(irq, dev_id); 557ab4382d2SGreg Kroah-Hartman 558ab4382d2SGreg Kroah-Hartman if (sts & USR1_TRDY && 559ab4382d2SGreg Kroah-Hartman readl(sport->port.membase + UCR1) & UCR1_TXMPTYEN) 560ab4382d2SGreg Kroah-Hartman imx_txint(irq, dev_id); 561ab4382d2SGreg Kroah-Hartman 562ab4382d2SGreg Kroah-Hartman if (sts & USR1_RTSD) 563ab4382d2SGreg Kroah-Hartman imx_rtsint(irq, dev_id); 564ab4382d2SGreg Kroah-Hartman 565ab4382d2SGreg Kroah-Hartman return IRQ_HANDLED; 566ab4382d2SGreg Kroah-Hartman } 567ab4382d2SGreg Kroah-Hartman 568ab4382d2SGreg Kroah-Hartman /* 569ab4382d2SGreg Kroah-Hartman * Return TIOCSER_TEMT when transmitter is not busy. 570ab4382d2SGreg Kroah-Hartman */ 571ab4382d2SGreg Kroah-Hartman static unsigned int imx_tx_empty(struct uart_port *port) 572ab4382d2SGreg Kroah-Hartman { 573ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 574ab4382d2SGreg Kroah-Hartman 575ab4382d2SGreg Kroah-Hartman return (readl(sport->port.membase + USR2) & USR2_TXDC) ? TIOCSER_TEMT : 0; 576ab4382d2SGreg Kroah-Hartman } 577ab4382d2SGreg Kroah-Hartman 578ab4382d2SGreg Kroah-Hartman /* 579ab4382d2SGreg Kroah-Hartman * We have a modem side uart, so the meanings of RTS and CTS are inverted. 580ab4382d2SGreg Kroah-Hartman */ 581ab4382d2SGreg Kroah-Hartman static unsigned int imx_get_mctrl(struct uart_port *port) 582ab4382d2SGreg Kroah-Hartman { 583ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 584ab4382d2SGreg Kroah-Hartman unsigned int tmp = TIOCM_DSR | TIOCM_CAR; 585ab4382d2SGreg Kroah-Hartman 586ab4382d2SGreg Kroah-Hartman if (readl(sport->port.membase + USR1) & USR1_RTSS) 587ab4382d2SGreg Kroah-Hartman tmp |= TIOCM_CTS; 588ab4382d2SGreg Kroah-Hartman 589ab4382d2SGreg Kroah-Hartman if (readl(sport->port.membase + UCR2) & UCR2_CTS) 590ab4382d2SGreg Kroah-Hartman tmp |= TIOCM_RTS; 591ab4382d2SGreg Kroah-Hartman 592ab4382d2SGreg Kroah-Hartman return tmp; 593ab4382d2SGreg Kroah-Hartman } 594ab4382d2SGreg Kroah-Hartman 595ab4382d2SGreg Kroah-Hartman static void imx_set_mctrl(struct uart_port *port, unsigned int mctrl) 596ab4382d2SGreg Kroah-Hartman { 597ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 598ab4382d2SGreg Kroah-Hartman unsigned long temp; 599ab4382d2SGreg Kroah-Hartman 600ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR2) & ~UCR2_CTS; 601ab4382d2SGreg Kroah-Hartman 602ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_RTS) 603ab4382d2SGreg Kroah-Hartman temp |= UCR2_CTS; 604ab4382d2SGreg Kroah-Hartman 605ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR2); 606ab4382d2SGreg Kroah-Hartman } 607ab4382d2SGreg Kroah-Hartman 608ab4382d2SGreg Kroah-Hartman /* 609ab4382d2SGreg Kroah-Hartman * Interrupts always disabled. 610ab4382d2SGreg Kroah-Hartman */ 611ab4382d2SGreg Kroah-Hartman static void imx_break_ctl(struct uart_port *port, int break_state) 612ab4382d2SGreg Kroah-Hartman { 613ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 614ab4382d2SGreg Kroah-Hartman unsigned long flags, temp; 615ab4382d2SGreg Kroah-Hartman 616ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&sport->port.lock, flags); 617ab4382d2SGreg Kroah-Hartman 618ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR1) & ~UCR1_SNDBRK; 619ab4382d2SGreg Kroah-Hartman 620ab4382d2SGreg Kroah-Hartman if ( break_state != 0 ) 621ab4382d2SGreg Kroah-Hartman temp |= UCR1_SNDBRK; 622ab4382d2SGreg Kroah-Hartman 623ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR1); 624ab4382d2SGreg Kroah-Hartman 625ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&sport->port.lock, flags); 626ab4382d2SGreg Kroah-Hartman } 627ab4382d2SGreg Kroah-Hartman 628ab4382d2SGreg Kroah-Hartman #define TXTL 2 /* reset default */ 629ab4382d2SGreg Kroah-Hartman #define RXTL 1 /* reset default */ 630ab4382d2SGreg Kroah-Hartman 631ab4382d2SGreg Kroah-Hartman static int imx_setup_ufcr(struct imx_port *sport, unsigned int mode) 632ab4382d2SGreg Kroah-Hartman { 633ab4382d2SGreg Kroah-Hartman unsigned int val; 634ab4382d2SGreg Kroah-Hartman unsigned int ufcr_rfdiv; 635ab4382d2SGreg Kroah-Hartman 636ab4382d2SGreg Kroah-Hartman /* set receiver / transmitter trigger level. 637ab4382d2SGreg Kroah-Hartman * RFDIV is set such way to satisfy requested uartclk value 638ab4382d2SGreg Kroah-Hartman */ 639ab4382d2SGreg Kroah-Hartman val = TXTL << 10 | RXTL; 640ab4382d2SGreg Kroah-Hartman ufcr_rfdiv = (clk_get_rate(sport->clk) + sport->port.uartclk / 2) 641ab4382d2SGreg Kroah-Hartman / sport->port.uartclk; 642ab4382d2SGreg Kroah-Hartman 643ab4382d2SGreg Kroah-Hartman if(!ufcr_rfdiv) 644ab4382d2SGreg Kroah-Hartman ufcr_rfdiv = 1; 645ab4382d2SGreg Kroah-Hartman 646ab4382d2SGreg Kroah-Hartman val |= UFCR_RFDIV_REG(ufcr_rfdiv); 647ab4382d2SGreg Kroah-Hartman 648ab4382d2SGreg Kroah-Hartman writel(val, sport->port.membase + UFCR); 649ab4382d2SGreg Kroah-Hartman 650ab4382d2SGreg Kroah-Hartman return 0; 651ab4382d2SGreg Kroah-Hartman } 652ab4382d2SGreg Kroah-Hartman 653ab4382d2SGreg Kroah-Hartman /* half the RX buffer size */ 654ab4382d2SGreg Kroah-Hartman #define CTSTL 16 655ab4382d2SGreg Kroah-Hartman 656ab4382d2SGreg Kroah-Hartman static int imx_startup(struct uart_port *port) 657ab4382d2SGreg Kroah-Hartman { 658ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 659ab4382d2SGreg Kroah-Hartman int retval; 660ab4382d2SGreg Kroah-Hartman unsigned long flags, temp; 661ab4382d2SGreg Kroah-Hartman 662ab4382d2SGreg Kroah-Hartman imx_setup_ufcr(sport, 0); 663ab4382d2SGreg Kroah-Hartman 664ab4382d2SGreg Kroah-Hartman /* disable the DREN bit (Data Ready interrupt enable) before 665ab4382d2SGreg Kroah-Hartman * requesting IRQs 666ab4382d2SGreg Kroah-Hartman */ 667ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR4); 668ab4382d2SGreg Kroah-Hartman 669ab4382d2SGreg Kroah-Hartman if (USE_IRDA(sport)) 670ab4382d2SGreg Kroah-Hartman temp |= UCR4_IRSC; 671ab4382d2SGreg Kroah-Hartman 672ab4382d2SGreg Kroah-Hartman /* set the trigger level for CTS */ 673ab4382d2SGreg Kroah-Hartman temp &= ~(UCR4_CTSTL_MASK<< UCR4_CTSTL_SHF); 674ab4382d2SGreg Kroah-Hartman temp |= CTSTL<< UCR4_CTSTL_SHF; 675ab4382d2SGreg Kroah-Hartman 676ab4382d2SGreg Kroah-Hartman writel(temp & ~UCR4_DREN, sport->port.membase + UCR4); 677ab4382d2SGreg Kroah-Hartman 678ab4382d2SGreg Kroah-Hartman if (USE_IRDA(sport)) { 679ab4382d2SGreg Kroah-Hartman /* reset fifo's and state machines */ 680ab4382d2SGreg Kroah-Hartman int i = 100; 681ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR2); 682ab4382d2SGreg Kroah-Hartman temp &= ~UCR2_SRST; 683ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR2); 684ab4382d2SGreg Kroah-Hartman while (!(readl(sport->port.membase + UCR2) & UCR2_SRST) && 685ab4382d2SGreg Kroah-Hartman (--i > 0)) { 686ab4382d2SGreg Kroah-Hartman udelay(1); 687ab4382d2SGreg Kroah-Hartman } 688ab4382d2SGreg Kroah-Hartman } 689ab4382d2SGreg Kroah-Hartman 690ab4382d2SGreg Kroah-Hartman /* 691ab4382d2SGreg Kroah-Hartman * Allocate the IRQ(s) i.MX1 has three interrupts whereas later 692ab4382d2SGreg Kroah-Hartman * chips only have one interrupt. 693ab4382d2SGreg Kroah-Hartman */ 694ab4382d2SGreg Kroah-Hartman if (sport->txirq > 0) { 695ab4382d2SGreg Kroah-Hartman retval = request_irq(sport->rxirq, imx_rxint, 0, 696ab4382d2SGreg Kroah-Hartman DRIVER_NAME, sport); 697ab4382d2SGreg Kroah-Hartman if (retval) 698ab4382d2SGreg Kroah-Hartman goto error_out1; 699ab4382d2SGreg Kroah-Hartman 700ab4382d2SGreg Kroah-Hartman retval = request_irq(sport->txirq, imx_txint, 0, 701ab4382d2SGreg Kroah-Hartman DRIVER_NAME, sport); 702ab4382d2SGreg Kroah-Hartman if (retval) 703ab4382d2SGreg Kroah-Hartman goto error_out2; 704ab4382d2SGreg Kroah-Hartman 705ab4382d2SGreg Kroah-Hartman /* do not use RTS IRQ on IrDA */ 706ab4382d2SGreg Kroah-Hartman if (!USE_IRDA(sport)) { 707ab4382d2SGreg Kroah-Hartman retval = request_irq(sport->rtsirq, imx_rtsint, 708ab4382d2SGreg Kroah-Hartman (sport->rtsirq < MAX_INTERNAL_IRQ) ? 0 : 709ab4382d2SGreg Kroah-Hartman IRQF_TRIGGER_FALLING | 710ab4382d2SGreg Kroah-Hartman IRQF_TRIGGER_RISING, 711ab4382d2SGreg Kroah-Hartman DRIVER_NAME, sport); 712ab4382d2SGreg Kroah-Hartman if (retval) 713ab4382d2SGreg Kroah-Hartman goto error_out3; 714ab4382d2SGreg Kroah-Hartman } 715ab4382d2SGreg Kroah-Hartman } else { 716ab4382d2SGreg Kroah-Hartman retval = request_irq(sport->port.irq, imx_int, 0, 717ab4382d2SGreg Kroah-Hartman DRIVER_NAME, sport); 718ab4382d2SGreg Kroah-Hartman if (retval) { 719ab4382d2SGreg Kroah-Hartman free_irq(sport->port.irq, sport); 720ab4382d2SGreg Kroah-Hartman goto error_out1; 721ab4382d2SGreg Kroah-Hartman } 722ab4382d2SGreg Kroah-Hartman } 723ab4382d2SGreg Kroah-Hartman 724ab4382d2SGreg Kroah-Hartman /* 725ab4382d2SGreg Kroah-Hartman * Finally, clear and enable interrupts 726ab4382d2SGreg Kroah-Hartman */ 727ab4382d2SGreg Kroah-Hartman writel(USR1_RTSD, sport->port.membase + USR1); 728ab4382d2SGreg Kroah-Hartman 729ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR1); 730ab4382d2SGreg Kroah-Hartman temp |= UCR1_RRDYEN | UCR1_RTSDEN | UCR1_UARTEN; 731ab4382d2SGreg Kroah-Hartman 732ab4382d2SGreg Kroah-Hartman if (USE_IRDA(sport)) { 733ab4382d2SGreg Kroah-Hartman temp |= UCR1_IREN; 734ab4382d2SGreg Kroah-Hartman temp &= ~(UCR1_RTSDEN); 735ab4382d2SGreg Kroah-Hartman } 736ab4382d2SGreg Kroah-Hartman 737ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR1); 738ab4382d2SGreg Kroah-Hartman 739ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR2); 740ab4382d2SGreg Kroah-Hartman temp |= (UCR2_RXEN | UCR2_TXEN); 741ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR2); 742ab4382d2SGreg Kroah-Hartman 743ab4382d2SGreg Kroah-Hartman if (USE_IRDA(sport)) { 744ab4382d2SGreg Kroah-Hartman /* clear RX-FIFO */ 745ab4382d2SGreg Kroah-Hartman int i = 64; 746ab4382d2SGreg Kroah-Hartman while ((--i > 0) && 747ab4382d2SGreg Kroah-Hartman (readl(sport->port.membase + URXD0) & URXD_CHARRDY)) { 748ab4382d2SGreg Kroah-Hartman barrier(); 749ab4382d2SGreg Kroah-Hartman } 750ab4382d2SGreg Kroah-Hartman } 751ab4382d2SGreg Kroah-Hartman 752fe6b540aSShawn Guo if (is_imx21_uart(sport)) { 753ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR3); 754fe6b540aSShawn Guo temp |= IMX21_UCR3_RXDMUXSEL; 755ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR3); 756ab4382d2SGreg Kroah-Hartman } 757ab4382d2SGreg Kroah-Hartman 758ab4382d2SGreg Kroah-Hartman if (USE_IRDA(sport)) { 759ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR4); 760ab4382d2SGreg Kroah-Hartman if (sport->irda_inv_rx) 761ab4382d2SGreg Kroah-Hartman temp |= UCR4_INVR; 762ab4382d2SGreg Kroah-Hartman else 763ab4382d2SGreg Kroah-Hartman temp &= ~(UCR4_INVR); 764ab4382d2SGreg Kroah-Hartman writel(temp | UCR4_DREN, sport->port.membase + UCR4); 765ab4382d2SGreg Kroah-Hartman 766ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR3); 767ab4382d2SGreg Kroah-Hartman if (sport->irda_inv_tx) 768ab4382d2SGreg Kroah-Hartman temp |= UCR3_INVT; 769ab4382d2SGreg Kroah-Hartman else 770ab4382d2SGreg Kroah-Hartman temp &= ~(UCR3_INVT); 771ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR3); 772ab4382d2SGreg Kroah-Hartman } 773ab4382d2SGreg Kroah-Hartman 774ab4382d2SGreg Kroah-Hartman /* 775ab4382d2SGreg Kroah-Hartman * Enable modem status interrupts 776ab4382d2SGreg Kroah-Hartman */ 777ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&sport->port.lock,flags); 778ab4382d2SGreg Kroah-Hartman imx_enable_ms(&sport->port); 779ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&sport->port.lock,flags); 780ab4382d2SGreg Kroah-Hartman 781ab4382d2SGreg Kroah-Hartman if (USE_IRDA(sport)) { 782ab4382d2SGreg Kroah-Hartman struct imxuart_platform_data *pdata; 783ab4382d2SGreg Kroah-Hartman pdata = sport->port.dev->platform_data; 784ab4382d2SGreg Kroah-Hartman sport->irda_inv_rx = pdata->irda_inv_rx; 785ab4382d2SGreg Kroah-Hartman sport->irda_inv_tx = pdata->irda_inv_tx; 786ab4382d2SGreg Kroah-Hartman sport->trcv_delay = pdata->transceiver_delay; 787ab4382d2SGreg Kroah-Hartman if (pdata->irda_enable) 788ab4382d2SGreg Kroah-Hartman pdata->irda_enable(1); 789ab4382d2SGreg Kroah-Hartman } 790ab4382d2SGreg Kroah-Hartman 791ab4382d2SGreg Kroah-Hartman return 0; 792ab4382d2SGreg Kroah-Hartman 793ab4382d2SGreg Kroah-Hartman error_out3: 794ab4382d2SGreg Kroah-Hartman if (sport->txirq) 795ab4382d2SGreg Kroah-Hartman free_irq(sport->txirq, sport); 796ab4382d2SGreg Kroah-Hartman error_out2: 797ab4382d2SGreg Kroah-Hartman if (sport->rxirq) 798ab4382d2SGreg Kroah-Hartman free_irq(sport->rxirq, sport); 799ab4382d2SGreg Kroah-Hartman error_out1: 800ab4382d2SGreg Kroah-Hartman return retval; 801ab4382d2SGreg Kroah-Hartman } 802ab4382d2SGreg Kroah-Hartman 803ab4382d2SGreg Kroah-Hartman static void imx_shutdown(struct uart_port *port) 804ab4382d2SGreg Kroah-Hartman { 805ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 806ab4382d2SGreg Kroah-Hartman unsigned long temp; 807ab4382d2SGreg Kroah-Hartman 808ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR2); 809ab4382d2SGreg Kroah-Hartman temp &= ~(UCR2_TXEN); 810ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR2); 811ab4382d2SGreg Kroah-Hartman 812ab4382d2SGreg Kroah-Hartman if (USE_IRDA(sport)) { 813ab4382d2SGreg Kroah-Hartman struct imxuart_platform_data *pdata; 814ab4382d2SGreg Kroah-Hartman pdata = sport->port.dev->platform_data; 815ab4382d2SGreg Kroah-Hartman if (pdata->irda_enable) 816ab4382d2SGreg Kroah-Hartman pdata->irda_enable(0); 817ab4382d2SGreg Kroah-Hartman } 818ab4382d2SGreg Kroah-Hartman 819ab4382d2SGreg Kroah-Hartman /* 820ab4382d2SGreg Kroah-Hartman * Stop our timer. 821ab4382d2SGreg Kroah-Hartman */ 822ab4382d2SGreg Kroah-Hartman del_timer_sync(&sport->timer); 823ab4382d2SGreg Kroah-Hartman 824ab4382d2SGreg Kroah-Hartman /* 825ab4382d2SGreg Kroah-Hartman * Free the interrupts 826ab4382d2SGreg Kroah-Hartman */ 827ab4382d2SGreg Kroah-Hartman if (sport->txirq > 0) { 828ab4382d2SGreg Kroah-Hartman if (!USE_IRDA(sport)) 829ab4382d2SGreg Kroah-Hartman free_irq(sport->rtsirq, sport); 830ab4382d2SGreg Kroah-Hartman free_irq(sport->txirq, sport); 831ab4382d2SGreg Kroah-Hartman free_irq(sport->rxirq, sport); 832ab4382d2SGreg Kroah-Hartman } else 833ab4382d2SGreg Kroah-Hartman free_irq(sport->port.irq, sport); 834ab4382d2SGreg Kroah-Hartman 835ab4382d2SGreg Kroah-Hartman /* 836ab4382d2SGreg Kroah-Hartman * Disable all interrupts, port and break condition. 837ab4382d2SGreg Kroah-Hartman */ 838ab4382d2SGreg Kroah-Hartman 839ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR1); 840ab4382d2SGreg Kroah-Hartman temp &= ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN | UCR1_UARTEN); 841ab4382d2SGreg Kroah-Hartman if (USE_IRDA(sport)) 842ab4382d2SGreg Kroah-Hartman temp &= ~(UCR1_IREN); 843ab4382d2SGreg Kroah-Hartman 844ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR1); 845ab4382d2SGreg Kroah-Hartman } 846ab4382d2SGreg Kroah-Hartman 847ab4382d2SGreg Kroah-Hartman static void 848ab4382d2SGreg Kroah-Hartman imx_set_termios(struct uart_port *port, struct ktermios *termios, 849ab4382d2SGreg Kroah-Hartman struct ktermios *old) 850ab4382d2SGreg Kroah-Hartman { 851ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 852ab4382d2SGreg Kroah-Hartman unsigned long flags; 853ab4382d2SGreg Kroah-Hartman unsigned int ucr2, old_ucr1, old_txrxen, baud, quot; 854ab4382d2SGreg Kroah-Hartman unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8; 855ab4382d2SGreg Kroah-Hartman unsigned int div, ufcr; 856ab4382d2SGreg Kroah-Hartman unsigned long num, denom; 857ab4382d2SGreg Kroah-Hartman uint64_t tdiv64; 858ab4382d2SGreg Kroah-Hartman 859ab4382d2SGreg Kroah-Hartman /* 860ab4382d2SGreg Kroah-Hartman * If we don't support modem control lines, don't allow 861ab4382d2SGreg Kroah-Hartman * these to be set. 862ab4382d2SGreg Kroah-Hartman */ 863ab4382d2SGreg Kroah-Hartman if (0) { 864ab4382d2SGreg Kroah-Hartman termios->c_cflag &= ~(HUPCL | CRTSCTS | CMSPAR); 865ab4382d2SGreg Kroah-Hartman termios->c_cflag |= CLOCAL; 866ab4382d2SGreg Kroah-Hartman } 867ab4382d2SGreg Kroah-Hartman 868ab4382d2SGreg Kroah-Hartman /* 869ab4382d2SGreg Kroah-Hartman * We only support CS7 and CS8. 870ab4382d2SGreg Kroah-Hartman */ 871ab4382d2SGreg Kroah-Hartman while ((termios->c_cflag & CSIZE) != CS7 && 872ab4382d2SGreg Kroah-Hartman (termios->c_cflag & CSIZE) != CS8) { 873ab4382d2SGreg Kroah-Hartman termios->c_cflag &= ~CSIZE; 874ab4382d2SGreg Kroah-Hartman termios->c_cflag |= old_csize; 875ab4382d2SGreg Kroah-Hartman old_csize = CS8; 876ab4382d2SGreg Kroah-Hartman } 877ab4382d2SGreg Kroah-Hartman 878ab4382d2SGreg Kroah-Hartman if ((termios->c_cflag & CSIZE) == CS8) 879ab4382d2SGreg Kroah-Hartman ucr2 = UCR2_WS | UCR2_SRST | UCR2_IRTS; 880ab4382d2SGreg Kroah-Hartman else 881ab4382d2SGreg Kroah-Hartman ucr2 = UCR2_SRST | UCR2_IRTS; 882ab4382d2SGreg Kroah-Hartman 883ab4382d2SGreg Kroah-Hartman if (termios->c_cflag & CRTSCTS) { 884ab4382d2SGreg Kroah-Hartman if( sport->have_rtscts ) { 885ab4382d2SGreg Kroah-Hartman ucr2 &= ~UCR2_IRTS; 886ab4382d2SGreg Kroah-Hartman ucr2 |= UCR2_CTSC; 887ab4382d2SGreg Kroah-Hartman } else { 888ab4382d2SGreg Kroah-Hartman termios->c_cflag &= ~CRTSCTS; 889ab4382d2SGreg Kroah-Hartman } 890ab4382d2SGreg Kroah-Hartman } 891ab4382d2SGreg Kroah-Hartman 892ab4382d2SGreg Kroah-Hartman if (termios->c_cflag & CSTOPB) 893ab4382d2SGreg Kroah-Hartman ucr2 |= UCR2_STPB; 894ab4382d2SGreg Kroah-Hartman if (termios->c_cflag & PARENB) { 895ab4382d2SGreg Kroah-Hartman ucr2 |= UCR2_PREN; 896ab4382d2SGreg Kroah-Hartman if (termios->c_cflag & PARODD) 897ab4382d2SGreg Kroah-Hartman ucr2 |= UCR2_PROE; 898ab4382d2SGreg Kroah-Hartman } 899ab4382d2SGreg Kroah-Hartman 900ab4382d2SGreg Kroah-Hartman /* 901ab4382d2SGreg Kroah-Hartman * Ask the core to calculate the divisor for us. 902ab4382d2SGreg Kroah-Hartman */ 903ab4382d2SGreg Kroah-Hartman baud = uart_get_baud_rate(port, termios, old, 50, port->uartclk / 16); 904ab4382d2SGreg Kroah-Hartman quot = uart_get_divisor(port, baud); 905ab4382d2SGreg Kroah-Hartman 906ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&sport->port.lock, flags); 907ab4382d2SGreg Kroah-Hartman 908ab4382d2SGreg Kroah-Hartman sport->port.read_status_mask = 0; 909ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & INPCK) 910ab4382d2SGreg Kroah-Hartman sport->port.read_status_mask |= (URXD_FRMERR | URXD_PRERR); 911ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & (BRKINT | PARMRK)) 912ab4382d2SGreg Kroah-Hartman sport->port.read_status_mask |= URXD_BRK; 913ab4382d2SGreg Kroah-Hartman 914ab4382d2SGreg Kroah-Hartman /* 915ab4382d2SGreg Kroah-Hartman * Characters to ignore 916ab4382d2SGreg Kroah-Hartman */ 917ab4382d2SGreg Kroah-Hartman sport->port.ignore_status_mask = 0; 918ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IGNPAR) 919ab4382d2SGreg Kroah-Hartman sport->port.ignore_status_mask |= URXD_PRERR; 920ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IGNBRK) { 921ab4382d2SGreg Kroah-Hartman sport->port.ignore_status_mask |= URXD_BRK; 922ab4382d2SGreg Kroah-Hartman /* 923ab4382d2SGreg Kroah-Hartman * If we're ignoring parity and break indicators, 924ab4382d2SGreg Kroah-Hartman * ignore overruns too (for real raw support). 925ab4382d2SGreg Kroah-Hartman */ 926ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IGNPAR) 927ab4382d2SGreg Kroah-Hartman sport->port.ignore_status_mask |= URXD_OVRRUN; 928ab4382d2SGreg Kroah-Hartman } 929ab4382d2SGreg Kroah-Hartman 930ab4382d2SGreg Kroah-Hartman del_timer_sync(&sport->timer); 931ab4382d2SGreg Kroah-Hartman 932ab4382d2SGreg Kroah-Hartman /* 933ab4382d2SGreg Kroah-Hartman * Update the per-port timeout. 934ab4382d2SGreg Kroah-Hartman */ 935ab4382d2SGreg Kroah-Hartman uart_update_timeout(port, termios->c_cflag, baud); 936ab4382d2SGreg Kroah-Hartman 937ab4382d2SGreg Kroah-Hartman /* 938ab4382d2SGreg Kroah-Hartman * disable interrupts and drain transmitter 939ab4382d2SGreg Kroah-Hartman */ 940ab4382d2SGreg Kroah-Hartman old_ucr1 = readl(sport->port.membase + UCR1); 941ab4382d2SGreg Kroah-Hartman writel(old_ucr1 & ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN), 942ab4382d2SGreg Kroah-Hartman sport->port.membase + UCR1); 943ab4382d2SGreg Kroah-Hartman 944ab4382d2SGreg Kroah-Hartman while ( !(readl(sport->port.membase + USR2) & USR2_TXDC)) 945ab4382d2SGreg Kroah-Hartman barrier(); 946ab4382d2SGreg Kroah-Hartman 947ab4382d2SGreg Kroah-Hartman /* then, disable everything */ 948ab4382d2SGreg Kroah-Hartman old_txrxen = readl(sport->port.membase + UCR2); 949ab4382d2SGreg Kroah-Hartman writel(old_txrxen & ~( UCR2_TXEN | UCR2_RXEN), 950ab4382d2SGreg Kroah-Hartman sport->port.membase + UCR2); 951ab4382d2SGreg Kroah-Hartman old_txrxen &= (UCR2_TXEN | UCR2_RXEN); 952ab4382d2SGreg Kroah-Hartman 953ab4382d2SGreg Kroah-Hartman if (USE_IRDA(sport)) { 954ab4382d2SGreg Kroah-Hartman /* 955ab4382d2SGreg Kroah-Hartman * use maximum available submodule frequency to 956ab4382d2SGreg Kroah-Hartman * avoid missing short pulses due to low sampling rate 957ab4382d2SGreg Kroah-Hartman */ 958ab4382d2SGreg Kroah-Hartman div = 1; 959ab4382d2SGreg Kroah-Hartman } else { 960ab4382d2SGreg Kroah-Hartman div = sport->port.uartclk / (baud * 16); 961ab4382d2SGreg Kroah-Hartman if (div > 7) 962ab4382d2SGreg Kroah-Hartman div = 7; 963ab4382d2SGreg Kroah-Hartman if (!div) 964ab4382d2SGreg Kroah-Hartman div = 1; 965ab4382d2SGreg Kroah-Hartman } 966ab4382d2SGreg Kroah-Hartman 967ab4382d2SGreg Kroah-Hartman rational_best_approximation(16 * div * baud, sport->port.uartclk, 968ab4382d2SGreg Kroah-Hartman 1 << 16, 1 << 16, &num, &denom); 969ab4382d2SGreg Kroah-Hartman 970ab4382d2SGreg Kroah-Hartman tdiv64 = sport->port.uartclk; 971ab4382d2SGreg Kroah-Hartman tdiv64 *= num; 972ab4382d2SGreg Kroah-Hartman do_div(tdiv64, denom * 16 * div); 973ab4382d2SGreg Kroah-Hartman tty_termios_encode_baud_rate(termios, 974ab4382d2SGreg Kroah-Hartman (speed_t)tdiv64, (speed_t)tdiv64); 975ab4382d2SGreg Kroah-Hartman 976ab4382d2SGreg Kroah-Hartman num -= 1; 977ab4382d2SGreg Kroah-Hartman denom -= 1; 978ab4382d2SGreg Kroah-Hartman 979ab4382d2SGreg Kroah-Hartman ufcr = readl(sport->port.membase + UFCR); 980ab4382d2SGreg Kroah-Hartman ufcr = (ufcr & (~UFCR_RFDIV)) | UFCR_RFDIV_REG(div); 981ab4382d2SGreg Kroah-Hartman writel(ufcr, sport->port.membase + UFCR); 982ab4382d2SGreg Kroah-Hartman 983ab4382d2SGreg Kroah-Hartman writel(num, sport->port.membase + UBIR); 984ab4382d2SGreg Kroah-Hartman writel(denom, sport->port.membase + UBMR); 985ab4382d2SGreg Kroah-Hartman 986fe6b540aSShawn Guo if (is_imx21_uart(sport)) 987ab4382d2SGreg Kroah-Hartman writel(sport->port.uartclk / div / 1000, 988fe6b540aSShawn Guo sport->port.membase + IMX21_ONEMS); 989ab4382d2SGreg Kroah-Hartman 990ab4382d2SGreg Kroah-Hartman writel(old_ucr1, sport->port.membase + UCR1); 991ab4382d2SGreg Kroah-Hartman 992ab4382d2SGreg Kroah-Hartman /* set the parity, stop bits and data size */ 993ab4382d2SGreg Kroah-Hartman writel(ucr2 | old_txrxen, sport->port.membase + UCR2); 994ab4382d2SGreg Kroah-Hartman 995ab4382d2SGreg Kroah-Hartman if (UART_ENABLE_MS(&sport->port, termios->c_cflag)) 996ab4382d2SGreg Kroah-Hartman imx_enable_ms(&sport->port); 997ab4382d2SGreg Kroah-Hartman 998ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&sport->port.lock, flags); 999ab4382d2SGreg Kroah-Hartman } 1000ab4382d2SGreg Kroah-Hartman 1001ab4382d2SGreg Kroah-Hartman static const char *imx_type(struct uart_port *port) 1002ab4382d2SGreg Kroah-Hartman { 1003ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 1004ab4382d2SGreg Kroah-Hartman 1005ab4382d2SGreg Kroah-Hartman return sport->port.type == PORT_IMX ? "IMX" : NULL; 1006ab4382d2SGreg Kroah-Hartman } 1007ab4382d2SGreg Kroah-Hartman 1008ab4382d2SGreg Kroah-Hartman /* 1009ab4382d2SGreg Kroah-Hartman * Release the memory region(s) being used by 'port'. 1010ab4382d2SGreg Kroah-Hartman */ 1011ab4382d2SGreg Kroah-Hartman static void imx_release_port(struct uart_port *port) 1012ab4382d2SGreg Kroah-Hartman { 1013ab4382d2SGreg Kroah-Hartman struct platform_device *pdev = to_platform_device(port->dev); 1014ab4382d2SGreg Kroah-Hartman struct resource *mmres; 1015ab4382d2SGreg Kroah-Hartman 1016ab4382d2SGreg Kroah-Hartman mmres = platform_get_resource(pdev, IORESOURCE_MEM, 0); 101728f65c11SJoe Perches release_mem_region(mmres->start, resource_size(mmres)); 1018ab4382d2SGreg Kroah-Hartman } 1019ab4382d2SGreg Kroah-Hartman 1020ab4382d2SGreg Kroah-Hartman /* 1021ab4382d2SGreg Kroah-Hartman * Request the memory region(s) being used by 'port'. 1022ab4382d2SGreg Kroah-Hartman */ 1023ab4382d2SGreg Kroah-Hartman static int imx_request_port(struct uart_port *port) 1024ab4382d2SGreg Kroah-Hartman { 1025ab4382d2SGreg Kroah-Hartman struct platform_device *pdev = to_platform_device(port->dev); 1026ab4382d2SGreg Kroah-Hartman struct resource *mmres; 1027ab4382d2SGreg Kroah-Hartman void *ret; 1028ab4382d2SGreg Kroah-Hartman 1029ab4382d2SGreg Kroah-Hartman mmres = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1030ab4382d2SGreg Kroah-Hartman if (!mmres) 1031ab4382d2SGreg Kroah-Hartman return -ENODEV; 1032ab4382d2SGreg Kroah-Hartman 103328f65c11SJoe Perches ret = request_mem_region(mmres->start, resource_size(mmres), "imx-uart"); 1034ab4382d2SGreg Kroah-Hartman 1035ab4382d2SGreg Kroah-Hartman return ret ? 0 : -EBUSY; 1036ab4382d2SGreg Kroah-Hartman } 1037ab4382d2SGreg Kroah-Hartman 1038ab4382d2SGreg Kroah-Hartman /* 1039ab4382d2SGreg Kroah-Hartman * Configure/autoconfigure the port. 1040ab4382d2SGreg Kroah-Hartman */ 1041ab4382d2SGreg Kroah-Hartman static void imx_config_port(struct uart_port *port, int flags) 1042ab4382d2SGreg Kroah-Hartman { 1043ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 1044ab4382d2SGreg Kroah-Hartman 1045ab4382d2SGreg Kroah-Hartman if (flags & UART_CONFIG_TYPE && 1046ab4382d2SGreg Kroah-Hartman imx_request_port(&sport->port) == 0) 1047ab4382d2SGreg Kroah-Hartman sport->port.type = PORT_IMX; 1048ab4382d2SGreg Kroah-Hartman } 1049ab4382d2SGreg Kroah-Hartman 1050ab4382d2SGreg Kroah-Hartman /* 1051ab4382d2SGreg Kroah-Hartman * Verify the new serial_struct (for TIOCSSERIAL). 1052ab4382d2SGreg Kroah-Hartman * The only change we allow are to the flags and type, and 1053ab4382d2SGreg Kroah-Hartman * even then only between PORT_IMX and PORT_UNKNOWN 1054ab4382d2SGreg Kroah-Hartman */ 1055ab4382d2SGreg Kroah-Hartman static int 1056ab4382d2SGreg Kroah-Hartman imx_verify_port(struct uart_port *port, struct serial_struct *ser) 1057ab4382d2SGreg Kroah-Hartman { 1058ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 1059ab4382d2SGreg Kroah-Hartman int ret = 0; 1060ab4382d2SGreg Kroah-Hartman 1061ab4382d2SGreg Kroah-Hartman if (ser->type != PORT_UNKNOWN && ser->type != PORT_IMX) 1062ab4382d2SGreg Kroah-Hartman ret = -EINVAL; 1063ab4382d2SGreg Kroah-Hartman if (sport->port.irq != ser->irq) 1064ab4382d2SGreg Kroah-Hartman ret = -EINVAL; 1065ab4382d2SGreg Kroah-Hartman if (ser->io_type != UPIO_MEM) 1066ab4382d2SGreg Kroah-Hartman ret = -EINVAL; 1067ab4382d2SGreg Kroah-Hartman if (sport->port.uartclk / 16 != ser->baud_base) 1068ab4382d2SGreg Kroah-Hartman ret = -EINVAL; 1069ab4382d2SGreg Kroah-Hartman if ((void *)sport->port.mapbase != ser->iomem_base) 1070ab4382d2SGreg Kroah-Hartman ret = -EINVAL; 1071ab4382d2SGreg Kroah-Hartman if (sport->port.iobase != ser->port) 1072ab4382d2SGreg Kroah-Hartman ret = -EINVAL; 1073ab4382d2SGreg Kroah-Hartman if (ser->hub6 != 0) 1074ab4382d2SGreg Kroah-Hartman ret = -EINVAL; 1075ab4382d2SGreg Kroah-Hartman return ret; 1076ab4382d2SGreg Kroah-Hartman } 1077ab4382d2SGreg Kroah-Hartman 1078ab4382d2SGreg Kroah-Hartman static struct uart_ops imx_pops = { 1079ab4382d2SGreg Kroah-Hartman .tx_empty = imx_tx_empty, 1080ab4382d2SGreg Kroah-Hartman .set_mctrl = imx_set_mctrl, 1081ab4382d2SGreg Kroah-Hartman .get_mctrl = imx_get_mctrl, 1082ab4382d2SGreg Kroah-Hartman .stop_tx = imx_stop_tx, 1083ab4382d2SGreg Kroah-Hartman .start_tx = imx_start_tx, 1084ab4382d2SGreg Kroah-Hartman .stop_rx = imx_stop_rx, 1085ab4382d2SGreg Kroah-Hartman .enable_ms = imx_enable_ms, 1086ab4382d2SGreg Kroah-Hartman .break_ctl = imx_break_ctl, 1087ab4382d2SGreg Kroah-Hartman .startup = imx_startup, 1088ab4382d2SGreg Kroah-Hartman .shutdown = imx_shutdown, 1089ab4382d2SGreg Kroah-Hartman .set_termios = imx_set_termios, 1090ab4382d2SGreg Kroah-Hartman .type = imx_type, 1091ab4382d2SGreg Kroah-Hartman .release_port = imx_release_port, 1092ab4382d2SGreg Kroah-Hartman .request_port = imx_request_port, 1093ab4382d2SGreg Kroah-Hartman .config_port = imx_config_port, 1094ab4382d2SGreg Kroah-Hartman .verify_port = imx_verify_port, 1095ab4382d2SGreg Kroah-Hartman }; 1096ab4382d2SGreg Kroah-Hartman 1097ab4382d2SGreg Kroah-Hartman static struct imx_port *imx_ports[UART_NR]; 1098ab4382d2SGreg Kroah-Hartman 1099ab4382d2SGreg Kroah-Hartman #ifdef CONFIG_SERIAL_IMX_CONSOLE 1100ab4382d2SGreg Kroah-Hartman static void imx_console_putchar(struct uart_port *port, int ch) 1101ab4382d2SGreg Kroah-Hartman { 1102ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 1103ab4382d2SGreg Kroah-Hartman 1104fe6b540aSShawn Guo while (readl(sport->port.membase + uts_reg(sport)) & UTS_TXFULL) 1105ab4382d2SGreg Kroah-Hartman barrier(); 1106ab4382d2SGreg Kroah-Hartman 1107ab4382d2SGreg Kroah-Hartman writel(ch, sport->port.membase + URTX0); 1108ab4382d2SGreg Kroah-Hartman } 1109ab4382d2SGreg Kroah-Hartman 1110ab4382d2SGreg Kroah-Hartman /* 1111ab4382d2SGreg Kroah-Hartman * Interrupts are disabled on entering 1112ab4382d2SGreg Kroah-Hartman */ 1113ab4382d2SGreg Kroah-Hartman static void 1114ab4382d2SGreg Kroah-Hartman imx_console_write(struct console *co, const char *s, unsigned int count) 1115ab4382d2SGreg Kroah-Hartman { 1116ab4382d2SGreg Kroah-Hartman struct imx_port *sport = imx_ports[co->index]; 1117ab4382d2SGreg Kroah-Hartman unsigned int old_ucr1, old_ucr2, ucr1; 1118ab4382d2SGreg Kroah-Hartman 1119ab4382d2SGreg Kroah-Hartman /* 1120ab4382d2SGreg Kroah-Hartman * First, save UCR1/2 and then disable interrupts 1121ab4382d2SGreg Kroah-Hartman */ 1122ab4382d2SGreg Kroah-Hartman ucr1 = old_ucr1 = readl(sport->port.membase + UCR1); 1123ab4382d2SGreg Kroah-Hartman old_ucr2 = readl(sport->port.membase + UCR2); 1124ab4382d2SGreg Kroah-Hartman 1125fe6b540aSShawn Guo if (is_imx1_uart(sport)) 1126fe6b540aSShawn Guo ucr1 |= IMX1_UCR1_UARTCLKEN; 1127ab4382d2SGreg Kroah-Hartman ucr1 |= UCR1_UARTEN; 1128ab4382d2SGreg Kroah-Hartman ucr1 &= ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN); 1129ab4382d2SGreg Kroah-Hartman 1130ab4382d2SGreg Kroah-Hartman writel(ucr1, sport->port.membase + UCR1); 1131ab4382d2SGreg Kroah-Hartman 1132ab4382d2SGreg Kroah-Hartman writel(old_ucr2 | UCR2_TXEN, sport->port.membase + UCR2); 1133ab4382d2SGreg Kroah-Hartman 1134ab4382d2SGreg Kroah-Hartman uart_console_write(&sport->port, s, count, imx_console_putchar); 1135ab4382d2SGreg Kroah-Hartman 1136ab4382d2SGreg Kroah-Hartman /* 1137ab4382d2SGreg Kroah-Hartman * Finally, wait for transmitter to become empty 1138ab4382d2SGreg Kroah-Hartman * and restore UCR1/2 1139ab4382d2SGreg Kroah-Hartman */ 1140ab4382d2SGreg Kroah-Hartman while (!(readl(sport->port.membase + USR2) & USR2_TXDC)); 1141ab4382d2SGreg Kroah-Hartman 1142ab4382d2SGreg Kroah-Hartman writel(old_ucr1, sport->port.membase + UCR1); 1143ab4382d2SGreg Kroah-Hartman writel(old_ucr2, sport->port.membase + UCR2); 1144ab4382d2SGreg Kroah-Hartman } 1145ab4382d2SGreg Kroah-Hartman 1146ab4382d2SGreg Kroah-Hartman /* 1147ab4382d2SGreg Kroah-Hartman * If the port was already initialised (eg, by a boot loader), 1148ab4382d2SGreg Kroah-Hartman * try to determine the current setup. 1149ab4382d2SGreg Kroah-Hartman */ 1150ab4382d2SGreg Kroah-Hartman static void __init 1151ab4382d2SGreg Kroah-Hartman imx_console_get_options(struct imx_port *sport, int *baud, 1152ab4382d2SGreg Kroah-Hartman int *parity, int *bits) 1153ab4382d2SGreg Kroah-Hartman { 1154ab4382d2SGreg Kroah-Hartman 1155ab4382d2SGreg Kroah-Hartman if (readl(sport->port.membase + UCR1) & UCR1_UARTEN) { 1156ab4382d2SGreg Kroah-Hartman /* ok, the port was enabled */ 1157ab4382d2SGreg Kroah-Hartman unsigned int ucr2, ubir,ubmr, uartclk; 1158ab4382d2SGreg Kroah-Hartman unsigned int baud_raw; 1159ab4382d2SGreg Kroah-Hartman unsigned int ucfr_rfdiv; 1160ab4382d2SGreg Kroah-Hartman 1161ab4382d2SGreg Kroah-Hartman ucr2 = readl(sport->port.membase + UCR2); 1162ab4382d2SGreg Kroah-Hartman 1163ab4382d2SGreg Kroah-Hartman *parity = 'n'; 1164ab4382d2SGreg Kroah-Hartman if (ucr2 & UCR2_PREN) { 1165ab4382d2SGreg Kroah-Hartman if (ucr2 & UCR2_PROE) 1166ab4382d2SGreg Kroah-Hartman *parity = 'o'; 1167ab4382d2SGreg Kroah-Hartman else 1168ab4382d2SGreg Kroah-Hartman *parity = 'e'; 1169ab4382d2SGreg Kroah-Hartman } 1170ab4382d2SGreg Kroah-Hartman 1171ab4382d2SGreg Kroah-Hartman if (ucr2 & UCR2_WS) 1172ab4382d2SGreg Kroah-Hartman *bits = 8; 1173ab4382d2SGreg Kroah-Hartman else 1174ab4382d2SGreg Kroah-Hartman *bits = 7; 1175ab4382d2SGreg Kroah-Hartman 1176ab4382d2SGreg Kroah-Hartman ubir = readl(sport->port.membase + UBIR) & 0xffff; 1177ab4382d2SGreg Kroah-Hartman ubmr = readl(sport->port.membase + UBMR) & 0xffff; 1178ab4382d2SGreg Kroah-Hartman 1179ab4382d2SGreg Kroah-Hartman ucfr_rfdiv = (readl(sport->port.membase + UFCR) & UFCR_RFDIV) >> 7; 1180ab4382d2SGreg Kroah-Hartman if (ucfr_rfdiv == 6) 1181ab4382d2SGreg Kroah-Hartman ucfr_rfdiv = 7; 1182ab4382d2SGreg Kroah-Hartman else 1183ab4382d2SGreg Kroah-Hartman ucfr_rfdiv = 6 - ucfr_rfdiv; 1184ab4382d2SGreg Kroah-Hartman 1185ab4382d2SGreg Kroah-Hartman uartclk = clk_get_rate(sport->clk); 1186ab4382d2SGreg Kroah-Hartman uartclk /= ucfr_rfdiv; 1187ab4382d2SGreg Kroah-Hartman 1188ab4382d2SGreg Kroah-Hartman { /* 1189ab4382d2SGreg Kroah-Hartman * The next code provides exact computation of 1190ab4382d2SGreg Kroah-Hartman * baud_raw = round(((uartclk/16) * (ubir + 1)) / (ubmr + 1)) 1191ab4382d2SGreg Kroah-Hartman * without need of float support or long long division, 1192ab4382d2SGreg Kroah-Hartman * which would be required to prevent 32bit arithmetic overflow 1193ab4382d2SGreg Kroah-Hartman */ 1194ab4382d2SGreg Kroah-Hartman unsigned int mul = ubir + 1; 1195ab4382d2SGreg Kroah-Hartman unsigned int div = 16 * (ubmr + 1); 1196ab4382d2SGreg Kroah-Hartman unsigned int rem = uartclk % div; 1197ab4382d2SGreg Kroah-Hartman 1198ab4382d2SGreg Kroah-Hartman baud_raw = (uartclk / div) * mul; 1199ab4382d2SGreg Kroah-Hartman baud_raw += (rem * mul + div / 2) / div; 1200ab4382d2SGreg Kroah-Hartman *baud = (baud_raw + 50) / 100 * 100; 1201ab4382d2SGreg Kroah-Hartman } 1202ab4382d2SGreg Kroah-Hartman 1203ab4382d2SGreg Kroah-Hartman if(*baud != baud_raw) 1204ab4382d2SGreg Kroah-Hartman printk(KERN_INFO "Serial: Console IMX rounded baud rate from %d to %d\n", 1205ab4382d2SGreg Kroah-Hartman baud_raw, *baud); 1206ab4382d2SGreg Kroah-Hartman } 1207ab4382d2SGreg Kroah-Hartman } 1208ab4382d2SGreg Kroah-Hartman 1209ab4382d2SGreg Kroah-Hartman static int __init 1210ab4382d2SGreg Kroah-Hartman imx_console_setup(struct console *co, char *options) 1211ab4382d2SGreg Kroah-Hartman { 1212ab4382d2SGreg Kroah-Hartman struct imx_port *sport; 1213ab4382d2SGreg Kroah-Hartman int baud = 9600; 1214ab4382d2SGreg Kroah-Hartman int bits = 8; 1215ab4382d2SGreg Kroah-Hartman int parity = 'n'; 1216ab4382d2SGreg Kroah-Hartman int flow = 'n'; 1217ab4382d2SGreg Kroah-Hartman 1218ab4382d2SGreg Kroah-Hartman /* 1219ab4382d2SGreg Kroah-Hartman * Check whether an invalid uart number has been specified, and 1220ab4382d2SGreg Kroah-Hartman * if so, search for the first available port that does have 1221ab4382d2SGreg Kroah-Hartman * console support. 1222ab4382d2SGreg Kroah-Hartman */ 1223ab4382d2SGreg Kroah-Hartman if (co->index == -1 || co->index >= ARRAY_SIZE(imx_ports)) 1224ab4382d2SGreg Kroah-Hartman co->index = 0; 1225ab4382d2SGreg Kroah-Hartman sport = imx_ports[co->index]; 1226ab4382d2SGreg Kroah-Hartman if(sport == NULL) 1227ab4382d2SGreg Kroah-Hartman return -ENODEV; 1228ab4382d2SGreg Kroah-Hartman 1229ab4382d2SGreg Kroah-Hartman if (options) 1230ab4382d2SGreg Kroah-Hartman uart_parse_options(options, &baud, &parity, &bits, &flow); 1231ab4382d2SGreg Kroah-Hartman else 1232ab4382d2SGreg Kroah-Hartman imx_console_get_options(sport, &baud, &parity, &bits); 1233ab4382d2SGreg Kroah-Hartman 1234ab4382d2SGreg Kroah-Hartman imx_setup_ufcr(sport, 0); 1235ab4382d2SGreg Kroah-Hartman 1236ab4382d2SGreg Kroah-Hartman return uart_set_options(&sport->port, co, baud, parity, bits, flow); 1237ab4382d2SGreg Kroah-Hartman } 1238ab4382d2SGreg Kroah-Hartman 1239ab4382d2SGreg Kroah-Hartman static struct uart_driver imx_reg; 1240ab4382d2SGreg Kroah-Hartman static struct console imx_console = { 1241ab4382d2SGreg Kroah-Hartman .name = DEV_NAME, 1242ab4382d2SGreg Kroah-Hartman .write = imx_console_write, 1243ab4382d2SGreg Kroah-Hartman .device = uart_console_device, 1244ab4382d2SGreg Kroah-Hartman .setup = imx_console_setup, 1245ab4382d2SGreg Kroah-Hartman .flags = CON_PRINTBUFFER, 1246ab4382d2SGreg Kroah-Hartman .index = -1, 1247ab4382d2SGreg Kroah-Hartman .data = &imx_reg, 1248ab4382d2SGreg Kroah-Hartman }; 1249ab4382d2SGreg Kroah-Hartman 1250ab4382d2SGreg Kroah-Hartman #define IMX_CONSOLE &imx_console 1251ab4382d2SGreg Kroah-Hartman #else 1252ab4382d2SGreg Kroah-Hartman #define IMX_CONSOLE NULL 1253ab4382d2SGreg Kroah-Hartman #endif 1254ab4382d2SGreg Kroah-Hartman 1255ab4382d2SGreg Kroah-Hartman static struct uart_driver imx_reg = { 1256ab4382d2SGreg Kroah-Hartman .owner = THIS_MODULE, 1257ab4382d2SGreg Kroah-Hartman .driver_name = DRIVER_NAME, 1258ab4382d2SGreg Kroah-Hartman .dev_name = DEV_NAME, 1259ab4382d2SGreg Kroah-Hartman .major = SERIAL_IMX_MAJOR, 1260ab4382d2SGreg Kroah-Hartman .minor = MINOR_START, 1261ab4382d2SGreg Kroah-Hartman .nr = ARRAY_SIZE(imx_ports), 1262ab4382d2SGreg Kroah-Hartman .cons = IMX_CONSOLE, 1263ab4382d2SGreg Kroah-Hartman }; 1264ab4382d2SGreg Kroah-Hartman 1265ab4382d2SGreg Kroah-Hartman static int serial_imx_suspend(struct platform_device *dev, pm_message_t state) 1266ab4382d2SGreg Kroah-Hartman { 1267ab4382d2SGreg Kroah-Hartman struct imx_port *sport = platform_get_drvdata(dev); 1268ab4382d2SGreg Kroah-Hartman 1269ab4382d2SGreg Kroah-Hartman if (sport) 1270ab4382d2SGreg Kroah-Hartman uart_suspend_port(&imx_reg, &sport->port); 1271ab4382d2SGreg Kroah-Hartman 1272ab4382d2SGreg Kroah-Hartman return 0; 1273ab4382d2SGreg Kroah-Hartman } 1274ab4382d2SGreg Kroah-Hartman 1275ab4382d2SGreg Kroah-Hartman static int serial_imx_resume(struct platform_device *dev) 1276ab4382d2SGreg Kroah-Hartman { 1277ab4382d2SGreg Kroah-Hartman struct imx_port *sport = platform_get_drvdata(dev); 1278ab4382d2SGreg Kroah-Hartman 1279ab4382d2SGreg Kroah-Hartman if (sport) 1280ab4382d2SGreg Kroah-Hartman uart_resume_port(&imx_reg, &sport->port); 1281ab4382d2SGreg Kroah-Hartman 1282ab4382d2SGreg Kroah-Hartman return 0; 1283ab4382d2SGreg Kroah-Hartman } 1284ab4382d2SGreg Kroah-Hartman 128522698aa2SShawn Guo #ifdef CONFIG_OF 128622698aa2SShawn Guo static int serial_imx_probe_dt(struct imx_port *sport, 128722698aa2SShawn Guo struct platform_device *pdev) 128822698aa2SShawn Guo { 128922698aa2SShawn Guo struct device_node *np = pdev->dev.of_node; 129022698aa2SShawn Guo const struct of_device_id *of_id = 129122698aa2SShawn Guo of_match_device(imx_uart_dt_ids, &pdev->dev); 1292ff05967aSShawn Guo int ret; 129322698aa2SShawn Guo 129422698aa2SShawn Guo if (!np) 129522698aa2SShawn Guo return -ENODEV; 129622698aa2SShawn Guo 1297ff05967aSShawn Guo ret = of_alias_get_id(np, "serial"); 1298ff05967aSShawn Guo if (ret < 0) { 1299ff05967aSShawn Guo dev_err(&pdev->dev, "failed to get alias id, errno %d\n", ret); 1300ff05967aSShawn Guo return -ENODEV; 1301ff05967aSShawn Guo } 1302ff05967aSShawn Guo sport->port.line = ret; 130322698aa2SShawn Guo 130422698aa2SShawn Guo if (of_get_property(np, "fsl,uart-has-rtscts", NULL)) 130522698aa2SShawn Guo sport->have_rtscts = 1; 130622698aa2SShawn Guo 130722698aa2SShawn Guo if (of_get_property(np, "fsl,irda-mode", NULL)) 130822698aa2SShawn Guo sport->use_irda = 1; 130922698aa2SShawn Guo 131022698aa2SShawn Guo sport->devdata = of_id->data; 131122698aa2SShawn Guo 131222698aa2SShawn Guo return 0; 131322698aa2SShawn Guo } 131422698aa2SShawn Guo #else 131522698aa2SShawn Guo static inline int serial_imx_probe_dt(struct imx_port *sport, 131622698aa2SShawn Guo struct platform_device *pdev) 131722698aa2SShawn Guo { 131822698aa2SShawn Guo return -ENODEV; 131922698aa2SShawn Guo } 132022698aa2SShawn Guo #endif 132122698aa2SShawn Guo 132222698aa2SShawn Guo static void serial_imx_probe_pdata(struct imx_port *sport, 132322698aa2SShawn Guo struct platform_device *pdev) 132422698aa2SShawn Guo { 132522698aa2SShawn Guo struct imxuart_platform_data *pdata = pdev->dev.platform_data; 132622698aa2SShawn Guo 132722698aa2SShawn Guo sport->port.line = pdev->id; 132822698aa2SShawn Guo sport->devdata = (struct imx_uart_data *) pdev->id_entry->driver_data; 132922698aa2SShawn Guo 133022698aa2SShawn Guo if (!pdata) 133122698aa2SShawn Guo return; 133222698aa2SShawn Guo 133322698aa2SShawn Guo if (pdata->flags & IMXUART_HAVE_RTSCTS) 133422698aa2SShawn Guo sport->have_rtscts = 1; 133522698aa2SShawn Guo 133622698aa2SShawn Guo if (pdata->flags & IMXUART_IRDA) 133722698aa2SShawn Guo sport->use_irda = 1; 133822698aa2SShawn Guo } 133922698aa2SShawn Guo 1340ab4382d2SGreg Kroah-Hartman static int serial_imx_probe(struct platform_device *pdev) 1341ab4382d2SGreg Kroah-Hartman { 1342ab4382d2SGreg Kroah-Hartman struct imx_port *sport; 1343ab4382d2SGreg Kroah-Hartman struct imxuart_platform_data *pdata; 1344ab4382d2SGreg Kroah-Hartman void __iomem *base; 1345ab4382d2SGreg Kroah-Hartman int ret = 0; 1346ab4382d2SGreg Kroah-Hartman struct resource *res; 1347ab4382d2SGreg Kroah-Hartman 1348ab4382d2SGreg Kroah-Hartman sport = kzalloc(sizeof(*sport), GFP_KERNEL); 1349ab4382d2SGreg Kroah-Hartman if (!sport) 1350ab4382d2SGreg Kroah-Hartman return -ENOMEM; 1351ab4382d2SGreg Kroah-Hartman 135222698aa2SShawn Guo ret = serial_imx_probe_dt(sport, pdev); 135322698aa2SShawn Guo if (ret == -ENODEV) 135422698aa2SShawn Guo serial_imx_probe_pdata(sport, pdev); 135522698aa2SShawn Guo 1356ab4382d2SGreg Kroah-Hartman res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1357ab4382d2SGreg Kroah-Hartman if (!res) { 1358ab4382d2SGreg Kroah-Hartman ret = -ENODEV; 1359ab4382d2SGreg Kroah-Hartman goto free; 1360ab4382d2SGreg Kroah-Hartman } 1361ab4382d2SGreg Kroah-Hartman 1362ab4382d2SGreg Kroah-Hartman base = ioremap(res->start, PAGE_SIZE); 1363ab4382d2SGreg Kroah-Hartman if (!base) { 1364ab4382d2SGreg Kroah-Hartman ret = -ENOMEM; 1365ab4382d2SGreg Kroah-Hartman goto free; 1366ab4382d2SGreg Kroah-Hartman } 1367ab4382d2SGreg Kroah-Hartman 1368ab4382d2SGreg Kroah-Hartman sport->port.dev = &pdev->dev; 1369ab4382d2SGreg Kroah-Hartman sport->port.mapbase = res->start; 1370ab4382d2SGreg Kroah-Hartman sport->port.membase = base; 1371ab4382d2SGreg Kroah-Hartman sport->port.type = PORT_IMX, 1372ab4382d2SGreg Kroah-Hartman sport->port.iotype = UPIO_MEM; 1373ab4382d2SGreg Kroah-Hartman sport->port.irq = platform_get_irq(pdev, 0); 1374ab4382d2SGreg Kroah-Hartman sport->rxirq = platform_get_irq(pdev, 0); 1375ab4382d2SGreg Kroah-Hartman sport->txirq = platform_get_irq(pdev, 1); 1376ab4382d2SGreg Kroah-Hartman sport->rtsirq = platform_get_irq(pdev, 2); 1377ab4382d2SGreg Kroah-Hartman sport->port.fifosize = 32; 1378ab4382d2SGreg Kroah-Hartman sport->port.ops = &imx_pops; 1379ab4382d2SGreg Kroah-Hartman sport->port.flags = UPF_BOOT_AUTOCONF; 1380ab4382d2SGreg Kroah-Hartman init_timer(&sport->timer); 1381ab4382d2SGreg Kroah-Hartman sport->timer.function = imx_timeout; 1382ab4382d2SGreg Kroah-Hartman sport->timer.data = (unsigned long)sport; 1383ab4382d2SGreg Kroah-Hartman 1384ab4382d2SGreg Kroah-Hartman sport->clk = clk_get(&pdev->dev, "uart"); 1385ab4382d2SGreg Kroah-Hartman if (IS_ERR(sport->clk)) { 1386ab4382d2SGreg Kroah-Hartman ret = PTR_ERR(sport->clk); 1387ab4382d2SGreg Kroah-Hartman goto unmap; 1388ab4382d2SGreg Kroah-Hartman } 1389ab4382d2SGreg Kroah-Hartman clk_enable(sport->clk); 1390ab4382d2SGreg Kroah-Hartman 1391ab4382d2SGreg Kroah-Hartman sport->port.uartclk = clk_get_rate(sport->clk); 1392ab4382d2SGreg Kroah-Hartman 139322698aa2SShawn Guo imx_ports[sport->port.line] = sport; 1394ab4382d2SGreg Kroah-Hartman 1395ab4382d2SGreg Kroah-Hartman pdata = pdev->dev.platform_data; 1396ab4382d2SGreg Kroah-Hartman if (pdata && pdata->init) { 1397ab4382d2SGreg Kroah-Hartman ret = pdata->init(pdev); 1398ab4382d2SGreg Kroah-Hartman if (ret) 1399ab4382d2SGreg Kroah-Hartman goto clkput; 1400ab4382d2SGreg Kroah-Hartman } 1401ab4382d2SGreg Kroah-Hartman 1402ab4382d2SGreg Kroah-Hartman ret = uart_add_one_port(&imx_reg, &sport->port); 1403ab4382d2SGreg Kroah-Hartman if (ret) 1404ab4382d2SGreg Kroah-Hartman goto deinit; 1405ab4382d2SGreg Kroah-Hartman platform_set_drvdata(pdev, &sport->port); 1406ab4382d2SGreg Kroah-Hartman 1407ab4382d2SGreg Kroah-Hartman return 0; 1408ab4382d2SGreg Kroah-Hartman deinit: 1409ab4382d2SGreg Kroah-Hartman if (pdata && pdata->exit) 1410ab4382d2SGreg Kroah-Hartman pdata->exit(pdev); 1411ab4382d2SGreg Kroah-Hartman clkput: 1412ab4382d2SGreg Kroah-Hartman clk_put(sport->clk); 1413ab4382d2SGreg Kroah-Hartman clk_disable(sport->clk); 1414ab4382d2SGreg Kroah-Hartman unmap: 1415ab4382d2SGreg Kroah-Hartman iounmap(sport->port.membase); 1416ab4382d2SGreg Kroah-Hartman free: 1417ab4382d2SGreg Kroah-Hartman kfree(sport); 1418ab4382d2SGreg Kroah-Hartman 1419ab4382d2SGreg Kroah-Hartman return ret; 1420ab4382d2SGreg Kroah-Hartman } 1421ab4382d2SGreg Kroah-Hartman 1422ab4382d2SGreg Kroah-Hartman static int serial_imx_remove(struct platform_device *pdev) 1423ab4382d2SGreg Kroah-Hartman { 1424ab4382d2SGreg Kroah-Hartman struct imxuart_platform_data *pdata; 1425ab4382d2SGreg Kroah-Hartman struct imx_port *sport = platform_get_drvdata(pdev); 1426ab4382d2SGreg Kroah-Hartman 1427ab4382d2SGreg Kroah-Hartman pdata = pdev->dev.platform_data; 1428ab4382d2SGreg Kroah-Hartman 1429ab4382d2SGreg Kroah-Hartman platform_set_drvdata(pdev, NULL); 1430ab4382d2SGreg Kroah-Hartman 1431ab4382d2SGreg Kroah-Hartman if (sport) { 1432ab4382d2SGreg Kroah-Hartman uart_remove_one_port(&imx_reg, &sport->port); 1433ab4382d2SGreg Kroah-Hartman clk_put(sport->clk); 1434ab4382d2SGreg Kroah-Hartman } 1435ab4382d2SGreg Kroah-Hartman 1436ab4382d2SGreg Kroah-Hartman clk_disable(sport->clk); 1437ab4382d2SGreg Kroah-Hartman 1438ab4382d2SGreg Kroah-Hartman if (pdata && pdata->exit) 1439ab4382d2SGreg Kroah-Hartman pdata->exit(pdev); 1440ab4382d2SGreg Kroah-Hartman 1441ab4382d2SGreg Kroah-Hartman iounmap(sport->port.membase); 1442ab4382d2SGreg Kroah-Hartman kfree(sport); 1443ab4382d2SGreg Kroah-Hartman 1444ab4382d2SGreg Kroah-Hartman return 0; 1445ab4382d2SGreg Kroah-Hartman } 1446ab4382d2SGreg Kroah-Hartman 1447ab4382d2SGreg Kroah-Hartman static struct platform_driver serial_imx_driver = { 1448ab4382d2SGreg Kroah-Hartman .probe = serial_imx_probe, 1449ab4382d2SGreg Kroah-Hartman .remove = serial_imx_remove, 1450ab4382d2SGreg Kroah-Hartman 1451ab4382d2SGreg Kroah-Hartman .suspend = serial_imx_suspend, 1452ab4382d2SGreg Kroah-Hartman .resume = serial_imx_resume, 1453fe6b540aSShawn Guo .id_table = imx_uart_devtype, 1454ab4382d2SGreg Kroah-Hartman .driver = { 1455ab4382d2SGreg Kroah-Hartman .name = "imx-uart", 1456ab4382d2SGreg Kroah-Hartman .owner = THIS_MODULE, 145722698aa2SShawn Guo .of_match_table = imx_uart_dt_ids, 1458ab4382d2SGreg Kroah-Hartman }, 1459ab4382d2SGreg Kroah-Hartman }; 1460ab4382d2SGreg Kroah-Hartman 1461ab4382d2SGreg Kroah-Hartman static int __init imx_serial_init(void) 1462ab4382d2SGreg Kroah-Hartman { 1463ab4382d2SGreg Kroah-Hartman int ret; 1464ab4382d2SGreg Kroah-Hartman 1465ab4382d2SGreg Kroah-Hartman printk(KERN_INFO "Serial: IMX driver\n"); 1466ab4382d2SGreg Kroah-Hartman 1467ab4382d2SGreg Kroah-Hartman ret = uart_register_driver(&imx_reg); 1468ab4382d2SGreg Kroah-Hartman if (ret) 1469ab4382d2SGreg Kroah-Hartman return ret; 1470ab4382d2SGreg Kroah-Hartman 1471ab4382d2SGreg Kroah-Hartman ret = platform_driver_register(&serial_imx_driver); 1472ab4382d2SGreg Kroah-Hartman if (ret != 0) 1473ab4382d2SGreg Kroah-Hartman uart_unregister_driver(&imx_reg); 1474ab4382d2SGreg Kroah-Hartman 1475ab4382d2SGreg Kroah-Hartman return 0; 1476ab4382d2SGreg Kroah-Hartman } 1477ab4382d2SGreg Kroah-Hartman 1478ab4382d2SGreg Kroah-Hartman static void __exit imx_serial_exit(void) 1479ab4382d2SGreg Kroah-Hartman { 1480ab4382d2SGreg Kroah-Hartman platform_driver_unregister(&serial_imx_driver); 1481ab4382d2SGreg Kroah-Hartman uart_unregister_driver(&imx_reg); 1482ab4382d2SGreg Kroah-Hartman } 1483ab4382d2SGreg Kroah-Hartman 1484ab4382d2SGreg Kroah-Hartman module_init(imx_serial_init); 1485ab4382d2SGreg Kroah-Hartman module_exit(imx_serial_exit); 1486ab4382d2SGreg Kroah-Hartman 1487ab4382d2SGreg Kroah-Hartman MODULE_AUTHOR("Sascha Hauer"); 1488ab4382d2SGreg Kroah-Hartman MODULE_DESCRIPTION("IMX generic serial port driver"); 1489ab4382d2SGreg Kroah-Hartman MODULE_LICENSE("GPL"); 1490ab4382d2SGreg Kroah-Hartman MODULE_ALIAS("platform:imx-uart"); 1491