1ab4382d2SGreg Kroah-Hartman /* 2ab4382d2SGreg Kroah-Hartman * Driver for Motorola IMX serial ports 3ab4382d2SGreg Kroah-Hartman * 4ab4382d2SGreg Kroah-Hartman * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o. 5ab4382d2SGreg Kroah-Hartman * 6ab4382d2SGreg Kroah-Hartman * Author: Sascha Hauer <sascha@saschahauer.de> 7ab4382d2SGreg Kroah-Hartman * Copyright (C) 2004 Pengutronix 8ab4382d2SGreg Kroah-Hartman * 9ab4382d2SGreg Kroah-Hartman * Copyright (C) 2009 emlix GmbH 10ab4382d2SGreg Kroah-Hartman * Author: Fabian Godehardt (added IrDA support for iMX) 11ab4382d2SGreg Kroah-Hartman * 12ab4382d2SGreg Kroah-Hartman * This program is free software; you can redistribute it and/or modify 13ab4382d2SGreg Kroah-Hartman * it under the terms of the GNU General Public License as published by 14ab4382d2SGreg Kroah-Hartman * the Free Software Foundation; either version 2 of the License, or 15ab4382d2SGreg Kroah-Hartman * (at your option) any later version. 16ab4382d2SGreg Kroah-Hartman * 17ab4382d2SGreg Kroah-Hartman * This program is distributed in the hope that it will be useful, 18ab4382d2SGreg Kroah-Hartman * but WITHOUT ANY WARRANTY; without even the implied warranty of 19ab4382d2SGreg Kroah-Hartman * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20ab4382d2SGreg Kroah-Hartman * GNU General Public License for more details. 21ab4382d2SGreg Kroah-Hartman * 22ab4382d2SGreg Kroah-Hartman * You should have received a copy of the GNU General Public License 23ab4382d2SGreg Kroah-Hartman * along with this program; if not, write to the Free Software 24ab4382d2SGreg Kroah-Hartman * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 25ab4382d2SGreg Kroah-Hartman * 26ab4382d2SGreg Kroah-Hartman * [29-Mar-2005] Mike Lee 27ab4382d2SGreg Kroah-Hartman * Added hardware handshake 28ab4382d2SGreg Kroah-Hartman */ 29ab4382d2SGreg Kroah-Hartman 30ab4382d2SGreg Kroah-Hartman #if defined(CONFIG_SERIAL_IMX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) 31ab4382d2SGreg Kroah-Hartman #define SUPPORT_SYSRQ 32ab4382d2SGreg Kroah-Hartman #endif 33ab4382d2SGreg Kroah-Hartman 34ab4382d2SGreg Kroah-Hartman #include <linux/module.h> 35ab4382d2SGreg Kroah-Hartman #include <linux/ioport.h> 36ab4382d2SGreg Kroah-Hartman #include <linux/init.h> 37ab4382d2SGreg Kroah-Hartman #include <linux/console.h> 38ab4382d2SGreg Kroah-Hartman #include <linux/sysrq.h> 39ab4382d2SGreg Kroah-Hartman #include <linux/platform_device.h> 40ab4382d2SGreg Kroah-Hartman #include <linux/tty.h> 41ab4382d2SGreg Kroah-Hartman #include <linux/tty_flip.h> 42ab4382d2SGreg Kroah-Hartman #include <linux/serial_core.h> 43ab4382d2SGreg Kroah-Hartman #include <linux/serial.h> 44ab4382d2SGreg Kroah-Hartman #include <linux/clk.h> 45ab4382d2SGreg Kroah-Hartman #include <linux/delay.h> 46ab4382d2SGreg Kroah-Hartman #include <linux/rational.h> 47ab4382d2SGreg Kroah-Hartman #include <linux/slab.h> 4822698aa2SShawn Guo #include <linux/of.h> 4922698aa2SShawn Guo #include <linux/of_device.h> 50fed78ce4SShawn Guo #include <linux/pinctrl/consumer.h> 51e32a9f8fSSachin Kamat #include <linux/io.h> 52ab4382d2SGreg Kroah-Hartman 53ab4382d2SGreg Kroah-Hartman #include <asm/irq.h> 5482906b13SArnd Bergmann #include <linux/platform_data/serial-imx.h> 55ab4382d2SGreg Kroah-Hartman 56ab4382d2SGreg Kroah-Hartman /* Register definitions */ 57ab4382d2SGreg Kroah-Hartman #define URXD0 0x0 /* Receiver Register */ 58ab4382d2SGreg Kroah-Hartman #define URTX0 0x40 /* Transmitter Register */ 59ab4382d2SGreg Kroah-Hartman #define UCR1 0x80 /* Control Register 1 */ 60ab4382d2SGreg Kroah-Hartman #define UCR2 0x84 /* Control Register 2 */ 61ab4382d2SGreg Kroah-Hartman #define UCR3 0x88 /* Control Register 3 */ 62ab4382d2SGreg Kroah-Hartman #define UCR4 0x8c /* Control Register 4 */ 63ab4382d2SGreg Kroah-Hartman #define UFCR 0x90 /* FIFO Control Register */ 64ab4382d2SGreg Kroah-Hartman #define USR1 0x94 /* Status Register 1 */ 65ab4382d2SGreg Kroah-Hartman #define USR2 0x98 /* Status Register 2 */ 66ab4382d2SGreg Kroah-Hartman #define UESC 0x9c /* Escape Character Register */ 67ab4382d2SGreg Kroah-Hartman #define UTIM 0xa0 /* Escape Timer Register */ 68ab4382d2SGreg Kroah-Hartman #define UBIR 0xa4 /* BRM Incremental Register */ 69ab4382d2SGreg Kroah-Hartman #define UBMR 0xa8 /* BRM Modulator Register */ 70ab4382d2SGreg Kroah-Hartman #define UBRC 0xac /* Baud Rate Count Register */ 71fe6b540aSShawn Guo #define IMX21_ONEMS 0xb0 /* One Millisecond register */ 72fe6b540aSShawn Guo #define IMX1_UTS 0xd0 /* UART Test Register on i.mx1 */ 73fe6b540aSShawn Guo #define IMX21_UTS 0xb4 /* UART Test Register on all other i.mx*/ 74ab4382d2SGreg Kroah-Hartman 75ab4382d2SGreg Kroah-Hartman /* UART Control Register Bit Fields.*/ 76ab4382d2SGreg Kroah-Hartman #define URXD_CHARRDY (1<<15) 77ab4382d2SGreg Kroah-Hartman #define URXD_ERR (1<<14) 78ab4382d2SGreg Kroah-Hartman #define URXD_OVRRUN (1<<13) 79ab4382d2SGreg Kroah-Hartman #define URXD_FRMERR (1<<12) 80ab4382d2SGreg Kroah-Hartman #define URXD_BRK (1<<11) 81ab4382d2SGreg Kroah-Hartman #define URXD_PRERR (1<<10) 8225985edcSLucas De Marchi #define UCR1_ADEN (1<<15) /* Auto detect interrupt */ 83ab4382d2SGreg Kroah-Hartman #define UCR1_ADBR (1<<14) /* Auto detect baud rate */ 84ab4382d2SGreg Kroah-Hartman #define UCR1_TRDYEN (1<<13) /* Transmitter ready interrupt enable */ 85ab4382d2SGreg Kroah-Hartman #define UCR1_IDEN (1<<12) /* Idle condition interrupt */ 86ab4382d2SGreg Kroah-Hartman #define UCR1_RRDYEN (1<<9) /* Recv ready interrupt enable */ 87ab4382d2SGreg Kroah-Hartman #define UCR1_RDMAEN (1<<8) /* Recv ready DMA enable */ 88ab4382d2SGreg Kroah-Hartman #define UCR1_IREN (1<<7) /* Infrared interface enable */ 89ab4382d2SGreg Kroah-Hartman #define UCR1_TXMPTYEN (1<<6) /* Transimitter empty interrupt enable */ 90ab4382d2SGreg Kroah-Hartman #define UCR1_RTSDEN (1<<5) /* RTS delta interrupt enable */ 91ab4382d2SGreg Kroah-Hartman #define UCR1_SNDBRK (1<<4) /* Send break */ 92ab4382d2SGreg Kroah-Hartman #define UCR1_TDMAEN (1<<3) /* Transmitter ready DMA enable */ 93fe6b540aSShawn Guo #define IMX1_UCR1_UARTCLKEN (1<<2) /* UART clock enabled, i.mx1 only */ 94ab4382d2SGreg Kroah-Hartman #define UCR1_DOZE (1<<1) /* Doze */ 95ab4382d2SGreg Kroah-Hartman #define UCR1_UARTEN (1<<0) /* UART enabled */ 96ab4382d2SGreg Kroah-Hartman #define UCR2_ESCI (1<<15) /* Escape seq interrupt enable */ 97ab4382d2SGreg Kroah-Hartman #define UCR2_IRTS (1<<14) /* Ignore RTS pin */ 98ab4382d2SGreg Kroah-Hartman #define UCR2_CTSC (1<<13) /* CTS pin control */ 99ab4382d2SGreg Kroah-Hartman #define UCR2_CTS (1<<12) /* Clear to send */ 100ab4382d2SGreg Kroah-Hartman #define UCR2_ESCEN (1<<11) /* Escape enable */ 101ab4382d2SGreg Kroah-Hartman #define UCR2_PREN (1<<8) /* Parity enable */ 102ab4382d2SGreg Kroah-Hartman #define UCR2_PROE (1<<7) /* Parity odd/even */ 103ab4382d2SGreg Kroah-Hartman #define UCR2_STPB (1<<6) /* Stop */ 104ab4382d2SGreg Kroah-Hartman #define UCR2_WS (1<<5) /* Word size */ 105ab4382d2SGreg Kroah-Hartman #define UCR2_RTSEN (1<<4) /* Request to send interrupt enable */ 10601f56abdSSaleem Abdulrasool #define UCR2_ATEN (1<<3) /* Aging Timer Enable */ 107ab4382d2SGreg Kroah-Hartman #define UCR2_TXEN (1<<2) /* Transmitter enabled */ 108ab4382d2SGreg Kroah-Hartman #define UCR2_RXEN (1<<1) /* Receiver enabled */ 109ab4382d2SGreg Kroah-Hartman #define UCR2_SRST (1<<0) /* SW reset */ 110ab4382d2SGreg Kroah-Hartman #define UCR3_DTREN (1<<13) /* DTR interrupt enable */ 111ab4382d2SGreg Kroah-Hartman #define UCR3_PARERREN (1<<12) /* Parity enable */ 112ab4382d2SGreg Kroah-Hartman #define UCR3_FRAERREN (1<<11) /* Frame error interrupt enable */ 113ab4382d2SGreg Kroah-Hartman #define UCR3_DSR (1<<10) /* Data set ready */ 114ab4382d2SGreg Kroah-Hartman #define UCR3_DCD (1<<9) /* Data carrier detect */ 115ab4382d2SGreg Kroah-Hartman #define UCR3_RI (1<<8) /* Ring indicator */ 116ab4382d2SGreg Kroah-Hartman #define UCR3_TIMEOUTEN (1<<7) /* Timeout interrupt enable */ 117ab4382d2SGreg Kroah-Hartman #define UCR3_RXDSEN (1<<6) /* Receive status interrupt enable */ 118ab4382d2SGreg Kroah-Hartman #define UCR3_AIRINTEN (1<<5) /* Async IR wake interrupt enable */ 119ab4382d2SGreg Kroah-Hartman #define UCR3_AWAKEN (1<<4) /* Async wake interrupt enable */ 120fe6b540aSShawn Guo #define IMX21_UCR3_RXDMUXSEL (1<<2) /* RXD Muxed Input Select */ 121ab4382d2SGreg Kroah-Hartman #define UCR3_INVT (1<<1) /* Inverted Infrared transmission */ 122ab4382d2SGreg Kroah-Hartman #define UCR3_BPEN (1<<0) /* Preset registers enable */ 123ab4382d2SGreg Kroah-Hartman #define UCR4_CTSTL_SHF 10 /* CTS trigger level shift */ 124ab4382d2SGreg Kroah-Hartman #define UCR4_CTSTL_MASK 0x3F /* CTS trigger is 6 bits wide */ 125ab4382d2SGreg Kroah-Hartman #define UCR4_INVR (1<<9) /* Inverted infrared reception */ 126ab4382d2SGreg Kroah-Hartman #define UCR4_ENIRI (1<<8) /* Serial infrared interrupt enable */ 127ab4382d2SGreg Kroah-Hartman #define UCR4_WKEN (1<<7) /* Wake interrupt enable */ 128ab4382d2SGreg Kroah-Hartman #define UCR4_REF16 (1<<6) /* Ref freq 16 MHz */ 129ab4382d2SGreg Kroah-Hartman #define UCR4_IRSC (1<<5) /* IR special case */ 130ab4382d2SGreg Kroah-Hartman #define UCR4_TCEN (1<<3) /* Transmit complete interrupt enable */ 131ab4382d2SGreg Kroah-Hartman #define UCR4_BKEN (1<<2) /* Break condition interrupt enable */ 132ab4382d2SGreg Kroah-Hartman #define UCR4_OREN (1<<1) /* Receiver overrun interrupt enable */ 133ab4382d2SGreg Kroah-Hartman #define UCR4_DREN (1<<0) /* Recv data ready interrupt enable */ 134ab4382d2SGreg Kroah-Hartman #define UFCR_RXTL_SHF 0 /* Receiver trigger level shift */ 1357be0670fSDirk Behme #define UFCR_DCEDTE (1<<6) /* DCE/DTE mode select */ 136ab4382d2SGreg Kroah-Hartman #define UFCR_RFDIV (7<<7) /* Reference freq divider mask */ 137ab4382d2SGreg Kroah-Hartman #define UFCR_RFDIV_REG(x) (((x) < 7 ? 6 - (x) : 6) << 7) 138ab4382d2SGreg Kroah-Hartman #define UFCR_TXTL_SHF 10 /* Transmitter trigger level shift */ 139ab4382d2SGreg Kroah-Hartman #define USR1_PARITYERR (1<<15) /* Parity error interrupt flag */ 140ab4382d2SGreg Kroah-Hartman #define USR1_RTSS (1<<14) /* RTS pin status */ 141ab4382d2SGreg Kroah-Hartman #define USR1_TRDY (1<<13) /* Transmitter ready interrupt/dma flag */ 142ab4382d2SGreg Kroah-Hartman #define USR1_RTSD (1<<12) /* RTS delta */ 143ab4382d2SGreg Kroah-Hartman #define USR1_ESCF (1<<11) /* Escape seq interrupt flag */ 144ab4382d2SGreg Kroah-Hartman #define USR1_FRAMERR (1<<10) /* Frame error interrupt flag */ 145ab4382d2SGreg Kroah-Hartman #define USR1_RRDY (1<<9) /* Receiver ready interrupt/dma flag */ 146ab4382d2SGreg Kroah-Hartman #define USR1_TIMEOUT (1<<7) /* Receive timeout interrupt status */ 147ab4382d2SGreg Kroah-Hartman #define USR1_RXDS (1<<6) /* Receiver idle interrupt flag */ 148ab4382d2SGreg Kroah-Hartman #define USR1_AIRINT (1<<5) /* Async IR wake interrupt flag */ 149ab4382d2SGreg Kroah-Hartman #define USR1_AWAKE (1<<4) /* Aysnc wake interrupt flag */ 150ab4382d2SGreg Kroah-Hartman #define USR2_ADET (1<<15) /* Auto baud rate detect complete */ 151ab4382d2SGreg Kroah-Hartman #define USR2_TXFE (1<<14) /* Transmit buffer FIFO empty */ 152ab4382d2SGreg Kroah-Hartman #define USR2_DTRF (1<<13) /* DTR edge interrupt flag */ 153ab4382d2SGreg Kroah-Hartman #define USR2_IDLE (1<<12) /* Idle condition */ 154ab4382d2SGreg Kroah-Hartman #define USR2_IRINT (1<<8) /* Serial infrared interrupt flag */ 155ab4382d2SGreg Kroah-Hartman #define USR2_WAKE (1<<7) /* Wake */ 156ab4382d2SGreg Kroah-Hartman #define USR2_RTSF (1<<4) /* RTS edge interrupt flag */ 157ab4382d2SGreg Kroah-Hartman #define USR2_TXDC (1<<3) /* Transmitter complete */ 158ab4382d2SGreg Kroah-Hartman #define USR2_BRCD (1<<2) /* Break condition */ 159ab4382d2SGreg Kroah-Hartman #define USR2_ORE (1<<1) /* Overrun error */ 160ab4382d2SGreg Kroah-Hartman #define USR2_RDR (1<<0) /* Recv data ready */ 161ab4382d2SGreg Kroah-Hartman #define UTS_FRCPERR (1<<13) /* Force parity error */ 162ab4382d2SGreg Kroah-Hartman #define UTS_LOOP (1<<12) /* Loop tx and rx */ 163ab4382d2SGreg Kroah-Hartman #define UTS_TXEMPTY (1<<6) /* TxFIFO empty */ 164ab4382d2SGreg Kroah-Hartman #define UTS_RXEMPTY (1<<5) /* RxFIFO empty */ 165ab4382d2SGreg Kroah-Hartman #define UTS_TXFULL (1<<4) /* TxFIFO full */ 166ab4382d2SGreg Kroah-Hartman #define UTS_RXFULL (1<<3) /* RxFIFO full */ 167ab4382d2SGreg Kroah-Hartman #define UTS_SOFTRST (1<<0) /* Software reset */ 168ab4382d2SGreg Kroah-Hartman 169ab4382d2SGreg Kroah-Hartman /* We've been assigned a range on the "Low-density serial ports" major */ 170ab4382d2SGreg Kroah-Hartman #define SERIAL_IMX_MAJOR 207 171ab4382d2SGreg Kroah-Hartman #define MINOR_START 16 172ab4382d2SGreg Kroah-Hartman #define DEV_NAME "ttymxc" 173ab4382d2SGreg Kroah-Hartman 174ab4382d2SGreg Kroah-Hartman /* 175ab4382d2SGreg Kroah-Hartman * This determines how often we check the modem status signals 176ab4382d2SGreg Kroah-Hartman * for any change. They generally aren't connected to an IRQ 177ab4382d2SGreg Kroah-Hartman * so we have to poll them. We also check immediately before 178ab4382d2SGreg Kroah-Hartman * filling the TX fifo incase CTS has been dropped. 179ab4382d2SGreg Kroah-Hartman */ 180ab4382d2SGreg Kroah-Hartman #define MCTRL_TIMEOUT (250*HZ/1000) 181ab4382d2SGreg Kroah-Hartman 182ab4382d2SGreg Kroah-Hartman #define DRIVER_NAME "IMX-uart" 183ab4382d2SGreg Kroah-Hartman 184ab4382d2SGreg Kroah-Hartman #define UART_NR 8 185ab4382d2SGreg Kroah-Hartman 186fe6b540aSShawn Guo /* i.mx21 type uart runs on all i.mx except i.mx1 */ 187fe6b540aSShawn Guo enum imx_uart_type { 188fe6b540aSShawn Guo IMX1_UART, 189fe6b540aSShawn Guo IMX21_UART, 190fe6b540aSShawn Guo }; 191fe6b540aSShawn Guo 192fe6b540aSShawn Guo /* device type dependent stuff */ 193fe6b540aSShawn Guo struct imx_uart_data { 194fe6b540aSShawn Guo unsigned uts_reg; 195fe6b540aSShawn Guo enum imx_uart_type devtype; 196fe6b540aSShawn Guo }; 197fe6b540aSShawn Guo 198ab4382d2SGreg Kroah-Hartman struct imx_port { 199ab4382d2SGreg Kroah-Hartman struct uart_port port; 200ab4382d2SGreg Kroah-Hartman struct timer_list timer; 201ab4382d2SGreg Kroah-Hartman unsigned int old_status; 202ab4382d2SGreg Kroah-Hartman int txirq, rxirq, rtsirq; 203ab4382d2SGreg Kroah-Hartman unsigned int have_rtscts:1; 204ab4382d2SGreg Kroah-Hartman unsigned int use_irda:1; 205ab4382d2SGreg Kroah-Hartman unsigned int irda_inv_rx:1; 206ab4382d2SGreg Kroah-Hartman unsigned int irda_inv_tx:1; 207ab4382d2SGreg Kroah-Hartman unsigned short trcv_delay; /* transceiver delay */ 2083a9465faSSascha Hauer struct clk *clk_ipg; 2093a9465faSSascha Hauer struct clk *clk_per; 2107d0b066fSUwe Kleine-König const struct imx_uart_data *devdata; 211ab4382d2SGreg Kroah-Hartman }; 212ab4382d2SGreg Kroah-Hartman 2130ad5a814SDirk Behme struct imx_port_ucrs { 2140ad5a814SDirk Behme unsigned int ucr1; 2150ad5a814SDirk Behme unsigned int ucr2; 2160ad5a814SDirk Behme unsigned int ucr3; 2170ad5a814SDirk Behme }; 2180ad5a814SDirk Behme 219ab4382d2SGreg Kroah-Hartman #ifdef CONFIG_IRDA 220ab4382d2SGreg Kroah-Hartman #define USE_IRDA(sport) ((sport)->use_irda) 221ab4382d2SGreg Kroah-Hartman #else 222ab4382d2SGreg Kroah-Hartman #define USE_IRDA(sport) (0) 223ab4382d2SGreg Kroah-Hartman #endif 224ab4382d2SGreg Kroah-Hartman 225fe6b540aSShawn Guo static struct imx_uart_data imx_uart_devdata[] = { 226fe6b540aSShawn Guo [IMX1_UART] = { 227fe6b540aSShawn Guo .uts_reg = IMX1_UTS, 228fe6b540aSShawn Guo .devtype = IMX1_UART, 229fe6b540aSShawn Guo }, 230fe6b540aSShawn Guo [IMX21_UART] = { 231fe6b540aSShawn Guo .uts_reg = IMX21_UTS, 232fe6b540aSShawn Guo .devtype = IMX21_UART, 233fe6b540aSShawn Guo }, 234fe6b540aSShawn Guo }; 235fe6b540aSShawn Guo 236fe6b540aSShawn Guo static struct platform_device_id imx_uart_devtype[] = { 237fe6b540aSShawn Guo { 238fe6b540aSShawn Guo .name = "imx1-uart", 239fe6b540aSShawn Guo .driver_data = (kernel_ulong_t) &imx_uart_devdata[IMX1_UART], 240fe6b540aSShawn Guo }, { 241fe6b540aSShawn Guo .name = "imx21-uart", 242fe6b540aSShawn Guo .driver_data = (kernel_ulong_t) &imx_uart_devdata[IMX21_UART], 243fe6b540aSShawn Guo }, { 244fe6b540aSShawn Guo /* sentinel */ 245fe6b540aSShawn Guo } 246fe6b540aSShawn Guo }; 247fe6b540aSShawn Guo MODULE_DEVICE_TABLE(platform, imx_uart_devtype); 248fe6b540aSShawn Guo 24922698aa2SShawn Guo static struct of_device_id imx_uart_dt_ids[] = { 25022698aa2SShawn Guo { .compatible = "fsl,imx1-uart", .data = &imx_uart_devdata[IMX1_UART], }, 25122698aa2SShawn Guo { .compatible = "fsl,imx21-uart", .data = &imx_uart_devdata[IMX21_UART], }, 25222698aa2SShawn Guo { /* sentinel */ } 25322698aa2SShawn Guo }; 25422698aa2SShawn Guo MODULE_DEVICE_TABLE(of, imx_uart_dt_ids); 25522698aa2SShawn Guo 256fe6b540aSShawn Guo static inline unsigned uts_reg(struct imx_port *sport) 257fe6b540aSShawn Guo { 258fe6b540aSShawn Guo return sport->devdata->uts_reg; 259fe6b540aSShawn Guo } 260fe6b540aSShawn Guo 261fe6b540aSShawn Guo static inline int is_imx1_uart(struct imx_port *sport) 262fe6b540aSShawn Guo { 263fe6b540aSShawn Guo return sport->devdata->devtype == IMX1_UART; 264fe6b540aSShawn Guo } 265fe6b540aSShawn Guo 266fe6b540aSShawn Guo static inline int is_imx21_uart(struct imx_port *sport) 267fe6b540aSShawn Guo { 268fe6b540aSShawn Guo return sport->devdata->devtype == IMX21_UART; 269fe6b540aSShawn Guo } 270fe6b540aSShawn Guo 271ab4382d2SGreg Kroah-Hartman /* 27244a75411Sfabio.estevam@freescale.com * Save and restore functions for UCR1, UCR2 and UCR3 registers 27344a75411Sfabio.estevam@freescale.com */ 27444a75411Sfabio.estevam@freescale.com static void imx_port_ucrs_save(struct uart_port *port, 27544a75411Sfabio.estevam@freescale.com struct imx_port_ucrs *ucr) 27644a75411Sfabio.estevam@freescale.com { 27744a75411Sfabio.estevam@freescale.com /* save control registers */ 27844a75411Sfabio.estevam@freescale.com ucr->ucr1 = readl(port->membase + UCR1); 27944a75411Sfabio.estevam@freescale.com ucr->ucr2 = readl(port->membase + UCR2); 28044a75411Sfabio.estevam@freescale.com ucr->ucr3 = readl(port->membase + UCR3); 28144a75411Sfabio.estevam@freescale.com } 28244a75411Sfabio.estevam@freescale.com 28344a75411Sfabio.estevam@freescale.com static void imx_port_ucrs_restore(struct uart_port *port, 28444a75411Sfabio.estevam@freescale.com struct imx_port_ucrs *ucr) 28544a75411Sfabio.estevam@freescale.com { 28644a75411Sfabio.estevam@freescale.com /* restore control registers */ 28744a75411Sfabio.estevam@freescale.com writel(ucr->ucr1, port->membase + UCR1); 28844a75411Sfabio.estevam@freescale.com writel(ucr->ucr2, port->membase + UCR2); 28944a75411Sfabio.estevam@freescale.com writel(ucr->ucr3, port->membase + UCR3); 29044a75411Sfabio.estevam@freescale.com } 29144a75411Sfabio.estevam@freescale.com 29244a75411Sfabio.estevam@freescale.com /* 293ab4382d2SGreg Kroah-Hartman * Handle any change of modem status signal since we were last called. 294ab4382d2SGreg Kroah-Hartman */ 295ab4382d2SGreg Kroah-Hartman static void imx_mctrl_check(struct imx_port *sport) 296ab4382d2SGreg Kroah-Hartman { 297ab4382d2SGreg Kroah-Hartman unsigned int status, changed; 298ab4382d2SGreg Kroah-Hartman 299ab4382d2SGreg Kroah-Hartman status = sport->port.ops->get_mctrl(&sport->port); 300ab4382d2SGreg Kroah-Hartman changed = status ^ sport->old_status; 301ab4382d2SGreg Kroah-Hartman 302ab4382d2SGreg Kroah-Hartman if (changed == 0) 303ab4382d2SGreg Kroah-Hartman return; 304ab4382d2SGreg Kroah-Hartman 305ab4382d2SGreg Kroah-Hartman sport->old_status = status; 306ab4382d2SGreg Kroah-Hartman 307ab4382d2SGreg Kroah-Hartman if (changed & TIOCM_RI) 308ab4382d2SGreg Kroah-Hartman sport->port.icount.rng++; 309ab4382d2SGreg Kroah-Hartman if (changed & TIOCM_DSR) 310ab4382d2SGreg Kroah-Hartman sport->port.icount.dsr++; 311ab4382d2SGreg Kroah-Hartman if (changed & TIOCM_CAR) 312ab4382d2SGreg Kroah-Hartman uart_handle_dcd_change(&sport->port, status & TIOCM_CAR); 313ab4382d2SGreg Kroah-Hartman if (changed & TIOCM_CTS) 314ab4382d2SGreg Kroah-Hartman uart_handle_cts_change(&sport->port, status & TIOCM_CTS); 315ab4382d2SGreg Kroah-Hartman 316ab4382d2SGreg Kroah-Hartman wake_up_interruptible(&sport->port.state->port.delta_msr_wait); 317ab4382d2SGreg Kroah-Hartman } 318ab4382d2SGreg Kroah-Hartman 319ab4382d2SGreg Kroah-Hartman /* 320ab4382d2SGreg Kroah-Hartman * This is our per-port timeout handler, for checking the 321ab4382d2SGreg Kroah-Hartman * modem status signals. 322ab4382d2SGreg Kroah-Hartman */ 323ab4382d2SGreg Kroah-Hartman static void imx_timeout(unsigned long data) 324ab4382d2SGreg Kroah-Hartman { 325ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)data; 326ab4382d2SGreg Kroah-Hartman unsigned long flags; 327ab4382d2SGreg Kroah-Hartman 328ab4382d2SGreg Kroah-Hartman if (sport->port.state) { 329ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&sport->port.lock, flags); 330ab4382d2SGreg Kroah-Hartman imx_mctrl_check(sport); 331ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&sport->port.lock, flags); 332ab4382d2SGreg Kroah-Hartman 333ab4382d2SGreg Kroah-Hartman mod_timer(&sport->timer, jiffies + MCTRL_TIMEOUT); 334ab4382d2SGreg Kroah-Hartman } 335ab4382d2SGreg Kroah-Hartman } 336ab4382d2SGreg Kroah-Hartman 337ab4382d2SGreg Kroah-Hartman /* 338ab4382d2SGreg Kroah-Hartman * interrupts disabled on entry 339ab4382d2SGreg Kroah-Hartman */ 340ab4382d2SGreg Kroah-Hartman static void imx_stop_tx(struct uart_port *port) 341ab4382d2SGreg Kroah-Hartman { 342ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 343ab4382d2SGreg Kroah-Hartman unsigned long temp; 344ab4382d2SGreg Kroah-Hartman 345ab4382d2SGreg Kroah-Hartman if (USE_IRDA(sport)) { 346ab4382d2SGreg Kroah-Hartman /* half duplex - wait for end of transmission */ 347ab4382d2SGreg Kroah-Hartman int n = 256; 348ab4382d2SGreg Kroah-Hartman while ((--n > 0) && 349ab4382d2SGreg Kroah-Hartman !(readl(sport->port.membase + USR2) & USR2_TXDC)) { 350ab4382d2SGreg Kroah-Hartman udelay(5); 351ab4382d2SGreg Kroah-Hartman barrier(); 352ab4382d2SGreg Kroah-Hartman } 353ab4382d2SGreg Kroah-Hartman /* 354ab4382d2SGreg Kroah-Hartman * irda transceiver - wait a bit more to avoid 355ab4382d2SGreg Kroah-Hartman * cutoff, hardware dependent 356ab4382d2SGreg Kroah-Hartman */ 357ab4382d2SGreg Kroah-Hartman udelay(sport->trcv_delay); 358ab4382d2SGreg Kroah-Hartman 359ab4382d2SGreg Kroah-Hartman /* 360ab4382d2SGreg Kroah-Hartman * half duplex - reactivate receive mode, 361ab4382d2SGreg Kroah-Hartman * flush receive pipe echo crap 362ab4382d2SGreg Kroah-Hartman */ 363ab4382d2SGreg Kroah-Hartman if (readl(sport->port.membase + USR2) & USR2_TXDC) { 364ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR1); 365ab4382d2SGreg Kroah-Hartman temp &= ~(UCR1_TXMPTYEN | UCR1_TRDYEN); 366ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR1); 367ab4382d2SGreg Kroah-Hartman 368ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR4); 369ab4382d2SGreg Kroah-Hartman temp &= ~(UCR4_TCEN); 370ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR4); 371ab4382d2SGreg Kroah-Hartman 372ab4382d2SGreg Kroah-Hartman while (readl(sport->port.membase + URXD0) & 373ab4382d2SGreg Kroah-Hartman URXD_CHARRDY) 374ab4382d2SGreg Kroah-Hartman barrier(); 375ab4382d2SGreg Kroah-Hartman 376ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR1); 377ab4382d2SGreg Kroah-Hartman temp |= UCR1_RRDYEN; 378ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR1); 379ab4382d2SGreg Kroah-Hartman 380ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR4); 381ab4382d2SGreg Kroah-Hartman temp |= UCR4_DREN; 382ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR4); 383ab4382d2SGreg Kroah-Hartman } 384ab4382d2SGreg Kroah-Hartman return; 385ab4382d2SGreg Kroah-Hartman } 386ab4382d2SGreg Kroah-Hartman 387ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR1); 388ab4382d2SGreg Kroah-Hartman writel(temp & ~UCR1_TXMPTYEN, sport->port.membase + UCR1); 389ab4382d2SGreg Kroah-Hartman } 390ab4382d2SGreg Kroah-Hartman 391ab4382d2SGreg Kroah-Hartman /* 392ab4382d2SGreg Kroah-Hartman * interrupts disabled on entry 393ab4382d2SGreg Kroah-Hartman */ 394ab4382d2SGreg Kroah-Hartman static void imx_stop_rx(struct uart_port *port) 395ab4382d2SGreg Kroah-Hartman { 396ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 397ab4382d2SGreg Kroah-Hartman unsigned long temp; 398ab4382d2SGreg Kroah-Hartman 399ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR2); 400ab4382d2SGreg Kroah-Hartman writel(temp & ~UCR2_RXEN, sport->port.membase + UCR2); 401ab4382d2SGreg Kroah-Hartman } 402ab4382d2SGreg Kroah-Hartman 403ab4382d2SGreg Kroah-Hartman /* 404ab4382d2SGreg Kroah-Hartman * Set the modem control timer to fire immediately. 405ab4382d2SGreg Kroah-Hartman */ 406ab4382d2SGreg Kroah-Hartman static void imx_enable_ms(struct uart_port *port) 407ab4382d2SGreg Kroah-Hartman { 408ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 409ab4382d2SGreg Kroah-Hartman 410ab4382d2SGreg Kroah-Hartman mod_timer(&sport->timer, jiffies); 411ab4382d2SGreg Kroah-Hartman } 412ab4382d2SGreg Kroah-Hartman 413ab4382d2SGreg Kroah-Hartman static inline void imx_transmit_buffer(struct imx_port *sport) 414ab4382d2SGreg Kroah-Hartman { 415ab4382d2SGreg Kroah-Hartman struct circ_buf *xmit = &sport->port.state->xmit; 416ab4382d2SGreg Kroah-Hartman 417ab4382d2SGreg Kroah-Hartman while (!uart_circ_empty(xmit) && 418fe6b540aSShawn Guo !(readl(sport->port.membase + uts_reg(sport)) 419fe6b540aSShawn Guo & UTS_TXFULL)) { 420ab4382d2SGreg Kroah-Hartman /* send xmit->buf[xmit->tail] 421ab4382d2SGreg Kroah-Hartman * out the port here */ 422ab4382d2SGreg Kroah-Hartman writel(xmit->buf[xmit->tail], sport->port.membase + URTX0); 423ab4382d2SGreg Kroah-Hartman xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 424ab4382d2SGreg Kroah-Hartman sport->port.icount.tx++; 425ab4382d2SGreg Kroah-Hartman } 426ab4382d2SGreg Kroah-Hartman 427ab4382d2SGreg Kroah-Hartman if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 428ab4382d2SGreg Kroah-Hartman uart_write_wakeup(&sport->port); 429ab4382d2SGreg Kroah-Hartman 430ab4382d2SGreg Kroah-Hartman if (uart_circ_empty(xmit)) 431ab4382d2SGreg Kroah-Hartman imx_stop_tx(&sport->port); 432ab4382d2SGreg Kroah-Hartman } 433ab4382d2SGreg Kroah-Hartman 434ab4382d2SGreg Kroah-Hartman /* 435ab4382d2SGreg Kroah-Hartman * interrupts disabled on entry 436ab4382d2SGreg Kroah-Hartman */ 437ab4382d2SGreg Kroah-Hartman static void imx_start_tx(struct uart_port *port) 438ab4382d2SGreg Kroah-Hartman { 439ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 440ab4382d2SGreg Kroah-Hartman unsigned long temp; 441ab4382d2SGreg Kroah-Hartman 442ab4382d2SGreg Kroah-Hartman if (USE_IRDA(sport)) { 443ab4382d2SGreg Kroah-Hartman /* half duplex in IrDA mode; have to disable receive mode */ 444ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR4); 445ab4382d2SGreg Kroah-Hartman temp &= ~(UCR4_DREN); 446ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR4); 447ab4382d2SGreg Kroah-Hartman 448ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR1); 449ab4382d2SGreg Kroah-Hartman temp &= ~(UCR1_RRDYEN); 450ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR1); 451ab4382d2SGreg Kroah-Hartman } 452ab4382d2SGreg Kroah-Hartman 453ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR1); 454ab4382d2SGreg Kroah-Hartman writel(temp | UCR1_TXMPTYEN, sport->port.membase + UCR1); 455ab4382d2SGreg Kroah-Hartman 456ab4382d2SGreg Kroah-Hartman if (USE_IRDA(sport)) { 457ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR1); 458ab4382d2SGreg Kroah-Hartman temp |= UCR1_TRDYEN; 459ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR1); 460ab4382d2SGreg Kroah-Hartman 461ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR4); 462ab4382d2SGreg Kroah-Hartman temp |= UCR4_TCEN; 463ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR4); 464ab4382d2SGreg Kroah-Hartman } 465ab4382d2SGreg Kroah-Hartman 466fe6b540aSShawn Guo if (readl(sport->port.membase + uts_reg(sport)) & UTS_TXEMPTY) 467ab4382d2SGreg Kroah-Hartman imx_transmit_buffer(sport); 468ab4382d2SGreg Kroah-Hartman } 469ab4382d2SGreg Kroah-Hartman 470ab4382d2SGreg Kroah-Hartman static irqreturn_t imx_rtsint(int irq, void *dev_id) 471ab4382d2SGreg Kroah-Hartman { 472ab4382d2SGreg Kroah-Hartman struct imx_port *sport = dev_id; 4735680e941SUwe Kleine-König unsigned int val; 474ab4382d2SGreg Kroah-Hartman unsigned long flags; 475ab4382d2SGreg Kroah-Hartman 476ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&sport->port.lock, flags); 477ab4382d2SGreg Kroah-Hartman 478ab4382d2SGreg Kroah-Hartman writel(USR1_RTSD, sport->port.membase + USR1); 4795680e941SUwe Kleine-König val = readl(sport->port.membase + USR1) & USR1_RTSS; 480ab4382d2SGreg Kroah-Hartman uart_handle_cts_change(&sport->port, !!val); 481ab4382d2SGreg Kroah-Hartman wake_up_interruptible(&sport->port.state->port.delta_msr_wait); 482ab4382d2SGreg Kroah-Hartman 483ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&sport->port.lock, flags); 484ab4382d2SGreg Kroah-Hartman return IRQ_HANDLED; 485ab4382d2SGreg Kroah-Hartman } 486ab4382d2SGreg Kroah-Hartman 487ab4382d2SGreg Kroah-Hartman static irqreturn_t imx_txint(int irq, void *dev_id) 488ab4382d2SGreg Kroah-Hartman { 489ab4382d2SGreg Kroah-Hartman struct imx_port *sport = dev_id; 490ab4382d2SGreg Kroah-Hartman struct circ_buf *xmit = &sport->port.state->xmit; 491ab4382d2SGreg Kroah-Hartman unsigned long flags; 492ab4382d2SGreg Kroah-Hartman 493ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&sport->port.lock, flags); 494699cbd67SSachin Kamat if (sport->port.x_char) { 495ab4382d2SGreg Kroah-Hartman /* Send next char */ 496ab4382d2SGreg Kroah-Hartman writel(sport->port.x_char, sport->port.membase + URTX0); 497ab4382d2SGreg Kroah-Hartman goto out; 498ab4382d2SGreg Kroah-Hartman } 499ab4382d2SGreg Kroah-Hartman 500ab4382d2SGreg Kroah-Hartman if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) { 501ab4382d2SGreg Kroah-Hartman imx_stop_tx(&sport->port); 502ab4382d2SGreg Kroah-Hartman goto out; 503ab4382d2SGreg Kroah-Hartman } 504ab4382d2SGreg Kroah-Hartman 505ab4382d2SGreg Kroah-Hartman imx_transmit_buffer(sport); 506ab4382d2SGreg Kroah-Hartman 507ab4382d2SGreg Kroah-Hartman if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 508ab4382d2SGreg Kroah-Hartman uart_write_wakeup(&sport->port); 509ab4382d2SGreg Kroah-Hartman 510ab4382d2SGreg Kroah-Hartman out: 511ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&sport->port.lock, flags); 512ab4382d2SGreg Kroah-Hartman return IRQ_HANDLED; 513ab4382d2SGreg Kroah-Hartman } 514ab4382d2SGreg Kroah-Hartman 515ab4382d2SGreg Kroah-Hartman static irqreturn_t imx_rxint(int irq, void *dev_id) 516ab4382d2SGreg Kroah-Hartman { 517ab4382d2SGreg Kroah-Hartman struct imx_port *sport = dev_id; 518ab4382d2SGreg Kroah-Hartman unsigned int rx, flg, ignored = 0; 51992a19f9cSJiri Slaby struct tty_port *port = &sport->port.state->port; 520ab4382d2SGreg Kroah-Hartman unsigned long flags, temp; 521ab4382d2SGreg Kroah-Hartman 522ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&sport->port.lock, flags); 523ab4382d2SGreg Kroah-Hartman 524ab4382d2SGreg Kroah-Hartman while (readl(sport->port.membase + USR2) & USR2_RDR) { 525ab4382d2SGreg Kroah-Hartman flg = TTY_NORMAL; 526ab4382d2SGreg Kroah-Hartman sport->port.icount.rx++; 527ab4382d2SGreg Kroah-Hartman 528ab4382d2SGreg Kroah-Hartman rx = readl(sport->port.membase + URXD0); 529ab4382d2SGreg Kroah-Hartman 530ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + USR2); 531ab4382d2SGreg Kroah-Hartman if (temp & USR2_BRCD) { 532ab4382d2SGreg Kroah-Hartman writel(USR2_BRCD, sport->port.membase + USR2); 533ab4382d2SGreg Kroah-Hartman if (uart_handle_break(&sport->port)) 534ab4382d2SGreg Kroah-Hartman continue; 535ab4382d2SGreg Kroah-Hartman } 536ab4382d2SGreg Kroah-Hartman 537ab4382d2SGreg Kroah-Hartman if (uart_handle_sysrq_char(&sport->port, (unsigned char)rx)) 538ab4382d2SGreg Kroah-Hartman continue; 539ab4382d2SGreg Kroah-Hartman 540019dc9eaSHui Wang if (unlikely(rx & URXD_ERR)) { 541019dc9eaSHui Wang if (rx & URXD_BRK) 542019dc9eaSHui Wang sport->port.icount.brk++; 543019dc9eaSHui Wang else if (rx & URXD_PRERR) 544ab4382d2SGreg Kroah-Hartman sport->port.icount.parity++; 545ab4382d2SGreg Kroah-Hartman else if (rx & URXD_FRMERR) 546ab4382d2SGreg Kroah-Hartman sport->port.icount.frame++; 547ab4382d2SGreg Kroah-Hartman if (rx & URXD_OVRRUN) 548ab4382d2SGreg Kroah-Hartman sport->port.icount.overrun++; 549ab4382d2SGreg Kroah-Hartman 550ab4382d2SGreg Kroah-Hartman if (rx & sport->port.ignore_status_mask) { 551ab4382d2SGreg Kroah-Hartman if (++ignored > 100) 552ab4382d2SGreg Kroah-Hartman goto out; 553ab4382d2SGreg Kroah-Hartman continue; 554ab4382d2SGreg Kroah-Hartman } 555ab4382d2SGreg Kroah-Hartman 556ab4382d2SGreg Kroah-Hartman rx &= sport->port.read_status_mask; 557ab4382d2SGreg Kroah-Hartman 558019dc9eaSHui Wang if (rx & URXD_BRK) 559019dc9eaSHui Wang flg = TTY_BREAK; 560019dc9eaSHui Wang else if (rx & URXD_PRERR) 561ab4382d2SGreg Kroah-Hartman flg = TTY_PARITY; 562ab4382d2SGreg Kroah-Hartman else if (rx & URXD_FRMERR) 563ab4382d2SGreg Kroah-Hartman flg = TTY_FRAME; 564ab4382d2SGreg Kroah-Hartman if (rx & URXD_OVRRUN) 565ab4382d2SGreg Kroah-Hartman flg = TTY_OVERRUN; 566ab4382d2SGreg Kroah-Hartman 567ab4382d2SGreg Kroah-Hartman #ifdef SUPPORT_SYSRQ 568ab4382d2SGreg Kroah-Hartman sport->port.sysrq = 0; 569ab4382d2SGreg Kroah-Hartman #endif 570ab4382d2SGreg Kroah-Hartman } 571ab4382d2SGreg Kroah-Hartman 57292a19f9cSJiri Slaby tty_insert_flip_char(port, rx, flg); 573ab4382d2SGreg Kroah-Hartman } 574ab4382d2SGreg Kroah-Hartman 575ab4382d2SGreg Kroah-Hartman out: 576ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&sport->port.lock, flags); 5772e124b4aSJiri Slaby tty_flip_buffer_push(port); 578ab4382d2SGreg Kroah-Hartman return IRQ_HANDLED; 579ab4382d2SGreg Kroah-Hartman } 580ab4382d2SGreg Kroah-Hartman 581ab4382d2SGreg Kroah-Hartman static irqreturn_t imx_int(int irq, void *dev_id) 582ab4382d2SGreg Kroah-Hartman { 583ab4382d2SGreg Kroah-Hartman struct imx_port *sport = dev_id; 584ab4382d2SGreg Kroah-Hartman unsigned int sts; 585ab4382d2SGreg Kroah-Hartman 586ab4382d2SGreg Kroah-Hartman sts = readl(sport->port.membase + USR1); 587ab4382d2SGreg Kroah-Hartman 588ab4382d2SGreg Kroah-Hartman if (sts & USR1_RRDY) 589ab4382d2SGreg Kroah-Hartman imx_rxint(irq, dev_id); 590ab4382d2SGreg Kroah-Hartman 591ab4382d2SGreg Kroah-Hartman if (sts & USR1_TRDY && 592ab4382d2SGreg Kroah-Hartman readl(sport->port.membase + UCR1) & UCR1_TXMPTYEN) 593ab4382d2SGreg Kroah-Hartman imx_txint(irq, dev_id); 594ab4382d2SGreg Kroah-Hartman 595ab4382d2SGreg Kroah-Hartman if (sts & USR1_RTSD) 596ab4382d2SGreg Kroah-Hartman imx_rtsint(irq, dev_id); 597ab4382d2SGreg Kroah-Hartman 598db1a9b55SFabio Estevam if (sts & USR1_AWAKE) 599db1a9b55SFabio Estevam writel(USR1_AWAKE, sport->port.membase + USR1); 600db1a9b55SFabio Estevam 601ab4382d2SGreg Kroah-Hartman return IRQ_HANDLED; 602ab4382d2SGreg Kroah-Hartman } 603ab4382d2SGreg Kroah-Hartman 604ab4382d2SGreg Kroah-Hartman /* 605ab4382d2SGreg Kroah-Hartman * Return TIOCSER_TEMT when transmitter is not busy. 606ab4382d2SGreg Kroah-Hartman */ 607ab4382d2SGreg Kroah-Hartman static unsigned int imx_tx_empty(struct uart_port *port) 608ab4382d2SGreg Kroah-Hartman { 609ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 610ab4382d2SGreg Kroah-Hartman 611ab4382d2SGreg Kroah-Hartman return (readl(sport->port.membase + USR2) & USR2_TXDC) ? TIOCSER_TEMT : 0; 612ab4382d2SGreg Kroah-Hartman } 613ab4382d2SGreg Kroah-Hartman 614ab4382d2SGreg Kroah-Hartman /* 615ab4382d2SGreg Kroah-Hartman * We have a modem side uart, so the meanings of RTS and CTS are inverted. 616ab4382d2SGreg Kroah-Hartman */ 617ab4382d2SGreg Kroah-Hartman static unsigned int imx_get_mctrl(struct uart_port *port) 618ab4382d2SGreg Kroah-Hartman { 619ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 620ab4382d2SGreg Kroah-Hartman unsigned int tmp = TIOCM_DSR | TIOCM_CAR; 621ab4382d2SGreg Kroah-Hartman 622ab4382d2SGreg Kroah-Hartman if (readl(sport->port.membase + USR1) & USR1_RTSS) 623ab4382d2SGreg Kroah-Hartman tmp |= TIOCM_CTS; 624ab4382d2SGreg Kroah-Hartman 625ab4382d2SGreg Kroah-Hartman if (readl(sport->port.membase + UCR2) & UCR2_CTS) 626ab4382d2SGreg Kroah-Hartman tmp |= TIOCM_RTS; 627ab4382d2SGreg Kroah-Hartman 628ab4382d2SGreg Kroah-Hartman return tmp; 629ab4382d2SGreg Kroah-Hartman } 630ab4382d2SGreg Kroah-Hartman 631ab4382d2SGreg Kroah-Hartman static void imx_set_mctrl(struct uart_port *port, unsigned int mctrl) 632ab4382d2SGreg Kroah-Hartman { 633ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 634ab4382d2SGreg Kroah-Hartman unsigned long temp; 635ab4382d2SGreg Kroah-Hartman 636ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR2) & ~UCR2_CTS; 637ab4382d2SGreg Kroah-Hartman 638ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_RTS) 639ab4382d2SGreg Kroah-Hartman temp |= UCR2_CTS; 640ab4382d2SGreg Kroah-Hartman 641ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR2); 642ab4382d2SGreg Kroah-Hartman } 643ab4382d2SGreg Kroah-Hartman 644ab4382d2SGreg Kroah-Hartman /* 645ab4382d2SGreg Kroah-Hartman * Interrupts always disabled. 646ab4382d2SGreg Kroah-Hartman */ 647ab4382d2SGreg Kroah-Hartman static void imx_break_ctl(struct uart_port *port, int break_state) 648ab4382d2SGreg Kroah-Hartman { 649ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 650ab4382d2SGreg Kroah-Hartman unsigned long flags, temp; 651ab4382d2SGreg Kroah-Hartman 652ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&sport->port.lock, flags); 653ab4382d2SGreg Kroah-Hartman 654ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR1) & ~UCR1_SNDBRK; 655ab4382d2SGreg Kroah-Hartman 656ab4382d2SGreg Kroah-Hartman if (break_state != 0) 657ab4382d2SGreg Kroah-Hartman temp |= UCR1_SNDBRK; 658ab4382d2SGreg Kroah-Hartman 659ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR1); 660ab4382d2SGreg Kroah-Hartman 661ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&sport->port.lock, flags); 662ab4382d2SGreg Kroah-Hartman } 663ab4382d2SGreg Kroah-Hartman 664ab4382d2SGreg Kroah-Hartman #define TXTL 2 /* reset default */ 665ab4382d2SGreg Kroah-Hartman #define RXTL 1 /* reset default */ 666ab4382d2SGreg Kroah-Hartman 667ab4382d2SGreg Kroah-Hartman static int imx_setup_ufcr(struct imx_port *sport, unsigned int mode) 668ab4382d2SGreg Kroah-Hartman { 669ab4382d2SGreg Kroah-Hartman unsigned int val; 670ab4382d2SGreg Kroah-Hartman 6717be0670fSDirk Behme /* set receiver / transmitter trigger level */ 6727be0670fSDirk Behme val = readl(sport->port.membase + UFCR) & (UFCR_RFDIV | UFCR_DCEDTE); 6737be0670fSDirk Behme val |= TXTL << UFCR_TXTL_SHF | RXTL; 674ab4382d2SGreg Kroah-Hartman writel(val, sport->port.membase + UFCR); 675ab4382d2SGreg Kroah-Hartman return 0; 676ab4382d2SGreg Kroah-Hartman } 677ab4382d2SGreg Kroah-Hartman 678ab4382d2SGreg Kroah-Hartman /* half the RX buffer size */ 679ab4382d2SGreg Kroah-Hartman #define CTSTL 16 680ab4382d2SGreg Kroah-Hartman 681ab4382d2SGreg Kroah-Hartman static int imx_startup(struct uart_port *port) 682ab4382d2SGreg Kroah-Hartman { 683ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 684ab4382d2SGreg Kroah-Hartman int retval; 685ab4382d2SGreg Kroah-Hartman unsigned long flags, temp; 686ab4382d2SGreg Kroah-Hartman 687ab4382d2SGreg Kroah-Hartman imx_setup_ufcr(sport, 0); 688ab4382d2SGreg Kroah-Hartman 689ab4382d2SGreg Kroah-Hartman /* disable the DREN bit (Data Ready interrupt enable) before 690ab4382d2SGreg Kroah-Hartman * requesting IRQs 691ab4382d2SGreg Kroah-Hartman */ 692ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR4); 693ab4382d2SGreg Kroah-Hartman 694ab4382d2SGreg Kroah-Hartman if (USE_IRDA(sport)) 695ab4382d2SGreg Kroah-Hartman temp |= UCR4_IRSC; 696ab4382d2SGreg Kroah-Hartman 697ab4382d2SGreg Kroah-Hartman /* set the trigger level for CTS */ 698ab4382d2SGreg Kroah-Hartman temp &= ~(UCR4_CTSTL_MASK << UCR4_CTSTL_SHF); 699ab4382d2SGreg Kroah-Hartman temp |= CTSTL << UCR4_CTSTL_SHF; 700ab4382d2SGreg Kroah-Hartman 701ab4382d2SGreg Kroah-Hartman writel(temp & ~UCR4_DREN, sport->port.membase + UCR4); 702ab4382d2SGreg Kroah-Hartman 703ab4382d2SGreg Kroah-Hartman if (USE_IRDA(sport)) { 704ab4382d2SGreg Kroah-Hartman /* reset fifo's and state machines */ 705ab4382d2SGreg Kroah-Hartman int i = 100; 706ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR2); 707ab4382d2SGreg Kroah-Hartman temp &= ~UCR2_SRST; 708ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR2); 709ab4382d2SGreg Kroah-Hartman while (!(readl(sport->port.membase + UCR2) & UCR2_SRST) && 710ab4382d2SGreg Kroah-Hartman (--i > 0)) { 711ab4382d2SGreg Kroah-Hartman udelay(1); 712ab4382d2SGreg Kroah-Hartman } 713ab4382d2SGreg Kroah-Hartman } 714ab4382d2SGreg Kroah-Hartman 715ab4382d2SGreg Kroah-Hartman /* 716ab4382d2SGreg Kroah-Hartman * Allocate the IRQ(s) i.MX1 has three interrupts whereas later 717ab4382d2SGreg Kroah-Hartman * chips only have one interrupt. 718ab4382d2SGreg Kroah-Hartman */ 719ab4382d2SGreg Kroah-Hartman if (sport->txirq > 0) { 720ab4382d2SGreg Kroah-Hartman retval = request_irq(sport->rxirq, imx_rxint, 0, 721ab4382d2SGreg Kroah-Hartman DRIVER_NAME, sport); 722ab4382d2SGreg Kroah-Hartman if (retval) 723ab4382d2SGreg Kroah-Hartman goto error_out1; 724ab4382d2SGreg Kroah-Hartman 725ab4382d2SGreg Kroah-Hartman retval = request_irq(sport->txirq, imx_txint, 0, 726ab4382d2SGreg Kroah-Hartman DRIVER_NAME, sport); 727ab4382d2SGreg Kroah-Hartman if (retval) 728ab4382d2SGreg Kroah-Hartman goto error_out2; 729ab4382d2SGreg Kroah-Hartman 730ab4382d2SGreg Kroah-Hartman /* do not use RTS IRQ on IrDA */ 731ab4382d2SGreg Kroah-Hartman if (!USE_IRDA(sport)) { 7321ee8f65bSShawn Guo retval = request_irq(sport->rtsirq, imx_rtsint, 0, 733ab4382d2SGreg Kroah-Hartman DRIVER_NAME, sport); 734ab4382d2SGreg Kroah-Hartman if (retval) 735ab4382d2SGreg Kroah-Hartman goto error_out3; 736ab4382d2SGreg Kroah-Hartman } 737ab4382d2SGreg Kroah-Hartman } else { 738ab4382d2SGreg Kroah-Hartman retval = request_irq(sport->port.irq, imx_int, 0, 739ab4382d2SGreg Kroah-Hartman DRIVER_NAME, sport); 740ab4382d2SGreg Kroah-Hartman if (retval) { 741ab4382d2SGreg Kroah-Hartman free_irq(sport->port.irq, sport); 742ab4382d2SGreg Kroah-Hartman goto error_out1; 743ab4382d2SGreg Kroah-Hartman } 744ab4382d2SGreg Kroah-Hartman } 745ab4382d2SGreg Kroah-Hartman 7469ec1882dSXinyu Chen spin_lock_irqsave(&sport->port.lock, flags); 747ab4382d2SGreg Kroah-Hartman /* 748ab4382d2SGreg Kroah-Hartman * Finally, clear and enable interrupts 749ab4382d2SGreg Kroah-Hartman */ 750ab4382d2SGreg Kroah-Hartman writel(USR1_RTSD, sport->port.membase + USR1); 751ab4382d2SGreg Kroah-Hartman 752ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR1); 753ab4382d2SGreg Kroah-Hartman temp |= UCR1_RRDYEN | UCR1_RTSDEN | UCR1_UARTEN; 754ab4382d2SGreg Kroah-Hartman 755ab4382d2SGreg Kroah-Hartman if (USE_IRDA(sport)) { 756ab4382d2SGreg Kroah-Hartman temp |= UCR1_IREN; 757ab4382d2SGreg Kroah-Hartman temp &= ~(UCR1_RTSDEN); 758ab4382d2SGreg Kroah-Hartman } 759ab4382d2SGreg Kroah-Hartman 760ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR1); 761ab4382d2SGreg Kroah-Hartman 762ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR2); 763ab4382d2SGreg Kroah-Hartman temp |= (UCR2_RXEN | UCR2_TXEN); 764*bff09b09SLucas Stach if (!sport->have_rtscts) 765*bff09b09SLucas Stach temp |= UCR2_IRTS; 766ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR2); 767ab4382d2SGreg Kroah-Hartman 768ab4382d2SGreg Kroah-Hartman if (USE_IRDA(sport)) { 769ab4382d2SGreg Kroah-Hartman /* clear RX-FIFO */ 770ab4382d2SGreg Kroah-Hartman int i = 64; 771ab4382d2SGreg Kroah-Hartman while ((--i > 0) && 772ab4382d2SGreg Kroah-Hartman (readl(sport->port.membase + URXD0) & URXD_CHARRDY)) { 773ab4382d2SGreg Kroah-Hartman barrier(); 774ab4382d2SGreg Kroah-Hartman } 775ab4382d2SGreg Kroah-Hartman } 776ab4382d2SGreg Kroah-Hartman 777fe6b540aSShawn Guo if (is_imx21_uart(sport)) { 778ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR3); 779fe6b540aSShawn Guo temp |= IMX21_UCR3_RXDMUXSEL; 780ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR3); 781ab4382d2SGreg Kroah-Hartman } 782ab4382d2SGreg Kroah-Hartman 783ab4382d2SGreg Kroah-Hartman if (USE_IRDA(sport)) { 784ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR4); 785ab4382d2SGreg Kroah-Hartman if (sport->irda_inv_rx) 786ab4382d2SGreg Kroah-Hartman temp |= UCR4_INVR; 787ab4382d2SGreg Kroah-Hartman else 788ab4382d2SGreg Kroah-Hartman temp &= ~(UCR4_INVR); 789ab4382d2SGreg Kroah-Hartman writel(temp | UCR4_DREN, sport->port.membase + UCR4); 790ab4382d2SGreg Kroah-Hartman 791ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR3); 792ab4382d2SGreg Kroah-Hartman if (sport->irda_inv_tx) 793ab4382d2SGreg Kroah-Hartman temp |= UCR3_INVT; 794ab4382d2SGreg Kroah-Hartman else 795ab4382d2SGreg Kroah-Hartman temp &= ~(UCR3_INVT); 796ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR3); 797ab4382d2SGreg Kroah-Hartman } 798ab4382d2SGreg Kroah-Hartman 799ab4382d2SGreg Kroah-Hartman /* 800ab4382d2SGreg Kroah-Hartman * Enable modem status interrupts 801ab4382d2SGreg Kroah-Hartman */ 802ab4382d2SGreg Kroah-Hartman imx_enable_ms(&sport->port); 803ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&sport->port.lock, flags); 804ab4382d2SGreg Kroah-Hartman 805ab4382d2SGreg Kroah-Hartman if (USE_IRDA(sport)) { 806ab4382d2SGreg Kroah-Hartman struct imxuart_platform_data *pdata; 807ab4382d2SGreg Kroah-Hartman pdata = sport->port.dev->platform_data; 808ab4382d2SGreg Kroah-Hartman sport->irda_inv_rx = pdata->irda_inv_rx; 809ab4382d2SGreg Kroah-Hartman sport->irda_inv_tx = pdata->irda_inv_tx; 810ab4382d2SGreg Kroah-Hartman sport->trcv_delay = pdata->transceiver_delay; 811ab4382d2SGreg Kroah-Hartman if (pdata->irda_enable) 812ab4382d2SGreg Kroah-Hartman pdata->irda_enable(1); 813ab4382d2SGreg Kroah-Hartman } 814ab4382d2SGreg Kroah-Hartman 815ab4382d2SGreg Kroah-Hartman return 0; 816ab4382d2SGreg Kroah-Hartman 817ab4382d2SGreg Kroah-Hartman error_out3: 818ab4382d2SGreg Kroah-Hartman if (sport->txirq) 819ab4382d2SGreg Kroah-Hartman free_irq(sport->txirq, sport); 820ab4382d2SGreg Kroah-Hartman error_out2: 821ab4382d2SGreg Kroah-Hartman if (sport->rxirq) 822ab4382d2SGreg Kroah-Hartman free_irq(sport->rxirq, sport); 823ab4382d2SGreg Kroah-Hartman error_out1: 824ab4382d2SGreg Kroah-Hartman return retval; 825ab4382d2SGreg Kroah-Hartman } 826ab4382d2SGreg Kroah-Hartman 827ab4382d2SGreg Kroah-Hartman static void imx_shutdown(struct uart_port *port) 828ab4382d2SGreg Kroah-Hartman { 829ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 830ab4382d2SGreg Kroah-Hartman unsigned long temp; 8319ec1882dSXinyu Chen unsigned long flags; 832ab4382d2SGreg Kroah-Hartman 8339ec1882dSXinyu Chen spin_lock_irqsave(&sport->port.lock, flags); 834ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR2); 835ab4382d2SGreg Kroah-Hartman temp &= ~(UCR2_TXEN); 836ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR2); 8379ec1882dSXinyu Chen spin_unlock_irqrestore(&sport->port.lock, flags); 838ab4382d2SGreg Kroah-Hartman 839ab4382d2SGreg Kroah-Hartman if (USE_IRDA(sport)) { 840ab4382d2SGreg Kroah-Hartman struct imxuart_platform_data *pdata; 841ab4382d2SGreg Kroah-Hartman pdata = sport->port.dev->platform_data; 842ab4382d2SGreg Kroah-Hartman if (pdata->irda_enable) 843ab4382d2SGreg Kroah-Hartman pdata->irda_enable(0); 844ab4382d2SGreg Kroah-Hartman } 845ab4382d2SGreg Kroah-Hartman 846ab4382d2SGreg Kroah-Hartman /* 847ab4382d2SGreg Kroah-Hartman * Stop our timer. 848ab4382d2SGreg Kroah-Hartman */ 849ab4382d2SGreg Kroah-Hartman del_timer_sync(&sport->timer); 850ab4382d2SGreg Kroah-Hartman 851ab4382d2SGreg Kroah-Hartman /* 852ab4382d2SGreg Kroah-Hartman * Free the interrupts 853ab4382d2SGreg Kroah-Hartman */ 854ab4382d2SGreg Kroah-Hartman if (sport->txirq > 0) { 855ab4382d2SGreg Kroah-Hartman if (!USE_IRDA(sport)) 856ab4382d2SGreg Kroah-Hartman free_irq(sport->rtsirq, sport); 857ab4382d2SGreg Kroah-Hartman free_irq(sport->txirq, sport); 858ab4382d2SGreg Kroah-Hartman free_irq(sport->rxirq, sport); 859ab4382d2SGreg Kroah-Hartman } else 860ab4382d2SGreg Kroah-Hartman free_irq(sport->port.irq, sport); 861ab4382d2SGreg Kroah-Hartman 862ab4382d2SGreg Kroah-Hartman /* 863ab4382d2SGreg Kroah-Hartman * Disable all interrupts, port and break condition. 864ab4382d2SGreg Kroah-Hartman */ 865ab4382d2SGreg Kroah-Hartman 8669ec1882dSXinyu Chen spin_lock_irqsave(&sport->port.lock, flags); 867ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR1); 868ab4382d2SGreg Kroah-Hartman temp &= ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN | UCR1_UARTEN); 869ab4382d2SGreg Kroah-Hartman if (USE_IRDA(sport)) 870ab4382d2SGreg Kroah-Hartman temp &= ~(UCR1_IREN); 871ab4382d2SGreg Kroah-Hartman 872ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR1); 8739ec1882dSXinyu Chen spin_unlock_irqrestore(&sport->port.lock, flags); 874ab4382d2SGreg Kroah-Hartman } 875ab4382d2SGreg Kroah-Hartman 876ab4382d2SGreg Kroah-Hartman static void 877ab4382d2SGreg Kroah-Hartman imx_set_termios(struct uart_port *port, struct ktermios *termios, 878ab4382d2SGreg Kroah-Hartman struct ktermios *old) 879ab4382d2SGreg Kroah-Hartman { 880ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 881ab4382d2SGreg Kroah-Hartman unsigned long flags; 882ab4382d2SGreg Kroah-Hartman unsigned int ucr2, old_ucr1, old_txrxen, baud, quot; 883ab4382d2SGreg Kroah-Hartman unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8; 884ab4382d2SGreg Kroah-Hartman unsigned int div, ufcr; 885ab4382d2SGreg Kroah-Hartman unsigned long num, denom; 886ab4382d2SGreg Kroah-Hartman uint64_t tdiv64; 887ab4382d2SGreg Kroah-Hartman 888ab4382d2SGreg Kroah-Hartman /* 889ab4382d2SGreg Kroah-Hartman * If we don't support modem control lines, don't allow 890ab4382d2SGreg Kroah-Hartman * these to be set. 891ab4382d2SGreg Kroah-Hartman */ 892ab4382d2SGreg Kroah-Hartman if (0) { 893ab4382d2SGreg Kroah-Hartman termios->c_cflag &= ~(HUPCL | CRTSCTS | CMSPAR); 894ab4382d2SGreg Kroah-Hartman termios->c_cflag |= CLOCAL; 895ab4382d2SGreg Kroah-Hartman } 896ab4382d2SGreg Kroah-Hartman 897ab4382d2SGreg Kroah-Hartman /* 898ab4382d2SGreg Kroah-Hartman * We only support CS7 and CS8. 899ab4382d2SGreg Kroah-Hartman */ 900ab4382d2SGreg Kroah-Hartman while ((termios->c_cflag & CSIZE) != CS7 && 901ab4382d2SGreg Kroah-Hartman (termios->c_cflag & CSIZE) != CS8) { 902ab4382d2SGreg Kroah-Hartman termios->c_cflag &= ~CSIZE; 903ab4382d2SGreg Kroah-Hartman termios->c_cflag |= old_csize; 904ab4382d2SGreg Kroah-Hartman old_csize = CS8; 905ab4382d2SGreg Kroah-Hartman } 906ab4382d2SGreg Kroah-Hartman 907ab4382d2SGreg Kroah-Hartman if ((termios->c_cflag & CSIZE) == CS8) 908ab4382d2SGreg Kroah-Hartman ucr2 = UCR2_WS | UCR2_SRST | UCR2_IRTS; 909ab4382d2SGreg Kroah-Hartman else 910ab4382d2SGreg Kroah-Hartman ucr2 = UCR2_SRST | UCR2_IRTS; 911ab4382d2SGreg Kroah-Hartman 912ab4382d2SGreg Kroah-Hartman if (termios->c_cflag & CRTSCTS) { 913ab4382d2SGreg Kroah-Hartman if (sport->have_rtscts) { 914ab4382d2SGreg Kroah-Hartman ucr2 &= ~UCR2_IRTS; 915ab4382d2SGreg Kroah-Hartman ucr2 |= UCR2_CTSC; 916ab4382d2SGreg Kroah-Hartman } else { 917ab4382d2SGreg Kroah-Hartman termios->c_cflag &= ~CRTSCTS; 918ab4382d2SGreg Kroah-Hartman } 919ab4382d2SGreg Kroah-Hartman } 920ab4382d2SGreg Kroah-Hartman 921ab4382d2SGreg Kroah-Hartman if (termios->c_cflag & CSTOPB) 922ab4382d2SGreg Kroah-Hartman ucr2 |= UCR2_STPB; 923ab4382d2SGreg Kroah-Hartman if (termios->c_cflag & PARENB) { 924ab4382d2SGreg Kroah-Hartman ucr2 |= UCR2_PREN; 925ab4382d2SGreg Kroah-Hartman if (termios->c_cflag & PARODD) 926ab4382d2SGreg Kroah-Hartman ucr2 |= UCR2_PROE; 927ab4382d2SGreg Kroah-Hartman } 928ab4382d2SGreg Kroah-Hartman 929995234daSEric Miao del_timer_sync(&sport->timer); 930995234daSEric Miao 931ab4382d2SGreg Kroah-Hartman /* 932ab4382d2SGreg Kroah-Hartman * Ask the core to calculate the divisor for us. 933ab4382d2SGreg Kroah-Hartman */ 934ab4382d2SGreg Kroah-Hartman baud = uart_get_baud_rate(port, termios, old, 50, port->uartclk / 16); 935ab4382d2SGreg Kroah-Hartman quot = uart_get_divisor(port, baud); 936ab4382d2SGreg Kroah-Hartman 937ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&sport->port.lock, flags); 938ab4382d2SGreg Kroah-Hartman 939ab4382d2SGreg Kroah-Hartman sport->port.read_status_mask = 0; 940ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & INPCK) 941ab4382d2SGreg Kroah-Hartman sport->port.read_status_mask |= (URXD_FRMERR | URXD_PRERR); 942ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & (BRKINT | PARMRK)) 943ab4382d2SGreg Kroah-Hartman sport->port.read_status_mask |= URXD_BRK; 944ab4382d2SGreg Kroah-Hartman 945ab4382d2SGreg Kroah-Hartman /* 946ab4382d2SGreg Kroah-Hartman * Characters to ignore 947ab4382d2SGreg Kroah-Hartman */ 948ab4382d2SGreg Kroah-Hartman sport->port.ignore_status_mask = 0; 949ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IGNPAR) 950ab4382d2SGreg Kroah-Hartman sport->port.ignore_status_mask |= URXD_PRERR; 951ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IGNBRK) { 952ab4382d2SGreg Kroah-Hartman sport->port.ignore_status_mask |= URXD_BRK; 953ab4382d2SGreg Kroah-Hartman /* 954ab4382d2SGreg Kroah-Hartman * If we're ignoring parity and break indicators, 955ab4382d2SGreg Kroah-Hartman * ignore overruns too (for real raw support). 956ab4382d2SGreg Kroah-Hartman */ 957ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IGNPAR) 958ab4382d2SGreg Kroah-Hartman sport->port.ignore_status_mask |= URXD_OVRRUN; 959ab4382d2SGreg Kroah-Hartman } 960ab4382d2SGreg Kroah-Hartman 961ab4382d2SGreg Kroah-Hartman /* 962ab4382d2SGreg Kroah-Hartman * Update the per-port timeout. 963ab4382d2SGreg Kroah-Hartman */ 964ab4382d2SGreg Kroah-Hartman uart_update_timeout(port, termios->c_cflag, baud); 965ab4382d2SGreg Kroah-Hartman 966ab4382d2SGreg Kroah-Hartman /* 967ab4382d2SGreg Kroah-Hartman * disable interrupts and drain transmitter 968ab4382d2SGreg Kroah-Hartman */ 969ab4382d2SGreg Kroah-Hartman old_ucr1 = readl(sport->port.membase + UCR1); 970ab4382d2SGreg Kroah-Hartman writel(old_ucr1 & ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN), 971ab4382d2SGreg Kroah-Hartman sport->port.membase + UCR1); 972ab4382d2SGreg Kroah-Hartman 973ab4382d2SGreg Kroah-Hartman while (!(readl(sport->port.membase + USR2) & USR2_TXDC)) 974ab4382d2SGreg Kroah-Hartman barrier(); 975ab4382d2SGreg Kroah-Hartman 976ab4382d2SGreg Kroah-Hartman /* then, disable everything */ 977ab4382d2SGreg Kroah-Hartman old_txrxen = readl(sport->port.membase + UCR2); 978ab4382d2SGreg Kroah-Hartman writel(old_txrxen & ~(UCR2_TXEN | UCR2_RXEN), 979ab4382d2SGreg Kroah-Hartman sport->port.membase + UCR2); 980ab4382d2SGreg Kroah-Hartman old_txrxen &= (UCR2_TXEN | UCR2_RXEN); 981ab4382d2SGreg Kroah-Hartman 982ab4382d2SGreg Kroah-Hartman if (USE_IRDA(sport)) { 983ab4382d2SGreg Kroah-Hartman /* 984ab4382d2SGreg Kroah-Hartman * use maximum available submodule frequency to 985ab4382d2SGreg Kroah-Hartman * avoid missing short pulses due to low sampling rate 986ab4382d2SGreg Kroah-Hartman */ 987ab4382d2SGreg Kroah-Hartman div = 1; 988ab4382d2SGreg Kroah-Hartman } else { 989ab4382d2SGreg Kroah-Hartman div = sport->port.uartclk / (baud * 16); 990ab4382d2SGreg Kroah-Hartman if (div > 7) 991ab4382d2SGreg Kroah-Hartman div = 7; 992ab4382d2SGreg Kroah-Hartman if (!div) 993ab4382d2SGreg Kroah-Hartman div = 1; 994ab4382d2SGreg Kroah-Hartman } 995ab4382d2SGreg Kroah-Hartman 996ab4382d2SGreg Kroah-Hartman rational_best_approximation(16 * div * baud, sport->port.uartclk, 997ab4382d2SGreg Kroah-Hartman 1 << 16, 1 << 16, &num, &denom); 998ab4382d2SGreg Kroah-Hartman 999ab4382d2SGreg Kroah-Hartman tdiv64 = sport->port.uartclk; 1000ab4382d2SGreg Kroah-Hartman tdiv64 *= num; 1001ab4382d2SGreg Kroah-Hartman do_div(tdiv64, denom * 16 * div); 1002ab4382d2SGreg Kroah-Hartman tty_termios_encode_baud_rate(termios, 1003ab4382d2SGreg Kroah-Hartman (speed_t)tdiv64, (speed_t)tdiv64); 1004ab4382d2SGreg Kroah-Hartman 1005ab4382d2SGreg Kroah-Hartman num -= 1; 1006ab4382d2SGreg Kroah-Hartman denom -= 1; 1007ab4382d2SGreg Kroah-Hartman 1008ab4382d2SGreg Kroah-Hartman ufcr = readl(sport->port.membase + UFCR); 1009ab4382d2SGreg Kroah-Hartman ufcr = (ufcr & (~UFCR_RFDIV)) | UFCR_RFDIV_REG(div); 1010ab4382d2SGreg Kroah-Hartman writel(ufcr, sport->port.membase + UFCR); 1011ab4382d2SGreg Kroah-Hartman 1012ab4382d2SGreg Kroah-Hartman writel(num, sport->port.membase + UBIR); 1013ab4382d2SGreg Kroah-Hartman writel(denom, sport->port.membase + UBMR); 1014ab4382d2SGreg Kroah-Hartman 1015fe6b540aSShawn Guo if (is_imx21_uart(sport)) 1016ab4382d2SGreg Kroah-Hartman writel(sport->port.uartclk / div / 1000, 1017fe6b540aSShawn Guo sport->port.membase + IMX21_ONEMS); 1018ab4382d2SGreg Kroah-Hartman 1019ab4382d2SGreg Kroah-Hartman writel(old_ucr1, sport->port.membase + UCR1); 1020ab4382d2SGreg Kroah-Hartman 1021ab4382d2SGreg Kroah-Hartman /* set the parity, stop bits and data size */ 1022ab4382d2SGreg Kroah-Hartman writel(ucr2 | old_txrxen, sport->port.membase + UCR2); 1023ab4382d2SGreg Kroah-Hartman 1024ab4382d2SGreg Kroah-Hartman if (UART_ENABLE_MS(&sport->port, termios->c_cflag)) 1025ab4382d2SGreg Kroah-Hartman imx_enable_ms(&sport->port); 1026ab4382d2SGreg Kroah-Hartman 1027ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&sport->port.lock, flags); 1028ab4382d2SGreg Kroah-Hartman } 1029ab4382d2SGreg Kroah-Hartman 1030ab4382d2SGreg Kroah-Hartman static const char *imx_type(struct uart_port *port) 1031ab4382d2SGreg Kroah-Hartman { 1032ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 1033ab4382d2SGreg Kroah-Hartman 1034ab4382d2SGreg Kroah-Hartman return sport->port.type == PORT_IMX ? "IMX" : NULL; 1035ab4382d2SGreg Kroah-Hartman } 1036ab4382d2SGreg Kroah-Hartman 1037ab4382d2SGreg Kroah-Hartman /* 1038ab4382d2SGreg Kroah-Hartman * Release the memory region(s) being used by 'port'. 1039ab4382d2SGreg Kroah-Hartman */ 1040ab4382d2SGreg Kroah-Hartman static void imx_release_port(struct uart_port *port) 1041ab4382d2SGreg Kroah-Hartman { 1042ab4382d2SGreg Kroah-Hartman struct platform_device *pdev = to_platform_device(port->dev); 1043ab4382d2SGreg Kroah-Hartman struct resource *mmres; 1044ab4382d2SGreg Kroah-Hartman 1045ab4382d2SGreg Kroah-Hartman mmres = platform_get_resource(pdev, IORESOURCE_MEM, 0); 104628f65c11SJoe Perches release_mem_region(mmres->start, resource_size(mmres)); 1047ab4382d2SGreg Kroah-Hartman } 1048ab4382d2SGreg Kroah-Hartman 1049ab4382d2SGreg Kroah-Hartman /* 1050ab4382d2SGreg Kroah-Hartman * Request the memory region(s) being used by 'port'. 1051ab4382d2SGreg Kroah-Hartman */ 1052ab4382d2SGreg Kroah-Hartman static int imx_request_port(struct uart_port *port) 1053ab4382d2SGreg Kroah-Hartman { 1054ab4382d2SGreg Kroah-Hartman struct platform_device *pdev = to_platform_device(port->dev); 1055ab4382d2SGreg Kroah-Hartman struct resource *mmres; 1056ab4382d2SGreg Kroah-Hartman void *ret; 1057ab4382d2SGreg Kroah-Hartman 1058ab4382d2SGreg Kroah-Hartman mmres = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1059ab4382d2SGreg Kroah-Hartman if (!mmres) 1060ab4382d2SGreg Kroah-Hartman return -ENODEV; 1061ab4382d2SGreg Kroah-Hartman 106228f65c11SJoe Perches ret = request_mem_region(mmres->start, resource_size(mmres), "imx-uart"); 1063ab4382d2SGreg Kroah-Hartman 1064ab4382d2SGreg Kroah-Hartman return ret ? 0 : -EBUSY; 1065ab4382d2SGreg Kroah-Hartman } 1066ab4382d2SGreg Kroah-Hartman 1067ab4382d2SGreg Kroah-Hartman /* 1068ab4382d2SGreg Kroah-Hartman * Configure/autoconfigure the port. 1069ab4382d2SGreg Kroah-Hartman */ 1070ab4382d2SGreg Kroah-Hartman static void imx_config_port(struct uart_port *port, int flags) 1071ab4382d2SGreg Kroah-Hartman { 1072ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 1073ab4382d2SGreg Kroah-Hartman 1074ab4382d2SGreg Kroah-Hartman if (flags & UART_CONFIG_TYPE && 1075ab4382d2SGreg Kroah-Hartman imx_request_port(&sport->port) == 0) 1076ab4382d2SGreg Kroah-Hartman sport->port.type = PORT_IMX; 1077ab4382d2SGreg Kroah-Hartman } 1078ab4382d2SGreg Kroah-Hartman 1079ab4382d2SGreg Kroah-Hartman /* 1080ab4382d2SGreg Kroah-Hartman * Verify the new serial_struct (for TIOCSSERIAL). 1081ab4382d2SGreg Kroah-Hartman * The only change we allow are to the flags and type, and 1082ab4382d2SGreg Kroah-Hartman * even then only between PORT_IMX and PORT_UNKNOWN 1083ab4382d2SGreg Kroah-Hartman */ 1084ab4382d2SGreg Kroah-Hartman static int 1085ab4382d2SGreg Kroah-Hartman imx_verify_port(struct uart_port *port, struct serial_struct *ser) 1086ab4382d2SGreg Kroah-Hartman { 1087ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 1088ab4382d2SGreg Kroah-Hartman int ret = 0; 1089ab4382d2SGreg Kroah-Hartman 1090ab4382d2SGreg Kroah-Hartman if (ser->type != PORT_UNKNOWN && ser->type != PORT_IMX) 1091ab4382d2SGreg Kroah-Hartman ret = -EINVAL; 1092ab4382d2SGreg Kroah-Hartman if (sport->port.irq != ser->irq) 1093ab4382d2SGreg Kroah-Hartman ret = -EINVAL; 1094ab4382d2SGreg Kroah-Hartman if (ser->io_type != UPIO_MEM) 1095ab4382d2SGreg Kroah-Hartman ret = -EINVAL; 1096ab4382d2SGreg Kroah-Hartman if (sport->port.uartclk / 16 != ser->baud_base) 1097ab4382d2SGreg Kroah-Hartman ret = -EINVAL; 1098ab4382d2SGreg Kroah-Hartman if ((void *)sport->port.mapbase != ser->iomem_base) 1099ab4382d2SGreg Kroah-Hartman ret = -EINVAL; 1100ab4382d2SGreg Kroah-Hartman if (sport->port.iobase != ser->port) 1101ab4382d2SGreg Kroah-Hartman ret = -EINVAL; 1102ab4382d2SGreg Kroah-Hartman if (ser->hub6 != 0) 1103ab4382d2SGreg Kroah-Hartman ret = -EINVAL; 1104ab4382d2SGreg Kroah-Hartman return ret; 1105ab4382d2SGreg Kroah-Hartman } 1106ab4382d2SGreg Kroah-Hartman 110701f56abdSSaleem Abdulrasool #if defined(CONFIG_CONSOLE_POLL) 110801f56abdSSaleem Abdulrasool static int imx_poll_get_char(struct uart_port *port) 110901f56abdSSaleem Abdulrasool { 111001f56abdSSaleem Abdulrasool struct imx_port_ucrs old_ucr; 111101f56abdSSaleem Abdulrasool unsigned int status; 111201f56abdSSaleem Abdulrasool unsigned char c; 111301f56abdSSaleem Abdulrasool 111401f56abdSSaleem Abdulrasool /* save control registers */ 111501f56abdSSaleem Abdulrasool imx_port_ucrs_save(port, &old_ucr); 111601f56abdSSaleem Abdulrasool 111701f56abdSSaleem Abdulrasool /* disable interrupts */ 111801f56abdSSaleem Abdulrasool writel(UCR1_UARTEN, port->membase + UCR1); 111901f56abdSSaleem Abdulrasool writel(old_ucr.ucr2 & ~(UCR2_ATEN | UCR2_RTSEN | UCR2_ESCI), 112001f56abdSSaleem Abdulrasool port->membase + UCR2); 112101f56abdSSaleem Abdulrasool writel(old_ucr.ucr3 & ~(UCR3_DCD | UCR3_RI | UCR3_DTREN), 112201f56abdSSaleem Abdulrasool port->membase + UCR3); 112301f56abdSSaleem Abdulrasool 112401f56abdSSaleem Abdulrasool /* poll */ 112501f56abdSSaleem Abdulrasool do { 112601f56abdSSaleem Abdulrasool status = readl(port->membase + USR2); 112701f56abdSSaleem Abdulrasool } while (~status & USR2_RDR); 112801f56abdSSaleem Abdulrasool 112901f56abdSSaleem Abdulrasool /* read */ 113001f56abdSSaleem Abdulrasool c = readl(port->membase + URXD0); 113101f56abdSSaleem Abdulrasool 113201f56abdSSaleem Abdulrasool /* restore control registers */ 113301f56abdSSaleem Abdulrasool imx_port_ucrs_restore(port, &old_ucr); 113401f56abdSSaleem Abdulrasool 113501f56abdSSaleem Abdulrasool return c; 113601f56abdSSaleem Abdulrasool } 113701f56abdSSaleem Abdulrasool 113801f56abdSSaleem Abdulrasool static void imx_poll_put_char(struct uart_port *port, unsigned char c) 113901f56abdSSaleem Abdulrasool { 114001f56abdSSaleem Abdulrasool struct imx_port_ucrs old_ucr; 114101f56abdSSaleem Abdulrasool unsigned int status; 114201f56abdSSaleem Abdulrasool 114301f56abdSSaleem Abdulrasool /* save control registers */ 114401f56abdSSaleem Abdulrasool imx_port_ucrs_save(port, &old_ucr); 114501f56abdSSaleem Abdulrasool 114601f56abdSSaleem Abdulrasool /* disable interrupts */ 114701f56abdSSaleem Abdulrasool writel(UCR1_UARTEN, port->membase + UCR1); 114801f56abdSSaleem Abdulrasool writel(old_ucr.ucr2 & ~(UCR2_ATEN | UCR2_RTSEN | UCR2_ESCI), 114901f56abdSSaleem Abdulrasool port->membase + UCR2); 115001f56abdSSaleem Abdulrasool writel(old_ucr.ucr3 & ~(UCR3_DCD | UCR3_RI | UCR3_DTREN), 115101f56abdSSaleem Abdulrasool port->membase + UCR3); 115201f56abdSSaleem Abdulrasool 115301f56abdSSaleem Abdulrasool /* drain */ 115401f56abdSSaleem Abdulrasool do { 115501f56abdSSaleem Abdulrasool status = readl(port->membase + USR1); 115601f56abdSSaleem Abdulrasool } while (~status & USR1_TRDY); 115701f56abdSSaleem Abdulrasool 115801f56abdSSaleem Abdulrasool /* write */ 115901f56abdSSaleem Abdulrasool writel(c, port->membase + URTX0); 116001f56abdSSaleem Abdulrasool 116101f56abdSSaleem Abdulrasool /* flush */ 116201f56abdSSaleem Abdulrasool do { 116301f56abdSSaleem Abdulrasool status = readl(port->membase + USR2); 116401f56abdSSaleem Abdulrasool } while (~status & USR2_TXDC); 116501f56abdSSaleem Abdulrasool 116601f56abdSSaleem Abdulrasool /* restore control registers */ 116701f56abdSSaleem Abdulrasool imx_port_ucrs_restore(port, &old_ucr); 116801f56abdSSaleem Abdulrasool } 116901f56abdSSaleem Abdulrasool #endif 117001f56abdSSaleem Abdulrasool 1171ab4382d2SGreg Kroah-Hartman static struct uart_ops imx_pops = { 1172ab4382d2SGreg Kroah-Hartman .tx_empty = imx_tx_empty, 1173ab4382d2SGreg Kroah-Hartman .set_mctrl = imx_set_mctrl, 1174ab4382d2SGreg Kroah-Hartman .get_mctrl = imx_get_mctrl, 1175ab4382d2SGreg Kroah-Hartman .stop_tx = imx_stop_tx, 1176ab4382d2SGreg Kroah-Hartman .start_tx = imx_start_tx, 1177ab4382d2SGreg Kroah-Hartman .stop_rx = imx_stop_rx, 1178ab4382d2SGreg Kroah-Hartman .enable_ms = imx_enable_ms, 1179ab4382d2SGreg Kroah-Hartman .break_ctl = imx_break_ctl, 1180ab4382d2SGreg Kroah-Hartman .startup = imx_startup, 1181ab4382d2SGreg Kroah-Hartman .shutdown = imx_shutdown, 1182ab4382d2SGreg Kroah-Hartman .set_termios = imx_set_termios, 1183ab4382d2SGreg Kroah-Hartman .type = imx_type, 1184ab4382d2SGreg Kroah-Hartman .release_port = imx_release_port, 1185ab4382d2SGreg Kroah-Hartman .request_port = imx_request_port, 1186ab4382d2SGreg Kroah-Hartman .config_port = imx_config_port, 1187ab4382d2SGreg Kroah-Hartman .verify_port = imx_verify_port, 118801f56abdSSaleem Abdulrasool #if defined(CONFIG_CONSOLE_POLL) 118901f56abdSSaleem Abdulrasool .poll_get_char = imx_poll_get_char, 119001f56abdSSaleem Abdulrasool .poll_put_char = imx_poll_put_char, 119101f56abdSSaleem Abdulrasool #endif 1192ab4382d2SGreg Kroah-Hartman }; 1193ab4382d2SGreg Kroah-Hartman 1194ab4382d2SGreg Kroah-Hartman static struct imx_port *imx_ports[UART_NR]; 1195ab4382d2SGreg Kroah-Hartman 1196ab4382d2SGreg Kroah-Hartman #ifdef CONFIG_SERIAL_IMX_CONSOLE 1197ab4382d2SGreg Kroah-Hartman static void imx_console_putchar(struct uart_port *port, int ch) 1198ab4382d2SGreg Kroah-Hartman { 1199ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 1200ab4382d2SGreg Kroah-Hartman 1201fe6b540aSShawn Guo while (readl(sport->port.membase + uts_reg(sport)) & UTS_TXFULL) 1202ab4382d2SGreg Kroah-Hartman barrier(); 1203ab4382d2SGreg Kroah-Hartman 1204ab4382d2SGreg Kroah-Hartman writel(ch, sport->port.membase + URTX0); 1205ab4382d2SGreg Kroah-Hartman } 1206ab4382d2SGreg Kroah-Hartman 1207ab4382d2SGreg Kroah-Hartman /* 1208ab4382d2SGreg Kroah-Hartman * Interrupts are disabled on entering 1209ab4382d2SGreg Kroah-Hartman */ 1210ab4382d2SGreg Kroah-Hartman static void 1211ab4382d2SGreg Kroah-Hartman imx_console_write(struct console *co, const char *s, unsigned int count) 1212ab4382d2SGreg Kroah-Hartman { 1213ab4382d2SGreg Kroah-Hartman struct imx_port *sport = imx_ports[co->index]; 12140ad5a814SDirk Behme struct imx_port_ucrs old_ucr; 12150ad5a814SDirk Behme unsigned int ucr1; 1216f30e8260SShawn Guo unsigned long flags = 0; 1217677fe555SThomas Gleixner int locked = 1; 12189ec1882dSXinyu Chen 1219677fe555SThomas Gleixner if (sport->port.sysrq) 1220677fe555SThomas Gleixner locked = 0; 1221677fe555SThomas Gleixner else if (oops_in_progress) 1222677fe555SThomas Gleixner locked = spin_trylock_irqsave(&sport->port.lock, flags); 1223677fe555SThomas Gleixner else 12249ec1882dSXinyu Chen spin_lock_irqsave(&sport->port.lock, flags); 1225ab4382d2SGreg Kroah-Hartman 1226ab4382d2SGreg Kroah-Hartman /* 12270ad5a814SDirk Behme * First, save UCR1/2/3 and then disable interrupts 1228ab4382d2SGreg Kroah-Hartman */ 12290ad5a814SDirk Behme imx_port_ucrs_save(&sport->port, &old_ucr); 12300ad5a814SDirk Behme ucr1 = old_ucr.ucr1; 1231ab4382d2SGreg Kroah-Hartman 1232fe6b540aSShawn Guo if (is_imx1_uart(sport)) 1233fe6b540aSShawn Guo ucr1 |= IMX1_UCR1_UARTCLKEN; 1234ab4382d2SGreg Kroah-Hartman ucr1 |= UCR1_UARTEN; 1235ab4382d2SGreg Kroah-Hartman ucr1 &= ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN); 1236ab4382d2SGreg Kroah-Hartman 1237ab4382d2SGreg Kroah-Hartman writel(ucr1, sport->port.membase + UCR1); 1238ab4382d2SGreg Kroah-Hartman 12390ad5a814SDirk Behme writel(old_ucr.ucr2 | UCR2_TXEN, sport->port.membase + UCR2); 1240ab4382d2SGreg Kroah-Hartman 1241ab4382d2SGreg Kroah-Hartman uart_console_write(&sport->port, s, count, imx_console_putchar); 1242ab4382d2SGreg Kroah-Hartman 1243ab4382d2SGreg Kroah-Hartman /* 1244ab4382d2SGreg Kroah-Hartman * Finally, wait for transmitter to become empty 12450ad5a814SDirk Behme * and restore UCR1/2/3 1246ab4382d2SGreg Kroah-Hartman */ 1247ab4382d2SGreg Kroah-Hartman while (!(readl(sport->port.membase + USR2) & USR2_TXDC)); 1248ab4382d2SGreg Kroah-Hartman 12490ad5a814SDirk Behme imx_port_ucrs_restore(&sport->port, &old_ucr); 12509ec1882dSXinyu Chen 1251677fe555SThomas Gleixner if (locked) 12529ec1882dSXinyu Chen spin_unlock_irqrestore(&sport->port.lock, flags); 1253ab4382d2SGreg Kroah-Hartman } 1254ab4382d2SGreg Kroah-Hartman 1255ab4382d2SGreg Kroah-Hartman /* 1256ab4382d2SGreg Kroah-Hartman * If the port was already initialised (eg, by a boot loader), 1257ab4382d2SGreg Kroah-Hartman * try to determine the current setup. 1258ab4382d2SGreg Kroah-Hartman */ 1259ab4382d2SGreg Kroah-Hartman static void __init 1260ab4382d2SGreg Kroah-Hartman imx_console_get_options(struct imx_port *sport, int *baud, 1261ab4382d2SGreg Kroah-Hartman int *parity, int *bits) 1262ab4382d2SGreg Kroah-Hartman { 1263ab4382d2SGreg Kroah-Hartman 1264ab4382d2SGreg Kroah-Hartman if (readl(sport->port.membase + UCR1) & UCR1_UARTEN) { 1265ab4382d2SGreg Kroah-Hartman /* ok, the port was enabled */ 1266ab4382d2SGreg Kroah-Hartman unsigned int ucr2, ubir, ubmr, uartclk; 1267ab4382d2SGreg Kroah-Hartman unsigned int baud_raw; 1268ab4382d2SGreg Kroah-Hartman unsigned int ucfr_rfdiv; 1269ab4382d2SGreg Kroah-Hartman 1270ab4382d2SGreg Kroah-Hartman ucr2 = readl(sport->port.membase + UCR2); 1271ab4382d2SGreg Kroah-Hartman 1272ab4382d2SGreg Kroah-Hartman *parity = 'n'; 1273ab4382d2SGreg Kroah-Hartman if (ucr2 & UCR2_PREN) { 1274ab4382d2SGreg Kroah-Hartman if (ucr2 & UCR2_PROE) 1275ab4382d2SGreg Kroah-Hartman *parity = 'o'; 1276ab4382d2SGreg Kroah-Hartman else 1277ab4382d2SGreg Kroah-Hartman *parity = 'e'; 1278ab4382d2SGreg Kroah-Hartman } 1279ab4382d2SGreg Kroah-Hartman 1280ab4382d2SGreg Kroah-Hartman if (ucr2 & UCR2_WS) 1281ab4382d2SGreg Kroah-Hartman *bits = 8; 1282ab4382d2SGreg Kroah-Hartman else 1283ab4382d2SGreg Kroah-Hartman *bits = 7; 1284ab4382d2SGreg Kroah-Hartman 1285ab4382d2SGreg Kroah-Hartman ubir = readl(sport->port.membase + UBIR) & 0xffff; 1286ab4382d2SGreg Kroah-Hartman ubmr = readl(sport->port.membase + UBMR) & 0xffff; 1287ab4382d2SGreg Kroah-Hartman 1288ab4382d2SGreg Kroah-Hartman ucfr_rfdiv = (readl(sport->port.membase + UFCR) & UFCR_RFDIV) >> 7; 1289ab4382d2SGreg Kroah-Hartman if (ucfr_rfdiv == 6) 1290ab4382d2SGreg Kroah-Hartman ucfr_rfdiv = 7; 1291ab4382d2SGreg Kroah-Hartman else 1292ab4382d2SGreg Kroah-Hartman ucfr_rfdiv = 6 - ucfr_rfdiv; 1293ab4382d2SGreg Kroah-Hartman 12943a9465faSSascha Hauer uartclk = clk_get_rate(sport->clk_per); 1295ab4382d2SGreg Kroah-Hartman uartclk /= ucfr_rfdiv; 1296ab4382d2SGreg Kroah-Hartman 1297ab4382d2SGreg Kroah-Hartman { /* 1298ab4382d2SGreg Kroah-Hartman * The next code provides exact computation of 1299ab4382d2SGreg Kroah-Hartman * baud_raw = round(((uartclk/16) * (ubir + 1)) / (ubmr + 1)) 1300ab4382d2SGreg Kroah-Hartman * without need of float support or long long division, 1301ab4382d2SGreg Kroah-Hartman * which would be required to prevent 32bit arithmetic overflow 1302ab4382d2SGreg Kroah-Hartman */ 1303ab4382d2SGreg Kroah-Hartman unsigned int mul = ubir + 1; 1304ab4382d2SGreg Kroah-Hartman unsigned int div = 16 * (ubmr + 1); 1305ab4382d2SGreg Kroah-Hartman unsigned int rem = uartclk % div; 1306ab4382d2SGreg Kroah-Hartman 1307ab4382d2SGreg Kroah-Hartman baud_raw = (uartclk / div) * mul; 1308ab4382d2SGreg Kroah-Hartman baud_raw += (rem * mul + div / 2) / div; 1309ab4382d2SGreg Kroah-Hartman *baud = (baud_raw + 50) / 100 * 100; 1310ab4382d2SGreg Kroah-Hartman } 1311ab4382d2SGreg Kroah-Hartman 1312ab4382d2SGreg Kroah-Hartman if (*baud != baud_raw) 131350bbdba3SSachin Kamat pr_info("Console IMX rounded baud rate from %d to %d\n", 1314ab4382d2SGreg Kroah-Hartman baud_raw, *baud); 1315ab4382d2SGreg Kroah-Hartman } 1316ab4382d2SGreg Kroah-Hartman } 1317ab4382d2SGreg Kroah-Hartman 1318ab4382d2SGreg Kroah-Hartman static int __init 1319ab4382d2SGreg Kroah-Hartman imx_console_setup(struct console *co, char *options) 1320ab4382d2SGreg Kroah-Hartman { 1321ab4382d2SGreg Kroah-Hartman struct imx_port *sport; 1322ab4382d2SGreg Kroah-Hartman int baud = 9600; 1323ab4382d2SGreg Kroah-Hartman int bits = 8; 1324ab4382d2SGreg Kroah-Hartman int parity = 'n'; 1325ab4382d2SGreg Kroah-Hartman int flow = 'n'; 1326ab4382d2SGreg Kroah-Hartman 1327ab4382d2SGreg Kroah-Hartman /* 1328ab4382d2SGreg Kroah-Hartman * Check whether an invalid uart number has been specified, and 1329ab4382d2SGreg Kroah-Hartman * if so, search for the first available port that does have 1330ab4382d2SGreg Kroah-Hartman * console support. 1331ab4382d2SGreg Kroah-Hartman */ 1332ab4382d2SGreg Kroah-Hartman if (co->index == -1 || co->index >= ARRAY_SIZE(imx_ports)) 1333ab4382d2SGreg Kroah-Hartman co->index = 0; 1334ab4382d2SGreg Kroah-Hartman sport = imx_ports[co->index]; 1335ab4382d2SGreg Kroah-Hartman if (sport == NULL) 1336ab4382d2SGreg Kroah-Hartman return -ENODEV; 1337ab4382d2SGreg Kroah-Hartman 1338ab4382d2SGreg Kroah-Hartman if (options) 1339ab4382d2SGreg Kroah-Hartman uart_parse_options(options, &baud, &parity, &bits, &flow); 1340ab4382d2SGreg Kroah-Hartman else 1341ab4382d2SGreg Kroah-Hartman imx_console_get_options(sport, &baud, &parity, &bits); 1342ab4382d2SGreg Kroah-Hartman 1343ab4382d2SGreg Kroah-Hartman imx_setup_ufcr(sport, 0); 1344ab4382d2SGreg Kroah-Hartman 1345ab4382d2SGreg Kroah-Hartman return uart_set_options(&sport->port, co, baud, parity, bits, flow); 1346ab4382d2SGreg Kroah-Hartman } 1347ab4382d2SGreg Kroah-Hartman 1348ab4382d2SGreg Kroah-Hartman static struct uart_driver imx_reg; 1349ab4382d2SGreg Kroah-Hartman static struct console imx_console = { 1350ab4382d2SGreg Kroah-Hartman .name = DEV_NAME, 1351ab4382d2SGreg Kroah-Hartman .write = imx_console_write, 1352ab4382d2SGreg Kroah-Hartman .device = uart_console_device, 1353ab4382d2SGreg Kroah-Hartman .setup = imx_console_setup, 1354ab4382d2SGreg Kroah-Hartman .flags = CON_PRINTBUFFER, 1355ab4382d2SGreg Kroah-Hartman .index = -1, 1356ab4382d2SGreg Kroah-Hartman .data = &imx_reg, 1357ab4382d2SGreg Kroah-Hartman }; 1358ab4382d2SGreg Kroah-Hartman 1359ab4382d2SGreg Kroah-Hartman #define IMX_CONSOLE &imx_console 1360ab4382d2SGreg Kroah-Hartman #else 1361ab4382d2SGreg Kroah-Hartman #define IMX_CONSOLE NULL 1362ab4382d2SGreg Kroah-Hartman #endif 1363ab4382d2SGreg Kroah-Hartman 1364ab4382d2SGreg Kroah-Hartman static struct uart_driver imx_reg = { 1365ab4382d2SGreg Kroah-Hartman .owner = THIS_MODULE, 1366ab4382d2SGreg Kroah-Hartman .driver_name = DRIVER_NAME, 1367ab4382d2SGreg Kroah-Hartman .dev_name = DEV_NAME, 1368ab4382d2SGreg Kroah-Hartman .major = SERIAL_IMX_MAJOR, 1369ab4382d2SGreg Kroah-Hartman .minor = MINOR_START, 1370ab4382d2SGreg Kroah-Hartman .nr = ARRAY_SIZE(imx_ports), 1371ab4382d2SGreg Kroah-Hartman .cons = IMX_CONSOLE, 1372ab4382d2SGreg Kroah-Hartman }; 1373ab4382d2SGreg Kroah-Hartman 1374ab4382d2SGreg Kroah-Hartman static int serial_imx_suspend(struct platform_device *dev, pm_message_t state) 1375ab4382d2SGreg Kroah-Hartman { 1376ab4382d2SGreg Kroah-Hartman struct imx_port *sport = platform_get_drvdata(dev); 1377db1a9b55SFabio Estevam unsigned int val; 1378db1a9b55SFabio Estevam 1379db1a9b55SFabio Estevam /* enable wakeup from i.MX UART */ 1380db1a9b55SFabio Estevam val = readl(sport->port.membase + UCR3); 1381db1a9b55SFabio Estevam val |= UCR3_AWAKEN; 1382db1a9b55SFabio Estevam writel(val, sport->port.membase + UCR3); 1383ab4382d2SGreg Kroah-Hartman 1384ab4382d2SGreg Kroah-Hartman uart_suspend_port(&imx_reg, &sport->port); 1385ab4382d2SGreg Kroah-Hartman 1386ab4382d2SGreg Kroah-Hartman return 0; 1387ab4382d2SGreg Kroah-Hartman } 1388ab4382d2SGreg Kroah-Hartman 1389ab4382d2SGreg Kroah-Hartman static int serial_imx_resume(struct platform_device *dev) 1390ab4382d2SGreg Kroah-Hartman { 1391ab4382d2SGreg Kroah-Hartman struct imx_port *sport = platform_get_drvdata(dev); 1392db1a9b55SFabio Estevam unsigned int val; 1393db1a9b55SFabio Estevam 1394db1a9b55SFabio Estevam /* disable wakeup from i.MX UART */ 1395db1a9b55SFabio Estevam val = readl(sport->port.membase + UCR3); 1396db1a9b55SFabio Estevam val &= ~UCR3_AWAKEN; 1397db1a9b55SFabio Estevam writel(val, sport->port.membase + UCR3); 1398ab4382d2SGreg Kroah-Hartman 1399ab4382d2SGreg Kroah-Hartman uart_resume_port(&imx_reg, &sport->port); 1400ab4382d2SGreg Kroah-Hartman 1401ab4382d2SGreg Kroah-Hartman return 0; 1402ab4382d2SGreg Kroah-Hartman } 1403ab4382d2SGreg Kroah-Hartman 140422698aa2SShawn Guo #ifdef CONFIG_OF 140520bb8095SUwe Kleine-König /* 140620bb8095SUwe Kleine-König * This function returns 1 iff pdev isn't a device instatiated by dt, 0 iff it 140720bb8095SUwe Kleine-König * could successfully get all information from dt or a negative errno. 140820bb8095SUwe Kleine-König */ 140922698aa2SShawn Guo static int serial_imx_probe_dt(struct imx_port *sport, 141022698aa2SShawn Guo struct platform_device *pdev) 141122698aa2SShawn Guo { 141222698aa2SShawn Guo struct device_node *np = pdev->dev.of_node; 141322698aa2SShawn Guo const struct of_device_id *of_id = 141422698aa2SShawn Guo of_match_device(imx_uart_dt_ids, &pdev->dev); 1415ff05967aSShawn Guo int ret; 141622698aa2SShawn Guo 141722698aa2SShawn Guo if (!np) 141820bb8095SUwe Kleine-König /* no device tree device */ 141920bb8095SUwe Kleine-König return 1; 142022698aa2SShawn Guo 1421ff05967aSShawn Guo ret = of_alias_get_id(np, "serial"); 1422ff05967aSShawn Guo if (ret < 0) { 1423ff05967aSShawn Guo dev_err(&pdev->dev, "failed to get alias id, errno %d\n", ret); 1424a197a191SUwe Kleine-König return ret; 1425ff05967aSShawn Guo } 1426ff05967aSShawn Guo sport->port.line = ret; 142722698aa2SShawn Guo 142822698aa2SShawn Guo if (of_get_property(np, "fsl,uart-has-rtscts", NULL)) 142922698aa2SShawn Guo sport->have_rtscts = 1; 143022698aa2SShawn Guo 143122698aa2SShawn Guo if (of_get_property(np, "fsl,irda-mode", NULL)) 143222698aa2SShawn Guo sport->use_irda = 1; 143322698aa2SShawn Guo 143422698aa2SShawn Guo sport->devdata = of_id->data; 143522698aa2SShawn Guo 143622698aa2SShawn Guo return 0; 143722698aa2SShawn Guo } 143822698aa2SShawn Guo #else 143922698aa2SShawn Guo static inline int serial_imx_probe_dt(struct imx_port *sport, 144022698aa2SShawn Guo struct platform_device *pdev) 144122698aa2SShawn Guo { 144220bb8095SUwe Kleine-König return 1; 144322698aa2SShawn Guo } 144422698aa2SShawn Guo #endif 144522698aa2SShawn Guo 144622698aa2SShawn Guo static void serial_imx_probe_pdata(struct imx_port *sport, 144722698aa2SShawn Guo struct platform_device *pdev) 144822698aa2SShawn Guo { 144922698aa2SShawn Guo struct imxuart_platform_data *pdata = pdev->dev.platform_data; 145022698aa2SShawn Guo 145122698aa2SShawn Guo sport->port.line = pdev->id; 145222698aa2SShawn Guo sport->devdata = (struct imx_uart_data *) pdev->id_entry->driver_data; 145322698aa2SShawn Guo 145422698aa2SShawn Guo if (!pdata) 145522698aa2SShawn Guo return; 145622698aa2SShawn Guo 145722698aa2SShawn Guo if (pdata->flags & IMXUART_HAVE_RTSCTS) 145822698aa2SShawn Guo sport->have_rtscts = 1; 145922698aa2SShawn Guo 146022698aa2SShawn Guo if (pdata->flags & IMXUART_IRDA) 146122698aa2SShawn Guo sport->use_irda = 1; 146222698aa2SShawn Guo } 146322698aa2SShawn Guo 1464ab4382d2SGreg Kroah-Hartman static int serial_imx_probe(struct platform_device *pdev) 1465ab4382d2SGreg Kroah-Hartman { 1466ab4382d2SGreg Kroah-Hartman struct imx_port *sport; 1467ab4382d2SGreg Kroah-Hartman struct imxuart_platform_data *pdata; 1468ab4382d2SGreg Kroah-Hartman void __iomem *base; 1469ab4382d2SGreg Kroah-Hartman int ret = 0; 1470ab4382d2SGreg Kroah-Hartman struct resource *res; 1471fed78ce4SShawn Guo struct pinctrl *pinctrl; 1472ab4382d2SGreg Kroah-Hartman 147342d34191SSachin Kamat sport = devm_kzalloc(&pdev->dev, sizeof(*sport), GFP_KERNEL); 1474ab4382d2SGreg Kroah-Hartman if (!sport) 1475ab4382d2SGreg Kroah-Hartman return -ENOMEM; 1476ab4382d2SGreg Kroah-Hartman 147722698aa2SShawn Guo ret = serial_imx_probe_dt(sport, pdev); 147820bb8095SUwe Kleine-König if (ret > 0) 147922698aa2SShawn Guo serial_imx_probe_pdata(sport, pdev); 148020bb8095SUwe Kleine-König else if (ret < 0) 148142d34191SSachin Kamat return ret; 148222698aa2SShawn Guo 1483ab4382d2SGreg Kroah-Hartman res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 148442d34191SSachin Kamat if (!res) 148542d34191SSachin Kamat return -ENODEV; 1486ab4382d2SGreg Kroah-Hartman 148742d34191SSachin Kamat base = devm_ioremap(&pdev->dev, res->start, PAGE_SIZE); 148842d34191SSachin Kamat if (!base) 148942d34191SSachin Kamat return -ENOMEM; 1490ab4382d2SGreg Kroah-Hartman 1491ab4382d2SGreg Kroah-Hartman sport->port.dev = &pdev->dev; 1492ab4382d2SGreg Kroah-Hartman sport->port.mapbase = res->start; 1493ab4382d2SGreg Kroah-Hartman sport->port.membase = base; 1494ab4382d2SGreg Kroah-Hartman sport->port.type = PORT_IMX, 1495ab4382d2SGreg Kroah-Hartman sport->port.iotype = UPIO_MEM; 1496ab4382d2SGreg Kroah-Hartman sport->port.irq = platform_get_irq(pdev, 0); 1497ab4382d2SGreg Kroah-Hartman sport->rxirq = platform_get_irq(pdev, 0); 1498ab4382d2SGreg Kroah-Hartman sport->txirq = platform_get_irq(pdev, 1); 1499ab4382d2SGreg Kroah-Hartman sport->rtsirq = platform_get_irq(pdev, 2); 1500ab4382d2SGreg Kroah-Hartman sport->port.fifosize = 32; 1501ab4382d2SGreg Kroah-Hartman sport->port.ops = &imx_pops; 1502ab4382d2SGreg Kroah-Hartman sport->port.flags = UPF_BOOT_AUTOCONF; 1503ab4382d2SGreg Kroah-Hartman init_timer(&sport->timer); 1504ab4382d2SGreg Kroah-Hartman sport->timer.function = imx_timeout; 1505ab4382d2SGreg Kroah-Hartman sport->timer.data = (unsigned long)sport; 1506ab4382d2SGreg Kroah-Hartman 1507fed78ce4SShawn Guo pinctrl = devm_pinctrl_get_select_default(&pdev->dev); 1508fed78ce4SShawn Guo if (IS_ERR(pinctrl)) { 1509fed78ce4SShawn Guo ret = PTR_ERR(pinctrl); 1510833462e9SUwe Kleine-König dev_err(&pdev->dev, "failed to get default pinctrl: %d\n", ret); 151142d34191SSachin Kamat return ret; 1512fed78ce4SShawn Guo } 1513fed78ce4SShawn Guo 15143a9465faSSascha Hauer sport->clk_ipg = devm_clk_get(&pdev->dev, "ipg"); 15153a9465faSSascha Hauer if (IS_ERR(sport->clk_ipg)) { 15163a9465faSSascha Hauer ret = PTR_ERR(sport->clk_ipg); 1517833462e9SUwe Kleine-König dev_err(&pdev->dev, "failed to get ipg clk: %d\n", ret); 151842d34191SSachin Kamat return ret; 1519ab4382d2SGreg Kroah-Hartman } 1520ab4382d2SGreg Kroah-Hartman 15213a9465faSSascha Hauer sport->clk_per = devm_clk_get(&pdev->dev, "per"); 15223a9465faSSascha Hauer if (IS_ERR(sport->clk_per)) { 15233a9465faSSascha Hauer ret = PTR_ERR(sport->clk_per); 1524833462e9SUwe Kleine-König dev_err(&pdev->dev, "failed to get per clk: %d\n", ret); 152542d34191SSachin Kamat return ret; 15263a9465faSSascha Hauer } 15273a9465faSSascha Hauer 15283a9465faSSascha Hauer clk_prepare_enable(sport->clk_per); 15293a9465faSSascha Hauer clk_prepare_enable(sport->clk_ipg); 15303a9465faSSascha Hauer 15313a9465faSSascha Hauer sport->port.uartclk = clk_get_rate(sport->clk_per); 1532ab4382d2SGreg Kroah-Hartman 153322698aa2SShawn Guo imx_ports[sport->port.line] = sport; 1534ab4382d2SGreg Kroah-Hartman 1535ab4382d2SGreg Kroah-Hartman pdata = pdev->dev.platform_data; 1536ab4382d2SGreg Kroah-Hartman if (pdata && pdata->init) { 1537ab4382d2SGreg Kroah-Hartman ret = pdata->init(pdev); 1538ab4382d2SGreg Kroah-Hartman if (ret) 1539ab4382d2SGreg Kroah-Hartman goto clkput; 1540ab4382d2SGreg Kroah-Hartman } 1541ab4382d2SGreg Kroah-Hartman 1542ab4382d2SGreg Kroah-Hartman ret = uart_add_one_port(&imx_reg, &sport->port); 1543ab4382d2SGreg Kroah-Hartman if (ret) 1544ab4382d2SGreg Kroah-Hartman goto deinit; 15450a86a86bSRichard Zhao platform_set_drvdata(pdev, sport); 1546ab4382d2SGreg Kroah-Hartman 1547ab4382d2SGreg Kroah-Hartman return 0; 1548ab4382d2SGreg Kroah-Hartman deinit: 1549ab4382d2SGreg Kroah-Hartman if (pdata && pdata->exit) 1550ab4382d2SGreg Kroah-Hartman pdata->exit(pdev); 1551ab4382d2SGreg Kroah-Hartman clkput: 15523a9465faSSascha Hauer clk_disable_unprepare(sport->clk_per); 15533a9465faSSascha Hauer clk_disable_unprepare(sport->clk_ipg); 1554ab4382d2SGreg Kroah-Hartman return ret; 1555ab4382d2SGreg Kroah-Hartman } 1556ab4382d2SGreg Kroah-Hartman 1557ab4382d2SGreg Kroah-Hartman static int serial_imx_remove(struct platform_device *pdev) 1558ab4382d2SGreg Kroah-Hartman { 1559ab4382d2SGreg Kroah-Hartman struct imxuart_platform_data *pdata; 1560ab4382d2SGreg Kroah-Hartman struct imx_port *sport = platform_get_drvdata(pdev); 1561ab4382d2SGreg Kroah-Hartman 1562ab4382d2SGreg Kroah-Hartman pdata = pdev->dev.platform_data; 1563ab4382d2SGreg Kroah-Hartman 1564ab4382d2SGreg Kroah-Hartman platform_set_drvdata(pdev, NULL); 1565ab4382d2SGreg Kroah-Hartman 1566ab4382d2SGreg Kroah-Hartman uart_remove_one_port(&imx_reg, &sport->port); 15673a9465faSSascha Hauer 15683a9465faSSascha Hauer clk_disable_unprepare(sport->clk_per); 15693a9465faSSascha Hauer clk_disable_unprepare(sport->clk_ipg); 1570ab4382d2SGreg Kroah-Hartman 1571ab4382d2SGreg Kroah-Hartman if (pdata && pdata->exit) 1572ab4382d2SGreg Kroah-Hartman pdata->exit(pdev); 1573ab4382d2SGreg Kroah-Hartman 1574ab4382d2SGreg Kroah-Hartman return 0; 1575ab4382d2SGreg Kroah-Hartman } 1576ab4382d2SGreg Kroah-Hartman 1577ab4382d2SGreg Kroah-Hartman static struct platform_driver serial_imx_driver = { 1578ab4382d2SGreg Kroah-Hartman .probe = serial_imx_probe, 1579ab4382d2SGreg Kroah-Hartman .remove = serial_imx_remove, 1580ab4382d2SGreg Kroah-Hartman 1581ab4382d2SGreg Kroah-Hartman .suspend = serial_imx_suspend, 1582ab4382d2SGreg Kroah-Hartman .resume = serial_imx_resume, 1583fe6b540aSShawn Guo .id_table = imx_uart_devtype, 1584ab4382d2SGreg Kroah-Hartman .driver = { 1585ab4382d2SGreg Kroah-Hartman .name = "imx-uart", 1586ab4382d2SGreg Kroah-Hartman .owner = THIS_MODULE, 158722698aa2SShawn Guo .of_match_table = imx_uart_dt_ids, 1588ab4382d2SGreg Kroah-Hartman }, 1589ab4382d2SGreg Kroah-Hartman }; 1590ab4382d2SGreg Kroah-Hartman 1591ab4382d2SGreg Kroah-Hartman static int __init imx_serial_init(void) 1592ab4382d2SGreg Kroah-Hartman { 1593ab4382d2SGreg Kroah-Hartman int ret; 1594ab4382d2SGreg Kroah-Hartman 159550bbdba3SSachin Kamat pr_info("Serial: IMX driver\n"); 1596ab4382d2SGreg Kroah-Hartman 1597ab4382d2SGreg Kroah-Hartman ret = uart_register_driver(&imx_reg); 1598ab4382d2SGreg Kroah-Hartman if (ret) 1599ab4382d2SGreg Kroah-Hartman return ret; 1600ab4382d2SGreg Kroah-Hartman 1601ab4382d2SGreg Kroah-Hartman ret = platform_driver_register(&serial_imx_driver); 1602ab4382d2SGreg Kroah-Hartman if (ret != 0) 1603ab4382d2SGreg Kroah-Hartman uart_unregister_driver(&imx_reg); 1604ab4382d2SGreg Kroah-Hartman 1605f227824eSUwe Kleine-König return ret; 1606ab4382d2SGreg Kroah-Hartman } 1607ab4382d2SGreg Kroah-Hartman 1608ab4382d2SGreg Kroah-Hartman static void __exit imx_serial_exit(void) 1609ab4382d2SGreg Kroah-Hartman { 1610ab4382d2SGreg Kroah-Hartman platform_driver_unregister(&serial_imx_driver); 1611ab4382d2SGreg Kroah-Hartman uart_unregister_driver(&imx_reg); 1612ab4382d2SGreg Kroah-Hartman } 1613ab4382d2SGreg Kroah-Hartman 1614ab4382d2SGreg Kroah-Hartman module_init(imx_serial_init); 1615ab4382d2SGreg Kroah-Hartman module_exit(imx_serial_exit); 1616ab4382d2SGreg Kroah-Hartman 1617ab4382d2SGreg Kroah-Hartman MODULE_AUTHOR("Sascha Hauer"); 1618ab4382d2SGreg Kroah-Hartman MODULE_DESCRIPTION("IMX generic serial port driver"); 1619ab4382d2SGreg Kroah-Hartman MODULE_LICENSE("GPL"); 1620ab4382d2SGreg Kroah-Hartman MODULE_ALIAS("platform:imx-uart"); 1621