1ab4382d2SGreg Kroah-Hartman /* 2ab4382d2SGreg Kroah-Hartman * linux/drivers/serial/imx.c 3ab4382d2SGreg Kroah-Hartman * 4ab4382d2SGreg Kroah-Hartman * Driver for Motorola IMX serial ports 5ab4382d2SGreg Kroah-Hartman * 6ab4382d2SGreg Kroah-Hartman * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o. 7ab4382d2SGreg Kroah-Hartman * 8ab4382d2SGreg Kroah-Hartman * Author: Sascha Hauer <sascha@saschahauer.de> 9ab4382d2SGreg Kroah-Hartman * Copyright (C) 2004 Pengutronix 10ab4382d2SGreg Kroah-Hartman * 11ab4382d2SGreg Kroah-Hartman * Copyright (C) 2009 emlix GmbH 12ab4382d2SGreg Kroah-Hartman * Author: Fabian Godehardt (added IrDA support for iMX) 13ab4382d2SGreg Kroah-Hartman * 14ab4382d2SGreg Kroah-Hartman * This program is free software; you can redistribute it and/or modify 15ab4382d2SGreg Kroah-Hartman * it under the terms of the GNU General Public License as published by 16ab4382d2SGreg Kroah-Hartman * the Free Software Foundation; either version 2 of the License, or 17ab4382d2SGreg Kroah-Hartman * (at your option) any later version. 18ab4382d2SGreg Kroah-Hartman * 19ab4382d2SGreg Kroah-Hartman * This program is distributed in the hope that it will be useful, 20ab4382d2SGreg Kroah-Hartman * but WITHOUT ANY WARRANTY; without even the implied warranty of 21ab4382d2SGreg Kroah-Hartman * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 22ab4382d2SGreg Kroah-Hartman * GNU General Public License for more details. 23ab4382d2SGreg Kroah-Hartman * 24ab4382d2SGreg Kroah-Hartman * You should have received a copy of the GNU General Public License 25ab4382d2SGreg Kroah-Hartman * along with this program; if not, write to the Free Software 26ab4382d2SGreg Kroah-Hartman * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 27ab4382d2SGreg Kroah-Hartman * 28ab4382d2SGreg Kroah-Hartman * [29-Mar-2005] Mike Lee 29ab4382d2SGreg Kroah-Hartman * Added hardware handshake 30ab4382d2SGreg Kroah-Hartman */ 31ab4382d2SGreg Kroah-Hartman 32ab4382d2SGreg Kroah-Hartman #if defined(CONFIG_SERIAL_IMX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) 33ab4382d2SGreg Kroah-Hartman #define SUPPORT_SYSRQ 34ab4382d2SGreg Kroah-Hartman #endif 35ab4382d2SGreg Kroah-Hartman 36ab4382d2SGreg Kroah-Hartman #include <linux/module.h> 37ab4382d2SGreg Kroah-Hartman #include <linux/ioport.h> 38ab4382d2SGreg Kroah-Hartman #include <linux/init.h> 39ab4382d2SGreg Kroah-Hartman #include <linux/console.h> 40ab4382d2SGreg Kroah-Hartman #include <linux/sysrq.h> 41ab4382d2SGreg Kroah-Hartman #include <linux/platform_device.h> 42ab4382d2SGreg Kroah-Hartman #include <linux/tty.h> 43ab4382d2SGreg Kroah-Hartman #include <linux/tty_flip.h> 44ab4382d2SGreg Kroah-Hartman #include <linux/serial_core.h> 45ab4382d2SGreg Kroah-Hartman #include <linux/serial.h> 46ab4382d2SGreg Kroah-Hartman #include <linux/clk.h> 47ab4382d2SGreg Kroah-Hartman #include <linux/delay.h> 48ab4382d2SGreg Kroah-Hartman #include <linux/rational.h> 49ab4382d2SGreg Kroah-Hartman #include <linux/slab.h> 50ab4382d2SGreg Kroah-Hartman 51ab4382d2SGreg Kroah-Hartman #include <asm/io.h> 52ab4382d2SGreg Kroah-Hartman #include <asm/irq.h> 53ab4382d2SGreg Kroah-Hartman #include <mach/hardware.h> 54ab4382d2SGreg Kroah-Hartman #include <mach/imx-uart.h> 55ab4382d2SGreg Kroah-Hartman 56ab4382d2SGreg Kroah-Hartman /* Register definitions */ 57ab4382d2SGreg Kroah-Hartman #define URXD0 0x0 /* Receiver Register */ 58ab4382d2SGreg Kroah-Hartman #define URTX0 0x40 /* Transmitter Register */ 59ab4382d2SGreg Kroah-Hartman #define UCR1 0x80 /* Control Register 1 */ 60ab4382d2SGreg Kroah-Hartman #define UCR2 0x84 /* Control Register 2 */ 61ab4382d2SGreg Kroah-Hartman #define UCR3 0x88 /* Control Register 3 */ 62ab4382d2SGreg Kroah-Hartman #define UCR4 0x8c /* Control Register 4 */ 63ab4382d2SGreg Kroah-Hartman #define UFCR 0x90 /* FIFO Control Register */ 64ab4382d2SGreg Kroah-Hartman #define USR1 0x94 /* Status Register 1 */ 65ab4382d2SGreg Kroah-Hartman #define USR2 0x98 /* Status Register 2 */ 66ab4382d2SGreg Kroah-Hartman #define UESC 0x9c /* Escape Character Register */ 67ab4382d2SGreg Kroah-Hartman #define UTIM 0xa0 /* Escape Timer Register */ 68ab4382d2SGreg Kroah-Hartman #define UBIR 0xa4 /* BRM Incremental Register */ 69ab4382d2SGreg Kroah-Hartman #define UBMR 0xa8 /* BRM Modulator Register */ 70ab4382d2SGreg Kroah-Hartman #define UBRC 0xac /* Baud Rate Count Register */ 71ab4382d2SGreg Kroah-Hartman #define MX2_ONEMS 0xb0 /* One Millisecond register */ 72ab4382d2SGreg Kroah-Hartman #define UTS (cpu_is_mx1() ? 0xd0 : 0xb4) /* UART Test Register */ 73ab4382d2SGreg Kroah-Hartman 74ab4382d2SGreg Kroah-Hartman /* UART Control Register Bit Fields.*/ 75ab4382d2SGreg Kroah-Hartman #define URXD_CHARRDY (1<<15) 76ab4382d2SGreg Kroah-Hartman #define URXD_ERR (1<<14) 77ab4382d2SGreg Kroah-Hartman #define URXD_OVRRUN (1<<13) 78ab4382d2SGreg Kroah-Hartman #define URXD_FRMERR (1<<12) 79ab4382d2SGreg Kroah-Hartman #define URXD_BRK (1<<11) 80ab4382d2SGreg Kroah-Hartman #define URXD_PRERR (1<<10) 81ab4382d2SGreg Kroah-Hartman #define UCR1_ADEN (1<<15) /* Auto dectect interrupt */ 82ab4382d2SGreg Kroah-Hartman #define UCR1_ADBR (1<<14) /* Auto detect baud rate */ 83ab4382d2SGreg Kroah-Hartman #define UCR1_TRDYEN (1<<13) /* Transmitter ready interrupt enable */ 84ab4382d2SGreg Kroah-Hartman #define UCR1_IDEN (1<<12) /* Idle condition interrupt */ 85ab4382d2SGreg Kroah-Hartman #define UCR1_RRDYEN (1<<9) /* Recv ready interrupt enable */ 86ab4382d2SGreg Kroah-Hartman #define UCR1_RDMAEN (1<<8) /* Recv ready DMA enable */ 87ab4382d2SGreg Kroah-Hartman #define UCR1_IREN (1<<7) /* Infrared interface enable */ 88ab4382d2SGreg Kroah-Hartman #define UCR1_TXMPTYEN (1<<6) /* Transimitter empty interrupt enable */ 89ab4382d2SGreg Kroah-Hartman #define UCR1_RTSDEN (1<<5) /* RTS delta interrupt enable */ 90ab4382d2SGreg Kroah-Hartman #define UCR1_SNDBRK (1<<4) /* Send break */ 91ab4382d2SGreg Kroah-Hartman #define UCR1_TDMAEN (1<<3) /* Transmitter ready DMA enable */ 92ab4382d2SGreg Kroah-Hartman #define MX1_UCR1_UARTCLKEN (1<<2) /* UART clock enabled, mx1 only */ 93ab4382d2SGreg Kroah-Hartman #define UCR1_DOZE (1<<1) /* Doze */ 94ab4382d2SGreg Kroah-Hartman #define UCR1_UARTEN (1<<0) /* UART enabled */ 95ab4382d2SGreg Kroah-Hartman #define UCR2_ESCI (1<<15) /* Escape seq interrupt enable */ 96ab4382d2SGreg Kroah-Hartman #define UCR2_IRTS (1<<14) /* Ignore RTS pin */ 97ab4382d2SGreg Kroah-Hartman #define UCR2_CTSC (1<<13) /* CTS pin control */ 98ab4382d2SGreg Kroah-Hartman #define UCR2_CTS (1<<12) /* Clear to send */ 99ab4382d2SGreg Kroah-Hartman #define UCR2_ESCEN (1<<11) /* Escape enable */ 100ab4382d2SGreg Kroah-Hartman #define UCR2_PREN (1<<8) /* Parity enable */ 101ab4382d2SGreg Kroah-Hartman #define UCR2_PROE (1<<7) /* Parity odd/even */ 102ab4382d2SGreg Kroah-Hartman #define UCR2_STPB (1<<6) /* Stop */ 103ab4382d2SGreg Kroah-Hartman #define UCR2_WS (1<<5) /* Word size */ 104ab4382d2SGreg Kroah-Hartman #define UCR2_RTSEN (1<<4) /* Request to send interrupt enable */ 105ab4382d2SGreg Kroah-Hartman #define UCR2_TXEN (1<<2) /* Transmitter enabled */ 106ab4382d2SGreg Kroah-Hartman #define UCR2_RXEN (1<<1) /* Receiver enabled */ 107ab4382d2SGreg Kroah-Hartman #define UCR2_SRST (1<<0) /* SW reset */ 108ab4382d2SGreg Kroah-Hartman #define UCR3_DTREN (1<<13) /* DTR interrupt enable */ 109ab4382d2SGreg Kroah-Hartman #define UCR3_PARERREN (1<<12) /* Parity enable */ 110ab4382d2SGreg Kroah-Hartman #define UCR3_FRAERREN (1<<11) /* Frame error interrupt enable */ 111ab4382d2SGreg Kroah-Hartman #define UCR3_DSR (1<<10) /* Data set ready */ 112ab4382d2SGreg Kroah-Hartman #define UCR3_DCD (1<<9) /* Data carrier detect */ 113ab4382d2SGreg Kroah-Hartman #define UCR3_RI (1<<8) /* Ring indicator */ 114ab4382d2SGreg Kroah-Hartman #define UCR3_TIMEOUTEN (1<<7) /* Timeout interrupt enable */ 115ab4382d2SGreg Kroah-Hartman #define UCR3_RXDSEN (1<<6) /* Receive status interrupt enable */ 116ab4382d2SGreg Kroah-Hartman #define UCR3_AIRINTEN (1<<5) /* Async IR wake interrupt enable */ 117ab4382d2SGreg Kroah-Hartman #define UCR3_AWAKEN (1<<4) /* Async wake interrupt enable */ 118ab4382d2SGreg Kroah-Hartman #define MX1_UCR3_REF25 (1<<3) /* Ref freq 25 MHz, only on mx1 */ 119ab4382d2SGreg Kroah-Hartman #define MX1_UCR3_REF30 (1<<2) /* Ref Freq 30 MHz, only on mx1 */ 120ab4382d2SGreg Kroah-Hartman #define MX2_UCR3_RXDMUXSEL (1<<2) /* RXD Muxed Input Select, on mx2/mx3 */ 121ab4382d2SGreg Kroah-Hartman #define UCR3_INVT (1<<1) /* Inverted Infrared transmission */ 122ab4382d2SGreg Kroah-Hartman #define UCR3_BPEN (1<<0) /* Preset registers enable */ 123ab4382d2SGreg Kroah-Hartman #define UCR4_CTSTL_SHF 10 /* CTS trigger level shift */ 124ab4382d2SGreg Kroah-Hartman #define UCR4_CTSTL_MASK 0x3F /* CTS trigger is 6 bits wide */ 125ab4382d2SGreg Kroah-Hartman #define UCR4_INVR (1<<9) /* Inverted infrared reception */ 126ab4382d2SGreg Kroah-Hartman #define UCR4_ENIRI (1<<8) /* Serial infrared interrupt enable */ 127ab4382d2SGreg Kroah-Hartman #define UCR4_WKEN (1<<7) /* Wake interrupt enable */ 128ab4382d2SGreg Kroah-Hartman #define UCR4_REF16 (1<<6) /* Ref freq 16 MHz */ 129ab4382d2SGreg Kroah-Hartman #define UCR4_IRSC (1<<5) /* IR special case */ 130ab4382d2SGreg Kroah-Hartman #define UCR4_TCEN (1<<3) /* Transmit complete interrupt enable */ 131ab4382d2SGreg Kroah-Hartman #define UCR4_BKEN (1<<2) /* Break condition interrupt enable */ 132ab4382d2SGreg Kroah-Hartman #define UCR4_OREN (1<<1) /* Receiver overrun interrupt enable */ 133ab4382d2SGreg Kroah-Hartman #define UCR4_DREN (1<<0) /* Recv data ready interrupt enable */ 134ab4382d2SGreg Kroah-Hartman #define UFCR_RXTL_SHF 0 /* Receiver trigger level shift */ 135ab4382d2SGreg Kroah-Hartman #define UFCR_RFDIV (7<<7) /* Reference freq divider mask */ 136ab4382d2SGreg Kroah-Hartman #define UFCR_RFDIV_REG(x) (((x) < 7 ? 6 - (x) : 6) << 7) 137ab4382d2SGreg Kroah-Hartman #define UFCR_TXTL_SHF 10 /* Transmitter trigger level shift */ 138ab4382d2SGreg Kroah-Hartman #define USR1_PARITYERR (1<<15) /* Parity error interrupt flag */ 139ab4382d2SGreg Kroah-Hartman #define USR1_RTSS (1<<14) /* RTS pin status */ 140ab4382d2SGreg Kroah-Hartman #define USR1_TRDY (1<<13) /* Transmitter ready interrupt/dma flag */ 141ab4382d2SGreg Kroah-Hartman #define USR1_RTSD (1<<12) /* RTS delta */ 142ab4382d2SGreg Kroah-Hartman #define USR1_ESCF (1<<11) /* Escape seq interrupt flag */ 143ab4382d2SGreg Kroah-Hartman #define USR1_FRAMERR (1<<10) /* Frame error interrupt flag */ 144ab4382d2SGreg Kroah-Hartman #define USR1_RRDY (1<<9) /* Receiver ready interrupt/dma flag */ 145ab4382d2SGreg Kroah-Hartman #define USR1_TIMEOUT (1<<7) /* Receive timeout interrupt status */ 146ab4382d2SGreg Kroah-Hartman #define USR1_RXDS (1<<6) /* Receiver idle interrupt flag */ 147ab4382d2SGreg Kroah-Hartman #define USR1_AIRINT (1<<5) /* Async IR wake interrupt flag */ 148ab4382d2SGreg Kroah-Hartman #define USR1_AWAKE (1<<4) /* Aysnc wake interrupt flag */ 149ab4382d2SGreg Kroah-Hartman #define USR2_ADET (1<<15) /* Auto baud rate detect complete */ 150ab4382d2SGreg Kroah-Hartman #define USR2_TXFE (1<<14) /* Transmit buffer FIFO empty */ 151ab4382d2SGreg Kroah-Hartman #define USR2_DTRF (1<<13) /* DTR edge interrupt flag */ 152ab4382d2SGreg Kroah-Hartman #define USR2_IDLE (1<<12) /* Idle condition */ 153ab4382d2SGreg Kroah-Hartman #define USR2_IRINT (1<<8) /* Serial infrared interrupt flag */ 154ab4382d2SGreg Kroah-Hartman #define USR2_WAKE (1<<7) /* Wake */ 155ab4382d2SGreg Kroah-Hartman #define USR2_RTSF (1<<4) /* RTS edge interrupt flag */ 156ab4382d2SGreg Kroah-Hartman #define USR2_TXDC (1<<3) /* Transmitter complete */ 157ab4382d2SGreg Kroah-Hartman #define USR2_BRCD (1<<2) /* Break condition */ 158ab4382d2SGreg Kroah-Hartman #define USR2_ORE (1<<1) /* Overrun error */ 159ab4382d2SGreg Kroah-Hartman #define USR2_RDR (1<<0) /* Recv data ready */ 160ab4382d2SGreg Kroah-Hartman #define UTS_FRCPERR (1<<13) /* Force parity error */ 161ab4382d2SGreg Kroah-Hartman #define UTS_LOOP (1<<12) /* Loop tx and rx */ 162ab4382d2SGreg Kroah-Hartman #define UTS_TXEMPTY (1<<6) /* TxFIFO empty */ 163ab4382d2SGreg Kroah-Hartman #define UTS_RXEMPTY (1<<5) /* RxFIFO empty */ 164ab4382d2SGreg Kroah-Hartman #define UTS_TXFULL (1<<4) /* TxFIFO full */ 165ab4382d2SGreg Kroah-Hartman #define UTS_RXFULL (1<<3) /* RxFIFO full */ 166ab4382d2SGreg Kroah-Hartman #define UTS_SOFTRST (1<<0) /* Software reset */ 167ab4382d2SGreg Kroah-Hartman 168ab4382d2SGreg Kroah-Hartman /* We've been assigned a range on the "Low-density serial ports" major */ 169ab4382d2SGreg Kroah-Hartman #define SERIAL_IMX_MAJOR 207 170ab4382d2SGreg Kroah-Hartman #define MINOR_START 16 171ab4382d2SGreg Kroah-Hartman #define DEV_NAME "ttymxc" 172ab4382d2SGreg Kroah-Hartman #define MAX_INTERNAL_IRQ MXC_INTERNAL_IRQS 173ab4382d2SGreg Kroah-Hartman 174ab4382d2SGreg Kroah-Hartman /* 175ab4382d2SGreg Kroah-Hartman * This determines how often we check the modem status signals 176ab4382d2SGreg Kroah-Hartman * for any change. They generally aren't connected to an IRQ 177ab4382d2SGreg Kroah-Hartman * so we have to poll them. We also check immediately before 178ab4382d2SGreg Kroah-Hartman * filling the TX fifo incase CTS has been dropped. 179ab4382d2SGreg Kroah-Hartman */ 180ab4382d2SGreg Kroah-Hartman #define MCTRL_TIMEOUT (250*HZ/1000) 181ab4382d2SGreg Kroah-Hartman 182ab4382d2SGreg Kroah-Hartman #define DRIVER_NAME "IMX-uart" 183ab4382d2SGreg Kroah-Hartman 184ab4382d2SGreg Kroah-Hartman #define UART_NR 8 185ab4382d2SGreg Kroah-Hartman 186ab4382d2SGreg Kroah-Hartman struct imx_port { 187ab4382d2SGreg Kroah-Hartman struct uart_port port; 188ab4382d2SGreg Kroah-Hartman struct timer_list timer; 189ab4382d2SGreg Kroah-Hartman unsigned int old_status; 190ab4382d2SGreg Kroah-Hartman int txirq,rxirq,rtsirq; 191ab4382d2SGreg Kroah-Hartman unsigned int have_rtscts:1; 192ab4382d2SGreg Kroah-Hartman unsigned int use_irda:1; 193ab4382d2SGreg Kroah-Hartman unsigned int irda_inv_rx:1; 194ab4382d2SGreg Kroah-Hartman unsigned int irda_inv_tx:1; 195ab4382d2SGreg Kroah-Hartman unsigned short trcv_delay; /* transceiver delay */ 196ab4382d2SGreg Kroah-Hartman struct clk *clk; 197ab4382d2SGreg Kroah-Hartman }; 198ab4382d2SGreg Kroah-Hartman 199ab4382d2SGreg Kroah-Hartman #ifdef CONFIG_IRDA 200ab4382d2SGreg Kroah-Hartman #define USE_IRDA(sport) ((sport)->use_irda) 201ab4382d2SGreg Kroah-Hartman #else 202ab4382d2SGreg Kroah-Hartman #define USE_IRDA(sport) (0) 203ab4382d2SGreg Kroah-Hartman #endif 204ab4382d2SGreg Kroah-Hartman 205ab4382d2SGreg Kroah-Hartman /* 206ab4382d2SGreg Kroah-Hartman * Handle any change of modem status signal since we were last called. 207ab4382d2SGreg Kroah-Hartman */ 208ab4382d2SGreg Kroah-Hartman static void imx_mctrl_check(struct imx_port *sport) 209ab4382d2SGreg Kroah-Hartman { 210ab4382d2SGreg Kroah-Hartman unsigned int status, changed; 211ab4382d2SGreg Kroah-Hartman 212ab4382d2SGreg Kroah-Hartman status = sport->port.ops->get_mctrl(&sport->port); 213ab4382d2SGreg Kroah-Hartman changed = status ^ sport->old_status; 214ab4382d2SGreg Kroah-Hartman 215ab4382d2SGreg Kroah-Hartman if (changed == 0) 216ab4382d2SGreg Kroah-Hartman return; 217ab4382d2SGreg Kroah-Hartman 218ab4382d2SGreg Kroah-Hartman sport->old_status = status; 219ab4382d2SGreg Kroah-Hartman 220ab4382d2SGreg Kroah-Hartman if (changed & TIOCM_RI) 221ab4382d2SGreg Kroah-Hartman sport->port.icount.rng++; 222ab4382d2SGreg Kroah-Hartman if (changed & TIOCM_DSR) 223ab4382d2SGreg Kroah-Hartman sport->port.icount.dsr++; 224ab4382d2SGreg Kroah-Hartman if (changed & TIOCM_CAR) 225ab4382d2SGreg Kroah-Hartman uart_handle_dcd_change(&sport->port, status & TIOCM_CAR); 226ab4382d2SGreg Kroah-Hartman if (changed & TIOCM_CTS) 227ab4382d2SGreg Kroah-Hartman uart_handle_cts_change(&sport->port, status & TIOCM_CTS); 228ab4382d2SGreg Kroah-Hartman 229ab4382d2SGreg Kroah-Hartman wake_up_interruptible(&sport->port.state->port.delta_msr_wait); 230ab4382d2SGreg Kroah-Hartman } 231ab4382d2SGreg Kroah-Hartman 232ab4382d2SGreg Kroah-Hartman /* 233ab4382d2SGreg Kroah-Hartman * This is our per-port timeout handler, for checking the 234ab4382d2SGreg Kroah-Hartman * modem status signals. 235ab4382d2SGreg Kroah-Hartman */ 236ab4382d2SGreg Kroah-Hartman static void imx_timeout(unsigned long data) 237ab4382d2SGreg Kroah-Hartman { 238ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)data; 239ab4382d2SGreg Kroah-Hartman unsigned long flags; 240ab4382d2SGreg Kroah-Hartman 241ab4382d2SGreg Kroah-Hartman if (sport->port.state) { 242ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&sport->port.lock, flags); 243ab4382d2SGreg Kroah-Hartman imx_mctrl_check(sport); 244ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&sport->port.lock, flags); 245ab4382d2SGreg Kroah-Hartman 246ab4382d2SGreg Kroah-Hartman mod_timer(&sport->timer, jiffies + MCTRL_TIMEOUT); 247ab4382d2SGreg Kroah-Hartman } 248ab4382d2SGreg Kroah-Hartman } 249ab4382d2SGreg Kroah-Hartman 250ab4382d2SGreg Kroah-Hartman /* 251ab4382d2SGreg Kroah-Hartman * interrupts disabled on entry 252ab4382d2SGreg Kroah-Hartman */ 253ab4382d2SGreg Kroah-Hartman static void imx_stop_tx(struct uart_port *port) 254ab4382d2SGreg Kroah-Hartman { 255ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 256ab4382d2SGreg Kroah-Hartman unsigned long temp; 257ab4382d2SGreg Kroah-Hartman 258ab4382d2SGreg Kroah-Hartman if (USE_IRDA(sport)) { 259ab4382d2SGreg Kroah-Hartman /* half duplex - wait for end of transmission */ 260ab4382d2SGreg Kroah-Hartman int n = 256; 261ab4382d2SGreg Kroah-Hartman while ((--n > 0) && 262ab4382d2SGreg Kroah-Hartman !(readl(sport->port.membase + USR2) & USR2_TXDC)) { 263ab4382d2SGreg Kroah-Hartman udelay(5); 264ab4382d2SGreg Kroah-Hartman barrier(); 265ab4382d2SGreg Kroah-Hartman } 266ab4382d2SGreg Kroah-Hartman /* 267ab4382d2SGreg Kroah-Hartman * irda transceiver - wait a bit more to avoid 268ab4382d2SGreg Kroah-Hartman * cutoff, hardware dependent 269ab4382d2SGreg Kroah-Hartman */ 270ab4382d2SGreg Kroah-Hartman udelay(sport->trcv_delay); 271ab4382d2SGreg Kroah-Hartman 272ab4382d2SGreg Kroah-Hartman /* 273ab4382d2SGreg Kroah-Hartman * half duplex - reactivate receive mode, 274ab4382d2SGreg Kroah-Hartman * flush receive pipe echo crap 275ab4382d2SGreg Kroah-Hartman */ 276ab4382d2SGreg Kroah-Hartman if (readl(sport->port.membase + USR2) & USR2_TXDC) { 277ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR1); 278ab4382d2SGreg Kroah-Hartman temp &= ~(UCR1_TXMPTYEN | UCR1_TRDYEN); 279ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR1); 280ab4382d2SGreg Kroah-Hartman 281ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR4); 282ab4382d2SGreg Kroah-Hartman temp &= ~(UCR4_TCEN); 283ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR4); 284ab4382d2SGreg Kroah-Hartman 285ab4382d2SGreg Kroah-Hartman while (readl(sport->port.membase + URXD0) & 286ab4382d2SGreg Kroah-Hartman URXD_CHARRDY) 287ab4382d2SGreg Kroah-Hartman barrier(); 288ab4382d2SGreg Kroah-Hartman 289ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR1); 290ab4382d2SGreg Kroah-Hartman temp |= UCR1_RRDYEN; 291ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR1); 292ab4382d2SGreg Kroah-Hartman 293ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR4); 294ab4382d2SGreg Kroah-Hartman temp |= UCR4_DREN; 295ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR4); 296ab4382d2SGreg Kroah-Hartman } 297ab4382d2SGreg Kroah-Hartman return; 298ab4382d2SGreg Kroah-Hartman } 299ab4382d2SGreg Kroah-Hartman 300ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR1); 301ab4382d2SGreg Kroah-Hartman writel(temp & ~UCR1_TXMPTYEN, sport->port.membase + UCR1); 302ab4382d2SGreg Kroah-Hartman } 303ab4382d2SGreg Kroah-Hartman 304ab4382d2SGreg Kroah-Hartman /* 305ab4382d2SGreg Kroah-Hartman * interrupts disabled on entry 306ab4382d2SGreg Kroah-Hartman */ 307ab4382d2SGreg Kroah-Hartman static void imx_stop_rx(struct uart_port *port) 308ab4382d2SGreg Kroah-Hartman { 309ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 310ab4382d2SGreg Kroah-Hartman unsigned long temp; 311ab4382d2SGreg Kroah-Hartman 312ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR2); 313ab4382d2SGreg Kroah-Hartman writel(temp &~ UCR2_RXEN, sport->port.membase + UCR2); 314ab4382d2SGreg Kroah-Hartman } 315ab4382d2SGreg Kroah-Hartman 316ab4382d2SGreg Kroah-Hartman /* 317ab4382d2SGreg Kroah-Hartman * Set the modem control timer to fire immediately. 318ab4382d2SGreg Kroah-Hartman */ 319ab4382d2SGreg Kroah-Hartman static void imx_enable_ms(struct uart_port *port) 320ab4382d2SGreg Kroah-Hartman { 321ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 322ab4382d2SGreg Kroah-Hartman 323ab4382d2SGreg Kroah-Hartman mod_timer(&sport->timer, jiffies); 324ab4382d2SGreg Kroah-Hartman } 325ab4382d2SGreg Kroah-Hartman 326ab4382d2SGreg Kroah-Hartman static inline void imx_transmit_buffer(struct imx_port *sport) 327ab4382d2SGreg Kroah-Hartman { 328ab4382d2SGreg Kroah-Hartman struct circ_buf *xmit = &sport->port.state->xmit; 329ab4382d2SGreg Kroah-Hartman 330ab4382d2SGreg Kroah-Hartman while (!uart_circ_empty(xmit) && 331ab4382d2SGreg Kroah-Hartman !(readl(sport->port.membase + UTS) & UTS_TXFULL)) { 332ab4382d2SGreg Kroah-Hartman /* send xmit->buf[xmit->tail] 333ab4382d2SGreg Kroah-Hartman * out the port here */ 334ab4382d2SGreg Kroah-Hartman writel(xmit->buf[xmit->tail], sport->port.membase + URTX0); 335ab4382d2SGreg Kroah-Hartman xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 336ab4382d2SGreg Kroah-Hartman sport->port.icount.tx++; 337ab4382d2SGreg Kroah-Hartman } 338ab4382d2SGreg Kroah-Hartman 339ab4382d2SGreg Kroah-Hartman if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 340ab4382d2SGreg Kroah-Hartman uart_write_wakeup(&sport->port); 341ab4382d2SGreg Kroah-Hartman 342ab4382d2SGreg Kroah-Hartman if (uart_circ_empty(xmit)) 343ab4382d2SGreg Kroah-Hartman imx_stop_tx(&sport->port); 344ab4382d2SGreg Kroah-Hartman } 345ab4382d2SGreg Kroah-Hartman 346ab4382d2SGreg Kroah-Hartman /* 347ab4382d2SGreg Kroah-Hartman * interrupts disabled on entry 348ab4382d2SGreg Kroah-Hartman */ 349ab4382d2SGreg Kroah-Hartman static void imx_start_tx(struct uart_port *port) 350ab4382d2SGreg Kroah-Hartman { 351ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 352ab4382d2SGreg Kroah-Hartman unsigned long temp; 353ab4382d2SGreg Kroah-Hartman 354ab4382d2SGreg Kroah-Hartman if (USE_IRDA(sport)) { 355ab4382d2SGreg Kroah-Hartman /* half duplex in IrDA mode; have to disable receive mode */ 356ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR4); 357ab4382d2SGreg Kroah-Hartman temp &= ~(UCR4_DREN); 358ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR4); 359ab4382d2SGreg Kroah-Hartman 360ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR1); 361ab4382d2SGreg Kroah-Hartman temp &= ~(UCR1_RRDYEN); 362ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR1); 363ab4382d2SGreg Kroah-Hartman } 364ab4382d2SGreg Kroah-Hartman 365ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR1); 366ab4382d2SGreg Kroah-Hartman writel(temp | UCR1_TXMPTYEN, sport->port.membase + UCR1); 367ab4382d2SGreg Kroah-Hartman 368ab4382d2SGreg Kroah-Hartman if (USE_IRDA(sport)) { 369ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR1); 370ab4382d2SGreg Kroah-Hartman temp |= UCR1_TRDYEN; 371ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR1); 372ab4382d2SGreg Kroah-Hartman 373ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR4); 374ab4382d2SGreg Kroah-Hartman temp |= UCR4_TCEN; 375ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR4); 376ab4382d2SGreg Kroah-Hartman } 377ab4382d2SGreg Kroah-Hartman 378ab4382d2SGreg Kroah-Hartman if (readl(sport->port.membase + UTS) & UTS_TXEMPTY) 379ab4382d2SGreg Kroah-Hartman imx_transmit_buffer(sport); 380ab4382d2SGreg Kroah-Hartman } 381ab4382d2SGreg Kroah-Hartman 382ab4382d2SGreg Kroah-Hartman static irqreturn_t imx_rtsint(int irq, void *dev_id) 383ab4382d2SGreg Kroah-Hartman { 384ab4382d2SGreg Kroah-Hartman struct imx_port *sport = dev_id; 385ab4382d2SGreg Kroah-Hartman unsigned int val = readl(sport->port.membase + USR1) & USR1_RTSS; 386ab4382d2SGreg Kroah-Hartman unsigned long flags; 387ab4382d2SGreg Kroah-Hartman 388ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&sport->port.lock, flags); 389ab4382d2SGreg Kroah-Hartman 390ab4382d2SGreg Kroah-Hartman writel(USR1_RTSD, sport->port.membase + USR1); 391ab4382d2SGreg Kroah-Hartman uart_handle_cts_change(&sport->port, !!val); 392ab4382d2SGreg Kroah-Hartman wake_up_interruptible(&sport->port.state->port.delta_msr_wait); 393ab4382d2SGreg Kroah-Hartman 394ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&sport->port.lock, flags); 395ab4382d2SGreg Kroah-Hartman return IRQ_HANDLED; 396ab4382d2SGreg Kroah-Hartman } 397ab4382d2SGreg Kroah-Hartman 398ab4382d2SGreg Kroah-Hartman static irqreturn_t imx_txint(int irq, void *dev_id) 399ab4382d2SGreg Kroah-Hartman { 400ab4382d2SGreg Kroah-Hartman struct imx_port *sport = dev_id; 401ab4382d2SGreg Kroah-Hartman struct circ_buf *xmit = &sport->port.state->xmit; 402ab4382d2SGreg Kroah-Hartman unsigned long flags; 403ab4382d2SGreg Kroah-Hartman 404ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&sport->port.lock,flags); 405ab4382d2SGreg Kroah-Hartman if (sport->port.x_char) 406ab4382d2SGreg Kroah-Hartman { 407ab4382d2SGreg Kroah-Hartman /* Send next char */ 408ab4382d2SGreg Kroah-Hartman writel(sport->port.x_char, sport->port.membase + URTX0); 409ab4382d2SGreg Kroah-Hartman goto out; 410ab4382d2SGreg Kroah-Hartman } 411ab4382d2SGreg Kroah-Hartman 412ab4382d2SGreg Kroah-Hartman if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) { 413ab4382d2SGreg Kroah-Hartman imx_stop_tx(&sport->port); 414ab4382d2SGreg Kroah-Hartman goto out; 415ab4382d2SGreg Kroah-Hartman } 416ab4382d2SGreg Kroah-Hartman 417ab4382d2SGreg Kroah-Hartman imx_transmit_buffer(sport); 418ab4382d2SGreg Kroah-Hartman 419ab4382d2SGreg Kroah-Hartman if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 420ab4382d2SGreg Kroah-Hartman uart_write_wakeup(&sport->port); 421ab4382d2SGreg Kroah-Hartman 422ab4382d2SGreg Kroah-Hartman out: 423ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&sport->port.lock,flags); 424ab4382d2SGreg Kroah-Hartman return IRQ_HANDLED; 425ab4382d2SGreg Kroah-Hartman } 426ab4382d2SGreg Kroah-Hartman 427ab4382d2SGreg Kroah-Hartman static irqreturn_t imx_rxint(int irq, void *dev_id) 428ab4382d2SGreg Kroah-Hartman { 429ab4382d2SGreg Kroah-Hartman struct imx_port *sport = dev_id; 430ab4382d2SGreg Kroah-Hartman unsigned int rx,flg,ignored = 0; 431ab4382d2SGreg Kroah-Hartman struct tty_struct *tty = sport->port.state->port.tty; 432ab4382d2SGreg Kroah-Hartman unsigned long flags, temp; 433ab4382d2SGreg Kroah-Hartman 434ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&sport->port.lock,flags); 435ab4382d2SGreg Kroah-Hartman 436ab4382d2SGreg Kroah-Hartman while (readl(sport->port.membase + USR2) & USR2_RDR) { 437ab4382d2SGreg Kroah-Hartman flg = TTY_NORMAL; 438ab4382d2SGreg Kroah-Hartman sport->port.icount.rx++; 439ab4382d2SGreg Kroah-Hartman 440ab4382d2SGreg Kroah-Hartman rx = readl(sport->port.membase + URXD0); 441ab4382d2SGreg Kroah-Hartman 442ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + USR2); 443ab4382d2SGreg Kroah-Hartman if (temp & USR2_BRCD) { 444ab4382d2SGreg Kroah-Hartman writel(USR2_BRCD, sport->port.membase + USR2); 445ab4382d2SGreg Kroah-Hartman if (uart_handle_break(&sport->port)) 446ab4382d2SGreg Kroah-Hartman continue; 447ab4382d2SGreg Kroah-Hartman } 448ab4382d2SGreg Kroah-Hartman 449ab4382d2SGreg Kroah-Hartman if (uart_handle_sysrq_char(&sport->port, (unsigned char)rx)) 450ab4382d2SGreg Kroah-Hartman continue; 451ab4382d2SGreg Kroah-Hartman 452ab4382d2SGreg Kroah-Hartman if (rx & (URXD_PRERR | URXD_OVRRUN | URXD_FRMERR) ) { 453ab4382d2SGreg Kroah-Hartman if (rx & URXD_PRERR) 454ab4382d2SGreg Kroah-Hartman sport->port.icount.parity++; 455ab4382d2SGreg Kroah-Hartman else if (rx & URXD_FRMERR) 456ab4382d2SGreg Kroah-Hartman sport->port.icount.frame++; 457ab4382d2SGreg Kroah-Hartman if (rx & URXD_OVRRUN) 458ab4382d2SGreg Kroah-Hartman sport->port.icount.overrun++; 459ab4382d2SGreg Kroah-Hartman 460ab4382d2SGreg Kroah-Hartman if (rx & sport->port.ignore_status_mask) { 461ab4382d2SGreg Kroah-Hartman if (++ignored > 100) 462ab4382d2SGreg Kroah-Hartman goto out; 463ab4382d2SGreg Kroah-Hartman continue; 464ab4382d2SGreg Kroah-Hartman } 465ab4382d2SGreg Kroah-Hartman 466ab4382d2SGreg Kroah-Hartman rx &= sport->port.read_status_mask; 467ab4382d2SGreg Kroah-Hartman 468ab4382d2SGreg Kroah-Hartman if (rx & URXD_PRERR) 469ab4382d2SGreg Kroah-Hartman flg = TTY_PARITY; 470ab4382d2SGreg Kroah-Hartman else if (rx & URXD_FRMERR) 471ab4382d2SGreg Kroah-Hartman flg = TTY_FRAME; 472ab4382d2SGreg Kroah-Hartman if (rx & URXD_OVRRUN) 473ab4382d2SGreg Kroah-Hartman flg = TTY_OVERRUN; 474ab4382d2SGreg Kroah-Hartman 475ab4382d2SGreg Kroah-Hartman #ifdef SUPPORT_SYSRQ 476ab4382d2SGreg Kroah-Hartman sport->port.sysrq = 0; 477ab4382d2SGreg Kroah-Hartman #endif 478ab4382d2SGreg Kroah-Hartman } 479ab4382d2SGreg Kroah-Hartman 480ab4382d2SGreg Kroah-Hartman tty_insert_flip_char(tty, rx, flg); 481ab4382d2SGreg Kroah-Hartman } 482ab4382d2SGreg Kroah-Hartman 483ab4382d2SGreg Kroah-Hartman out: 484ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&sport->port.lock,flags); 485ab4382d2SGreg Kroah-Hartman tty_flip_buffer_push(tty); 486ab4382d2SGreg Kroah-Hartman return IRQ_HANDLED; 487ab4382d2SGreg Kroah-Hartman } 488ab4382d2SGreg Kroah-Hartman 489ab4382d2SGreg Kroah-Hartman static irqreturn_t imx_int(int irq, void *dev_id) 490ab4382d2SGreg Kroah-Hartman { 491ab4382d2SGreg Kroah-Hartman struct imx_port *sport = dev_id; 492ab4382d2SGreg Kroah-Hartman unsigned int sts; 493ab4382d2SGreg Kroah-Hartman 494ab4382d2SGreg Kroah-Hartman sts = readl(sport->port.membase + USR1); 495ab4382d2SGreg Kroah-Hartman 496ab4382d2SGreg Kroah-Hartman if (sts & USR1_RRDY) 497ab4382d2SGreg Kroah-Hartman imx_rxint(irq, dev_id); 498ab4382d2SGreg Kroah-Hartman 499ab4382d2SGreg Kroah-Hartman if (sts & USR1_TRDY && 500ab4382d2SGreg Kroah-Hartman readl(sport->port.membase + UCR1) & UCR1_TXMPTYEN) 501ab4382d2SGreg Kroah-Hartman imx_txint(irq, dev_id); 502ab4382d2SGreg Kroah-Hartman 503ab4382d2SGreg Kroah-Hartman if (sts & USR1_RTSD) 504ab4382d2SGreg Kroah-Hartman imx_rtsint(irq, dev_id); 505ab4382d2SGreg Kroah-Hartman 506ab4382d2SGreg Kroah-Hartman return IRQ_HANDLED; 507ab4382d2SGreg Kroah-Hartman } 508ab4382d2SGreg Kroah-Hartman 509ab4382d2SGreg Kroah-Hartman /* 510ab4382d2SGreg Kroah-Hartman * Return TIOCSER_TEMT when transmitter is not busy. 511ab4382d2SGreg Kroah-Hartman */ 512ab4382d2SGreg Kroah-Hartman static unsigned int imx_tx_empty(struct uart_port *port) 513ab4382d2SGreg Kroah-Hartman { 514ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 515ab4382d2SGreg Kroah-Hartman 516ab4382d2SGreg Kroah-Hartman return (readl(sport->port.membase + USR2) & USR2_TXDC) ? TIOCSER_TEMT : 0; 517ab4382d2SGreg Kroah-Hartman } 518ab4382d2SGreg Kroah-Hartman 519ab4382d2SGreg Kroah-Hartman /* 520ab4382d2SGreg Kroah-Hartman * We have a modem side uart, so the meanings of RTS and CTS are inverted. 521ab4382d2SGreg Kroah-Hartman */ 522ab4382d2SGreg Kroah-Hartman static unsigned int imx_get_mctrl(struct uart_port *port) 523ab4382d2SGreg Kroah-Hartman { 524ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 525ab4382d2SGreg Kroah-Hartman unsigned int tmp = TIOCM_DSR | TIOCM_CAR; 526ab4382d2SGreg Kroah-Hartman 527ab4382d2SGreg Kroah-Hartman if (readl(sport->port.membase + USR1) & USR1_RTSS) 528ab4382d2SGreg Kroah-Hartman tmp |= TIOCM_CTS; 529ab4382d2SGreg Kroah-Hartman 530ab4382d2SGreg Kroah-Hartman if (readl(sport->port.membase + UCR2) & UCR2_CTS) 531ab4382d2SGreg Kroah-Hartman tmp |= TIOCM_RTS; 532ab4382d2SGreg Kroah-Hartman 533ab4382d2SGreg Kroah-Hartman return tmp; 534ab4382d2SGreg Kroah-Hartman } 535ab4382d2SGreg Kroah-Hartman 536ab4382d2SGreg Kroah-Hartman static void imx_set_mctrl(struct uart_port *port, unsigned int mctrl) 537ab4382d2SGreg Kroah-Hartman { 538ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 539ab4382d2SGreg Kroah-Hartman unsigned long temp; 540ab4382d2SGreg Kroah-Hartman 541ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR2) & ~UCR2_CTS; 542ab4382d2SGreg Kroah-Hartman 543ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_RTS) 544ab4382d2SGreg Kroah-Hartman temp |= UCR2_CTS; 545ab4382d2SGreg Kroah-Hartman 546ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR2); 547ab4382d2SGreg Kroah-Hartman } 548ab4382d2SGreg Kroah-Hartman 549ab4382d2SGreg Kroah-Hartman /* 550ab4382d2SGreg Kroah-Hartman * Interrupts always disabled. 551ab4382d2SGreg Kroah-Hartman */ 552ab4382d2SGreg Kroah-Hartman static void imx_break_ctl(struct uart_port *port, int break_state) 553ab4382d2SGreg Kroah-Hartman { 554ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 555ab4382d2SGreg Kroah-Hartman unsigned long flags, temp; 556ab4382d2SGreg Kroah-Hartman 557ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&sport->port.lock, flags); 558ab4382d2SGreg Kroah-Hartman 559ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR1) & ~UCR1_SNDBRK; 560ab4382d2SGreg Kroah-Hartman 561ab4382d2SGreg Kroah-Hartman if ( break_state != 0 ) 562ab4382d2SGreg Kroah-Hartman temp |= UCR1_SNDBRK; 563ab4382d2SGreg Kroah-Hartman 564ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR1); 565ab4382d2SGreg Kroah-Hartman 566ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&sport->port.lock, flags); 567ab4382d2SGreg Kroah-Hartman } 568ab4382d2SGreg Kroah-Hartman 569ab4382d2SGreg Kroah-Hartman #define TXTL 2 /* reset default */ 570ab4382d2SGreg Kroah-Hartman #define RXTL 1 /* reset default */ 571ab4382d2SGreg Kroah-Hartman 572ab4382d2SGreg Kroah-Hartman static int imx_setup_ufcr(struct imx_port *sport, unsigned int mode) 573ab4382d2SGreg Kroah-Hartman { 574ab4382d2SGreg Kroah-Hartman unsigned int val; 575ab4382d2SGreg Kroah-Hartman unsigned int ufcr_rfdiv; 576ab4382d2SGreg Kroah-Hartman 577ab4382d2SGreg Kroah-Hartman /* set receiver / transmitter trigger level. 578ab4382d2SGreg Kroah-Hartman * RFDIV is set such way to satisfy requested uartclk value 579ab4382d2SGreg Kroah-Hartman */ 580ab4382d2SGreg Kroah-Hartman val = TXTL << 10 | RXTL; 581ab4382d2SGreg Kroah-Hartman ufcr_rfdiv = (clk_get_rate(sport->clk) + sport->port.uartclk / 2) 582ab4382d2SGreg Kroah-Hartman / sport->port.uartclk; 583ab4382d2SGreg Kroah-Hartman 584ab4382d2SGreg Kroah-Hartman if(!ufcr_rfdiv) 585ab4382d2SGreg Kroah-Hartman ufcr_rfdiv = 1; 586ab4382d2SGreg Kroah-Hartman 587ab4382d2SGreg Kroah-Hartman val |= UFCR_RFDIV_REG(ufcr_rfdiv); 588ab4382d2SGreg Kroah-Hartman 589ab4382d2SGreg Kroah-Hartman writel(val, sport->port.membase + UFCR); 590ab4382d2SGreg Kroah-Hartman 591ab4382d2SGreg Kroah-Hartman return 0; 592ab4382d2SGreg Kroah-Hartman } 593ab4382d2SGreg Kroah-Hartman 594ab4382d2SGreg Kroah-Hartman /* half the RX buffer size */ 595ab4382d2SGreg Kroah-Hartman #define CTSTL 16 596ab4382d2SGreg Kroah-Hartman 597ab4382d2SGreg Kroah-Hartman static int imx_startup(struct uart_port *port) 598ab4382d2SGreg Kroah-Hartman { 599ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 600ab4382d2SGreg Kroah-Hartman int retval; 601ab4382d2SGreg Kroah-Hartman unsigned long flags, temp; 602ab4382d2SGreg Kroah-Hartman 603ab4382d2SGreg Kroah-Hartman imx_setup_ufcr(sport, 0); 604ab4382d2SGreg Kroah-Hartman 605ab4382d2SGreg Kroah-Hartman /* disable the DREN bit (Data Ready interrupt enable) before 606ab4382d2SGreg Kroah-Hartman * requesting IRQs 607ab4382d2SGreg Kroah-Hartman */ 608ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR4); 609ab4382d2SGreg Kroah-Hartman 610ab4382d2SGreg Kroah-Hartman if (USE_IRDA(sport)) 611ab4382d2SGreg Kroah-Hartman temp |= UCR4_IRSC; 612ab4382d2SGreg Kroah-Hartman 613ab4382d2SGreg Kroah-Hartman /* set the trigger level for CTS */ 614ab4382d2SGreg Kroah-Hartman temp &= ~(UCR4_CTSTL_MASK<< UCR4_CTSTL_SHF); 615ab4382d2SGreg Kroah-Hartman temp |= CTSTL<< UCR4_CTSTL_SHF; 616ab4382d2SGreg Kroah-Hartman 617ab4382d2SGreg Kroah-Hartman writel(temp & ~UCR4_DREN, sport->port.membase + UCR4); 618ab4382d2SGreg Kroah-Hartman 619ab4382d2SGreg Kroah-Hartman if (USE_IRDA(sport)) { 620ab4382d2SGreg Kroah-Hartman /* reset fifo's and state machines */ 621ab4382d2SGreg Kroah-Hartman int i = 100; 622ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR2); 623ab4382d2SGreg Kroah-Hartman temp &= ~UCR2_SRST; 624ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR2); 625ab4382d2SGreg Kroah-Hartman while (!(readl(sport->port.membase + UCR2) & UCR2_SRST) && 626ab4382d2SGreg Kroah-Hartman (--i > 0)) { 627ab4382d2SGreg Kroah-Hartman udelay(1); 628ab4382d2SGreg Kroah-Hartman } 629ab4382d2SGreg Kroah-Hartman } 630ab4382d2SGreg Kroah-Hartman 631ab4382d2SGreg Kroah-Hartman /* 632ab4382d2SGreg Kroah-Hartman * Allocate the IRQ(s) i.MX1 has three interrupts whereas later 633ab4382d2SGreg Kroah-Hartman * chips only have one interrupt. 634ab4382d2SGreg Kroah-Hartman */ 635ab4382d2SGreg Kroah-Hartman if (sport->txirq > 0) { 636ab4382d2SGreg Kroah-Hartman retval = request_irq(sport->rxirq, imx_rxint, 0, 637ab4382d2SGreg Kroah-Hartman DRIVER_NAME, sport); 638ab4382d2SGreg Kroah-Hartman if (retval) 639ab4382d2SGreg Kroah-Hartman goto error_out1; 640ab4382d2SGreg Kroah-Hartman 641ab4382d2SGreg Kroah-Hartman retval = request_irq(sport->txirq, imx_txint, 0, 642ab4382d2SGreg Kroah-Hartman DRIVER_NAME, sport); 643ab4382d2SGreg Kroah-Hartman if (retval) 644ab4382d2SGreg Kroah-Hartman goto error_out2; 645ab4382d2SGreg Kroah-Hartman 646ab4382d2SGreg Kroah-Hartman /* do not use RTS IRQ on IrDA */ 647ab4382d2SGreg Kroah-Hartman if (!USE_IRDA(sport)) { 648ab4382d2SGreg Kroah-Hartman retval = request_irq(sport->rtsirq, imx_rtsint, 649ab4382d2SGreg Kroah-Hartman (sport->rtsirq < MAX_INTERNAL_IRQ) ? 0 : 650ab4382d2SGreg Kroah-Hartman IRQF_TRIGGER_FALLING | 651ab4382d2SGreg Kroah-Hartman IRQF_TRIGGER_RISING, 652ab4382d2SGreg Kroah-Hartman DRIVER_NAME, sport); 653ab4382d2SGreg Kroah-Hartman if (retval) 654ab4382d2SGreg Kroah-Hartman goto error_out3; 655ab4382d2SGreg Kroah-Hartman } 656ab4382d2SGreg Kroah-Hartman } else { 657ab4382d2SGreg Kroah-Hartman retval = request_irq(sport->port.irq, imx_int, 0, 658ab4382d2SGreg Kroah-Hartman DRIVER_NAME, sport); 659ab4382d2SGreg Kroah-Hartman if (retval) { 660ab4382d2SGreg Kroah-Hartman free_irq(sport->port.irq, sport); 661ab4382d2SGreg Kroah-Hartman goto error_out1; 662ab4382d2SGreg Kroah-Hartman } 663ab4382d2SGreg Kroah-Hartman } 664ab4382d2SGreg Kroah-Hartman 665ab4382d2SGreg Kroah-Hartman /* 666ab4382d2SGreg Kroah-Hartman * Finally, clear and enable interrupts 667ab4382d2SGreg Kroah-Hartman */ 668ab4382d2SGreg Kroah-Hartman writel(USR1_RTSD, sport->port.membase + USR1); 669ab4382d2SGreg Kroah-Hartman 670ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR1); 671ab4382d2SGreg Kroah-Hartman temp |= UCR1_RRDYEN | UCR1_RTSDEN | UCR1_UARTEN; 672ab4382d2SGreg Kroah-Hartman 673ab4382d2SGreg Kroah-Hartman if (USE_IRDA(sport)) { 674ab4382d2SGreg Kroah-Hartman temp |= UCR1_IREN; 675ab4382d2SGreg Kroah-Hartman temp &= ~(UCR1_RTSDEN); 676ab4382d2SGreg Kroah-Hartman } 677ab4382d2SGreg Kroah-Hartman 678ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR1); 679ab4382d2SGreg Kroah-Hartman 680ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR2); 681ab4382d2SGreg Kroah-Hartman temp |= (UCR2_RXEN | UCR2_TXEN); 682ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR2); 683ab4382d2SGreg Kroah-Hartman 684ab4382d2SGreg Kroah-Hartman if (USE_IRDA(sport)) { 685ab4382d2SGreg Kroah-Hartman /* clear RX-FIFO */ 686ab4382d2SGreg Kroah-Hartman int i = 64; 687ab4382d2SGreg Kroah-Hartman while ((--i > 0) && 688ab4382d2SGreg Kroah-Hartman (readl(sport->port.membase + URXD0) & URXD_CHARRDY)) { 689ab4382d2SGreg Kroah-Hartman barrier(); 690ab4382d2SGreg Kroah-Hartman } 691ab4382d2SGreg Kroah-Hartman } 692ab4382d2SGreg Kroah-Hartman 693ab4382d2SGreg Kroah-Hartman if (!cpu_is_mx1()) { 694ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR3); 695ab4382d2SGreg Kroah-Hartman temp |= MX2_UCR3_RXDMUXSEL; 696ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR3); 697ab4382d2SGreg Kroah-Hartman } 698ab4382d2SGreg Kroah-Hartman 699ab4382d2SGreg Kroah-Hartman if (USE_IRDA(sport)) { 700ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR4); 701ab4382d2SGreg Kroah-Hartman if (sport->irda_inv_rx) 702ab4382d2SGreg Kroah-Hartman temp |= UCR4_INVR; 703ab4382d2SGreg Kroah-Hartman else 704ab4382d2SGreg Kroah-Hartman temp &= ~(UCR4_INVR); 705ab4382d2SGreg Kroah-Hartman writel(temp | UCR4_DREN, sport->port.membase + UCR4); 706ab4382d2SGreg Kroah-Hartman 707ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR3); 708ab4382d2SGreg Kroah-Hartman if (sport->irda_inv_tx) 709ab4382d2SGreg Kroah-Hartman temp |= UCR3_INVT; 710ab4382d2SGreg Kroah-Hartman else 711ab4382d2SGreg Kroah-Hartman temp &= ~(UCR3_INVT); 712ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR3); 713ab4382d2SGreg Kroah-Hartman } 714ab4382d2SGreg Kroah-Hartman 715ab4382d2SGreg Kroah-Hartman /* 716ab4382d2SGreg Kroah-Hartman * Enable modem status interrupts 717ab4382d2SGreg Kroah-Hartman */ 718ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&sport->port.lock,flags); 719ab4382d2SGreg Kroah-Hartman imx_enable_ms(&sport->port); 720ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&sport->port.lock,flags); 721ab4382d2SGreg Kroah-Hartman 722ab4382d2SGreg Kroah-Hartman if (USE_IRDA(sport)) { 723ab4382d2SGreg Kroah-Hartman struct imxuart_platform_data *pdata; 724ab4382d2SGreg Kroah-Hartman pdata = sport->port.dev->platform_data; 725ab4382d2SGreg Kroah-Hartman sport->irda_inv_rx = pdata->irda_inv_rx; 726ab4382d2SGreg Kroah-Hartman sport->irda_inv_tx = pdata->irda_inv_tx; 727ab4382d2SGreg Kroah-Hartman sport->trcv_delay = pdata->transceiver_delay; 728ab4382d2SGreg Kroah-Hartman if (pdata->irda_enable) 729ab4382d2SGreg Kroah-Hartman pdata->irda_enable(1); 730ab4382d2SGreg Kroah-Hartman } 731ab4382d2SGreg Kroah-Hartman 732ab4382d2SGreg Kroah-Hartman return 0; 733ab4382d2SGreg Kroah-Hartman 734ab4382d2SGreg Kroah-Hartman error_out3: 735ab4382d2SGreg Kroah-Hartman if (sport->txirq) 736ab4382d2SGreg Kroah-Hartman free_irq(sport->txirq, sport); 737ab4382d2SGreg Kroah-Hartman error_out2: 738ab4382d2SGreg Kroah-Hartman if (sport->rxirq) 739ab4382d2SGreg Kroah-Hartman free_irq(sport->rxirq, sport); 740ab4382d2SGreg Kroah-Hartman error_out1: 741ab4382d2SGreg Kroah-Hartman return retval; 742ab4382d2SGreg Kroah-Hartman } 743ab4382d2SGreg Kroah-Hartman 744ab4382d2SGreg Kroah-Hartman static void imx_shutdown(struct uart_port *port) 745ab4382d2SGreg Kroah-Hartman { 746ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 747ab4382d2SGreg Kroah-Hartman unsigned long temp; 748ab4382d2SGreg Kroah-Hartman 749ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR2); 750ab4382d2SGreg Kroah-Hartman temp &= ~(UCR2_TXEN); 751ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR2); 752ab4382d2SGreg Kroah-Hartman 753ab4382d2SGreg Kroah-Hartman if (USE_IRDA(sport)) { 754ab4382d2SGreg Kroah-Hartman struct imxuart_platform_data *pdata; 755ab4382d2SGreg Kroah-Hartman pdata = sport->port.dev->platform_data; 756ab4382d2SGreg Kroah-Hartman if (pdata->irda_enable) 757ab4382d2SGreg Kroah-Hartman pdata->irda_enable(0); 758ab4382d2SGreg Kroah-Hartman } 759ab4382d2SGreg Kroah-Hartman 760ab4382d2SGreg Kroah-Hartman /* 761ab4382d2SGreg Kroah-Hartman * Stop our timer. 762ab4382d2SGreg Kroah-Hartman */ 763ab4382d2SGreg Kroah-Hartman del_timer_sync(&sport->timer); 764ab4382d2SGreg Kroah-Hartman 765ab4382d2SGreg Kroah-Hartman /* 766ab4382d2SGreg Kroah-Hartman * Free the interrupts 767ab4382d2SGreg Kroah-Hartman */ 768ab4382d2SGreg Kroah-Hartman if (sport->txirq > 0) { 769ab4382d2SGreg Kroah-Hartman if (!USE_IRDA(sport)) 770ab4382d2SGreg Kroah-Hartman free_irq(sport->rtsirq, sport); 771ab4382d2SGreg Kroah-Hartman free_irq(sport->txirq, sport); 772ab4382d2SGreg Kroah-Hartman free_irq(sport->rxirq, sport); 773ab4382d2SGreg Kroah-Hartman } else 774ab4382d2SGreg Kroah-Hartman free_irq(sport->port.irq, sport); 775ab4382d2SGreg Kroah-Hartman 776ab4382d2SGreg Kroah-Hartman /* 777ab4382d2SGreg Kroah-Hartman * Disable all interrupts, port and break condition. 778ab4382d2SGreg Kroah-Hartman */ 779ab4382d2SGreg Kroah-Hartman 780ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR1); 781ab4382d2SGreg Kroah-Hartman temp &= ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN | UCR1_UARTEN); 782ab4382d2SGreg Kroah-Hartman if (USE_IRDA(sport)) 783ab4382d2SGreg Kroah-Hartman temp &= ~(UCR1_IREN); 784ab4382d2SGreg Kroah-Hartman 785ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR1); 786ab4382d2SGreg Kroah-Hartman } 787ab4382d2SGreg Kroah-Hartman 788ab4382d2SGreg Kroah-Hartman static void 789ab4382d2SGreg Kroah-Hartman imx_set_termios(struct uart_port *port, struct ktermios *termios, 790ab4382d2SGreg Kroah-Hartman struct ktermios *old) 791ab4382d2SGreg Kroah-Hartman { 792ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 793ab4382d2SGreg Kroah-Hartman unsigned long flags; 794ab4382d2SGreg Kroah-Hartman unsigned int ucr2, old_ucr1, old_txrxen, baud, quot; 795ab4382d2SGreg Kroah-Hartman unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8; 796ab4382d2SGreg Kroah-Hartman unsigned int div, ufcr; 797ab4382d2SGreg Kroah-Hartman unsigned long num, denom; 798ab4382d2SGreg Kroah-Hartman uint64_t tdiv64; 799ab4382d2SGreg Kroah-Hartman 800ab4382d2SGreg Kroah-Hartman /* 801ab4382d2SGreg Kroah-Hartman * If we don't support modem control lines, don't allow 802ab4382d2SGreg Kroah-Hartman * these to be set. 803ab4382d2SGreg Kroah-Hartman */ 804ab4382d2SGreg Kroah-Hartman if (0) { 805ab4382d2SGreg Kroah-Hartman termios->c_cflag &= ~(HUPCL | CRTSCTS | CMSPAR); 806ab4382d2SGreg Kroah-Hartman termios->c_cflag |= CLOCAL; 807ab4382d2SGreg Kroah-Hartman } 808ab4382d2SGreg Kroah-Hartman 809ab4382d2SGreg Kroah-Hartman /* 810ab4382d2SGreg Kroah-Hartman * We only support CS7 and CS8. 811ab4382d2SGreg Kroah-Hartman */ 812ab4382d2SGreg Kroah-Hartman while ((termios->c_cflag & CSIZE) != CS7 && 813ab4382d2SGreg Kroah-Hartman (termios->c_cflag & CSIZE) != CS8) { 814ab4382d2SGreg Kroah-Hartman termios->c_cflag &= ~CSIZE; 815ab4382d2SGreg Kroah-Hartman termios->c_cflag |= old_csize; 816ab4382d2SGreg Kroah-Hartman old_csize = CS8; 817ab4382d2SGreg Kroah-Hartman } 818ab4382d2SGreg Kroah-Hartman 819ab4382d2SGreg Kroah-Hartman if ((termios->c_cflag & CSIZE) == CS8) 820ab4382d2SGreg Kroah-Hartman ucr2 = UCR2_WS | UCR2_SRST | UCR2_IRTS; 821ab4382d2SGreg Kroah-Hartman else 822ab4382d2SGreg Kroah-Hartman ucr2 = UCR2_SRST | UCR2_IRTS; 823ab4382d2SGreg Kroah-Hartman 824ab4382d2SGreg Kroah-Hartman if (termios->c_cflag & CRTSCTS) { 825ab4382d2SGreg Kroah-Hartman if( sport->have_rtscts ) { 826ab4382d2SGreg Kroah-Hartman ucr2 &= ~UCR2_IRTS; 827ab4382d2SGreg Kroah-Hartman ucr2 |= UCR2_CTSC; 828ab4382d2SGreg Kroah-Hartman } else { 829ab4382d2SGreg Kroah-Hartman termios->c_cflag &= ~CRTSCTS; 830ab4382d2SGreg Kroah-Hartman } 831ab4382d2SGreg Kroah-Hartman } 832ab4382d2SGreg Kroah-Hartman 833ab4382d2SGreg Kroah-Hartman if (termios->c_cflag & CSTOPB) 834ab4382d2SGreg Kroah-Hartman ucr2 |= UCR2_STPB; 835ab4382d2SGreg Kroah-Hartman if (termios->c_cflag & PARENB) { 836ab4382d2SGreg Kroah-Hartman ucr2 |= UCR2_PREN; 837ab4382d2SGreg Kroah-Hartman if (termios->c_cflag & PARODD) 838ab4382d2SGreg Kroah-Hartman ucr2 |= UCR2_PROE; 839ab4382d2SGreg Kroah-Hartman } 840ab4382d2SGreg Kroah-Hartman 841ab4382d2SGreg Kroah-Hartman /* 842ab4382d2SGreg Kroah-Hartman * Ask the core to calculate the divisor for us. 843ab4382d2SGreg Kroah-Hartman */ 844ab4382d2SGreg Kroah-Hartman baud = uart_get_baud_rate(port, termios, old, 50, port->uartclk / 16); 845ab4382d2SGreg Kroah-Hartman quot = uart_get_divisor(port, baud); 846ab4382d2SGreg Kroah-Hartman 847ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&sport->port.lock, flags); 848ab4382d2SGreg Kroah-Hartman 849ab4382d2SGreg Kroah-Hartman sport->port.read_status_mask = 0; 850ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & INPCK) 851ab4382d2SGreg Kroah-Hartman sport->port.read_status_mask |= (URXD_FRMERR | URXD_PRERR); 852ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & (BRKINT | PARMRK)) 853ab4382d2SGreg Kroah-Hartman sport->port.read_status_mask |= URXD_BRK; 854ab4382d2SGreg Kroah-Hartman 855ab4382d2SGreg Kroah-Hartman /* 856ab4382d2SGreg Kroah-Hartman * Characters to ignore 857ab4382d2SGreg Kroah-Hartman */ 858ab4382d2SGreg Kroah-Hartman sport->port.ignore_status_mask = 0; 859ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IGNPAR) 860ab4382d2SGreg Kroah-Hartman sport->port.ignore_status_mask |= URXD_PRERR; 861ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IGNBRK) { 862ab4382d2SGreg Kroah-Hartman sport->port.ignore_status_mask |= URXD_BRK; 863ab4382d2SGreg Kroah-Hartman /* 864ab4382d2SGreg Kroah-Hartman * If we're ignoring parity and break indicators, 865ab4382d2SGreg Kroah-Hartman * ignore overruns too (for real raw support). 866ab4382d2SGreg Kroah-Hartman */ 867ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IGNPAR) 868ab4382d2SGreg Kroah-Hartman sport->port.ignore_status_mask |= URXD_OVRRUN; 869ab4382d2SGreg Kroah-Hartman } 870ab4382d2SGreg Kroah-Hartman 871ab4382d2SGreg Kroah-Hartman del_timer_sync(&sport->timer); 872ab4382d2SGreg Kroah-Hartman 873ab4382d2SGreg Kroah-Hartman /* 874ab4382d2SGreg Kroah-Hartman * Update the per-port timeout. 875ab4382d2SGreg Kroah-Hartman */ 876ab4382d2SGreg Kroah-Hartman uart_update_timeout(port, termios->c_cflag, baud); 877ab4382d2SGreg Kroah-Hartman 878ab4382d2SGreg Kroah-Hartman /* 879ab4382d2SGreg Kroah-Hartman * disable interrupts and drain transmitter 880ab4382d2SGreg Kroah-Hartman */ 881ab4382d2SGreg Kroah-Hartman old_ucr1 = readl(sport->port.membase + UCR1); 882ab4382d2SGreg Kroah-Hartman writel(old_ucr1 & ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN), 883ab4382d2SGreg Kroah-Hartman sport->port.membase + UCR1); 884ab4382d2SGreg Kroah-Hartman 885ab4382d2SGreg Kroah-Hartman while ( !(readl(sport->port.membase + USR2) & USR2_TXDC)) 886ab4382d2SGreg Kroah-Hartman barrier(); 887ab4382d2SGreg Kroah-Hartman 888ab4382d2SGreg Kroah-Hartman /* then, disable everything */ 889ab4382d2SGreg Kroah-Hartman old_txrxen = readl(sport->port.membase + UCR2); 890ab4382d2SGreg Kroah-Hartman writel(old_txrxen & ~( UCR2_TXEN | UCR2_RXEN), 891ab4382d2SGreg Kroah-Hartman sport->port.membase + UCR2); 892ab4382d2SGreg Kroah-Hartman old_txrxen &= (UCR2_TXEN | UCR2_RXEN); 893ab4382d2SGreg Kroah-Hartman 894ab4382d2SGreg Kroah-Hartman if (USE_IRDA(sport)) { 895ab4382d2SGreg Kroah-Hartman /* 896ab4382d2SGreg Kroah-Hartman * use maximum available submodule frequency to 897ab4382d2SGreg Kroah-Hartman * avoid missing short pulses due to low sampling rate 898ab4382d2SGreg Kroah-Hartman */ 899ab4382d2SGreg Kroah-Hartman div = 1; 900ab4382d2SGreg Kroah-Hartman } else { 901ab4382d2SGreg Kroah-Hartman div = sport->port.uartclk / (baud * 16); 902ab4382d2SGreg Kroah-Hartman if (div > 7) 903ab4382d2SGreg Kroah-Hartman div = 7; 904ab4382d2SGreg Kroah-Hartman if (!div) 905ab4382d2SGreg Kroah-Hartman div = 1; 906ab4382d2SGreg Kroah-Hartman } 907ab4382d2SGreg Kroah-Hartman 908ab4382d2SGreg Kroah-Hartman rational_best_approximation(16 * div * baud, sport->port.uartclk, 909ab4382d2SGreg Kroah-Hartman 1 << 16, 1 << 16, &num, &denom); 910ab4382d2SGreg Kroah-Hartman 911ab4382d2SGreg Kroah-Hartman tdiv64 = sport->port.uartclk; 912ab4382d2SGreg Kroah-Hartman tdiv64 *= num; 913ab4382d2SGreg Kroah-Hartman do_div(tdiv64, denom * 16 * div); 914ab4382d2SGreg Kroah-Hartman tty_termios_encode_baud_rate(termios, 915ab4382d2SGreg Kroah-Hartman (speed_t)tdiv64, (speed_t)tdiv64); 916ab4382d2SGreg Kroah-Hartman 917ab4382d2SGreg Kroah-Hartman num -= 1; 918ab4382d2SGreg Kroah-Hartman denom -= 1; 919ab4382d2SGreg Kroah-Hartman 920ab4382d2SGreg Kroah-Hartman ufcr = readl(sport->port.membase + UFCR); 921ab4382d2SGreg Kroah-Hartman ufcr = (ufcr & (~UFCR_RFDIV)) | UFCR_RFDIV_REG(div); 922ab4382d2SGreg Kroah-Hartman writel(ufcr, sport->port.membase + UFCR); 923ab4382d2SGreg Kroah-Hartman 924ab4382d2SGreg Kroah-Hartman writel(num, sport->port.membase + UBIR); 925ab4382d2SGreg Kroah-Hartman writel(denom, sport->port.membase + UBMR); 926ab4382d2SGreg Kroah-Hartman 927ab4382d2SGreg Kroah-Hartman if (!cpu_is_mx1()) 928ab4382d2SGreg Kroah-Hartman writel(sport->port.uartclk / div / 1000, 929ab4382d2SGreg Kroah-Hartman sport->port.membase + MX2_ONEMS); 930ab4382d2SGreg Kroah-Hartman 931ab4382d2SGreg Kroah-Hartman writel(old_ucr1, sport->port.membase + UCR1); 932ab4382d2SGreg Kroah-Hartman 933ab4382d2SGreg Kroah-Hartman /* set the parity, stop bits and data size */ 934ab4382d2SGreg Kroah-Hartman writel(ucr2 | old_txrxen, sport->port.membase + UCR2); 935ab4382d2SGreg Kroah-Hartman 936ab4382d2SGreg Kroah-Hartman if (UART_ENABLE_MS(&sport->port, termios->c_cflag)) 937ab4382d2SGreg Kroah-Hartman imx_enable_ms(&sport->port); 938ab4382d2SGreg Kroah-Hartman 939ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&sport->port.lock, flags); 940ab4382d2SGreg Kroah-Hartman } 941ab4382d2SGreg Kroah-Hartman 942ab4382d2SGreg Kroah-Hartman static const char *imx_type(struct uart_port *port) 943ab4382d2SGreg Kroah-Hartman { 944ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 945ab4382d2SGreg Kroah-Hartman 946ab4382d2SGreg Kroah-Hartman return sport->port.type == PORT_IMX ? "IMX" : NULL; 947ab4382d2SGreg Kroah-Hartman } 948ab4382d2SGreg Kroah-Hartman 949ab4382d2SGreg Kroah-Hartman /* 950ab4382d2SGreg Kroah-Hartman * Release the memory region(s) being used by 'port'. 951ab4382d2SGreg Kroah-Hartman */ 952ab4382d2SGreg Kroah-Hartman static void imx_release_port(struct uart_port *port) 953ab4382d2SGreg Kroah-Hartman { 954ab4382d2SGreg Kroah-Hartman struct platform_device *pdev = to_platform_device(port->dev); 955ab4382d2SGreg Kroah-Hartman struct resource *mmres; 956ab4382d2SGreg Kroah-Hartman 957ab4382d2SGreg Kroah-Hartman mmres = platform_get_resource(pdev, IORESOURCE_MEM, 0); 958ab4382d2SGreg Kroah-Hartman release_mem_region(mmres->start, mmres->end - mmres->start + 1); 959ab4382d2SGreg Kroah-Hartman } 960ab4382d2SGreg Kroah-Hartman 961ab4382d2SGreg Kroah-Hartman /* 962ab4382d2SGreg Kroah-Hartman * Request the memory region(s) being used by 'port'. 963ab4382d2SGreg Kroah-Hartman */ 964ab4382d2SGreg Kroah-Hartman static int imx_request_port(struct uart_port *port) 965ab4382d2SGreg Kroah-Hartman { 966ab4382d2SGreg Kroah-Hartman struct platform_device *pdev = to_platform_device(port->dev); 967ab4382d2SGreg Kroah-Hartman struct resource *mmres; 968ab4382d2SGreg Kroah-Hartman void *ret; 969ab4382d2SGreg Kroah-Hartman 970ab4382d2SGreg Kroah-Hartman mmres = platform_get_resource(pdev, IORESOURCE_MEM, 0); 971ab4382d2SGreg Kroah-Hartman if (!mmres) 972ab4382d2SGreg Kroah-Hartman return -ENODEV; 973ab4382d2SGreg Kroah-Hartman 974ab4382d2SGreg Kroah-Hartman ret = request_mem_region(mmres->start, mmres->end - mmres->start + 1, 975ab4382d2SGreg Kroah-Hartman "imx-uart"); 976ab4382d2SGreg Kroah-Hartman 977ab4382d2SGreg Kroah-Hartman return ret ? 0 : -EBUSY; 978ab4382d2SGreg Kroah-Hartman } 979ab4382d2SGreg Kroah-Hartman 980ab4382d2SGreg Kroah-Hartman /* 981ab4382d2SGreg Kroah-Hartman * Configure/autoconfigure the port. 982ab4382d2SGreg Kroah-Hartman */ 983ab4382d2SGreg Kroah-Hartman static void imx_config_port(struct uart_port *port, int flags) 984ab4382d2SGreg Kroah-Hartman { 985ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 986ab4382d2SGreg Kroah-Hartman 987ab4382d2SGreg Kroah-Hartman if (flags & UART_CONFIG_TYPE && 988ab4382d2SGreg Kroah-Hartman imx_request_port(&sport->port) == 0) 989ab4382d2SGreg Kroah-Hartman sport->port.type = PORT_IMX; 990ab4382d2SGreg Kroah-Hartman } 991ab4382d2SGreg Kroah-Hartman 992ab4382d2SGreg Kroah-Hartman /* 993ab4382d2SGreg Kroah-Hartman * Verify the new serial_struct (for TIOCSSERIAL). 994ab4382d2SGreg Kroah-Hartman * The only change we allow are to the flags and type, and 995ab4382d2SGreg Kroah-Hartman * even then only between PORT_IMX and PORT_UNKNOWN 996ab4382d2SGreg Kroah-Hartman */ 997ab4382d2SGreg Kroah-Hartman static int 998ab4382d2SGreg Kroah-Hartman imx_verify_port(struct uart_port *port, struct serial_struct *ser) 999ab4382d2SGreg Kroah-Hartman { 1000ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 1001ab4382d2SGreg Kroah-Hartman int ret = 0; 1002ab4382d2SGreg Kroah-Hartman 1003ab4382d2SGreg Kroah-Hartman if (ser->type != PORT_UNKNOWN && ser->type != PORT_IMX) 1004ab4382d2SGreg Kroah-Hartman ret = -EINVAL; 1005ab4382d2SGreg Kroah-Hartman if (sport->port.irq != ser->irq) 1006ab4382d2SGreg Kroah-Hartman ret = -EINVAL; 1007ab4382d2SGreg Kroah-Hartman if (ser->io_type != UPIO_MEM) 1008ab4382d2SGreg Kroah-Hartman ret = -EINVAL; 1009ab4382d2SGreg Kroah-Hartman if (sport->port.uartclk / 16 != ser->baud_base) 1010ab4382d2SGreg Kroah-Hartman ret = -EINVAL; 1011ab4382d2SGreg Kroah-Hartman if ((void *)sport->port.mapbase != ser->iomem_base) 1012ab4382d2SGreg Kroah-Hartman ret = -EINVAL; 1013ab4382d2SGreg Kroah-Hartman if (sport->port.iobase != ser->port) 1014ab4382d2SGreg Kroah-Hartman ret = -EINVAL; 1015ab4382d2SGreg Kroah-Hartman if (ser->hub6 != 0) 1016ab4382d2SGreg Kroah-Hartman ret = -EINVAL; 1017ab4382d2SGreg Kroah-Hartman return ret; 1018ab4382d2SGreg Kroah-Hartman } 1019ab4382d2SGreg Kroah-Hartman 1020ab4382d2SGreg Kroah-Hartman static struct uart_ops imx_pops = { 1021ab4382d2SGreg Kroah-Hartman .tx_empty = imx_tx_empty, 1022ab4382d2SGreg Kroah-Hartman .set_mctrl = imx_set_mctrl, 1023ab4382d2SGreg Kroah-Hartman .get_mctrl = imx_get_mctrl, 1024ab4382d2SGreg Kroah-Hartman .stop_tx = imx_stop_tx, 1025ab4382d2SGreg Kroah-Hartman .start_tx = imx_start_tx, 1026ab4382d2SGreg Kroah-Hartman .stop_rx = imx_stop_rx, 1027ab4382d2SGreg Kroah-Hartman .enable_ms = imx_enable_ms, 1028ab4382d2SGreg Kroah-Hartman .break_ctl = imx_break_ctl, 1029ab4382d2SGreg Kroah-Hartman .startup = imx_startup, 1030ab4382d2SGreg Kroah-Hartman .shutdown = imx_shutdown, 1031ab4382d2SGreg Kroah-Hartman .set_termios = imx_set_termios, 1032ab4382d2SGreg Kroah-Hartman .type = imx_type, 1033ab4382d2SGreg Kroah-Hartman .release_port = imx_release_port, 1034ab4382d2SGreg Kroah-Hartman .request_port = imx_request_port, 1035ab4382d2SGreg Kroah-Hartman .config_port = imx_config_port, 1036ab4382d2SGreg Kroah-Hartman .verify_port = imx_verify_port, 1037ab4382d2SGreg Kroah-Hartman }; 1038ab4382d2SGreg Kroah-Hartman 1039ab4382d2SGreg Kroah-Hartman static struct imx_port *imx_ports[UART_NR]; 1040ab4382d2SGreg Kroah-Hartman 1041ab4382d2SGreg Kroah-Hartman #ifdef CONFIG_SERIAL_IMX_CONSOLE 1042ab4382d2SGreg Kroah-Hartman static void imx_console_putchar(struct uart_port *port, int ch) 1043ab4382d2SGreg Kroah-Hartman { 1044ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 1045ab4382d2SGreg Kroah-Hartman 1046ab4382d2SGreg Kroah-Hartman while (readl(sport->port.membase + UTS) & UTS_TXFULL) 1047ab4382d2SGreg Kroah-Hartman barrier(); 1048ab4382d2SGreg Kroah-Hartman 1049ab4382d2SGreg Kroah-Hartman writel(ch, sport->port.membase + URTX0); 1050ab4382d2SGreg Kroah-Hartman } 1051ab4382d2SGreg Kroah-Hartman 1052ab4382d2SGreg Kroah-Hartman /* 1053ab4382d2SGreg Kroah-Hartman * Interrupts are disabled on entering 1054ab4382d2SGreg Kroah-Hartman */ 1055ab4382d2SGreg Kroah-Hartman static void 1056ab4382d2SGreg Kroah-Hartman imx_console_write(struct console *co, const char *s, unsigned int count) 1057ab4382d2SGreg Kroah-Hartman { 1058ab4382d2SGreg Kroah-Hartman struct imx_port *sport = imx_ports[co->index]; 1059ab4382d2SGreg Kroah-Hartman unsigned int old_ucr1, old_ucr2, ucr1; 1060ab4382d2SGreg Kroah-Hartman 1061ab4382d2SGreg Kroah-Hartman /* 1062ab4382d2SGreg Kroah-Hartman * First, save UCR1/2 and then disable interrupts 1063ab4382d2SGreg Kroah-Hartman */ 1064ab4382d2SGreg Kroah-Hartman ucr1 = old_ucr1 = readl(sport->port.membase + UCR1); 1065ab4382d2SGreg Kroah-Hartman old_ucr2 = readl(sport->port.membase + UCR2); 1066ab4382d2SGreg Kroah-Hartman 1067ab4382d2SGreg Kroah-Hartman if (cpu_is_mx1()) 1068ab4382d2SGreg Kroah-Hartman ucr1 |= MX1_UCR1_UARTCLKEN; 1069ab4382d2SGreg Kroah-Hartman ucr1 |= UCR1_UARTEN; 1070ab4382d2SGreg Kroah-Hartman ucr1 &= ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN); 1071ab4382d2SGreg Kroah-Hartman 1072ab4382d2SGreg Kroah-Hartman writel(ucr1, sport->port.membase + UCR1); 1073ab4382d2SGreg Kroah-Hartman 1074ab4382d2SGreg Kroah-Hartman writel(old_ucr2 | UCR2_TXEN, sport->port.membase + UCR2); 1075ab4382d2SGreg Kroah-Hartman 1076ab4382d2SGreg Kroah-Hartman uart_console_write(&sport->port, s, count, imx_console_putchar); 1077ab4382d2SGreg Kroah-Hartman 1078ab4382d2SGreg Kroah-Hartman /* 1079ab4382d2SGreg Kroah-Hartman * Finally, wait for transmitter to become empty 1080ab4382d2SGreg Kroah-Hartman * and restore UCR1/2 1081ab4382d2SGreg Kroah-Hartman */ 1082ab4382d2SGreg Kroah-Hartman while (!(readl(sport->port.membase + USR2) & USR2_TXDC)); 1083ab4382d2SGreg Kroah-Hartman 1084ab4382d2SGreg Kroah-Hartman writel(old_ucr1, sport->port.membase + UCR1); 1085ab4382d2SGreg Kroah-Hartman writel(old_ucr2, sport->port.membase + UCR2); 1086ab4382d2SGreg Kroah-Hartman } 1087ab4382d2SGreg Kroah-Hartman 1088ab4382d2SGreg Kroah-Hartman /* 1089ab4382d2SGreg Kroah-Hartman * If the port was already initialised (eg, by a boot loader), 1090ab4382d2SGreg Kroah-Hartman * try to determine the current setup. 1091ab4382d2SGreg Kroah-Hartman */ 1092ab4382d2SGreg Kroah-Hartman static void __init 1093ab4382d2SGreg Kroah-Hartman imx_console_get_options(struct imx_port *sport, int *baud, 1094ab4382d2SGreg Kroah-Hartman int *parity, int *bits) 1095ab4382d2SGreg Kroah-Hartman { 1096ab4382d2SGreg Kroah-Hartman 1097ab4382d2SGreg Kroah-Hartman if (readl(sport->port.membase + UCR1) & UCR1_UARTEN) { 1098ab4382d2SGreg Kroah-Hartman /* ok, the port was enabled */ 1099ab4382d2SGreg Kroah-Hartman unsigned int ucr2, ubir,ubmr, uartclk; 1100ab4382d2SGreg Kroah-Hartman unsigned int baud_raw; 1101ab4382d2SGreg Kroah-Hartman unsigned int ucfr_rfdiv; 1102ab4382d2SGreg Kroah-Hartman 1103ab4382d2SGreg Kroah-Hartman ucr2 = readl(sport->port.membase + UCR2); 1104ab4382d2SGreg Kroah-Hartman 1105ab4382d2SGreg Kroah-Hartman *parity = 'n'; 1106ab4382d2SGreg Kroah-Hartman if (ucr2 & UCR2_PREN) { 1107ab4382d2SGreg Kroah-Hartman if (ucr2 & UCR2_PROE) 1108ab4382d2SGreg Kroah-Hartman *parity = 'o'; 1109ab4382d2SGreg Kroah-Hartman else 1110ab4382d2SGreg Kroah-Hartman *parity = 'e'; 1111ab4382d2SGreg Kroah-Hartman } 1112ab4382d2SGreg Kroah-Hartman 1113ab4382d2SGreg Kroah-Hartman if (ucr2 & UCR2_WS) 1114ab4382d2SGreg Kroah-Hartman *bits = 8; 1115ab4382d2SGreg Kroah-Hartman else 1116ab4382d2SGreg Kroah-Hartman *bits = 7; 1117ab4382d2SGreg Kroah-Hartman 1118ab4382d2SGreg Kroah-Hartman ubir = readl(sport->port.membase + UBIR) & 0xffff; 1119ab4382d2SGreg Kroah-Hartman ubmr = readl(sport->port.membase + UBMR) & 0xffff; 1120ab4382d2SGreg Kroah-Hartman 1121ab4382d2SGreg Kroah-Hartman ucfr_rfdiv = (readl(sport->port.membase + UFCR) & UFCR_RFDIV) >> 7; 1122ab4382d2SGreg Kroah-Hartman if (ucfr_rfdiv == 6) 1123ab4382d2SGreg Kroah-Hartman ucfr_rfdiv = 7; 1124ab4382d2SGreg Kroah-Hartman else 1125ab4382d2SGreg Kroah-Hartman ucfr_rfdiv = 6 - ucfr_rfdiv; 1126ab4382d2SGreg Kroah-Hartman 1127ab4382d2SGreg Kroah-Hartman uartclk = clk_get_rate(sport->clk); 1128ab4382d2SGreg Kroah-Hartman uartclk /= ucfr_rfdiv; 1129ab4382d2SGreg Kroah-Hartman 1130ab4382d2SGreg Kroah-Hartman { /* 1131ab4382d2SGreg Kroah-Hartman * The next code provides exact computation of 1132ab4382d2SGreg Kroah-Hartman * baud_raw = round(((uartclk/16) * (ubir + 1)) / (ubmr + 1)) 1133ab4382d2SGreg Kroah-Hartman * without need of float support or long long division, 1134ab4382d2SGreg Kroah-Hartman * which would be required to prevent 32bit arithmetic overflow 1135ab4382d2SGreg Kroah-Hartman */ 1136ab4382d2SGreg Kroah-Hartman unsigned int mul = ubir + 1; 1137ab4382d2SGreg Kroah-Hartman unsigned int div = 16 * (ubmr + 1); 1138ab4382d2SGreg Kroah-Hartman unsigned int rem = uartclk % div; 1139ab4382d2SGreg Kroah-Hartman 1140ab4382d2SGreg Kroah-Hartman baud_raw = (uartclk / div) * mul; 1141ab4382d2SGreg Kroah-Hartman baud_raw += (rem * mul + div / 2) / div; 1142ab4382d2SGreg Kroah-Hartman *baud = (baud_raw + 50) / 100 * 100; 1143ab4382d2SGreg Kroah-Hartman } 1144ab4382d2SGreg Kroah-Hartman 1145ab4382d2SGreg Kroah-Hartman if(*baud != baud_raw) 1146ab4382d2SGreg Kroah-Hartman printk(KERN_INFO "Serial: Console IMX rounded baud rate from %d to %d\n", 1147ab4382d2SGreg Kroah-Hartman baud_raw, *baud); 1148ab4382d2SGreg Kroah-Hartman } 1149ab4382d2SGreg Kroah-Hartman } 1150ab4382d2SGreg Kroah-Hartman 1151ab4382d2SGreg Kroah-Hartman static int __init 1152ab4382d2SGreg Kroah-Hartman imx_console_setup(struct console *co, char *options) 1153ab4382d2SGreg Kroah-Hartman { 1154ab4382d2SGreg Kroah-Hartman struct imx_port *sport; 1155ab4382d2SGreg Kroah-Hartman int baud = 9600; 1156ab4382d2SGreg Kroah-Hartman int bits = 8; 1157ab4382d2SGreg Kroah-Hartman int parity = 'n'; 1158ab4382d2SGreg Kroah-Hartman int flow = 'n'; 1159ab4382d2SGreg Kroah-Hartman 1160ab4382d2SGreg Kroah-Hartman /* 1161ab4382d2SGreg Kroah-Hartman * Check whether an invalid uart number has been specified, and 1162ab4382d2SGreg Kroah-Hartman * if so, search for the first available port that does have 1163ab4382d2SGreg Kroah-Hartman * console support. 1164ab4382d2SGreg Kroah-Hartman */ 1165ab4382d2SGreg Kroah-Hartman if (co->index == -1 || co->index >= ARRAY_SIZE(imx_ports)) 1166ab4382d2SGreg Kroah-Hartman co->index = 0; 1167ab4382d2SGreg Kroah-Hartman sport = imx_ports[co->index]; 1168ab4382d2SGreg Kroah-Hartman if(sport == NULL) 1169ab4382d2SGreg Kroah-Hartman return -ENODEV; 1170ab4382d2SGreg Kroah-Hartman 1171ab4382d2SGreg Kroah-Hartman if (options) 1172ab4382d2SGreg Kroah-Hartman uart_parse_options(options, &baud, &parity, &bits, &flow); 1173ab4382d2SGreg Kroah-Hartman else 1174ab4382d2SGreg Kroah-Hartman imx_console_get_options(sport, &baud, &parity, &bits); 1175ab4382d2SGreg Kroah-Hartman 1176ab4382d2SGreg Kroah-Hartman imx_setup_ufcr(sport, 0); 1177ab4382d2SGreg Kroah-Hartman 1178ab4382d2SGreg Kroah-Hartman return uart_set_options(&sport->port, co, baud, parity, bits, flow); 1179ab4382d2SGreg Kroah-Hartman } 1180ab4382d2SGreg Kroah-Hartman 1181ab4382d2SGreg Kroah-Hartman static struct uart_driver imx_reg; 1182ab4382d2SGreg Kroah-Hartman static struct console imx_console = { 1183ab4382d2SGreg Kroah-Hartman .name = DEV_NAME, 1184ab4382d2SGreg Kroah-Hartman .write = imx_console_write, 1185ab4382d2SGreg Kroah-Hartman .device = uart_console_device, 1186ab4382d2SGreg Kroah-Hartman .setup = imx_console_setup, 1187ab4382d2SGreg Kroah-Hartman .flags = CON_PRINTBUFFER, 1188ab4382d2SGreg Kroah-Hartman .index = -1, 1189ab4382d2SGreg Kroah-Hartman .data = &imx_reg, 1190ab4382d2SGreg Kroah-Hartman }; 1191ab4382d2SGreg Kroah-Hartman 1192ab4382d2SGreg Kroah-Hartman #define IMX_CONSOLE &imx_console 1193ab4382d2SGreg Kroah-Hartman #else 1194ab4382d2SGreg Kroah-Hartman #define IMX_CONSOLE NULL 1195ab4382d2SGreg Kroah-Hartman #endif 1196ab4382d2SGreg Kroah-Hartman 1197ab4382d2SGreg Kroah-Hartman static struct uart_driver imx_reg = { 1198ab4382d2SGreg Kroah-Hartman .owner = THIS_MODULE, 1199ab4382d2SGreg Kroah-Hartman .driver_name = DRIVER_NAME, 1200ab4382d2SGreg Kroah-Hartman .dev_name = DEV_NAME, 1201ab4382d2SGreg Kroah-Hartman .major = SERIAL_IMX_MAJOR, 1202ab4382d2SGreg Kroah-Hartman .minor = MINOR_START, 1203ab4382d2SGreg Kroah-Hartman .nr = ARRAY_SIZE(imx_ports), 1204ab4382d2SGreg Kroah-Hartman .cons = IMX_CONSOLE, 1205ab4382d2SGreg Kroah-Hartman }; 1206ab4382d2SGreg Kroah-Hartman 1207ab4382d2SGreg Kroah-Hartman static int serial_imx_suspend(struct platform_device *dev, pm_message_t state) 1208ab4382d2SGreg Kroah-Hartman { 1209ab4382d2SGreg Kroah-Hartman struct imx_port *sport = platform_get_drvdata(dev); 1210ab4382d2SGreg Kroah-Hartman 1211ab4382d2SGreg Kroah-Hartman if (sport) 1212ab4382d2SGreg Kroah-Hartman uart_suspend_port(&imx_reg, &sport->port); 1213ab4382d2SGreg Kroah-Hartman 1214ab4382d2SGreg Kroah-Hartman return 0; 1215ab4382d2SGreg Kroah-Hartman } 1216ab4382d2SGreg Kroah-Hartman 1217ab4382d2SGreg Kroah-Hartman static int serial_imx_resume(struct platform_device *dev) 1218ab4382d2SGreg Kroah-Hartman { 1219ab4382d2SGreg Kroah-Hartman struct imx_port *sport = platform_get_drvdata(dev); 1220ab4382d2SGreg Kroah-Hartman 1221ab4382d2SGreg Kroah-Hartman if (sport) 1222ab4382d2SGreg Kroah-Hartman uart_resume_port(&imx_reg, &sport->port); 1223ab4382d2SGreg Kroah-Hartman 1224ab4382d2SGreg Kroah-Hartman return 0; 1225ab4382d2SGreg Kroah-Hartman } 1226ab4382d2SGreg Kroah-Hartman 1227ab4382d2SGreg Kroah-Hartman static int serial_imx_probe(struct platform_device *pdev) 1228ab4382d2SGreg Kroah-Hartman { 1229ab4382d2SGreg Kroah-Hartman struct imx_port *sport; 1230ab4382d2SGreg Kroah-Hartman struct imxuart_platform_data *pdata; 1231ab4382d2SGreg Kroah-Hartman void __iomem *base; 1232ab4382d2SGreg Kroah-Hartman int ret = 0; 1233ab4382d2SGreg Kroah-Hartman struct resource *res; 1234ab4382d2SGreg Kroah-Hartman 1235ab4382d2SGreg Kroah-Hartman sport = kzalloc(sizeof(*sport), GFP_KERNEL); 1236ab4382d2SGreg Kroah-Hartman if (!sport) 1237ab4382d2SGreg Kroah-Hartman return -ENOMEM; 1238ab4382d2SGreg Kroah-Hartman 1239ab4382d2SGreg Kroah-Hartman res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1240ab4382d2SGreg Kroah-Hartman if (!res) { 1241ab4382d2SGreg Kroah-Hartman ret = -ENODEV; 1242ab4382d2SGreg Kroah-Hartman goto free; 1243ab4382d2SGreg Kroah-Hartman } 1244ab4382d2SGreg Kroah-Hartman 1245ab4382d2SGreg Kroah-Hartman base = ioremap(res->start, PAGE_SIZE); 1246ab4382d2SGreg Kroah-Hartman if (!base) { 1247ab4382d2SGreg Kroah-Hartman ret = -ENOMEM; 1248ab4382d2SGreg Kroah-Hartman goto free; 1249ab4382d2SGreg Kroah-Hartman } 1250ab4382d2SGreg Kroah-Hartman 1251ab4382d2SGreg Kroah-Hartman sport->port.dev = &pdev->dev; 1252ab4382d2SGreg Kroah-Hartman sport->port.mapbase = res->start; 1253ab4382d2SGreg Kroah-Hartman sport->port.membase = base; 1254ab4382d2SGreg Kroah-Hartman sport->port.type = PORT_IMX, 1255ab4382d2SGreg Kroah-Hartman sport->port.iotype = UPIO_MEM; 1256ab4382d2SGreg Kroah-Hartman sport->port.irq = platform_get_irq(pdev, 0); 1257ab4382d2SGreg Kroah-Hartman sport->rxirq = platform_get_irq(pdev, 0); 1258ab4382d2SGreg Kroah-Hartman sport->txirq = platform_get_irq(pdev, 1); 1259ab4382d2SGreg Kroah-Hartman sport->rtsirq = platform_get_irq(pdev, 2); 1260ab4382d2SGreg Kroah-Hartman sport->port.fifosize = 32; 1261ab4382d2SGreg Kroah-Hartman sport->port.ops = &imx_pops; 1262ab4382d2SGreg Kroah-Hartman sport->port.flags = UPF_BOOT_AUTOCONF; 1263ab4382d2SGreg Kroah-Hartman sport->port.line = pdev->id; 1264ab4382d2SGreg Kroah-Hartman init_timer(&sport->timer); 1265ab4382d2SGreg Kroah-Hartman sport->timer.function = imx_timeout; 1266ab4382d2SGreg Kroah-Hartman sport->timer.data = (unsigned long)sport; 1267ab4382d2SGreg Kroah-Hartman 1268ab4382d2SGreg Kroah-Hartman sport->clk = clk_get(&pdev->dev, "uart"); 1269ab4382d2SGreg Kroah-Hartman if (IS_ERR(sport->clk)) { 1270ab4382d2SGreg Kroah-Hartman ret = PTR_ERR(sport->clk); 1271ab4382d2SGreg Kroah-Hartman goto unmap; 1272ab4382d2SGreg Kroah-Hartman } 1273ab4382d2SGreg Kroah-Hartman clk_enable(sport->clk); 1274ab4382d2SGreg Kroah-Hartman 1275ab4382d2SGreg Kroah-Hartman sport->port.uartclk = clk_get_rate(sport->clk); 1276ab4382d2SGreg Kroah-Hartman 1277ab4382d2SGreg Kroah-Hartman imx_ports[pdev->id] = sport; 1278ab4382d2SGreg Kroah-Hartman 1279ab4382d2SGreg Kroah-Hartman pdata = pdev->dev.platform_data; 1280ab4382d2SGreg Kroah-Hartman if (pdata && (pdata->flags & IMXUART_HAVE_RTSCTS)) 1281ab4382d2SGreg Kroah-Hartman sport->have_rtscts = 1; 1282ab4382d2SGreg Kroah-Hartman 1283ab4382d2SGreg Kroah-Hartman #ifdef CONFIG_IRDA 1284ab4382d2SGreg Kroah-Hartman if (pdata && (pdata->flags & IMXUART_IRDA)) 1285ab4382d2SGreg Kroah-Hartman sport->use_irda = 1; 1286ab4382d2SGreg Kroah-Hartman #endif 1287ab4382d2SGreg Kroah-Hartman 1288ab4382d2SGreg Kroah-Hartman if (pdata && pdata->init) { 1289ab4382d2SGreg Kroah-Hartman ret = pdata->init(pdev); 1290ab4382d2SGreg Kroah-Hartman if (ret) 1291ab4382d2SGreg Kroah-Hartman goto clkput; 1292ab4382d2SGreg Kroah-Hartman } 1293ab4382d2SGreg Kroah-Hartman 1294ab4382d2SGreg Kroah-Hartman ret = uart_add_one_port(&imx_reg, &sport->port); 1295ab4382d2SGreg Kroah-Hartman if (ret) 1296ab4382d2SGreg Kroah-Hartman goto deinit; 1297ab4382d2SGreg Kroah-Hartman platform_set_drvdata(pdev, &sport->port); 1298ab4382d2SGreg Kroah-Hartman 1299ab4382d2SGreg Kroah-Hartman return 0; 1300ab4382d2SGreg Kroah-Hartman deinit: 1301ab4382d2SGreg Kroah-Hartman if (pdata && pdata->exit) 1302ab4382d2SGreg Kroah-Hartman pdata->exit(pdev); 1303ab4382d2SGreg Kroah-Hartman clkput: 1304ab4382d2SGreg Kroah-Hartman clk_put(sport->clk); 1305ab4382d2SGreg Kroah-Hartman clk_disable(sport->clk); 1306ab4382d2SGreg Kroah-Hartman unmap: 1307ab4382d2SGreg Kroah-Hartman iounmap(sport->port.membase); 1308ab4382d2SGreg Kroah-Hartman free: 1309ab4382d2SGreg Kroah-Hartman kfree(sport); 1310ab4382d2SGreg Kroah-Hartman 1311ab4382d2SGreg Kroah-Hartman return ret; 1312ab4382d2SGreg Kroah-Hartman } 1313ab4382d2SGreg Kroah-Hartman 1314ab4382d2SGreg Kroah-Hartman static int serial_imx_remove(struct platform_device *pdev) 1315ab4382d2SGreg Kroah-Hartman { 1316ab4382d2SGreg Kroah-Hartman struct imxuart_platform_data *pdata; 1317ab4382d2SGreg Kroah-Hartman struct imx_port *sport = platform_get_drvdata(pdev); 1318ab4382d2SGreg Kroah-Hartman 1319ab4382d2SGreg Kroah-Hartman pdata = pdev->dev.platform_data; 1320ab4382d2SGreg Kroah-Hartman 1321ab4382d2SGreg Kroah-Hartman platform_set_drvdata(pdev, NULL); 1322ab4382d2SGreg Kroah-Hartman 1323ab4382d2SGreg Kroah-Hartman if (sport) { 1324ab4382d2SGreg Kroah-Hartman uart_remove_one_port(&imx_reg, &sport->port); 1325ab4382d2SGreg Kroah-Hartman clk_put(sport->clk); 1326ab4382d2SGreg Kroah-Hartman } 1327ab4382d2SGreg Kroah-Hartman 1328ab4382d2SGreg Kroah-Hartman clk_disable(sport->clk); 1329ab4382d2SGreg Kroah-Hartman 1330ab4382d2SGreg Kroah-Hartman if (pdata && pdata->exit) 1331ab4382d2SGreg Kroah-Hartman pdata->exit(pdev); 1332ab4382d2SGreg Kroah-Hartman 1333ab4382d2SGreg Kroah-Hartman iounmap(sport->port.membase); 1334ab4382d2SGreg Kroah-Hartman kfree(sport); 1335ab4382d2SGreg Kroah-Hartman 1336ab4382d2SGreg Kroah-Hartman return 0; 1337ab4382d2SGreg Kroah-Hartman } 1338ab4382d2SGreg Kroah-Hartman 1339ab4382d2SGreg Kroah-Hartman static struct platform_driver serial_imx_driver = { 1340ab4382d2SGreg Kroah-Hartman .probe = serial_imx_probe, 1341ab4382d2SGreg Kroah-Hartman .remove = serial_imx_remove, 1342ab4382d2SGreg Kroah-Hartman 1343ab4382d2SGreg Kroah-Hartman .suspend = serial_imx_suspend, 1344ab4382d2SGreg Kroah-Hartman .resume = serial_imx_resume, 1345ab4382d2SGreg Kroah-Hartman .driver = { 1346ab4382d2SGreg Kroah-Hartman .name = "imx-uart", 1347ab4382d2SGreg Kroah-Hartman .owner = THIS_MODULE, 1348ab4382d2SGreg Kroah-Hartman }, 1349ab4382d2SGreg Kroah-Hartman }; 1350ab4382d2SGreg Kroah-Hartman 1351ab4382d2SGreg Kroah-Hartman static int __init imx_serial_init(void) 1352ab4382d2SGreg Kroah-Hartman { 1353ab4382d2SGreg Kroah-Hartman int ret; 1354ab4382d2SGreg Kroah-Hartman 1355ab4382d2SGreg Kroah-Hartman printk(KERN_INFO "Serial: IMX driver\n"); 1356ab4382d2SGreg Kroah-Hartman 1357ab4382d2SGreg Kroah-Hartman ret = uart_register_driver(&imx_reg); 1358ab4382d2SGreg Kroah-Hartman if (ret) 1359ab4382d2SGreg Kroah-Hartman return ret; 1360ab4382d2SGreg Kroah-Hartman 1361ab4382d2SGreg Kroah-Hartman ret = platform_driver_register(&serial_imx_driver); 1362ab4382d2SGreg Kroah-Hartman if (ret != 0) 1363ab4382d2SGreg Kroah-Hartman uart_unregister_driver(&imx_reg); 1364ab4382d2SGreg Kroah-Hartman 1365ab4382d2SGreg Kroah-Hartman return 0; 1366ab4382d2SGreg Kroah-Hartman } 1367ab4382d2SGreg Kroah-Hartman 1368ab4382d2SGreg Kroah-Hartman static void __exit imx_serial_exit(void) 1369ab4382d2SGreg Kroah-Hartman { 1370ab4382d2SGreg Kroah-Hartman platform_driver_unregister(&serial_imx_driver); 1371ab4382d2SGreg Kroah-Hartman uart_unregister_driver(&imx_reg); 1372ab4382d2SGreg Kroah-Hartman } 1373ab4382d2SGreg Kroah-Hartman 1374ab4382d2SGreg Kroah-Hartman module_init(imx_serial_init); 1375ab4382d2SGreg Kroah-Hartman module_exit(imx_serial_exit); 1376ab4382d2SGreg Kroah-Hartman 1377ab4382d2SGreg Kroah-Hartman MODULE_AUTHOR("Sascha Hauer"); 1378ab4382d2SGreg Kroah-Hartman MODULE_DESCRIPTION("IMX generic serial port driver"); 1379ab4382d2SGreg Kroah-Hartman MODULE_LICENSE("GPL"); 1380ab4382d2SGreg Kroah-Hartman MODULE_ALIAS("platform:imx-uart"); 1381