1ab4382d2SGreg Kroah-Hartman /* 2ab4382d2SGreg Kroah-Hartman * Driver for Motorola IMX serial ports 3ab4382d2SGreg Kroah-Hartman * 4ab4382d2SGreg Kroah-Hartman * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o. 5ab4382d2SGreg Kroah-Hartman * 6ab4382d2SGreg Kroah-Hartman * Author: Sascha Hauer <sascha@saschahauer.de> 7ab4382d2SGreg Kroah-Hartman * Copyright (C) 2004 Pengutronix 8ab4382d2SGreg Kroah-Hartman * 9ab4382d2SGreg Kroah-Hartman * Copyright (C) 2009 emlix GmbH 10ab4382d2SGreg Kroah-Hartman * Author: Fabian Godehardt (added IrDA support for iMX) 11ab4382d2SGreg Kroah-Hartman * 12ab4382d2SGreg Kroah-Hartman * This program is free software; you can redistribute it and/or modify 13ab4382d2SGreg Kroah-Hartman * it under the terms of the GNU General Public License as published by 14ab4382d2SGreg Kroah-Hartman * the Free Software Foundation; either version 2 of the License, or 15ab4382d2SGreg Kroah-Hartman * (at your option) any later version. 16ab4382d2SGreg Kroah-Hartman * 17ab4382d2SGreg Kroah-Hartman * This program is distributed in the hope that it will be useful, 18ab4382d2SGreg Kroah-Hartman * but WITHOUT ANY WARRANTY; without even the implied warranty of 19ab4382d2SGreg Kroah-Hartman * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20ab4382d2SGreg Kroah-Hartman * GNU General Public License for more details. 21ab4382d2SGreg Kroah-Hartman * 22ab4382d2SGreg Kroah-Hartman * You should have received a copy of the GNU General Public License 23ab4382d2SGreg Kroah-Hartman * along with this program; if not, write to the Free Software 24ab4382d2SGreg Kroah-Hartman * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 25ab4382d2SGreg Kroah-Hartman * 26ab4382d2SGreg Kroah-Hartman * [29-Mar-2005] Mike Lee 27ab4382d2SGreg Kroah-Hartman * Added hardware handshake 28ab4382d2SGreg Kroah-Hartman */ 29ab4382d2SGreg Kroah-Hartman 30ab4382d2SGreg Kroah-Hartman #if defined(CONFIG_SERIAL_IMX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) 31ab4382d2SGreg Kroah-Hartman #define SUPPORT_SYSRQ 32ab4382d2SGreg Kroah-Hartman #endif 33ab4382d2SGreg Kroah-Hartman 34ab4382d2SGreg Kroah-Hartman #include <linux/module.h> 35ab4382d2SGreg Kroah-Hartman #include <linux/ioport.h> 36ab4382d2SGreg Kroah-Hartman #include <linux/init.h> 37ab4382d2SGreg Kroah-Hartman #include <linux/console.h> 38ab4382d2SGreg Kroah-Hartman #include <linux/sysrq.h> 39ab4382d2SGreg Kroah-Hartman #include <linux/platform_device.h> 40ab4382d2SGreg Kroah-Hartman #include <linux/tty.h> 41ab4382d2SGreg Kroah-Hartman #include <linux/tty_flip.h> 42ab4382d2SGreg Kroah-Hartman #include <linux/serial_core.h> 43ab4382d2SGreg Kroah-Hartman #include <linux/serial.h> 44ab4382d2SGreg Kroah-Hartman #include <linux/clk.h> 45ab4382d2SGreg Kroah-Hartman #include <linux/delay.h> 46ab4382d2SGreg Kroah-Hartman #include <linux/rational.h> 47ab4382d2SGreg Kroah-Hartman #include <linux/slab.h> 4822698aa2SShawn Guo #include <linux/of.h> 4922698aa2SShawn Guo #include <linux/of_device.h> 50ab4382d2SGreg Kroah-Hartman 51ab4382d2SGreg Kroah-Hartman #include <asm/io.h> 52ab4382d2SGreg Kroah-Hartman #include <asm/irq.h> 53ab4382d2SGreg Kroah-Hartman #include <mach/imx-uart.h> 54ab4382d2SGreg Kroah-Hartman 55ab4382d2SGreg Kroah-Hartman /* Register definitions */ 56ab4382d2SGreg Kroah-Hartman #define URXD0 0x0 /* Receiver Register */ 57ab4382d2SGreg Kroah-Hartman #define URTX0 0x40 /* Transmitter Register */ 58ab4382d2SGreg Kroah-Hartman #define UCR1 0x80 /* Control Register 1 */ 59ab4382d2SGreg Kroah-Hartman #define UCR2 0x84 /* Control Register 2 */ 60ab4382d2SGreg Kroah-Hartman #define UCR3 0x88 /* Control Register 3 */ 61ab4382d2SGreg Kroah-Hartman #define UCR4 0x8c /* Control Register 4 */ 62ab4382d2SGreg Kroah-Hartman #define UFCR 0x90 /* FIFO Control Register */ 63ab4382d2SGreg Kroah-Hartman #define USR1 0x94 /* Status Register 1 */ 64ab4382d2SGreg Kroah-Hartman #define USR2 0x98 /* Status Register 2 */ 65ab4382d2SGreg Kroah-Hartman #define UESC 0x9c /* Escape Character Register */ 66ab4382d2SGreg Kroah-Hartman #define UTIM 0xa0 /* Escape Timer Register */ 67ab4382d2SGreg Kroah-Hartman #define UBIR 0xa4 /* BRM Incremental Register */ 68ab4382d2SGreg Kroah-Hartman #define UBMR 0xa8 /* BRM Modulator Register */ 69ab4382d2SGreg Kroah-Hartman #define UBRC 0xac /* Baud Rate Count Register */ 70fe6b540aSShawn Guo #define IMX21_ONEMS 0xb0 /* One Millisecond register */ 71fe6b540aSShawn Guo #define IMX1_UTS 0xd0 /* UART Test Register on i.mx1 */ 72fe6b540aSShawn Guo #define IMX21_UTS 0xb4 /* UART Test Register on all other i.mx*/ 73ab4382d2SGreg Kroah-Hartman 74ab4382d2SGreg Kroah-Hartman /* UART Control Register Bit Fields.*/ 75ab4382d2SGreg Kroah-Hartman #define URXD_CHARRDY (1<<15) 76ab4382d2SGreg Kroah-Hartman #define URXD_ERR (1<<14) 77ab4382d2SGreg Kroah-Hartman #define URXD_OVRRUN (1<<13) 78ab4382d2SGreg Kroah-Hartman #define URXD_FRMERR (1<<12) 79ab4382d2SGreg Kroah-Hartman #define URXD_BRK (1<<11) 80ab4382d2SGreg Kroah-Hartman #define URXD_PRERR (1<<10) 8125985edcSLucas De Marchi #define UCR1_ADEN (1<<15) /* Auto detect interrupt */ 82ab4382d2SGreg Kroah-Hartman #define UCR1_ADBR (1<<14) /* Auto detect baud rate */ 83ab4382d2SGreg Kroah-Hartman #define UCR1_TRDYEN (1<<13) /* Transmitter ready interrupt enable */ 84ab4382d2SGreg Kroah-Hartman #define UCR1_IDEN (1<<12) /* Idle condition interrupt */ 85ab4382d2SGreg Kroah-Hartman #define UCR1_RRDYEN (1<<9) /* Recv ready interrupt enable */ 86ab4382d2SGreg Kroah-Hartman #define UCR1_RDMAEN (1<<8) /* Recv ready DMA enable */ 87ab4382d2SGreg Kroah-Hartman #define UCR1_IREN (1<<7) /* Infrared interface enable */ 88ab4382d2SGreg Kroah-Hartman #define UCR1_TXMPTYEN (1<<6) /* Transimitter empty interrupt enable */ 89ab4382d2SGreg Kroah-Hartman #define UCR1_RTSDEN (1<<5) /* RTS delta interrupt enable */ 90ab4382d2SGreg Kroah-Hartman #define UCR1_SNDBRK (1<<4) /* Send break */ 91ab4382d2SGreg Kroah-Hartman #define UCR1_TDMAEN (1<<3) /* Transmitter ready DMA enable */ 92fe6b540aSShawn Guo #define IMX1_UCR1_UARTCLKEN (1<<2) /* UART clock enabled, i.mx1 only */ 93ab4382d2SGreg Kroah-Hartman #define UCR1_DOZE (1<<1) /* Doze */ 94ab4382d2SGreg Kroah-Hartman #define UCR1_UARTEN (1<<0) /* UART enabled */ 95ab4382d2SGreg Kroah-Hartman #define UCR2_ESCI (1<<15) /* Escape seq interrupt enable */ 96ab4382d2SGreg Kroah-Hartman #define UCR2_IRTS (1<<14) /* Ignore RTS pin */ 97ab4382d2SGreg Kroah-Hartman #define UCR2_CTSC (1<<13) /* CTS pin control */ 98ab4382d2SGreg Kroah-Hartman #define UCR2_CTS (1<<12) /* Clear to send */ 99ab4382d2SGreg Kroah-Hartman #define UCR2_ESCEN (1<<11) /* Escape enable */ 100ab4382d2SGreg Kroah-Hartman #define UCR2_PREN (1<<8) /* Parity enable */ 101ab4382d2SGreg Kroah-Hartman #define UCR2_PROE (1<<7) /* Parity odd/even */ 102ab4382d2SGreg Kroah-Hartman #define UCR2_STPB (1<<6) /* Stop */ 103ab4382d2SGreg Kroah-Hartman #define UCR2_WS (1<<5) /* Word size */ 104ab4382d2SGreg Kroah-Hartman #define UCR2_RTSEN (1<<4) /* Request to send interrupt enable */ 10501f56abdSSaleem Abdulrasool #define UCR2_ATEN (1<<3) /* Aging Timer Enable */ 106ab4382d2SGreg Kroah-Hartman #define UCR2_TXEN (1<<2) /* Transmitter enabled */ 107ab4382d2SGreg Kroah-Hartman #define UCR2_RXEN (1<<1) /* Receiver enabled */ 108ab4382d2SGreg Kroah-Hartman #define UCR2_SRST (1<<0) /* SW reset */ 109ab4382d2SGreg Kroah-Hartman #define UCR3_DTREN (1<<13) /* DTR interrupt enable */ 110ab4382d2SGreg Kroah-Hartman #define UCR3_PARERREN (1<<12) /* Parity enable */ 111ab4382d2SGreg Kroah-Hartman #define UCR3_FRAERREN (1<<11) /* Frame error interrupt enable */ 112ab4382d2SGreg Kroah-Hartman #define UCR3_DSR (1<<10) /* Data set ready */ 113ab4382d2SGreg Kroah-Hartman #define UCR3_DCD (1<<9) /* Data carrier detect */ 114ab4382d2SGreg Kroah-Hartman #define UCR3_RI (1<<8) /* Ring indicator */ 115ab4382d2SGreg Kroah-Hartman #define UCR3_TIMEOUTEN (1<<7) /* Timeout interrupt enable */ 116ab4382d2SGreg Kroah-Hartman #define UCR3_RXDSEN (1<<6) /* Receive status interrupt enable */ 117ab4382d2SGreg Kroah-Hartman #define UCR3_AIRINTEN (1<<5) /* Async IR wake interrupt enable */ 118ab4382d2SGreg Kroah-Hartman #define UCR3_AWAKEN (1<<4) /* Async wake interrupt enable */ 119fe6b540aSShawn Guo #define IMX21_UCR3_RXDMUXSEL (1<<2) /* RXD Muxed Input Select */ 120ab4382d2SGreg Kroah-Hartman #define UCR3_INVT (1<<1) /* Inverted Infrared transmission */ 121ab4382d2SGreg Kroah-Hartman #define UCR3_BPEN (1<<0) /* Preset registers enable */ 122ab4382d2SGreg Kroah-Hartman #define UCR4_CTSTL_SHF 10 /* CTS trigger level shift */ 123ab4382d2SGreg Kroah-Hartman #define UCR4_CTSTL_MASK 0x3F /* CTS trigger is 6 bits wide */ 124ab4382d2SGreg Kroah-Hartman #define UCR4_INVR (1<<9) /* Inverted infrared reception */ 125ab4382d2SGreg Kroah-Hartman #define UCR4_ENIRI (1<<8) /* Serial infrared interrupt enable */ 126ab4382d2SGreg Kroah-Hartman #define UCR4_WKEN (1<<7) /* Wake interrupt enable */ 127ab4382d2SGreg Kroah-Hartman #define UCR4_REF16 (1<<6) /* Ref freq 16 MHz */ 128ab4382d2SGreg Kroah-Hartman #define UCR4_IRSC (1<<5) /* IR special case */ 129ab4382d2SGreg Kroah-Hartman #define UCR4_TCEN (1<<3) /* Transmit complete interrupt enable */ 130ab4382d2SGreg Kroah-Hartman #define UCR4_BKEN (1<<2) /* Break condition interrupt enable */ 131ab4382d2SGreg Kroah-Hartman #define UCR4_OREN (1<<1) /* Receiver overrun interrupt enable */ 132ab4382d2SGreg Kroah-Hartman #define UCR4_DREN (1<<0) /* Recv data ready interrupt enable */ 133ab4382d2SGreg Kroah-Hartman #define UFCR_RXTL_SHF 0 /* Receiver trigger level shift */ 134ab4382d2SGreg Kroah-Hartman #define UFCR_RFDIV (7<<7) /* Reference freq divider mask */ 135ab4382d2SGreg Kroah-Hartman #define UFCR_RFDIV_REG(x) (((x) < 7 ? 6 - (x) : 6) << 7) 136ab4382d2SGreg Kroah-Hartman #define UFCR_TXTL_SHF 10 /* Transmitter trigger level shift */ 137ab4382d2SGreg Kroah-Hartman #define USR1_PARITYERR (1<<15) /* Parity error interrupt flag */ 138ab4382d2SGreg Kroah-Hartman #define USR1_RTSS (1<<14) /* RTS pin status */ 139ab4382d2SGreg Kroah-Hartman #define USR1_TRDY (1<<13) /* Transmitter ready interrupt/dma flag */ 140ab4382d2SGreg Kroah-Hartman #define USR1_RTSD (1<<12) /* RTS delta */ 141ab4382d2SGreg Kroah-Hartman #define USR1_ESCF (1<<11) /* Escape seq interrupt flag */ 142ab4382d2SGreg Kroah-Hartman #define USR1_FRAMERR (1<<10) /* Frame error interrupt flag */ 143ab4382d2SGreg Kroah-Hartman #define USR1_RRDY (1<<9) /* Receiver ready interrupt/dma flag */ 144ab4382d2SGreg Kroah-Hartman #define USR1_TIMEOUT (1<<7) /* Receive timeout interrupt status */ 145ab4382d2SGreg Kroah-Hartman #define USR1_RXDS (1<<6) /* Receiver idle interrupt flag */ 146ab4382d2SGreg Kroah-Hartman #define USR1_AIRINT (1<<5) /* Async IR wake interrupt flag */ 147ab4382d2SGreg Kroah-Hartman #define USR1_AWAKE (1<<4) /* Aysnc wake interrupt flag */ 148ab4382d2SGreg Kroah-Hartman #define USR2_ADET (1<<15) /* Auto baud rate detect complete */ 149ab4382d2SGreg Kroah-Hartman #define USR2_TXFE (1<<14) /* Transmit buffer FIFO empty */ 150ab4382d2SGreg Kroah-Hartman #define USR2_DTRF (1<<13) /* DTR edge interrupt flag */ 151ab4382d2SGreg Kroah-Hartman #define USR2_IDLE (1<<12) /* Idle condition */ 152ab4382d2SGreg Kroah-Hartman #define USR2_IRINT (1<<8) /* Serial infrared interrupt flag */ 153ab4382d2SGreg Kroah-Hartman #define USR2_WAKE (1<<7) /* Wake */ 154ab4382d2SGreg Kroah-Hartman #define USR2_RTSF (1<<4) /* RTS edge interrupt flag */ 155ab4382d2SGreg Kroah-Hartman #define USR2_TXDC (1<<3) /* Transmitter complete */ 156ab4382d2SGreg Kroah-Hartman #define USR2_BRCD (1<<2) /* Break condition */ 157ab4382d2SGreg Kroah-Hartman #define USR2_ORE (1<<1) /* Overrun error */ 158ab4382d2SGreg Kroah-Hartman #define USR2_RDR (1<<0) /* Recv data ready */ 159ab4382d2SGreg Kroah-Hartman #define UTS_FRCPERR (1<<13) /* Force parity error */ 160ab4382d2SGreg Kroah-Hartman #define UTS_LOOP (1<<12) /* Loop tx and rx */ 161ab4382d2SGreg Kroah-Hartman #define UTS_TXEMPTY (1<<6) /* TxFIFO empty */ 162ab4382d2SGreg Kroah-Hartman #define UTS_RXEMPTY (1<<5) /* RxFIFO empty */ 163ab4382d2SGreg Kroah-Hartman #define UTS_TXFULL (1<<4) /* TxFIFO full */ 164ab4382d2SGreg Kroah-Hartman #define UTS_RXFULL (1<<3) /* RxFIFO full */ 165ab4382d2SGreg Kroah-Hartman #define UTS_SOFTRST (1<<0) /* Software reset */ 166ab4382d2SGreg Kroah-Hartman 167ab4382d2SGreg Kroah-Hartman /* We've been assigned a range on the "Low-density serial ports" major */ 168ab4382d2SGreg Kroah-Hartman #define SERIAL_IMX_MAJOR 207 169ab4382d2SGreg Kroah-Hartman #define MINOR_START 16 170ab4382d2SGreg Kroah-Hartman #define DEV_NAME "ttymxc" 171ab4382d2SGreg Kroah-Hartman #define MAX_INTERNAL_IRQ MXC_INTERNAL_IRQS 172ab4382d2SGreg Kroah-Hartman 173ab4382d2SGreg Kroah-Hartman /* 174ab4382d2SGreg Kroah-Hartman * This determines how often we check the modem status signals 175ab4382d2SGreg Kroah-Hartman * for any change. They generally aren't connected to an IRQ 176ab4382d2SGreg Kroah-Hartman * so we have to poll them. We also check immediately before 177ab4382d2SGreg Kroah-Hartman * filling the TX fifo incase CTS has been dropped. 178ab4382d2SGreg Kroah-Hartman */ 179ab4382d2SGreg Kroah-Hartman #define MCTRL_TIMEOUT (250*HZ/1000) 180ab4382d2SGreg Kroah-Hartman 181ab4382d2SGreg Kroah-Hartman #define DRIVER_NAME "IMX-uart" 182ab4382d2SGreg Kroah-Hartman 183ab4382d2SGreg Kroah-Hartman #define UART_NR 8 184ab4382d2SGreg Kroah-Hartman 185fe6b540aSShawn Guo /* i.mx21 type uart runs on all i.mx except i.mx1 */ 186fe6b540aSShawn Guo enum imx_uart_type { 187fe6b540aSShawn Guo IMX1_UART, 188fe6b540aSShawn Guo IMX21_UART, 189fe6b540aSShawn Guo }; 190fe6b540aSShawn Guo 191fe6b540aSShawn Guo /* device type dependent stuff */ 192fe6b540aSShawn Guo struct imx_uart_data { 193fe6b540aSShawn Guo unsigned uts_reg; 194fe6b540aSShawn Guo enum imx_uart_type devtype; 195fe6b540aSShawn Guo }; 196fe6b540aSShawn Guo 197ab4382d2SGreg Kroah-Hartman struct imx_port { 198ab4382d2SGreg Kroah-Hartman struct uart_port port; 199ab4382d2SGreg Kroah-Hartman struct timer_list timer; 200ab4382d2SGreg Kroah-Hartman unsigned int old_status; 201ab4382d2SGreg Kroah-Hartman int txirq,rxirq,rtsirq; 202ab4382d2SGreg Kroah-Hartman unsigned int have_rtscts:1; 203ab4382d2SGreg Kroah-Hartman unsigned int use_irda:1; 204ab4382d2SGreg Kroah-Hartman unsigned int irda_inv_rx:1; 205ab4382d2SGreg Kroah-Hartman unsigned int irda_inv_tx:1; 206ab4382d2SGreg Kroah-Hartman unsigned short trcv_delay; /* transceiver delay */ 207ab4382d2SGreg Kroah-Hartman struct clk *clk; 208fe6b540aSShawn Guo struct imx_uart_data *devdata; 209ab4382d2SGreg Kroah-Hartman }; 210ab4382d2SGreg Kroah-Hartman 2110ad5a814SDirk Behme struct imx_port_ucrs { 2120ad5a814SDirk Behme unsigned int ucr1; 2130ad5a814SDirk Behme unsigned int ucr2; 2140ad5a814SDirk Behme unsigned int ucr3; 2150ad5a814SDirk Behme }; 2160ad5a814SDirk Behme 217ab4382d2SGreg Kroah-Hartman #ifdef CONFIG_IRDA 218ab4382d2SGreg Kroah-Hartman #define USE_IRDA(sport) ((sport)->use_irda) 219ab4382d2SGreg Kroah-Hartman #else 220ab4382d2SGreg Kroah-Hartman #define USE_IRDA(sport) (0) 221ab4382d2SGreg Kroah-Hartman #endif 222ab4382d2SGreg Kroah-Hartman 223fe6b540aSShawn Guo static struct imx_uart_data imx_uart_devdata[] = { 224fe6b540aSShawn Guo [IMX1_UART] = { 225fe6b540aSShawn Guo .uts_reg = IMX1_UTS, 226fe6b540aSShawn Guo .devtype = IMX1_UART, 227fe6b540aSShawn Guo }, 228fe6b540aSShawn Guo [IMX21_UART] = { 229fe6b540aSShawn Guo .uts_reg = IMX21_UTS, 230fe6b540aSShawn Guo .devtype = IMX21_UART, 231fe6b540aSShawn Guo }, 232fe6b540aSShawn Guo }; 233fe6b540aSShawn Guo 234fe6b540aSShawn Guo static struct platform_device_id imx_uart_devtype[] = { 235fe6b540aSShawn Guo { 236fe6b540aSShawn Guo .name = "imx1-uart", 237fe6b540aSShawn Guo .driver_data = (kernel_ulong_t) &imx_uart_devdata[IMX1_UART], 238fe6b540aSShawn Guo }, { 239fe6b540aSShawn Guo .name = "imx21-uart", 240fe6b540aSShawn Guo .driver_data = (kernel_ulong_t) &imx_uart_devdata[IMX21_UART], 241fe6b540aSShawn Guo }, { 242fe6b540aSShawn Guo /* sentinel */ 243fe6b540aSShawn Guo } 244fe6b540aSShawn Guo }; 245fe6b540aSShawn Guo MODULE_DEVICE_TABLE(platform, imx_uart_devtype); 246fe6b540aSShawn Guo 24722698aa2SShawn Guo static struct of_device_id imx_uart_dt_ids[] = { 24822698aa2SShawn Guo { .compatible = "fsl,imx1-uart", .data = &imx_uart_devdata[IMX1_UART], }, 24922698aa2SShawn Guo { .compatible = "fsl,imx21-uart", .data = &imx_uart_devdata[IMX21_UART], }, 25022698aa2SShawn Guo { /* sentinel */ } 25122698aa2SShawn Guo }; 25222698aa2SShawn Guo MODULE_DEVICE_TABLE(of, imx_uart_dt_ids); 25322698aa2SShawn Guo 254fe6b540aSShawn Guo static inline unsigned uts_reg(struct imx_port *sport) 255fe6b540aSShawn Guo { 256fe6b540aSShawn Guo return sport->devdata->uts_reg; 257fe6b540aSShawn Guo } 258fe6b540aSShawn Guo 259fe6b540aSShawn Guo static inline int is_imx1_uart(struct imx_port *sport) 260fe6b540aSShawn Guo { 261fe6b540aSShawn Guo return sport->devdata->devtype == IMX1_UART; 262fe6b540aSShawn Guo } 263fe6b540aSShawn Guo 264fe6b540aSShawn Guo static inline int is_imx21_uart(struct imx_port *sport) 265fe6b540aSShawn Guo { 266fe6b540aSShawn Guo return sport->devdata->devtype == IMX21_UART; 267fe6b540aSShawn Guo } 268fe6b540aSShawn Guo 269ab4382d2SGreg Kroah-Hartman /* 2700ad5a814SDirk Behme * Save and restore functions for UCR1, UCR2 and UCR3 registers 2710ad5a814SDirk Behme */ 2720ad5a814SDirk Behme static void imx_port_ucrs_save(struct uart_port *port, 2730ad5a814SDirk Behme struct imx_port_ucrs *ucr) 2740ad5a814SDirk Behme { 2750ad5a814SDirk Behme /* save control registers */ 2760ad5a814SDirk Behme ucr->ucr1 = readl(port->membase + UCR1); 2770ad5a814SDirk Behme ucr->ucr2 = readl(port->membase + UCR2); 2780ad5a814SDirk Behme ucr->ucr3 = readl(port->membase + UCR3); 2790ad5a814SDirk Behme } 2800ad5a814SDirk Behme 2810ad5a814SDirk Behme static void imx_port_ucrs_restore(struct uart_port *port, 2820ad5a814SDirk Behme struct imx_port_ucrs *ucr) 2830ad5a814SDirk Behme { 2840ad5a814SDirk Behme /* restore control registers */ 2850ad5a814SDirk Behme writel(ucr->ucr1, port->membase + UCR1); 2860ad5a814SDirk Behme writel(ucr->ucr2, port->membase + UCR2); 2870ad5a814SDirk Behme writel(ucr->ucr3, port->membase + UCR3); 2880ad5a814SDirk Behme } 2890ad5a814SDirk Behme 2900ad5a814SDirk Behme /* 291ab4382d2SGreg Kroah-Hartman * Handle any change of modem status signal since we were last called. 292ab4382d2SGreg Kroah-Hartman */ 293ab4382d2SGreg Kroah-Hartman static void imx_mctrl_check(struct imx_port *sport) 294ab4382d2SGreg Kroah-Hartman { 295ab4382d2SGreg Kroah-Hartman unsigned int status, changed; 296ab4382d2SGreg Kroah-Hartman 297ab4382d2SGreg Kroah-Hartman status = sport->port.ops->get_mctrl(&sport->port); 298ab4382d2SGreg Kroah-Hartman changed = status ^ sport->old_status; 299ab4382d2SGreg Kroah-Hartman 300ab4382d2SGreg Kroah-Hartman if (changed == 0) 301ab4382d2SGreg Kroah-Hartman return; 302ab4382d2SGreg Kroah-Hartman 303ab4382d2SGreg Kroah-Hartman sport->old_status = status; 304ab4382d2SGreg Kroah-Hartman 305ab4382d2SGreg Kroah-Hartman if (changed & TIOCM_RI) 306ab4382d2SGreg Kroah-Hartman sport->port.icount.rng++; 307ab4382d2SGreg Kroah-Hartman if (changed & TIOCM_DSR) 308ab4382d2SGreg Kroah-Hartman sport->port.icount.dsr++; 309ab4382d2SGreg Kroah-Hartman if (changed & TIOCM_CAR) 310ab4382d2SGreg Kroah-Hartman uart_handle_dcd_change(&sport->port, status & TIOCM_CAR); 311ab4382d2SGreg Kroah-Hartman if (changed & TIOCM_CTS) 312ab4382d2SGreg Kroah-Hartman uart_handle_cts_change(&sport->port, status & TIOCM_CTS); 313ab4382d2SGreg Kroah-Hartman 314ab4382d2SGreg Kroah-Hartman wake_up_interruptible(&sport->port.state->port.delta_msr_wait); 315ab4382d2SGreg Kroah-Hartman } 316ab4382d2SGreg Kroah-Hartman 317ab4382d2SGreg Kroah-Hartman /* 318ab4382d2SGreg Kroah-Hartman * This is our per-port timeout handler, for checking the 319ab4382d2SGreg Kroah-Hartman * modem status signals. 320ab4382d2SGreg Kroah-Hartman */ 321ab4382d2SGreg Kroah-Hartman static void imx_timeout(unsigned long data) 322ab4382d2SGreg Kroah-Hartman { 323ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)data; 324ab4382d2SGreg Kroah-Hartman unsigned long flags; 325ab4382d2SGreg Kroah-Hartman 326ab4382d2SGreg Kroah-Hartman if (sport->port.state) { 327ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&sport->port.lock, flags); 328ab4382d2SGreg Kroah-Hartman imx_mctrl_check(sport); 329ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&sport->port.lock, flags); 330ab4382d2SGreg Kroah-Hartman 331ab4382d2SGreg Kroah-Hartman mod_timer(&sport->timer, jiffies + MCTRL_TIMEOUT); 332ab4382d2SGreg Kroah-Hartman } 333ab4382d2SGreg Kroah-Hartman } 334ab4382d2SGreg Kroah-Hartman 335ab4382d2SGreg Kroah-Hartman /* 336ab4382d2SGreg Kroah-Hartman * interrupts disabled on entry 337ab4382d2SGreg Kroah-Hartman */ 338ab4382d2SGreg Kroah-Hartman static void imx_stop_tx(struct uart_port *port) 339ab4382d2SGreg Kroah-Hartman { 340ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 341ab4382d2SGreg Kroah-Hartman unsigned long temp; 342ab4382d2SGreg Kroah-Hartman 343ab4382d2SGreg Kroah-Hartman if (USE_IRDA(sport)) { 344ab4382d2SGreg Kroah-Hartman /* half duplex - wait for end of transmission */ 345ab4382d2SGreg Kroah-Hartman int n = 256; 346ab4382d2SGreg Kroah-Hartman while ((--n > 0) && 347ab4382d2SGreg Kroah-Hartman !(readl(sport->port.membase + USR2) & USR2_TXDC)) { 348ab4382d2SGreg Kroah-Hartman udelay(5); 349ab4382d2SGreg Kroah-Hartman barrier(); 350ab4382d2SGreg Kroah-Hartman } 351ab4382d2SGreg Kroah-Hartman /* 352ab4382d2SGreg Kroah-Hartman * irda transceiver - wait a bit more to avoid 353ab4382d2SGreg Kroah-Hartman * cutoff, hardware dependent 354ab4382d2SGreg Kroah-Hartman */ 355ab4382d2SGreg Kroah-Hartman udelay(sport->trcv_delay); 356ab4382d2SGreg Kroah-Hartman 357ab4382d2SGreg Kroah-Hartman /* 358ab4382d2SGreg Kroah-Hartman * half duplex - reactivate receive mode, 359ab4382d2SGreg Kroah-Hartman * flush receive pipe echo crap 360ab4382d2SGreg Kroah-Hartman */ 361ab4382d2SGreg Kroah-Hartman if (readl(sport->port.membase + USR2) & USR2_TXDC) { 362ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR1); 363ab4382d2SGreg Kroah-Hartman temp &= ~(UCR1_TXMPTYEN | UCR1_TRDYEN); 364ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR1); 365ab4382d2SGreg Kroah-Hartman 366ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR4); 367ab4382d2SGreg Kroah-Hartman temp &= ~(UCR4_TCEN); 368ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR4); 369ab4382d2SGreg Kroah-Hartman 370ab4382d2SGreg Kroah-Hartman while (readl(sport->port.membase + URXD0) & 371ab4382d2SGreg Kroah-Hartman URXD_CHARRDY) 372ab4382d2SGreg Kroah-Hartman barrier(); 373ab4382d2SGreg Kroah-Hartman 374ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR1); 375ab4382d2SGreg Kroah-Hartman temp |= UCR1_RRDYEN; 376ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR1); 377ab4382d2SGreg Kroah-Hartman 378ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR4); 379ab4382d2SGreg Kroah-Hartman temp |= UCR4_DREN; 380ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR4); 381ab4382d2SGreg Kroah-Hartman } 382ab4382d2SGreg Kroah-Hartman return; 383ab4382d2SGreg Kroah-Hartman } 384ab4382d2SGreg Kroah-Hartman 385ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR1); 386ab4382d2SGreg Kroah-Hartman writel(temp & ~UCR1_TXMPTYEN, sport->port.membase + UCR1); 387ab4382d2SGreg Kroah-Hartman } 388ab4382d2SGreg Kroah-Hartman 389ab4382d2SGreg Kroah-Hartman /* 390ab4382d2SGreg Kroah-Hartman * interrupts disabled on entry 391ab4382d2SGreg Kroah-Hartman */ 392ab4382d2SGreg Kroah-Hartman static void imx_stop_rx(struct uart_port *port) 393ab4382d2SGreg Kroah-Hartman { 394ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 395ab4382d2SGreg Kroah-Hartman unsigned long temp; 396ab4382d2SGreg Kroah-Hartman 397ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR2); 398ab4382d2SGreg Kroah-Hartman writel(temp &~ UCR2_RXEN, sport->port.membase + UCR2); 399ab4382d2SGreg Kroah-Hartman } 400ab4382d2SGreg Kroah-Hartman 401ab4382d2SGreg Kroah-Hartman /* 402ab4382d2SGreg Kroah-Hartman * Set the modem control timer to fire immediately. 403ab4382d2SGreg Kroah-Hartman */ 404ab4382d2SGreg Kroah-Hartman static void imx_enable_ms(struct uart_port *port) 405ab4382d2SGreg Kroah-Hartman { 406ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 407ab4382d2SGreg Kroah-Hartman 408ab4382d2SGreg Kroah-Hartman mod_timer(&sport->timer, jiffies); 409ab4382d2SGreg Kroah-Hartman } 410ab4382d2SGreg Kroah-Hartman 411ab4382d2SGreg Kroah-Hartman static inline void imx_transmit_buffer(struct imx_port *sport) 412ab4382d2SGreg Kroah-Hartman { 413ab4382d2SGreg Kroah-Hartman struct circ_buf *xmit = &sport->port.state->xmit; 414ab4382d2SGreg Kroah-Hartman 415ab4382d2SGreg Kroah-Hartman while (!uart_circ_empty(xmit) && 416fe6b540aSShawn Guo !(readl(sport->port.membase + uts_reg(sport)) 417fe6b540aSShawn Guo & UTS_TXFULL)) { 418ab4382d2SGreg Kroah-Hartman /* send xmit->buf[xmit->tail] 419ab4382d2SGreg Kroah-Hartman * out the port here */ 420ab4382d2SGreg Kroah-Hartman writel(xmit->buf[xmit->tail], sport->port.membase + URTX0); 421ab4382d2SGreg Kroah-Hartman xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 422ab4382d2SGreg Kroah-Hartman sport->port.icount.tx++; 423ab4382d2SGreg Kroah-Hartman } 424ab4382d2SGreg Kroah-Hartman 425ab4382d2SGreg Kroah-Hartman if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 426ab4382d2SGreg Kroah-Hartman uart_write_wakeup(&sport->port); 427ab4382d2SGreg Kroah-Hartman 428ab4382d2SGreg Kroah-Hartman if (uart_circ_empty(xmit)) 429ab4382d2SGreg Kroah-Hartman imx_stop_tx(&sport->port); 430ab4382d2SGreg Kroah-Hartman } 431ab4382d2SGreg Kroah-Hartman 432ab4382d2SGreg Kroah-Hartman /* 433ab4382d2SGreg Kroah-Hartman * interrupts disabled on entry 434ab4382d2SGreg Kroah-Hartman */ 435ab4382d2SGreg Kroah-Hartman static void imx_start_tx(struct uart_port *port) 436ab4382d2SGreg Kroah-Hartman { 437ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 438ab4382d2SGreg Kroah-Hartman unsigned long temp; 439ab4382d2SGreg Kroah-Hartman 440ab4382d2SGreg Kroah-Hartman if (USE_IRDA(sport)) { 441ab4382d2SGreg Kroah-Hartman /* half duplex in IrDA mode; have to disable receive mode */ 442ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR4); 443ab4382d2SGreg Kroah-Hartman temp &= ~(UCR4_DREN); 444ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR4); 445ab4382d2SGreg Kroah-Hartman 446ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR1); 447ab4382d2SGreg Kroah-Hartman temp &= ~(UCR1_RRDYEN); 448ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR1); 449ab4382d2SGreg Kroah-Hartman } 450ab4382d2SGreg Kroah-Hartman 451ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR1); 452ab4382d2SGreg Kroah-Hartman writel(temp | UCR1_TXMPTYEN, sport->port.membase + UCR1); 453ab4382d2SGreg Kroah-Hartman 454ab4382d2SGreg Kroah-Hartman if (USE_IRDA(sport)) { 455ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR1); 456ab4382d2SGreg Kroah-Hartman temp |= UCR1_TRDYEN; 457ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR1); 458ab4382d2SGreg Kroah-Hartman 459ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR4); 460ab4382d2SGreg Kroah-Hartman temp |= UCR4_TCEN; 461ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR4); 462ab4382d2SGreg Kroah-Hartman } 463ab4382d2SGreg Kroah-Hartman 464fe6b540aSShawn Guo if (readl(sport->port.membase + uts_reg(sport)) & UTS_TXEMPTY) 465ab4382d2SGreg Kroah-Hartman imx_transmit_buffer(sport); 466ab4382d2SGreg Kroah-Hartman } 467ab4382d2SGreg Kroah-Hartman 468ab4382d2SGreg Kroah-Hartman static irqreturn_t imx_rtsint(int irq, void *dev_id) 469ab4382d2SGreg Kroah-Hartman { 470ab4382d2SGreg Kroah-Hartman struct imx_port *sport = dev_id; 4715680e941SUwe Kleine-König unsigned int val; 472ab4382d2SGreg Kroah-Hartman unsigned long flags; 473ab4382d2SGreg Kroah-Hartman 474ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&sport->port.lock, flags); 475ab4382d2SGreg Kroah-Hartman 476ab4382d2SGreg Kroah-Hartman writel(USR1_RTSD, sport->port.membase + USR1); 4775680e941SUwe Kleine-König val = readl(sport->port.membase + USR1) & USR1_RTSS; 478ab4382d2SGreg Kroah-Hartman uart_handle_cts_change(&sport->port, !!val); 479ab4382d2SGreg Kroah-Hartman wake_up_interruptible(&sport->port.state->port.delta_msr_wait); 480ab4382d2SGreg Kroah-Hartman 481ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&sport->port.lock, flags); 482ab4382d2SGreg Kroah-Hartman return IRQ_HANDLED; 483ab4382d2SGreg Kroah-Hartman } 484ab4382d2SGreg Kroah-Hartman 485ab4382d2SGreg Kroah-Hartman static irqreturn_t imx_txint(int irq, void *dev_id) 486ab4382d2SGreg Kroah-Hartman { 487ab4382d2SGreg Kroah-Hartman struct imx_port *sport = dev_id; 488ab4382d2SGreg Kroah-Hartman struct circ_buf *xmit = &sport->port.state->xmit; 489ab4382d2SGreg Kroah-Hartman unsigned long flags; 490ab4382d2SGreg Kroah-Hartman 491ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&sport->port.lock,flags); 492ab4382d2SGreg Kroah-Hartman if (sport->port.x_char) 493ab4382d2SGreg Kroah-Hartman { 494ab4382d2SGreg Kroah-Hartman /* Send next char */ 495ab4382d2SGreg Kroah-Hartman writel(sport->port.x_char, sport->port.membase + URTX0); 496ab4382d2SGreg Kroah-Hartman goto out; 497ab4382d2SGreg Kroah-Hartman } 498ab4382d2SGreg Kroah-Hartman 499ab4382d2SGreg Kroah-Hartman if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) { 500ab4382d2SGreg Kroah-Hartman imx_stop_tx(&sport->port); 501ab4382d2SGreg Kroah-Hartman goto out; 502ab4382d2SGreg Kroah-Hartman } 503ab4382d2SGreg Kroah-Hartman 504ab4382d2SGreg Kroah-Hartman imx_transmit_buffer(sport); 505ab4382d2SGreg Kroah-Hartman 506ab4382d2SGreg Kroah-Hartman if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 507ab4382d2SGreg Kroah-Hartman uart_write_wakeup(&sport->port); 508ab4382d2SGreg Kroah-Hartman 509ab4382d2SGreg Kroah-Hartman out: 510ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&sport->port.lock,flags); 511ab4382d2SGreg Kroah-Hartman return IRQ_HANDLED; 512ab4382d2SGreg Kroah-Hartman } 513ab4382d2SGreg Kroah-Hartman 514ab4382d2SGreg Kroah-Hartman static irqreturn_t imx_rxint(int irq, void *dev_id) 515ab4382d2SGreg Kroah-Hartman { 516ab4382d2SGreg Kroah-Hartman struct imx_port *sport = dev_id; 517ab4382d2SGreg Kroah-Hartman unsigned int rx,flg,ignored = 0; 518ab4382d2SGreg Kroah-Hartman struct tty_struct *tty = sport->port.state->port.tty; 519ab4382d2SGreg Kroah-Hartman unsigned long flags, temp; 520ab4382d2SGreg Kroah-Hartman 521ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&sport->port.lock,flags); 522ab4382d2SGreg Kroah-Hartman 523ab4382d2SGreg Kroah-Hartman while (readl(sport->port.membase + USR2) & USR2_RDR) { 524ab4382d2SGreg Kroah-Hartman flg = TTY_NORMAL; 525ab4382d2SGreg Kroah-Hartman sport->port.icount.rx++; 526ab4382d2SGreg Kroah-Hartman 527ab4382d2SGreg Kroah-Hartman rx = readl(sport->port.membase + URXD0); 528ab4382d2SGreg Kroah-Hartman 529ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + USR2); 530ab4382d2SGreg Kroah-Hartman if (temp & USR2_BRCD) { 531ab4382d2SGreg Kroah-Hartman writel(USR2_BRCD, sport->port.membase + USR2); 532ab4382d2SGreg Kroah-Hartman if (uart_handle_break(&sport->port)) 533ab4382d2SGreg Kroah-Hartman continue; 534ab4382d2SGreg Kroah-Hartman } 535ab4382d2SGreg Kroah-Hartman 536ab4382d2SGreg Kroah-Hartman if (uart_handle_sysrq_char(&sport->port, (unsigned char)rx)) 537ab4382d2SGreg Kroah-Hartman continue; 538ab4382d2SGreg Kroah-Hartman 539019dc9eaSHui Wang if (unlikely(rx & URXD_ERR)) { 540019dc9eaSHui Wang if (rx & URXD_BRK) 541019dc9eaSHui Wang sport->port.icount.brk++; 542019dc9eaSHui Wang else if (rx & URXD_PRERR) 543ab4382d2SGreg Kroah-Hartman sport->port.icount.parity++; 544ab4382d2SGreg Kroah-Hartman else if (rx & URXD_FRMERR) 545ab4382d2SGreg Kroah-Hartman sport->port.icount.frame++; 546ab4382d2SGreg Kroah-Hartman if (rx & URXD_OVRRUN) 547ab4382d2SGreg Kroah-Hartman sport->port.icount.overrun++; 548ab4382d2SGreg Kroah-Hartman 549ab4382d2SGreg Kroah-Hartman if (rx & sport->port.ignore_status_mask) { 550ab4382d2SGreg Kroah-Hartman if (++ignored > 100) 551ab4382d2SGreg Kroah-Hartman goto out; 552ab4382d2SGreg Kroah-Hartman continue; 553ab4382d2SGreg Kroah-Hartman } 554ab4382d2SGreg Kroah-Hartman 555ab4382d2SGreg Kroah-Hartman rx &= sport->port.read_status_mask; 556ab4382d2SGreg Kroah-Hartman 557019dc9eaSHui Wang if (rx & URXD_BRK) 558019dc9eaSHui Wang flg = TTY_BREAK; 559019dc9eaSHui Wang else if (rx & URXD_PRERR) 560ab4382d2SGreg Kroah-Hartman flg = TTY_PARITY; 561ab4382d2SGreg Kroah-Hartman else if (rx & URXD_FRMERR) 562ab4382d2SGreg Kroah-Hartman flg = TTY_FRAME; 563ab4382d2SGreg Kroah-Hartman if (rx & URXD_OVRRUN) 564ab4382d2SGreg Kroah-Hartman flg = TTY_OVERRUN; 565ab4382d2SGreg Kroah-Hartman 566ab4382d2SGreg Kroah-Hartman #ifdef SUPPORT_SYSRQ 567ab4382d2SGreg Kroah-Hartman sport->port.sysrq = 0; 568ab4382d2SGreg Kroah-Hartman #endif 569ab4382d2SGreg Kroah-Hartman } 570ab4382d2SGreg Kroah-Hartman 571ab4382d2SGreg Kroah-Hartman tty_insert_flip_char(tty, rx, flg); 572ab4382d2SGreg Kroah-Hartman } 573ab4382d2SGreg Kroah-Hartman 574ab4382d2SGreg Kroah-Hartman out: 575ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&sport->port.lock,flags); 576ab4382d2SGreg Kroah-Hartman tty_flip_buffer_push(tty); 577ab4382d2SGreg Kroah-Hartman return IRQ_HANDLED; 578ab4382d2SGreg Kroah-Hartman } 579ab4382d2SGreg Kroah-Hartman 580ab4382d2SGreg Kroah-Hartman static irqreturn_t imx_int(int irq, void *dev_id) 581ab4382d2SGreg Kroah-Hartman { 582ab4382d2SGreg Kroah-Hartman struct imx_port *sport = dev_id; 583ab4382d2SGreg Kroah-Hartman unsigned int sts; 584ab4382d2SGreg Kroah-Hartman 585ab4382d2SGreg Kroah-Hartman sts = readl(sport->port.membase + USR1); 586ab4382d2SGreg Kroah-Hartman 587ab4382d2SGreg Kroah-Hartman if (sts & USR1_RRDY) 588ab4382d2SGreg Kroah-Hartman imx_rxint(irq, dev_id); 589ab4382d2SGreg Kroah-Hartman 590ab4382d2SGreg Kroah-Hartman if (sts & USR1_TRDY && 591ab4382d2SGreg Kroah-Hartman readl(sport->port.membase + UCR1) & UCR1_TXMPTYEN) 592ab4382d2SGreg Kroah-Hartman imx_txint(irq, dev_id); 593ab4382d2SGreg Kroah-Hartman 594ab4382d2SGreg Kroah-Hartman if (sts & USR1_RTSD) 595ab4382d2SGreg Kroah-Hartman imx_rtsint(irq, dev_id); 596ab4382d2SGreg Kroah-Hartman 597db1a9b55SFabio Estevam if (sts & USR1_AWAKE) 598db1a9b55SFabio Estevam writel(USR1_AWAKE, sport->port.membase + USR1); 599db1a9b55SFabio Estevam 600ab4382d2SGreg Kroah-Hartman return IRQ_HANDLED; 601ab4382d2SGreg Kroah-Hartman } 602ab4382d2SGreg Kroah-Hartman 603ab4382d2SGreg Kroah-Hartman /* 604ab4382d2SGreg Kroah-Hartman * Return TIOCSER_TEMT when transmitter is not busy. 605ab4382d2SGreg Kroah-Hartman */ 606ab4382d2SGreg Kroah-Hartman static unsigned int imx_tx_empty(struct uart_port *port) 607ab4382d2SGreg Kroah-Hartman { 608ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 609ab4382d2SGreg Kroah-Hartman 610ab4382d2SGreg Kroah-Hartman return (readl(sport->port.membase + USR2) & USR2_TXDC) ? TIOCSER_TEMT : 0; 611ab4382d2SGreg Kroah-Hartman } 612ab4382d2SGreg Kroah-Hartman 613ab4382d2SGreg Kroah-Hartman /* 614ab4382d2SGreg Kroah-Hartman * We have a modem side uart, so the meanings of RTS and CTS are inverted. 615ab4382d2SGreg Kroah-Hartman */ 616ab4382d2SGreg Kroah-Hartman static unsigned int imx_get_mctrl(struct uart_port *port) 617ab4382d2SGreg Kroah-Hartman { 618ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 619ab4382d2SGreg Kroah-Hartman unsigned int tmp = TIOCM_DSR | TIOCM_CAR; 620ab4382d2SGreg Kroah-Hartman 621ab4382d2SGreg Kroah-Hartman if (readl(sport->port.membase + USR1) & USR1_RTSS) 622ab4382d2SGreg Kroah-Hartman tmp |= TIOCM_CTS; 623ab4382d2SGreg Kroah-Hartman 624ab4382d2SGreg Kroah-Hartman if (readl(sport->port.membase + UCR2) & UCR2_CTS) 625ab4382d2SGreg Kroah-Hartman tmp |= TIOCM_RTS; 626ab4382d2SGreg Kroah-Hartman 627ab4382d2SGreg Kroah-Hartman return tmp; 628ab4382d2SGreg Kroah-Hartman } 629ab4382d2SGreg Kroah-Hartman 630ab4382d2SGreg Kroah-Hartman static void imx_set_mctrl(struct uart_port *port, unsigned int mctrl) 631ab4382d2SGreg Kroah-Hartman { 632ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 633ab4382d2SGreg Kroah-Hartman unsigned long temp; 634ab4382d2SGreg Kroah-Hartman 635ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR2) & ~UCR2_CTS; 636ab4382d2SGreg Kroah-Hartman 637ab4382d2SGreg Kroah-Hartman if (mctrl & TIOCM_RTS) 638ab4382d2SGreg Kroah-Hartman temp |= UCR2_CTS; 639ab4382d2SGreg Kroah-Hartman 640ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR2); 641ab4382d2SGreg Kroah-Hartman } 642ab4382d2SGreg Kroah-Hartman 643ab4382d2SGreg Kroah-Hartman /* 644ab4382d2SGreg Kroah-Hartman * Interrupts always disabled. 645ab4382d2SGreg Kroah-Hartman */ 646ab4382d2SGreg Kroah-Hartman static void imx_break_ctl(struct uart_port *port, int break_state) 647ab4382d2SGreg Kroah-Hartman { 648ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 649ab4382d2SGreg Kroah-Hartman unsigned long flags, temp; 650ab4382d2SGreg Kroah-Hartman 651ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&sport->port.lock, flags); 652ab4382d2SGreg Kroah-Hartman 653ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR1) & ~UCR1_SNDBRK; 654ab4382d2SGreg Kroah-Hartman 655ab4382d2SGreg Kroah-Hartman if ( break_state != 0 ) 656ab4382d2SGreg Kroah-Hartman temp |= UCR1_SNDBRK; 657ab4382d2SGreg Kroah-Hartman 658ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR1); 659ab4382d2SGreg Kroah-Hartman 660ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&sport->port.lock, flags); 661ab4382d2SGreg Kroah-Hartman } 662ab4382d2SGreg Kroah-Hartman 663ab4382d2SGreg Kroah-Hartman #define TXTL 2 /* reset default */ 664ab4382d2SGreg Kroah-Hartman #define RXTL 1 /* reset default */ 665ab4382d2SGreg Kroah-Hartman 666ab4382d2SGreg Kroah-Hartman static int imx_setup_ufcr(struct imx_port *sport, unsigned int mode) 667ab4382d2SGreg Kroah-Hartman { 668ab4382d2SGreg Kroah-Hartman unsigned int val; 669ab4382d2SGreg Kroah-Hartman unsigned int ufcr_rfdiv; 670ab4382d2SGreg Kroah-Hartman 671ab4382d2SGreg Kroah-Hartman /* set receiver / transmitter trigger level. 672ab4382d2SGreg Kroah-Hartman * RFDIV is set such way to satisfy requested uartclk value 673ab4382d2SGreg Kroah-Hartman */ 674ab4382d2SGreg Kroah-Hartman val = TXTL << 10 | RXTL; 675ab4382d2SGreg Kroah-Hartman ufcr_rfdiv = (clk_get_rate(sport->clk) + sport->port.uartclk / 2) 676ab4382d2SGreg Kroah-Hartman / sport->port.uartclk; 677ab4382d2SGreg Kroah-Hartman 678ab4382d2SGreg Kroah-Hartman if(!ufcr_rfdiv) 679ab4382d2SGreg Kroah-Hartman ufcr_rfdiv = 1; 680ab4382d2SGreg Kroah-Hartman 681ab4382d2SGreg Kroah-Hartman val |= UFCR_RFDIV_REG(ufcr_rfdiv); 682ab4382d2SGreg Kroah-Hartman 683ab4382d2SGreg Kroah-Hartman writel(val, sport->port.membase + UFCR); 684ab4382d2SGreg Kroah-Hartman 685ab4382d2SGreg Kroah-Hartman return 0; 686ab4382d2SGreg Kroah-Hartman } 687ab4382d2SGreg Kroah-Hartman 688ab4382d2SGreg Kroah-Hartman /* half the RX buffer size */ 689ab4382d2SGreg Kroah-Hartman #define CTSTL 16 690ab4382d2SGreg Kroah-Hartman 691ab4382d2SGreg Kroah-Hartman static int imx_startup(struct uart_port *port) 692ab4382d2SGreg Kroah-Hartman { 693ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 694ab4382d2SGreg Kroah-Hartman int retval; 695ab4382d2SGreg Kroah-Hartman unsigned long flags, temp; 696ab4382d2SGreg Kroah-Hartman 697ab4382d2SGreg Kroah-Hartman imx_setup_ufcr(sport, 0); 698ab4382d2SGreg Kroah-Hartman 699ab4382d2SGreg Kroah-Hartman /* disable the DREN bit (Data Ready interrupt enable) before 700ab4382d2SGreg Kroah-Hartman * requesting IRQs 701ab4382d2SGreg Kroah-Hartman */ 702ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR4); 703ab4382d2SGreg Kroah-Hartman 704ab4382d2SGreg Kroah-Hartman if (USE_IRDA(sport)) 705ab4382d2SGreg Kroah-Hartman temp |= UCR4_IRSC; 706ab4382d2SGreg Kroah-Hartman 707ab4382d2SGreg Kroah-Hartman /* set the trigger level for CTS */ 708ab4382d2SGreg Kroah-Hartman temp &= ~(UCR4_CTSTL_MASK<< UCR4_CTSTL_SHF); 709ab4382d2SGreg Kroah-Hartman temp |= CTSTL<< UCR4_CTSTL_SHF; 710ab4382d2SGreg Kroah-Hartman 711ab4382d2SGreg Kroah-Hartman writel(temp & ~UCR4_DREN, sport->port.membase + UCR4); 712ab4382d2SGreg Kroah-Hartman 713ab4382d2SGreg Kroah-Hartman if (USE_IRDA(sport)) { 714ab4382d2SGreg Kroah-Hartman /* reset fifo's and state machines */ 715ab4382d2SGreg Kroah-Hartman int i = 100; 716ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR2); 717ab4382d2SGreg Kroah-Hartman temp &= ~UCR2_SRST; 718ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR2); 719ab4382d2SGreg Kroah-Hartman while (!(readl(sport->port.membase + UCR2) & UCR2_SRST) && 720ab4382d2SGreg Kroah-Hartman (--i > 0)) { 721ab4382d2SGreg Kroah-Hartman udelay(1); 722ab4382d2SGreg Kroah-Hartman } 723ab4382d2SGreg Kroah-Hartman } 724ab4382d2SGreg Kroah-Hartman 725ab4382d2SGreg Kroah-Hartman /* 726ab4382d2SGreg Kroah-Hartman * Allocate the IRQ(s) i.MX1 has three interrupts whereas later 727ab4382d2SGreg Kroah-Hartman * chips only have one interrupt. 728ab4382d2SGreg Kroah-Hartman */ 729ab4382d2SGreg Kroah-Hartman if (sport->txirq > 0) { 730ab4382d2SGreg Kroah-Hartman retval = request_irq(sport->rxirq, imx_rxint, 0, 731ab4382d2SGreg Kroah-Hartman DRIVER_NAME, sport); 732ab4382d2SGreg Kroah-Hartman if (retval) 733ab4382d2SGreg Kroah-Hartman goto error_out1; 734ab4382d2SGreg Kroah-Hartman 735ab4382d2SGreg Kroah-Hartman retval = request_irq(sport->txirq, imx_txint, 0, 736ab4382d2SGreg Kroah-Hartman DRIVER_NAME, sport); 737ab4382d2SGreg Kroah-Hartman if (retval) 738ab4382d2SGreg Kroah-Hartman goto error_out2; 739ab4382d2SGreg Kroah-Hartman 740ab4382d2SGreg Kroah-Hartman /* do not use RTS IRQ on IrDA */ 741ab4382d2SGreg Kroah-Hartman if (!USE_IRDA(sport)) { 742ab4382d2SGreg Kroah-Hartman retval = request_irq(sport->rtsirq, imx_rtsint, 743ab4382d2SGreg Kroah-Hartman (sport->rtsirq < MAX_INTERNAL_IRQ) ? 0 : 744ab4382d2SGreg Kroah-Hartman IRQF_TRIGGER_FALLING | 745ab4382d2SGreg Kroah-Hartman IRQF_TRIGGER_RISING, 746ab4382d2SGreg Kroah-Hartman DRIVER_NAME, sport); 747ab4382d2SGreg Kroah-Hartman if (retval) 748ab4382d2SGreg Kroah-Hartman goto error_out3; 749ab4382d2SGreg Kroah-Hartman } 750ab4382d2SGreg Kroah-Hartman } else { 751ab4382d2SGreg Kroah-Hartman retval = request_irq(sport->port.irq, imx_int, 0, 752ab4382d2SGreg Kroah-Hartman DRIVER_NAME, sport); 753ab4382d2SGreg Kroah-Hartman if (retval) { 754ab4382d2SGreg Kroah-Hartman free_irq(sport->port.irq, sport); 755ab4382d2SGreg Kroah-Hartman goto error_out1; 756ab4382d2SGreg Kroah-Hartman } 757ab4382d2SGreg Kroah-Hartman } 758ab4382d2SGreg Kroah-Hartman 759ab4382d2SGreg Kroah-Hartman /* 760ab4382d2SGreg Kroah-Hartman * Finally, clear and enable interrupts 761ab4382d2SGreg Kroah-Hartman */ 762ab4382d2SGreg Kroah-Hartman writel(USR1_RTSD, sport->port.membase + USR1); 763ab4382d2SGreg Kroah-Hartman 764ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR1); 765ab4382d2SGreg Kroah-Hartman temp |= UCR1_RRDYEN | UCR1_RTSDEN | UCR1_UARTEN; 766ab4382d2SGreg Kroah-Hartman 767ab4382d2SGreg Kroah-Hartman if (USE_IRDA(sport)) { 768ab4382d2SGreg Kroah-Hartman temp |= UCR1_IREN; 769ab4382d2SGreg Kroah-Hartman temp &= ~(UCR1_RTSDEN); 770ab4382d2SGreg Kroah-Hartman } 771ab4382d2SGreg Kroah-Hartman 772ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR1); 773ab4382d2SGreg Kroah-Hartman 774ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR2); 775ab4382d2SGreg Kroah-Hartman temp |= (UCR2_RXEN | UCR2_TXEN); 776ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR2); 777ab4382d2SGreg Kroah-Hartman 778ab4382d2SGreg Kroah-Hartman if (USE_IRDA(sport)) { 779ab4382d2SGreg Kroah-Hartman /* clear RX-FIFO */ 780ab4382d2SGreg Kroah-Hartman int i = 64; 781ab4382d2SGreg Kroah-Hartman while ((--i > 0) && 782ab4382d2SGreg Kroah-Hartman (readl(sport->port.membase + URXD0) & URXD_CHARRDY)) { 783ab4382d2SGreg Kroah-Hartman barrier(); 784ab4382d2SGreg Kroah-Hartman } 785ab4382d2SGreg Kroah-Hartman } 786ab4382d2SGreg Kroah-Hartman 787fe6b540aSShawn Guo if (is_imx21_uart(sport)) { 788ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR3); 789fe6b540aSShawn Guo temp |= IMX21_UCR3_RXDMUXSEL; 790ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR3); 791ab4382d2SGreg Kroah-Hartman } 792ab4382d2SGreg Kroah-Hartman 793ab4382d2SGreg Kroah-Hartman if (USE_IRDA(sport)) { 794ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR4); 795ab4382d2SGreg Kroah-Hartman if (sport->irda_inv_rx) 796ab4382d2SGreg Kroah-Hartman temp |= UCR4_INVR; 797ab4382d2SGreg Kroah-Hartman else 798ab4382d2SGreg Kroah-Hartman temp &= ~(UCR4_INVR); 799ab4382d2SGreg Kroah-Hartman writel(temp | UCR4_DREN, sport->port.membase + UCR4); 800ab4382d2SGreg Kroah-Hartman 801ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR3); 802ab4382d2SGreg Kroah-Hartman if (sport->irda_inv_tx) 803ab4382d2SGreg Kroah-Hartman temp |= UCR3_INVT; 804ab4382d2SGreg Kroah-Hartman else 805ab4382d2SGreg Kroah-Hartman temp &= ~(UCR3_INVT); 806ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR3); 807ab4382d2SGreg Kroah-Hartman } 808ab4382d2SGreg Kroah-Hartman 809ab4382d2SGreg Kroah-Hartman /* 810ab4382d2SGreg Kroah-Hartman * Enable modem status interrupts 811ab4382d2SGreg Kroah-Hartman */ 812ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&sport->port.lock,flags); 813ab4382d2SGreg Kroah-Hartman imx_enable_ms(&sport->port); 814ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&sport->port.lock,flags); 815ab4382d2SGreg Kroah-Hartman 816ab4382d2SGreg Kroah-Hartman if (USE_IRDA(sport)) { 817ab4382d2SGreg Kroah-Hartman struct imxuart_platform_data *pdata; 818ab4382d2SGreg Kroah-Hartman pdata = sport->port.dev->platform_data; 819ab4382d2SGreg Kroah-Hartman sport->irda_inv_rx = pdata->irda_inv_rx; 820ab4382d2SGreg Kroah-Hartman sport->irda_inv_tx = pdata->irda_inv_tx; 821ab4382d2SGreg Kroah-Hartman sport->trcv_delay = pdata->transceiver_delay; 822ab4382d2SGreg Kroah-Hartman if (pdata->irda_enable) 823ab4382d2SGreg Kroah-Hartman pdata->irda_enable(1); 824ab4382d2SGreg Kroah-Hartman } 825ab4382d2SGreg Kroah-Hartman 826ab4382d2SGreg Kroah-Hartman return 0; 827ab4382d2SGreg Kroah-Hartman 828ab4382d2SGreg Kroah-Hartman error_out3: 829ab4382d2SGreg Kroah-Hartman if (sport->txirq) 830ab4382d2SGreg Kroah-Hartman free_irq(sport->txirq, sport); 831ab4382d2SGreg Kroah-Hartman error_out2: 832ab4382d2SGreg Kroah-Hartman if (sport->rxirq) 833ab4382d2SGreg Kroah-Hartman free_irq(sport->rxirq, sport); 834ab4382d2SGreg Kroah-Hartman error_out1: 835ab4382d2SGreg Kroah-Hartman return retval; 836ab4382d2SGreg Kroah-Hartman } 837ab4382d2SGreg Kroah-Hartman 838ab4382d2SGreg Kroah-Hartman static void imx_shutdown(struct uart_port *port) 839ab4382d2SGreg Kroah-Hartman { 840ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 841ab4382d2SGreg Kroah-Hartman unsigned long temp; 842ab4382d2SGreg Kroah-Hartman 843ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR2); 844ab4382d2SGreg Kroah-Hartman temp &= ~(UCR2_TXEN); 845ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR2); 846ab4382d2SGreg Kroah-Hartman 847ab4382d2SGreg Kroah-Hartman if (USE_IRDA(sport)) { 848ab4382d2SGreg Kroah-Hartman struct imxuart_platform_data *pdata; 849ab4382d2SGreg Kroah-Hartman pdata = sport->port.dev->platform_data; 850ab4382d2SGreg Kroah-Hartman if (pdata->irda_enable) 851ab4382d2SGreg Kroah-Hartman pdata->irda_enable(0); 852ab4382d2SGreg Kroah-Hartman } 853ab4382d2SGreg Kroah-Hartman 854ab4382d2SGreg Kroah-Hartman /* 855ab4382d2SGreg Kroah-Hartman * Stop our timer. 856ab4382d2SGreg Kroah-Hartman */ 857ab4382d2SGreg Kroah-Hartman del_timer_sync(&sport->timer); 858ab4382d2SGreg Kroah-Hartman 859ab4382d2SGreg Kroah-Hartman /* 860ab4382d2SGreg Kroah-Hartman * Free the interrupts 861ab4382d2SGreg Kroah-Hartman */ 862ab4382d2SGreg Kroah-Hartman if (sport->txirq > 0) { 863ab4382d2SGreg Kroah-Hartman if (!USE_IRDA(sport)) 864ab4382d2SGreg Kroah-Hartman free_irq(sport->rtsirq, sport); 865ab4382d2SGreg Kroah-Hartman free_irq(sport->txirq, sport); 866ab4382d2SGreg Kroah-Hartman free_irq(sport->rxirq, sport); 867ab4382d2SGreg Kroah-Hartman } else 868ab4382d2SGreg Kroah-Hartman free_irq(sport->port.irq, sport); 869ab4382d2SGreg Kroah-Hartman 870ab4382d2SGreg Kroah-Hartman /* 871ab4382d2SGreg Kroah-Hartman * Disable all interrupts, port and break condition. 872ab4382d2SGreg Kroah-Hartman */ 873ab4382d2SGreg Kroah-Hartman 874ab4382d2SGreg Kroah-Hartman temp = readl(sport->port.membase + UCR1); 875ab4382d2SGreg Kroah-Hartman temp &= ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN | UCR1_UARTEN); 876ab4382d2SGreg Kroah-Hartman if (USE_IRDA(sport)) 877ab4382d2SGreg Kroah-Hartman temp &= ~(UCR1_IREN); 878ab4382d2SGreg Kroah-Hartman 879ab4382d2SGreg Kroah-Hartman writel(temp, sport->port.membase + UCR1); 880ab4382d2SGreg Kroah-Hartman } 881ab4382d2SGreg Kroah-Hartman 882ab4382d2SGreg Kroah-Hartman static void 883ab4382d2SGreg Kroah-Hartman imx_set_termios(struct uart_port *port, struct ktermios *termios, 884ab4382d2SGreg Kroah-Hartman struct ktermios *old) 885ab4382d2SGreg Kroah-Hartman { 886ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 887ab4382d2SGreg Kroah-Hartman unsigned long flags; 888ab4382d2SGreg Kroah-Hartman unsigned int ucr2, old_ucr1, old_txrxen, baud, quot; 889ab4382d2SGreg Kroah-Hartman unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8; 890ab4382d2SGreg Kroah-Hartman unsigned int div, ufcr; 891ab4382d2SGreg Kroah-Hartman unsigned long num, denom; 892ab4382d2SGreg Kroah-Hartman uint64_t tdiv64; 893ab4382d2SGreg Kroah-Hartman 894ab4382d2SGreg Kroah-Hartman /* 895ab4382d2SGreg Kroah-Hartman * If we don't support modem control lines, don't allow 896ab4382d2SGreg Kroah-Hartman * these to be set. 897ab4382d2SGreg Kroah-Hartman */ 898ab4382d2SGreg Kroah-Hartman if (0) { 899ab4382d2SGreg Kroah-Hartman termios->c_cflag &= ~(HUPCL | CRTSCTS | CMSPAR); 900ab4382d2SGreg Kroah-Hartman termios->c_cflag |= CLOCAL; 901ab4382d2SGreg Kroah-Hartman } 902ab4382d2SGreg Kroah-Hartman 903ab4382d2SGreg Kroah-Hartman /* 904ab4382d2SGreg Kroah-Hartman * We only support CS7 and CS8. 905ab4382d2SGreg Kroah-Hartman */ 906ab4382d2SGreg Kroah-Hartman while ((termios->c_cflag & CSIZE) != CS7 && 907ab4382d2SGreg Kroah-Hartman (termios->c_cflag & CSIZE) != CS8) { 908ab4382d2SGreg Kroah-Hartman termios->c_cflag &= ~CSIZE; 909ab4382d2SGreg Kroah-Hartman termios->c_cflag |= old_csize; 910ab4382d2SGreg Kroah-Hartman old_csize = CS8; 911ab4382d2SGreg Kroah-Hartman } 912ab4382d2SGreg Kroah-Hartman 913ab4382d2SGreg Kroah-Hartman if ((termios->c_cflag & CSIZE) == CS8) 914ab4382d2SGreg Kroah-Hartman ucr2 = UCR2_WS | UCR2_SRST | UCR2_IRTS; 915ab4382d2SGreg Kroah-Hartman else 916ab4382d2SGreg Kroah-Hartman ucr2 = UCR2_SRST | UCR2_IRTS; 917ab4382d2SGreg Kroah-Hartman 918ab4382d2SGreg Kroah-Hartman if (termios->c_cflag & CRTSCTS) { 919ab4382d2SGreg Kroah-Hartman if( sport->have_rtscts ) { 920ab4382d2SGreg Kroah-Hartman ucr2 &= ~UCR2_IRTS; 921ab4382d2SGreg Kroah-Hartman ucr2 |= UCR2_CTSC; 922ab4382d2SGreg Kroah-Hartman } else { 923ab4382d2SGreg Kroah-Hartman termios->c_cflag &= ~CRTSCTS; 924ab4382d2SGreg Kroah-Hartman } 925ab4382d2SGreg Kroah-Hartman } 926ab4382d2SGreg Kroah-Hartman 927ab4382d2SGreg Kroah-Hartman if (termios->c_cflag & CSTOPB) 928ab4382d2SGreg Kroah-Hartman ucr2 |= UCR2_STPB; 929ab4382d2SGreg Kroah-Hartman if (termios->c_cflag & PARENB) { 930ab4382d2SGreg Kroah-Hartman ucr2 |= UCR2_PREN; 931ab4382d2SGreg Kroah-Hartman if (termios->c_cflag & PARODD) 932ab4382d2SGreg Kroah-Hartman ucr2 |= UCR2_PROE; 933ab4382d2SGreg Kroah-Hartman } 934ab4382d2SGreg Kroah-Hartman 935995234daSEric Miao del_timer_sync(&sport->timer); 936995234daSEric Miao 937ab4382d2SGreg Kroah-Hartman /* 938ab4382d2SGreg Kroah-Hartman * Ask the core to calculate the divisor for us. 939ab4382d2SGreg Kroah-Hartman */ 940ab4382d2SGreg Kroah-Hartman baud = uart_get_baud_rate(port, termios, old, 50, port->uartclk / 16); 941ab4382d2SGreg Kroah-Hartman quot = uart_get_divisor(port, baud); 942ab4382d2SGreg Kroah-Hartman 943ab4382d2SGreg Kroah-Hartman spin_lock_irqsave(&sport->port.lock, flags); 944ab4382d2SGreg Kroah-Hartman 945ab4382d2SGreg Kroah-Hartman sport->port.read_status_mask = 0; 946ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & INPCK) 947ab4382d2SGreg Kroah-Hartman sport->port.read_status_mask |= (URXD_FRMERR | URXD_PRERR); 948ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & (BRKINT | PARMRK)) 949ab4382d2SGreg Kroah-Hartman sport->port.read_status_mask |= URXD_BRK; 950ab4382d2SGreg Kroah-Hartman 951ab4382d2SGreg Kroah-Hartman /* 952ab4382d2SGreg Kroah-Hartman * Characters to ignore 953ab4382d2SGreg Kroah-Hartman */ 954ab4382d2SGreg Kroah-Hartman sport->port.ignore_status_mask = 0; 955ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IGNPAR) 956ab4382d2SGreg Kroah-Hartman sport->port.ignore_status_mask |= URXD_PRERR; 957ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IGNBRK) { 958ab4382d2SGreg Kroah-Hartman sport->port.ignore_status_mask |= URXD_BRK; 959ab4382d2SGreg Kroah-Hartman /* 960ab4382d2SGreg Kroah-Hartman * If we're ignoring parity and break indicators, 961ab4382d2SGreg Kroah-Hartman * ignore overruns too (for real raw support). 962ab4382d2SGreg Kroah-Hartman */ 963ab4382d2SGreg Kroah-Hartman if (termios->c_iflag & IGNPAR) 964ab4382d2SGreg Kroah-Hartman sport->port.ignore_status_mask |= URXD_OVRRUN; 965ab4382d2SGreg Kroah-Hartman } 966ab4382d2SGreg Kroah-Hartman 967ab4382d2SGreg Kroah-Hartman /* 968ab4382d2SGreg Kroah-Hartman * Update the per-port timeout. 969ab4382d2SGreg Kroah-Hartman */ 970ab4382d2SGreg Kroah-Hartman uart_update_timeout(port, termios->c_cflag, baud); 971ab4382d2SGreg Kroah-Hartman 972ab4382d2SGreg Kroah-Hartman /* 973ab4382d2SGreg Kroah-Hartman * disable interrupts and drain transmitter 974ab4382d2SGreg Kroah-Hartman */ 975ab4382d2SGreg Kroah-Hartman old_ucr1 = readl(sport->port.membase + UCR1); 976ab4382d2SGreg Kroah-Hartman writel(old_ucr1 & ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN), 977ab4382d2SGreg Kroah-Hartman sport->port.membase + UCR1); 978ab4382d2SGreg Kroah-Hartman 979ab4382d2SGreg Kroah-Hartman while ( !(readl(sport->port.membase + USR2) & USR2_TXDC)) 980ab4382d2SGreg Kroah-Hartman barrier(); 981ab4382d2SGreg Kroah-Hartman 982ab4382d2SGreg Kroah-Hartman /* then, disable everything */ 983ab4382d2SGreg Kroah-Hartman old_txrxen = readl(sport->port.membase + UCR2); 984ab4382d2SGreg Kroah-Hartman writel(old_txrxen & ~( UCR2_TXEN | UCR2_RXEN), 985ab4382d2SGreg Kroah-Hartman sport->port.membase + UCR2); 986ab4382d2SGreg Kroah-Hartman old_txrxen &= (UCR2_TXEN | UCR2_RXEN); 987ab4382d2SGreg Kroah-Hartman 988ab4382d2SGreg Kroah-Hartman if (USE_IRDA(sport)) { 989ab4382d2SGreg Kroah-Hartman /* 990ab4382d2SGreg Kroah-Hartman * use maximum available submodule frequency to 991ab4382d2SGreg Kroah-Hartman * avoid missing short pulses due to low sampling rate 992ab4382d2SGreg Kroah-Hartman */ 993ab4382d2SGreg Kroah-Hartman div = 1; 994ab4382d2SGreg Kroah-Hartman } else { 995ab4382d2SGreg Kroah-Hartman div = sport->port.uartclk / (baud * 16); 996ab4382d2SGreg Kroah-Hartman if (div > 7) 997ab4382d2SGreg Kroah-Hartman div = 7; 998ab4382d2SGreg Kroah-Hartman if (!div) 999ab4382d2SGreg Kroah-Hartman div = 1; 1000ab4382d2SGreg Kroah-Hartman } 1001ab4382d2SGreg Kroah-Hartman 1002ab4382d2SGreg Kroah-Hartman rational_best_approximation(16 * div * baud, sport->port.uartclk, 1003ab4382d2SGreg Kroah-Hartman 1 << 16, 1 << 16, &num, &denom); 1004ab4382d2SGreg Kroah-Hartman 1005ab4382d2SGreg Kroah-Hartman tdiv64 = sport->port.uartclk; 1006ab4382d2SGreg Kroah-Hartman tdiv64 *= num; 1007ab4382d2SGreg Kroah-Hartman do_div(tdiv64, denom * 16 * div); 1008ab4382d2SGreg Kroah-Hartman tty_termios_encode_baud_rate(termios, 1009ab4382d2SGreg Kroah-Hartman (speed_t)tdiv64, (speed_t)tdiv64); 1010ab4382d2SGreg Kroah-Hartman 1011ab4382d2SGreg Kroah-Hartman num -= 1; 1012ab4382d2SGreg Kroah-Hartman denom -= 1; 1013ab4382d2SGreg Kroah-Hartman 1014ab4382d2SGreg Kroah-Hartman ufcr = readl(sport->port.membase + UFCR); 1015ab4382d2SGreg Kroah-Hartman ufcr = (ufcr & (~UFCR_RFDIV)) | UFCR_RFDIV_REG(div); 1016ab4382d2SGreg Kroah-Hartman writel(ufcr, sport->port.membase + UFCR); 1017ab4382d2SGreg Kroah-Hartman 1018ab4382d2SGreg Kroah-Hartman writel(num, sport->port.membase + UBIR); 1019ab4382d2SGreg Kroah-Hartman writel(denom, sport->port.membase + UBMR); 1020ab4382d2SGreg Kroah-Hartman 1021fe6b540aSShawn Guo if (is_imx21_uart(sport)) 1022ab4382d2SGreg Kroah-Hartman writel(sport->port.uartclk / div / 1000, 1023fe6b540aSShawn Guo sport->port.membase + IMX21_ONEMS); 1024ab4382d2SGreg Kroah-Hartman 1025ab4382d2SGreg Kroah-Hartman writel(old_ucr1, sport->port.membase + UCR1); 1026ab4382d2SGreg Kroah-Hartman 1027ab4382d2SGreg Kroah-Hartman /* set the parity, stop bits and data size */ 1028ab4382d2SGreg Kroah-Hartman writel(ucr2 | old_txrxen, sport->port.membase + UCR2); 1029ab4382d2SGreg Kroah-Hartman 1030ab4382d2SGreg Kroah-Hartman if (UART_ENABLE_MS(&sport->port, termios->c_cflag)) 1031ab4382d2SGreg Kroah-Hartman imx_enable_ms(&sport->port); 1032ab4382d2SGreg Kroah-Hartman 1033ab4382d2SGreg Kroah-Hartman spin_unlock_irqrestore(&sport->port.lock, flags); 1034ab4382d2SGreg Kroah-Hartman } 1035ab4382d2SGreg Kroah-Hartman 1036ab4382d2SGreg Kroah-Hartman static const char *imx_type(struct uart_port *port) 1037ab4382d2SGreg Kroah-Hartman { 1038ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 1039ab4382d2SGreg Kroah-Hartman 1040ab4382d2SGreg Kroah-Hartman return sport->port.type == PORT_IMX ? "IMX" : NULL; 1041ab4382d2SGreg Kroah-Hartman } 1042ab4382d2SGreg Kroah-Hartman 1043ab4382d2SGreg Kroah-Hartman /* 1044ab4382d2SGreg Kroah-Hartman * Release the memory region(s) being used by 'port'. 1045ab4382d2SGreg Kroah-Hartman */ 1046ab4382d2SGreg Kroah-Hartman static void imx_release_port(struct uart_port *port) 1047ab4382d2SGreg Kroah-Hartman { 1048ab4382d2SGreg Kroah-Hartman struct platform_device *pdev = to_platform_device(port->dev); 1049ab4382d2SGreg Kroah-Hartman struct resource *mmres; 1050ab4382d2SGreg Kroah-Hartman 1051ab4382d2SGreg Kroah-Hartman mmres = platform_get_resource(pdev, IORESOURCE_MEM, 0); 105228f65c11SJoe Perches release_mem_region(mmres->start, resource_size(mmres)); 1053ab4382d2SGreg Kroah-Hartman } 1054ab4382d2SGreg Kroah-Hartman 1055ab4382d2SGreg Kroah-Hartman /* 1056ab4382d2SGreg Kroah-Hartman * Request the memory region(s) being used by 'port'. 1057ab4382d2SGreg Kroah-Hartman */ 1058ab4382d2SGreg Kroah-Hartman static int imx_request_port(struct uart_port *port) 1059ab4382d2SGreg Kroah-Hartman { 1060ab4382d2SGreg Kroah-Hartman struct platform_device *pdev = to_platform_device(port->dev); 1061ab4382d2SGreg Kroah-Hartman struct resource *mmres; 1062ab4382d2SGreg Kroah-Hartman void *ret; 1063ab4382d2SGreg Kroah-Hartman 1064ab4382d2SGreg Kroah-Hartman mmres = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1065ab4382d2SGreg Kroah-Hartman if (!mmres) 1066ab4382d2SGreg Kroah-Hartman return -ENODEV; 1067ab4382d2SGreg Kroah-Hartman 106828f65c11SJoe Perches ret = request_mem_region(mmres->start, resource_size(mmres), "imx-uart"); 1069ab4382d2SGreg Kroah-Hartman 1070ab4382d2SGreg Kroah-Hartman return ret ? 0 : -EBUSY; 1071ab4382d2SGreg Kroah-Hartman } 1072ab4382d2SGreg Kroah-Hartman 1073ab4382d2SGreg Kroah-Hartman /* 1074ab4382d2SGreg Kroah-Hartman * Configure/autoconfigure the port. 1075ab4382d2SGreg Kroah-Hartman */ 1076ab4382d2SGreg Kroah-Hartman static void imx_config_port(struct uart_port *port, int flags) 1077ab4382d2SGreg Kroah-Hartman { 1078ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 1079ab4382d2SGreg Kroah-Hartman 1080ab4382d2SGreg Kroah-Hartman if (flags & UART_CONFIG_TYPE && 1081ab4382d2SGreg Kroah-Hartman imx_request_port(&sport->port) == 0) 1082ab4382d2SGreg Kroah-Hartman sport->port.type = PORT_IMX; 1083ab4382d2SGreg Kroah-Hartman } 1084ab4382d2SGreg Kroah-Hartman 1085ab4382d2SGreg Kroah-Hartman /* 1086ab4382d2SGreg Kroah-Hartman * Verify the new serial_struct (for TIOCSSERIAL). 1087ab4382d2SGreg Kroah-Hartman * The only change we allow are to the flags and type, and 1088ab4382d2SGreg Kroah-Hartman * even then only between PORT_IMX and PORT_UNKNOWN 1089ab4382d2SGreg Kroah-Hartman */ 1090ab4382d2SGreg Kroah-Hartman static int 1091ab4382d2SGreg Kroah-Hartman imx_verify_port(struct uart_port *port, struct serial_struct *ser) 1092ab4382d2SGreg Kroah-Hartman { 1093ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 1094ab4382d2SGreg Kroah-Hartman int ret = 0; 1095ab4382d2SGreg Kroah-Hartman 1096ab4382d2SGreg Kroah-Hartman if (ser->type != PORT_UNKNOWN && ser->type != PORT_IMX) 1097ab4382d2SGreg Kroah-Hartman ret = -EINVAL; 1098ab4382d2SGreg Kroah-Hartman if (sport->port.irq != ser->irq) 1099ab4382d2SGreg Kroah-Hartman ret = -EINVAL; 1100ab4382d2SGreg Kroah-Hartman if (ser->io_type != UPIO_MEM) 1101ab4382d2SGreg Kroah-Hartman ret = -EINVAL; 1102ab4382d2SGreg Kroah-Hartman if (sport->port.uartclk / 16 != ser->baud_base) 1103ab4382d2SGreg Kroah-Hartman ret = -EINVAL; 1104ab4382d2SGreg Kroah-Hartman if ((void *)sport->port.mapbase != ser->iomem_base) 1105ab4382d2SGreg Kroah-Hartman ret = -EINVAL; 1106ab4382d2SGreg Kroah-Hartman if (sport->port.iobase != ser->port) 1107ab4382d2SGreg Kroah-Hartman ret = -EINVAL; 1108ab4382d2SGreg Kroah-Hartman if (ser->hub6 != 0) 1109ab4382d2SGreg Kroah-Hartman ret = -EINVAL; 1110ab4382d2SGreg Kroah-Hartman return ret; 1111ab4382d2SGreg Kroah-Hartman } 1112ab4382d2SGreg Kroah-Hartman 111301f56abdSSaleem Abdulrasool #if defined(CONFIG_CONSOLE_POLL) 111401f56abdSSaleem Abdulrasool static int imx_poll_get_char(struct uart_port *port) 111501f56abdSSaleem Abdulrasool { 111601f56abdSSaleem Abdulrasool struct imx_port_ucrs old_ucr; 111701f56abdSSaleem Abdulrasool unsigned int status; 111801f56abdSSaleem Abdulrasool unsigned char c; 111901f56abdSSaleem Abdulrasool 112001f56abdSSaleem Abdulrasool /* save control registers */ 112101f56abdSSaleem Abdulrasool imx_port_ucrs_save(port, &old_ucr); 112201f56abdSSaleem Abdulrasool 112301f56abdSSaleem Abdulrasool /* disable interrupts */ 112401f56abdSSaleem Abdulrasool writel(UCR1_UARTEN, port->membase + UCR1); 112501f56abdSSaleem Abdulrasool writel(old_ucr.ucr2 & ~(UCR2_ATEN | UCR2_RTSEN | UCR2_ESCI), 112601f56abdSSaleem Abdulrasool port->membase + UCR2); 112701f56abdSSaleem Abdulrasool writel(old_ucr.ucr3 & ~(UCR3_DCD | UCR3_RI | UCR3_DTREN), 112801f56abdSSaleem Abdulrasool port->membase + UCR3); 112901f56abdSSaleem Abdulrasool 113001f56abdSSaleem Abdulrasool /* poll */ 113101f56abdSSaleem Abdulrasool do { 113201f56abdSSaleem Abdulrasool status = readl(port->membase + USR2); 113301f56abdSSaleem Abdulrasool } while (~status & USR2_RDR); 113401f56abdSSaleem Abdulrasool 113501f56abdSSaleem Abdulrasool /* read */ 113601f56abdSSaleem Abdulrasool c = readl(port->membase + URXD0); 113701f56abdSSaleem Abdulrasool 113801f56abdSSaleem Abdulrasool /* restore control registers */ 113901f56abdSSaleem Abdulrasool imx_port_ucrs_restore(port, &old_ucr); 114001f56abdSSaleem Abdulrasool 114101f56abdSSaleem Abdulrasool return c; 114201f56abdSSaleem Abdulrasool } 114301f56abdSSaleem Abdulrasool 114401f56abdSSaleem Abdulrasool static void imx_poll_put_char(struct uart_port *port, unsigned char c) 114501f56abdSSaleem Abdulrasool { 114601f56abdSSaleem Abdulrasool struct imx_port_ucrs old_ucr; 114701f56abdSSaleem Abdulrasool unsigned int status; 114801f56abdSSaleem Abdulrasool 114901f56abdSSaleem Abdulrasool /* save control registers */ 115001f56abdSSaleem Abdulrasool imx_port_ucrs_save(port, &old_ucr); 115101f56abdSSaleem Abdulrasool 115201f56abdSSaleem Abdulrasool /* disable interrupts */ 115301f56abdSSaleem Abdulrasool writel(UCR1_UARTEN, port->membase + UCR1); 115401f56abdSSaleem Abdulrasool writel(old_ucr.ucr2 & ~(UCR2_ATEN | UCR2_RTSEN | UCR2_ESCI), 115501f56abdSSaleem Abdulrasool port->membase + UCR2); 115601f56abdSSaleem Abdulrasool writel(old_ucr.ucr3 & ~(UCR3_DCD | UCR3_RI | UCR3_DTREN), 115701f56abdSSaleem Abdulrasool port->membase + UCR3); 115801f56abdSSaleem Abdulrasool 115901f56abdSSaleem Abdulrasool /* drain */ 116001f56abdSSaleem Abdulrasool do { 116101f56abdSSaleem Abdulrasool status = readl(port->membase + USR1); 116201f56abdSSaleem Abdulrasool } while (~status & USR1_TRDY); 116301f56abdSSaleem Abdulrasool 116401f56abdSSaleem Abdulrasool /* write */ 116501f56abdSSaleem Abdulrasool writel(c, port->membase + URTX0); 116601f56abdSSaleem Abdulrasool 116701f56abdSSaleem Abdulrasool /* flush */ 116801f56abdSSaleem Abdulrasool do { 116901f56abdSSaleem Abdulrasool status = readl(port->membase + USR2); 117001f56abdSSaleem Abdulrasool } while (~status & USR2_TXDC); 117101f56abdSSaleem Abdulrasool 117201f56abdSSaleem Abdulrasool /* restore control registers */ 117301f56abdSSaleem Abdulrasool imx_port_ucrs_restore(port, &old_ucr); 117401f56abdSSaleem Abdulrasool } 117501f56abdSSaleem Abdulrasool #endif 117601f56abdSSaleem Abdulrasool 1177ab4382d2SGreg Kroah-Hartman static struct uart_ops imx_pops = { 1178ab4382d2SGreg Kroah-Hartman .tx_empty = imx_tx_empty, 1179ab4382d2SGreg Kroah-Hartman .set_mctrl = imx_set_mctrl, 1180ab4382d2SGreg Kroah-Hartman .get_mctrl = imx_get_mctrl, 1181ab4382d2SGreg Kroah-Hartman .stop_tx = imx_stop_tx, 1182ab4382d2SGreg Kroah-Hartman .start_tx = imx_start_tx, 1183ab4382d2SGreg Kroah-Hartman .stop_rx = imx_stop_rx, 1184ab4382d2SGreg Kroah-Hartman .enable_ms = imx_enable_ms, 1185ab4382d2SGreg Kroah-Hartman .break_ctl = imx_break_ctl, 1186ab4382d2SGreg Kroah-Hartman .startup = imx_startup, 1187ab4382d2SGreg Kroah-Hartman .shutdown = imx_shutdown, 1188ab4382d2SGreg Kroah-Hartman .set_termios = imx_set_termios, 1189ab4382d2SGreg Kroah-Hartman .type = imx_type, 1190ab4382d2SGreg Kroah-Hartman .release_port = imx_release_port, 1191ab4382d2SGreg Kroah-Hartman .request_port = imx_request_port, 1192ab4382d2SGreg Kroah-Hartman .config_port = imx_config_port, 1193ab4382d2SGreg Kroah-Hartman .verify_port = imx_verify_port, 119401f56abdSSaleem Abdulrasool #if defined(CONFIG_CONSOLE_POLL) 119501f56abdSSaleem Abdulrasool .poll_get_char = imx_poll_get_char, 119601f56abdSSaleem Abdulrasool .poll_put_char = imx_poll_put_char, 119701f56abdSSaleem Abdulrasool #endif 1198ab4382d2SGreg Kroah-Hartman }; 1199ab4382d2SGreg Kroah-Hartman 1200ab4382d2SGreg Kroah-Hartman static struct imx_port *imx_ports[UART_NR]; 1201ab4382d2SGreg Kroah-Hartman 1202ab4382d2SGreg Kroah-Hartman #ifdef CONFIG_SERIAL_IMX_CONSOLE 1203ab4382d2SGreg Kroah-Hartman static void imx_console_putchar(struct uart_port *port, int ch) 1204ab4382d2SGreg Kroah-Hartman { 1205ab4382d2SGreg Kroah-Hartman struct imx_port *sport = (struct imx_port *)port; 1206ab4382d2SGreg Kroah-Hartman 1207fe6b540aSShawn Guo while (readl(sport->port.membase + uts_reg(sport)) & UTS_TXFULL) 1208ab4382d2SGreg Kroah-Hartman barrier(); 1209ab4382d2SGreg Kroah-Hartman 1210ab4382d2SGreg Kroah-Hartman writel(ch, sport->port.membase + URTX0); 1211ab4382d2SGreg Kroah-Hartman } 1212ab4382d2SGreg Kroah-Hartman 1213ab4382d2SGreg Kroah-Hartman /* 1214ab4382d2SGreg Kroah-Hartman * Interrupts are disabled on entering 1215ab4382d2SGreg Kroah-Hartman */ 1216ab4382d2SGreg Kroah-Hartman static void 1217ab4382d2SGreg Kroah-Hartman imx_console_write(struct console *co, const char *s, unsigned int count) 1218ab4382d2SGreg Kroah-Hartman { 1219ab4382d2SGreg Kroah-Hartman struct imx_port *sport = imx_ports[co->index]; 12200ad5a814SDirk Behme struct imx_port_ucrs old_ucr; 12210ad5a814SDirk Behme unsigned int ucr1; 1222ab4382d2SGreg Kroah-Hartman 1223ab4382d2SGreg Kroah-Hartman /* 12240ad5a814SDirk Behme * First, save UCR1/2/3 and then disable interrupts 1225ab4382d2SGreg Kroah-Hartman */ 12260ad5a814SDirk Behme imx_port_ucrs_save(&sport->port, &old_ucr); 12270ad5a814SDirk Behme ucr1 = old_ucr.ucr1; 1228ab4382d2SGreg Kroah-Hartman 1229fe6b540aSShawn Guo if (is_imx1_uart(sport)) 1230fe6b540aSShawn Guo ucr1 |= IMX1_UCR1_UARTCLKEN; 1231ab4382d2SGreg Kroah-Hartman ucr1 |= UCR1_UARTEN; 1232ab4382d2SGreg Kroah-Hartman ucr1 &= ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN); 1233ab4382d2SGreg Kroah-Hartman 1234ab4382d2SGreg Kroah-Hartman writel(ucr1, sport->port.membase + UCR1); 1235ab4382d2SGreg Kroah-Hartman 12360ad5a814SDirk Behme writel(old_ucr.ucr2 | UCR2_TXEN, sport->port.membase + UCR2); 1237ab4382d2SGreg Kroah-Hartman 1238ab4382d2SGreg Kroah-Hartman uart_console_write(&sport->port, s, count, imx_console_putchar); 1239ab4382d2SGreg Kroah-Hartman 1240ab4382d2SGreg Kroah-Hartman /* 1241ab4382d2SGreg Kroah-Hartman * Finally, wait for transmitter to become empty 12420ad5a814SDirk Behme * and restore UCR1/2/3 1243ab4382d2SGreg Kroah-Hartman */ 1244ab4382d2SGreg Kroah-Hartman while (!(readl(sport->port.membase + USR2) & USR2_TXDC)); 1245ab4382d2SGreg Kroah-Hartman 12460ad5a814SDirk Behme imx_port_ucrs_restore(&sport->port, &old_ucr); 1247ab4382d2SGreg Kroah-Hartman } 1248ab4382d2SGreg Kroah-Hartman 1249ab4382d2SGreg Kroah-Hartman /* 1250ab4382d2SGreg Kroah-Hartman * If the port was already initialised (eg, by a boot loader), 1251ab4382d2SGreg Kroah-Hartman * try to determine the current setup. 1252ab4382d2SGreg Kroah-Hartman */ 1253ab4382d2SGreg Kroah-Hartman static void __init 1254ab4382d2SGreg Kroah-Hartman imx_console_get_options(struct imx_port *sport, int *baud, 1255ab4382d2SGreg Kroah-Hartman int *parity, int *bits) 1256ab4382d2SGreg Kroah-Hartman { 1257ab4382d2SGreg Kroah-Hartman 1258ab4382d2SGreg Kroah-Hartman if (readl(sport->port.membase + UCR1) & UCR1_UARTEN) { 1259ab4382d2SGreg Kroah-Hartman /* ok, the port was enabled */ 1260ab4382d2SGreg Kroah-Hartman unsigned int ucr2, ubir,ubmr, uartclk; 1261ab4382d2SGreg Kroah-Hartman unsigned int baud_raw; 1262ab4382d2SGreg Kroah-Hartman unsigned int ucfr_rfdiv; 1263ab4382d2SGreg Kroah-Hartman 1264ab4382d2SGreg Kroah-Hartman ucr2 = readl(sport->port.membase + UCR2); 1265ab4382d2SGreg Kroah-Hartman 1266ab4382d2SGreg Kroah-Hartman *parity = 'n'; 1267ab4382d2SGreg Kroah-Hartman if (ucr2 & UCR2_PREN) { 1268ab4382d2SGreg Kroah-Hartman if (ucr2 & UCR2_PROE) 1269ab4382d2SGreg Kroah-Hartman *parity = 'o'; 1270ab4382d2SGreg Kroah-Hartman else 1271ab4382d2SGreg Kroah-Hartman *parity = 'e'; 1272ab4382d2SGreg Kroah-Hartman } 1273ab4382d2SGreg Kroah-Hartman 1274ab4382d2SGreg Kroah-Hartman if (ucr2 & UCR2_WS) 1275ab4382d2SGreg Kroah-Hartman *bits = 8; 1276ab4382d2SGreg Kroah-Hartman else 1277ab4382d2SGreg Kroah-Hartman *bits = 7; 1278ab4382d2SGreg Kroah-Hartman 1279ab4382d2SGreg Kroah-Hartman ubir = readl(sport->port.membase + UBIR) & 0xffff; 1280ab4382d2SGreg Kroah-Hartman ubmr = readl(sport->port.membase + UBMR) & 0xffff; 1281ab4382d2SGreg Kroah-Hartman 1282ab4382d2SGreg Kroah-Hartman ucfr_rfdiv = (readl(sport->port.membase + UFCR) & UFCR_RFDIV) >> 7; 1283ab4382d2SGreg Kroah-Hartman if (ucfr_rfdiv == 6) 1284ab4382d2SGreg Kroah-Hartman ucfr_rfdiv = 7; 1285ab4382d2SGreg Kroah-Hartman else 1286ab4382d2SGreg Kroah-Hartman ucfr_rfdiv = 6 - ucfr_rfdiv; 1287ab4382d2SGreg Kroah-Hartman 1288ab4382d2SGreg Kroah-Hartman uartclk = clk_get_rate(sport->clk); 1289ab4382d2SGreg Kroah-Hartman uartclk /= ucfr_rfdiv; 1290ab4382d2SGreg Kroah-Hartman 1291ab4382d2SGreg Kroah-Hartman { /* 1292ab4382d2SGreg Kroah-Hartman * The next code provides exact computation of 1293ab4382d2SGreg Kroah-Hartman * baud_raw = round(((uartclk/16) * (ubir + 1)) / (ubmr + 1)) 1294ab4382d2SGreg Kroah-Hartman * without need of float support or long long division, 1295ab4382d2SGreg Kroah-Hartman * which would be required to prevent 32bit arithmetic overflow 1296ab4382d2SGreg Kroah-Hartman */ 1297ab4382d2SGreg Kroah-Hartman unsigned int mul = ubir + 1; 1298ab4382d2SGreg Kroah-Hartman unsigned int div = 16 * (ubmr + 1); 1299ab4382d2SGreg Kroah-Hartman unsigned int rem = uartclk % div; 1300ab4382d2SGreg Kroah-Hartman 1301ab4382d2SGreg Kroah-Hartman baud_raw = (uartclk / div) * mul; 1302ab4382d2SGreg Kroah-Hartman baud_raw += (rem * mul + div / 2) / div; 1303ab4382d2SGreg Kroah-Hartman *baud = (baud_raw + 50) / 100 * 100; 1304ab4382d2SGreg Kroah-Hartman } 1305ab4382d2SGreg Kroah-Hartman 1306ab4382d2SGreg Kroah-Hartman if(*baud != baud_raw) 1307ab4382d2SGreg Kroah-Hartman printk(KERN_INFO "Serial: Console IMX rounded baud rate from %d to %d\n", 1308ab4382d2SGreg Kroah-Hartman baud_raw, *baud); 1309ab4382d2SGreg Kroah-Hartman } 1310ab4382d2SGreg Kroah-Hartman } 1311ab4382d2SGreg Kroah-Hartman 1312ab4382d2SGreg Kroah-Hartman static int __init 1313ab4382d2SGreg Kroah-Hartman imx_console_setup(struct console *co, char *options) 1314ab4382d2SGreg Kroah-Hartman { 1315ab4382d2SGreg Kroah-Hartman struct imx_port *sport; 1316ab4382d2SGreg Kroah-Hartman int baud = 9600; 1317ab4382d2SGreg Kroah-Hartman int bits = 8; 1318ab4382d2SGreg Kroah-Hartman int parity = 'n'; 1319ab4382d2SGreg Kroah-Hartman int flow = 'n'; 1320ab4382d2SGreg Kroah-Hartman 1321ab4382d2SGreg Kroah-Hartman /* 1322ab4382d2SGreg Kroah-Hartman * Check whether an invalid uart number has been specified, and 1323ab4382d2SGreg Kroah-Hartman * if so, search for the first available port that does have 1324ab4382d2SGreg Kroah-Hartman * console support. 1325ab4382d2SGreg Kroah-Hartman */ 1326ab4382d2SGreg Kroah-Hartman if (co->index == -1 || co->index >= ARRAY_SIZE(imx_ports)) 1327ab4382d2SGreg Kroah-Hartman co->index = 0; 1328ab4382d2SGreg Kroah-Hartman sport = imx_ports[co->index]; 1329ab4382d2SGreg Kroah-Hartman if(sport == NULL) 1330ab4382d2SGreg Kroah-Hartman return -ENODEV; 1331ab4382d2SGreg Kroah-Hartman 1332ab4382d2SGreg Kroah-Hartman if (options) 1333ab4382d2SGreg Kroah-Hartman uart_parse_options(options, &baud, &parity, &bits, &flow); 1334ab4382d2SGreg Kroah-Hartman else 1335ab4382d2SGreg Kroah-Hartman imx_console_get_options(sport, &baud, &parity, &bits); 1336ab4382d2SGreg Kroah-Hartman 1337ab4382d2SGreg Kroah-Hartman imx_setup_ufcr(sport, 0); 1338ab4382d2SGreg Kroah-Hartman 1339ab4382d2SGreg Kroah-Hartman return uart_set_options(&sport->port, co, baud, parity, bits, flow); 1340ab4382d2SGreg Kroah-Hartman } 1341ab4382d2SGreg Kroah-Hartman 1342ab4382d2SGreg Kroah-Hartman static struct uart_driver imx_reg; 1343ab4382d2SGreg Kroah-Hartman static struct console imx_console = { 1344ab4382d2SGreg Kroah-Hartman .name = DEV_NAME, 1345ab4382d2SGreg Kroah-Hartman .write = imx_console_write, 1346ab4382d2SGreg Kroah-Hartman .device = uart_console_device, 1347ab4382d2SGreg Kroah-Hartman .setup = imx_console_setup, 1348ab4382d2SGreg Kroah-Hartman .flags = CON_PRINTBUFFER, 1349ab4382d2SGreg Kroah-Hartman .index = -1, 1350ab4382d2SGreg Kroah-Hartman .data = &imx_reg, 1351ab4382d2SGreg Kroah-Hartman }; 1352ab4382d2SGreg Kroah-Hartman 1353ab4382d2SGreg Kroah-Hartman #define IMX_CONSOLE &imx_console 1354ab4382d2SGreg Kroah-Hartman #else 1355ab4382d2SGreg Kroah-Hartman #define IMX_CONSOLE NULL 1356ab4382d2SGreg Kroah-Hartman #endif 1357ab4382d2SGreg Kroah-Hartman 1358ab4382d2SGreg Kroah-Hartman static struct uart_driver imx_reg = { 1359ab4382d2SGreg Kroah-Hartman .owner = THIS_MODULE, 1360ab4382d2SGreg Kroah-Hartman .driver_name = DRIVER_NAME, 1361ab4382d2SGreg Kroah-Hartman .dev_name = DEV_NAME, 1362ab4382d2SGreg Kroah-Hartman .major = SERIAL_IMX_MAJOR, 1363ab4382d2SGreg Kroah-Hartman .minor = MINOR_START, 1364ab4382d2SGreg Kroah-Hartman .nr = ARRAY_SIZE(imx_ports), 1365ab4382d2SGreg Kroah-Hartman .cons = IMX_CONSOLE, 1366ab4382d2SGreg Kroah-Hartman }; 1367ab4382d2SGreg Kroah-Hartman 1368ab4382d2SGreg Kroah-Hartman static int serial_imx_suspend(struct platform_device *dev, pm_message_t state) 1369ab4382d2SGreg Kroah-Hartman { 1370ab4382d2SGreg Kroah-Hartman struct imx_port *sport = platform_get_drvdata(dev); 1371db1a9b55SFabio Estevam unsigned int val; 1372db1a9b55SFabio Estevam 1373db1a9b55SFabio Estevam /* enable wakeup from i.MX UART */ 1374db1a9b55SFabio Estevam val = readl(sport->port.membase + UCR3); 1375db1a9b55SFabio Estevam val |= UCR3_AWAKEN; 1376db1a9b55SFabio Estevam writel(val, sport->port.membase + UCR3); 1377ab4382d2SGreg Kroah-Hartman 1378ab4382d2SGreg Kroah-Hartman if (sport) 1379ab4382d2SGreg Kroah-Hartman uart_suspend_port(&imx_reg, &sport->port); 1380ab4382d2SGreg Kroah-Hartman 1381ab4382d2SGreg Kroah-Hartman return 0; 1382ab4382d2SGreg Kroah-Hartman } 1383ab4382d2SGreg Kroah-Hartman 1384ab4382d2SGreg Kroah-Hartman static int serial_imx_resume(struct platform_device *dev) 1385ab4382d2SGreg Kroah-Hartman { 1386ab4382d2SGreg Kroah-Hartman struct imx_port *sport = platform_get_drvdata(dev); 1387db1a9b55SFabio Estevam unsigned int val; 1388db1a9b55SFabio Estevam 1389db1a9b55SFabio Estevam /* disable wakeup from i.MX UART */ 1390db1a9b55SFabio Estevam val = readl(sport->port.membase + UCR3); 1391db1a9b55SFabio Estevam val &= ~UCR3_AWAKEN; 1392db1a9b55SFabio Estevam writel(val, sport->port.membase + UCR3); 1393ab4382d2SGreg Kroah-Hartman 1394ab4382d2SGreg Kroah-Hartman if (sport) 1395ab4382d2SGreg Kroah-Hartman uart_resume_port(&imx_reg, &sport->port); 1396ab4382d2SGreg Kroah-Hartman 1397ab4382d2SGreg Kroah-Hartman return 0; 1398ab4382d2SGreg Kroah-Hartman } 1399ab4382d2SGreg Kroah-Hartman 140022698aa2SShawn Guo #ifdef CONFIG_OF 140120bb8095SUwe Kleine-König /* 140220bb8095SUwe Kleine-König * This function returns 1 iff pdev isn't a device instatiated by dt, 0 iff it 140320bb8095SUwe Kleine-König * could successfully get all information from dt or a negative errno. 140420bb8095SUwe Kleine-König */ 140522698aa2SShawn Guo static int serial_imx_probe_dt(struct imx_port *sport, 140622698aa2SShawn Guo struct platform_device *pdev) 140722698aa2SShawn Guo { 140822698aa2SShawn Guo struct device_node *np = pdev->dev.of_node; 140922698aa2SShawn Guo const struct of_device_id *of_id = 141022698aa2SShawn Guo of_match_device(imx_uart_dt_ids, &pdev->dev); 1411ff05967aSShawn Guo int ret; 141222698aa2SShawn Guo 141322698aa2SShawn Guo if (!np) 141420bb8095SUwe Kleine-König /* no device tree device */ 141520bb8095SUwe Kleine-König return 1; 141622698aa2SShawn Guo 1417ff05967aSShawn Guo ret = of_alias_get_id(np, "serial"); 1418ff05967aSShawn Guo if (ret < 0) { 1419ff05967aSShawn Guo dev_err(&pdev->dev, "failed to get alias id, errno %d\n", ret); 1420a197a191SUwe Kleine-König return ret; 1421ff05967aSShawn Guo } 1422ff05967aSShawn Guo sport->port.line = ret; 142322698aa2SShawn Guo 142422698aa2SShawn Guo if (of_get_property(np, "fsl,uart-has-rtscts", NULL)) 142522698aa2SShawn Guo sport->have_rtscts = 1; 142622698aa2SShawn Guo 142722698aa2SShawn Guo if (of_get_property(np, "fsl,irda-mode", NULL)) 142822698aa2SShawn Guo sport->use_irda = 1; 142922698aa2SShawn Guo 143022698aa2SShawn Guo sport->devdata = of_id->data; 143122698aa2SShawn Guo 143222698aa2SShawn Guo return 0; 143322698aa2SShawn Guo } 143422698aa2SShawn Guo #else 143522698aa2SShawn Guo static inline int serial_imx_probe_dt(struct imx_port *sport, 143622698aa2SShawn Guo struct platform_device *pdev) 143722698aa2SShawn Guo { 143820bb8095SUwe Kleine-König return 1; 143922698aa2SShawn Guo } 144022698aa2SShawn Guo #endif 144122698aa2SShawn Guo 144222698aa2SShawn Guo static void serial_imx_probe_pdata(struct imx_port *sport, 144322698aa2SShawn Guo struct platform_device *pdev) 144422698aa2SShawn Guo { 144522698aa2SShawn Guo struct imxuart_platform_data *pdata = pdev->dev.platform_data; 144622698aa2SShawn Guo 144722698aa2SShawn Guo sport->port.line = pdev->id; 144822698aa2SShawn Guo sport->devdata = (struct imx_uart_data *) pdev->id_entry->driver_data; 144922698aa2SShawn Guo 145022698aa2SShawn Guo if (!pdata) 145122698aa2SShawn Guo return; 145222698aa2SShawn Guo 145322698aa2SShawn Guo if (pdata->flags & IMXUART_HAVE_RTSCTS) 145422698aa2SShawn Guo sport->have_rtscts = 1; 145522698aa2SShawn Guo 145622698aa2SShawn Guo if (pdata->flags & IMXUART_IRDA) 145722698aa2SShawn Guo sport->use_irda = 1; 145822698aa2SShawn Guo } 145922698aa2SShawn Guo 1460ab4382d2SGreg Kroah-Hartman static int serial_imx_probe(struct platform_device *pdev) 1461ab4382d2SGreg Kroah-Hartman { 1462ab4382d2SGreg Kroah-Hartman struct imx_port *sport; 1463ab4382d2SGreg Kroah-Hartman struct imxuart_platform_data *pdata; 1464ab4382d2SGreg Kroah-Hartman void __iomem *base; 1465ab4382d2SGreg Kroah-Hartman int ret = 0; 1466ab4382d2SGreg Kroah-Hartman struct resource *res; 1467ab4382d2SGreg Kroah-Hartman 1468ab4382d2SGreg Kroah-Hartman sport = kzalloc(sizeof(*sport), GFP_KERNEL); 1469ab4382d2SGreg Kroah-Hartman if (!sport) 1470ab4382d2SGreg Kroah-Hartman return -ENOMEM; 1471ab4382d2SGreg Kroah-Hartman 147222698aa2SShawn Guo ret = serial_imx_probe_dt(sport, pdev); 147320bb8095SUwe Kleine-König if (ret > 0) 147422698aa2SShawn Guo serial_imx_probe_pdata(sport, pdev); 147520bb8095SUwe Kleine-König else if (ret < 0) 147620bb8095SUwe Kleine-König goto free; 147722698aa2SShawn Guo 1478ab4382d2SGreg Kroah-Hartman res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1479ab4382d2SGreg Kroah-Hartman if (!res) { 1480ab4382d2SGreg Kroah-Hartman ret = -ENODEV; 1481ab4382d2SGreg Kroah-Hartman goto free; 1482ab4382d2SGreg Kroah-Hartman } 1483ab4382d2SGreg Kroah-Hartman 1484ab4382d2SGreg Kroah-Hartman base = ioremap(res->start, PAGE_SIZE); 1485ab4382d2SGreg Kroah-Hartman if (!base) { 1486ab4382d2SGreg Kroah-Hartman ret = -ENOMEM; 1487ab4382d2SGreg Kroah-Hartman goto free; 1488ab4382d2SGreg Kroah-Hartman } 1489ab4382d2SGreg Kroah-Hartman 1490ab4382d2SGreg Kroah-Hartman sport->port.dev = &pdev->dev; 1491ab4382d2SGreg Kroah-Hartman sport->port.mapbase = res->start; 1492ab4382d2SGreg Kroah-Hartman sport->port.membase = base; 1493ab4382d2SGreg Kroah-Hartman sport->port.type = PORT_IMX, 1494ab4382d2SGreg Kroah-Hartman sport->port.iotype = UPIO_MEM; 1495ab4382d2SGreg Kroah-Hartman sport->port.irq = platform_get_irq(pdev, 0); 1496ab4382d2SGreg Kroah-Hartman sport->rxirq = platform_get_irq(pdev, 0); 1497ab4382d2SGreg Kroah-Hartman sport->txirq = platform_get_irq(pdev, 1); 1498ab4382d2SGreg Kroah-Hartman sport->rtsirq = platform_get_irq(pdev, 2); 1499ab4382d2SGreg Kroah-Hartman sport->port.fifosize = 32; 1500ab4382d2SGreg Kroah-Hartman sport->port.ops = &imx_pops; 1501ab4382d2SGreg Kroah-Hartman sport->port.flags = UPF_BOOT_AUTOCONF; 1502ab4382d2SGreg Kroah-Hartman init_timer(&sport->timer); 1503ab4382d2SGreg Kroah-Hartman sport->timer.function = imx_timeout; 1504ab4382d2SGreg Kroah-Hartman sport->timer.data = (unsigned long)sport; 1505ab4382d2SGreg Kroah-Hartman 1506ab4382d2SGreg Kroah-Hartman sport->clk = clk_get(&pdev->dev, "uart"); 1507ab4382d2SGreg Kroah-Hartman if (IS_ERR(sport->clk)) { 1508ab4382d2SGreg Kroah-Hartman ret = PTR_ERR(sport->clk); 1509ab4382d2SGreg Kroah-Hartman goto unmap; 1510ab4382d2SGreg Kroah-Hartman } 1511ab4382d2SGreg Kroah-Hartman clk_enable(sport->clk); 1512ab4382d2SGreg Kroah-Hartman 1513ab4382d2SGreg Kroah-Hartman sport->port.uartclk = clk_get_rate(sport->clk); 1514ab4382d2SGreg Kroah-Hartman 151522698aa2SShawn Guo imx_ports[sport->port.line] = sport; 1516ab4382d2SGreg Kroah-Hartman 1517ab4382d2SGreg Kroah-Hartman pdata = pdev->dev.platform_data; 1518ab4382d2SGreg Kroah-Hartman if (pdata && pdata->init) { 1519ab4382d2SGreg Kroah-Hartman ret = pdata->init(pdev); 1520ab4382d2SGreg Kroah-Hartman if (ret) 1521ab4382d2SGreg Kroah-Hartman goto clkput; 1522ab4382d2SGreg Kroah-Hartman } 1523ab4382d2SGreg Kroah-Hartman 1524ab4382d2SGreg Kroah-Hartman ret = uart_add_one_port(&imx_reg, &sport->port); 1525ab4382d2SGreg Kroah-Hartman if (ret) 1526ab4382d2SGreg Kroah-Hartman goto deinit; 1527ab4382d2SGreg Kroah-Hartman platform_set_drvdata(pdev, &sport->port); 1528ab4382d2SGreg Kroah-Hartman 1529ab4382d2SGreg Kroah-Hartman return 0; 1530ab4382d2SGreg Kroah-Hartman deinit: 1531ab4382d2SGreg Kroah-Hartman if (pdata && pdata->exit) 1532ab4382d2SGreg Kroah-Hartman pdata->exit(pdev); 1533ab4382d2SGreg Kroah-Hartman clkput: 1534ab4382d2SGreg Kroah-Hartman clk_put(sport->clk); 1535ab4382d2SGreg Kroah-Hartman clk_disable(sport->clk); 1536ab4382d2SGreg Kroah-Hartman unmap: 1537ab4382d2SGreg Kroah-Hartman iounmap(sport->port.membase); 1538ab4382d2SGreg Kroah-Hartman free: 1539ab4382d2SGreg Kroah-Hartman kfree(sport); 1540ab4382d2SGreg Kroah-Hartman 1541ab4382d2SGreg Kroah-Hartman return ret; 1542ab4382d2SGreg Kroah-Hartman } 1543ab4382d2SGreg Kroah-Hartman 1544ab4382d2SGreg Kroah-Hartman static int serial_imx_remove(struct platform_device *pdev) 1545ab4382d2SGreg Kroah-Hartman { 1546ab4382d2SGreg Kroah-Hartman struct imxuart_platform_data *pdata; 1547ab4382d2SGreg Kroah-Hartman struct imx_port *sport = platform_get_drvdata(pdev); 1548ab4382d2SGreg Kroah-Hartman 1549ab4382d2SGreg Kroah-Hartman pdata = pdev->dev.platform_data; 1550ab4382d2SGreg Kroah-Hartman 1551ab4382d2SGreg Kroah-Hartman platform_set_drvdata(pdev, NULL); 1552ab4382d2SGreg Kroah-Hartman 1553ab4382d2SGreg Kroah-Hartman if (sport) { 1554ab4382d2SGreg Kroah-Hartman uart_remove_one_port(&imx_reg, &sport->port); 1555ab4382d2SGreg Kroah-Hartman clk_put(sport->clk); 1556ab4382d2SGreg Kroah-Hartman } 1557ab4382d2SGreg Kroah-Hartman 1558ab4382d2SGreg Kroah-Hartman clk_disable(sport->clk); 1559ab4382d2SGreg Kroah-Hartman 1560ab4382d2SGreg Kroah-Hartman if (pdata && pdata->exit) 1561ab4382d2SGreg Kroah-Hartman pdata->exit(pdev); 1562ab4382d2SGreg Kroah-Hartman 1563ab4382d2SGreg Kroah-Hartman iounmap(sport->port.membase); 1564ab4382d2SGreg Kroah-Hartman kfree(sport); 1565ab4382d2SGreg Kroah-Hartman 1566ab4382d2SGreg Kroah-Hartman return 0; 1567ab4382d2SGreg Kroah-Hartman } 1568ab4382d2SGreg Kroah-Hartman 1569ab4382d2SGreg Kroah-Hartman static struct platform_driver serial_imx_driver = { 1570ab4382d2SGreg Kroah-Hartman .probe = serial_imx_probe, 1571ab4382d2SGreg Kroah-Hartman .remove = serial_imx_remove, 1572ab4382d2SGreg Kroah-Hartman 1573ab4382d2SGreg Kroah-Hartman .suspend = serial_imx_suspend, 1574ab4382d2SGreg Kroah-Hartman .resume = serial_imx_resume, 1575fe6b540aSShawn Guo .id_table = imx_uart_devtype, 1576ab4382d2SGreg Kroah-Hartman .driver = { 1577ab4382d2SGreg Kroah-Hartman .name = "imx-uart", 1578ab4382d2SGreg Kroah-Hartman .owner = THIS_MODULE, 157922698aa2SShawn Guo .of_match_table = imx_uart_dt_ids, 1580ab4382d2SGreg Kroah-Hartman }, 1581ab4382d2SGreg Kroah-Hartman }; 1582ab4382d2SGreg Kroah-Hartman 1583ab4382d2SGreg Kroah-Hartman static int __init imx_serial_init(void) 1584ab4382d2SGreg Kroah-Hartman { 1585ab4382d2SGreg Kroah-Hartman int ret; 1586ab4382d2SGreg Kroah-Hartman 1587ab4382d2SGreg Kroah-Hartman printk(KERN_INFO "Serial: IMX driver\n"); 1588ab4382d2SGreg Kroah-Hartman 1589ab4382d2SGreg Kroah-Hartman ret = uart_register_driver(&imx_reg); 1590ab4382d2SGreg Kroah-Hartman if (ret) 1591ab4382d2SGreg Kroah-Hartman return ret; 1592ab4382d2SGreg Kroah-Hartman 1593ab4382d2SGreg Kroah-Hartman ret = platform_driver_register(&serial_imx_driver); 1594ab4382d2SGreg Kroah-Hartman if (ret != 0) 1595ab4382d2SGreg Kroah-Hartman uart_unregister_driver(&imx_reg); 1596ab4382d2SGreg Kroah-Hartman 1597f227824eSUwe Kleine-König return ret; 1598ab4382d2SGreg Kroah-Hartman } 1599ab4382d2SGreg Kroah-Hartman 1600ab4382d2SGreg Kroah-Hartman static void __exit imx_serial_exit(void) 1601ab4382d2SGreg Kroah-Hartman { 1602ab4382d2SGreg Kroah-Hartman platform_driver_unregister(&serial_imx_driver); 1603ab4382d2SGreg Kroah-Hartman uart_unregister_driver(&imx_reg); 1604ab4382d2SGreg Kroah-Hartman } 1605ab4382d2SGreg Kroah-Hartman 1606ab4382d2SGreg Kroah-Hartman module_init(imx_serial_init); 1607ab4382d2SGreg Kroah-Hartman module_exit(imx_serial_exit); 1608ab4382d2SGreg Kroah-Hartman 1609ab4382d2SGreg Kroah-Hartman MODULE_AUTHOR("Sascha Hauer"); 1610ab4382d2SGreg Kroah-Hartman MODULE_DESCRIPTION("IMX generic serial port driver"); 1611ab4382d2SGreg Kroah-Hartman MODULE_LICENSE("GPL"); 1612ab4382d2SGreg Kroah-Hartman MODULE_ALIAS("platform:imx-uart"); 1613