1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * icom.c 4 * 5 * Copyright (C) 2001 IBM Corporation. All rights reserved. 6 * 7 * Serial device driver. 8 * 9 * Based on code from serial.c 10 */ 11 #include <linux/module.h> 12 #include <linux/kernel.h> 13 #include <linux/errno.h> 14 #include <linux/signal.h> 15 #include <linux/timer.h> 16 #include <linux/interrupt.h> 17 #include <linux/tty.h> 18 #include <linux/termios.h> 19 #include <linux/fs.h> 20 #include <linux/tty_flip.h> 21 #include <linux/serial.h> 22 #include <linux/serial_core.h> 23 #include <linux/serial_reg.h> 24 #include <linux/major.h> 25 #include <linux/string.h> 26 #include <linux/fcntl.h> 27 #include <linux/ptrace.h> 28 #include <linux/ioport.h> 29 #include <linux/mm.h> 30 #include <linux/slab.h> 31 #include <linux/init.h> 32 #include <linux/delay.h> 33 #include <linux/pci.h> 34 #include <linux/vmalloc.h> 35 #include <linux/smp.h> 36 #include <linux/spinlock.h> 37 #include <linux/kref.h> 38 #include <linux/firmware.h> 39 #include <linux/bitops.h> 40 41 #include <linux/io.h> 42 #include <asm/irq.h> 43 #include <linux/uaccess.h> 44 45 /*#define ICOM_TRACE enable port trace capabilities */ 46 47 #define ICOM_DRIVER_NAME "icom" 48 #define NR_PORTS 128 49 50 static const unsigned int icom_acfg_baud[] = { 51 300, 52 600, 53 900, 54 1200, 55 1800, 56 2400, 57 3600, 58 4800, 59 7200, 60 9600, 61 14400, 62 19200, 63 28800, 64 38400, 65 57600, 66 76800, 67 115200, 68 153600, 69 230400, 70 307200, 71 460800, 72 }; 73 #define BAUD_TABLE_LIMIT (ARRAY_SIZE(icom_acfg_baud) - 1) 74 75 struct icom_regs { 76 u32 control; /* Adapter Control Register */ 77 u32 interrupt; /* Adapter Interrupt Register */ 78 u32 int_mask; /* Adapter Interrupt Mask Reg */ 79 u32 int_pri; /* Adapter Interrupt Priority r */ 80 u32 int_reg_b; /* Adapter non-masked Interrupt */ 81 u32 resvd01; 82 u32 resvd02; 83 u32 resvd03; 84 u32 control_2; /* Adapter Control Register 2 */ 85 u32 interrupt_2; /* Adapter Interrupt Register 2 */ 86 u32 int_mask_2; /* Adapter Interrupt Mask 2 */ 87 u32 int_pri_2; /* Adapter Interrupt Prior 2 */ 88 u32 int_reg_2b; /* Adapter non-masked 2 */ 89 }; 90 91 struct func_dram { 92 u32 reserved[108]; /* 0-1B0 reserved by personality code */ 93 u32 RcvStatusAddr; /* 1B0-1B3 Status Address for Next rcv */ 94 u8 RcvStnAddr; /* 1B4 Receive Station Addr */ 95 u8 IdleState; /* 1B5 Idle State */ 96 u8 IdleMonitor; /* 1B6 Idle Monitor */ 97 u8 FlagFillIdleTimer; /* 1B7 Flag Fill Idle Timer */ 98 u32 XmitStatusAddr; /* 1B8-1BB Transmit Status Address */ 99 u8 StartXmitCmd; /* 1BC Start Xmit Command */ 100 u8 HDLCConfigReg; /* 1BD Reserved */ 101 u8 CauseCode; /* 1BE Cause code for fatal error */ 102 u8 xchar; /* 1BF High priority send */ 103 u32 reserved3; /* 1C0-1C3 Reserved */ 104 u8 PrevCmdReg; /* 1C4 Reserved */ 105 u8 CmdReg; /* 1C5 Command Register */ 106 u8 async_config2; /* 1C6 Async Config Byte 2 */ 107 u8 async_config3; /* 1C7 Async Config Byte 3 */ 108 u8 dce_resvd[20]; /* 1C8-1DB DCE Rsvd */ 109 u8 dce_resvd21; /* 1DC DCE Rsvd (21st byte */ 110 u8 misc_flags; /* 1DD misc flags */ 111 #define V2_HARDWARE 0x40 112 #define ICOM_HDW_ACTIVE 0x01 113 u8 call_length; /* 1DE Phone #/CFI buff ln */ 114 u8 call_length2; /* 1DF Upper byte (unused) */ 115 u32 call_addr; /* 1E0-1E3 Phn #/CFI buff addr */ 116 u16 timer_value; /* 1E4-1E5 general timer value */ 117 u8 timer_command; /* 1E6 general timer cmd */ 118 u8 dce_command; /* 1E7 dce command reg */ 119 u8 dce_cmd_status; /* 1E8 dce command stat */ 120 u8 x21_r1_ioff; /* 1E9 dce ready counter */ 121 u8 x21_r0_ioff; /* 1EA dce not ready ctr */ 122 u8 x21_ralt_ioff; /* 1EB dce CNR counter */ 123 u8 x21_r1_ion; /* 1EC dce ready I on ctr */ 124 u8 rsvd_ier; /* 1ED Rsvd for IER (if ne */ 125 u8 ier; /* 1EE Interrupt Enable */ 126 u8 isr; /* 1EF Input Signal Reg */ 127 u8 osr; /* 1F0 Output Signal Reg */ 128 u8 reset; /* 1F1 Reset/Reload Reg */ 129 u8 disable; /* 1F2 Disable Reg */ 130 u8 sync; /* 1F3 Sync Reg */ 131 u8 error_stat; /* 1F4 Error Status */ 132 u8 cable_id; /* 1F5 Cable ID */ 133 u8 cs_length; /* 1F6 CS Load Length */ 134 u8 mac_length; /* 1F7 Mac Load Length */ 135 u32 cs_load_addr; /* 1F8-1FB Call Load PCI Addr */ 136 u32 mac_load_addr; /* 1FC-1FF Mac Load PCI Addr */ 137 }; 138 139 /* 140 * adapter defines and structures 141 */ 142 #define ICOM_CONTROL_START_A 0x00000008 143 #define ICOM_CONTROL_STOP_A 0x00000004 144 #define ICOM_CONTROL_START_B 0x00000002 145 #define ICOM_CONTROL_STOP_B 0x00000001 146 #define ICOM_CONTROL_START_C 0x00000008 147 #define ICOM_CONTROL_STOP_C 0x00000004 148 #define ICOM_CONTROL_START_D 0x00000002 149 #define ICOM_CONTROL_STOP_D 0x00000001 150 #define ICOM_IRAM_OFFSET 0x1000 151 #define ICOM_IRAM_SIZE 0x0C00 152 #define ICOM_DCE_IRAM_OFFSET 0x0A00 153 #define ICOM_CABLE_ID_VALID 0x01 154 #define ICOM_CABLE_ID_MASK 0xF0 155 #define ICOM_DISABLE 0x80 156 #define CMD_XMIT_RCV_ENABLE 0xC0 157 #define CMD_XMIT_ENABLE 0x40 158 #define CMD_RCV_DISABLE 0x00 159 #define CMD_RCV_ENABLE 0x80 160 #define CMD_RESTART 0x01 161 #define CMD_HOLD_XMIT 0x02 162 #define CMD_SND_BREAK 0x04 163 #define RS232_CABLE 0x06 164 #define V24_CABLE 0x0E 165 #define V35_CABLE 0x0C 166 #define V36_CABLE 0x02 167 #define NO_CABLE 0x00 168 #define START_DOWNLOAD 0x80 169 #define ICOM_INT_MASK_PRC_A 0x00003FFF 170 #define ICOM_INT_MASK_PRC_B 0x3FFF0000 171 #define ICOM_INT_MASK_PRC_C 0x00003FFF 172 #define ICOM_INT_MASK_PRC_D 0x3FFF0000 173 #define INT_RCV_COMPLETED 0x1000 174 #define INT_XMIT_COMPLETED 0x2000 175 #define INT_IDLE_DETECT 0x0800 176 #define INT_RCV_DISABLED 0x0400 177 #define INT_XMIT_DISABLED 0x0200 178 #define INT_RCV_XMIT_SHUTDOWN 0x0100 179 #define INT_FATAL_ERROR 0x0080 180 #define INT_CABLE_PULL 0x0020 181 #define INT_SIGNAL_CHANGE 0x0010 182 #define HDLC_PPP_PURE_ASYNC 0x02 183 #define HDLC_FF_FILL 0x00 184 #define HDLC_HDW_FLOW 0x01 185 #define START_XMIT 0x80 186 #define ICOM_ACFG_DRIVE1 0x20 187 #define ICOM_ACFG_NO_PARITY 0x00 188 #define ICOM_ACFG_PARITY_ENAB 0x02 189 #define ICOM_ACFG_PARITY_ODD 0x01 190 #define ICOM_ACFG_8BPC 0x00 191 #define ICOM_ACFG_7BPC 0x04 192 #define ICOM_ACFG_6BPC 0x08 193 #define ICOM_ACFG_5BPC 0x0C 194 #define ICOM_ACFG_1STOP_BIT 0x00 195 #define ICOM_ACFG_2STOP_BIT 0x10 196 #define ICOM_DTR 0x80 197 #define ICOM_RTS 0x40 198 #define ICOM_RI 0x08 199 #define ICOM_DSR 0x80 200 #define ICOM_DCD 0x20 201 #define ICOM_CTS 0x40 202 203 #define NUM_XBUFFS 1 204 #define NUM_RBUFFS 2 205 #define RCV_BUFF_SZ 0x0200 206 #define XMIT_BUFF_SZ 0x1000 207 struct statusArea { 208 /**********************************************/ 209 /* Transmit Status Area */ 210 /**********************************************/ 211 struct xmit_status_area{ 212 __le32 leNext; /* Next entry in Little Endian on Adapter */ 213 __le32 leNextASD; 214 __le32 leBuffer; /* Buffer for entry in LE for Adapter */ 215 __le16 leLengthASD; 216 __le16 leOffsetASD; 217 __le16 leLength; /* Length of data in segment */ 218 __le16 flags; 219 #define SA_FLAGS_DONE 0x0080 /* Done with Segment */ 220 #define SA_FLAGS_CONTINUED 0x8000 /* More Segments */ 221 #define SA_FLAGS_IDLE 0x4000 /* Mark IDLE after frm */ 222 #define SA_FLAGS_READY_TO_XMIT 0x0800 223 #define SA_FLAGS_STAT_MASK 0x007F 224 } xmit[NUM_XBUFFS]; 225 226 /**********************************************/ 227 /* Receive Status Area */ 228 /**********************************************/ 229 struct { 230 __le32 leNext; /* Next entry in Little Endian on Adapter */ 231 __le32 leNextASD; 232 __le32 leBuffer; /* Buffer for entry in LE for Adapter */ 233 __le16 WorkingLength; /* size of segment */ 234 __le16 reserv01; 235 __le16 leLength; /* Length of data in segment */ 236 __le16 flags; 237 #define SA_FL_RCV_DONE 0x0010 /* Data ready */ 238 #define SA_FLAGS_OVERRUN 0x0040 239 #define SA_FLAGS_PARITY_ERROR 0x0080 240 #define SA_FLAGS_FRAME_ERROR 0x0001 241 #define SA_FLAGS_FRAME_TRUNC 0x0002 242 #define SA_FLAGS_BREAK_DET 0x0004 /* set conditionally by device driver, not hardware */ 243 #define SA_FLAGS_RCV_MASK 0xFFE6 244 } rcv[NUM_RBUFFS]; 245 }; 246 247 struct icom_adapter; 248 249 250 #define ICOM_MAJOR 243 251 #define ICOM_MINOR_START 0 252 253 struct icom_port { 254 struct uart_port uart_port; 255 u8 imbed_modem; 256 #define ICOM_UNKNOWN 1 257 #define ICOM_RVX 2 258 #define ICOM_IMBED_MODEM 3 259 unsigned char cable_id; 260 unsigned char read_status_mask; 261 unsigned char ignore_status_mask; 262 void __iomem * int_reg; 263 struct icom_regs __iomem *global_reg; 264 struct func_dram __iomem *dram; 265 int port; 266 struct statusArea *statStg; 267 dma_addr_t statStg_pci; 268 __le32 *xmitRestart; 269 dma_addr_t xmitRestart_pci; 270 unsigned char *xmit_buf; 271 dma_addr_t xmit_buf_pci; 272 unsigned char *recv_buf; 273 dma_addr_t recv_buf_pci; 274 int next_rcv; 275 int put_length; 276 int status; 277 #define ICOM_PORT_ACTIVE 1 /* Port exists. */ 278 #define ICOM_PORT_OFF 0 /* Port does not exist. */ 279 int load_in_progress; 280 struct icom_adapter *adapter; 281 }; 282 283 struct icom_adapter { 284 void __iomem * base_addr; 285 unsigned long base_addr_pci; 286 struct pci_dev *pci_dev; 287 struct icom_port port_info[4]; 288 int index; 289 int version; 290 #define ADAPTER_V1 0x0001 291 #define ADAPTER_V2 0x0002 292 u32 subsystem_id; 293 #define FOUR_PORT_MODEL 0x0252 294 #define V2_TWO_PORTS_RVX 0x021A 295 #define V2_ONE_PORT_RVX_ONE_PORT_IMBED_MDM 0x0251 296 int numb_ports; 297 struct list_head icom_adapter_entry; 298 struct kref kref; 299 }; 300 301 /* prototype */ 302 extern void iCom_sercons_init(void); 303 304 struct lookup_proc_table { 305 u32 __iomem *global_control_reg; 306 unsigned long processor_id; 307 }; 308 309 struct lookup_int_table { 310 u32 __iomem *global_int_mask; 311 unsigned long processor_id; 312 }; 313 314 static inline struct icom_port *to_icom_port(struct uart_port *port) 315 { 316 return container_of(port, struct icom_port, uart_port); 317 } 318 319 static const struct pci_device_id icom_pci_table[] = { 320 { 321 .vendor = PCI_VENDOR_ID_IBM, 322 .device = PCI_DEVICE_ID_IBM_ICOM_DEV_ID_1, 323 .subvendor = PCI_ANY_ID, 324 .subdevice = PCI_ANY_ID, 325 .driver_data = ADAPTER_V1, 326 }, 327 { 328 .vendor = PCI_VENDOR_ID_IBM, 329 .device = PCI_DEVICE_ID_IBM_ICOM_DEV_ID_2, 330 .subvendor = PCI_VENDOR_ID_IBM, 331 .subdevice = PCI_DEVICE_ID_IBM_ICOM_V2_TWO_PORTS_RVX, 332 .driver_data = ADAPTER_V2, 333 }, 334 { 335 .vendor = PCI_VENDOR_ID_IBM, 336 .device = PCI_DEVICE_ID_IBM_ICOM_DEV_ID_2, 337 .subvendor = PCI_VENDOR_ID_IBM, 338 .subdevice = PCI_DEVICE_ID_IBM_ICOM_V2_ONE_PORT_RVX_ONE_PORT_MDM, 339 .driver_data = ADAPTER_V2, 340 }, 341 { 342 .vendor = PCI_VENDOR_ID_IBM, 343 .device = PCI_DEVICE_ID_IBM_ICOM_DEV_ID_2, 344 .subvendor = PCI_VENDOR_ID_IBM, 345 .subdevice = PCI_DEVICE_ID_IBM_ICOM_FOUR_PORT_MODEL, 346 .driver_data = ADAPTER_V2, 347 }, 348 { 349 .vendor = PCI_VENDOR_ID_IBM, 350 .device = PCI_DEVICE_ID_IBM_ICOM_DEV_ID_2, 351 .subvendor = PCI_VENDOR_ID_IBM, 352 .subdevice = PCI_DEVICE_ID_IBM_ICOM_V2_ONE_PORT_RVX_ONE_PORT_MDM_PCIE, 353 .driver_data = ADAPTER_V2, 354 }, 355 {} 356 }; 357 358 static struct lookup_proc_table start_proc[4] = { 359 {NULL, ICOM_CONTROL_START_A}, 360 {NULL, ICOM_CONTROL_START_B}, 361 {NULL, ICOM_CONTROL_START_C}, 362 {NULL, ICOM_CONTROL_START_D} 363 }; 364 365 366 static struct lookup_proc_table stop_proc[4] = { 367 {NULL, ICOM_CONTROL_STOP_A}, 368 {NULL, ICOM_CONTROL_STOP_B}, 369 {NULL, ICOM_CONTROL_STOP_C}, 370 {NULL, ICOM_CONTROL_STOP_D} 371 }; 372 373 static struct lookup_int_table int_mask_tbl[4] = { 374 {NULL, ICOM_INT_MASK_PRC_A}, 375 {NULL, ICOM_INT_MASK_PRC_B}, 376 {NULL, ICOM_INT_MASK_PRC_C}, 377 {NULL, ICOM_INT_MASK_PRC_D}, 378 }; 379 380 381 MODULE_DEVICE_TABLE(pci, icom_pci_table); 382 383 static LIST_HEAD(icom_adapter_head); 384 385 /* spinlock for adapter initialization and changing adapter operations */ 386 static DEFINE_SPINLOCK(icom_lock); 387 388 #ifdef ICOM_TRACE 389 static inline void trace(struct icom_port *icom_port, char *trace_pt, 390 unsigned long trace_data) 391 { 392 dev_info(&icom_port->adapter->pci_dev->dev, ":%d:%s - %lx\n", 393 icom_port->port, trace_pt, trace_data); 394 } 395 #else 396 static inline void trace(struct icom_port *icom_port, char *trace_pt, unsigned long trace_data) {}; 397 #endif 398 static void icom_kref_release(struct kref *kref); 399 400 static void free_port_memory(struct icom_port *icom_port) 401 { 402 struct pci_dev *dev = icom_port->adapter->pci_dev; 403 404 trace(icom_port, "RET_PORT_MEM", 0); 405 if (icom_port->recv_buf) { 406 dma_free_coherent(&dev->dev, 4096, icom_port->recv_buf, 407 icom_port->recv_buf_pci); 408 icom_port->recv_buf = NULL; 409 } 410 if (icom_port->xmit_buf) { 411 dma_free_coherent(&dev->dev, 4096, icom_port->xmit_buf, 412 icom_port->xmit_buf_pci); 413 icom_port->xmit_buf = NULL; 414 } 415 if (icom_port->statStg) { 416 dma_free_coherent(&dev->dev, 4096, icom_port->statStg, 417 icom_port->statStg_pci); 418 icom_port->statStg = NULL; 419 } 420 421 if (icom_port->xmitRestart) { 422 dma_free_coherent(&dev->dev, 4096, icom_port->xmitRestart, 423 icom_port->xmitRestart_pci); 424 icom_port->xmitRestart = NULL; 425 } 426 } 427 428 static int get_port_memory(struct icom_port *icom_port) 429 { 430 int index; 431 unsigned long stgAddr; 432 unsigned long startStgAddr; 433 unsigned long offset; 434 struct pci_dev *dev = icom_port->adapter->pci_dev; 435 436 icom_port->xmit_buf = 437 dma_alloc_coherent(&dev->dev, 4096, &icom_port->xmit_buf_pci, 438 GFP_KERNEL); 439 if (!icom_port->xmit_buf) { 440 dev_err(&dev->dev, "Can not allocate Transmit buffer\n"); 441 return -ENOMEM; 442 } 443 444 trace(icom_port, "GET_PORT_MEM", 445 (unsigned long) icom_port->xmit_buf); 446 447 icom_port->recv_buf = 448 dma_alloc_coherent(&dev->dev, 4096, &icom_port->recv_buf_pci, 449 GFP_KERNEL); 450 if (!icom_port->recv_buf) { 451 dev_err(&dev->dev, "Can not allocate Receive buffer\n"); 452 free_port_memory(icom_port); 453 return -ENOMEM; 454 } 455 trace(icom_port, "GET_PORT_MEM", 456 (unsigned long) icom_port->recv_buf); 457 458 icom_port->statStg = 459 dma_alloc_coherent(&dev->dev, 4096, &icom_port->statStg_pci, 460 GFP_KERNEL); 461 if (!icom_port->statStg) { 462 dev_err(&dev->dev, "Can not allocate Status buffer\n"); 463 free_port_memory(icom_port); 464 return -ENOMEM; 465 } 466 trace(icom_port, "GET_PORT_MEM", 467 (unsigned long) icom_port->statStg); 468 469 icom_port->xmitRestart = 470 dma_alloc_coherent(&dev->dev, 4096, &icom_port->xmitRestart_pci, 471 GFP_KERNEL); 472 if (!icom_port->xmitRestart) { 473 dev_err(&dev->dev, 474 "Can not allocate xmit Restart buffer\n"); 475 free_port_memory(icom_port); 476 return -ENOMEM; 477 } 478 479 /* FODs: Frame Out Descriptor Queue, this is a FIFO queue that 480 indicates that frames are to be transmitted 481 */ 482 483 stgAddr = (unsigned long) icom_port->statStg; 484 for (index = 0; index < NUM_XBUFFS; index++) { 485 trace(icom_port, "FOD_ADDR", stgAddr); 486 stgAddr = stgAddr + sizeof(icom_port->statStg->xmit[0]); 487 if (index < (NUM_XBUFFS - 1)) { 488 memset(&icom_port->statStg->xmit[index], 0, sizeof(struct xmit_status_area)); 489 icom_port->statStg->xmit[index].leLengthASD = 490 cpu_to_le16(XMIT_BUFF_SZ); 491 trace(icom_port, "FOD_ADDR", stgAddr); 492 trace(icom_port, "FOD_XBUFF", 493 (unsigned long) icom_port->xmit_buf); 494 icom_port->statStg->xmit[index].leBuffer = 495 cpu_to_le32(icom_port->xmit_buf_pci); 496 } else if (index == (NUM_XBUFFS - 1)) { 497 memset(&icom_port->statStg->xmit[index], 0, sizeof(struct xmit_status_area)); 498 icom_port->statStg->xmit[index].leLengthASD = 499 cpu_to_le16(XMIT_BUFF_SZ); 500 trace(icom_port, "FOD_XBUFF", 501 (unsigned long) icom_port->xmit_buf); 502 icom_port->statStg->xmit[index].leBuffer = 503 cpu_to_le32(icom_port->xmit_buf_pci); 504 } else { 505 memset(&icom_port->statStg->xmit[index], 0, sizeof(struct xmit_status_area)); 506 } 507 } 508 /* FIDs */ 509 startStgAddr = stgAddr; 510 511 /* fill in every entry, even if no buffer */ 512 for (index = 0; index < NUM_RBUFFS; index++) { 513 trace(icom_port, "FID_ADDR", stgAddr); 514 stgAddr = stgAddr + sizeof(icom_port->statStg->rcv[0]); 515 icom_port->statStg->rcv[index].leLength = 0; 516 icom_port->statStg->rcv[index].WorkingLength = 517 cpu_to_le16(RCV_BUFF_SZ); 518 if (index < (NUM_RBUFFS - 1) ) { 519 offset = stgAddr - (unsigned long) icom_port->statStg; 520 icom_port->statStg->rcv[index].leNext = 521 cpu_to_le32(icom_port-> statStg_pci + offset); 522 trace(icom_port, "FID_RBUFF", 523 (unsigned long) icom_port->recv_buf); 524 icom_port->statStg->rcv[index].leBuffer = 525 cpu_to_le32(icom_port->recv_buf_pci); 526 } else if (index == (NUM_RBUFFS -1) ) { 527 offset = startStgAddr - (unsigned long) icom_port->statStg; 528 icom_port->statStg->rcv[index].leNext = 529 cpu_to_le32(icom_port-> statStg_pci + offset); 530 trace(icom_port, "FID_RBUFF", 531 (unsigned long) icom_port->recv_buf + 2048); 532 icom_port->statStg->rcv[index].leBuffer = 533 cpu_to_le32(icom_port->recv_buf_pci + 2048); 534 } else { 535 icom_port->statStg->rcv[index].leNext = 0; 536 icom_port->statStg->rcv[index].leBuffer = 0; 537 } 538 } 539 540 return 0; 541 } 542 543 static void stop_processor(struct icom_port *icom_port) 544 { 545 unsigned long temp; 546 unsigned long flags; 547 int port; 548 549 spin_lock_irqsave(&icom_lock, flags); 550 551 port = icom_port->port; 552 if (port >= ARRAY_SIZE(stop_proc)) { 553 dev_err(&icom_port->adapter->pci_dev->dev, 554 "Invalid port assignment\n"); 555 goto unlock; 556 } 557 558 if (port == 0 || port == 1) 559 stop_proc[port].global_control_reg = &icom_port->global_reg->control; 560 else 561 stop_proc[port].global_control_reg = &icom_port->global_reg->control_2; 562 563 temp = readl(stop_proc[port].global_control_reg); 564 temp = (temp & ~start_proc[port].processor_id) | stop_proc[port].processor_id; 565 writel(temp, stop_proc[port].global_control_reg); 566 567 /* write flush */ 568 readl(stop_proc[port].global_control_reg); 569 570 unlock: 571 spin_unlock_irqrestore(&icom_lock, flags); 572 } 573 574 static void start_processor(struct icom_port *icom_port) 575 { 576 unsigned long temp; 577 unsigned long flags; 578 int port; 579 580 spin_lock_irqsave(&icom_lock, flags); 581 582 port = icom_port->port; 583 if (port >= ARRAY_SIZE(start_proc)) { 584 dev_err(&icom_port->adapter->pci_dev->dev, 585 "Invalid port assignment\n"); 586 goto unlock; 587 } 588 589 if (port == 0 || port == 1) 590 start_proc[port].global_control_reg = &icom_port->global_reg->control; 591 else 592 start_proc[port].global_control_reg = &icom_port->global_reg->control_2; 593 594 temp = readl(start_proc[port].global_control_reg); 595 temp = (temp & ~stop_proc[port].processor_id) | start_proc[port].processor_id; 596 writel(temp, start_proc[port].global_control_reg); 597 598 /* write flush */ 599 readl(start_proc[port].global_control_reg); 600 601 unlock: 602 spin_unlock_irqrestore(&icom_lock, flags); 603 } 604 605 static void load_code(struct icom_port *icom_port) 606 { 607 const struct firmware *fw; 608 char __iomem *iram_ptr; 609 int index; 610 int status = 0; 611 void __iomem *dram_ptr = icom_port->dram; 612 dma_addr_t temp_pci; 613 unsigned char *new_page = NULL; 614 unsigned char cable_id = NO_CABLE; 615 struct pci_dev *dev = icom_port->adapter->pci_dev; 616 617 /* Clear out any pending interrupts */ 618 writew(0x3FFF, icom_port->int_reg); 619 620 trace(icom_port, "CLEAR_INTERRUPTS", 0); 621 622 /* Stop processor */ 623 stop_processor(icom_port); 624 625 /* Zero out DRAM */ 626 memset_io(dram_ptr, 0, 512); 627 628 /* Load Call Setup into Adapter */ 629 if (request_firmware(&fw, "icom_call_setup.bin", &dev->dev) < 0) { 630 dev_err(&dev->dev,"Unable to load icom_call_setup.bin firmware image\n"); 631 status = -1; 632 goto load_code_exit; 633 } 634 635 if (fw->size > ICOM_DCE_IRAM_OFFSET) { 636 dev_err(&dev->dev, "Invalid firmware image for icom_call_setup.bin found.\n"); 637 release_firmware(fw); 638 status = -1; 639 goto load_code_exit; 640 } 641 642 iram_ptr = (char __iomem *)icom_port->dram + ICOM_IRAM_OFFSET; 643 for (index = 0; index < fw->size; index++) 644 writeb(fw->data[index], &iram_ptr[index]); 645 646 release_firmware(fw); 647 648 /* Load Resident DCE portion of Adapter */ 649 if (request_firmware(&fw, "icom_res_dce.bin", &dev->dev) < 0) { 650 dev_err(&dev->dev,"Unable to load icom_res_dce.bin firmware image\n"); 651 status = -1; 652 goto load_code_exit; 653 } 654 655 if (fw->size > ICOM_IRAM_SIZE) { 656 dev_err(&dev->dev, "Invalid firmware image for icom_res_dce.bin found.\n"); 657 release_firmware(fw); 658 status = -1; 659 goto load_code_exit; 660 } 661 662 iram_ptr = (char __iomem *) icom_port->dram + ICOM_IRAM_OFFSET; 663 for (index = ICOM_DCE_IRAM_OFFSET; index < fw->size; index++) 664 writeb(fw->data[index], &iram_ptr[index]); 665 666 release_firmware(fw); 667 668 /* Set Hardware level */ 669 if (icom_port->adapter->version == ADAPTER_V2) 670 writeb(V2_HARDWARE, &(icom_port->dram->misc_flags)); 671 672 /* Start the processor in Adapter */ 673 start_processor(icom_port); 674 675 writeb((HDLC_PPP_PURE_ASYNC | HDLC_FF_FILL), 676 &(icom_port->dram->HDLCConfigReg)); 677 writeb(0x04, &(icom_port->dram->FlagFillIdleTimer)); /* 0.5 seconds */ 678 writeb(0x00, &(icom_port->dram->CmdReg)); 679 writeb(0x10, &(icom_port->dram->async_config3)); 680 writeb((ICOM_ACFG_DRIVE1 | ICOM_ACFG_NO_PARITY | ICOM_ACFG_8BPC | 681 ICOM_ACFG_1STOP_BIT), &(icom_port->dram->async_config2)); 682 683 /*Set up data in icom DRAM to indicate where personality 684 *code is located and its length. 685 */ 686 new_page = dma_alloc_coherent(&dev->dev, 4096, &temp_pci, GFP_KERNEL); 687 688 if (!new_page) { 689 dev_err(&dev->dev, "Can not allocate DMA buffer\n"); 690 status = -1; 691 goto load_code_exit; 692 } 693 694 if (request_firmware(&fw, "icom_asc.bin", &dev->dev) < 0) { 695 dev_err(&dev->dev,"Unable to load icom_asc.bin firmware image\n"); 696 status = -1; 697 goto load_code_exit; 698 } 699 700 if (fw->size > ICOM_DCE_IRAM_OFFSET) { 701 dev_err(&dev->dev, "Invalid firmware image for icom_asc.bin found.\n"); 702 release_firmware(fw); 703 status = -1; 704 goto load_code_exit; 705 } 706 707 for (index = 0; index < fw->size; index++) 708 new_page[index] = fw->data[index]; 709 710 writeb((char) ((fw->size + 16)/16), &icom_port->dram->mac_length); 711 writel(temp_pci, &icom_port->dram->mac_load_addr); 712 713 release_firmware(fw); 714 715 /*Setting the syncReg to 0x80 causes adapter to start downloading 716 the personality code into adapter instruction RAM. 717 Once code is loaded, it will begin executing and, based on 718 information provided above, will start DMAing data from 719 shared memory to adapter DRAM. 720 */ 721 /* the wait loop below verifies this write operation has been done 722 and processed 723 */ 724 writeb(START_DOWNLOAD, &icom_port->dram->sync); 725 726 /* Wait max 1 Sec for data download and processor to start */ 727 for (index = 0; index < 10; index++) { 728 msleep(100); 729 if (readb(&icom_port->dram->misc_flags) & ICOM_HDW_ACTIVE) 730 break; 731 } 732 733 if (index == 10) 734 status = -1; 735 736 /* 737 * check Cable ID 738 */ 739 cable_id = readb(&icom_port->dram->cable_id); 740 741 if (cable_id & ICOM_CABLE_ID_VALID) { 742 /* Get cable ID into the lower 4 bits (standard form) */ 743 cable_id = (cable_id & ICOM_CABLE_ID_MASK) >> 4; 744 icom_port->cable_id = cable_id; 745 } else { 746 dev_err(&dev->dev,"Invalid or no cable attached\n"); 747 icom_port->cable_id = NO_CABLE; 748 } 749 750 load_code_exit: 751 752 if (status != 0) { 753 /* Clear out any pending interrupts */ 754 writew(0x3FFF, icom_port->int_reg); 755 756 /* Turn off port */ 757 writeb(ICOM_DISABLE, &(icom_port->dram->disable)); 758 759 /* Stop processor */ 760 stop_processor(icom_port); 761 762 dev_err(&icom_port->adapter->pci_dev->dev,"Port not operational\n"); 763 } 764 765 if (new_page != NULL) 766 dma_free_coherent(&dev->dev, 4096, new_page, temp_pci); 767 } 768 769 static int startup(struct icom_port *icom_port) 770 { 771 unsigned long temp; 772 unsigned char cable_id, raw_cable_id; 773 unsigned long flags; 774 int port; 775 776 trace(icom_port, "STARTUP", 0); 777 778 if (!icom_port->dram) { 779 /* should NEVER be NULL */ 780 dev_err(&icom_port->adapter->pci_dev->dev, 781 "Unusable Port, port configuration missing\n"); 782 return -ENODEV; 783 } 784 785 /* 786 * check Cable ID 787 */ 788 raw_cable_id = readb(&icom_port->dram->cable_id); 789 trace(icom_port, "CABLE_ID", raw_cable_id); 790 791 /* Get cable ID into the lower 4 bits (standard form) */ 792 cable_id = (raw_cable_id & ICOM_CABLE_ID_MASK) >> 4; 793 794 /* Check for valid Cable ID */ 795 if (!(raw_cable_id & ICOM_CABLE_ID_VALID) || 796 (cable_id != icom_port->cable_id)) { 797 798 /* reload adapter code, pick up any potential changes in cable id */ 799 load_code(icom_port); 800 801 /* still no sign of cable, error out */ 802 raw_cable_id = readb(&icom_port->dram->cable_id); 803 cable_id = (raw_cable_id & ICOM_CABLE_ID_MASK) >> 4; 804 if (!(raw_cable_id & ICOM_CABLE_ID_VALID) || 805 (icom_port->cable_id == NO_CABLE)) 806 return -EIO; 807 } 808 809 /* 810 * Finally, clear and enable interrupts 811 */ 812 spin_lock_irqsave(&icom_lock, flags); 813 port = icom_port->port; 814 if (port >= ARRAY_SIZE(int_mask_tbl)) { 815 dev_err(&icom_port->adapter->pci_dev->dev, 816 "Invalid port assignment\n"); 817 goto unlock; 818 } 819 820 if (port == 0 || port == 1) 821 int_mask_tbl[port].global_int_mask = &icom_port->global_reg->int_mask; 822 else 823 int_mask_tbl[port].global_int_mask = &icom_port->global_reg->int_mask_2; 824 825 if (port == 0 || port == 2) 826 writew(0x00FF, icom_port->int_reg); 827 else 828 writew(0x3F00, icom_port->int_reg); 829 830 temp = readl(int_mask_tbl[port].global_int_mask); 831 writel(temp & ~int_mask_tbl[port].processor_id, int_mask_tbl[port].global_int_mask); 832 833 /* write flush */ 834 readl(int_mask_tbl[port].global_int_mask); 835 836 unlock: 837 spin_unlock_irqrestore(&icom_lock, flags); 838 return 0; 839 } 840 841 static void shutdown(struct icom_port *icom_port) 842 { 843 unsigned long temp; 844 unsigned char cmdReg; 845 unsigned long flags; 846 int port; 847 848 spin_lock_irqsave(&icom_lock, flags); 849 trace(icom_port, "SHUTDOWN", 0); 850 851 /* 852 * disable all interrupts 853 */ 854 port = icom_port->port; 855 if (port >= ARRAY_SIZE(int_mask_tbl)) { 856 dev_err(&icom_port->adapter->pci_dev->dev, 857 "Invalid port assignment\n"); 858 goto unlock; 859 } 860 if (port == 0 || port == 1) 861 int_mask_tbl[port].global_int_mask = &icom_port->global_reg->int_mask; 862 else 863 int_mask_tbl[port].global_int_mask = &icom_port->global_reg->int_mask_2; 864 865 temp = readl(int_mask_tbl[port].global_int_mask); 866 writel(temp | int_mask_tbl[port].processor_id, int_mask_tbl[port].global_int_mask); 867 868 /* write flush */ 869 readl(int_mask_tbl[port].global_int_mask); 870 871 unlock: 872 spin_unlock_irqrestore(&icom_lock, flags); 873 874 /* 875 * disable break condition 876 */ 877 cmdReg = readb(&icom_port->dram->CmdReg); 878 if (cmdReg & CMD_SND_BREAK) { 879 writeb(cmdReg & ~CMD_SND_BREAK, &icom_port->dram->CmdReg); 880 } 881 } 882 883 static int icom_write(struct uart_port *port) 884 { 885 struct icom_port *icom_port = to_icom_port(port); 886 unsigned long data_count; 887 unsigned char cmdReg; 888 unsigned long offset; 889 int temp_tail = port->state->xmit.tail; 890 891 trace(icom_port, "WRITE", 0); 892 893 if (le16_to_cpu(icom_port->statStg->xmit[0].flags) & 894 SA_FLAGS_READY_TO_XMIT) { 895 trace(icom_port, "WRITE_FULL", 0); 896 return 0; 897 } 898 899 data_count = 0; 900 while ((port->state->xmit.head != temp_tail) && 901 (data_count <= XMIT_BUFF_SZ)) { 902 903 icom_port->xmit_buf[data_count++] = 904 port->state->xmit.buf[temp_tail]; 905 906 temp_tail++; 907 temp_tail &= (UART_XMIT_SIZE - 1); 908 } 909 910 if (data_count) { 911 icom_port->statStg->xmit[0].flags = 912 cpu_to_le16(SA_FLAGS_READY_TO_XMIT); 913 icom_port->statStg->xmit[0].leLength = 914 cpu_to_le16(data_count); 915 offset = 916 (unsigned long) &icom_port->statStg->xmit[0] - 917 (unsigned long) icom_port->statStg; 918 *icom_port->xmitRestart = 919 cpu_to_le32(icom_port->statStg_pci + offset); 920 cmdReg = readb(&icom_port->dram->CmdReg); 921 writeb(cmdReg | CMD_XMIT_RCV_ENABLE, 922 &icom_port->dram->CmdReg); 923 writeb(START_XMIT, &icom_port->dram->StartXmitCmd); 924 trace(icom_port, "WRITE_START", data_count); 925 /* write flush */ 926 readb(&icom_port->dram->StartXmitCmd); 927 } 928 929 return data_count; 930 } 931 932 static inline void check_modem_status(struct icom_port *icom_port) 933 { 934 static char old_status = 0; 935 char delta_status; 936 unsigned char status; 937 938 spin_lock(&icom_port->uart_port.lock); 939 940 /*modem input register */ 941 status = readb(&icom_port->dram->isr); 942 trace(icom_port, "CHECK_MODEM", status); 943 delta_status = status ^ old_status; 944 if (delta_status) { 945 if (delta_status & ICOM_RI) 946 icom_port->uart_port.icount.rng++; 947 if (delta_status & ICOM_DSR) 948 icom_port->uart_port.icount.dsr++; 949 if (delta_status & ICOM_DCD) 950 uart_handle_dcd_change(&icom_port->uart_port, 951 delta_status & ICOM_DCD); 952 if (delta_status & ICOM_CTS) 953 uart_handle_cts_change(&icom_port->uart_port, 954 delta_status & ICOM_CTS); 955 956 wake_up_interruptible(&icom_port->uart_port.state-> 957 port.delta_msr_wait); 958 old_status = status; 959 } 960 spin_unlock(&icom_port->uart_port.lock); 961 } 962 963 static void xmit_interrupt(u16 port_int_reg, struct icom_port *icom_port) 964 { 965 u16 count, i; 966 967 if (port_int_reg & (INT_XMIT_COMPLETED)) { 968 trace(icom_port, "XMIT_COMPLETE", 0); 969 970 /* clear buffer in use bit */ 971 icom_port->statStg->xmit[0].flags &= 972 cpu_to_le16(~SA_FLAGS_READY_TO_XMIT); 973 974 count = le16_to_cpu(icom_port->statStg->xmit[0].leLength); 975 icom_port->uart_port.icount.tx += count; 976 977 for (i=0; i<count && 978 !uart_circ_empty(&icom_port->uart_port.state->xmit); i++) { 979 980 icom_port->uart_port.state->xmit.tail++; 981 icom_port->uart_port.state->xmit.tail &= 982 (UART_XMIT_SIZE - 1); 983 } 984 985 if (!icom_write(&icom_port->uart_port)) 986 /* activate write queue */ 987 uart_write_wakeup(&icom_port->uart_port); 988 } else 989 trace(icom_port, "XMIT_DISABLED", 0); 990 } 991 992 static void recv_interrupt(u16 port_int_reg, struct icom_port *icom_port) 993 { 994 short int count, rcv_buff; 995 struct tty_port *port = &icom_port->uart_port.state->port; 996 u16 status; 997 struct uart_icount *icount; 998 unsigned long offset; 999 unsigned char flag; 1000 1001 trace(icom_port, "RCV_COMPLETE", 0); 1002 rcv_buff = icom_port->next_rcv; 1003 1004 status = le16_to_cpu(icom_port->statStg->rcv[rcv_buff].flags); 1005 while (status & SA_FL_RCV_DONE) { 1006 int first = -1; 1007 1008 trace(icom_port, "FID_STATUS", status); 1009 count = le16_to_cpu(icom_port->statStg->rcv[rcv_buff].leLength); 1010 1011 trace(icom_port, "RCV_COUNT", count); 1012 1013 trace(icom_port, "REAL_COUNT", count); 1014 1015 offset = le32_to_cpu(icom_port->statStg->rcv[rcv_buff].leBuffer) - 1016 icom_port->recv_buf_pci; 1017 1018 /* Block copy all but the last byte as this may have status */ 1019 if (count > 0) { 1020 first = icom_port->recv_buf[offset]; 1021 tty_insert_flip_string(port, icom_port->recv_buf + offset, count - 1); 1022 } 1023 1024 icount = &icom_port->uart_port.icount; 1025 icount->rx += count; 1026 1027 /* Break detect logic */ 1028 if ((status & SA_FLAGS_FRAME_ERROR) 1029 && first == 0) { 1030 status &= ~SA_FLAGS_FRAME_ERROR; 1031 status |= SA_FLAGS_BREAK_DET; 1032 trace(icom_port, "BREAK_DET", 0); 1033 } 1034 1035 flag = TTY_NORMAL; 1036 1037 if (status & 1038 (SA_FLAGS_BREAK_DET | SA_FLAGS_PARITY_ERROR | 1039 SA_FLAGS_FRAME_ERROR | SA_FLAGS_OVERRUN)) { 1040 1041 if (status & SA_FLAGS_BREAK_DET) 1042 icount->brk++; 1043 if (status & SA_FLAGS_PARITY_ERROR) 1044 icount->parity++; 1045 if (status & SA_FLAGS_FRAME_ERROR) 1046 icount->frame++; 1047 if (status & SA_FLAGS_OVERRUN) 1048 icount->overrun++; 1049 1050 /* 1051 * Now check to see if character should be 1052 * ignored, and mask off conditions which 1053 * should be ignored. 1054 */ 1055 if (status & icom_port->ignore_status_mask) { 1056 trace(icom_port, "IGNORE_CHAR", 0); 1057 goto ignore_char; 1058 } 1059 1060 status &= icom_port->read_status_mask; 1061 1062 if (status & SA_FLAGS_BREAK_DET) { 1063 flag = TTY_BREAK; 1064 } else if (status & SA_FLAGS_PARITY_ERROR) { 1065 trace(icom_port, "PARITY_ERROR", 0); 1066 flag = TTY_PARITY; 1067 } else if (status & SA_FLAGS_FRAME_ERROR) 1068 flag = TTY_FRAME; 1069 1070 } 1071 1072 tty_insert_flip_char(port, *(icom_port->recv_buf + offset + count - 1), flag); 1073 1074 if (status & SA_FLAGS_OVERRUN) 1075 /* 1076 * Overrun is special, since it's 1077 * reported immediately, and doesn't 1078 * affect the current character 1079 */ 1080 tty_insert_flip_char(port, 0, TTY_OVERRUN); 1081 ignore_char: 1082 icom_port->statStg->rcv[rcv_buff].flags = 0; 1083 icom_port->statStg->rcv[rcv_buff].leLength = 0; 1084 icom_port->statStg->rcv[rcv_buff].WorkingLength = 1085 cpu_to_le16(RCV_BUFF_SZ); 1086 1087 rcv_buff++; 1088 if (rcv_buff == NUM_RBUFFS) 1089 rcv_buff = 0; 1090 1091 status = le16_to_cpu(icom_port->statStg->rcv[rcv_buff].flags); 1092 } 1093 icom_port->next_rcv = rcv_buff; 1094 1095 tty_flip_buffer_push(port); 1096 } 1097 1098 static void process_interrupt(u16 port_int_reg, 1099 struct icom_port *icom_port) 1100 { 1101 1102 spin_lock(&icom_port->uart_port.lock); 1103 trace(icom_port, "INTERRUPT", port_int_reg); 1104 1105 if (port_int_reg & (INT_XMIT_COMPLETED | INT_XMIT_DISABLED)) 1106 xmit_interrupt(port_int_reg, icom_port); 1107 1108 if (port_int_reg & INT_RCV_COMPLETED) 1109 recv_interrupt(port_int_reg, icom_port); 1110 1111 spin_unlock(&icom_port->uart_port.lock); 1112 } 1113 1114 static irqreturn_t icom_interrupt(int irq, void *dev_id) 1115 { 1116 void __iomem * int_reg; 1117 u32 adapter_interrupts; 1118 u16 port_int_reg; 1119 struct icom_adapter *icom_adapter; 1120 struct icom_port *icom_port; 1121 1122 /* find icom_port for this interrupt */ 1123 icom_adapter = (struct icom_adapter *) dev_id; 1124 1125 if (icom_adapter->version == ADAPTER_V2) { 1126 int_reg = icom_adapter->base_addr + 0x8024; 1127 1128 adapter_interrupts = readl(int_reg); 1129 1130 if (adapter_interrupts & 0x00003FFF) { 1131 /* port 2 interrupt, NOTE: for all ADAPTER_V2, port 2 will be active */ 1132 icom_port = &icom_adapter->port_info[2]; 1133 port_int_reg = (u16) adapter_interrupts; 1134 process_interrupt(port_int_reg, icom_port); 1135 check_modem_status(icom_port); 1136 } 1137 if (adapter_interrupts & 0x3FFF0000) { 1138 /* port 3 interrupt */ 1139 icom_port = &icom_adapter->port_info[3]; 1140 if (icom_port->status == ICOM_PORT_ACTIVE) { 1141 port_int_reg = 1142 (u16) (adapter_interrupts >> 16); 1143 process_interrupt(port_int_reg, icom_port); 1144 check_modem_status(icom_port); 1145 } 1146 } 1147 1148 /* Clear out any pending interrupts */ 1149 writel(adapter_interrupts, int_reg); 1150 1151 int_reg = icom_adapter->base_addr + 0x8004; 1152 } else { 1153 int_reg = icom_adapter->base_addr + 0x4004; 1154 } 1155 1156 adapter_interrupts = readl(int_reg); 1157 1158 if (adapter_interrupts & 0x00003FFF) { 1159 /* port 0 interrupt, NOTE: for all adapters, port 0 will be active */ 1160 icom_port = &icom_adapter->port_info[0]; 1161 port_int_reg = (u16) adapter_interrupts; 1162 process_interrupt(port_int_reg, icom_port); 1163 check_modem_status(icom_port); 1164 } 1165 if (adapter_interrupts & 0x3FFF0000) { 1166 /* port 1 interrupt */ 1167 icom_port = &icom_adapter->port_info[1]; 1168 if (icom_port->status == ICOM_PORT_ACTIVE) { 1169 port_int_reg = (u16) (adapter_interrupts >> 16); 1170 process_interrupt(port_int_reg, icom_port); 1171 check_modem_status(icom_port); 1172 } 1173 } 1174 1175 /* Clear out any pending interrupts */ 1176 writel(adapter_interrupts, int_reg); 1177 1178 /* flush the write */ 1179 adapter_interrupts = readl(int_reg); 1180 1181 return IRQ_HANDLED; 1182 } 1183 1184 /* 1185 * ------------------------------------------------------------------ 1186 * Begin serial-core API 1187 * ------------------------------------------------------------------ 1188 */ 1189 static unsigned int icom_tx_empty(struct uart_port *port) 1190 { 1191 struct icom_port *icom_port = to_icom_port(port); 1192 int ret; 1193 unsigned long flags; 1194 1195 spin_lock_irqsave(&port->lock, flags); 1196 if (le16_to_cpu(icom_port->statStg->xmit[0].flags) & 1197 SA_FLAGS_READY_TO_XMIT) 1198 ret = TIOCSER_TEMT; 1199 else 1200 ret = 0; 1201 1202 spin_unlock_irqrestore(&port->lock, flags); 1203 return ret; 1204 } 1205 1206 static void icom_set_mctrl(struct uart_port *port, unsigned int mctrl) 1207 { 1208 struct icom_port *icom_port = to_icom_port(port); 1209 unsigned char local_osr; 1210 1211 trace(icom_port, "SET_MODEM", 0); 1212 local_osr = readb(&icom_port->dram->osr); 1213 1214 if (mctrl & TIOCM_RTS) { 1215 trace(icom_port, "RAISE_RTS", 0); 1216 local_osr |= ICOM_RTS; 1217 } else { 1218 trace(icom_port, "LOWER_RTS", 0); 1219 local_osr &= ~ICOM_RTS; 1220 } 1221 1222 if (mctrl & TIOCM_DTR) { 1223 trace(icom_port, "RAISE_DTR", 0); 1224 local_osr |= ICOM_DTR; 1225 } else { 1226 trace(icom_port, "LOWER_DTR", 0); 1227 local_osr &= ~ICOM_DTR; 1228 } 1229 1230 writeb(local_osr, &icom_port->dram->osr); 1231 } 1232 1233 static unsigned int icom_get_mctrl(struct uart_port *port) 1234 { 1235 struct icom_port *icom_port = to_icom_port(port); 1236 unsigned char status; 1237 unsigned int result; 1238 1239 trace(icom_port, "GET_MODEM", 0); 1240 1241 status = readb(&icom_port->dram->isr); 1242 1243 result = ((status & ICOM_DCD) ? TIOCM_CAR : 0) 1244 | ((status & ICOM_RI) ? TIOCM_RNG : 0) 1245 | ((status & ICOM_DSR) ? TIOCM_DSR : 0) 1246 | ((status & ICOM_CTS) ? TIOCM_CTS : 0); 1247 return result; 1248 } 1249 1250 static void icom_stop_tx(struct uart_port *port) 1251 { 1252 struct icom_port *icom_port = to_icom_port(port); 1253 unsigned char cmdReg; 1254 1255 trace(icom_port, "STOP", 0); 1256 cmdReg = readb(&icom_port->dram->CmdReg); 1257 writeb(cmdReg | CMD_HOLD_XMIT, &icom_port->dram->CmdReg); 1258 } 1259 1260 static void icom_start_tx(struct uart_port *port) 1261 { 1262 struct icom_port *icom_port = to_icom_port(port); 1263 unsigned char cmdReg; 1264 1265 trace(icom_port, "START", 0); 1266 cmdReg = readb(&icom_port->dram->CmdReg); 1267 if ((cmdReg & CMD_HOLD_XMIT) == CMD_HOLD_XMIT) 1268 writeb(cmdReg & ~CMD_HOLD_XMIT, 1269 &icom_port->dram->CmdReg); 1270 1271 icom_write(port); 1272 } 1273 1274 static void icom_send_xchar(struct uart_port *port, char ch) 1275 { 1276 struct icom_port *icom_port = to_icom_port(port); 1277 unsigned char xdata; 1278 int index; 1279 unsigned long flags; 1280 1281 trace(icom_port, "SEND_XCHAR", ch); 1282 1283 /* wait .1 sec to send char */ 1284 for (index = 0; index < 10; index++) { 1285 spin_lock_irqsave(&port->lock, flags); 1286 xdata = readb(&icom_port->dram->xchar); 1287 if (xdata == 0x00) { 1288 trace(icom_port, "QUICK_WRITE", 0); 1289 writeb(ch, &icom_port->dram->xchar); 1290 1291 /* flush write operation */ 1292 xdata = readb(&icom_port->dram->xchar); 1293 spin_unlock_irqrestore(&port->lock, flags); 1294 break; 1295 } 1296 spin_unlock_irqrestore(&port->lock, flags); 1297 msleep(10); 1298 } 1299 } 1300 1301 static void icom_stop_rx(struct uart_port *port) 1302 { 1303 struct icom_port *icom_port = to_icom_port(port); 1304 unsigned char cmdReg; 1305 1306 cmdReg = readb(&icom_port->dram->CmdReg); 1307 writeb(cmdReg & ~CMD_RCV_ENABLE, &icom_port->dram->CmdReg); 1308 } 1309 1310 static void icom_break(struct uart_port *port, int break_state) 1311 { 1312 struct icom_port *icom_port = to_icom_port(port); 1313 unsigned char cmdReg; 1314 unsigned long flags; 1315 1316 spin_lock_irqsave(&port->lock, flags); 1317 trace(icom_port, "BREAK", 0); 1318 cmdReg = readb(&icom_port->dram->CmdReg); 1319 if (break_state == -1) { 1320 writeb(cmdReg | CMD_SND_BREAK, &icom_port->dram->CmdReg); 1321 } else { 1322 writeb(cmdReg & ~CMD_SND_BREAK, &icom_port->dram->CmdReg); 1323 } 1324 spin_unlock_irqrestore(&port->lock, flags); 1325 } 1326 1327 static int icom_open(struct uart_port *port) 1328 { 1329 struct icom_port *icom_port = to_icom_port(port); 1330 int retval; 1331 1332 kref_get(&icom_port->adapter->kref); 1333 retval = startup(icom_port); 1334 1335 if (retval) { 1336 kref_put(&icom_port->adapter->kref, icom_kref_release); 1337 trace(icom_port, "STARTUP_ERROR", 0); 1338 return retval; 1339 } 1340 1341 return 0; 1342 } 1343 1344 static void icom_close(struct uart_port *port) 1345 { 1346 struct icom_port *icom_port = to_icom_port(port); 1347 unsigned char cmdReg; 1348 1349 trace(icom_port, "CLOSE", 0); 1350 1351 /* stop receiver */ 1352 cmdReg = readb(&icom_port->dram->CmdReg); 1353 writeb(cmdReg & ~CMD_RCV_ENABLE, &icom_port->dram->CmdReg); 1354 1355 shutdown(icom_port); 1356 1357 kref_put(&icom_port->adapter->kref, icom_kref_release); 1358 } 1359 1360 static void icom_set_termios(struct uart_port *port, 1361 struct ktermios *termios, 1362 struct ktermios *old_termios) 1363 { 1364 struct icom_port *icom_port = to_icom_port(port); 1365 int baud; 1366 unsigned cflag, iflag; 1367 char new_config2; 1368 char new_config3 = 0; 1369 char tmp_byte; 1370 int index; 1371 int rcv_buff, xmit_buff; 1372 unsigned long offset; 1373 unsigned long flags; 1374 1375 spin_lock_irqsave(&port->lock, flags); 1376 trace(icom_port, "CHANGE_SPEED", 0); 1377 1378 cflag = termios->c_cflag; 1379 iflag = termios->c_iflag; 1380 1381 new_config2 = ICOM_ACFG_DRIVE1; 1382 1383 /* byte size and parity */ 1384 switch (cflag & CSIZE) { 1385 case CS5: /* 5 bits/char */ 1386 new_config2 |= ICOM_ACFG_5BPC; 1387 break; 1388 case CS6: /* 6 bits/char */ 1389 new_config2 |= ICOM_ACFG_6BPC; 1390 break; 1391 case CS7: /* 7 bits/char */ 1392 new_config2 |= ICOM_ACFG_7BPC; 1393 break; 1394 case CS8: /* 8 bits/char */ 1395 new_config2 |= ICOM_ACFG_8BPC; 1396 break; 1397 default: 1398 break; 1399 } 1400 if (cflag & CSTOPB) { 1401 /* 2 stop bits */ 1402 new_config2 |= ICOM_ACFG_2STOP_BIT; 1403 } 1404 if (cflag & PARENB) { 1405 /* parity bit enabled */ 1406 new_config2 |= ICOM_ACFG_PARITY_ENAB; 1407 trace(icom_port, "PARENB", 0); 1408 } 1409 if (cflag & PARODD) { 1410 /* odd parity */ 1411 new_config2 |= ICOM_ACFG_PARITY_ODD; 1412 trace(icom_port, "PARODD", 0); 1413 } 1414 1415 /* Determine divisor based on baud rate */ 1416 baud = uart_get_baud_rate(port, termios, old_termios, 1417 icom_acfg_baud[0], 1418 icom_acfg_baud[BAUD_TABLE_LIMIT]); 1419 if (!baud) 1420 baud = 9600; /* B0 transition handled in rs_set_termios */ 1421 1422 for (index = 0; index < BAUD_TABLE_LIMIT; index++) { 1423 if (icom_acfg_baud[index] == baud) { 1424 new_config3 = index; 1425 break; 1426 } 1427 } 1428 1429 uart_update_timeout(port, cflag, baud); 1430 1431 /* CTS flow control flag and modem status interrupts */ 1432 tmp_byte = readb(&(icom_port->dram->HDLCConfigReg)); 1433 if (cflag & CRTSCTS) 1434 tmp_byte |= HDLC_HDW_FLOW; 1435 else 1436 tmp_byte &= ~HDLC_HDW_FLOW; 1437 writeb(tmp_byte, &(icom_port->dram->HDLCConfigReg)); 1438 1439 /* 1440 * Set up parity check flag 1441 */ 1442 icom_port->read_status_mask = SA_FLAGS_OVERRUN | SA_FL_RCV_DONE; 1443 if (iflag & INPCK) 1444 icom_port->read_status_mask |= 1445 SA_FLAGS_FRAME_ERROR | SA_FLAGS_PARITY_ERROR; 1446 1447 if ((iflag & BRKINT) || (iflag & PARMRK)) 1448 icom_port->read_status_mask |= SA_FLAGS_BREAK_DET; 1449 1450 /* 1451 * Characters to ignore 1452 */ 1453 icom_port->ignore_status_mask = 0; 1454 if (iflag & IGNPAR) 1455 icom_port->ignore_status_mask |= 1456 SA_FLAGS_PARITY_ERROR | SA_FLAGS_FRAME_ERROR; 1457 if (iflag & IGNBRK) { 1458 icom_port->ignore_status_mask |= SA_FLAGS_BREAK_DET; 1459 /* 1460 * If we're ignore parity and break indicators, ignore 1461 * overruns too. (For real raw support). 1462 */ 1463 if (iflag & IGNPAR) 1464 icom_port->ignore_status_mask |= SA_FLAGS_OVERRUN; 1465 } 1466 1467 /* 1468 * !!! ignore all characters if CREAD is not set 1469 */ 1470 if ((cflag & CREAD) == 0) 1471 icom_port->ignore_status_mask |= SA_FL_RCV_DONE; 1472 1473 /* Turn off Receiver to prepare for reset */ 1474 writeb(CMD_RCV_DISABLE, &icom_port->dram->CmdReg); 1475 1476 for (index = 0; index < 10; index++) { 1477 if (readb(&icom_port->dram->PrevCmdReg) == 0x00) { 1478 break; 1479 } 1480 } 1481 1482 /* clear all current buffers of data */ 1483 for (rcv_buff = 0; rcv_buff < NUM_RBUFFS; rcv_buff++) { 1484 icom_port->statStg->rcv[rcv_buff].flags = 0; 1485 icom_port->statStg->rcv[rcv_buff].leLength = 0; 1486 icom_port->statStg->rcv[rcv_buff].WorkingLength = 1487 cpu_to_le16(RCV_BUFF_SZ); 1488 } 1489 1490 for (xmit_buff = 0; xmit_buff < NUM_XBUFFS; xmit_buff++) { 1491 icom_port->statStg->xmit[xmit_buff].flags = 0; 1492 } 1493 1494 /* activate changes and start xmit and receiver here */ 1495 /* Enable the receiver */ 1496 writeb(new_config3, &(icom_port->dram->async_config3)); 1497 writeb(new_config2, &(icom_port->dram->async_config2)); 1498 tmp_byte = readb(&(icom_port->dram->HDLCConfigReg)); 1499 tmp_byte |= HDLC_PPP_PURE_ASYNC | HDLC_FF_FILL; 1500 writeb(tmp_byte, &(icom_port->dram->HDLCConfigReg)); 1501 writeb(0x04, &(icom_port->dram->FlagFillIdleTimer)); /* 0.5 seconds */ 1502 writeb(0xFF, &(icom_port->dram->ier)); /* enable modem signal interrupts */ 1503 1504 /* reset processor */ 1505 writeb(CMD_RESTART, &icom_port->dram->CmdReg); 1506 1507 for (index = 0; index < 10; index++) { 1508 if (readb(&icom_port->dram->CmdReg) == 0x00) { 1509 break; 1510 } 1511 } 1512 1513 /* Enable Transmitter and Receiver */ 1514 offset = 1515 (unsigned long) &icom_port->statStg->rcv[0] - 1516 (unsigned long) icom_port->statStg; 1517 writel(icom_port->statStg_pci + offset, 1518 &icom_port->dram->RcvStatusAddr); 1519 icom_port->next_rcv = 0; 1520 icom_port->put_length = 0; 1521 *icom_port->xmitRestart = 0; 1522 writel(icom_port->xmitRestart_pci, 1523 &icom_port->dram->XmitStatusAddr); 1524 trace(icom_port, "XR_ENAB", 0); 1525 writeb(CMD_XMIT_RCV_ENABLE, &icom_port->dram->CmdReg); 1526 1527 spin_unlock_irqrestore(&port->lock, flags); 1528 } 1529 1530 static const char *icom_type(struct uart_port *port) 1531 { 1532 return "icom"; 1533 } 1534 1535 static void icom_config_port(struct uart_port *port, int flags) 1536 { 1537 port->type = PORT_ICOM; 1538 } 1539 1540 static const struct uart_ops icom_ops = { 1541 .tx_empty = icom_tx_empty, 1542 .set_mctrl = icom_set_mctrl, 1543 .get_mctrl = icom_get_mctrl, 1544 .stop_tx = icom_stop_tx, 1545 .start_tx = icom_start_tx, 1546 .send_xchar = icom_send_xchar, 1547 .stop_rx = icom_stop_rx, 1548 .break_ctl = icom_break, 1549 .startup = icom_open, 1550 .shutdown = icom_close, 1551 .set_termios = icom_set_termios, 1552 .type = icom_type, 1553 .config_port = icom_config_port, 1554 }; 1555 1556 #define ICOM_CONSOLE NULL 1557 1558 static struct uart_driver icom_uart_driver = { 1559 .owner = THIS_MODULE, 1560 .driver_name = ICOM_DRIVER_NAME, 1561 .dev_name = "ttyA", 1562 .major = ICOM_MAJOR, 1563 .minor = ICOM_MINOR_START, 1564 .nr = NR_PORTS, 1565 .cons = ICOM_CONSOLE, 1566 }; 1567 1568 static int icom_init_ports(struct icom_adapter *icom_adapter) 1569 { 1570 u32 subsystem_id = icom_adapter->subsystem_id; 1571 int i; 1572 struct icom_port *icom_port; 1573 1574 if (icom_adapter->version == ADAPTER_V1) { 1575 icom_adapter->numb_ports = 2; 1576 1577 for (i = 0; i < 2; i++) { 1578 icom_port = &icom_adapter->port_info[i]; 1579 icom_port->port = i; 1580 icom_port->status = ICOM_PORT_ACTIVE; 1581 icom_port->imbed_modem = ICOM_UNKNOWN; 1582 } 1583 } else { 1584 if (subsystem_id == PCI_DEVICE_ID_IBM_ICOM_FOUR_PORT_MODEL) { 1585 icom_adapter->numb_ports = 4; 1586 1587 for (i = 0; i < 4; i++) { 1588 icom_port = &icom_adapter->port_info[i]; 1589 1590 icom_port->port = i; 1591 icom_port->status = ICOM_PORT_ACTIVE; 1592 icom_port->imbed_modem = ICOM_IMBED_MODEM; 1593 } 1594 } else { 1595 icom_adapter->numb_ports = 4; 1596 1597 icom_adapter->port_info[0].port = 0; 1598 icom_adapter->port_info[0].status = ICOM_PORT_ACTIVE; 1599 1600 if (subsystem_id == 1601 PCI_DEVICE_ID_IBM_ICOM_V2_ONE_PORT_RVX_ONE_PORT_MDM) { 1602 icom_adapter->port_info[0].imbed_modem = ICOM_IMBED_MODEM; 1603 } else { 1604 icom_adapter->port_info[0].imbed_modem = ICOM_RVX; 1605 } 1606 1607 icom_adapter->port_info[1].status = ICOM_PORT_OFF; 1608 1609 icom_adapter->port_info[2].port = 2; 1610 icom_adapter->port_info[2].status = ICOM_PORT_ACTIVE; 1611 icom_adapter->port_info[2].imbed_modem = ICOM_RVX; 1612 icom_adapter->port_info[3].status = ICOM_PORT_OFF; 1613 } 1614 } 1615 1616 return 0; 1617 } 1618 1619 static void icom_port_active(struct icom_port *icom_port, struct icom_adapter *icom_adapter, int port_num) 1620 { 1621 if (icom_adapter->version == ADAPTER_V1) { 1622 icom_port->global_reg = icom_adapter->base_addr + 0x4000; 1623 icom_port->int_reg = icom_adapter->base_addr + 1624 0x4004 + 2 - 2 * port_num; 1625 } else { 1626 icom_port->global_reg = icom_adapter->base_addr + 0x8000; 1627 if (icom_port->port < 2) 1628 icom_port->int_reg = icom_adapter->base_addr + 1629 0x8004 + 2 - 2 * icom_port->port; 1630 else 1631 icom_port->int_reg = icom_adapter->base_addr + 1632 0x8024 + 2 - 2 * (icom_port->port - 2); 1633 } 1634 } 1635 static int icom_load_ports(struct icom_adapter *icom_adapter) 1636 { 1637 struct icom_port *icom_port; 1638 int port_num; 1639 1640 for (port_num = 0; port_num < icom_adapter->numb_ports; port_num++) { 1641 1642 icom_port = &icom_adapter->port_info[port_num]; 1643 1644 if (icom_port->status == ICOM_PORT_ACTIVE) { 1645 icom_port_active(icom_port, icom_adapter, port_num); 1646 icom_port->dram = icom_adapter->base_addr + 1647 0x2000 * icom_port->port; 1648 1649 icom_port->adapter = icom_adapter; 1650 1651 /* get port memory */ 1652 if (get_port_memory(icom_port) != 0) { 1653 dev_err(&icom_port->adapter->pci_dev->dev, 1654 "Memory allocation for port FAILED\n"); 1655 } 1656 } 1657 } 1658 return 0; 1659 } 1660 1661 static int icom_alloc_adapter(struct icom_adapter 1662 **icom_adapter_ref) 1663 { 1664 int adapter_count = 0; 1665 struct icom_adapter *icom_adapter; 1666 struct icom_adapter *cur_adapter_entry; 1667 1668 icom_adapter = kzalloc(sizeof(struct icom_adapter), GFP_KERNEL); 1669 1670 if (!icom_adapter) { 1671 return -ENOMEM; 1672 } 1673 1674 list_for_each_entry(cur_adapter_entry, &icom_adapter_head, 1675 icom_adapter_entry) { 1676 if (cur_adapter_entry->index != adapter_count) { 1677 break; 1678 } 1679 adapter_count++; 1680 } 1681 1682 icom_adapter->index = adapter_count; 1683 list_add_tail(&icom_adapter->icom_adapter_entry, 1684 &cur_adapter_entry->icom_adapter_entry); 1685 1686 *icom_adapter_ref = icom_adapter; 1687 return 0; 1688 } 1689 1690 static void icom_free_adapter(struct icom_adapter *icom_adapter) 1691 { 1692 list_del(&icom_adapter->icom_adapter_entry); 1693 kfree(icom_adapter); 1694 } 1695 1696 static void icom_kref_release(struct kref *kref) 1697 { 1698 struct icom_adapter *icom_adapter = container_of(kref, 1699 struct icom_adapter, kref); 1700 struct icom_port *icom_port; 1701 int index; 1702 1703 for (index = 0; index < icom_adapter->numb_ports; index++) { 1704 icom_port = &icom_adapter->port_info[index]; 1705 1706 if (icom_port->status == ICOM_PORT_ACTIVE) { 1707 dev_info(&icom_adapter->pci_dev->dev, 1708 "Device removed\n"); 1709 1710 uart_remove_one_port(&icom_uart_driver, 1711 &icom_port->uart_port); 1712 1713 /* be sure that DTR and RTS are dropped */ 1714 writeb(0x00, &icom_port->dram->osr); 1715 1716 /* Wait 0.1 Sec for simple Init to complete */ 1717 msleep(100); 1718 1719 /* Stop proccessor */ 1720 stop_processor(icom_port); 1721 1722 free_port_memory(icom_port); 1723 } 1724 } 1725 1726 free_irq(icom_adapter->pci_dev->irq, (void *) icom_adapter); 1727 iounmap(icom_adapter->base_addr); 1728 pci_release_regions(icom_adapter->pci_dev); 1729 icom_free_adapter(icom_adapter); 1730 } 1731 1732 static int icom_probe(struct pci_dev *dev, 1733 const struct pci_device_id *ent) 1734 { 1735 int index; 1736 unsigned int command_reg; 1737 int retval; 1738 struct icom_adapter *icom_adapter; 1739 struct icom_port *icom_port; 1740 1741 retval = pci_enable_device(dev); 1742 if (retval) { 1743 dev_err(&dev->dev, "Device enable FAILED\n"); 1744 return retval; 1745 } 1746 1747 retval = pci_request_regions(dev, "icom"); 1748 if (retval) { 1749 dev_err(&dev->dev, "pci_request_regions FAILED\n"); 1750 pci_disable_device(dev); 1751 return retval; 1752 } 1753 1754 pci_set_master(dev); 1755 1756 retval = pci_read_config_dword(dev, PCI_COMMAND, &command_reg); 1757 if (retval) { 1758 dev_err(&dev->dev, "PCI Config read FAILED\n"); 1759 goto probe_exit0; 1760 } 1761 1762 pci_write_config_dword(dev, PCI_COMMAND, 1763 command_reg | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER 1764 | PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 1765 1766 if (ent->driver_data == ADAPTER_V1) { 1767 pci_write_config_dword(dev, 0x44, 0x8300830A); 1768 } else { 1769 pci_write_config_dword(dev, 0x44, 0x42004200); 1770 pci_write_config_dword(dev, 0x48, 0x42004200); 1771 } 1772 1773 1774 retval = icom_alloc_adapter(&icom_adapter); 1775 if (retval) { 1776 dev_err(&dev->dev, "icom_alloc_adapter FAILED\n"); 1777 retval = -EIO; 1778 goto probe_exit0; 1779 } 1780 1781 icom_adapter->base_addr_pci = pci_resource_start(dev, 0); 1782 icom_adapter->pci_dev = dev; 1783 icom_adapter->version = ent->driver_data; 1784 icom_adapter->subsystem_id = ent->subdevice; 1785 1786 1787 retval = icom_init_ports(icom_adapter); 1788 if (retval) { 1789 dev_err(&dev->dev, "Port configuration failed\n"); 1790 goto probe_exit1; 1791 } 1792 1793 icom_adapter->base_addr = pci_ioremap_bar(dev, 0); 1794 1795 if (!icom_adapter->base_addr) { 1796 retval = -ENOMEM; 1797 goto probe_exit1; 1798 } 1799 1800 /* save off irq and request irq line */ 1801 retval = request_irq(dev->irq, icom_interrupt, IRQF_SHARED, ICOM_DRIVER_NAME, (void *)icom_adapter); 1802 if (retval) { 1803 goto probe_exit2; 1804 } 1805 1806 retval = icom_load_ports(icom_adapter); 1807 1808 for (index = 0; index < icom_adapter->numb_ports; index++) { 1809 icom_port = &icom_adapter->port_info[index]; 1810 1811 if (icom_port->status == ICOM_PORT_ACTIVE) { 1812 icom_port->uart_port.irq = icom_port->adapter->pci_dev->irq; 1813 icom_port->uart_port.type = PORT_ICOM; 1814 icom_port->uart_port.iotype = UPIO_MEM; 1815 icom_port->uart_port.membase = 1816 (unsigned char __iomem *)icom_adapter->base_addr_pci; 1817 icom_port->uart_port.fifosize = 16; 1818 icom_port->uart_port.ops = &icom_ops; 1819 icom_port->uart_port.line = 1820 icom_port->port + icom_adapter->index * 4; 1821 if (uart_add_one_port (&icom_uart_driver, &icom_port->uart_port)) { 1822 icom_port->status = ICOM_PORT_OFF; 1823 dev_err(&dev->dev, "Device add failed\n"); 1824 } else 1825 dev_info(&dev->dev, "Device added\n"); 1826 } 1827 } 1828 1829 kref_init(&icom_adapter->kref); 1830 return 0; 1831 1832 probe_exit2: 1833 iounmap(icom_adapter->base_addr); 1834 probe_exit1: 1835 icom_free_adapter(icom_adapter); 1836 1837 probe_exit0: 1838 pci_release_regions(dev); 1839 pci_disable_device(dev); 1840 1841 return retval; 1842 } 1843 1844 static void icom_remove(struct pci_dev *dev) 1845 { 1846 struct icom_adapter *icom_adapter; 1847 1848 list_for_each_entry(icom_adapter, &icom_adapter_head, 1849 icom_adapter_entry) { 1850 if (icom_adapter->pci_dev == dev) { 1851 kref_put(&icom_adapter->kref, icom_kref_release); 1852 return; 1853 } 1854 } 1855 1856 dev_err(&dev->dev, "Unable to find device to remove\n"); 1857 } 1858 1859 static struct pci_driver icom_pci_driver = { 1860 .name = ICOM_DRIVER_NAME, 1861 .id_table = icom_pci_table, 1862 .probe = icom_probe, 1863 .remove = icom_remove, 1864 }; 1865 1866 static int __init icom_init(void) 1867 { 1868 int ret; 1869 1870 ret = uart_register_driver(&icom_uart_driver); 1871 if (ret) 1872 return ret; 1873 1874 ret = pci_register_driver(&icom_pci_driver); 1875 1876 if (ret < 0) 1877 uart_unregister_driver(&icom_uart_driver); 1878 1879 return ret; 1880 } 1881 1882 static void __exit icom_exit(void) 1883 { 1884 pci_unregister_driver(&icom_pci_driver); 1885 uart_unregister_driver(&icom_uart_driver); 1886 } 1887 1888 module_init(icom_init); 1889 module_exit(icom_exit); 1890 1891 MODULE_AUTHOR("Michael Anderson <mjanders@us.ibm.com>"); 1892 MODULE_DESCRIPTION("IBM iSeries Serial IOA driver"); 1893 MODULE_LICENSE("GPL"); 1894 MODULE_FIRMWARE("icom_call_setup.bin"); 1895 MODULE_FIRMWARE("icom_res_dce.bin"); 1896 MODULE_FIRMWARE("icom_asc.bin"); 1897