1 /* 2 * dz.c: Serial port driver for DECstations equipped 3 * with the DZ chipset. 4 * 5 * Copyright (C) 1998 Olivier A. D. Lebaillif 6 * 7 * Email: olivier.lebaillif@ifrsys.com 8 * 9 * Copyright (C) 2004, 2006, 2007 Maciej W. Rozycki 10 * 11 * [31-AUG-98] triemer 12 * Changed IRQ to use Harald's dec internals interrupts.h 13 * removed base_addr code - moving address assignment to setup.c 14 * Changed name of dz_init to rs_init to be consistent with tc code 15 * [13-NOV-98] triemer fixed code to receive characters 16 * after patches by harald to irq code. 17 * [09-JAN-99] triemer minor fix for schedule - due to removal of timeout 18 * field from "current" - somewhere between 2.1.121 and 2.1.131 19 Qua Jun 27 15:02:26 BRT 2001 20 * [27-JUN-2001] Arnaldo Carvalho de Melo <acme@conectiva.com.br> - cleanups 21 * 22 * Parts (C) 1999 David Airlie, airlied@linux.ie 23 * [07-SEP-99] Bugfixes 24 * 25 * [06-Jan-2002] Russell King <rmk@arm.linux.org.uk> 26 * Converted to new serial core 27 */ 28 29 #undef DEBUG_DZ 30 31 #if defined(CONFIG_SERIAL_DZ_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) 32 #define SUPPORT_SYSRQ 33 #endif 34 35 #include <linux/bitops.h> 36 #include <linux/compiler.h> 37 #include <linux/console.h> 38 #include <linux/delay.h> 39 #include <linux/errno.h> 40 #include <linux/init.h> 41 #include <linux/interrupt.h> 42 #include <linux/ioport.h> 43 #include <linux/kernel.h> 44 #include <linux/major.h> 45 #include <linux/module.h> 46 #include <linux/serial.h> 47 #include <linux/serial_core.h> 48 #include <linux/sysrq.h> 49 #include <linux/tty.h> 50 #include <linux/tty_flip.h> 51 52 #include <linux/atomic.h> 53 #include <asm/bootinfo.h> 54 #include <asm/io.h> 55 #include <asm/system.h> 56 57 #include <asm/dec/interrupts.h> 58 #include <asm/dec/kn01.h> 59 #include <asm/dec/kn02.h> 60 #include <asm/dec/machtype.h> 61 #include <asm/dec/prom.h> 62 #include <asm/dec/system.h> 63 64 #include "dz.h" 65 66 67 MODULE_DESCRIPTION("DECstation DZ serial driver"); 68 MODULE_LICENSE("GPL"); 69 70 71 static char dz_name[] __initdata = "DECstation DZ serial driver version "; 72 static char dz_version[] __initdata = "1.04"; 73 74 struct dz_port { 75 struct dz_mux *mux; 76 struct uart_port port; 77 unsigned int cflag; 78 }; 79 80 struct dz_mux { 81 struct dz_port dport[DZ_NB_PORT]; 82 atomic_t map_guard; 83 atomic_t irq_guard; 84 int initialised; 85 }; 86 87 static struct dz_mux dz_mux; 88 89 static inline struct dz_port *to_dport(struct uart_port *uport) 90 { 91 return container_of(uport, struct dz_port, port); 92 } 93 94 /* 95 * ------------------------------------------------------------ 96 * dz_in () and dz_out () 97 * 98 * These routines are used to access the registers of the DZ 99 * chip, hiding relocation differences between implementation. 100 * ------------------------------------------------------------ 101 */ 102 103 static u16 dz_in(struct dz_port *dport, unsigned offset) 104 { 105 void __iomem *addr = dport->port.membase + offset; 106 107 return readw(addr); 108 } 109 110 static void dz_out(struct dz_port *dport, unsigned offset, u16 value) 111 { 112 void __iomem *addr = dport->port.membase + offset; 113 114 writew(value, addr); 115 } 116 117 /* 118 * ------------------------------------------------------------ 119 * rs_stop () and rs_start () 120 * 121 * These routines are called before setting or resetting 122 * tty->stopped. They enable or disable transmitter interrupts, 123 * as necessary. 124 * ------------------------------------------------------------ 125 */ 126 127 static void dz_stop_tx(struct uart_port *uport) 128 { 129 struct dz_port *dport = to_dport(uport); 130 u16 tmp, mask = 1 << dport->port.line; 131 132 tmp = dz_in(dport, DZ_TCR); /* read the TX flag */ 133 tmp &= ~mask; /* clear the TX flag */ 134 dz_out(dport, DZ_TCR, tmp); 135 } 136 137 static void dz_start_tx(struct uart_port *uport) 138 { 139 struct dz_port *dport = to_dport(uport); 140 u16 tmp, mask = 1 << dport->port.line; 141 142 tmp = dz_in(dport, DZ_TCR); /* read the TX flag */ 143 tmp |= mask; /* set the TX flag */ 144 dz_out(dport, DZ_TCR, tmp); 145 } 146 147 static void dz_stop_rx(struct uart_port *uport) 148 { 149 struct dz_port *dport = to_dport(uport); 150 151 dport->cflag &= ~DZ_RXENAB; 152 dz_out(dport, DZ_LPR, dport->cflag); 153 } 154 155 static void dz_enable_ms(struct uart_port *uport) 156 { 157 /* nothing to do */ 158 } 159 160 /* 161 * ------------------------------------------------------------ 162 * 163 * Here start the interrupt handling routines. All of the following 164 * subroutines are declared as inline and are folded into 165 * dz_interrupt. They were separated out for readability's sake. 166 * 167 * Note: dz_interrupt() is a "fast" interrupt, which means that it 168 * runs with interrupts turned off. People who may want to modify 169 * dz_interrupt() should try to keep the interrupt handler as fast as 170 * possible. After you are done making modifications, it is not a bad 171 * idea to do: 172 * 173 * make drivers/serial/dz.s 174 * 175 * and look at the resulting assemble code in dz.s. 176 * 177 * ------------------------------------------------------------ 178 */ 179 180 /* 181 * ------------------------------------------------------------ 182 * receive_char () 183 * 184 * This routine deals with inputs from any lines. 185 * ------------------------------------------------------------ 186 */ 187 static inline void dz_receive_chars(struct dz_mux *mux) 188 { 189 struct uart_port *uport; 190 struct dz_port *dport = &mux->dport[0]; 191 struct tty_struct *tty = NULL; 192 struct uart_icount *icount; 193 int lines_rx[DZ_NB_PORT] = { [0 ... DZ_NB_PORT - 1] = 0 }; 194 unsigned char ch, flag; 195 u16 status; 196 int i; 197 198 while ((status = dz_in(dport, DZ_RBUF)) & DZ_DVAL) { 199 dport = &mux->dport[LINE(status)]; 200 uport = &dport->port; 201 tty = uport->state->port.tty; /* point to the proper dev */ 202 203 ch = UCHAR(status); /* grab the char */ 204 flag = TTY_NORMAL; 205 206 icount = &uport->icount; 207 icount->rx++; 208 209 if (unlikely(status & (DZ_OERR | DZ_FERR | DZ_PERR))) { 210 211 /* 212 * There is no separate BREAK status bit, so treat 213 * null characters with framing errors as BREAKs; 214 * normally, otherwise. For this move the Framing 215 * Error bit to a simulated BREAK bit. 216 */ 217 if (!ch) { 218 status |= (status & DZ_FERR) >> 219 (ffs(DZ_FERR) - ffs(DZ_BREAK)); 220 status &= ~DZ_FERR; 221 } 222 223 /* Handle SysRq/SAK & keep track of the statistics. */ 224 if (status & DZ_BREAK) { 225 icount->brk++; 226 if (uart_handle_break(uport)) 227 continue; 228 } else if (status & DZ_FERR) 229 icount->frame++; 230 else if (status & DZ_PERR) 231 icount->parity++; 232 if (status & DZ_OERR) 233 icount->overrun++; 234 235 status &= uport->read_status_mask; 236 if (status & DZ_BREAK) 237 flag = TTY_BREAK; 238 else if (status & DZ_FERR) 239 flag = TTY_FRAME; 240 else if (status & DZ_PERR) 241 flag = TTY_PARITY; 242 243 } 244 245 if (uart_handle_sysrq_char(uport, ch)) 246 continue; 247 248 uart_insert_char(uport, status, DZ_OERR, ch, flag); 249 lines_rx[LINE(status)] = 1; 250 } 251 for (i = 0; i < DZ_NB_PORT; i++) 252 if (lines_rx[i]) 253 tty_flip_buffer_push(mux->dport[i].port.state->port.tty); 254 } 255 256 /* 257 * ------------------------------------------------------------ 258 * transmit_char () 259 * 260 * This routine deals with outputs to any lines. 261 * ------------------------------------------------------------ 262 */ 263 static inline void dz_transmit_chars(struct dz_mux *mux) 264 { 265 struct dz_port *dport = &mux->dport[0]; 266 struct circ_buf *xmit; 267 unsigned char tmp; 268 u16 status; 269 270 status = dz_in(dport, DZ_CSR); 271 dport = &mux->dport[LINE(status)]; 272 xmit = &dport->port.state->xmit; 273 274 if (dport->port.x_char) { /* XON/XOFF chars */ 275 dz_out(dport, DZ_TDR, dport->port.x_char); 276 dport->port.icount.tx++; 277 dport->port.x_char = 0; 278 return; 279 } 280 /* If nothing to do or stopped or hardware stopped. */ 281 if (uart_circ_empty(xmit) || uart_tx_stopped(&dport->port)) { 282 spin_lock(&dport->port.lock); 283 dz_stop_tx(&dport->port); 284 spin_unlock(&dport->port.lock); 285 return; 286 } 287 288 /* 289 * If something to do... (remember the dz has no output fifo, 290 * so we go one char at a time) :-< 291 */ 292 tmp = xmit->buf[xmit->tail]; 293 xmit->tail = (xmit->tail + 1) & (DZ_XMIT_SIZE - 1); 294 dz_out(dport, DZ_TDR, tmp); 295 dport->port.icount.tx++; 296 297 if (uart_circ_chars_pending(xmit) < DZ_WAKEUP_CHARS) 298 uart_write_wakeup(&dport->port); 299 300 /* Are we are done. */ 301 if (uart_circ_empty(xmit)) { 302 spin_lock(&dport->port.lock); 303 dz_stop_tx(&dport->port); 304 spin_unlock(&dport->port.lock); 305 } 306 } 307 308 /* 309 * ------------------------------------------------------------ 310 * check_modem_status() 311 * 312 * DS 3100 & 5100: Only valid for the MODEM line, duh! 313 * DS 5000/200: Valid for the MODEM and PRINTER line. 314 * ------------------------------------------------------------ 315 */ 316 static inline void check_modem_status(struct dz_port *dport) 317 { 318 /* 319 * FIXME: 320 * 1. No status change interrupt; use a timer. 321 * 2. Handle the 3100/5000 as appropriate. --macro 322 */ 323 u16 status; 324 325 /* If not the modem line just return. */ 326 if (dport->port.line != DZ_MODEM) 327 return; 328 329 status = dz_in(dport, DZ_MSR); 330 331 /* it's easy, since DSR2 is the only bit in the register */ 332 if (status) 333 dport->port.icount.dsr++; 334 } 335 336 /* 337 * ------------------------------------------------------------ 338 * dz_interrupt () 339 * 340 * this is the main interrupt routine for the DZ chip. 341 * It deals with the multiple ports. 342 * ------------------------------------------------------------ 343 */ 344 static irqreturn_t dz_interrupt(int irq, void *dev_id) 345 { 346 struct dz_mux *mux = dev_id; 347 struct dz_port *dport = &mux->dport[0]; 348 u16 status; 349 350 /* get the reason why we just got an irq */ 351 status = dz_in(dport, DZ_CSR); 352 353 if ((status & (DZ_RDONE | DZ_RIE)) == (DZ_RDONE | DZ_RIE)) 354 dz_receive_chars(mux); 355 356 if ((status & (DZ_TRDY | DZ_TIE)) == (DZ_TRDY | DZ_TIE)) 357 dz_transmit_chars(mux); 358 359 return IRQ_HANDLED; 360 } 361 362 /* 363 * ------------------------------------------------------------------- 364 * Here ends the DZ interrupt routines. 365 * ------------------------------------------------------------------- 366 */ 367 368 static unsigned int dz_get_mctrl(struct uart_port *uport) 369 { 370 /* 371 * FIXME: Handle the 3100/5000 as appropriate. --macro 372 */ 373 struct dz_port *dport = to_dport(uport); 374 unsigned int mctrl = TIOCM_CAR | TIOCM_DSR | TIOCM_CTS; 375 376 if (dport->port.line == DZ_MODEM) { 377 if (dz_in(dport, DZ_MSR) & DZ_MODEM_DSR) 378 mctrl &= ~TIOCM_DSR; 379 } 380 381 return mctrl; 382 } 383 384 static void dz_set_mctrl(struct uart_port *uport, unsigned int mctrl) 385 { 386 /* 387 * FIXME: Handle the 3100/5000 as appropriate. --macro 388 */ 389 struct dz_port *dport = to_dport(uport); 390 u16 tmp; 391 392 if (dport->port.line == DZ_MODEM) { 393 tmp = dz_in(dport, DZ_TCR); 394 if (mctrl & TIOCM_DTR) 395 tmp &= ~DZ_MODEM_DTR; 396 else 397 tmp |= DZ_MODEM_DTR; 398 dz_out(dport, DZ_TCR, tmp); 399 } 400 } 401 402 /* 403 * ------------------------------------------------------------------- 404 * startup () 405 * 406 * various initialization tasks 407 * ------------------------------------------------------------------- 408 */ 409 static int dz_startup(struct uart_port *uport) 410 { 411 struct dz_port *dport = to_dport(uport); 412 struct dz_mux *mux = dport->mux; 413 unsigned long flags; 414 int irq_guard; 415 int ret; 416 u16 tmp; 417 418 irq_guard = atomic_add_return(1, &mux->irq_guard); 419 if (irq_guard != 1) 420 return 0; 421 422 ret = request_irq(dport->port.irq, dz_interrupt, 423 IRQF_SHARED, "dz", mux); 424 if (ret) { 425 atomic_add(-1, &mux->irq_guard); 426 printk(KERN_ERR "dz: Cannot get IRQ %d!\n", dport->port.irq); 427 return ret; 428 } 429 430 spin_lock_irqsave(&dport->port.lock, flags); 431 432 /* Enable interrupts. */ 433 tmp = dz_in(dport, DZ_CSR); 434 tmp |= DZ_RIE | DZ_TIE; 435 dz_out(dport, DZ_CSR, tmp); 436 437 spin_unlock_irqrestore(&dport->port.lock, flags); 438 439 return 0; 440 } 441 442 /* 443 * ------------------------------------------------------------------- 444 * shutdown () 445 * 446 * This routine will shutdown a serial port; interrupts are disabled, and 447 * DTR is dropped if the hangup on close termio flag is on. 448 * ------------------------------------------------------------------- 449 */ 450 static void dz_shutdown(struct uart_port *uport) 451 { 452 struct dz_port *dport = to_dport(uport); 453 struct dz_mux *mux = dport->mux; 454 unsigned long flags; 455 int irq_guard; 456 u16 tmp; 457 458 spin_lock_irqsave(&dport->port.lock, flags); 459 dz_stop_tx(&dport->port); 460 spin_unlock_irqrestore(&dport->port.lock, flags); 461 462 irq_guard = atomic_add_return(-1, &mux->irq_guard); 463 if (!irq_guard) { 464 /* Disable interrupts. */ 465 tmp = dz_in(dport, DZ_CSR); 466 tmp &= ~(DZ_RIE | DZ_TIE); 467 dz_out(dport, DZ_CSR, tmp); 468 469 free_irq(dport->port.irq, mux); 470 } 471 } 472 473 /* 474 * ------------------------------------------------------------------- 475 * dz_tx_empty() -- get the transmitter empty status 476 * 477 * Purpose: Let user call ioctl() to get info when the UART physically 478 * is emptied. On bus types like RS485, the transmitter must 479 * release the bus after transmitting. This must be done when 480 * the transmit shift register is empty, not be done when the 481 * transmit holding register is empty. This functionality 482 * allows an RS485 driver to be written in user space. 483 * ------------------------------------------------------------------- 484 */ 485 static unsigned int dz_tx_empty(struct uart_port *uport) 486 { 487 struct dz_port *dport = to_dport(uport); 488 unsigned short tmp, mask = 1 << dport->port.line; 489 490 tmp = dz_in(dport, DZ_TCR); 491 tmp &= mask; 492 493 return tmp ? 0 : TIOCSER_TEMT; 494 } 495 496 static void dz_break_ctl(struct uart_port *uport, int break_state) 497 { 498 /* 499 * FIXME: Can't access BREAK bits in TDR easily; 500 * reuse the code for polled TX. --macro 501 */ 502 struct dz_port *dport = to_dport(uport); 503 unsigned long flags; 504 unsigned short tmp, mask = 1 << dport->port.line; 505 506 spin_lock_irqsave(&uport->lock, flags); 507 tmp = dz_in(dport, DZ_TCR); 508 if (break_state) 509 tmp |= mask; 510 else 511 tmp &= ~mask; 512 dz_out(dport, DZ_TCR, tmp); 513 spin_unlock_irqrestore(&uport->lock, flags); 514 } 515 516 static int dz_encode_baud_rate(unsigned int baud) 517 { 518 switch (baud) { 519 case 50: 520 return DZ_B50; 521 case 75: 522 return DZ_B75; 523 case 110: 524 return DZ_B110; 525 case 134: 526 return DZ_B134; 527 case 150: 528 return DZ_B150; 529 case 300: 530 return DZ_B300; 531 case 600: 532 return DZ_B600; 533 case 1200: 534 return DZ_B1200; 535 case 1800: 536 return DZ_B1800; 537 case 2000: 538 return DZ_B2000; 539 case 2400: 540 return DZ_B2400; 541 case 3600: 542 return DZ_B3600; 543 case 4800: 544 return DZ_B4800; 545 case 7200: 546 return DZ_B7200; 547 case 9600: 548 return DZ_B9600; 549 default: 550 return -1; 551 } 552 } 553 554 555 static void dz_reset(struct dz_port *dport) 556 { 557 struct dz_mux *mux = dport->mux; 558 559 if (mux->initialised) 560 return; 561 562 dz_out(dport, DZ_CSR, DZ_CLR); 563 while (dz_in(dport, DZ_CSR) & DZ_CLR); 564 iob(); 565 566 /* Enable scanning. */ 567 dz_out(dport, DZ_CSR, DZ_MSE); 568 569 mux->initialised = 1; 570 } 571 572 static void dz_set_termios(struct uart_port *uport, struct ktermios *termios, 573 struct ktermios *old_termios) 574 { 575 struct dz_port *dport = to_dport(uport); 576 unsigned long flags; 577 unsigned int cflag, baud; 578 int bflag; 579 580 cflag = dport->port.line; 581 582 switch (termios->c_cflag & CSIZE) { 583 case CS5: 584 cflag |= DZ_CS5; 585 break; 586 case CS6: 587 cflag |= DZ_CS6; 588 break; 589 case CS7: 590 cflag |= DZ_CS7; 591 break; 592 case CS8: 593 default: 594 cflag |= DZ_CS8; 595 } 596 597 if (termios->c_cflag & CSTOPB) 598 cflag |= DZ_CSTOPB; 599 if (termios->c_cflag & PARENB) 600 cflag |= DZ_PARENB; 601 if (termios->c_cflag & PARODD) 602 cflag |= DZ_PARODD; 603 604 baud = uart_get_baud_rate(uport, termios, old_termios, 50, 9600); 605 bflag = dz_encode_baud_rate(baud); 606 if (bflag < 0) { /* Try to keep unchanged. */ 607 baud = uart_get_baud_rate(uport, old_termios, NULL, 50, 9600); 608 bflag = dz_encode_baud_rate(baud); 609 if (bflag < 0) { /* Resort to 9600. */ 610 baud = 9600; 611 bflag = DZ_B9600; 612 } 613 tty_termios_encode_baud_rate(termios, baud, baud); 614 } 615 cflag |= bflag; 616 617 if (termios->c_cflag & CREAD) 618 cflag |= DZ_RXENAB; 619 620 spin_lock_irqsave(&dport->port.lock, flags); 621 622 uart_update_timeout(uport, termios->c_cflag, baud); 623 624 dz_out(dport, DZ_LPR, cflag); 625 dport->cflag = cflag; 626 627 /* setup accept flag */ 628 dport->port.read_status_mask = DZ_OERR; 629 if (termios->c_iflag & INPCK) 630 dport->port.read_status_mask |= DZ_FERR | DZ_PERR; 631 if (termios->c_iflag & (BRKINT | PARMRK)) 632 dport->port.read_status_mask |= DZ_BREAK; 633 634 /* characters to ignore */ 635 uport->ignore_status_mask = 0; 636 if ((termios->c_iflag & (IGNPAR | IGNBRK)) == (IGNPAR | IGNBRK)) 637 dport->port.ignore_status_mask |= DZ_OERR; 638 if (termios->c_iflag & IGNPAR) 639 dport->port.ignore_status_mask |= DZ_FERR | DZ_PERR; 640 if (termios->c_iflag & IGNBRK) 641 dport->port.ignore_status_mask |= DZ_BREAK; 642 643 spin_unlock_irqrestore(&dport->port.lock, flags); 644 } 645 646 /* 647 * Hack alert! 648 * Required solely so that the initial PROM-based console 649 * works undisturbed in parallel with this one. 650 */ 651 static void dz_pm(struct uart_port *uport, unsigned int state, 652 unsigned int oldstate) 653 { 654 struct dz_port *dport = to_dport(uport); 655 unsigned long flags; 656 657 spin_lock_irqsave(&dport->port.lock, flags); 658 if (state < 3) 659 dz_start_tx(&dport->port); 660 else 661 dz_stop_tx(&dport->port); 662 spin_unlock_irqrestore(&dport->port.lock, flags); 663 } 664 665 666 static const char *dz_type(struct uart_port *uport) 667 { 668 return "DZ"; 669 } 670 671 static void dz_release_port(struct uart_port *uport) 672 { 673 struct dz_mux *mux = to_dport(uport)->mux; 674 int map_guard; 675 676 iounmap(uport->membase); 677 uport->membase = NULL; 678 679 map_guard = atomic_add_return(-1, &mux->map_guard); 680 if (!map_guard) 681 release_mem_region(uport->mapbase, dec_kn_slot_size); 682 } 683 684 static int dz_map_port(struct uart_port *uport) 685 { 686 if (!uport->membase) 687 uport->membase = ioremap_nocache(uport->mapbase, 688 dec_kn_slot_size); 689 if (!uport->membase) { 690 printk(KERN_ERR "dz: Cannot map MMIO\n"); 691 return -ENOMEM; 692 } 693 return 0; 694 } 695 696 static int dz_request_port(struct uart_port *uport) 697 { 698 struct dz_mux *mux = to_dport(uport)->mux; 699 int map_guard; 700 int ret; 701 702 map_guard = atomic_add_return(1, &mux->map_guard); 703 if (map_guard == 1) { 704 if (!request_mem_region(uport->mapbase, dec_kn_slot_size, 705 "dz")) { 706 atomic_add(-1, &mux->map_guard); 707 printk(KERN_ERR 708 "dz: Unable to reserve MMIO resource\n"); 709 return -EBUSY; 710 } 711 } 712 ret = dz_map_port(uport); 713 if (ret) { 714 map_guard = atomic_add_return(-1, &mux->map_guard); 715 if (!map_guard) 716 release_mem_region(uport->mapbase, dec_kn_slot_size); 717 return ret; 718 } 719 return 0; 720 } 721 722 static void dz_config_port(struct uart_port *uport, int flags) 723 { 724 struct dz_port *dport = to_dport(uport); 725 726 if (flags & UART_CONFIG_TYPE) { 727 if (dz_request_port(uport)) 728 return; 729 730 uport->type = PORT_DZ; 731 732 dz_reset(dport); 733 } 734 } 735 736 /* 737 * Verify the new serial_struct (for TIOCSSERIAL). 738 */ 739 static int dz_verify_port(struct uart_port *uport, struct serial_struct *ser) 740 { 741 int ret = 0; 742 743 if (ser->type != PORT_UNKNOWN && ser->type != PORT_DZ) 744 ret = -EINVAL; 745 if (ser->irq != uport->irq) 746 ret = -EINVAL; 747 return ret; 748 } 749 750 static struct uart_ops dz_ops = { 751 .tx_empty = dz_tx_empty, 752 .get_mctrl = dz_get_mctrl, 753 .set_mctrl = dz_set_mctrl, 754 .stop_tx = dz_stop_tx, 755 .start_tx = dz_start_tx, 756 .stop_rx = dz_stop_rx, 757 .enable_ms = dz_enable_ms, 758 .break_ctl = dz_break_ctl, 759 .startup = dz_startup, 760 .shutdown = dz_shutdown, 761 .set_termios = dz_set_termios, 762 .pm = dz_pm, 763 .type = dz_type, 764 .release_port = dz_release_port, 765 .request_port = dz_request_port, 766 .config_port = dz_config_port, 767 .verify_port = dz_verify_port, 768 }; 769 770 static void __init dz_init_ports(void) 771 { 772 static int first = 1; 773 unsigned long base; 774 int line; 775 776 if (!first) 777 return; 778 first = 0; 779 780 if (mips_machtype == MACH_DS23100 || mips_machtype == MACH_DS5100) 781 base = dec_kn_slot_base + KN01_DZ11; 782 else 783 base = dec_kn_slot_base + KN02_DZ11; 784 785 for (line = 0; line < DZ_NB_PORT; line++) { 786 struct dz_port *dport = &dz_mux.dport[line]; 787 struct uart_port *uport = &dport->port; 788 789 dport->mux = &dz_mux; 790 791 uport->irq = dec_interrupt[DEC_IRQ_DZ11]; 792 uport->fifosize = 1; 793 uport->iotype = UPIO_MEM; 794 uport->flags = UPF_BOOT_AUTOCONF; 795 uport->ops = &dz_ops; 796 uport->line = line; 797 uport->mapbase = base; 798 } 799 } 800 801 #ifdef CONFIG_SERIAL_DZ_CONSOLE 802 /* 803 * ------------------------------------------------------------------- 804 * dz_console_putchar() -- transmit a character 805 * 806 * Polled transmission. This is tricky. We need to mask transmit 807 * interrupts so that they do not interfere, enable the transmitter 808 * for the line requested and then wait till the transmit scanner 809 * requests data for this line. But it may request data for another 810 * line first, in which case we have to disable its transmitter and 811 * repeat waiting till our line pops up. Only then the character may 812 * be transmitted. Finally, the state of the transmitter mask is 813 * restored. Welcome to the world of PDP-11! 814 * ------------------------------------------------------------------- 815 */ 816 static void dz_console_putchar(struct uart_port *uport, int ch) 817 { 818 struct dz_port *dport = to_dport(uport); 819 unsigned long flags; 820 unsigned short csr, tcr, trdy, mask; 821 int loops = 10000; 822 823 spin_lock_irqsave(&dport->port.lock, flags); 824 csr = dz_in(dport, DZ_CSR); 825 dz_out(dport, DZ_CSR, csr & ~DZ_TIE); 826 tcr = dz_in(dport, DZ_TCR); 827 tcr |= 1 << dport->port.line; 828 mask = tcr; 829 dz_out(dport, DZ_TCR, mask); 830 iob(); 831 spin_unlock_irqrestore(&dport->port.lock, flags); 832 833 do { 834 trdy = dz_in(dport, DZ_CSR); 835 if (!(trdy & DZ_TRDY)) 836 continue; 837 trdy = (trdy & DZ_TLINE) >> 8; 838 if (trdy == dport->port.line) 839 break; 840 mask &= ~(1 << trdy); 841 dz_out(dport, DZ_TCR, mask); 842 iob(); 843 udelay(2); 844 } while (--loops); 845 846 if (loops) /* Cannot send otherwise. */ 847 dz_out(dport, DZ_TDR, ch); 848 849 dz_out(dport, DZ_TCR, tcr); 850 dz_out(dport, DZ_CSR, csr); 851 } 852 853 /* 854 * ------------------------------------------------------------------- 855 * dz_console_print () 856 * 857 * dz_console_print is registered for printk. 858 * The console must be locked when we get here. 859 * ------------------------------------------------------------------- 860 */ 861 static void dz_console_print(struct console *co, 862 const char *str, 863 unsigned int count) 864 { 865 struct dz_port *dport = &dz_mux.dport[co->index]; 866 #ifdef DEBUG_DZ 867 prom_printf((char *) str); 868 #endif 869 uart_console_write(&dport->port, str, count, dz_console_putchar); 870 } 871 872 static int __init dz_console_setup(struct console *co, char *options) 873 { 874 struct dz_port *dport = &dz_mux.dport[co->index]; 875 struct uart_port *uport = &dport->port; 876 int baud = 9600; 877 int bits = 8; 878 int parity = 'n'; 879 int flow = 'n'; 880 int ret; 881 882 ret = dz_map_port(uport); 883 if (ret) 884 return ret; 885 886 spin_lock_init(&dport->port.lock); /* For dz_pm(). */ 887 888 dz_reset(dport); 889 dz_pm(uport, 0, -1); 890 891 if (options) 892 uart_parse_options(options, &baud, &parity, &bits, &flow); 893 894 return uart_set_options(&dport->port, co, baud, parity, bits, flow); 895 } 896 897 static struct uart_driver dz_reg; 898 static struct console dz_console = { 899 .name = "ttyS", 900 .write = dz_console_print, 901 .device = uart_console_device, 902 .setup = dz_console_setup, 903 .flags = CON_PRINTBUFFER, 904 .index = -1, 905 .data = &dz_reg, 906 }; 907 908 static int __init dz_serial_console_init(void) 909 { 910 if (!IOASIC) { 911 dz_init_ports(); 912 register_console(&dz_console); 913 return 0; 914 } else 915 return -ENXIO; 916 } 917 918 console_initcall(dz_serial_console_init); 919 920 #define SERIAL_DZ_CONSOLE &dz_console 921 #else 922 #define SERIAL_DZ_CONSOLE NULL 923 #endif /* CONFIG_SERIAL_DZ_CONSOLE */ 924 925 static struct uart_driver dz_reg = { 926 .owner = THIS_MODULE, 927 .driver_name = "serial", 928 .dev_name = "ttyS", 929 .major = TTY_MAJOR, 930 .minor = 64, 931 .nr = DZ_NB_PORT, 932 .cons = SERIAL_DZ_CONSOLE, 933 }; 934 935 static int __init dz_init(void) 936 { 937 int ret, i; 938 939 if (IOASIC) 940 return -ENXIO; 941 942 printk("%s%s\n", dz_name, dz_version); 943 944 dz_init_ports(); 945 946 ret = uart_register_driver(&dz_reg); 947 if (ret) 948 return ret; 949 950 for (i = 0; i < DZ_NB_PORT; i++) 951 uart_add_one_port(&dz_reg, &dz_mux.dport[i].port); 952 953 return 0; 954 } 955 956 module_init(dz_init); 957