1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * dz.c: Serial port driver for DECstations equipped
4 * with the DZ chipset.
5 *
6 * Copyright (C) 1998 Olivier A. D. Lebaillif
7 *
8 * Email: olivier.lebaillif@ifrsys.com
9 *
10 * Copyright (C) 2004, 2006, 2007 Maciej W. Rozycki
11 *
12 * [31-AUG-98] triemer
13 * Changed IRQ to use Harald's dec internals interrupts.h
14 * removed base_addr code - moving address assignment to setup.c
15 * Changed name of dz_init to rs_init to be consistent with tc code
16 * [13-NOV-98] triemer fixed code to receive characters
17 * after patches by harald to irq code.
18 * [09-JAN-99] triemer minor fix for schedule - due to removal of timeout
19 * field from "current" - somewhere between 2.1.121 and 2.1.131
20 Qua Jun 27 15:02:26 BRT 2001
21 * [27-JUN-2001] Arnaldo Carvalho de Melo <acme@conectiva.com.br> - cleanups
22 *
23 * Parts (C) 1999 David Airlie, airlied@linux.ie
24 * [07-SEP-99] Bugfixes
25 *
26 * [06-Jan-2002] Russell King <rmk@arm.linux.org.uk>
27 * Converted to new serial core
28 */
29
30 #undef DEBUG_DZ
31
32 #include <linux/bitops.h>
33 #include <linux/compiler.h>
34 #include <linux/console.h>
35 #include <linux/delay.h>
36 #include <linux/errno.h>
37 #include <linux/init.h>
38 #include <linux/interrupt.h>
39 #include <linux/ioport.h>
40 #include <linux/kernel.h>
41 #include <linux/major.h>
42 #include <linux/module.h>
43 #include <linux/serial.h>
44 #include <linux/serial_core.h>
45 #include <linux/sysrq.h>
46 #include <linux/tty.h>
47 #include <linux/tty_flip.h>
48
49 #include <linux/atomic.h>
50 #include <linux/io.h>
51 #include <asm/bootinfo.h>
52
53 #include <asm/dec/interrupts.h>
54 #include <asm/dec/kn01.h>
55 #include <asm/dec/kn02.h>
56 #include <asm/dec/machtype.h>
57 #include <asm/dec/prom.h>
58 #include <asm/dec/system.h>
59
60 #include "dz.h"
61
62
63 MODULE_DESCRIPTION("DECstation DZ serial driver");
64 MODULE_LICENSE("GPL");
65
66
67 static char dz_name[] __initdata = "DECstation DZ serial driver version ";
68 static char dz_version[] __initdata = "1.04";
69
70 struct dz_port {
71 struct dz_mux *mux;
72 struct uart_port port;
73 unsigned int cflag;
74 };
75
76 struct dz_mux {
77 struct dz_port dport[DZ_NB_PORT];
78 atomic_t map_guard;
79 atomic_t irq_guard;
80 int initialised;
81 };
82
83 static struct dz_mux dz_mux;
84
to_dport(struct uart_port * uport)85 static inline struct dz_port *to_dport(struct uart_port *uport)
86 {
87 return container_of(uport, struct dz_port, port);
88 }
89
90 /*
91 * ------------------------------------------------------------
92 * dz_in () and dz_out ()
93 *
94 * These routines are used to access the registers of the DZ
95 * chip, hiding relocation differences between implementation.
96 * ------------------------------------------------------------
97 */
98
dz_in(struct dz_port * dport,unsigned offset)99 static u16 dz_in(struct dz_port *dport, unsigned offset)
100 {
101 void __iomem *addr = dport->port.membase + offset;
102
103 return readw(addr);
104 }
105
dz_out(struct dz_port * dport,unsigned offset,u16 value)106 static void dz_out(struct dz_port *dport, unsigned offset, u16 value)
107 {
108 void __iomem *addr = dport->port.membase + offset;
109
110 writew(value, addr);
111 }
112
113 /*
114 * ------------------------------------------------------------
115 * rs_stop () and rs_start ()
116 *
117 * These routines are called before setting or resetting
118 * tty->flow.stopped. They enable or disable transmitter interrupts,
119 * as necessary.
120 * ------------------------------------------------------------
121 */
122
dz_stop_tx(struct uart_port * uport)123 static void dz_stop_tx(struct uart_port *uport)
124 {
125 struct dz_port *dport = to_dport(uport);
126 u16 tmp, mask = 1 << dport->port.line;
127
128 tmp = dz_in(dport, DZ_TCR); /* read the TX flag */
129 tmp &= ~mask; /* clear the TX flag */
130 dz_out(dport, DZ_TCR, tmp);
131 }
132
dz_start_tx(struct uart_port * uport)133 static void dz_start_tx(struct uart_port *uport)
134 {
135 struct dz_port *dport = to_dport(uport);
136 u16 tmp, mask = 1 << dport->port.line;
137
138 tmp = dz_in(dport, DZ_TCR); /* read the TX flag */
139 tmp |= mask; /* set the TX flag */
140 dz_out(dport, DZ_TCR, tmp);
141 }
142
dz_stop_rx(struct uart_port * uport)143 static void dz_stop_rx(struct uart_port *uport)
144 {
145 struct dz_port *dport = to_dport(uport);
146
147 dport->cflag &= ~DZ_RXENAB;
148 dz_out(dport, DZ_LPR, dport->cflag);
149 }
150
151 /*
152 * ------------------------------------------------------------
153 *
154 * Here start the interrupt handling routines. All of the following
155 * subroutines are declared as inline and are folded into
156 * dz_interrupt. They were separated out for readability's sake.
157 *
158 * Note: dz_interrupt() is a "fast" interrupt, which means that it
159 * runs with interrupts turned off. People who may want to modify
160 * dz_interrupt() should try to keep the interrupt handler as fast as
161 * possible. After you are done making modifications, it is not a bad
162 * idea to do:
163 *
164 * make drivers/serial/dz.s
165 *
166 * and look at the resulting assemble code in dz.s.
167 *
168 * ------------------------------------------------------------
169 */
170
171 /*
172 * ------------------------------------------------------------
173 * receive_char ()
174 *
175 * This routine deals with inputs from any lines.
176 * ------------------------------------------------------------
177 */
dz_receive_chars(struct dz_mux * mux)178 static inline void dz_receive_chars(struct dz_mux *mux)
179 {
180 struct uart_port *uport;
181 struct dz_port *dport = &mux->dport[0];
182 struct uart_icount *icount;
183 int lines_rx[DZ_NB_PORT] = { [0 ... DZ_NB_PORT - 1] = 0 };
184 u16 status;
185 u8 ch, flag;
186 int i;
187
188 while ((status = dz_in(dport, DZ_RBUF)) & DZ_DVAL) {
189 dport = &mux->dport[LINE(status)];
190 uport = &dport->port;
191
192 ch = UCHAR(status); /* grab the char */
193 flag = TTY_NORMAL;
194
195 icount = &uport->icount;
196 icount->rx++;
197
198 if (unlikely(status & (DZ_OERR | DZ_FERR | DZ_PERR))) {
199
200 /*
201 * There is no separate BREAK status bit, so treat
202 * null characters with framing errors as BREAKs;
203 * normally, otherwise. For this move the Framing
204 * Error bit to a simulated BREAK bit.
205 */
206 if (!ch) {
207 status |= (status & DZ_FERR) >>
208 (ffs(DZ_FERR) - ffs(DZ_BREAK));
209 status &= ~DZ_FERR;
210 }
211
212 /* Handle SysRq/SAK & keep track of the statistics. */
213 if (status & DZ_BREAK) {
214 icount->brk++;
215 if (uart_handle_break(uport))
216 continue;
217 } else if (status & DZ_FERR)
218 icount->frame++;
219 else if (status & DZ_PERR)
220 icount->parity++;
221 if (status & DZ_OERR)
222 icount->overrun++;
223
224 status &= uport->read_status_mask;
225 if (status & DZ_BREAK)
226 flag = TTY_BREAK;
227 else if (status & DZ_FERR)
228 flag = TTY_FRAME;
229 else if (status & DZ_PERR)
230 flag = TTY_PARITY;
231
232 }
233
234 if (uart_handle_sysrq_char(uport, ch))
235 continue;
236
237 uart_insert_char(uport, status, DZ_OERR, ch, flag);
238 lines_rx[LINE(status)] = 1;
239 }
240 for (i = 0; i < DZ_NB_PORT; i++)
241 if (lines_rx[i])
242 tty_flip_buffer_push(&mux->dport[i].port.state->port);
243 }
244
245 /*
246 * ------------------------------------------------------------
247 * transmit_char ()
248 *
249 * This routine deals with outputs to any lines.
250 * ------------------------------------------------------------
251 */
dz_transmit_chars(struct dz_mux * mux)252 static inline void dz_transmit_chars(struct dz_mux *mux)
253 {
254 struct dz_port *dport = &mux->dport[0];
255 struct circ_buf *xmit;
256 unsigned char tmp;
257 u16 status;
258
259 status = dz_in(dport, DZ_CSR);
260 dport = &mux->dport[LINE(status)];
261 xmit = &dport->port.state->xmit;
262
263 if (dport->port.x_char) { /* XON/XOFF chars */
264 dz_out(dport, DZ_TDR, dport->port.x_char);
265 dport->port.icount.tx++;
266 dport->port.x_char = 0;
267 return;
268 }
269 /* If nothing to do or stopped or hardware stopped. */
270 if (uart_circ_empty(xmit) || uart_tx_stopped(&dport->port)) {
271 spin_lock(&dport->port.lock);
272 dz_stop_tx(&dport->port);
273 spin_unlock(&dport->port.lock);
274 return;
275 }
276
277 /*
278 * If something to do... (remember the dz has no output fifo,
279 * so we go one char at a time) :-<
280 */
281 tmp = xmit->buf[xmit->tail];
282 dz_out(dport, DZ_TDR, tmp);
283 uart_xmit_advance(&dport->port, 1);
284
285 if (uart_circ_chars_pending(xmit) < DZ_WAKEUP_CHARS)
286 uart_write_wakeup(&dport->port);
287
288 /* Are we are done. */
289 if (uart_circ_empty(xmit)) {
290 spin_lock(&dport->port.lock);
291 dz_stop_tx(&dport->port);
292 spin_unlock(&dport->port.lock);
293 }
294 }
295
296 /*
297 * ------------------------------------------------------------
298 * check_modem_status()
299 *
300 * DS 3100 & 5100: Only valid for the MODEM line, duh!
301 * DS 5000/200: Valid for the MODEM and PRINTER line.
302 * ------------------------------------------------------------
303 */
check_modem_status(struct dz_port * dport)304 static inline void check_modem_status(struct dz_port *dport)
305 {
306 /*
307 * FIXME:
308 * 1. No status change interrupt; use a timer.
309 * 2. Handle the 3100/5000 as appropriate. --macro
310 */
311 u16 status;
312
313 /* If not the modem line just return. */
314 if (dport->port.line != DZ_MODEM)
315 return;
316
317 status = dz_in(dport, DZ_MSR);
318
319 /* it's easy, since DSR2 is the only bit in the register */
320 if (status)
321 dport->port.icount.dsr++;
322 }
323
324 /*
325 * ------------------------------------------------------------
326 * dz_interrupt ()
327 *
328 * this is the main interrupt routine for the DZ chip.
329 * It deals with the multiple ports.
330 * ------------------------------------------------------------
331 */
dz_interrupt(int irq,void * dev_id)332 static irqreturn_t dz_interrupt(int irq, void *dev_id)
333 {
334 struct dz_mux *mux = dev_id;
335 struct dz_port *dport = &mux->dport[0];
336 u16 status;
337
338 /* get the reason why we just got an irq */
339 status = dz_in(dport, DZ_CSR);
340
341 if ((status & (DZ_RDONE | DZ_RIE)) == (DZ_RDONE | DZ_RIE))
342 dz_receive_chars(mux);
343
344 if ((status & (DZ_TRDY | DZ_TIE)) == (DZ_TRDY | DZ_TIE))
345 dz_transmit_chars(mux);
346
347 return IRQ_HANDLED;
348 }
349
350 /*
351 * -------------------------------------------------------------------
352 * Here ends the DZ interrupt routines.
353 * -------------------------------------------------------------------
354 */
355
dz_get_mctrl(struct uart_port * uport)356 static unsigned int dz_get_mctrl(struct uart_port *uport)
357 {
358 /*
359 * FIXME: Handle the 3100/5000 as appropriate. --macro
360 */
361 struct dz_port *dport = to_dport(uport);
362 unsigned int mctrl = TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
363
364 if (dport->port.line == DZ_MODEM) {
365 if (dz_in(dport, DZ_MSR) & DZ_MODEM_DSR)
366 mctrl &= ~TIOCM_DSR;
367 }
368
369 return mctrl;
370 }
371
dz_set_mctrl(struct uart_port * uport,unsigned int mctrl)372 static void dz_set_mctrl(struct uart_port *uport, unsigned int mctrl)
373 {
374 /*
375 * FIXME: Handle the 3100/5000 as appropriate. --macro
376 */
377 struct dz_port *dport = to_dport(uport);
378 u16 tmp;
379
380 if (dport->port.line == DZ_MODEM) {
381 tmp = dz_in(dport, DZ_TCR);
382 if (mctrl & TIOCM_DTR)
383 tmp &= ~DZ_MODEM_DTR;
384 else
385 tmp |= DZ_MODEM_DTR;
386 dz_out(dport, DZ_TCR, tmp);
387 }
388 }
389
390 /*
391 * -------------------------------------------------------------------
392 * startup ()
393 *
394 * various initialization tasks
395 * -------------------------------------------------------------------
396 */
dz_startup(struct uart_port * uport)397 static int dz_startup(struct uart_port *uport)
398 {
399 struct dz_port *dport = to_dport(uport);
400 struct dz_mux *mux = dport->mux;
401 unsigned long flags;
402 int irq_guard;
403 int ret;
404 u16 tmp;
405
406 irq_guard = atomic_add_return(1, &mux->irq_guard);
407 if (irq_guard != 1)
408 return 0;
409
410 ret = request_irq(dport->port.irq, dz_interrupt,
411 IRQF_SHARED, "dz", mux);
412 if (ret) {
413 atomic_add(-1, &mux->irq_guard);
414 printk(KERN_ERR "dz: Cannot get IRQ %d!\n", dport->port.irq);
415 return ret;
416 }
417
418 spin_lock_irqsave(&dport->port.lock, flags);
419
420 /* Enable interrupts. */
421 tmp = dz_in(dport, DZ_CSR);
422 tmp |= DZ_RIE | DZ_TIE;
423 dz_out(dport, DZ_CSR, tmp);
424
425 spin_unlock_irqrestore(&dport->port.lock, flags);
426
427 return 0;
428 }
429
430 /*
431 * -------------------------------------------------------------------
432 * shutdown ()
433 *
434 * This routine will shutdown a serial port; interrupts are disabled, and
435 * DTR is dropped if the hangup on close termio flag is on.
436 * -------------------------------------------------------------------
437 */
dz_shutdown(struct uart_port * uport)438 static void dz_shutdown(struct uart_port *uport)
439 {
440 struct dz_port *dport = to_dport(uport);
441 struct dz_mux *mux = dport->mux;
442 unsigned long flags;
443 int irq_guard;
444 u16 tmp;
445
446 spin_lock_irqsave(&dport->port.lock, flags);
447 dz_stop_tx(&dport->port);
448 spin_unlock_irqrestore(&dport->port.lock, flags);
449
450 irq_guard = atomic_add_return(-1, &mux->irq_guard);
451 if (!irq_guard) {
452 /* Disable interrupts. */
453 tmp = dz_in(dport, DZ_CSR);
454 tmp &= ~(DZ_RIE | DZ_TIE);
455 dz_out(dport, DZ_CSR, tmp);
456
457 free_irq(dport->port.irq, mux);
458 }
459 }
460
461 /*
462 * -------------------------------------------------------------------
463 * dz_tx_empty() -- get the transmitter empty status
464 *
465 * Purpose: Let user call ioctl() to get info when the UART physically
466 * is emptied. On bus types like RS485, the transmitter must
467 * release the bus after transmitting. This must be done when
468 * the transmit shift register is empty, not be done when the
469 * transmit holding register is empty. This functionality
470 * allows an RS485 driver to be written in user space.
471 * -------------------------------------------------------------------
472 */
dz_tx_empty(struct uart_port * uport)473 static unsigned int dz_tx_empty(struct uart_port *uport)
474 {
475 struct dz_port *dport = to_dport(uport);
476 unsigned short tmp, mask = 1 << dport->port.line;
477
478 tmp = dz_in(dport, DZ_TCR);
479 tmp &= mask;
480
481 return tmp ? 0 : TIOCSER_TEMT;
482 }
483
dz_break_ctl(struct uart_port * uport,int break_state)484 static void dz_break_ctl(struct uart_port *uport, int break_state)
485 {
486 /*
487 * FIXME: Can't access BREAK bits in TDR easily;
488 * reuse the code for polled TX. --macro
489 */
490 struct dz_port *dport = to_dport(uport);
491 unsigned long flags;
492 unsigned short tmp, mask = 1 << dport->port.line;
493
494 spin_lock_irqsave(&uport->lock, flags);
495 tmp = dz_in(dport, DZ_TCR);
496 if (break_state)
497 tmp |= mask;
498 else
499 tmp &= ~mask;
500 dz_out(dport, DZ_TCR, tmp);
501 spin_unlock_irqrestore(&uport->lock, flags);
502 }
503
dz_encode_baud_rate(unsigned int baud)504 static int dz_encode_baud_rate(unsigned int baud)
505 {
506 switch (baud) {
507 case 50:
508 return DZ_B50;
509 case 75:
510 return DZ_B75;
511 case 110:
512 return DZ_B110;
513 case 134:
514 return DZ_B134;
515 case 150:
516 return DZ_B150;
517 case 300:
518 return DZ_B300;
519 case 600:
520 return DZ_B600;
521 case 1200:
522 return DZ_B1200;
523 case 1800:
524 return DZ_B1800;
525 case 2000:
526 return DZ_B2000;
527 case 2400:
528 return DZ_B2400;
529 case 3600:
530 return DZ_B3600;
531 case 4800:
532 return DZ_B4800;
533 case 7200:
534 return DZ_B7200;
535 case 9600:
536 return DZ_B9600;
537 default:
538 return -1;
539 }
540 }
541
542
dz_reset(struct dz_port * dport)543 static void dz_reset(struct dz_port *dport)
544 {
545 struct dz_mux *mux = dport->mux;
546
547 if (mux->initialised)
548 return;
549
550 dz_out(dport, DZ_CSR, DZ_CLR);
551 while (dz_in(dport, DZ_CSR) & DZ_CLR);
552 iob();
553
554 /* Enable scanning. */
555 dz_out(dport, DZ_CSR, DZ_MSE);
556
557 mux->initialised = 1;
558 }
559
dz_set_termios(struct uart_port * uport,struct ktermios * termios,const struct ktermios * old_termios)560 static void dz_set_termios(struct uart_port *uport, struct ktermios *termios,
561 const struct ktermios *old_termios)
562 {
563 struct dz_port *dport = to_dport(uport);
564 unsigned long flags;
565 unsigned int cflag, baud;
566 int bflag;
567
568 cflag = dport->port.line;
569
570 switch (termios->c_cflag & CSIZE) {
571 case CS5:
572 cflag |= DZ_CS5;
573 break;
574 case CS6:
575 cflag |= DZ_CS6;
576 break;
577 case CS7:
578 cflag |= DZ_CS7;
579 break;
580 case CS8:
581 default:
582 cflag |= DZ_CS8;
583 }
584
585 if (termios->c_cflag & CSTOPB)
586 cflag |= DZ_CSTOPB;
587 if (termios->c_cflag & PARENB)
588 cflag |= DZ_PARENB;
589 if (termios->c_cflag & PARODD)
590 cflag |= DZ_PARODD;
591
592 baud = uart_get_baud_rate(uport, termios, old_termios, 50, 9600);
593 bflag = dz_encode_baud_rate(baud);
594 if (bflag < 0) {
595 if (old_termios) {
596 /* Keep unchanged. */
597 baud = tty_termios_baud_rate(old_termios);
598 bflag = dz_encode_baud_rate(baud);
599 }
600 if (bflag < 0) { /* Resort to 9600. */
601 baud = 9600;
602 bflag = DZ_B9600;
603 }
604 tty_termios_encode_baud_rate(termios, baud, baud);
605 }
606 cflag |= bflag;
607
608 if (termios->c_cflag & CREAD)
609 cflag |= DZ_RXENAB;
610
611 spin_lock_irqsave(&dport->port.lock, flags);
612
613 uart_update_timeout(uport, termios->c_cflag, baud);
614
615 dz_out(dport, DZ_LPR, cflag);
616 dport->cflag = cflag;
617
618 /* setup accept flag */
619 dport->port.read_status_mask = DZ_OERR;
620 if (termios->c_iflag & INPCK)
621 dport->port.read_status_mask |= DZ_FERR | DZ_PERR;
622 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
623 dport->port.read_status_mask |= DZ_BREAK;
624
625 /* characters to ignore */
626 uport->ignore_status_mask = 0;
627 if ((termios->c_iflag & (IGNPAR | IGNBRK)) == (IGNPAR | IGNBRK))
628 dport->port.ignore_status_mask |= DZ_OERR;
629 if (termios->c_iflag & IGNPAR)
630 dport->port.ignore_status_mask |= DZ_FERR | DZ_PERR;
631 if (termios->c_iflag & IGNBRK)
632 dport->port.ignore_status_mask |= DZ_BREAK;
633
634 spin_unlock_irqrestore(&dport->port.lock, flags);
635 }
636
637 /*
638 * Hack alert!
639 * Required solely so that the initial PROM-based console
640 * works undisturbed in parallel with this one.
641 */
dz_pm(struct uart_port * uport,unsigned int state,unsigned int oldstate)642 static void dz_pm(struct uart_port *uport, unsigned int state,
643 unsigned int oldstate)
644 {
645 struct dz_port *dport = to_dport(uport);
646 unsigned long flags;
647
648 spin_lock_irqsave(&dport->port.lock, flags);
649 if (state < 3)
650 dz_start_tx(&dport->port);
651 else
652 dz_stop_tx(&dport->port);
653 spin_unlock_irqrestore(&dport->port.lock, flags);
654 }
655
656
dz_type(struct uart_port * uport)657 static const char *dz_type(struct uart_port *uport)
658 {
659 return "DZ";
660 }
661
dz_release_port(struct uart_port * uport)662 static void dz_release_port(struct uart_port *uport)
663 {
664 struct dz_mux *mux = to_dport(uport)->mux;
665 int map_guard;
666
667 iounmap(uport->membase);
668 uport->membase = NULL;
669
670 map_guard = atomic_add_return(-1, &mux->map_guard);
671 if (!map_guard)
672 release_mem_region(uport->mapbase, dec_kn_slot_size);
673 }
674
dz_map_port(struct uart_port * uport)675 static int dz_map_port(struct uart_port *uport)
676 {
677 if (!uport->membase)
678 uport->membase = ioremap(uport->mapbase,
679 dec_kn_slot_size);
680 if (!uport->membase) {
681 printk(KERN_ERR "dz: Cannot map MMIO\n");
682 return -ENOMEM;
683 }
684 return 0;
685 }
686
dz_request_port(struct uart_port * uport)687 static int dz_request_port(struct uart_port *uport)
688 {
689 struct dz_mux *mux = to_dport(uport)->mux;
690 int map_guard;
691 int ret;
692
693 map_guard = atomic_add_return(1, &mux->map_guard);
694 if (map_guard == 1) {
695 if (!request_mem_region(uport->mapbase, dec_kn_slot_size,
696 "dz")) {
697 atomic_add(-1, &mux->map_guard);
698 printk(KERN_ERR
699 "dz: Unable to reserve MMIO resource\n");
700 return -EBUSY;
701 }
702 }
703 ret = dz_map_port(uport);
704 if (ret) {
705 map_guard = atomic_add_return(-1, &mux->map_guard);
706 if (!map_guard)
707 release_mem_region(uport->mapbase, dec_kn_slot_size);
708 return ret;
709 }
710 return 0;
711 }
712
dz_config_port(struct uart_port * uport,int flags)713 static void dz_config_port(struct uart_port *uport, int flags)
714 {
715 struct dz_port *dport = to_dport(uport);
716
717 if (flags & UART_CONFIG_TYPE) {
718 if (dz_request_port(uport))
719 return;
720
721 uport->type = PORT_DZ;
722
723 dz_reset(dport);
724 }
725 }
726
727 /*
728 * Verify the new serial_struct (for TIOCSSERIAL).
729 */
dz_verify_port(struct uart_port * uport,struct serial_struct * ser)730 static int dz_verify_port(struct uart_port *uport, struct serial_struct *ser)
731 {
732 int ret = 0;
733
734 if (ser->type != PORT_UNKNOWN && ser->type != PORT_DZ)
735 ret = -EINVAL;
736 if (ser->irq != uport->irq)
737 ret = -EINVAL;
738 return ret;
739 }
740
741 static const struct uart_ops dz_ops = {
742 .tx_empty = dz_tx_empty,
743 .get_mctrl = dz_get_mctrl,
744 .set_mctrl = dz_set_mctrl,
745 .stop_tx = dz_stop_tx,
746 .start_tx = dz_start_tx,
747 .stop_rx = dz_stop_rx,
748 .break_ctl = dz_break_ctl,
749 .startup = dz_startup,
750 .shutdown = dz_shutdown,
751 .set_termios = dz_set_termios,
752 .pm = dz_pm,
753 .type = dz_type,
754 .release_port = dz_release_port,
755 .request_port = dz_request_port,
756 .config_port = dz_config_port,
757 .verify_port = dz_verify_port,
758 };
759
dz_init_ports(void)760 static void __init dz_init_ports(void)
761 {
762 static int first = 1;
763 unsigned long base;
764 int line;
765
766 if (!first)
767 return;
768 first = 0;
769
770 if (mips_machtype == MACH_DS23100 || mips_machtype == MACH_DS5100)
771 base = dec_kn_slot_base + KN01_DZ11;
772 else
773 base = dec_kn_slot_base + KN02_DZ11;
774
775 for (line = 0; line < DZ_NB_PORT; line++) {
776 struct dz_port *dport = &dz_mux.dport[line];
777 struct uart_port *uport = &dport->port;
778
779 dport->mux = &dz_mux;
780
781 uport->irq = dec_interrupt[DEC_IRQ_DZ11];
782 uport->fifosize = 1;
783 uport->iotype = UPIO_MEM;
784 uport->flags = UPF_BOOT_AUTOCONF;
785 uport->ops = &dz_ops;
786 uport->line = line;
787 uport->mapbase = base;
788 uport->has_sysrq = IS_ENABLED(CONFIG_SERIAL_DZ_CONSOLE);
789 }
790 }
791
792 #ifdef CONFIG_SERIAL_DZ_CONSOLE
793 /*
794 * -------------------------------------------------------------------
795 * dz_console_putchar() -- transmit a character
796 *
797 * Polled transmission. This is tricky. We need to mask transmit
798 * interrupts so that they do not interfere, enable the transmitter
799 * for the line requested and then wait till the transmit scanner
800 * requests data for this line. But it may request data for another
801 * line first, in which case we have to disable its transmitter and
802 * repeat waiting till our line pops up. Only then the character may
803 * be transmitted. Finally, the state of the transmitter mask is
804 * restored. Welcome to the world of PDP-11!
805 * -------------------------------------------------------------------
806 */
dz_console_putchar(struct uart_port * uport,unsigned char ch)807 static void dz_console_putchar(struct uart_port *uport, unsigned char ch)
808 {
809 struct dz_port *dport = to_dport(uport);
810 unsigned long flags;
811 unsigned short csr, tcr, trdy, mask;
812 int loops = 10000;
813
814 spin_lock_irqsave(&dport->port.lock, flags);
815 csr = dz_in(dport, DZ_CSR);
816 dz_out(dport, DZ_CSR, csr & ~DZ_TIE);
817 tcr = dz_in(dport, DZ_TCR);
818 tcr |= 1 << dport->port.line;
819 mask = tcr;
820 dz_out(dport, DZ_TCR, mask);
821 iob();
822 spin_unlock_irqrestore(&dport->port.lock, flags);
823
824 do {
825 trdy = dz_in(dport, DZ_CSR);
826 if (!(trdy & DZ_TRDY))
827 continue;
828 trdy = (trdy & DZ_TLINE) >> 8;
829 if (trdy == dport->port.line)
830 break;
831 mask &= ~(1 << trdy);
832 dz_out(dport, DZ_TCR, mask);
833 iob();
834 udelay(2);
835 } while (--loops);
836
837 if (loops) /* Cannot send otherwise. */
838 dz_out(dport, DZ_TDR, ch);
839
840 dz_out(dport, DZ_TCR, tcr);
841 dz_out(dport, DZ_CSR, csr);
842 }
843
844 /*
845 * -------------------------------------------------------------------
846 * dz_console_print ()
847 *
848 * dz_console_print is registered for printk.
849 * The console must be locked when we get here.
850 * -------------------------------------------------------------------
851 */
dz_console_print(struct console * co,const char * str,unsigned int count)852 static void dz_console_print(struct console *co,
853 const char *str,
854 unsigned int count)
855 {
856 struct dz_port *dport = &dz_mux.dport[co->index];
857 #ifdef DEBUG_DZ
858 prom_printf((char *) str);
859 #endif
860 uart_console_write(&dport->port, str, count, dz_console_putchar);
861 }
862
dz_console_setup(struct console * co,char * options)863 static int __init dz_console_setup(struct console *co, char *options)
864 {
865 struct dz_port *dport = &dz_mux.dport[co->index];
866 struct uart_port *uport = &dport->port;
867 int baud = 9600;
868 int bits = 8;
869 int parity = 'n';
870 int flow = 'n';
871 int ret;
872
873 ret = dz_map_port(uport);
874 if (ret)
875 return ret;
876
877 spin_lock_init(&dport->port.lock); /* For dz_pm(). */
878
879 dz_reset(dport);
880 dz_pm(uport, 0, -1);
881
882 if (options)
883 uart_parse_options(options, &baud, &parity, &bits, &flow);
884
885 return uart_set_options(&dport->port, co, baud, parity, bits, flow);
886 }
887
888 static struct uart_driver dz_reg;
889 static struct console dz_console = {
890 .name = "ttyS",
891 .write = dz_console_print,
892 .device = uart_console_device,
893 .setup = dz_console_setup,
894 .flags = CON_PRINTBUFFER,
895 .index = -1,
896 .data = &dz_reg,
897 };
898
dz_serial_console_init(void)899 static int __init dz_serial_console_init(void)
900 {
901 if (!IOASIC) {
902 dz_init_ports();
903 register_console(&dz_console);
904 return 0;
905 } else
906 return -ENXIO;
907 }
908
909 console_initcall(dz_serial_console_init);
910
911 #define SERIAL_DZ_CONSOLE &dz_console
912 #else
913 #define SERIAL_DZ_CONSOLE NULL
914 #endif /* CONFIG_SERIAL_DZ_CONSOLE */
915
916 static struct uart_driver dz_reg = {
917 .owner = THIS_MODULE,
918 .driver_name = "serial",
919 .dev_name = "ttyS",
920 .major = TTY_MAJOR,
921 .minor = 64,
922 .nr = DZ_NB_PORT,
923 .cons = SERIAL_DZ_CONSOLE,
924 };
925
dz_init(void)926 static int __init dz_init(void)
927 {
928 int ret, i;
929
930 if (IOASIC)
931 return -ENXIO;
932
933 printk("%s%s\n", dz_name, dz_version);
934
935 dz_init_ports();
936
937 ret = uart_register_driver(&dz_reg);
938 if (ret)
939 return ret;
940
941 for (i = 0; i < DZ_NB_PORT; i++)
942 uart_add_one_port(&dz_reg, &dz_mux.dport[i].port);
943
944 return 0;
945 }
946
947 module_init(dz_init);
948